OpenCores
URL https://opencores.org/ocsvn/sardmips/sardmips/trunk

Subversion Repositories sardmips

[/] [sardmips/] [trunk/] [source/] [Makefile] - Blame information for rev 4

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 igorloi
#Makefile Mips R2000 developed by Igor Loi
2
#v 1.0 2004/12/05 21:42 Diee Cagliari
3
# Thanks to Nicolai Ascanium from IMM
4
 
5
TARGET_ARCH = linux
6
 
7
CC     = g++
8
OPT    = -O3
9
DEBUG  = -g
10
OTHER  = -Wall
11
CFLAGS = $(OPT) $(OTHER)
12
# CFLAGS = $(DEBUG) $(OTHER)
13
MODULE = mips2
14
SRCS = embedded_perif/decoder.cpp embedded_perif/mux.cpp top.cpp \
15
           cpu/pc_stage.cpp cpu/pc_stage/reg_pc.cpp \
16
           \
17
           cpu/if_stage.cpp cpu/if_stage/reg_if.cpp cpu/if_stage/add.cpp cpu/if_stage/select_next_pc.cpp \
18
              cpu/if_stage/if_ctrl.cpp\
19
           cpu/id_stage/mux_writeregister.cpp cpu/id_stage/sign_extend.cpp cpu/id_stage/add_new_pc.cpp \
20
              cpu/id_stage/mux_forward_select.cpp cpu/id_stage/mux_jump.cpp cpu/id_stage/mux_alu1.cpp \
21
              cpu/id_stage/mux_alu2.cpp cpu/id_stage/comparator.cpp cpu/id_stage/forwarding_control.cpp \
22
              cpu/id_stage/reg_id.cpp cpu/id_stage/control.cpp cpu/id_stage/regfile_high.cpp \
23
              cpu/id_stage/decode_ctrl.cpp cpu/id_stage.cpp \
24
           cpu/ex_stage/alu.cpp cpu/ex_stage/multiply.cpp cpu/ex_stage/backwrite.cpp cpu/ex_stage/reg_ex.cpp \
25
              cpu/ex_stage/mux_lo.cpp cpu/ex_stage/mux_hi.cpp cpu/ex_stage/mux_rd.cpp cpu/ex_stage/execute_ctrl.cpp \
26
              cpu/ex_stage/fsm.cpp cpu/ex_stage.cpp \
27
           cpu/mem_stage.cpp cpu/mem_stage/select_mem.cpp cpu/mem_stage/multiplexer_mem.cpp \
28
              cpu/mem_stage/reg_mem.cpp cpu/mem_stage/memstage_ctrl.cpp cpu/mem_stage/mux_interrupt.cpp \
29
              cpu/mem_stage/flag_interr.cpp\
30
           cpu/cp0.cpp cpu/cp0/set_stop_pc.cpp cpu/cp0/exception.cpp cpu/cp0/cp0_register.cpp \
31
           cpu/sc_cpu.cpp cpu/sc_risc.cpp  generators/reset_gen.cpp generators/timer.cpp cpu/enable_stage.cpp \
32
              cpu/writeback_ctrl.cpp cpu/mux_instaddr.cpp cpu/or_gate.cpp\
33
           memory/memory2.cpp \
34
           main.cpp top_debug.cpp
35
 
36
OBJS    = $(SRCS:.cpp=.o)
37
DEPS    = $(SRCS:.cpp=.d)
38
 
39
 
40
%.o : %.cpp
41
        $(CC) $(INCDIR) $(LIBDIR) $(EXTRA) $(CFLAGS) -c -o $@ $<
42
 
43
%.d: %.cpp
44
        set -e; $(CC) -MM $(INCDIR) $(LIBDIR) $(CFLAGS) $(EXTRA) $< | sed 's/\($*\)\.o[ :]*/\1.o $@ : /g' > $@; \
45
        [ -s $@ ] || rm -f $@
46
 
47
%.o : %.cc
48
        $(CC) $(INCDIR) $(LIBDIR) $(EXTRA) $(CFLAGS) -c -o $@ $<
49
 
50
%.d: %.cc
51
        set -e; $(CC) -MM $(INCDIR) $(LIBDIR) $(CFLAGS) $(EXTRA) $< | sed 's/\($*\)\.o[ :]*/\1.o $@ : /g' > $@; \
52
        [ -s $@ ] || rm -f $@
53
 
54
 
55
$(MODULE): $(OBJS)
56
        $(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(LIBS) 2>&1 | c++filt
57
 
58
 
59
include ./Makefile.defs

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.