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11 |
ashwin_men |
// This file has been automatically generated. Do not modify.
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// Command Line Options: -family virtex6 -enable_ecc 0 -tRAS 37500 -part_data_width 16 -cas_latency 6 -cas_wr_latency 5 -memory_burst_length 8 -tRC 50625 -tRCD 13130 -nDQSS 1 -tWR 15000 -tRP 13130 -tRRD 7500 -tRFC 110000 -nAL 0 -nCCD 4 -tWTR 7500 -tRTP 7500 -nZQCS 64 -c 5000 -reg 0 -m DDR3 -d 32 -f_txt /raid/home/aamendon/open_source/svn/sata_controller_core/sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/DDR3_SDRAM_ctrl_path_table.txt -f_err /raid/home/aamendon/open_source/svn/sata_controller_core/sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/DDR3_SDRAM_ctrl_path_generation_errors.txt -f_ver /raid/home/aamendon/open_source/svn/sata_controller_core/sata_controller_core/trunk/sata2_bus_v1_00_a/base_system/__xps/DDR3_SDRAM_ctrl_path_params.v -static_phy 0 -wr_mem_pipeline 1
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//
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| 4 |
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// Timing Parameters:
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// Memory Clock Period (ps): 2500
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// CAS Latency : 6
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// CAS Write Latency : 5
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| 8 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 9 |
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// | | | Clocks | Nanoseconds |
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| 10 |
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// |Parameter | Symbol | MIN | MAX | MIN | MAX |
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// +------------------------------+--------+-----+-------+-------+---------+
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// |ACTIVATE to internal READ or | tRCD | 7 | - | 13.1 | - |
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| 13 |
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// |WRITE delay time* | | | | | |
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| 14 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 15 |
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// |PRECHARGE command period | tRP | 6 | - | 13.1 | - |
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| 16 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 17 |
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// |ACTIVATE-to-ACTIVATE or | tRC | 21 | - | 50.6 | - |
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| 18 |
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// |REFRESH command period | | | | | |
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| 19 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 20 |
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// |ACTIVATE-to-PRECHARGE | tRAS | 15 | - | 37.5 | - |
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| 21 |
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// |command period | | | | | |
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| 22 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 23 |
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// |ACTIVATE-to-ACTIVATE minimum | tRRD | 4 | - | 7.5 | - |
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| 24 |
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// |command period | | | | | |
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| 25 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 26 |
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// |Write recovery time | tWR | 6 | - | 15.0 | - |
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| 27 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 28 |
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// |Delay from start of internal | tWTR | | - | 7.5 | - |
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| 29 |
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// |WRITE transaction to internal | | | | | |
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| 30 |
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// |READ command | | | | | |
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| 31 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 32 |
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// |READ-to-PRECHARGE time | tRTP | 4 | - | 7.5 | - |
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| 33 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 34 |
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// |CAS#-to-CAS# command delay | tCCD | 4 | - | | - |
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| 35 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 36 |
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// |ZQCS command: short calib time| nZQCS | 64 | - | | - |
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| 37 |
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// +------------------------------+--------+-----+-------+-------+---------+
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| 38 |
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// * tRCD must be an odd number of clock cycles when using Virtex-6 DDR3 (DFI)
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//--------------------------------------------------------------------------
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//
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// FSM PATTERN 0: WORD WRITE
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//
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// Control Signals 0 0
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| 45 |
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// (32 Signals) 0123456789abcdef
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| 46 |
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// --------------- -------------------------------- ------------------------------
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| 47 |
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/* 0 CTRL_COMPLETE */ 0000000000100000 // Delayed by 1
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| 48 |
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/* 1 CTRL_IS_WRITE */ 1111111111111111 // Delayed by 1
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| 49 |
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/* 2 CTRL_DFI_RAS_N_0 */ 1011111111110111 // Delayed by 2
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| 50 |
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/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111111 // Delayed by 2
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| 51 |
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/* 4 CTRL_DFI_WE_N_0 */ 1111111111110111 // Delayed by 2
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| 52 |
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/* 5 UNUSED */ 0000000000000000 // Delayed by 0
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| 53 |
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/* 6 UNUSED */ 0000000000000000 // Delayed by 0
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| 54 |
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/* 7 UNUSED */ 0000000000000000 // Delayed by 0
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| 55 |
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/* 8 CTRL_DP_WRFIFO_POP */ 0010000000000000 // Delayed by 1
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| 56 |
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/* 9 UNUSED */ 0000000000000000 // Delayed by 0
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| 57 |
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/* 10 UNUSED */ 0000000000000000 // Delayed by 0
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| 58 |
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/* 11 UNUSED */ 0000000000000000 // Delayed by 0
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| 59 |
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/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000000 // Delayed by 1
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| 60 |
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/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000100000000000 // Delayed by 1
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| 61 |
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/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000000001000 // Delayed by 1
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| 62 |
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/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000000 // Delayed by 1
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| 63 |
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/* 16 UNUSED */ 0000000000000000 // Delayed by 0
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| 64 |
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/* 17 CTRL_REPEAT4 */ 0000000000000000 // Delayed by 1
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| 65 |
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/* 18 CTRL_DFI_WRDATA_EN */ 0000100000000000 // Delayed by 2
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| 66 |
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/* 19 CTRL_DFI_RDDATA_EN */ 0000000000000000 // Delayed by 2
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| 67 |
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/* 20 CTRL_DFI_RAS_N_1 */ 1111111111111111 // Delayed by 2
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| 68 |
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/* 21 CTRL_DFI_CAS_N_1 */ 1111011111111111 // Delayed by 2
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| 69 |
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/* 22 CTRL_DFI_WE_N_1 */ 1111011111111111 // Delayed by 2
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| 70 |
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/* 23 CTRL_AP_OTF_ADDR12 */ 0000000000000000 // Delayed by 1
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| 71 |
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/* 24 UNUSED */ 0000000000000000 // Delayed by 0
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| 72 |
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/* 25 UNUSED */ 0000000000000000 // Delayed by 0
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| 73 |
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/* 26 UNUSED */ 0000000000000000 // Delayed by 0
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| 74 |
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/* 27 UNUSED */ 0000000000000000 // Delayed by 0
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| 75 |
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/* 28 UNUSED */ 0000000000000000 // Delayed by 0
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| 76 |
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/* 29 UNUSED */ 0000000000000000 // Delayed by 0
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| 77 |
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/* 30 UNUSED */ 0000000000000000 // Delayed by 0
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| 78 |
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/* 31 UNUSED */ 0000000000000000 // Delayed by 0
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| 79 |
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/* 32 UNUSED */ 0000000000000000 // Delayed by 0
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| 80 |
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/* 33 UNUSED */ 0000000000000000 // Delayed by 0
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| 81 |
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/* 34 UNUSED */ 0000000000000000 // Delayed by 0
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| 82 |
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/* 35 UNUSED */ 0000000000000000 // Delayed by 0
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| 83 |
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//--------------------------------------------------------------------------
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| 84 |
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//
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| 85 |
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// FSM PATTERN 1: WORD READ
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| 86 |
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//
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| 87 |
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// Control Signals 0 0
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| 88 |
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1 1
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| 89 |
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// (32 Signals) 0123456789ab
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| 90 |
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// --------------- -------------------------------- ------------------------------
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| 91 |
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/* 0 CTRL_COMPLETE */ 000000100000 // Delayed by 1
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| 92 |
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/* 1 CTRL_IS_WRITE */ 000000000000 // Delayed by 1
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| 93 |
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/* 2 CTRL_DFI_RAS_N_0 */ 101111111111 // Delayed by 2
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| 94 |
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/* 3 CTRL_DFI_CAS_N_0 */ 111111111111 // Delayed by 2
|
| 95 |
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/* 4 CTRL_DFI_WE_N_0 */ 111111111111 // Delayed by 2
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| 96 |
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/* 5 UNUSED */ 000000000000 // Delayed by 0
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| 97 |
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/* 6 UNUSED */ 000000000000 // Delayed by 0
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| 98 |
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/* 7 UNUSED */ 000000000000 // Delayed by 0
|
| 99 |
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/* 8 CTRL_DP_WRFIFO_POP */ 000000000000 // Delayed by 1
|
| 100 |
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/* 9 UNUSED */ 000000000000 // Delayed by 0
|
| 101 |
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/* 10 UNUSED */ 000000000000 // Delayed by 0
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| 102 |
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/* 11 UNUSED */ 000000000000 // Delayed by 0
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| 103 |
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/* 12 CTRL_AP_COL_CNT_LOAD */ 000100000000 // Delayed by 1
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| 104 |
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/* 13 CTRL_AP_COL_CNT_ENABLE */ 000010000000 // Delayed by 1
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| 105 |
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/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000001000 // Delayed by 1
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| 106 |
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/* 15 CTRL_AP_ROW_COL_SEL */ 010000000000 // Delayed by 1
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| 107 |
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/* 16 UNUSED */ 000000000000 // Delayed by 0
|
| 108 |
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/* 17 CTRL_REPEAT4 */ 000000000000 // Delayed by 1
|
| 109 |
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/* 18 CTRL_DFI_WRDATA_EN */ 000000000000 // Delayed by 2
|
| 110 |
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/* 19 CTRL_DFI_RDDATA_EN */ 000010000000 // Delayed by 2
|
| 111 |
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/* 20 CTRL_DFI_RAS_N_1 */ 111111110111 // Delayed by 2
|
| 112 |
|
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/* 21 CTRL_DFI_CAS_N_1 */ 111101111111 // Delayed by 2
|
| 113 |
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/* 22 CTRL_DFI_WE_N_1 */ 111111110111 // Delayed by 2
|
| 114 |
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/* 23 CTRL_AP_OTF_ADDR12 */ 000000000000 // Delayed by 1
|
| 115 |
|
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/* 24 UNUSED */ 000000000000 // Delayed by 0
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| 116 |
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/* 25 UNUSED */ 000000000000 // Delayed by 0
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| 117 |
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/* 26 UNUSED */ 000000000000 // Delayed by 0
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| 118 |
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/* 27 UNUSED */ 000000000000 // Delayed by 0
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| 119 |
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/* 28 UNUSED */ 000000000000 // Delayed by 0
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| 120 |
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/* 29 UNUSED */ 000000000000 // Delayed by 0
|
| 121 |
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/* 30 UNUSED */ 000000000000 // Delayed by 0
|
| 122 |
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/* 31 UNUSED */ 000000000000 // Delayed by 0
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| 123 |
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/* 32 UNUSED */ 000000000000 // Delayed by 0
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| 124 |
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/* 33 UNUSED */ 000000000000 // Delayed by 0
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| 125 |
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/* 34 UNUSED */ 000000000000 // Delayed by 0
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| 126 |
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/* 35 UNUSED */ 000000000000 // Delayed by 0
|
| 127 |
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//--------------------------------------------------------------------------
|
| 128 |
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//
|
| 129 |
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// FSM PATTERN 2: DOUBLE WORD WRITE
|
| 130 |
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//
|
| 131 |
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// Control Signals 0 0
|
| 132 |
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1 2 2
|
| 133 |
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// (32 Signals) cdef0123456789ab
|
| 134 |
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// --------------- -------------------------------- ------------------------------
|
| 135 |
|
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/* 0 CTRL_COMPLETE */ 0000000000100000 // Delayed by 1
|
| 136 |
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/* 1 CTRL_IS_WRITE */ 1111111111111111 // Delayed by 1
|
| 137 |
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/* 2 CTRL_DFI_RAS_N_0 */ 1011111111110111 // Delayed by 2
|
| 138 |
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/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111111 // Delayed by 2
|
| 139 |
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/* 4 CTRL_DFI_WE_N_0 */ 1111111111110111 // Delayed by 2
|
| 140 |
|
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/* 5 UNUSED */ 0000000000000000 // Delayed by 0
|
| 141 |
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/* 6 UNUSED */ 0000000000000000 // Delayed by 0
|
| 142 |
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/* 7 UNUSED */ 0000000000000000 // Delayed by 0
|
| 143 |
|
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/* 8 CTRL_DP_WRFIFO_POP */ 0010000000000000 // Delayed by 1
|
| 144 |
|
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/* 9 UNUSED */ 0000000000000000 // Delayed by 0
|
| 145 |
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/* 10 UNUSED */ 0000000000000000 // Delayed by 0
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| 146 |
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/* 11 UNUSED */ 0000000000000000 // Delayed by 0
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| 147 |
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/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000000 // Delayed by 1
|
| 148 |
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/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000100000000000 // Delayed by 1
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| 149 |
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/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000000001000 // Delayed by 1
|
| 150 |
|
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/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000000 // Delayed by 1
|
| 151 |
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/* 16 UNUSED */ 0000000000000000 // Delayed by 0
|
| 152 |
|
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/* 17 CTRL_REPEAT4 */ 0000000000000000 // Delayed by 1
|
| 153 |
|
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/* 18 CTRL_DFI_WRDATA_EN */ 0000100000000000 // Delayed by 2
|
| 154 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0000000000000000 // Delayed by 2
|
| 155 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1111111111111111 // Delayed by 2
|
| 156 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1111011111111111 // Delayed by 2
|
| 157 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1111011111111111 // Delayed by 2
|
| 158 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0000000000000000 // Delayed by 1
|
| 159 |
|
|
/* 24 UNUSED */ 0000000000000000 // Delayed by 0
|
| 160 |
|
|
/* 25 UNUSED */ 0000000000000000 // Delayed by 0
|
| 161 |
|
|
/* 26 UNUSED */ 0000000000000000 // Delayed by 0
|
| 162 |
|
|
/* 27 UNUSED */ 0000000000000000 // Delayed by 0
|
| 163 |
|
|
/* 28 UNUSED */ 0000000000000000 // Delayed by 0
|
| 164 |
|
|
/* 29 UNUSED */ 0000000000000000 // Delayed by 0
|
| 165 |
|
|
/* 30 UNUSED */ 0000000000000000 // Delayed by 0
|
| 166 |
|
|
/* 31 UNUSED */ 0000000000000000 // Delayed by 0
|
| 167 |
|
|
/* 32 UNUSED */ 0000000000000000 // Delayed by 0
|
| 168 |
|
|
/* 33 UNUSED */ 0000000000000000 // Delayed by 0
|
| 169 |
|
|
/* 34 UNUSED */ 0000000000000000 // Delayed by 0
|
| 170 |
|
|
/* 35 UNUSED */ 0000000000000000 // Delayed by 0
|
| 171 |
|
|
//--------------------------------------------------------------------------
|
| 172 |
|
|
//
|
| 173 |
|
|
// FSM PATTERN 3: DOUBLE WORD READ
|
| 174 |
|
|
//
|
| 175 |
|
|
// Control Signals 0 0
|
| 176 |
|
|
2 3 3
|
| 177 |
|
|
// (32 Signals) cdef01234567
|
| 178 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 179 |
|
|
/* 0 CTRL_COMPLETE */ 000000100000 // Delayed by 1
|
| 180 |
|
|
/* 1 CTRL_IS_WRITE */ 000000000000 // Delayed by 1
|
| 181 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 101111111111 // Delayed by 2
|
| 182 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 111111111111 // Delayed by 2
|
| 183 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 111111111111 // Delayed by 2
|
| 184 |
|
|
/* 5 UNUSED */ 000000000000 // Delayed by 0
|
| 185 |
|
|
/* 6 UNUSED */ 000000000000 // Delayed by 0
|
| 186 |
|
|
/* 7 UNUSED */ 000000000000 // Delayed by 0
|
| 187 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 000000000000 // Delayed by 1
|
| 188 |
|
|
/* 9 UNUSED */ 000000000000 // Delayed by 0
|
| 189 |
|
|
/* 10 UNUSED */ 000000000000 // Delayed by 0
|
| 190 |
|
|
/* 11 UNUSED */ 000000000000 // Delayed by 0
|
| 191 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 000100000000 // Delayed by 1
|
| 192 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 000010000000 // Delayed by 1
|
| 193 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000001000 // Delayed by 1
|
| 194 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 010000000000 // Delayed by 1
|
| 195 |
|
|
/* 16 UNUSED */ 000000000000 // Delayed by 0
|
| 196 |
|
|
/* 17 CTRL_REPEAT4 */ 000000000000 // Delayed by 1
|
| 197 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 000000000000 // Delayed by 2
|
| 198 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 000010000000 // Delayed by 2
|
| 199 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 111111110111 // Delayed by 2
|
| 200 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 111101111111 // Delayed by 2
|
| 201 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 111111110111 // Delayed by 2
|
| 202 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 000000000000 // Delayed by 1
|
| 203 |
|
|
/* 24 UNUSED */ 000000000000 // Delayed by 0
|
| 204 |
|
|
/* 25 UNUSED */ 000000000000 // Delayed by 0
|
| 205 |
|
|
/* 26 UNUSED */ 000000000000 // Delayed by 0
|
| 206 |
|
|
/* 27 UNUSED */ 000000000000 // Delayed by 0
|
| 207 |
|
|
/* 28 UNUSED */ 000000000000 // Delayed by 0
|
| 208 |
|
|
/* 29 UNUSED */ 000000000000 // Delayed by 0
|
| 209 |
|
|
/* 30 UNUSED */ 000000000000 // Delayed by 0
|
| 210 |
|
|
/* 31 UNUSED */ 000000000000 // Delayed by 0
|
| 211 |
|
|
/* 32 UNUSED */ 000000000000 // Delayed by 0
|
| 212 |
|
|
/* 33 UNUSED */ 000000000000 // Delayed by 0
|
| 213 |
|
|
/* 34 UNUSED */ 000000000000 // Delayed by 0
|
| 214 |
|
|
/* 35 UNUSED */ 000000000000 // Delayed by 0
|
| 215 |
|
|
//--------------------------------------------------------------------------
|
| 216 |
|
|
//
|
| 217 |
|
|
// FSM PATTERN 4: CACHELINE 4 WRITE
|
| 218 |
|
|
//
|
| 219 |
|
|
// Control Signals 0 0
|
| 220 |
|
|
3 4 4
|
| 221 |
|
|
// (32 Signals) 89abcdef01234567
|
| 222 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 223 |
|
|
/* 0 CTRL_COMPLETE */ 0000000000100000 // Delayed by 1
|
| 224 |
|
|
/* 1 CTRL_IS_WRITE */ 1111111111111111 // Delayed by 1
|
| 225 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 1011111111110111 // Delayed by 2
|
| 226 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111111 // Delayed by 2
|
| 227 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 1111111111110111 // Delayed by 2
|
| 228 |
|
|
/* 5 UNUSED */ 0000000000000000 // Delayed by 0
|
| 229 |
|
|
/* 6 UNUSED */ 0000000000000000 // Delayed by 0
|
| 230 |
|
|
/* 7 UNUSED */ 0000000000000000 // Delayed by 0
|
| 231 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 0010000000000000 // Delayed by 1
|
| 232 |
|
|
/* 9 UNUSED */ 0000000000000000 // Delayed by 0
|
| 233 |
|
|
/* 10 UNUSED */ 0000000000000000 // Delayed by 0
|
| 234 |
|
|
/* 11 UNUSED */ 0000000000000000 // Delayed by 0
|
| 235 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000000 // Delayed by 1
|
| 236 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000110000000000 // Delayed by 1
|
| 237 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000000001000 // Delayed by 1
|
| 238 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000000 // Delayed by 1
|
| 239 |
|
|
/* 16 UNUSED */ 0000000000000000 // Delayed by 0
|
| 240 |
|
|
/* 17 CTRL_REPEAT4 */ 0000000000000000 // Delayed by 1
|
| 241 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 0000100000000000 // Delayed by 2
|
| 242 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0000000000000000 // Delayed by 2
|
| 243 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1111111111111111 // Delayed by 2
|
| 244 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1111011111111111 // Delayed by 2
|
| 245 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1111011111111111 // Delayed by 2
|
| 246 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0000000000000000 // Delayed by 1
|
| 247 |
|
|
/* 24 UNUSED */ 0000000000000000 // Delayed by 0
|
| 248 |
|
|
/* 25 UNUSED */ 0000000000000000 // Delayed by 0
|
| 249 |
|
|
/* 26 UNUSED */ 0000000000000000 // Delayed by 0
|
| 250 |
|
|
/* 27 UNUSED */ 0000000000000000 // Delayed by 0
|
| 251 |
|
|
/* 28 UNUSED */ 0000000000000000 // Delayed by 0
|
| 252 |
|
|
/* 29 UNUSED */ 0000000000000000 // Delayed by 0
|
| 253 |
|
|
/* 30 UNUSED */ 0000000000000000 // Delayed by 0
|
| 254 |
|
|
/* 31 UNUSED */ 0000000000000000 // Delayed by 0
|
| 255 |
|
|
/* 32 UNUSED */ 0000000000000000 // Delayed by 0
|
| 256 |
|
|
/* 33 UNUSED */ 0000000000000000 // Delayed by 0
|
| 257 |
|
|
/* 34 UNUSED */ 0000000000000000 // Delayed by 0
|
| 258 |
|
|
/* 35 UNUSED */ 0000000000000000 // Delayed by 0
|
| 259 |
|
|
//--------------------------------------------------------------------------
|
| 260 |
|
|
//
|
| 261 |
|
|
// FSM PATTERN 5: CACHELINE 4 READ
|
| 262 |
|
|
//
|
| 263 |
|
|
// Control Signals 0 0
|
| 264 |
|
|
4 5 5
|
| 265 |
|
|
// (32 Signals) 89abcdef0123
|
| 266 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 267 |
|
|
/* 0 CTRL_COMPLETE */ 000000100000 // Delayed by 1
|
| 268 |
|
|
/* 1 CTRL_IS_WRITE */ 000000000000 // Delayed by 1
|
| 269 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 101111111111 // Delayed by 2
|
| 270 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 111111111111 // Delayed by 2
|
| 271 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 111111111111 // Delayed by 2
|
| 272 |
|
|
/* 5 UNUSED */ 000000000000 // Delayed by 0
|
| 273 |
|
|
/* 6 UNUSED */ 000000000000 // Delayed by 0
|
| 274 |
|
|
/* 7 UNUSED */ 000000000000 // Delayed by 0
|
| 275 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 000000000000 // Delayed by 1
|
| 276 |
|
|
/* 9 UNUSED */ 000000000000 // Delayed by 0
|
| 277 |
|
|
/* 10 UNUSED */ 000000000000 // Delayed by 0
|
| 278 |
|
|
/* 11 UNUSED */ 000000000000 // Delayed by 0
|
| 279 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 000100000000 // Delayed by 1
|
| 280 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 000010000000 // Delayed by 1
|
| 281 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000001000 // Delayed by 1
|
| 282 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 010000000000 // Delayed by 1
|
| 283 |
|
|
/* 16 UNUSED */ 000000000000 // Delayed by 0
|
| 284 |
|
|
/* 17 CTRL_REPEAT4 */ 000000000000 // Delayed by 1
|
| 285 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 000000000000 // Delayed by 2
|
| 286 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 000010000000 // Delayed by 2
|
| 287 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 111111110111 // Delayed by 2
|
| 288 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 111101111111 // Delayed by 2
|
| 289 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 111111110111 // Delayed by 2
|
| 290 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 000000000000 // Delayed by 1
|
| 291 |
|
|
/* 24 UNUSED */ 000000000000 // Delayed by 0
|
| 292 |
|
|
/* 25 UNUSED */ 000000000000 // Delayed by 0
|
| 293 |
|
|
/* 26 UNUSED */ 000000000000 // Delayed by 0
|
| 294 |
|
|
/* 27 UNUSED */ 000000000000 // Delayed by 0
|
| 295 |
|
|
/* 28 UNUSED */ 000000000000 // Delayed by 0
|
| 296 |
|
|
/* 29 UNUSED */ 000000000000 // Delayed by 0
|
| 297 |
|
|
/* 30 UNUSED */ 000000000000 // Delayed by 0
|
| 298 |
|
|
/* 31 UNUSED */ 000000000000 // Delayed by 0
|
| 299 |
|
|
/* 32 UNUSED */ 000000000000 // Delayed by 0
|
| 300 |
|
|
/* 33 UNUSED */ 000000000000 // Delayed by 0
|
| 301 |
|
|
/* 34 UNUSED */ 000000000000 // Delayed by 0
|
| 302 |
|
|
/* 35 UNUSED */ 000000000000 // Delayed by 0
|
| 303 |
|
|
//--------------------------------------------------------------------------
|
| 304 |
|
|
//
|
| 305 |
|
|
// FSM PATTERN 6: CACHELINE 8 WRITE
|
| 306 |
|
|
//
|
| 307 |
|
|
// Control Signals 0 0
|
| 308 |
|
|
5 6 6
|
| 309 |
|
|
// (32 Signals) 456789abcdef0123
|
| 310 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 311 |
|
|
/* 0 CTRL_COMPLETE */ 0000000000100000 // Delayed by 1
|
| 312 |
|
|
/* 1 CTRL_IS_WRITE */ 1111111111111111 // Delayed by 1
|
| 313 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 1011111111110111 // Delayed by 2
|
| 314 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111111 // Delayed by 2
|
| 315 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 1111111111110111 // Delayed by 2
|
| 316 |
|
|
/* 5 UNUSED */ 0000000000000000 // Delayed by 0
|
| 317 |
|
|
/* 6 UNUSED */ 0000000000000000 // Delayed by 0
|
| 318 |
|
|
/* 7 UNUSED */ 0000000000000000 // Delayed by 0
|
| 319 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 0011000000000000 // Delayed by 1
|
| 320 |
|
|
/* 9 UNUSED */ 0000000000000000 // Delayed by 0
|
| 321 |
|
|
/* 10 UNUSED */ 0000000000000000 // Delayed by 0
|
| 322 |
|
|
/* 11 UNUSED */ 0000000000000000 // Delayed by 0
|
| 323 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000000 // Delayed by 1
|
| 324 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000101000000000 // Delayed by 1
|
| 325 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000000001000 // Delayed by 1
|
| 326 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000000 // Delayed by 1
|
| 327 |
|
|
/* 16 UNUSED */ 0000000000000000 // Delayed by 0
|
| 328 |
|
|
/* 17 CTRL_REPEAT4 */ 0000000000000000 // Delayed by 1
|
| 329 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 0000110000000000 // Delayed by 2
|
| 330 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0000000000000000 // Delayed by 2
|
| 331 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1111111111111111 // Delayed by 2
|
| 332 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1111011111111111 // Delayed by 2
|
| 333 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1111011111111111 // Delayed by 2
|
| 334 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0000100000000000 // Delayed by 1
|
| 335 |
|
|
/* 24 UNUSED */ 0000000000000000 // Delayed by 0
|
| 336 |
|
|
/* 25 UNUSED */ 0000000000000000 // Delayed by 0
|
| 337 |
|
|
/* 26 UNUSED */ 0000000000000000 // Delayed by 0
|
| 338 |
|
|
/* 27 UNUSED */ 0000000000000000 // Delayed by 0
|
| 339 |
|
|
/* 28 UNUSED */ 0000000000000000 // Delayed by 0
|
| 340 |
|
|
/* 29 UNUSED */ 0000000000000000 // Delayed by 0
|
| 341 |
|
|
/* 30 UNUSED */ 0000000000000000 // Delayed by 0
|
| 342 |
|
|
/* 31 UNUSED */ 0000000000000000 // Delayed by 0
|
| 343 |
|
|
/* 32 UNUSED */ 0000000000000000 // Delayed by 0
|
| 344 |
|
|
/* 33 UNUSED */ 0000000000000000 // Delayed by 0
|
| 345 |
|
|
/* 34 UNUSED */ 0000000000000000 // Delayed by 0
|
| 346 |
|
|
/* 35 UNUSED */ 0000000000000000 // Delayed by 0
|
| 347 |
|
|
//--------------------------------------------------------------------------
|
| 348 |
|
|
//
|
| 349 |
|
|
// FSM PATTERN 7: CACHELINE 8 READ
|
| 350 |
|
|
//
|
| 351 |
|
|
// Control Signals 0 0
|
| 352 |
|
|
6 6
|
| 353 |
|
|
// (32 Signals) 456789abcdef
|
| 354 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 355 |
|
|
/* 0 CTRL_COMPLETE */ 000000100000 // Delayed by 1
|
| 356 |
|
|
/* 1 CTRL_IS_WRITE */ 000000000000 // Delayed by 1
|
| 357 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 101111111111 // Delayed by 2
|
| 358 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 111111111111 // Delayed by 2
|
| 359 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 111111111111 // Delayed by 2
|
| 360 |
|
|
/* 5 UNUSED */ 000000000000 // Delayed by 0
|
| 361 |
|
|
/* 6 UNUSED */ 000000000000 // Delayed by 0
|
| 362 |
|
|
/* 7 UNUSED */ 000000000000 // Delayed by 0
|
| 363 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 000000000000 // Delayed by 1
|
| 364 |
|
|
/* 9 UNUSED */ 000000000000 // Delayed by 0
|
| 365 |
|
|
/* 10 UNUSED */ 000000000000 // Delayed by 0
|
| 366 |
|
|
/* 11 UNUSED */ 000000000000 // Delayed by 0
|
| 367 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 000100000000 // Delayed by 1
|
| 368 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 000010000000 // Delayed by 1
|
| 369 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000001000 // Delayed by 1
|
| 370 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 010000000000 // Delayed by 1
|
| 371 |
|
|
/* 16 UNUSED */ 000000000000 // Delayed by 0
|
| 372 |
|
|
/* 17 CTRL_REPEAT4 */ 000000000000 // Delayed by 1
|
| 373 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 000000000000 // Delayed by 2
|
| 374 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 000011000000 // Delayed by 2
|
| 375 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 111111110111 // Delayed by 2
|
| 376 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 111101111111 // Delayed by 2
|
| 377 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 111111110111 // Delayed by 2
|
| 378 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 000010000000 // Delayed by 1
|
| 379 |
|
|
/* 24 UNUSED */ 000000000000 // Delayed by 0
|
| 380 |
|
|
/* 25 UNUSED */ 000000000000 // Delayed by 0
|
| 381 |
|
|
/* 26 UNUSED */ 000000000000 // Delayed by 0
|
| 382 |
|
|
/* 27 UNUSED */ 000000000000 // Delayed by 0
|
| 383 |
|
|
/* 28 UNUSED */ 000000000000 // Delayed by 0
|
| 384 |
|
|
/* 29 UNUSED */ 000000000000 // Delayed by 0
|
| 385 |
|
|
/* 30 UNUSED */ 000000000000 // Delayed by 0
|
| 386 |
|
|
/* 31 UNUSED */ 000000000000 // Delayed by 0
|
| 387 |
|
|
/* 32 UNUSED */ 000000000000 // Delayed by 0
|
| 388 |
|
|
/* 33 UNUSED */ 000000000000 // Delayed by 0
|
| 389 |
|
|
/* 34 UNUSED */ 000000000000 // Delayed by 0
|
| 390 |
|
|
/* 35 UNUSED */ 000000000000 // Delayed by 0
|
| 391 |
|
|
//--------------------------------------------------------------------------
|
| 392 |
|
|
//
|
| 393 |
|
|
// FSM PATTERN 8: BURST 16 WRITE
|
| 394 |
|
|
//
|
| 395 |
|
|
// Control Signals 0 0
|
| 396 |
|
|
7 88
|
| 397 |
|
|
// (32 Signals) 0123456789abcdef01
|
| 398 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 399 |
|
|
/* 0 CTRL_COMPLETE */ 000000000000100000 // Delayed by 1
|
| 400 |
|
|
/* 1 CTRL_IS_WRITE */ 111111111111111111 // Delayed by 1
|
| 401 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 101111111111110111 // Delayed by 2
|
| 402 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 111111111111111111 // Delayed by 2
|
| 403 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 111111111111110111 // Delayed by 2
|
| 404 |
|
|
/* 5 UNUSED */ 000000000000000000 // Delayed by 0
|
| 405 |
|
|
/* 6 UNUSED */ 000000000000000000 // Delayed by 0
|
| 406 |
|
|
/* 7 UNUSED */ 000000000000000000 // Delayed by 0
|
| 407 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 001111000000000000 // Delayed by 1
|
| 408 |
|
|
/* 9 UNUSED */ 000000000000000000 // Delayed by 0
|
| 409 |
|
|
/* 10 UNUSED */ 000000000000000000 // Delayed by 0
|
| 410 |
|
|
/* 11 UNUSED */ 000000000000000000 // Delayed by 0
|
| 411 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 000100000000000000 // Delayed by 1
|
| 412 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 000010101000000000 // Delayed by 1
|
| 413 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000000000001000 // Delayed by 1
|
| 414 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 010000000000000000 // Delayed by 1
|
| 415 |
|
|
/* 16 UNUSED */ 000000000000000000 // Delayed by 0
|
| 416 |
|
|
/* 17 CTRL_REPEAT4 */ 000000000000000000 // Delayed by 1
|
| 417 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 000011110000000000 // Delayed by 2
|
| 418 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 000000000000000000 // Delayed by 2
|
| 419 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 111111111111111111 // Delayed by 2
|
| 420 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 111101011111111111 // Delayed by 2
|
| 421 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 111101011111111111 // Delayed by 2
|
| 422 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 000010100000000000 // Delayed by 1
|
| 423 |
|
|
/* 24 UNUSED */ 000000000000000000 // Delayed by 0
|
| 424 |
|
|
/* 25 UNUSED */ 000000000000000000 // Delayed by 0
|
| 425 |
|
|
/* 26 UNUSED */ 000000000000000000 // Delayed by 0
|
| 426 |
|
|
/* 27 UNUSED */ 000000000000000000 // Delayed by 0
|
| 427 |
|
|
/* 28 UNUSED */ 000000000000000000 // Delayed by 0
|
| 428 |
|
|
/* 29 UNUSED */ 000000000000000000 // Delayed by 0
|
| 429 |
|
|
/* 30 UNUSED */ 000000000000000000 // Delayed by 0
|
| 430 |
|
|
/* 31 UNUSED */ 000000000000000000 // Delayed by 0
|
| 431 |
|
|
/* 32 UNUSED */ 000000000000000000 // Delayed by 0
|
| 432 |
|
|
/* 33 UNUSED */ 000000000000000000 // Delayed by 0
|
| 433 |
|
|
/* 34 UNUSED */ 000000000000000000 // Delayed by 0
|
| 434 |
|
|
/* 35 UNUSED */ 000000000000000000 // Delayed by 0
|
| 435 |
|
|
//--------------------------------------------------------------------------
|
| 436 |
|
|
//
|
| 437 |
|
|
// FSM PATTERN 9: BURST 16 READ
|
| 438 |
|
|
//
|
| 439 |
|
|
// Control Signals 0 0
|
| 440 |
|
|
8 8
|
| 441 |
|
|
// (32 Signals) 23456789abcde
|
| 442 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 443 |
|
|
/* 0 CTRL_COMPLETE */ 0000000100000 // Delayed by 1
|
| 444 |
|
|
/* 1 CTRL_IS_WRITE */ 0000000000000 // Delayed by 1
|
| 445 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 1011111111111 // Delayed by 2
|
| 446 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111 // Delayed by 2
|
| 447 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 1111111111111 // Delayed by 2
|
| 448 |
|
|
/* 5 UNUSED */ 0000000000000 // Delayed by 0
|
| 449 |
|
|
/* 6 UNUSED */ 0000000000000 // Delayed by 0
|
| 450 |
|
|
/* 7 UNUSED */ 0000000000000 // Delayed by 0
|
| 451 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 0000000000000 // Delayed by 1
|
| 452 |
|
|
/* 9 UNUSED */ 0000000000000 // Delayed by 0
|
| 453 |
|
|
/* 10 UNUSED */ 0000000000000 // Delayed by 0
|
| 454 |
|
|
/* 11 UNUSED */ 0000000000000 // Delayed by 0
|
| 455 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000 // Delayed by 1
|
| 456 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000101000000 // Delayed by 1
|
| 457 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000010000 // Delayed by 1
|
| 458 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000 // Delayed by 1
|
| 459 |
|
|
/* 16 UNUSED */ 0000000000000 // Delayed by 0
|
| 460 |
|
|
/* 17 CTRL_REPEAT4 */ 0000000000000 // Delayed by 1
|
| 461 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 0000000000000 // Delayed by 2
|
| 462 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0000111100000 // Delayed by 2
|
| 463 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1111111101111 // Delayed by 2
|
| 464 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1111010111111 // Delayed by 2
|
| 465 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1111111101111 // Delayed by 2
|
| 466 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0000101000000 // Delayed by 1
|
| 467 |
|
|
/* 24 UNUSED */ 0000000000000 // Delayed by 0
|
| 468 |
|
|
/* 25 UNUSED */ 0000000000000 // Delayed by 0
|
| 469 |
|
|
/* 26 UNUSED */ 0000000000000 // Delayed by 0
|
| 470 |
|
|
/* 27 UNUSED */ 0000000000000 // Delayed by 0
|
| 471 |
|
|
/* 28 UNUSED */ 0000000000000 // Delayed by 0
|
| 472 |
|
|
/* 29 UNUSED */ 0000000000000 // Delayed by 0
|
| 473 |
|
|
/* 30 UNUSED */ 0000000000000 // Delayed by 0
|
| 474 |
|
|
/* 31 UNUSED */ 0000000000000 // Delayed by 0
|
| 475 |
|
|
/* 32 UNUSED */ 0000000000000 // Delayed by 0
|
| 476 |
|
|
/* 33 UNUSED */ 0000000000000 // Delayed by 0
|
| 477 |
|
|
/* 34 UNUSED */ 0000000000000 // Delayed by 0
|
| 478 |
|
|
/* 35 UNUSED */ 0000000000000 // Delayed by 0
|
| 479 |
|
|
//--------------------------------------------------------------------------
|
| 480 |
|
|
//
|
| 481 |
|
|
// FSM PATTERN 10: BURST 32 WRITE
|
| 482 |
|
|
//
|
| 483 |
|
|
// Control Signals 0 0
|
| 484 |
|
|
89 a a
|
| 485 |
|
|
// (32 Signals) f0123456789abcdef01234
|
| 486 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 487 |
|
|
/* 0 CTRL_COMPLETE */ 0000000000000000100000 // Delayed by 1
|
| 488 |
|
|
/* 1 CTRL_IS_WRITE */ 1111111111111111111111 // Delayed by 1
|
| 489 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 1011111111111111110111 // Delayed by 2
|
| 490 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111111111111 // Delayed by 2
|
| 491 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 1111111111111111110111 // Delayed by 2
|
| 492 |
|
|
/* 5 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 493 |
|
|
/* 6 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 494 |
|
|
/* 7 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 495 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 0011111111000000000000 // Delayed by 1
|
| 496 |
|
|
/* 9 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 497 |
|
|
/* 10 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 498 |
|
|
/* 11 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 499 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000000000000 // Delayed by 1
|
| 500 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000101010101000000000 // Delayed by 1
|
| 501 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000000000000001000 // Delayed by 1
|
| 502 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000000000000 // Delayed by 1
|
| 503 |
|
|
/* 16 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 504 |
|
|
/* 17 CTRL_REPEAT4 */ 0000000000000000000000 // Delayed by 1
|
| 505 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 0000111111110000000000 // Delayed by 2
|
| 506 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0000000000000000000000 // Delayed by 2
|
| 507 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1111111111111111111111 // Delayed by 2
|
| 508 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1111010101011111111111 // Delayed by 2
|
| 509 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1111010101011111111111 // Delayed by 2
|
| 510 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0000101010100000000000 // Delayed by 1
|
| 511 |
|
|
/* 24 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 512 |
|
|
/* 25 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 513 |
|
|
/* 26 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 514 |
|
|
/* 27 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 515 |
|
|
/* 28 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 516 |
|
|
/* 29 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 517 |
|
|
/* 30 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 518 |
|
|
/* 31 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 519 |
|
|
/* 32 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 520 |
|
|
/* 33 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 521 |
|
|
/* 34 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 522 |
|
|
/* 35 UNUSED */ 0000000000000000000000 // Delayed by 0
|
| 523 |
|
|
//--------------------------------------------------------------------------
|
| 524 |
|
|
//
|
| 525 |
|
|
// FSM PATTERN 11: BURST 32 READ
|
| 526 |
|
|
//
|
| 527 |
|
|
// Control Signals 0 0
|
| 528 |
|
|
a b b
|
| 529 |
|
|
// (32 Signals) 56789abcdef012345
|
| 530 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 531 |
|
|
/* 0 CTRL_COMPLETE */ 00000000000100000 // Delayed by 1
|
| 532 |
|
|
/* 1 CTRL_IS_WRITE */ 00000000000000000 // Delayed by 1
|
| 533 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 10111111111111111 // Delayed by 2
|
| 534 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 11111111111111111 // Delayed by 2
|
| 535 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 11111111111111111 // Delayed by 2
|
| 536 |
|
|
/* 5 UNUSED */ 00000000000000000 // Delayed by 0
|
| 537 |
|
|
/* 6 UNUSED */ 00000000000000000 // Delayed by 0
|
| 538 |
|
|
/* 7 UNUSED */ 00000000000000000 // Delayed by 0
|
| 539 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 00000000000000000 // Delayed by 1
|
| 540 |
|
|
/* 9 UNUSED */ 00000000000000000 // Delayed by 0
|
| 541 |
|
|
/* 10 UNUSED */ 00000000000000000 // Delayed by 0
|
| 542 |
|
|
/* 11 UNUSED */ 00000000000000000 // Delayed by 0
|
| 543 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 00010000000000000 // Delayed by 1
|
| 544 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 00001010101000000 // Delayed by 1
|
| 545 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 00000000000010000 // Delayed by 1
|
| 546 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 01000000000000000 // Delayed by 1
|
| 547 |
|
|
/* 16 UNUSED */ 00000000000000000 // Delayed by 0
|
| 548 |
|
|
/* 17 CTRL_REPEAT4 */ 00000000000000000 // Delayed by 1
|
| 549 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 00000000000000000 // Delayed by 2
|
| 550 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 00001111111100000 // Delayed by 2
|
| 551 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 11111111111101111 // Delayed by 2
|
| 552 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 11110101010111111 // Delayed by 2
|
| 553 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 11111111111101111 // Delayed by 2
|
| 554 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 00001010101000000 // Delayed by 1
|
| 555 |
|
|
/* 24 UNUSED */ 00000000000000000 // Delayed by 0
|
| 556 |
|
|
/* 25 UNUSED */ 00000000000000000 // Delayed by 0
|
| 557 |
|
|
/* 26 UNUSED */ 00000000000000000 // Delayed by 0
|
| 558 |
|
|
/* 27 UNUSED */ 00000000000000000 // Delayed by 0
|
| 559 |
|
|
/* 28 UNUSED */ 00000000000000000 // Delayed by 0
|
| 560 |
|
|
/* 29 UNUSED */ 00000000000000000 // Delayed by 0
|
| 561 |
|
|
/* 30 UNUSED */ 00000000000000000 // Delayed by 0
|
| 562 |
|
|
/* 31 UNUSED */ 00000000000000000 // Delayed by 0
|
| 563 |
|
|
/* 32 UNUSED */ 00000000000000000 // Delayed by 0
|
| 564 |
|
|
/* 33 UNUSED */ 00000000000000000 // Delayed by 0
|
| 565 |
|
|
/* 34 UNUSED */ 00000000000000000 // Delayed by 0
|
| 566 |
|
|
/* 35 UNUSED */ 00000000000000000 // Delayed by 0
|
| 567 |
|
|
//--------------------------------------------------------------------------
|
| 568 |
|
|
//
|
| 569 |
|
|
// FSM PATTERN 12: BURST 64 WRITE
|
| 570 |
|
|
//
|
| 571 |
|
|
// Control Signals 0 0
|
| 572 |
|
|
b c d d
|
| 573 |
|
|
// (32 Signals) 6789abcdef0123456789abcdef0123
|
| 574 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 575 |
|
|
/* 0 CTRL_COMPLETE */ 000000000000000000000000100000 // Delayed by 1
|
| 576 |
|
|
/* 1 CTRL_IS_WRITE */ 111111111111111111111111111111 // Delayed by 1
|
| 577 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 101111111111111111111111110111 // Delayed by 2
|
| 578 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 111111111111111111111111111111 // Delayed by 2
|
| 579 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 111111111111111111111111110111 // Delayed by 2
|
| 580 |
|
|
/* 5 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 581 |
|
|
/* 6 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 582 |
|
|
/* 7 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 583 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 001111111111111111000000000000 // Delayed by 1
|
| 584 |
|
|
/* 9 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 585 |
|
|
/* 10 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 586 |
|
|
/* 11 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 587 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 000100000000000000000000000000 // Delayed by 1
|
| 588 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 000010101010101010101000000000 // Delayed by 1
|
| 589 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000000000000000000000001000 // Delayed by 1
|
| 590 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 010000000000000000000000000000 // Delayed by 1
|
| 591 |
|
|
/* 16 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 592 |
|
|
/* 17 CTRL_REPEAT4 */ 000000000000000000000000000000 // Delayed by 1
|
| 593 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 000011111111111111110000000000 // Delayed by 2
|
| 594 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 000000000000000000000000000000 // Delayed by 2
|
| 595 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 111111111111111111111111111111 // Delayed by 2
|
| 596 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 111101010101010101011111111111 // Delayed by 2
|
| 597 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 111101010101010101011111111111 // Delayed by 2
|
| 598 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 000010101010101010100000000000 // Delayed by 1
|
| 599 |
|
|
/* 24 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 600 |
|
|
/* 25 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 601 |
|
|
/* 26 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 602 |
|
|
/* 27 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 603 |
|
|
/* 28 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 604 |
|
|
/* 29 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 605 |
|
|
/* 30 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 606 |
|
|
/* 31 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 607 |
|
|
/* 32 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 608 |
|
|
/* 33 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 609 |
|
|
/* 34 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 610 |
|
|
/* 35 UNUSED */ 000000000000000000000000000000 // Delayed by 0
|
| 611 |
|
|
//--------------------------------------------------------------------------
|
| 612 |
|
|
//
|
| 613 |
|
|
// FSM PATTERN 13: BURST 64 READ
|
| 614 |
|
|
//
|
| 615 |
|
|
// Control Signals 0 0
|
| 616 |
|
|
d e e
|
| 617 |
|
|
// (32 Signals) 456789abcdef0123456789abc
|
| 618 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 619 |
|
|
/* 0 CTRL_COMPLETE */ 0000000000000000000100000 // Delayed by 1
|
| 620 |
|
|
/* 1 CTRL_IS_WRITE */ 0000000000000000000000000 // Delayed by 1
|
| 621 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 1011111111111111111111111 // Delayed by 2
|
| 622 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 1111111111111111111111111 // Delayed by 2
|
| 623 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 1111111111111111111111111 // Delayed by 2
|
| 624 |
|
|
/* 5 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 625 |
|
|
/* 6 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 626 |
|
|
/* 7 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 627 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 0000000000000000000000000 // Delayed by 1
|
| 628 |
|
|
/* 9 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 629 |
|
|
/* 10 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 630 |
|
|
/* 11 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 631 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 0001000000000000000000000 // Delayed by 1
|
| 632 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 0000101010101010101000000 // Delayed by 1
|
| 633 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0000000000000000000010000 // Delayed by 1
|
| 634 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 0100000000000000000000000 // Delayed by 1
|
| 635 |
|
|
/* 16 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 636 |
|
|
/* 17 CTRL_REPEAT4 */ 0000000000000000000000000 // Delayed by 1
|
| 637 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 0000000000000000000000000 // Delayed by 2
|
| 638 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0000111111111111111100000 // Delayed by 2
|
| 639 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1111111111111111111101111 // Delayed by 2
|
| 640 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1111010101010101010111111 // Delayed by 2
|
| 641 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1111111111111111111101111 // Delayed by 2
|
| 642 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0000101010101010101000000 // Delayed by 1
|
| 643 |
|
|
/* 24 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 644 |
|
|
/* 25 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 645 |
|
|
/* 26 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 646 |
|
|
/* 27 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 647 |
|
|
/* 28 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 648 |
|
|
/* 29 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 649 |
|
|
/* 30 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 650 |
|
|
/* 31 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 651 |
|
|
/* 32 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 652 |
|
|
/* 33 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 653 |
|
|
/* 34 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 654 |
|
|
/* 35 UNUSED */ 0000000000000000000000000 // Delayed by 0
|
| 655 |
|
|
//--------------------------------------------------------------------------
|
| 656 |
|
|
//
|
| 657 |
|
|
// FSM PATTERN 14: REFRESH
|
| 658 |
|
|
//
|
| 659 |
|
|
// Control Signals 0 1 1
|
| 660 |
|
|
e f 0 0
|
| 661 |
|
|
// (32 Signals) def0123456789abcdef0123456
|
| 662 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 663 |
|
|
/* 0 CTRL_COMPLETE */ 00000000000000000000100000 // Delayed by 1
|
| 664 |
|
|
/* 1 CTRL_IS_WRITE */ 00000000000000000000000000 // Delayed by 1
|
| 665 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 01111111111111111111111111 // Delayed by 2
|
| 666 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 11111111111111111111111111 // Delayed by 2
|
| 667 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 01111111111111111111111111 // Delayed by 2
|
| 668 |
|
|
/* 5 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 669 |
|
|
/* 6 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 670 |
|
|
/* 7 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 671 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 00000000000000000000000000 // Delayed by 1
|
| 672 |
|
|
/* 9 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 673 |
|
|
/* 10 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 674 |
|
|
/* 11 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 675 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 00000000000000000000000000 // Delayed by 1
|
| 676 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 00000000000000000000000000 // Delayed by 1
|
| 677 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 10000000000000000000000000 // Delayed by 1
|
| 678 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 00000000000000000000000000 // Delayed by 1
|
| 679 |
|
|
/* 16 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 680 |
|
|
/* 17 CTRL_REPEAT4 */ 00000000000000000000000000 // Delayed by 1
|
| 681 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 00000000000000000000000000 // Delayed by 2
|
| 682 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 00000000000000000000000000 // Delayed by 2
|
| 683 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 11101111111111111111111111 // Delayed by 2
|
| 684 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 11101111111111111111111111 // Delayed by 2
|
| 685 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 11111111111111111111111111 // Delayed by 2
|
| 686 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 00000000000000000000000000 // Delayed by 1
|
| 687 |
|
|
/* 24 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 688 |
|
|
/* 25 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 689 |
|
|
/* 26 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 690 |
|
|
/* 27 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 691 |
|
|
/* 28 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 692 |
|
|
/* 29 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 693 |
|
|
/* 30 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 694 |
|
|
/* 31 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 695 |
|
|
/* 32 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 696 |
|
|
/* 33 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 697 |
|
|
/* 34 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 698 |
|
|
/* 35 UNUSED */ 00000000000000000000000000 // Delayed by 0
|
| 699 |
|
|
//--------------------------------------------------------------------------
|
| 700 |
|
|
//
|
| 701 |
|
|
// FSM PATTERN 15: NOP
|
| 702 |
|
|
//
|
| 703 |
|
|
// Control Signals 1
|
| 704 |
|
|
|
| 705 |
|
|
// (32 Signals) 7
|
| 706 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 707 |
|
|
/* 0 CTRL_COMPLETE */ 0 // Delayed by 1
|
| 708 |
|
|
/* 1 CTRL_IS_WRITE */ 0 // Delayed by 1
|
| 709 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 1 // Delayed by 2
|
| 710 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 1 // Delayed by 2
|
| 711 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 1 // Delayed by 2
|
| 712 |
|
|
/* 5 UNUSED */ 0 // Delayed by 0
|
| 713 |
|
|
/* 6 UNUSED */ 0 // Delayed by 0
|
| 714 |
|
|
/* 7 UNUSED */ 0 // Delayed by 0
|
| 715 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 0 // Delayed by 1
|
| 716 |
|
|
/* 9 UNUSED */ 0 // Delayed by 0
|
| 717 |
|
|
/* 10 UNUSED */ 0 // Delayed by 0
|
| 718 |
|
|
/* 11 UNUSED */ 0 // Delayed by 0
|
| 719 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 0 // Delayed by 1
|
| 720 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 0 // Delayed by 1
|
| 721 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 0 // Delayed by 1
|
| 722 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 0 // Delayed by 1
|
| 723 |
|
|
/* 16 UNUSED */ 0 // Delayed by 0
|
| 724 |
|
|
/* 17 CTRL_REPEAT4 */ 0 // Delayed by 1
|
| 725 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 0 // Delayed by 2
|
| 726 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 0 // Delayed by 2
|
| 727 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 1 // Delayed by 2
|
| 728 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 1 // Delayed by 2
|
| 729 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 1 // Delayed by 2
|
| 730 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 0 // Delayed by 1
|
| 731 |
|
|
/* 24 UNUSED */ 0 // Delayed by 0
|
| 732 |
|
|
/* 25 UNUSED */ 0 // Delayed by 0
|
| 733 |
|
|
/* 26 UNUSED */ 0 // Delayed by 0
|
| 734 |
|
|
/* 27 UNUSED */ 0 // Delayed by 0
|
| 735 |
|
|
/* 28 UNUSED */ 0 // Delayed by 0
|
| 736 |
|
|
/* 29 UNUSED */ 0 // Delayed by 0
|
| 737 |
|
|
/* 30 UNUSED */ 0 // Delayed by 0
|
| 738 |
|
|
/* 31 UNUSED */ 0 // Delayed by 0
|
| 739 |
|
|
/* 32 UNUSED */ 0 // Delayed by 0
|
| 740 |
|
|
/* 33 UNUSED */ 0 // Delayed by 0
|
| 741 |
|
|
/* 34 UNUSED */ 0 // Delayed by 0
|
| 742 |
|
|
/* 35 UNUSED */ 0 // Delayed by 0
|
| 743 |
|
|
//--------------------------------------------------------------------------
|
| 744 |
|
|
//
|
| 745 |
|
|
// FSM PATTERN 16: ZQCS
|
| 746 |
|
|
//
|
| 747 |
|
|
// Control Signals 1 1
|
| 748 |
|
|
|
| 749 |
|
|
// (32 Signals) 89abcdef0
|
| 750 |
|
|
// --------------- -------------------------------- ------------------------------
|
| 751 |
|
|
/* 0 CTRL_COMPLETE */ 000100000 // Delayed by 1
|
| 752 |
|
|
/* 1 CTRL_IS_WRITE */ 000000000 // Delayed by 1
|
| 753 |
|
|
/* 2 CTRL_DFI_RAS_N_0 */ 111111111 // Delayed by 2
|
| 754 |
|
|
/* 3 CTRL_DFI_CAS_N_0 */ 111111111 // Delayed by 2
|
| 755 |
|
|
/* 4 CTRL_DFI_WE_N_0 */ 011111111 // Delayed by 2
|
| 756 |
|
|
/* 5 UNUSED */ 000000000 // Delayed by 0
|
| 757 |
|
|
/* 6 UNUSED */ 000000000 // Delayed by 0
|
| 758 |
|
|
/* 7 UNUSED */ 000000000 // Delayed by 0
|
| 759 |
|
|
/* 8 CTRL_DP_WRFIFO_POP */ 000000000 // Delayed by 1
|
| 760 |
|
|
/* 9 UNUSED */ 000000000 // Delayed by 0
|
| 761 |
|
|
/* 10 UNUSED */ 000000000 // Delayed by 0
|
| 762 |
|
|
/* 11 UNUSED */ 000000000 // Delayed by 0
|
| 763 |
|
|
/* 12 CTRL_AP_COL_CNT_LOAD */ 000000000 // Delayed by 1
|
| 764 |
|
|
/* 13 CTRL_AP_COL_CNT_ENABLE */ 000000000 // Delayed by 1
|
| 765 |
|
|
/* 14 CTRL_AP_PRECHARGE_ADDR10 */ 000000000 // Delayed by 1
|
| 766 |
|
|
/* 15 CTRL_AP_ROW_COL_SEL */ 000000000 // Delayed by 1
|
| 767 |
|
|
/* 16 UNUSED */ 000000000 // Delayed by 0
|
| 768 |
|
|
/* 17 CTRL_REPEAT4 */ 010000000 // Delayed by 1
|
| 769 |
|
|
/* 18 CTRL_DFI_WRDATA_EN */ 000000000 // Delayed by 2
|
| 770 |
|
|
/* 19 CTRL_DFI_RDDATA_EN */ 000000000 // Delayed by 2
|
| 771 |
|
|
/* 20 CTRL_DFI_RAS_N_1 */ 111111111 // Delayed by 2
|
| 772 |
|
|
/* 21 CTRL_DFI_CAS_N_1 */ 111111111 // Delayed by 2
|
| 773 |
|
|
/* 22 CTRL_DFI_WE_N_1 */ 111111111 // Delayed by 2
|
| 774 |
|
|
/* 23 CTRL_AP_OTF_ADDR12 */ 000000000 // Delayed by 1
|
| 775 |
|
|
/* 24 UNUSED */ 000000000 // Delayed by 0
|
| 776 |
|
|
/* 25 UNUSED */ 000000000 // Delayed by 0
|
| 777 |
|
|
/* 26 UNUSED */ 000000000 // Delayed by 0
|
| 778 |
|
|
/* 27 UNUSED */ 000000000 // Delayed by 0
|
| 779 |
|
|
/* 28 UNUSED */ 000000000 // Delayed by 0
|
| 780 |
|
|
/* 29 UNUSED */ 000000000 // Delayed by 0
|
| 781 |
|
|
/* 30 UNUSED */ 000000000 // Delayed by 0
|
| 782 |
|
|
/* 31 UNUSED */ 000000000 // Delayed by 0
|
| 783 |
|
|
/* 32 UNUSED */ 000000000 // Delayed by 0
|
| 784 |
|
|
/* 33 UNUSED */ 000000000 // Delayed by 0
|
| 785 |
|
|
/* 34 UNUSED */ 000000000 // Delayed by 0
|
| 786 |
|
|
/* 35 UNUSED */ 000000000 // Delayed by 0
|
