OpenCores
URL https://opencores.org/ocsvn/sata_controller_core/sata_controller_core/trunk

Subversion Repositories sata_controller_core

[/] [sata_controller_core/] [trunk/] [sata2_driver_v1_00_a/] [sata_cfg.h] - Blame information for rev 15

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 14 bhuang2
/*
2
 * sata_cfg.h
3
 *
4
 * Definitions for the SATA core configuration registers
5
 *
6
 * Author: Bin Huang  <bin.arthur@gmail.com>
7
 *
8
 * 2012 (c) Reconfigurable Computing System Lab at University of North
9
 * Carolina at Charlotte. This file is licensed under
10
 * the terms of the GNU General Public License version 2. This program
11
 * is licensed "as is" without any warranty of any kind, whether express
12
 * or implied. The code originally comes from the book "Linux Device
13
 * Drivers" by Alessandro Rubini and Jonathan Corbet, published
14
 * by O'Reilly & Associates.
15
 */
16
 
17
#include "xparameters.h"
18
 
19
#define SATA_CFG_BASE           XPAR_SATA_CORE_0_BASEADDR
20
#define SATA_CFG_HIGH           XPAR_SATA_CORE_0_HIGHADDR
21
#define SATA_CFG_REMAP_SIZE     (SATA_CFG_HIGH - SATA_CFG_BASE + 1)
22
 
23
// Structure maps to SATA Core Slave Registers
24
typedef struct {
25
  volatile unsigned int ctrl_reg;
26
  volatile unsigned int cmd_reg;
27
  volatile unsigned int status_reg;
28
  volatile unsigned int sector_addr_reg;
29
  volatile unsigned int sector_count_reg;
30
  volatile unsigned int sector_timer_reg;
31
  volatile unsigned int npi_rd_addr_reg;
32
  volatile unsigned int npi_wr_addr_reg;
33
} SATA_core_t,
34
  *pSATA_core_t;
35
 
36
// Special Commands to SATA controller
37
#define REG_CLEAR      0x00000000
38
#define SATA_LINK_READY 0x00000002
39
#define SW_RESET       0x00000001
40 15 bhuang2
#define NPI_DONE       0x00000004
41
#define SATA_CORE_DONE 0x00000001
42 14 bhuang2
#define NEW_CMD        0x00000002
43 15 bhuang2
#define READ_CMD       0x00000001
44
#define WRITE_CMD      0x00000002
45 14 bhuang2
 
46
#define WORDS_PER_SECTOR 128 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.