1 |
2 |
DavidRAMBA |
--=============================================================================
|
2 |
|
|
-- TITRE : IF_PCIE
|
3 |
|
|
-- DESCRIPTION :
|
4 |
|
|
-- Interface PCIe
|
5 |
|
|
-- D'un coté fournit l'interface au format PCIe
|
6 |
|
|
-- De l'autre fournit un bus local qui gère des accès en lecture/écriture
|
7 |
|
|
--
|
8 |
|
|
-- FICHIER : if_pcie.vhd
|
9 |
|
|
--=============================================================================
|
10 |
|
|
-- CREATION
|
11 |
|
|
-- DATE AUTEUR PROJET REVISION
|
12 |
|
|
-- 10/04/2014 DRA SATURN V1.0
|
13 |
|
|
--=============================================================================
|
14 |
|
|
-- HISTORIQUE DES MODIFICATIONS :
|
15 |
|
|
-- DATE AUTEUR PROJET REVISION
|
16 |
|
|
--=============================================================================
|
17 |
|
|
|
18 |
|
|
LIBRARY IEEE;
|
19 |
|
|
USE IEEE.STD_LOGIC_1164.ALL;
|
20 |
|
|
USE IEEE.NUMERIC_BIT.ALL;
|
21 |
|
|
LIBRARY UNISIM;
|
22 |
|
|
use UNISIM.VCOMPONENTS.ALL;
|
23 |
|
|
|
24 |
|
|
ENTITY if_pcie IS
|
25 |
|
|
GENERIC
|
26 |
|
|
(
|
27 |
|
|
fast_train : BOOLEAN := FALSE;
|
28 |
|
|
nbbit_add : INTEGER := 13 -- Nombre de bits d'adresse utilisé sur le bus local
|
29 |
|
|
);
|
30 |
|
|
PORT
|
31 |
|
|
(
|
32 |
|
|
pci_exp_txp : OUT STD_LOGIC; -- Interface Tx différentielle PCIe
|
33 |
|
|
pci_exp_txn : OUT STD_LOGIC;
|
34 |
|
|
pci_exp_rxp : IN STD_LOGIC; -- Interface Rx différentielle PCIe
|
35 |
|
|
pci_exp_rxn : IN STD_LOGIC;
|
36 |
|
|
sys_clk_p : IN STD_LOGIC; -- Clock différentielle PCIe
|
37 |
|
|
sys_clk_n : IN STD_LOGIC;
|
38 |
|
|
sys_reset_n : IN STD_LOGIC; -- Reset général du module PCIe
|
39 |
|
|
|
40 |
|
|
-- Gestion du DMA
|
41 |
|
|
dma_req : IN STD_LOGIC; -- Demande d'un transfert DMA de la part du module MANAGE_DMA
|
42 |
|
|
dma_compl : OUT STD_LOGIC; -- Indique que le dernier transfert DMA est fini
|
43 |
|
|
dma_ack : OUT STD_LOGIC; -- Acquitte la demande de transfert DMA
|
44 |
|
|
dma_add_dest: IN STD_LOGIC_VECTOR(31 downto 0); -- Adresse de destination dans la zone micro où on souhaite faire le DMA
|
45 |
|
|
dma_data : IN STD_LOGIC_VECTOR(31 DOWNTO 0); -- Données 32 bits successives à transférer par DMA
|
46 |
|
|
dma_read : OUT STD_LOGIC; -- Lecture d'un mot 32 bits de plus à transférer par DMA
|
47 |
|
|
dma_size : IN STD_LOGIC_VECTOR(7 downto 0); -- Taille du DMA en mots de 32 bits
|
48 |
|
|
|
49 |
|
|
-- Gestion du Local Bus
|
50 |
|
|
rd_addr : OUT STD_LOGIC_VECTOR(nbbit_add-1 downto 0); -- Adresse pour une lecture (pointe dans MEMORY_MAP)
|
51 |
|
|
rd_data : IN STD_LOGIC_VECTOR(31 downto 0); -- Donnée lue
|
52 |
|
|
rd_be : OUT STD_LOGIC_VECTOR(3 downto 0); -- Byte Enable pour la lecture
|
53 |
|
|
rd_en : OUT STD_LOGIC; -- Signal de lecture
|
54 |
|
|
wr_addr : OUT STD_LOGIC_VECTOR(nbbit_add-1 downto 0); -- Adresse pour une écriture (pointe dans MEMORY_MAP)
|
55 |
|
|
wr_data : OUT STD_LOGIC_VECTOR(31 downto 0); -- Donéne à écrire
|
56 |
|
|
wr_be : OUT STD_LOGIC_VECTOR(3 downto 0); -- Byte Enbale pour une écriture
|
57 |
|
|
wr_en : OUT STD_LOGIC; -- Signal d'écriture
|
58 |
|
|
wr_busy : IN STD_LOGIC; -- Indique que le process d'écriture est occupé
|
59 |
|
|
clk_local : OUT STD_LOGIC; -- Clock du bus Local à 62.5MHz
|
60 |
|
|
rst_local_n : OUT STD_LOGIC; -- Reset sur le bus local
|
61 |
|
|
link_up_n : OUT STD_LOGIC -- Indique que le lien PCIe est opérationnel
|
62 |
|
|
);
|
63 |
|
|
END if_pcie;
|
64 |
|
|
|
65 |
|
|
ARCHITECTURE rtl OF if_pcie IS
|
66 |
|
|
-------------------------
|
67 |
|
|
-- Component declarations
|
68 |
|
|
-------------------------
|
69 |
|
|
COMPONENT pcie_app_s6 IS
|
70 |
|
|
GENERIC (
|
71 |
|
|
nbbit_add : INTEGER := 13
|
72 |
|
|
);
|
73 |
|
|
PORT (
|
74 |
|
|
trn_clk : in std_logic;
|
75 |
|
|
trn_reset_n : in std_logic;
|
76 |
|
|
trn_lnk_up_n : in std_logic;
|
77 |
|
|
trn_tbuf_av : in std_logic_vector(5 downto 0);
|
78 |
|
|
trn_tcfg_req_n : in std_logic;
|
79 |
|
|
trn_terr_drop_n : in std_logic;
|
80 |
|
|
trn_tdst_rdy_n : in std_logic;
|
81 |
|
|
trn_td : out std_logic_vector(31 downto 0);
|
82 |
|
|
trn_tsof_n : out std_logic;
|
83 |
|
|
trn_teof_n : out std_logic;
|
84 |
|
|
trn_tsrc_rdy_n : out std_logic;
|
85 |
|
|
trn_tsrc_dsc_n : out std_logic;
|
86 |
|
|
trn_terrfwd_n : out std_logic;
|
87 |
|
|
trn_tcfg_gnt_n : out std_logic;
|
88 |
|
|
trn_tstr_n : out std_logic;
|
89 |
|
|
trn_rd : in std_logic_vector(31 downto 0);
|
90 |
|
|
trn_rsof_n : in std_logic;
|
91 |
|
|
trn_reof_n : in std_logic;
|
92 |
|
|
trn_rsrc_rdy_n : in std_logic;
|
93 |
|
|
trn_rsrc_dsc_n : in std_logic;
|
94 |
|
|
trn_rerrfwd_n : in std_logic;
|
95 |
|
|
trn_rbar_hit_n : in std_logic_vector(6 downto 0);
|
96 |
|
|
trn_rdst_rdy_n : out std_logic;
|
97 |
|
|
trn_rnp_ok_n : out std_logic;
|
98 |
|
|
trn_fc_cpld : in std_logic_vector(11 downto 0);
|
99 |
|
|
trn_fc_cplh : in std_logic_vector(7 downto 0);
|
100 |
|
|
trn_fc_npd : in std_logic_vector(11 downto 0);
|
101 |
|
|
trn_fc_nph : in std_logic_vector(7 downto 0);
|
102 |
|
|
trn_fc_pd : in std_logic_vector(11 downto 0);
|
103 |
|
|
trn_fc_ph : in std_logic_vector(7 downto 0);
|
104 |
|
|
trn_fc_sel : out std_logic_vector(2 downto 0);
|
105 |
|
|
cfg_do : in std_logic_vector(31 downto 0);
|
106 |
|
|
cfg_rd_wr_done_n : in std_logic;
|
107 |
|
|
cfg_dwaddr : out std_logic_vector(9 downto 0);
|
108 |
|
|
cfg_rd_en_n : out std_logic;
|
109 |
|
|
cfg_err_cor_n : out std_logic;
|
110 |
|
|
cfg_err_ur_n : out std_logic;
|
111 |
|
|
cfg_err_ecrc_n : out std_logic;
|
112 |
|
|
cfg_err_cpl_timeout_n : out std_logic;
|
113 |
|
|
cfg_err_cpl_abort_n : out std_logic;
|
114 |
|
|
cfg_err_posted_n : out std_logic;
|
115 |
|
|
cfg_err_locked_n : out std_logic;
|
116 |
|
|
cfg_err_tlp_cpl_header : out std_logic_vector(47 downto 0);
|
117 |
|
|
cfg_err_cpl_rdy_n : in std_logic;
|
118 |
|
|
cfg_interrupt_n : out std_logic;
|
119 |
|
|
cfg_interrupt_rdy_n : in std_logic;
|
120 |
|
|
cfg_interrupt_assert_n : out std_logic;
|
121 |
|
|
cfg_interrupt_di : out std_logic_vector(7 downto 0);
|
122 |
|
|
cfg_interrupt_do : in std_logic_vector(7 downto 0);
|
123 |
|
|
cfg_interrupt_mmenable : in std_logic_vector(2 downto 0);
|
124 |
|
|
cfg_interrupt_msienable: in std_logic;
|
125 |
|
|
cfg_turnoff_ok_n : out std_logic;
|
126 |
|
|
cfg_to_turnoff_n : in std_logic;
|
127 |
|
|
cfg_trn_pending_n : out std_logic;
|
128 |
|
|
cfg_pm_wake_n : out std_logic;
|
129 |
|
|
cfg_bus_number : in std_logic_vector(7 downto 0);
|
130 |
|
|
cfg_device_number : in std_logic_vector(4 downto 0);
|
131 |
|
|
cfg_function_number : in std_logic_vector(2 downto 0);
|
132 |
|
|
cfg_status : in std_logic_vector(15 downto 0);
|
133 |
|
|
cfg_command : in std_logic_vector(15 downto 0);
|
134 |
|
|
cfg_dstatus : in std_logic_vector(15 downto 0);
|
135 |
|
|
cfg_dcommand : in std_logic_vector(15 downto 0);
|
136 |
|
|
cfg_lstatus : in std_logic_vector(15 downto 0);
|
137 |
|
|
cfg_lcommand : in std_logic_vector(15 downto 0);
|
138 |
|
|
cfg_pcie_link_state_n : in std_logic_vector(2 downto 0);
|
139 |
|
|
cfg_dsn : out std_logic_vector(63 downto 0);
|
140 |
|
|
|
141 |
|
|
dma_req : IN STD_LOGIC;
|
142 |
|
|
dma_compl : OUT STD_LOGIC;
|
143 |
|
|
dma_ack : OUT STD_LOGIC;
|
144 |
|
|
dma_add_dest : IN STD_LOGIC_VECTOR(31 downto 0);
|
145 |
|
|
dma_data : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
|
146 |
|
|
dma_read : OUT STD_LOGIC;
|
147 |
|
|
dma_size : IN STD_LOGIC_VECTOR(7 downto 0);
|
148 |
|
|
|
149 |
|
|
--Local Bus
|
150 |
|
|
rd_addr : out STD_LOGIC_VECTOR(nbbit_add-1 downto 0);
|
151 |
|
|
rd_data : in STD_LOGIC_VECTOR(31 downto 0);
|
152 |
|
|
rd_be : out STD_LOGIC_VECTOR(3 downto 0);
|
153 |
|
|
rd_en : out STD_LOGIC;
|
154 |
|
|
wr_addr : out STD_LOGIC_VECTOR(nbbit_add-1 downto 0);
|
155 |
|
|
wr_data : out STD_LOGIC_VECTOR(31 downto 0);
|
156 |
|
|
wr_be : out STD_LOGIC_VECTOR(3 downto 0);
|
157 |
|
|
wr_en : out STD_LOGIC;
|
158 |
|
|
wr_busy : in STD_LOGIC
|
159 |
|
|
);
|
160 |
|
|
end component pcie_app_s6;
|
161 |
|
|
|
162 |
|
|
component s6_pcie_v1_4 is
|
163 |
|
|
generic (
|
164 |
|
|
TL_TX_RAM_RADDR_LATENCY : integer := 0;
|
165 |
|
|
TL_TX_RAM_RDATA_LATENCY : integer := 2;
|
166 |
|
|
TL_RX_RAM_RADDR_LATENCY : integer := 0;
|
167 |
|
|
TL_RX_RAM_RDATA_LATENCY : integer := 2;
|
168 |
|
|
TL_RX_RAM_WRITE_LATENCY : integer := 0;
|
169 |
|
|
VC0_TX_LASTPACKET : integer := 14;
|
170 |
|
|
VC0_RX_RAM_LIMIT : bit_vector := x"7FF";
|
171 |
|
|
VC0_TOTAL_CREDITS_PH : integer := 32;
|
172 |
|
|
VC0_TOTAL_CREDITS_PD : integer := 211;
|
173 |
|
|
VC0_TOTAL_CREDITS_NPH : integer := 8;
|
174 |
|
|
VC0_TOTAL_CREDITS_CH : integer := 40;
|
175 |
|
|
VC0_TOTAL_CREDITS_CD : integer := 211;
|
176 |
|
|
VC0_CPL_INFINITE : boolean := TRUE;
|
177 |
|
|
BAR0 : bit_vector := x"FFFF8000";
|
178 |
|
|
BAR1 : bit_vector := x"FFFF8000";
|
179 |
|
|
BAR2 : bit_vector := x"00000000";
|
180 |
|
|
BAR3 : bit_vector := x"00000000";
|
181 |
|
|
BAR4 : bit_vector := x"00000000";
|
182 |
|
|
BAR5 : bit_vector := x"00000000";
|
183 |
|
|
EXPANSION_ROM : bit_vector := "0000000000000000000000";
|
184 |
|
|
DISABLE_BAR_FILTERING : boolean := FALSE;
|
185 |
|
|
DISABLE_ID_CHECK : boolean := FALSE;
|
186 |
|
|
TL_TFC_DISABLE : boolean := FALSE;
|
187 |
|
|
TL_TX_CHECKS_DISABLE : boolean := FALSE;
|
188 |
|
|
USR_CFG : boolean := FALSE;
|
189 |
|
|
USR_EXT_CFG : boolean := FALSE;
|
190 |
|
|
DEV_CAP_MAX_PAYLOAD_SUPPORTED : integer := 2;
|
191 |
|
|
CLASS_CODE : bit_vector := x"0B4000";
|
192 |
|
|
CARDBUS_CIS_POINTER : bit_vector := x"00000000";
|
193 |
|
|
PCIE_CAP_CAPABILITY_VERSION : bit_vector := x"1";
|
194 |
|
|
PCIE_CAP_DEVICE_PORT_TYPE : bit_vector := x"0";
|
195 |
|
|
PCIE_CAP_SLOT_IMPLEMENTED : boolean := FALSE;
|
196 |
|
|
PCIE_CAP_INT_MSG_NUM : bit_vector := "00000";
|
197 |
|
|
DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT : integer := 0;
|
198 |
|
|
DEV_CAP_EXT_TAG_SUPPORTED : boolean := FALSE;
|
199 |
|
|
DEV_CAP_ENDPOINT_L0S_LATENCY : integer := 7;
|
200 |
|
|
DEV_CAP_ENDPOINT_L1_LATENCY : integer := 7;
|
201 |
|
|
SLOT_CAP_ATT_BUTTON_PRESENT : boolean := FALSE;
|
202 |
|
|
SLOT_CAP_ATT_INDICATOR_PRESENT : boolean := FALSE;
|
203 |
|
|
SLOT_CAP_POWER_INDICATOR_PRESENT : boolean := FALSE;
|
204 |
|
|
DEV_CAP_ROLE_BASED_ERROR : boolean := TRUE;
|
205 |
|
|
LINK_CAP_ASPM_SUPPORT : integer := 1;
|
206 |
|
|
LINK_CAP_L0S_EXIT_LATENCY : integer := 7;
|
207 |
|
|
LINK_CAP_L1_EXIT_LATENCY : integer := 7;
|
208 |
|
|
LL_ACK_TIMEOUT : bit_vector := x"00B7";
|
209 |
|
|
LL_ACK_TIMEOUT_EN : boolean := FALSE;
|
210 |
|
|
LL_REPLAY_TIMEOUT : bit_vector := x"0204";
|
211 |
|
|
LL_REPLAY_TIMEOUT_EN : boolean := FALSE;
|
212 |
|
|
MSI_CAP_MULTIMSGCAP : integer := 0;
|
213 |
|
|
MSI_CAP_MULTIMSG_EXTENSION : integer := 0;
|
214 |
|
|
LINK_STATUS_SLOT_CLOCK_CONFIG : boolean := TRUE;
|
215 |
|
|
PLM_AUTO_CONFIG : boolean := FALSE;
|
216 |
|
|
FAST_TRAIN : boolean := FALSE;
|
217 |
|
|
ENABLE_RX_TD_ECRC_TRIM : boolean := FALSE;
|
218 |
|
|
DISABLE_SCRAMBLING : boolean := FALSE;
|
219 |
|
|
PM_CAP_VERSION : integer := 3;
|
220 |
|
|
PM_CAP_PME_CLOCK : boolean := FALSE;
|
221 |
|
|
PM_CAP_DSI : boolean := FALSE;
|
222 |
|
|
PM_CAP_AUXCURRENT : integer := 0;
|
223 |
|
|
PM_CAP_D1SUPPORT : boolean := TRUE;
|
224 |
|
|
PM_CAP_D2SUPPORT : boolean := TRUE;
|
225 |
|
|
PM_CAP_PMESUPPORT : bit_vector := x"0F";
|
226 |
|
|
PM_DATA0 : bit_vector := x"00";
|
227 |
|
|
PM_DATA_SCALE0 : bit_vector := x"0";
|
228 |
|
|
PM_DATA1 : bit_vector := x"00";
|
229 |
|
|
PM_DATA_SCALE1 : bit_vector := x"0";
|
230 |
|
|
PM_DATA2 : bit_vector := x"00";
|
231 |
|
|
PM_DATA_SCALE2 : bit_vector := x"0";
|
232 |
|
|
PM_DATA3 : bit_vector := x"00";
|
233 |
|
|
PM_DATA_SCALE3 : bit_vector := x"0";
|
234 |
|
|
PM_DATA4 : bit_vector := x"00";
|
235 |
|
|
PM_DATA_SCALE4 : bit_vector := x"0";
|
236 |
|
|
PM_DATA5 : bit_vector := x"00";
|
237 |
|
|
PM_DATA_SCALE5 : bit_vector := x"0";
|
238 |
|
|
PM_DATA6 : bit_vector := x"00";
|
239 |
|
|
PM_DATA_SCALE6 : bit_vector := x"0";
|
240 |
|
|
PM_DATA7 : bit_vector := x"00";
|
241 |
|
|
PM_DATA_SCALE7 : bit_vector := x"0";
|
242 |
|
|
PCIE_GENERIC : bit_vector := "000011101111";
|
243 |
|
|
GTP_SEL : integer := 0;
|
244 |
|
|
CFG_VEN_ID : std_logic_vector(15 downto 0) := x"1597";
|
245 |
|
|
CFG_DEV_ID : std_logic_vector(15 downto 0) := x"0301";
|
246 |
|
|
CFG_REV_ID : std_logic_vector(7 downto 0) := x"00";
|
247 |
|
|
CFG_SUBSYS_VEN_ID : std_logic_vector(15 downto 0) := x"1597";
|
248 |
|
|
CFG_SUBSYS_ID : std_logic_vector(15 downto 0) := x"0001";
|
249 |
|
|
REF_CLK_FREQ : integer := 0
|
250 |
|
|
);
|
251 |
|
|
port (
|
252 |
|
|
-- PCI Express Fabric Interface
|
253 |
|
|
pci_exp_txp : out std_logic;
|
254 |
|
|
pci_exp_txn : out std_logic;
|
255 |
|
|
pci_exp_rxp : in std_logic;
|
256 |
|
|
pci_exp_rxn : in std_logic;
|
257 |
|
|
|
258 |
|
|
-- Transaction (TRN) Interface
|
259 |
|
|
trn_lnk_up_n : out std_logic;
|
260 |
|
|
|
261 |
|
|
-- Tx
|
262 |
|
|
trn_td : in std_logic_vector(31 downto 0);
|
263 |
|
|
trn_tsof_n : in std_logic;
|
264 |
|
|
trn_teof_n : in std_logic;
|
265 |
|
|
trn_tsrc_rdy_n : in std_logic;
|
266 |
|
|
trn_tdst_rdy_n : out std_logic;
|
267 |
|
|
trn_terr_drop_n : out std_logic;
|
268 |
|
|
trn_tsrc_dsc_n : in std_logic;
|
269 |
|
|
trn_terrfwd_n : in std_logic;
|
270 |
|
|
trn_tbuf_av : out std_logic_vector(5 downto 0);
|
271 |
|
|
trn_tstr_n : in std_logic;
|
272 |
|
|
trn_tcfg_req_n : out std_logic;
|
273 |
|
|
trn_tcfg_gnt_n : in std_logic;
|
274 |
|
|
|
275 |
|
|
-- Rx
|
276 |
|
|
trn_rd : out std_logic_vector(31 downto 0);
|
277 |
|
|
trn_rsof_n : out std_logic;
|
278 |
|
|
trn_reof_n : out std_logic;
|
279 |
|
|
trn_rsrc_rdy_n : out std_logic;
|
280 |
|
|
trn_rsrc_dsc_n : out std_logic;
|
281 |
|
|
trn_rdst_rdy_n : in std_logic;
|
282 |
|
|
trn_rerrfwd_n : out std_logic;
|
283 |
|
|
trn_rnp_ok_n : in std_logic;
|
284 |
|
|
trn_rbar_hit_n : out std_logic_vector(6 downto 0);
|
285 |
|
|
trn_fc_sel : in std_logic_vector(2 downto 0);
|
286 |
|
|
trn_fc_nph : out std_logic_vector(7 downto 0);
|
287 |
|
|
trn_fc_npd : out std_logic_vector(11 downto 0);
|
288 |
|
|
trn_fc_ph : out std_logic_vector(7 downto 0);
|
289 |
|
|
trn_fc_pd : out std_logic_vector(11 downto 0);
|
290 |
|
|
trn_fc_cplh : out std_logic_vector(7 downto 0);
|
291 |
|
|
trn_fc_cpld : out std_logic_vector(11 downto 0);
|
292 |
|
|
|
293 |
|
|
-- Host (CFG) Interface
|
294 |
|
|
cfg_do : out std_logic_vector(31 downto 0);
|
295 |
|
|
cfg_rd_wr_done_n : out std_logic;
|
296 |
|
|
cfg_dwaddr : in std_logic_vector(9 downto 0);
|
297 |
|
|
cfg_rd_en_n : in std_logic;
|
298 |
|
|
cfg_err_ur_n : in std_logic;
|
299 |
|
|
cfg_err_cor_n : in std_logic;
|
300 |
|
|
cfg_err_ecrc_n : in std_logic;
|
301 |
|
|
cfg_err_cpl_timeout_n : in std_logic;
|
302 |
|
|
cfg_err_cpl_abort_n : in std_logic;
|
303 |
|
|
cfg_err_posted_n : in std_logic;
|
304 |
|
|
cfg_err_locked_n : in std_logic;
|
305 |
|
|
cfg_err_tlp_cpl_header : in std_logic_vector(47 downto 0);
|
306 |
|
|
cfg_err_cpl_rdy_n : out std_logic;
|
307 |
|
|
cfg_interrupt_n : in std_logic;
|
308 |
|
|
cfg_interrupt_rdy_n : out std_logic;
|
309 |
|
|
cfg_interrupt_assert_n : in std_logic;
|
310 |
|
|
cfg_interrupt_do : out std_logic_vector(7 downto 0);
|
311 |
|
|
cfg_interrupt_di : in std_logic_vector(7 downto 0);
|
312 |
|
|
cfg_interrupt_mmenable : out std_logic_vector(2 downto 0);
|
313 |
|
|
cfg_interrupt_msienable : out std_logic;
|
314 |
|
|
cfg_turnoff_ok_n : in std_logic;
|
315 |
|
|
cfg_to_turnoff_n : out std_logic;
|
316 |
|
|
cfg_pm_wake_n : in std_logic;
|
317 |
|
|
cfg_pcie_link_state_n : out std_logic_vector(2 downto 0);
|
318 |
|
|
cfg_trn_pending_n : in std_logic;
|
319 |
|
|
cfg_dsn : in std_logic_vector(63 downto 0);
|
320 |
|
|
cfg_bus_number : out std_logic_vector(7 downto 0);
|
321 |
|
|
cfg_device_number : out std_logic_vector(4 downto 0);
|
322 |
|
|
cfg_function_number : out std_logic_vector(2 downto 0);
|
323 |
|
|
cfg_status : out std_logic_vector(15 downto 0);
|
324 |
|
|
cfg_command : out std_logic_vector(15 downto 0);
|
325 |
|
|
cfg_dstatus : out std_logic_vector(15 downto 0);
|
326 |
|
|
cfg_dcommand : out std_logic_vector(15 downto 0);
|
327 |
|
|
cfg_lstatus : out std_logic_vector(15 downto 0);
|
328 |
|
|
cfg_lcommand : out std_logic_vector(15 downto 0);
|
329 |
|
|
|
330 |
|
|
-- System Interface
|
331 |
|
|
sys_clk : in std_logic;
|
332 |
|
|
sys_reset_n : in std_logic;
|
333 |
|
|
trn_clk : out std_logic;
|
334 |
|
|
trn_reset_n : out std_logic;
|
335 |
|
|
received_hot_reset : out std_logic
|
336 |
|
|
);
|
337 |
|
|
end component s6_pcie_v1_4;
|
338 |
|
|
|
339 |
|
|
----------------------
|
340 |
|
|
-- Signal declarations
|
341 |
|
|
----------------------
|
342 |
|
|
|
343 |
|
|
-- Common
|
344 |
|
|
signal trn_clk_buf : std_logic;
|
345 |
|
|
signal trn_reset_buf_n : std_logic;
|
346 |
|
|
signal trn_lnk_up_buf_n : std_logic;
|
347 |
|
|
|
348 |
|
|
-- Tx
|
349 |
|
|
signal trn_tbuf_av : std_logic_vector(5 downto 0);
|
350 |
|
|
signal trn_tcfg_req_n : std_logic;
|
351 |
|
|
signal trn_terr_drop_n : std_logic;
|
352 |
|
|
signal trn_tdst_rdy_n : std_logic;
|
353 |
|
|
signal trn_td : std_logic_vector(31 downto 0);
|
354 |
|
|
signal trn_tsof_n : std_logic;
|
355 |
|
|
signal trn_teof_n : std_logic;
|
356 |
|
|
signal trn_tsrc_rdy_n : std_logic;
|
357 |
|
|
signal trn_tsrc_dsc_n : std_logic;
|
358 |
|
|
signal trn_terrfwd_n : std_logic;
|
359 |
|
|
signal trn_tcfg_gnt_n : std_logic;
|
360 |
|
|
signal trn_tstr_n : std_logic;
|
361 |
|
|
|
362 |
|
|
-- Rx
|
363 |
|
|
signal trn_rd : std_logic_vector(31 downto 0);
|
364 |
|
|
signal trn_rsof_n : std_logic;
|
365 |
|
|
signal trn_reof_n : std_logic;
|
366 |
|
|
signal trn_rsrc_rdy_n : std_logic;
|
367 |
|
|
signal trn_rsrc_dsc_n : std_logic;
|
368 |
|
|
signal trn_rerrfwd_n : std_logic;
|
369 |
|
|
signal trn_rbar_hit_n : std_logic_vector(6 downto 0);
|
370 |
|
|
signal trn_rdst_rdy_n : std_logic;
|
371 |
|
|
signal trn_rnp_ok_n : std_logic;
|
372 |
|
|
|
373 |
|
|
-- Flow Control
|
374 |
|
|
signal trn_fc_cpld : std_logic_vector(11 downto 0);
|
375 |
|
|
signal trn_fc_cplh : std_logic_vector(7 downto 0);
|
376 |
|
|
signal trn_fc_npd : std_logic_vector(11 downto 0);
|
377 |
|
|
signal trn_fc_nph : std_logic_vector(7 downto 0);
|
378 |
|
|
signal trn_fc_pd : std_logic_vector(11 downto 0);
|
379 |
|
|
signal trn_fc_ph : std_logic_vector(7 downto 0);
|
380 |
|
|
signal trn_fc_sel : std_logic_vector(2 downto 0);
|
381 |
|
|
|
382 |
|
|
-- Config
|
383 |
|
|
signal cfg_dsn : std_logic_vector(63 downto 0);
|
384 |
|
|
signal cfg_do : std_logic_vector(31 downto 0);
|
385 |
|
|
signal cfg_rd_wr_done_n : std_logic;
|
386 |
|
|
signal cfg_dwaddr : std_logic_vector(9 downto 0);
|
387 |
|
|
signal cfg_rd_en_n : std_logic;
|
388 |
|
|
|
389 |
|
|
-- Error signaling
|
390 |
|
|
signal cfg_err_cor_n : std_logic;
|
391 |
|
|
signal cfg_err_ur_n : std_logic;
|
392 |
|
|
signal cfg_err_ecrc_n : std_logic;
|
393 |
|
|
signal cfg_err_cpl_timeout_n : std_logic;
|
394 |
|
|
signal cfg_err_cpl_abort_n : std_logic;
|
395 |
|
|
signal cfg_err_posted_n : std_logic;
|
396 |
|
|
signal cfg_err_locked_n : std_logic;
|
397 |
|
|
signal cfg_err_tlp_cpl_header : std_logic_vector(47 downto 0);
|
398 |
|
|
signal cfg_err_cpl_rdy_n : std_logic;
|
399 |
|
|
|
400 |
|
|
-- Interrupt signaling
|
401 |
|
|
signal cfg_interrupt_n : std_logic;
|
402 |
|
|
signal cfg_interrupt_rdy_n : std_logic;
|
403 |
|
|
signal cfg_interrupt_assert_n : std_logic;
|
404 |
|
|
signal cfg_interrupt_di : std_logic_vector(7 downto 0);
|
405 |
|
|
signal cfg_interrupt_do : std_logic_vector(7 downto 0);
|
406 |
|
|
signal cfg_interrupt_mmenable : std_logic_vector(2 downto 0);
|
407 |
|
|
signal cfg_interrupt_msienable : std_logic;
|
408 |
|
|
|
409 |
|
|
-- Power management signaling
|
410 |
|
|
signal cfg_turnoff_ok_n : std_logic;
|
411 |
|
|
signal cfg_to_turnoff_n : std_logic;
|
412 |
|
|
signal cfg_trn_pending_n : std_logic;
|
413 |
|
|
signal cfg_pm_wake_n : std_logic;
|
414 |
|
|
|
415 |
|
|
-- System configuration and status
|
416 |
|
|
signal cfg_bus_number : std_logic_vector(7 downto 0);
|
417 |
|
|
signal cfg_device_number : std_logic_vector(4 downto 0);
|
418 |
|
|
signal cfg_function_number : std_logic_vector(2 downto 0);
|
419 |
|
|
signal cfg_status : std_logic_vector(15 downto 0);
|
420 |
|
|
signal cfg_command : std_logic_vector(15 downto 0);
|
421 |
|
|
signal cfg_dstatus : std_logic_vector(15 downto 0);
|
422 |
|
|
signal cfg_dcommand : std_logic_vector(15 downto 0);
|
423 |
|
|
signal cfg_lstatus : std_logic_vector(15 downto 0);
|
424 |
|
|
signal cfg_lcommand : std_logic_vector(15 downto 0);
|
425 |
|
|
signal cfg_pcie_link_state_n : std_logic_vector(2 downto 0);
|
426 |
|
|
|
427 |
|
|
-- System (SYS) Interface
|
428 |
|
|
signal sys_clk_c : std_logic;
|
429 |
|
|
signal sys_reset_n_c : std_logic;
|
430 |
|
|
|
431 |
|
|
begin
|
432 |
|
|
clk_local <= trn_clk_buf;
|
433 |
|
|
rst_local_n <= trn_reset_buf_n;
|
434 |
|
|
link_up_n <= trn_lnk_up_buf_n;
|
435 |
|
|
|
436 |
|
|
---------------------------------------------------------
|
437 |
|
|
-- Clock Input Buffer for differential system clock
|
438 |
|
|
---------------------------------------------------------
|
439 |
|
|
refclk_ibuf : IBUFDS
|
440 |
|
|
port map
|
441 |
|
|
(
|
442 |
|
|
O => sys_clk_c,
|
443 |
|
|
I => sys_clk_p,
|
444 |
|
|
IB => sys_clk_n
|
445 |
|
|
);
|
446 |
|
|
|
447 |
|
|
---------------------------------------------------------
|
448 |
|
|
-- Input buffer for system reset signal
|
449 |
|
|
---------------------------------------------------------
|
450 |
|
|
sys_reset_n_ibuf : IBUF
|
451 |
|
|
port map
|
452 |
|
|
(
|
453 |
|
|
O => sys_reset_n_c,
|
454 |
|
|
I => sys_reset_n
|
455 |
|
|
);
|
456 |
|
|
|
457 |
|
|
---------------------------------------------------------
|
458 |
|
|
-- User application
|
459 |
|
|
---------------------------------------------------------
|
460 |
|
|
app : pcie_app_s6
|
461 |
|
|
generic map (
|
462 |
|
|
nbbit_add => nbbit_add
|
463 |
|
|
)
|
464 |
|
|
port map
|
465 |
|
|
(
|
466 |
|
|
-- Transaction (TRN) Interface
|
467 |
|
|
-- Common lock & reset
|
468 |
|
|
trn_clk => trn_clk_buf,
|
469 |
|
|
trn_reset_n => trn_reset_buf_n,
|
470 |
|
|
trn_lnk_up_n => trn_lnk_up_buf_n,
|
471 |
|
|
-- Common flow control
|
472 |
|
|
trn_fc_cpld => trn_fc_cpld,
|
473 |
|
|
trn_fc_cplh => trn_fc_cplh,
|
474 |
|
|
trn_fc_npd => trn_fc_npd,
|
475 |
|
|
trn_fc_nph => trn_fc_nph,
|
476 |
|
|
trn_fc_pd => trn_fc_pd,
|
477 |
|
|
trn_fc_ph => trn_fc_ph,
|
478 |
|
|
trn_fc_sel => trn_fc_sel,
|
479 |
|
|
-- Transaction Tx
|
480 |
|
|
trn_tbuf_av => trn_tbuf_av,
|
481 |
|
|
trn_tcfg_req_n => trn_tcfg_req_n,
|
482 |
|
|
trn_terr_drop_n => trn_terr_drop_n,
|
483 |
|
|
trn_tdst_rdy_n => trn_tdst_rdy_n,
|
484 |
|
|
trn_td => trn_td,
|
485 |
|
|
trn_tsof_n => trn_tsof_n,
|
486 |
|
|
trn_teof_n => trn_teof_n,
|
487 |
|
|
trn_tsrc_rdy_n => trn_tsrc_rdy_n,
|
488 |
|
|
trn_tsrc_dsc_n => trn_tsrc_dsc_n,
|
489 |
|
|
trn_terrfwd_n => trn_terrfwd_n,
|
490 |
|
|
trn_tcfg_gnt_n => trn_tcfg_gnt_n,
|
491 |
|
|
trn_tstr_n => trn_tstr_n,
|
492 |
|
|
-- Transaction Rx
|
493 |
|
|
trn_rd => trn_rd,
|
494 |
|
|
trn_rsof_n => trn_rsof_n,
|
495 |
|
|
trn_reof_n => trn_reof_n,
|
496 |
|
|
trn_rsrc_rdy_n => trn_rsrc_rdy_n,
|
497 |
|
|
trn_rsrc_dsc_n => trn_rsrc_dsc_n,
|
498 |
|
|
trn_rerrfwd_n => trn_rerrfwd_n,
|
499 |
|
|
trn_rbar_hit_n => trn_rbar_hit_n,
|
500 |
|
|
trn_rdst_rdy_n => trn_rdst_rdy_n,
|
501 |
|
|
trn_rnp_ok_n => trn_rnp_ok_n,
|
502 |
|
|
|
503 |
|
|
-- Configuration (CFG) Interface
|
504 |
|
|
-- Configuration space access
|
505 |
|
|
cfg_do => cfg_do,
|
506 |
|
|
cfg_rd_wr_done_n => cfg_rd_wr_done_n,
|
507 |
|
|
cfg_dwaddr => cfg_dwaddr,
|
508 |
|
|
cfg_rd_en_n => cfg_rd_en_n,
|
509 |
|
|
-- Error signaling
|
510 |
|
|
cfg_err_cor_n => cfg_err_cor_n,
|
511 |
|
|
cfg_err_ur_n => cfg_err_ur_n,
|
512 |
|
|
cfg_err_ecrc_n => cfg_err_ecrc_n,
|
513 |
|
|
cfg_err_cpl_timeout_n => cfg_err_cpl_timeout_n,
|
514 |
|
|
cfg_err_cpl_abort_n => cfg_err_cpl_abort_n,
|
515 |
|
|
cfg_err_posted_n => cfg_err_posted_n,
|
516 |
|
|
cfg_err_locked_n => cfg_err_locked_n,
|
517 |
|
|
cfg_err_tlp_cpl_header => cfg_err_tlp_cpl_header,
|
518 |
|
|
cfg_err_cpl_rdy_n => cfg_err_cpl_rdy_n,
|
519 |
|
|
-- Interrupt generation
|
520 |
|
|
cfg_interrupt_n => cfg_interrupt_n,
|
521 |
|
|
cfg_interrupt_rdy_n => cfg_interrupt_rdy_n,
|
522 |
|
|
cfg_interrupt_assert_n => cfg_interrupt_assert_n,
|
523 |
|
|
cfg_interrupt_di => cfg_interrupt_di,
|
524 |
|
|
cfg_interrupt_do => cfg_interrupt_do,
|
525 |
|
|
cfg_interrupt_mmenable => cfg_interrupt_mmenable,
|
526 |
|
|
cfg_interrupt_msienable => cfg_interrupt_msienable,
|
527 |
|
|
-- Power managemnt signaling
|
528 |
|
|
cfg_turnoff_ok_n => cfg_turnoff_ok_n,
|
529 |
|
|
cfg_to_turnoff_n => cfg_to_turnoff_n,
|
530 |
|
|
cfg_trn_pending_n => cfg_trn_pending_n,
|
531 |
|
|
cfg_pm_wake_n => cfg_pm_wake_n,
|
532 |
|
|
-- System configuration and status
|
533 |
|
|
cfg_bus_number => cfg_bus_number,
|
534 |
|
|
cfg_device_number => cfg_device_number,
|
535 |
|
|
cfg_function_number => cfg_function_number,
|
536 |
|
|
cfg_status => cfg_status,
|
537 |
|
|
cfg_command => cfg_command,
|
538 |
|
|
cfg_dstatus => cfg_dstatus,
|
539 |
|
|
cfg_dcommand => cfg_dcommand,
|
540 |
|
|
cfg_lstatus => cfg_lstatus,
|
541 |
|
|
cfg_lcommand => cfg_lcommand,
|
542 |
|
|
cfg_pcie_link_state_n => cfg_pcie_link_state_n,
|
543 |
|
|
cfg_dsn => cfg_dsn,
|
544 |
|
|
|
545 |
|
|
dma_req => dma_req,
|
546 |
|
|
dma_compl => dma_compl,
|
547 |
|
|
dma_ack => dma_ack,
|
548 |
|
|
dma_add_dest=> dma_add_dest,
|
549 |
|
|
dma_data => dma_data,
|
550 |
|
|
dma_read => dma_read,
|
551 |
|
|
dma_size => dma_size,
|
552 |
|
|
|
553 |
|
|
rd_addr => rd_addr,
|
554 |
|
|
rd_data => rd_data,
|
555 |
|
|
rd_be => rd_be,
|
556 |
|
|
rd_en => rd_en,
|
557 |
|
|
wr_addr => wr_addr,
|
558 |
|
|
wr_data => wr_data,
|
559 |
|
|
wr_be => wr_be,
|
560 |
|
|
wr_en => wr_en,
|
561 |
|
|
wr_busy => wr_busy
|
562 |
|
|
);
|
563 |
|
|
|
564 |
|
|
s6_pcie_v1_4_i : s6_pcie_v1_4 generic map
|
565 |
|
|
(
|
566 |
|
|
FAST_TRAIN => fast_train
|
567 |
|
|
)
|
568 |
|
|
port map (
|
569 |
|
|
-- PCI Express (PCI_EXP) Fabric Interface
|
570 |
|
|
pci_exp_txp => pci_exp_txp,
|
571 |
|
|
pci_exp_txn => pci_exp_txn,
|
572 |
|
|
pci_exp_rxp => pci_exp_rxp,
|
573 |
|
|
pci_exp_rxn => pci_exp_rxn,
|
574 |
|
|
|
575 |
|
|
-- Transaction (TRN) Interface
|
576 |
|
|
-- Common clock & reset
|
577 |
|
|
trn_lnk_up_n => trn_lnk_up_buf_n,
|
578 |
|
|
trn_clk => trn_clk_buf,
|
579 |
|
|
trn_reset_n => trn_reset_buf_n,
|
580 |
|
|
-- Common flow control
|
581 |
|
|
trn_fc_sel => trn_fc_sel,
|
582 |
|
|
trn_fc_nph => trn_fc_nph,
|
583 |
|
|
trn_fc_npd => trn_fc_npd,
|
584 |
|
|
trn_fc_ph => trn_fc_ph,
|
585 |
|
|
trn_fc_pd => trn_fc_pd,
|
586 |
|
|
trn_fc_cplh => trn_fc_cplh,
|
587 |
|
|
trn_fc_cpld => trn_fc_cpld,
|
588 |
|
|
-- Transaction Tx
|
589 |
|
|
trn_td => trn_td,
|
590 |
|
|
trn_tsof_n => trn_tsof_n,
|
591 |
|
|
trn_teof_n => trn_teof_n,
|
592 |
|
|
trn_tsrc_rdy_n => trn_tsrc_rdy_n,
|
593 |
|
|
trn_tdst_rdy_n => trn_tdst_rdy_n,
|
594 |
|
|
trn_terr_drop_n => trn_terr_drop_n,
|
595 |
|
|
trn_tsrc_dsc_n => trn_tsrc_dsc_n,
|
596 |
|
|
trn_terrfwd_n => trn_terrfwd_n,
|
597 |
|
|
trn_tbuf_av => trn_tbuf_av,
|
598 |
|
|
trn_tstr_n => trn_tstr_n,
|
599 |
|
|
trn_tcfg_req_n => trn_tcfg_req_n,
|
600 |
|
|
trn_tcfg_gnt_n => trn_tcfg_gnt_n,
|
601 |
|
|
-- Transaction Rx
|
602 |
|
|
trn_rd => trn_rd,
|
603 |
|
|
trn_rsof_n => trn_rsof_n,
|
604 |
|
|
trn_reof_n => trn_reof_n,
|
605 |
|
|
trn_rsrc_rdy_n => trn_rsrc_rdy_n,
|
606 |
|
|
trn_rsrc_dsc_n => trn_rsrc_dsc_n,
|
607 |
|
|
trn_rdst_rdy_n => trn_rdst_rdy_n,
|
608 |
|
|
trn_rerrfwd_n => trn_rerrfwd_n,
|
609 |
|
|
trn_rnp_ok_n => trn_rnp_ok_n,
|
610 |
|
|
trn_rbar_hit_n => trn_rbar_hit_n,
|
611 |
|
|
|
612 |
|
|
-- Configuration (CFG) Interface
|
613 |
|
|
-- Configuration space access
|
614 |
|
|
cfg_do => cfg_do,
|
615 |
|
|
cfg_rd_wr_done_n => cfg_rd_wr_done_n,
|
616 |
|
|
cfg_dwaddr => cfg_dwaddr,
|
617 |
|
|
cfg_rd_en_n => cfg_rd_en_n,
|
618 |
|
|
-- Error reporting
|
619 |
|
|
cfg_err_ur_n => cfg_err_ur_n,
|
620 |
|
|
cfg_err_cor_n => cfg_err_cor_n,
|
621 |
|
|
cfg_err_ecrc_n => cfg_err_ecrc_n,
|
622 |
|
|
cfg_err_cpl_timeout_n => cfg_err_cpl_timeout_n,
|
623 |
|
|
cfg_err_cpl_abort_n => cfg_err_cpl_abort_n,
|
624 |
|
|
cfg_err_posted_n => cfg_err_posted_n,
|
625 |
|
|
cfg_err_locked_n => cfg_err_locked_n,
|
626 |
|
|
cfg_err_tlp_cpl_header => cfg_err_tlp_cpl_header,
|
627 |
|
|
cfg_err_cpl_rdy_n => cfg_err_cpl_rdy_n,
|
628 |
|
|
-- Interrupt generation
|
629 |
|
|
cfg_interrupt_n => cfg_interrupt_n,
|
630 |
|
|
cfg_interrupt_rdy_n => cfg_interrupt_rdy_n,
|
631 |
|
|
cfg_interrupt_assert_n => cfg_interrupt_assert_n,
|
632 |
|
|
cfg_interrupt_do => cfg_interrupt_do,
|
633 |
|
|
cfg_interrupt_di => cfg_interrupt_di,
|
634 |
|
|
cfg_interrupt_mmenable => cfg_interrupt_mmenable,
|
635 |
|
|
cfg_interrupt_msienable => cfg_interrupt_msienable,
|
636 |
|
|
-- Power management signaling
|
637 |
|
|
cfg_turnoff_ok_n => cfg_turnoff_ok_n,
|
638 |
|
|
cfg_to_turnoff_n => cfg_to_turnoff_n,
|
639 |
|
|
cfg_pm_wake_n => cfg_pm_wake_n,
|
640 |
|
|
cfg_pcie_link_state_n => cfg_pcie_link_state_n,
|
641 |
|
|
cfg_trn_pending_n => cfg_trn_pending_n,
|
642 |
|
|
-- System configuration and status
|
643 |
|
|
cfg_dsn => cfg_dsn,
|
644 |
|
|
cfg_bus_number => cfg_bus_number,
|
645 |
|
|
cfg_device_number => cfg_device_number,
|
646 |
|
|
cfg_function_number => cfg_function_number,
|
647 |
|
|
cfg_status => cfg_status,
|
648 |
|
|
cfg_command => cfg_command,
|
649 |
|
|
cfg_dstatus => cfg_dstatus,
|
650 |
|
|
cfg_dcommand => cfg_dcommand,
|
651 |
|
|
cfg_lstatus => cfg_lstatus,
|
652 |
|
|
cfg_lcommand => cfg_lcommand,
|
653 |
|
|
|
654 |
|
|
-- System (SYS) Interface
|
655 |
|
|
sys_clk => sys_clk_c,
|
656 |
|
|
sys_reset_n => sys_reset_n_c,
|
657 |
|
|
received_hot_reset => OPEN
|
658 |
|
|
);
|
659 |
|
|
|
660 |
|
|
end rtl;
|