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/* -----------------------------------------------------------------------------
 *
 *  SystemC to Verilog Translator v0.4
 *  Provided by OpenSoc Design
 *
 *  www.opensocdesign.com
 *
 * -----------------------------------------------------------------------------
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU Library General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */
 
 
%{
#include 
#include 
 
#include "sc2v_step1.h"
 
  int lineno = 1;
  int processfound = 0;
  int switchfound = 0;
  int lastswitch=0;
  int switchparenthesis[256];
  int ifdeffound = 0;
  char *processname, *processname2;
  char *fileregs;
  char *filename;
  int openedkeys = 0;
  int newline = 0;
  int reg_found = 0;
  int array_size=0;
  int integer_found=0;
  int regs_end;
  int i = 0;                    //for loops counter
  FILE *file;
  FILE *regs_file;
  char *regname, *regname2;
  char *lastword;               // Stores last WORD for use it in WRITE
  char *file_defines;
  FILE *FILE_DEFINES;
  char *file_writes;
  FILE *FILE_WRITES;            //FILE to store .write to know if it is a wire or reg
  int definefound = 0;
  int defineinvocationfound = 0;
  int opencorchfound = 0;
  int defineparenthesis = 0;
 
  int openedcase = 0;
 
  int default_break_found = 0;
  int default_found;
 
//Directives variables
  int translate;
  int verilog;
  int writemethod;
 
  void yyerror (const char *str)
  {
    fprintf (stderr, "line: %d error: %s\n", lineno, str);
  }
 
  int yywrap ()
  {
    return 1;
  }
 
  main ()
  {
    int i;
 
    defineslist = NULL;
    regslist = NULL;
 
    fprintf (stderr, "\nSystemC to Verilog Translator v0.4");
    fprintf (stderr,
             "\nProvided by OpenSoc http://www.opensocdesign.com\n\n");
    fprintf (stderr, "Parsing implementation file.......\n\n");
 
    processname = (char *) malloc (256 * sizeof (char));
    processname2 = (char *) malloc (256 * sizeof (char));
    fileregs = (char *) malloc (256 * sizeof (char));
 
    file_defines = (char *) malloc (256 * sizeof (char));
    strcpy (file_defines, (char *) "file_defines.sc2v");
    FILE_DEFINES = fopen (file_defines, (char *) "w");
 
    file_writes = (char *) malloc (256 * sizeof (char));
    strcpy (file_writes, (char *) "file_writes.sc2v");
    FILE_WRITES = fopen (file_writes, (char *) "w");
 
    lastword = (char *) malloc (sizeof (char) * 256);
 
    for (i = 0; i < 256; i++)
      switchparenthesis[i] = 0;
 
    translate = 1;
    verilog = 0;
    writemethod = 0;
 
    FILE *yyin = stdin;
    FILE *yyout = stdout;
    yyparse ();
    fclose (FILE_WRITES);
    fclose (FILE_DEFINES);
 
    fprintf (stderr, "\nDone\n\n");
  }
 
%}
 
%token NUMBER WORD SC_REG BOOL BIGGER LOWER OPENKEY CLOSEKEY WRITE WORD SYMBOL NEWLINE ENUM INCLUDE
%token COLON SEMICOLON RANGE OPENPAR CLOSEPAR TWODOUBLEPOINTS OPENCORCH CLOSECORCH SWITCH CASE DEFAULT BREAK
%token HEXA DEFINE READ TRANSLATEOFF TRANSLATEON VERILOGBEGIN VERILOGEND TAB DOLLAR MINEQ
%token VOID TTRUE TFALSE ENDFUNC INC DEC INTEGER EQUALS
%token PIFDEF PENDDEF PELSE
 
%% commands:    /* empty */
|commands command;
 
 
command:
endfunc
  |
  voidword
  |
  include
  |
  dollar
  |
  tab
  |
  read
  |
  sc_reg
  |
  integer
  |
  number
  |
  bool
  |
  word
  |
  symbol
  |
  write
  |
  newline
  |
  openkey
  |
  closekey
  |
  colon
  |
  semicolon
  |
  range
  |
  openpar
  |
  closepar
  |
  void
  |
  opencorch
  |
  closecorch
  |
  bigger
  |
  lower
  |
  switch
  |
  case_only
  |
  case_number
  |
  case_hexnumber
  |
  case_hexword
  |
  case_hexnumberword
  |
  case_word
  |
  case_default
  |
  break
  |
  hexa
  |
  definemacro
  |
  defineword
  |
  definenumber
  |
  translateoff
  |
  translateon
  |
  verilogbegin
  |
  verilogend
  |
  ifdef
  |
  endif
  |
  pelse
  |
  ttrue
  |
  tfalse
  |
  increment
  |
  decrement
  |
  equal
  |
  minorequal;
 
minorequal:
MINEQ
{
 //This rule is needed because <= in the step two could be confused with a non-blocking assignment
 defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "<1+");
        }
    }
  else if (verilog == 1)
    fprintf (file, "<=");
};
 
endfunc:
ENDFUNC
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          fprintf (file, "%s = ", processname);
        }
    }
  else if (verilog == 1)
    fprintf (file, "return ");
};
 
 
voidword:
VOID
{
  defineparenthesis = 0;
  if (verilog == 1)
    fprintf (file, " void");
};
 
 
include:
INCLUDE
{
  defineparenthesis = 0;
  if (verilog == 1)
    fprintf (file, " #include");
};
 
 
dollar:
DOLLAR
{
  defineparenthesis = 0;
  if (verilog == 1)
    fprintf (file, " $");
};
 
 
tab:
TAB
{
  defineparenthesis = 0;
  if (verilog == 1)
    fprintf (file, " \t");
};
 
read:
READ OPENPAR CLOSEPAR
{
  defineparenthesis = 0;
  if (verilog == 1)
    fprintf (file, ".read()");
 
}
 
defineword:
DEFINE WORD WORD
{
 
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "`define %s %s\n", (char *) $2, (char *) $3);
          defineslist = InsertDefine (defineslist, (char *) $2);
        }
      else
        {
          fprintf (FILE_DEFINES, "`define %s %s\n", (char *) $2, (char *) $3);
          defineslist = InsertDefine (defineslist, (char *) $2);
        }
    }
  else if (verilog == 1)
    fprintf (file, "#define %s %s\n", (char *) $2, (char *) $3);
 
};
 
definenumber:
DEFINE WORD NUMBER
{
 
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "`define %s %d\n", (char *) $2, (int) $3);
          defineslist = InsertDefine (defineslist, (char *) $2);
        }
      else
        {
          fprintf (FILE_DEFINES, "`define %s %d\n", (char *) $2, (int) $3);
          defineslist = InsertDefine (defineslist, (char *) $2);
        }
    }
  else if (verilog == 1)
    fprintf (file, "#define %s %d\n", (char *) $2, (int) $3);
 
};
 
 
definemacro:
DEFINE WORD OPENPAR CLOSEPAR
{
  defineparenthesis = 0;
  //Macro found
  if (translate == 1 && verilog == 0)
    {
      defineslist = InsertDefine (defineslist, (char *) $2);
 
      definefound = 1;
      if (processfound)
        fprintf (file, "`define %s ", (char *) $2);
      else
        fprintf (FILE_DEFINES, "`define %s ", (char *) $2);
    }
  else if (verilog == 1)
    fprintf (file, "#define %s ()", (char *) $2);
}
 
void:
WORD TWODOUBLEPOINTS WORD OPENPAR
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      strcpy (processname, (char *) $4);
      strcpy (processname2, (char *) $4);
      strcat (processname2, (char *) ".sc2v");
      strcpy (fileregs, (char *) $4);
      strcat (fileregs, (char *) "_regs.sc2v");
    }
  else if (verilog == 1)
    fprintf (file, " %s::%s()", (char *) $1, (char *) $3);
 
}
 
sc_reg:
SC_REG LOWER NUMBER BIGGER
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (regs_file, "reg[%d:0] ", (-1 + $3));
          reg_found = 1;
        }
    }
};
 
integer:
INTEGER
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (regs_file, "integer ");
          integer_found = 1;
        }
    }
};
 
 
bool:
BOOL
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (regs_file, "reg ");
          reg_found = 1;
        }
    }
  else if (verilog == 1)
    fprintf (file, "bool");
}
 
;
 
range:
RANGE OPENPAR NUMBER COLON NUMBER CLOSEPAR
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        fprintf (file, "[%d:%d]", $3, $5);
      else if (definefound)
        fprintf (FILE_DEFINES, "[%d:%d]", $3, $5);
    }
  else if (verilog == 1)
    fprintf (file, ".range(%d,%d)", $3, $5);
}
 
;
 
number:
NUMBER
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        if (reg_found)
          {
            if (opencorchfound)
              fprintf (regs_file, "%d:0", -1 + $1);
            else
              fprintf (regs_file, "%d", $1);
          }
        else
          fprintf (file, "%d", $1);
      else if (definefound)
        fprintf (FILE_DEFINES, "%d", $1);
    }
  else if (verilog == 1)
    fprintf (file, "%d", $1);
};
 
increment:
WORD INC
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
       if (processfound){
        regname2 = IsReg (regslist, (char *) $1);
        if (regname2 == NULL){
            fprintf (file, "%s=%s+1", (char *) $1,(char *)$1);
        }else
            fprintf (file, "%s=%s+1", regname2,regname2);
       }
  else if (verilog == 1)
    fprintf (file, "%s++ ", (char *) $1);
};
 
decrement:
WORD DEC
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
      if (processfound){
        regname2 = IsReg (regslist, (char *) $1);
        if (regname2 == NULL){
            fprintf (file, "%s=%s+1", (char *) $1,(char *)$1);
        }else
            fprintf (file, "%s=%s+1", regname2,regname2);
      }
  else if (verilog == 1)
    fprintf (file, "%s-- ", (char *) $1);
};
 
word:
WORD
{
 
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if(lastswitch){
            openedcase=0;
          }else if (openedcase)
            {
              fprintf (file, " :\n");
 
              for (i = 0; i < openedkeys; i++)
                fprintf (file, "   ");
 
              fprintf(file,"begin\n");
              openedcase=0;
            }
 
          strcpy (lastword, (char *) $1);
 
          if (reg_found)
            {
              regname = (char *) malloc (sizeof (char) * (strlen ((char *) $1) + 1));
              regname2 = (char *) malloc (sizeof (char) * (strlen ((char *) $1) + strlen (processname)) + 1);
              strcpy (regname, (char *) $1);
              strcpy (regname2, (char *) $1);
              strcat (regname2, processname);
              fprintf (regs_file, "%s", regname2);
 
              regslist = InsertReg (regslist, regname, regname2);
              free (regname);
              free (regname2);
            }
          else if(integer_found){
              regname = (char *) malloc (sizeof (char) * (strlen ((char *) $1) + 1));
              regname2 = (char *) malloc (sizeof (char) * (strlen ((char *) $1) + strlen (processname)) + 1);
              strcpy (regname, (char *) $1);
              strcpy (regname2, (char *) $1);
              strcat (regname2, processname);
              fprintf (regs_file, "%s;\n", regname2);
 
              regslist = InsertReg (regslist, regname, regname2);
 
              //After adding to list print it
              fprintf (file, "%s ", regname2);
              integer_found=0;
              free (regname);
              free (regname2);
 
          }else
            {
              if (newline)
                {
                  for (i = 0; i < openedkeys; i++)
                    fprintf (file, "   ");
                }
              regname2 = IsReg (regslist, (char *) $1);
              if (regname2 == NULL)
                {
 
                  if (IsDefine (defineslist, (char *) $1))
                    {
                      if (ifdeffound == 0)
                        {
                          fprintf (file, "`%s", (char *) $1);
                          defineinvocationfound = 1;
                        }
                      else
                        {
                          fprintf (file, "%s", (char *) $1);
                          ifdeffound = 0;
                        }
                    }
                  else
                    {
                      fprintf (file, "%s ", (char *) $1);
                    }
                }
              else
                fprintf (file, "%s", regname2);
 
              newline = 0;
            }
 
        }
      else if (definefound)
        {
 
          if (IsDefine (defineslist, (char *) $1))
            {
 
              fprintf (FILE_DEFINES, "`%s", (char *) $1);
            }
          else
            {
              fprintf (FILE_DEFINES, "%s ", (char *) $1);
            }
        }
    }
  else if (verilog == 1)
    fprintf (file, "%s ", (char *) $1);
  lastswitch=0;
};
 
symbol:
SYMBOL
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if (reg_found)
            fprintf (regs_file, "%s", (char *) $1);
          else
            fprintf (file, "%s", (char *) $1);
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "%s", (char *) $1);
        }
    }
  else if (verilog == 1)
    fprintf (file, "%s", (char *) $1);
};
 
equal:
EQUALS
{
  defineparenthesis = 0;
  reg_found=0;
  if (translate == 1 && verilog == 0)
  {
      if (processfound)
        fprintf (file, "=");
  }
  else if (definefound)
    fprintf (FILE_DEFINES, "=");
  else if (verilog == 1)
    fprintf (file, "=");
 
}
 
write:
WRITE
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      writemethod = 1;
      if (processfound)
        {
          fprintf (file, " <= ");
          fprintf (FILE_WRITES, "%s\n", lastword);
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, " <= ");
        }
 
    }
  else if (verilog == 1)
    {
      fprintf (file, ".write");
    }
};
 
newline:
NEWLINE
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound & !reg_found & !openedcase)
        {
          fprintf (file, "\n");
          newline = 1;
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "\n");
        }
 
    }
  else if (verilog == 1)
    fprintf (file, "\n");
};
 
colon:
COLON
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if (reg_found)
            {
              fprintf (regs_file, ",");
            }
          else
            fprintf (file, ",");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, ",");
        }
    }
  else if (verilog == 1)
    fprintf (file, ",");
};
 
semicolon:
SEMICOLON
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if (reg_found)
            {
              fprintf (regs_file, ";\n");
              reg_found = 0;
            }
          else
            {
              if (defineinvocationfound == 0)
                fprintf (file, ";");
            }
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, ";");
        }
    }
  else if (verilog == 1)
    fprintf (file, ";");
 
  defineinvocationfound = 0;
};
 
 
openpar:
OPENPAR
{
  defineparenthesis = 1;
  if (translate == 1 && verilog == 0 && defineinvocationfound == 0)
    {
      if (processfound)
        {
          fprintf (file, "(");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "(");
        }
 
    }
  else if (verilog == 1)
    {
      fprintf (file, "(");
    }
  //If par after a sc_reg declaration the declaration is a type cast
  reg_found=0;
}
 
closepar:
CLOSEPAR
{
  if (translate == 1 && verilog == 0)
    {
 
      if (processfound)
        {
          if (defineparenthesis == 0)
            {
              fprintf (file, ")");
              defineinvocationfound = 0;
            }
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, ")");
        }
    }
  else if (verilog == 1)
    fprintf (file, ")");
 
};
 
 
opencorch:
OPENCORCH
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if (reg_found)
            {
              fprintf (regs_file, "[");
              opencorchfound = 1;
            }
          else
            fprintf (file, "[");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "[");
 
        }
    }
  else if (verilog == 1)
    fprintf (file, "[");
};
 
closecorch:
CLOSECORCH
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if (reg_found)
            {
              fprintf (regs_file, "]");
              opencorchfound = 0;
            }
          else
            fprintf (file, "]");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "]");
        }
    }
  else if (verilog == 1)
    fprintf (file, "]");
};
 
 
openkey:
OPENKEY
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      openedkeys++;
      if (!definefound)
        {
          if (openedkeys == 1)
            {
              printf ("Found process %s\n", processname);
              file = fopen (processname2, (char *) "w");
              regs_file = fopen (fileregs, (char *) "w");
              processfound = 1;
            }
          if (processfound)
            if (openedkeys != switchparenthesis[switchfound])
              {
                fprintf (file, "\n");
                for (i = 0; i < openedkeys; i++)
                  fprintf (file, "   ");
                fprintf (file, "begin\n");
                newline = 1;
              }
        }
    }
  else if (verilog == 1)
    fprintf (file, "{");
};
 
closekey:
CLOSEKEY
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound && !definefound)
        {
          if (openedkeys == switchparenthesis[switchfound] && switchfound > 0)
            {
              fprintf (file, "\n");
              if (default_found & !default_break_found)
                {
                  for (i = 0; i < openedkeys - 1; i++)
                    fprintf (file, "   ");
                  fprintf (file, "end\n");
                  default_found = 0;
                }
              for (i = 0; i < openedkeys - 1; i++)
                fprintf (file, "   ");
              fprintf (file, "endcase\n");
              newline = 1;
              switchparenthesis[switchfound] = 0;
              switchfound--;
 
            }
          else
            {
              fprintf (file, "\n");
              for (i = 0; i < openedkeys; i++)
                fprintf (file, "   ");
              fprintf (file, "end\n");
              newline = 1;
            }
        }
 
      openedkeys--;
      if (definefound)
        {
          definefound = 0;
          if (processfound)
            fprintf (file, "\n//Dummy Comment\n");
          else
            fprintf (FILE_DEFINES, "\n//Dummy Comment\n");
        }
      else if (openedkeys == 0)
        {
          fclose (file);
          fclose (regs_file);
          processfound = 0;
        }
    }
  else if (verilog == 1)
    fprintf (file, "}");
};
 
 
bigger:
BIGGER
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, ">");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, ">");
        }
    }
  else if (verilog == 1)
    fprintf (file, ">");
};
 
lower:
LOWER
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "<");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "<");
        }
    }
  else if (verilog == 1)
    fprintf (file, "<");
};
 
 
switch:
SWITCH
  {
    defineparenthesis = 0;
    lastswitch=1;
    if (translate == 1 && verilog == 0)
      {
        if (processfound && !openedcase)
          {
            fprintf (file, "\n");
            for (i = 0; i < openedkeys; i++)
              fprintf (file, "   ");
            fprintf (file, "case");
            switchfound++;
            switchparenthesis[switchfound] = openedkeys + 1;
          }else if (processfound)
          {
            fprintf (file, ":\n");
            for (i = 0; i < openedkeys; i++)
              fprintf (file, "   ");
            fprintf(file,"begin\n");
            for (i = 0; i < openedkeys; i++)
              fprintf (file, "   ");
            fprintf (file, "case");
            switchfound++;
            switchparenthesis[switchfound] = openedkeys + 1;
          }
      }
    else if (verilog == 1)
      fprintf (file, "switch");
  };
 
case_number:
CASE NUMBER SYMBOL
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
         if (!openedcase)
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          if (openedcase)
            fprintf (file, ", %d", $2);
          else
            fprintf (file, "%d", $2);
 
          newline = 1;
          openedcase = 1;
 
        }
    }
  else if (verilog == 1)
    fprintf (file, "case %d %s", $2, (char *) $3);
};
 
case_hexnumber:
CASE HEXA NUMBER SYMBOL
{
  //Is a dec number
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
         if (!openedcase)
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          if (openedcase)
            fprintf (file, ", 'h%d", $3);
          else
            fprintf (file, "'h%d", $3);
 
          newline = 1;
          openedcase = 1;
 
        }
    }
  else if (verilog == 1)
    fprintf (file, "case %d %s", $3, (char *) $4);
};
 
case_hexword:
CASE HEXA WORD SYMBOL
{
  //Begin with a-F
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
         if (!openedcase)
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          if (openedcase)
            fprintf (file, ", 'h%s", (char *)$3);
          else
            fprintf (file, "'h%s", (char *)$3);
 
          newline = 1;
          openedcase = 1;
 
        }
    }
  else if (verilog == 1)
    fprintf (file, "case 0x%s %s", (char *)$3, (char *) $4);
};
 
case_hexnumberword:
CASE HEXA NUMBER WORD SYMBOL
{
  //Hex number beginning with dec number
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
         if (!openedcase)
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          if (openedcase)
            fprintf (file, ", 'h%d%s", $3,(char *)$4);
          else
            fprintf (file, "'h%d%s", $3,(char *)$4);
 
          newline = 1;
          openedcase = 1;
 
        }
    }
  else if (verilog == 1)
    fprintf (file, "case %d%s %s", $3, (char *) $4, (char *)$5);
};
 
case_word:
CASE WORD SYMBOL
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
         if (!openedcase)
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          if (openedcase)
            fprintf (file, ", %s", (char *) $2);
          else
            fprintf (file, "%s", (char *) $2);
 
          newline = 1;
          openedcase = 1;
 
        }
    }
  else if (verilog == 1)
    fprintf (file, "case %s %s", (char *) $2, (char *) $3);
};
 
case_default:
DEFAULT SYMBOL
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
         if (!openedcase)
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          fprintf (file, "default:\n");
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          fprintf (file, "begin\n");
          newline = 1;
          default_found = 1;
        }
    }
  else if (verilog == 1)
    fprintf (file, "default %s", (char *) $2);
};
 
case_only:
CASE OPENPAR
{
  defineparenthesis = 0;
  //This rule occurs when in Verilog mode a case appears
  if (verilog == 1)
    fprintf (file, "case(");
};
 
break:
BREAK SEMICOLON
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          if (newline == 0)
            fprintf (file, "\n");
          for (i = 0; i < openedkeys; i++)
            fprintf (file, "   ");
          fprintf (file, "end\n");
          if (default_found)
            {
              default_break_found = 1;
            }
        }
    }
  else if (verilog == 1)
    fprintf (file, "break;");
};
 
hexa:
HEXA
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "'h");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "'h");
        }
    }
  else if (verilog == 1)
    fprintf (file, "0x");
};
 
translateoff:
TRANSLATEOFF
{
  defineparenthesis = 0;
  translate = 0;
  fprintf (stderr, "line: %d Found Translate off directive \n", lineno);
};
 
translateon:
TRANSLATEON
{
  defineparenthesis = 0;
  translate = 1;
  fprintf (stderr, "line: %d Found Translate on directive \n", lineno);
};
 
verilogbegin:
VERILOGBEGIN
{
  defineparenthesis = 0;
  verilog = 1;
  fprintf (stderr, "line: %d Found Verilog Begin directive \n", lineno);
};
 
verilogend:
VERILOGEND
{
  defineparenthesis = 0;
  verilog = 0;
  fprintf (stderr, "line: %d Found Verilog End directive \n", lineno);
};
 
ifdef:
PIFDEF
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          ifdeffound = 1;
          fprintf (file, "`ifdef");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "`ifdef");
        }
    }
  else if (verilog == 1)
    fprintf (file, "#ifdef");
};
 
endif:
PENDDEF
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "`endif");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "`endif");
        }
    }
  else if (verilog == 1)
    fprintf (file, "#endif");
};
 
pelse:
PELSE
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "`else");
        }
      else if (definefound)
        {
          fprintf (FILE_DEFINES, "`else");
        }
    }
  else if (verilog == 1)
    fprintf (file, "#else");
};
 
ttrue:
TTRUE
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "1");
        }
    }
  else if (verilog == 1)
    fprintf (file, "1");
};
 
 
tfalse:
TFALSE
{
  defineparenthesis = 0;
  if (translate == 1 && verilog == 0)
    {
      if (processfound)
        {
          fprintf (file, "0");
        }
    }
  else if (verilog == 1)
    fprintf (file, "0");
};

Line No.	Rev	Author	Line
1	2	jcastillo	`/* -----------------------------------------------------------------------------`
2			`*`
3	16	jcastillo	`* SystemC to Verilog Translator v0.4`
4	2	jcastillo	`* Provided by OpenSoc Design`
5			`*`
6			`* www.opensocdesign.com`
7			`*`
8			`* -----------------------------------------------------------------------------`
9			`* This program is free software; you can redistribute it and/or modify`
10			`* it under the terms of the GNU General Public License as published by`
11			`* the Free Software Foundation; either version 2 of the License, or`
12			`* (at your option) any later version.`
13			`*`
14			`* This program is distributed in the hope that it will be useful,`
15			`* but WITHOUT ANY WARRANTY; without even the implied warranty of`
16			`* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
17			`* GNU Library General Public License for more details.`
18			`*`
19			`* You should have received a copy of the GNU General Public License`
20			`* along with this program; if not, write to the Free Software`
21			`* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.`
22			`*/`
23
24
25			`%{`
26			`#include`
27			`#include`
28
29	14	jcastillo	`#include "sc2v_step1.h"`
30	2	jcastillo
31	16	jcastillo	`int lineno = 1;`
32	12	jcastillo	`int processfound = 0;`
33			`int switchfound = 0;`
34	23	jcastillo	`int lastswitch=0;`
35	12	jcastillo	`int switchparenthesis[256];`
36			`int ifdeffound = 0;`
37			`char processname, processname2;`
38			`char *fileregs;`
39			`char *filename;`
40			`int openedkeys = 0;`
41			`int newline = 0;`
42			`int reg_found = 0;`
43	20	jcastillo	`int array_size=0;`
44	19	jcastillo	`int integer_found=0;`
45	12	jcastillo	`int regs_end;`
46			`int i = 0; //for loops counter`
47			`FILE *file;`
48			`FILE *regs_file;`
49			`char regname, regname2;`
50			`char *lastword; // Stores last WORD for use it in WRITE`
51			`char *file_defines;`
52			`FILE *FILE_DEFINES;`
53			`char *file_writes;`
54			`FILE *FILE_WRITES; //FILE to store .write to know if it is a wire or reg`
55			`int definefound = 0;`
56			`int defineinvocationfound = 0;`
57			`int opencorchfound = 0;`
58			`int defineparenthesis = 0;`
59	2	jcastillo
60	12	jcastillo	`int openedcase = 0;`
61	2	jcastillo
62	12	jcastillo	`int default_break_found = 0;`
63			`int default_found;`
64	2	jcastillo
65	4	jcastillo	`//Directives variables`
66	12	jcastillo	`int translate;`
67			`int verilog;`
68			`int writemethod;`
69	4	jcastillo
70	12	jcastillo	`void yyerror (const char *str)`
71			`{`
72	15	jcastillo	`fprintf (stderr, "line: %d error: %s\n", lineno, str);`
73	12	jcastillo	`}`
74	2	jcastillo
75	12	jcastillo	`int yywrap ()`
76			`{`
77			`return 1;`
78			`}`
79	2	jcastillo
80	12	jcastillo	`main ()`
81			`{`
82			`int i;`
83	10	jcastillo
84	16	jcastillo	`defineslist = NULL;`
85			`regslist = NULL;`
86	2	jcastillo
87	18	jcastillo	`fprintf (stderr, "\nSystemC to Verilog Translator v0.4");`
88	16	jcastillo	`fprintf (stderr,`
89			`"\nProvided by OpenSoc http://www.opensocdesign.com\n\n");`
90			`fprintf (stderr, "Parsing implementation file.......\n\n");`
91
92	14	jcastillo	`processname = (char ) malloc (256 sizeof (char));`
93			`processname2 = (char ) malloc (256 sizeof (char));`
94			`fileregs = (char ) malloc (256 sizeof (char));`
95	12	jcastillo
96	14	jcastillo	`file_defines = (char ) malloc (256 sizeof (char));`
97	12	jcastillo	`strcpy (file_defines, (char *) "file_defines.sc2v");`
98			`FILE_DEFINES = fopen (file_defines, (char *) "w");`
99	16	jcastillo
100	14	jcastillo	`file_writes = (char ) malloc (256 sizeof (char));`
101	12	jcastillo	`strcpy (file_writes, (char *) "file_writes.sc2v");`
102			`FILE_WRITES = fopen (file_writes, (char *) "w");`
103
104	16	jcastillo	`lastword = (char ) malloc (sizeof (char) 256);`
105	12	jcastillo
106			`for (i = 0; i < 256; i++)`
107			`switchparenthesis[i] = 0;`
108
109			`translate = 1;`
110			`verilog = 0;`
111			`writemethod = 0;`
112	16	jcastillo
113			`FILE *yyin = stdin;`
114			`FILE *yyout = stdout;`
115	12	jcastillo	`yyparse ();`
116			`fclose (FILE_WRITES);`
117			`fclose (FILE_DEFINES);`
118	16	jcastillo
119			`fprintf (stderr, "\nDone\n\n");`
120	12	jcastillo	`}`
121
122	2	jcastillo	`%}`
123
124	16	jcastillo	`%token NUMBER WORD SC_REG BOOL BIGGER LOWER OPENKEY CLOSEKEY WRITE WORD SYMBOL NEWLINE ENUM INCLUDE`
125			`%token COLON SEMICOLON RANGE OPENPAR CLOSEPAR TWODOUBLEPOINTS OPENCORCH CLOSECORCH SWITCH CASE DEFAULT BREAK`
126	19	jcastillo	`%token HEXA DEFINE READ TRANSLATEOFF TRANSLATEON VERILOGBEGIN VERILOGEND TAB DOLLAR MINEQ`
127			`%token VOID TTRUE TFALSE ENDFUNC INC DEC INTEGER EQUALS`
128	12	jcastillo	`%token PIFDEF PENDDEF PELSE`
129	2	jcastillo
130	16	jcastillo	`%% commands: /* empty */`
131	12	jcastillo	`\|commands command;`
132	2	jcastillo
133
134			`command:`
135	16	jcastillo	`endfunc`
136			`\|`
137	12	jcastillo	`voidword`
138			`\|`
139			`include`
140			`\|`
141			`dollar`
142			`\|`
143			`tab`
144			`\|`
145			`read`
146			`\|`
147	16	jcastillo	`sc_reg`
148	12	jcastillo	`\|`
149	19	jcastillo	`integer`
150			`\|`
151	12	jcastillo	`number`
152			`\|`
153			`bool`
154			`\|`
155			`word`
156			`\|`
157			`symbol`
158			`\|`
159			`write`
160			`\|`
161			`newline`
162			`\|`
163			`openkey`
164			`\|`
165			`closekey`
166			`\|`
167			`colon`
168			`\|`
169			`semicolon`
170			`\|`
171			`range`
172			`\|`
173			`openpar`
174			`\|`
175	19	jcastillo	`closepar`
176			`\|`
177			`void`
178			`\|`
179			`opencorch`
180			`\|`
181			`closecorch`
182			`\|`
183			`bigger`
184			`\|`
185			`lower`
186			`\|`
187			`switch`
188			`\|`
189			`case_only`
190			`\|`
191			`case_number`
192			`\|`
193			`case_hexnumber`
194			`\|`
195	24	jcastillo	`case_hexword`
196			`\|`
197			`case_hexnumberword`
198			`\|`
199	19	jcastillo	`case_word`
200			`\|`
201			`case_default`
202			`\|`
203			`break`
204			`\|`
205			`hexa`
206			`\|`
207			`definemacro`
208			`\|`
209			`defineword`
210			`\|`
211			`definenumber`
212			`\|`
213			`translateoff`
214			`\|`
215			`translateon`
216			`\|`
217			`verilogbegin`
218			`\|`
219			`verilogend`
220			`\|`
221			`ifdef`
222			`\|`
223			`endif`
224			`\|`
225			`pelse`
226			`\|`
227			`ttrue`
228			`\|`
229			`tfalse`
230			`\|`
231			`increment`
232			`\|`
233			`decrement`
234			`\|`
235			`equal`
236			`\|`
237			`minorequal;`
238	2	jcastillo
239	19	jcastillo	`minorequal:`
240			`MINEQ`
241			`{`
242			`//This rule is needed because <= in the step two could be confused with a non-blocking assignment`
243			`defineparenthesis = 0;`
244			`if (translate == 1 && verilog == 0)`
245			`{`
246			`if (processfound)`
247			`{`
248			`fprintf (file, "<1+");`
249			`}`
250			`}`
251			`else if (verilog == 1)`
252			`fprintf (file, "<=");`
253			`};`
254	4	jcastillo
255	16	jcastillo	`endfunc:`
256			`ENDFUNC`
257			`{`
258			`defineparenthesis = 0;`
259			`if (translate == 1 && verilog == 0)`
260			`{`
261			`if (processfound)`
262			`{`
263			`for (i = 0; i < openedkeys; i++)`
264			`fprintf (file, " ");`
265			`fprintf (file, "%s = ", processname);`
266			`}`
267			`}`
268			`else if (verilog == 1)`
269			`fprintf (file, "return ");`
270			`};`
271	12	jcastillo
272	16	jcastillo
273	4	jcastillo	`voidword:`
274	12	jcastillo	`VOID`
275			`{`
276			`defineparenthesis = 0;`
277			`if (verilog == 1)`
278			`fprintf (file, " void");`
279			`};`
280	4	jcastillo
281	12	jcastillo
282	4	jcastillo	`include:`
283	12	jcastillo	`INCLUDE`
284			`{`
285			`defineparenthesis = 0;`
286			`if (verilog == 1)`
287			`fprintf (file, " #include");`
288			`};`
289	4	jcastillo
290
291			`dollar:`
292	12	jcastillo	`DOLLAR`
293			`{`
294			`defineparenthesis = 0;`
295			`if (verilog == 1)`
296			`fprintf (file, " $");`
297			`};`
298	4	jcastillo
299
300			`tab:`
301	12	jcastillo	`TAB`
302			`{`
303			`defineparenthesis = 0;`
304			`if (verilog == 1)`
305			`fprintf (file, " \t");`
306			`};`
307
308	2	jcastillo	`read:`
309	12	jcastillo	`READ OPENPAR CLOSEPAR`
310			`{`
311			`defineparenthesis = 0;`
312			`if (verilog == 1)`
313			`fprintf (file, ".read()");`
314	4	jcastillo
315	12	jcastillo	`}`
316
317			`defineword:`
318			`DEFINE WORD WORD`
319			`{`
320	16	jcastillo
321	12	jcastillo	`defineparenthesis = 0;`
322			`if (translate == 1 && verilog == 0)`
323			`{`
324			`if (processfound)`
325			`{`
326			fprintf (file, "`define %s %s\n", (char ) $2, (char ) $3);
327	16	jcastillo	`defineslist = InsertDefine (defineslist, (char *) $2);`
328	12	jcastillo	`}`
329			`else`
330			`{`
331			fprintf (FILE_DEFINES, "`define %s %s\n", (char ) $2, (char ) $3);
332	16	jcastillo	`defineslist = InsertDefine (defineslist, (char *) $2);`
333	12	jcastillo	`}`
334			`}`
335			`else if (verilog == 1)`
336			`fprintf (file, "#define %s %s\n", (char ) $2, (char ) $3);`
337
338			`};`
339
340			`definenumber:`
341			`DEFINE WORD NUMBER`
342			`{`
343	16	jcastillo
344	12	jcastillo	`defineparenthesis = 0;`
345			`if (translate == 1 && verilog == 0)`
346			`{`
347			`if (processfound)`
348			`{`
349			fprintf (file, "`define %s %d\n", (char *) $2, (int) $3);
350	16	jcastillo	`defineslist = InsertDefine (defineslist, (char *) $2);`
351	12	jcastillo	`}`
352			`else`
353			`{`
354			fprintf (FILE_DEFINES, "`define %s %d\n", (char *) $2, (int) $3);
355	16	jcastillo	`defineslist = InsertDefine (defineslist, (char *) $2);`
356	12	jcastillo	`}`
357			`}`
358			`else if (verilog == 1)`
359			`fprintf (file, "#define %s %d\n", (char *) $2, (int) $3);`
360
361			`};`
362
363
364			`definemacro:`
365			`DEFINE WORD OPENPAR CLOSEPAR`
366			`{`
367			`defineparenthesis = 0;`
368			`//Macro found`
369			`if (translate == 1 && verilog == 0)`
370			`{`
371	16	jcastillo	`defineslist = InsertDefine (defineslist, (char *) $2);`
372
373	12	jcastillo	`definefound = 1;`
374			`if (processfound)`
375			fprintf (file, "`define %s ", (char *) $2);
376			`else`
377			fprintf (FILE_DEFINES, "`define %s ", (char *) $2);
378			`}`
379			`else if (verilog == 1)`
380			`fprintf (file, "#define %s ()", (char *) $2);`
381			`}`
382
383	19	jcastillo	`void:`
384			`WORD TWODOUBLEPOINTS WORD OPENPAR`
385	12	jcastillo	`{`
386			`defineparenthesis = 0;`
387			`if (translate == 1 && verilog == 0)`
388			`{`
389			`strcpy (processname, (char *) $4);`
390			`strcpy (processname2, (char *) $4);`
391			`strcat (processname2, (char *) ".sc2v");`
392			`strcpy (fileregs, (char *) $4);`
393			`strcat (fileregs, (char *) "_regs.sc2v");`
394			`}`
395			`else if (verilog == 1)`
396			`fprintf (file, " %s::%s()", (char ) $1, (char ) $3);`
397
398			`}`
399
400	16	jcastillo	`sc_reg:`
401			`SC_REG LOWER NUMBER BIGGER`
402	12	jcastillo	`{`
403			`defineparenthesis = 0;`
404			`if (translate == 1 && verilog == 0)`
405			`{`
406			`if (processfound)`
407			`{`
408			`fprintf (regs_file, "reg[%d:0] ", (-1 + $3));`
409			`reg_found = 1;`
410			`}`
411			`}`
412	16	jcastillo	`};`
413	2	jcastillo
414	19	jcastillo	`integer:`
415			`INTEGER`
416			`{`
417			`defineparenthesis = 0;`
418			`if (translate == 1 && verilog == 0)`
419			`{`
420			`if (processfound)`
421			`{`
422			`fprintf (regs_file, "integer ");`
423			`integer_found = 1;`
424			`}`
425			`}`
426			`};`
427
428
429	2	jcastillo	`bool:`
430	12	jcastillo	`BOOL`
431			`{`
432			`defineparenthesis = 0;`
433			`if (translate == 1 && verilog == 0)`
434			`{`
435			`if (processfound)`
436			`{`
437			`fprintf (regs_file, "reg ");`
438			`reg_found = 1;`
439			`}`
440			`}`
441			`else if (verilog == 1)`
442			`fprintf (file, "bool");`
443			`}`
444	2	jcastillo
445	12	jcastillo	`;`
446
447	2	jcastillo	`range:`
448	12	jcastillo	`RANGE OPENPAR NUMBER COLON NUMBER CLOSEPAR`
449			`{`
450			`defineparenthesis = 0;`
451			`if (translate == 1 && verilog == 0)`
452			`{`
453			`if (processfound)`
454			`fprintf (file, "[%d:%d]", $3, $5);`
455			`else if (definefound)`
456			`fprintf (FILE_DEFINES, "[%d:%d]", $3, $5);`
457			`}`
458			`else if (verilog == 1)`
459			`fprintf (file, ".range(%d,%d)", $3, $5);`
460			`}`
461
462			`;`
463
464			`number:`
465			`NUMBER`
466			`{`
467			`defineparenthesis = 0;`
468			`if (translate == 1 && verilog == 0)`
469			`{`
470			`if (processfound)`
471			`if (reg_found)`
472			`{`
473			`if (opencorchfound)`
474			`fprintf (regs_file, "%d:0", -1 + $1);`
475			`else`
476			`fprintf (regs_file, "%d", $1);`
477			`}`
478			`else`
479			`fprintf (file, "%d", $1);`
480			`else if (definefound)`
481			`fprintf (FILE_DEFINES, "%d", $1);`
482			`}`
483			`else if (verilog == 1)`
484			`fprintf (file, "%d", $1);`
485	19	jcastillo	`};`
486	12	jcastillo
487	19	jcastillo	`increment:`
488			`WORD INC`
489			`{`
490			`defineparenthesis = 0;`
491			`if (translate == 1 && verilog == 0)`
492			`if (processfound){`
493			`regname2 = IsReg (regslist, (char *) $1);`
494			`if (regname2 == NULL){`
495			`fprintf (file, "%s=%s+1", (char ) $1,(char )$1);`
496			`}else`
497			`fprintf (file, "%s=%s+1", regname2,regname2);`
498			`}`
499			`else if (verilog == 1)`
500			`fprintf (file, "%s++ ", (char *) $1);`

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[/] [sc2v/] [trunk/] [src/] [sc2v_step1.y] - Blame information for rev 24