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[/] [scarm/] [trunk/] [src/] [Instructions/] [scARMDPI.cpp] - Blame information for rev 8

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// scARMDPI.cpp: implementation of the scARMDPI class.
//
//////////////////////////////////////////////////////////////////////
 
#include "scARMDPI.h"
 
//////////////////////////////////////////////////////////////////////
// Construction/Destruction
//////////////////////////////////////////////////////////////////////
 
scARMDPI::scARMDPI()
{
 
}
 
scARMDPI::~scARMDPI()
{
 
}
 
void scARMDPI::Decode(uint32_t)
{
 
 
}
 
 
REGS scARMDPI::get_Rn(uint32_t nI)
{
        REGS r;
   uint32_t nR;
   //0000,0001,1110,0000,0000,0000,0000,0000
   //
   nR=((nI>>16)&0x0000000f);
 
   switch(nR)
   {
   case 0x0:{r=R_R0;break;}
   case 0x1:{r=R_R1;break;}
   case 0x2:{r=R_R2;break;}
   case 0x3:{r=R_R3;break;}
   case 0x4:{r=R_R4;break;}
   case 0x5:{r=R_R5;break;}
   case 0x6:{r=R_R6;break;}
   case 0x7:{r=R_R7;break;}
   case 0x8:{r=R_R8;break;}
   case 0x9:{r=R_R9;break;}
   case 0xa:{r=R_R10;break;}
   case 0xb:{r=R_FP;break;}
   case 0xc:{r=R_IP;break;}
   case 0xd:{r=R_SP;break;}
   case 0xe:{r=R_LR;break;}
   case 0xf:{r=R_PC;break;}
   default: {cout<<"can not access the Rn"<<endl;}
   }
   return r;
}
 
REGS scARMDPI::get_Rm(uint32_t nI)
{
        REGS r;
   uint32_t nR;
  //0000,0000,0000,0000,0000,0000,0000,0000
   nR=(nI&0x0000000f);
   switch(nR)
   {
   case 0x0:{r=R_R0;break;}
   case 0x1:{r=R_R1;break;}
   case 0x2:{r=R_R2;break;}
   case 0x3:{r=R_R3;break;}
   case 0x4:{r=R_R4;break;}
   case 0x5:{r=R_R5;break;}
   case 0x6:{r=R_R6;break;}
   case 0x7:{r=R_R7;break;}
   case 0x8:{r=R_R8;break;}
   case 0x9:{r=R_R9;break;}
   case 0x10:{r=R_R10;break;}
   case 0x11:{r=R_FP;break;}
   case 0x12:{r=R_IP;break;}
   case 0x13:{r=R_SP;break;}
   case 0x14:{r=R_LR;break;}
   case 0x15:{r=R_PC;break;}
  default: {cout<<"can not access Rm"<<endl;}
   }
   return r;
}
 
uint32_t scARMDPI::get_Imm(uint32_t nI)
{
        uint32_t i;
        i=nI&0xffff;
        //signed extended
        if(((nI>>15)&0x1)==1)
        {i=0xffff0000+i;}
    return i;
}
 
SHIFT scARMDPI::get_shift(uint32_t nI)
{
   SHIFT s;
   //
   uint32_t nS;
  //0000,0000,0000,0000,0000,0000,0000,0000
   nS=(nI>>5)&0x3;
   switch(nS)
   {
   case 0x0:{s=S_LSL;break;}
   case 0x1:{s=S_LSR;break;}
   case 0x2:{s=S_ASR;break;}
   case 0x3:{s=S_ROR;break;}
   case 0x4:{s=S_RRX;break;}
   case 0x5:{s=S_ASL;break;}
 
  default: {cout<<"SHIFT Type error"<<endl;}
   }
   return s;
}
 
 
 
OPCODE scARMDPI::get_opcode(uint32_t nI)
{
  OPCODE op;
  // DPI_MASK    0x0C000000
  uint32_t nOp=(nI>>21)&0xf;
  switch(nOp)
  {
        case 0x00: { op=OP_AND; break;}
        case 0x01: { op=OP_EOR; break;}
        case 0x02: { op=OP_SUB; break;}
        case 0x03: { op=OP_RSB; break;}
        case 0x04: { op=OP_ADD; break;}
        case 0x05: { op=OP_ADC; break;}
        case 0x06: { op=OP_SBC; break;}
        case 0x07: { op=OP_RSC; break;}
        case 0x08: { op=OP_TST; break;}
        case 0x09: { op=OP_TEQ; break;}
        case 0x0a: { op=OP_CMP; break;}
        case 0x0b: { op=OP_CMN; break;}
        case 0x0c: { op=OP_ORR; break;}
        case 0x0d: { op=OP_MOV; break;}
        case 0x0e: { op=OP_BIC; break;}
        case 0x0f: { op=OP_MVN ; break;}
        default:{cout<<"unknown opcode"<<endl;}
  }
  return op;
}
 
 
 
REGS scARMDPI::get_Rd(uint32_t nI)
{
        REGS r;
   uint32_t nR;
  //0000,0000,0000,0000,0000,0000,0000,0000
   nR=(nI>>12)&0xf;
   switch(nR)
   {
   case 0x0:{r=R_R0;break;}
   case 0x1:{r=R_R1;break;}
   case 0x2:{r=R_R2;break;}
   case 0x3:{r=R_R3;break;}
   case 0x4:{r=R_R4;break;}
   case 0x5:{r=R_R5;break;}
   case 0x6:{r=R_R6;break;}
   case 0x7:{r=R_R7;break;}
   case 0x8:{r=R_R8;break;}
   case 0x9:{r=R_R9;break;}
   case 0xa:{r=R_R10;break;}
   case 0xb:{r=R_FP;break;}
   case 0xc:{r=R_IP;break;}
   case 0xd:{r=R_SP;break;}
   case 0xe:{r=R_LR;break;}
   case 0xf:{r=R_PC;break;}
 
   }
   return r;
}
 
uint32_t scARMDPI::get_shift_dist(uint32_t nI)
{
  uint32_t dist;
  dist=(nI>>7)&0x1f;
  return dist;
}
 
uint32_t scARMDPI::get_Rot(uint32_t nI)
{
        uint32_t rot;
        rot=(nI>>8)&0xf;
        return rot;
 
}
 
bool_t scARMDPI::get_Set(uint32_t nI)
{
  bool_t bit;
  bit=(nI>>20)&0x1;
  return bit;
}
 
REGS scARMDPI::get_Rs(uint32_t nI)
{
   REGS r;
   //
   uint32_t nS=nI;
   nS=(nI>>8)&0xf;
   switch(nS)
   {
   case 0x0:{r=R_R0;break;}
   case 0x1:{r=R_R1;break;}
   case 0x2:{r=R_R2;break;}
   case 0x3:{r=R_R3;break;}
   case 0x4:{r=R_R4;break;}
   case 0x5:{r=R_R5;break;}
   case 0x6:{r=R_R6;break;}
   case 0x7:{r=R_R7;break;}
   case 0x8:{r=R_R8;break;}
   case 0x9:{r=R_R9;break;}
   case 0xa:{r=R_R10;break;}
   case 0xb:{r=R_FP;break;}
   case 0xc:{r=R_IP;break;}
   case 0xd:{r=R_SP;break;}
   case 0xe:{r=R_LR;break;}
   default:{cout<<"error of shift register"<<endl;}
   }
   return r;
}

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[/] [scarm/] [trunk/] [src/] [Instructions/] [scARMDPI.cpp] - Blame information for rev 8

Line No.	Rev	Author	Line
1	2	zhong	`// scARMDPI.cpp: implementation of the scARMDPI class.`
2			`//`
3			`//////////////////////////////////////////////////////////////////////`
4
5			`#include "scARMDPI.h"`
6
7			`//////////////////////////////////////////////////////////////////////`
8			`// Construction/Destruction`
9			`//////////////////////////////////////////////////////////////////////`
10
11			`scARMDPI::scARMDPI()`
12			`{`
13
14			`}`
15
16			`scARMDPI::~scARMDPI()`
17			`{`
18
19			`}`
20
21			`void scARMDPI::Decode(uint32_t)`
22			`{`
23
24
25			`}`
26
27
28			`REGS scARMDPI::get_Rn(uint32_t nI)`
29			`{`
30			`REGS r;`
31			`uint32_t nR;`
32			`//0000,0001,1110,0000,0000,0000,0000,0000`
33			`//`
34			`nR=((nI>>16)&0x0000000f);`
35
36			`switch(nR)`
37			`{`
38			`case 0x0:{r=R_R0;break;}`
39			`case 0x1:{r=R_R1;break;}`
40			`case 0x2:{r=R_R2;break;}`
41			`case 0x3:{r=R_R3;break;}`
42			`case 0x4:{r=R_R4;break;}`
43			`case 0x5:{r=R_R5;break;}`
44			`case 0x6:{r=R_R6;break;}`
45			`case 0x7:{r=R_R7;break;}`
46			`case 0x8:{r=R_R8;break;}`
47			`case 0x9:{r=R_R9;break;}`
48			`case 0xa:{r=R_R10;break;}`
49			`case 0xb:{r=R_FP;break;}`
50			`case 0xc:{r=R_IP;break;}`
51			`case 0xd:{r=R_SP;break;}`
52			`case 0xe:{r=R_LR;break;}`
53			`case 0xf:{r=R_PC;break;}`
54			`default: {cout<<"can not access the Rn"<<endl;}`
55			`}`
56			`return r;`
57			`}`
58
59			`REGS scARMDPI::get_Rm(uint32_t nI)`
60			`{`
61			`REGS r;`
62			`uint32_t nR;`
63			`//0000,0000,0000,0000,0000,0000,0000,0000`
64			`nR=(nI&0x0000000f);`
65			`switch(nR)`
66			`{`
67			`case 0x0:{r=R_R0;break;}`
68			`case 0x1:{r=R_R1;break;}`
69			`case 0x2:{r=R_R2;break;}`
70			`case 0x3:{r=R_R3;break;}`
71			`case 0x4:{r=R_R4;break;}`
72			`case 0x5:{r=R_R5;break;}`
73			`case 0x6:{r=R_R6;break;}`
74			`case 0x7:{r=R_R7;break;}`
75			`case 0x8:{r=R_R8;break;}`
76			`case 0x9:{r=R_R9;break;}`
77			`case 0x10:{r=R_R10;break;}`
78			`case 0x11:{r=R_FP;break;}`
79			`case 0x12:{r=R_IP;break;}`
80			`case 0x13:{r=R_SP;break;}`
81			`case 0x14:{r=R_LR;break;}`
82			`case 0x15:{r=R_PC;break;}`
83			`default: {cout<<"can not access Rm"<<endl;}`
84			`}`
85			`return r;`
86			`}`
87
88			`uint32_t scARMDPI::get_Imm(uint32_t nI)`
89			`{`
90			`uint32_t i;`
91			`i=nI&0xffff;`
92			`//signed extended`
93			`if(((nI>>15)&0x1)==1)`
94			`{i=0xffff0000+i;}`
95			`return i;`
96			`}`
97
98			`SHIFT scARMDPI::get_shift(uint32_t nI)`
99			`{`
100			`SHIFT s;`
101			`//`
102			`uint32_t nS;`
103			`//0000,0000,0000,0000,0000,0000,0000,0000`
104			`nS=(nI>>5)&0x3;`
105			`switch(nS)`
106			`{`
107			`case 0x0:{s=S_LSL;break;}`
108			`case 0x1:{s=S_LSR;break;}`
109			`case 0x2:{s=S_ASR;break;}`
110			`case 0x3:{s=S_ROR;break;}`
111			`case 0x4:{s=S_RRX;break;}`
112			`case 0x5:{s=S_ASL;break;}`
113
114			`default: {cout<<"SHIFT Type error"<<endl;}`
115			`}`
116			`return s;`
117			`}`
118
119
120
121			`OPCODE scARMDPI::get_opcode(uint32_t nI)`
122			`{`
123			`OPCODE op;`
124			`// DPI_MASK 0x0C000000`
125			`uint32_t nOp=(nI>>21)&0xf;`
126			`switch(nOp)`
127			`{`
128			`case 0x00: { op=OP_AND; break;}`
129			`case 0x01: { op=OP_EOR; break;}`
130			`case 0x02: { op=OP_SUB; break;}`
131			`case 0x03: { op=OP_RSB; break;}`
132			`case 0x04: { op=OP_ADD; break;}`
133			`case 0x05: { op=OP_ADC; break;}`
134			`case 0x06: { op=OP_SBC; break;}`
135			`case 0x07: { op=OP_RSC; break;}`
136			`case 0x08: { op=OP_TST; break;}`
137			`case 0x09: { op=OP_TEQ; break;}`
138			`case 0x0a: { op=OP_CMP; break;}`
139			`case 0x0b: { op=OP_CMN; break;}`
140			`case 0x0c: { op=OP_ORR; break;}`
141			`case 0x0d: { op=OP_MOV; break;}`
142			`case 0x0e: { op=OP_BIC; break;}`
143			`case 0x0f: { op=OP_MVN ; break;}`
144			`default:{cout<<"unknown opcode"<<endl;}`
145			`}`
146			`return op;`
147			`}`
148
149
150
151			`REGS scARMDPI::get_Rd(uint32_t nI)`
152			`{`
153			`REGS r;`
154			`uint32_t nR;`
155			`//0000,0000,0000,0000,0000,0000,0000,0000`
156			`nR=(nI>>12)&0xf;`
157			`switch(nR)`
158			`{`
159			`case 0x0:{r=R_R0;break;}`
160			`case 0x1:{r=R_R1;break;}`
161			`case 0x2:{r=R_R2;break;}`
162			`case 0x3:{r=R_R3;break;}`
163			`case 0x4:{r=R_R4;break;}`
164			`case 0x5:{r=R_R5;break;}`
165			`case 0x6:{r=R_R6;break;}`
166			`case 0x7:{r=R_R7;break;}`
167			`case 0x8:{r=R_R8;break;}`
168			`case 0x9:{r=R_R9;break;}`
169			`case 0xa:{r=R_R10;break;}`
170			`case 0xb:{r=R_FP;break;}`
171			`case 0xc:{r=R_IP;break;}`
172			`case 0xd:{r=R_SP;break;}`
173			`case 0xe:{r=R_LR;break;}`
174			`case 0xf:{r=R_PC;break;}`
175
176			`}`
177			`return r;`
178			`}`
179
180			`uint32_t scARMDPI::get_shift_dist(uint32_t nI)`
181			`{`
182			`uint32_t dist;`
183			`dist=(nI>>7)&0x1f;`
184			`return dist;`
185			`}`
186
187			`uint32_t scARMDPI::get_Rot(uint32_t nI)`
188			`{`
189			`uint32_t rot;`
190			`rot=(nI>>8)&0xf;`
191			`return rot;`
192
193			`}`
194
195			`bool_t scARMDPI::get_Set(uint32_t nI)`
196			`{`
197			`bool_t bit;`
198			`bit=(nI>>20)&0x1;`
199			`return bit;`
200			`}`
201
202			`REGS scARMDPI::get_Rs(uint32_t nI)`
203			`{`
204			`REGS r;`
205			`//`
206			`uint32_t nS=nI;`
207			`nS=(nI>>8)&0xf;`
208			`switch(nS)`
209			`{`
210			`case 0x0:{r=R_R0;break;}`
211			`case 0x1:{r=R_R1;break;}`
212			`case 0x2:{r=R_R2;break;}`
213			`case 0x3:{r=R_R3;break;}`
214			`case 0x4:{r=R_R4;break;}`
215			`case 0x5:{r=R_R5;break;}`
216			`case 0x6:{r=R_R6;break;}`
217			`case 0x7:{r=R_R7;break;}`
218			`case 0x8:{r=R_R8;break;}`
219			`case 0x9:{r=R_R9;break;}`
220			`case 0xa:{r=R_R10;break;}`
221			`case 0xb:{r=R_FP;break;}`
222			`case 0xc:{r=R_IP;break;}`
223			`case 0xd:{r=R_SP;break;}`
224			`case 0xe:{r=R_LR;break;}`
225			`default:{cout<<"error of shift register"<<endl;}`
226			`}`
227			`return r;`
228			`}`