OpenCores
URL https://opencores.org/ocsvn/scarm/scarm/trunk

Subversion Repositories scarm

[/] [scarm/] [trunk/] [src/] [Instructions/] [scARMLSI.h] - Blame information for rev 8

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 zhong
///////////////////////////////////////////////////////////////////////////////
2
// This program is free software; you can redistribute it and/or
3
// modify it under the terms of the GNU General Public License
4
// as published by the Free Software Foundation; either version 2
5
// of the License, or (at your option) any later version.
6
//
7
// This program is distributed in the hope that it will be useful,
8
// but WITHOUT ANY WARRANTY; without even the implied warranty of
9
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10
// GNU General Public License for more details.
11
//
12
// You should have received a copy of the GNU General Public License
13
// along with this program; if not, write to the Free Software
14
// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
15
//////////////////////////////////////////////////////////////////////
16
 
17
///////////////////////////////////////////////////////////////////              
18
//          
19
//  Original Author: Allen Tao Zhong,
20
//  University of Electronic Science and Technology in China
21
//  email: zhong@opencores.org
22
//  info   This is a SystemC ARM model
23
// scARMLSI.h: interface for the scARMLSI class.
24
//
25
//////////////////////////////////////////////////////////////////////
26
 
27
 
28
#include "..\instructions\scARMInstruction.h"
29
#include "..\components\registers\scRegisterFile.h"     // Added by ClassView
30
/* Unused Load/Store Instruction */
31
typedef struct LSTAG
32
{
33
  uint32_t rm    : 4;
34
  uint32_t pad4  : 1;
35
  uint32_t op2   : 2;
36
  uint32_t pad3  : 1;
37
  uint32_t rs    : 4;
38
  uint32_t rd    : 4;
39
  uint32_t rn    : 4;
40
  uint32_t ls    : 1;
41
  uint32_t wb    : 1;
42
  uint32_t b     : 1;
43
  uint32_t u     : 1;
44
  uint32_t p     : 1;
45
  uint32_t pad   : 3;
46
  uint32_t cond  : 4;
47
} LSI;
48
#define LSI_MASK    0x0c000000
49
#define LSI_SIG     0x04000000
50
 
51
class scARMLSI : public scARMInstruction
52
{
53
public:
54
        scARMLSI();
55
        virtual ~scARMLSI();
56
 
57
private:
58
        REGS get_Rs(uint32_t);
59
        bool_t get_Set(uint32_t nI);
60
        uint32_t get_Rot(uint32_t);
61
 
62
        OPCODE   get_opcode(uint32_t nI);
63
        SHIFT    get_shift(uint32_t nI);
64
    REGS     get_Rn(uint32_t nI);
65
        REGS     get_Rm(uint32_t nI);
66
        uint32_t get_Imm(uint32_t nI);
67
        REGS     get_Rd(uint32_t nI);
68
        uint32_t get_shift_dist(uint32_t nI);
69
};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.