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https://opencores.org/ocsvn/scarm/scarm/trunk
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///////////////////////////////////////////////////////////////////////////////
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// This program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public License
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// as published by the Free Software Foundation; either version 2
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// of the License, or (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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//////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////
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//
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// Original Author: Allen Tao Zhong,
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// University of Electronic Science and Technology in China
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// email: zhong@opencores.org
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// info This is a SystemC ARM model
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// scARMMCR.h: interface for the scARMMCR class.
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//
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//////////////////////////////////////////////////////////////////////
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#include "scTypes.h"
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/* General register to status register transfer - two formats */
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typedef struct MSR1TAG
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{
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uint32_t imm : 8;
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uint32_t rot : 4;
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uint32_t pad4 : 4;
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uint32_t field : 4;
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uint32_t pad3 : 2;
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uint32_t which : 1;
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uint32_t pad2 : 2;
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uint32_t hash : 1;
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uint32_t pad : 2;
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uint32_t cond : 4;
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} MSR1;
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typedef struct MSR2TAG
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{
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uint32_t rm : 4;
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uint32_t pad5 : 8;
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uint32_t pad4 : 4;
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uint32_t field : 4;
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uint32_t pad3 : 2;
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uint32_t which : 1;
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uint32_t pad2 : 2;
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uint32_t hash : 1;
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uint32_t pad : 2;
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uint32_t cond : 4;
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} MSR2;
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#define MSR_MASK 0x0DB0F000
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#define MSR_SIG 0x0120F000
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class scARMMCR
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{
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public:
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scARMMCR();
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virtual ~scARMMCR();
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};
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