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[/] [scarm/] [trunk/] [src/] [components/] [decoder/] [scDecoder.cpp] - Blame information for rev 2

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// scDecoder.cpp: implementation of the scDecoder class.
//
//////////////////////////////////////////////////////////////////////
 
#include "scDecoder.h"
#include "..\..\instructions\scARMInstruction.h"
#include "..\..\instructions\scARMDPI.h"
#include "..\..\instructions\scARMBranch.h"
#include "..\..\instructions\scARMLSI.h"
 
//////////////////////////////////////////////////////////////////////
// Construction/Destruction
//////////////////////////////////////////////////////////////////////
 
 
 
scDecoder::~scDecoder()
{
 
}
 
void scDecoder::entry()
{
    uint32_t nI;
    nI=in_n_Instruction;
 
        Decode(nI);
}
 
 
 
uint32_t scDecoder::get_RegData(REGS reg)
{
         uint32_t temp;
         out_REG=reg;
     temp=inout_n_RegData;
         return temp;
}
 
 
void scDecoder::Decode(uint32_t nI)
{
 
  // First see if the condition code is valid
  if ((nI & 0xF0000000) == 0xF0000000)
    {
     // create_vector(M_UNDEF, VEC_UNDEF, m_ctrlListNext);
           cout<<"undef instruction"<<endl;
      return;
    }
 
  if (nI == 0)
    {
       insert_noop();
    }
   else if ((nI & DPI_MASK) == DPI_SIG)
    {
           scARMDPI* pI;
           pI=new scARMDPI();
       COND temp=pI->get_cond(nI);
       bool_t test=CondTest(temp);
           if(test==1)
           {
           out_COND=temp;
           pI=new scARMDPI();
       out_OP=pI->get_opcode(nI);
 
           out_Rn=pI->get_Rn(nI);
           out_Rm=pI->get_Rm(nI);
           out_SHIFT_TYPE=pI->get_shift(nI);
           out_Rd=pI->get_Rd(nI);
           out_ShiftDist=pI->get_shift_dist(nI);
           out_Set=pI->get_Set(nI);
           out_n_Imm=pI->get_Imm(nI);
           }else
           {
             insert_noop();
           }
           delete pI;
   }
   else if ((nI & BRANCH_MASK) == BRANCH_SIG)
   {
            scARMBranch * pI;
                pI=new scARMBranch();
           COND temp=pI->get_cond(nI);
       bool_t test=CondTest(temp);
           if(test==1)
           {
        //ALUOut<-NPC+Imm
        //Cond<-(A op 0)
             out_OP=OP_ADD;
                 out_COND=pI->get_cond(nI);
         out_SHIFT_TYPE= S_LSL;
         out_ShiftDist= 2;
                 out_Rn=R_PC;
         out_Rm= R_LR;
                 out_Rd =R_LR;
                 out_Set=true;
                 out_n_Imm=pI->get_offset(nI);
                 out_b_Branch=true;
           }else
           {
         out_b_Branch=false;
             insert_noop();
           }
          delete pI;
 
    }
      else if ((nI & LSI_MASK) == LSI_SIG)
   {
               //
                 scARMLSI * pI=new scARMLSI();
                 out_COND=pI->get_cond(nI);
 
                  cout<<"load/store instruciton"<<endl;
         }
   /*
  else if ((nI & MSR_MASK) == MSR_SIG)
    {
        //DecodeMSR();
    }
  else if ((nI & MRS_MASK) == MRS_SIG)
    {
        //DecodeMRS();
    }
 
  else if ((nI & MULT_MASK) == MULT_SIG)
    {
       //DecodeMult();
    }
  else if ((nI & HWT_MASK) == HWT_SIG)
    {
       //DecodeHWT();
    }
 
  else if ((nI & SWT_MASK) == SWT_SIG)
    {
      //DecodeSWT();
    }
  else if ((nI & MRT_MASK) == MRT_SIG)
    {
      //DecodeMRT();
    }
  else if ((nI & SWI_MASK) == SWI_SIG)
    {
       //DecodeSWI();
    }
  else if ((nI & CDO_MASK) == CDO_SIG)
    {
      //DecodeCDO();
    }
  else if ((nI & CRT_MASK) == CRT_SIG)
    {
       //DecodeCRT();
    }
  else if ((nI & CDT_MASK) == CDT_SIG)
    {
      //DecodeCWT();
    }
        */
  else
    {
      // Failed to decode it - generate an undefined instruction trap
      //GenerateUDT();
    }
}
 
bool_t scDecoder::CondTest(enum COND cond)
{
  uint32_t codes = get_RegData(R_CPSR);
 
  switch (cond)
    {
    case C_EQ: return ((codes & Z_FLAG) ? TRUE : FALSE); break;
    case C_NE: return ((codes & Z_FLAG) ? FALSE : TRUE); break;
    case C_CS: return ((codes & C_FLAG) ? TRUE : FALSE); break;
    case C_CC: return ((codes & C_FLAG) ? FALSE : TRUE); break;
    case C_MI: return ((codes & N_FLAG) ? TRUE : FALSE); break;
    case C_PL: return ((codes & N_FLAG) ? FALSE : TRUE); break;
    case C_VS: return ((codes & V_FLAG) ? TRUE : FALSE); break;
    case C_VC: return ((codes & V_FLAG) ? FALSE : TRUE); break;
    case C_HI: return ((codes & CZ_FLAGS) == C_FLAG); break;
    case C_LS: return ((codes & C_FLAG) == 0) ||
                 ((codes & Z_FLAG) == Z_FLAG); break;
    case C_GE: return (((codes & NV_FLAGS) == 0) ||
                     ((codes & NV_FLAGS) == NV_FLAGS)); break;
    case C_LT: return (((codes & NV_FLAGS) == V_FLAG) ||
                     ((codes & NV_FLAGS) == N_FLAG)); break;
    case C_GT: return (((codes & Z_FLAG) == 0) &&
                     (((codes & NV_FLAGS) == NV_FLAGS) ||
                      ((codes & NV_FLAGS) == 0))); break;
    case C_LE: return (((codes & Z_FLAG) == Z_FLAG) ||
                     (((codes & NV_FLAGS) == V_FLAG) ||
                      ((codes & NV_FLAGS) == N_FLAG))); break;
    case C_AL: return TRUE; break;
    case C_NV: return FALSE; break;
    }
 
        // Should never reach here
        return TRUE;
}
 
 
 
void scDecoder::insert_noop()
{
          //insert noop
      out_OP=OP_MOV;
          out_Rd=R_R0;
          out_Rn=R_R0;
          out_Rm=R_R0;
          out_COND=C_AL;
          out_SHIFT_TYPE=S_LSL;
          out_ShiftDist=0;
          out_Set=0;
          out_n_Imm=0;
}

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[/] [scarm/] [trunk/] [src/] [components/] [decoder/] [scDecoder.cpp] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	zhong	`// scDecoder.cpp: implementation of the scDecoder class.`
2			`//`
3			`//////////////////////////////////////////////////////////////////////`
4
5			`#include "scDecoder.h"`
6			`#include "..\..\instructions\scARMInstruction.h"`
7			`#include "..\..\instructions\scARMDPI.h"`
8			`#include "..\..\instructions\scARMBranch.h"`
9			`#include "..\..\instructions\scARMLSI.h"`
10
11			`//////////////////////////////////////////////////////////////////////`
12			`// Construction/Destruction`
13			`//////////////////////////////////////////////////////////////////////`
14
15
16
17			`scDecoder::~scDecoder()`
18			`{`
19
20			`}`
21
22			`void scDecoder::entry()`
23			`{`
24			`uint32_t nI;`
25			`nI=in_n_Instruction;`
26
27			`Decode(nI);`
28			`}`
29
30
31
32			`uint32_t scDecoder::get_RegData(REGS reg)`
33			`{`
34			`uint32_t temp;`
35			`out_REG=reg;`
36			`temp=inout_n_RegData;`
37			`return temp;`
38			`}`
39
40
41			`void scDecoder::Decode(uint32_t nI)`
42			`{`
43
44			`// First see if the condition code is valid`
45			`if ((nI & 0xF0000000) == 0xF0000000)`
46			`{`
47			`// create_vector(M_UNDEF, VEC_UNDEF, m_ctrlListNext);`
48			`cout<<"undef instruction"<<endl;`
49			`return;`
50			`}`
51
52			`if (nI == 0)`
53			`{`
54			`insert_noop();`
55			`}`
56			`else if ((nI & DPI_MASK) == DPI_SIG)`
57			`{`
58			`scARMDPI* pI;`
59			`pI=new scARMDPI();`
60			`COND temp=pI->get_cond(nI);`
61			`bool_t test=CondTest(temp);`
62			`if(test==1)`
63			`{`
64			`out_COND=temp;`
65			`pI=new scARMDPI();`
66			`out_OP=pI->get_opcode(nI);`
67
68			`out_Rn=pI->get_Rn(nI);`
69			`out_Rm=pI->get_Rm(nI);`
70			`out_SHIFT_TYPE=pI->get_shift(nI);`
71			`out_Rd=pI->get_Rd(nI);`
72			`out_ShiftDist=pI->get_shift_dist(nI);`
73			`out_Set=pI->get_Set(nI);`
74			`out_n_Imm=pI->get_Imm(nI);`
75			`}else`
76			`{`
77			`insert_noop();`
78			`}`
79			`delete pI;`
80			`}`
81			`else if ((nI & BRANCH_MASK) == BRANCH_SIG)`
82			`{`
83			`scARMBranch * pI;`
84			`pI=new scARMBranch();`
85			`COND temp=pI->get_cond(nI);`
86			`bool_t test=CondTest(temp);`
87			`if(test==1)`
88			`{`
89			`//ALUOut<-NPC+Imm`
90			`//Cond<-(A op 0)`
91			`out_OP=OP_ADD;`
92			`out_COND=pI->get_cond(nI);`
93			`out_SHIFT_TYPE= S_LSL;`
94			`out_ShiftDist= 2;`
95			`out_Rn=R_PC;`
96			`out_Rm= R_LR;`
97			`out_Rd =R_LR;`
98			`out_Set=true;`
99			`out_n_Imm=pI->get_offset(nI);`
100			`out_b_Branch=true;`
101			`}else`
102			`{`
103			`out_b_Branch=false;`
104			`insert_noop();`
105			`}`
106			`delete pI;`
107
108			`}`
109			`else if ((nI & LSI_MASK) == LSI_SIG)`
110			`{`
111			`//`
112			`scARMLSI * pI=new scARMLSI();`
113			`out_COND=pI->get_cond(nI);`
114
115			`cout<<"load/store instruciton"<<endl;`
116			`}`
117			`/*`
118			`else if ((nI & MSR_MASK) == MSR_SIG)`
119			`{`
120			`//DecodeMSR();`
121			`}`
122			`else if ((nI & MRS_MASK) == MRS_SIG)`
123			`{`
124			`//DecodeMRS();`
125			`}`
126
127			`else if ((nI & MULT_MASK) == MULT_SIG)`
128			`{`
129			`//DecodeMult();`
130			`}`
131			`else if ((nI & HWT_MASK) == HWT_SIG)`
132			`{`
133			`//DecodeHWT();`
134			`}`
135
136			`else if ((nI & SWT_MASK) == SWT_SIG)`
137			`{`
138			`//DecodeSWT();`
139			`}`
140			`else if ((nI & MRT_MASK) == MRT_SIG)`
141			`{`
142			`//DecodeMRT();`
143			`}`
144			`else if ((nI & SWI_MASK) == SWI_SIG)`
145			`{`
146			`//DecodeSWI();`
147			`}`
148			`else if ((nI & CDO_MASK) == CDO_SIG)`
149			`{`
150			`//DecodeCDO();`
151			`}`
152			`else if ((nI & CRT_MASK) == CRT_SIG)`
153			`{`
154			`//DecodeCRT();`
155			`}`
156			`else if ((nI & CDT_MASK) == CDT_SIG)`
157			`{`
158			`//DecodeCWT();`
159			`}`
160			`*/`
161			`else`
162			`{`
163			`// Failed to decode it - generate an undefined instruction trap`
164			`//GenerateUDT();`
165			`}`
166			`}`
167
168			`bool_t scDecoder::CondTest(enum COND cond)`
169			`{`
170			`uint32_t codes = get_RegData(R_CPSR);`
171
172			`switch (cond)`
173			`{`
174			`case C_EQ: return ((codes & Z_FLAG) ? TRUE : FALSE); break;`
175			`case C_NE: return ((codes & Z_FLAG) ? FALSE : TRUE); break;`
176			`case C_CS: return ((codes & C_FLAG) ? TRUE : FALSE); break;`
177			`case C_CC: return ((codes & C_FLAG) ? FALSE : TRUE); break;`
178			`case C_MI: return ((codes & N_FLAG) ? TRUE : FALSE); break;`
179			`case C_PL: return ((codes & N_FLAG) ? FALSE : TRUE); break;`
180			`case C_VS: return ((codes & V_FLAG) ? TRUE : FALSE); break;`
181			`case C_VC: return ((codes & V_FLAG) ? FALSE : TRUE); break;`
182			`case C_HI: return ((codes & CZ_FLAGS) == C_FLAG); break;`
183			`case C_LS: return ((codes & C_FLAG) == 0) \|\|`
184			`((codes & Z_FLAG) == Z_FLAG); break;`
185			`case C_GE: return (((codes & NV_FLAGS) == 0) \|\|`
186			`((codes & NV_FLAGS) == NV_FLAGS)); break;`
187			`case C_LT: return (((codes & NV_FLAGS) == V_FLAG) \|\|`
188			`((codes & NV_FLAGS) == N_FLAG)); break;`
189			`case C_GT: return (((codes & Z_FLAG) == 0) &&`
190			`(((codes & NV_FLAGS) == NV_FLAGS) \|\|`
191			`((codes & NV_FLAGS) == 0))); break;`
192			`case C_LE: return (((codes & Z_FLAG) == Z_FLAG) \|\|`
193			`(((codes & NV_FLAGS) == V_FLAG) \|\|`
194			`((codes & NV_FLAGS) == N_FLAG))); break;`
195			`case C_AL: return TRUE; break;`
196			`case C_NV: return FALSE; break;`
197			`}`
198
199			`// Should never reach here`
200			`return TRUE;`
201			`}`
202
203
204
205			`void scDecoder::insert_noop()`
206			`{`
207			`//insert noop`
208			`out_OP=OP_MOV;`
209			`out_Rd=R_R0;`
210			`out_Rn=R_R0;`
211			`out_Rm=R_R0;`
212			`out_COND=C_AL;`
213			`out_SHIFT_TYPE=S_LSL;`
214			`out_ShiftDist=0;`
215			`out_Set=0;`
216			`out_n_Imm=0;`
217			`}`