OpenCores
URL https://opencores.org/ocsvn/scarm/scarm/trunk

Subversion Repositories scarm

[/] [scarm/] [trunk/] [src/] [sc_mem_ch.h] - Blame information for rev 8

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 zhong
// sc_mem_ch.h: interface for the sc_mem_ch class.
2
/*                             -------------------
3
    begin                : Oct 2 2002
4
    copyright            : (C) 2002 UESTC
5
    author               : Zhong Tao
6
    email                : zhong@opencores.org
7
 ***************************************************************************/
8
 
9
/***************************************************************************
10
 *                                                                         *
11
 *   This program is free software; you can redistribute it and/or modify  *
12
 *   it under the terms of the GNU General Public License as published by  *
13
 *   the Free Software Foundation; either version 2 of the License, or     *
14
 *   (at your option) any later version.                                   *
15
 *                                                                         *
16
 ***************************************************************************/
17
 
18
#if !defined(AFX_SC_MEM_CH_H__7BC07E77_A752_11D6_BB12_000000000000__INCLUDED_)
19
#define AFX_SC_MEM_CH_H__7BC07E77_A752_11D6_BB12_000000000000__INCLUDED_
20
 
21
#if _MSC_VER > 1000
22
#pragma once
23
#endif // _MSC_VER > 1000
24
#include "scTypes.h"
25
#include <systemc.h>
26
#include "sc_mem_if.h"
27
#include <sc_mslib.h>
28
 
29
class sc_mem_ch : public sc_channel,public sc_mem_if
30
{
31
public:
32
        bool write_mem(uint32_t addr,uint32_t data);
33
        uint32_t read_mem(uint32_t addr);
34
public:
35
        sc_out<bool>             nRW;
36
        sc_outmaster<uint32_t>     A;
37
        sc_inoutslave<uint32_t>    D;
38
public:
39
        uint32_t data;
40
        void read();
41
 
42
        SC_HAS_PROCESS(sc_mem_ch);
43
        sc_mem_ch(sc_module_name);
44
        virtual ~sc_mem_ch();
45
 
46
};
47
 
48
#endif // !defined(AFX_SC_MEM_CH_H__7BC07E77_A752_11D6_BB12_000000000000__INCLUDED_)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.