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[/] [scarts/] [trunk/] [processor/] [VHDL/] [ext_modules/] [ext_counter/] [ext_counter_ent.vhd] - Blame information for rev 3

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1 3 jlechner
-----------------------------------------------------------------------
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-- This file is part of SCARTS.
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-- 
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-- SCARTS is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- 
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-- SCARTS is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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-- GNU General Public License for more details.
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-- 
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-- You should have received a copy of the GNU General Public License
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-- along with SCARTS.  If not, see <http://www.gnu.org/licenses/>.
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-----------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Title      : 7 Segment Display Architecture
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-- Project    : SCARTS - Scalable Processor for Embedded Applications in
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--              Realtime Environment
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-------------------------------------------------------------------------------
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-- File       : ext_sysctrl_ent.vhd
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-- Author     : Dipl. Ing. Martin Delvai
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-- Company    : TU Wien - Institut fr technische Informatik
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-- Created    : 2002-02-11
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-- Last update: 2009-04-29
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-- Platform   : SUN Solaris 
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-------------------------------------------------------------------------------
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-- Description:
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--
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-------------------------------------------------------------------------------
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-- Copyright (c) 2002 
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-------------------------------------------------------------------------------
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-- Revisions  :
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-- Date        Version  Author  Description
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-- 2002-02-11  1.0      delvai  Created
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-------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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-- LIBRARY
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--------------------------------------------------------------------------------
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LIBRARY IEEE;
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USE IEEE.std_logic_1164.all;
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USE work.pkg_basic.all;
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use work.pkg_counter.all;
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----------------------------------------------------------------------------------
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-- ENTITY
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----------------------------------------------------------------------------------
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entity ext_counter is
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  port(
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        clk                     : IN  std_logic;
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        extsel                  : in std_ulogic;
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        exti                    : in  module_in_type;
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        exto                    : out module_out_type
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    );
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end ext_counter;
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----------------------------------------------------------------------------------
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-- END ENTITY
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----------------------------------------------------------------------------------
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