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[/] [scarts/] [trunk/] [processor/] [VHDL/] [ext_modules/] [ext_key_matrix/] [key_matrix/] [sim/] [create_project.do] - Blame information for rev 3

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Line No. Rev Author Line
1 3 jlechner
file delete -force ../../modelsim
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file mkdir ../../modelsim
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cd ../../modelsim
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project new . key_matrix
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project addfolder scripts
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project addfolder sim
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project addfolder key_matrix
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project addfolder testbench_util
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project addfolder math
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project addfolder debounce
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project addfolder sync
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project addfile ../src/sim/key_matrix_tb.vhd vhdl sim
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project addfile ../src/key_matrix.vhd vhdl key_matrix
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project addfile ../src/key_matrix_beh.vhd vhdl key_matrix
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project addfile ../src/key_matrix_pkg.vhd vhdl key_matrix
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project addfile ../../testbench_util/src/testbench_util_pkg.vhd vhdl testbench_util
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project addfile ../../math/src/math_pkg.vhd vhdl math
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project addfile ../../debounce/src/debounce.vhd vhdl debounce
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project addfile ../../debounce/src/debounce_struct.vhd vhdl debounce
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project addfile ../../debounce/src/debounce_fsm.vhd vhdl debounce
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project addfile ../../debounce/src/debounce_fsm_beh.vhd vhdl debounce
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project addfile ../../debounce/src/debounce_pkg.vhd vhdl debounce
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project addfile ../../synchronizer/src/sync.vhd vhdl sync
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project addfile ../../synchronizer/src/sync_beh.vhd vhdl sync
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project addfile ../../synchronizer/src/sync_pkg.vhd vhdl sync
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project addfile ../src/sim/sim_all.do tcl scripts
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project addfile ../src/sim/sim_restart.do tcl scripts
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project addfile ../src/sim/sim_quit.do tcl scripts
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project calculateorder

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