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[/] [scarts/] [trunk/] [toolchain/] [scarts-binutils/] [binutils-2.19.1/] [cgen/] [cpu/] [mep-sample-ucidsp.cpu] - Blame information for rev 6

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1 6 jlechner
; Toshiba MeP Media Engine architecture description.  -*- Scheme -*-
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; Copyright (C) 2001, 2002 Red Hat, Inc.
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; This file is part of CGEN.
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; See file COPYING.CGEN for details.
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; This file provides sample definitions for the UCI and DSP
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; instructions.  It is incorporated into the overall description by
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; including it from a top-level file that includes all of the required
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; option files.
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; UCI option.
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(define-pmacro mep-ext1-isa () (ISA ext_core1))
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; uci instructions for ELFextension test
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; uci.elfext.1    $simm16
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; 1111_IIII_0000_0010 0001_iiii_iiii_iiii
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; simm16 = I[4:7]||i[20:31]
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; uci.elfext.2    $uimm16
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; 1111_IIII_0000_0010 0010_iiii_iiii_iiii
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; uimm16 = I[4:7]||i[20:31]
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; define simm16
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(df f-uci_elfext_1-hi  "uci_elfext_1 simm16 hi 4s7"   (mep-ext1-isa)  4  4  INT #f #f)
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(df f-uci_elfext_1-lo  "uci_elfext_1 simm16 lo 20s31" (mep-ext1-isa) 20 12 UINT #f #f)
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(define-multi-ifield
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  (name f-uci_elfext_1)
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  (comment "16-bits uci_elfext_ signed constant")
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  (attrs mep-ext1-isa)
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  (mode INT)
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  (subfields f-uci_elfext_1-hi f-uci_elfext_1-lo)
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  (insert (sequence ()
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                    (set (ifield f-uci_elfext_1-hi) (srl (ifield f-uci_elfext_1) 12))
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                    (set (ifield f-uci_elfext_1-lo) (and (ifield f-uci_elfext_1) #xfff))))
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  (extract (set (ifield f-uci_elfext_1)
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                (or (sll (ifield f-uci_elfext_1-hi) 12)
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                    (ifield f-uci_elfext_1-lo))))
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  )
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(dpop uci_elfext_1simm16    "signed imm (16 bits)"  (mep-ext1-isa) h-sint  f-uci_elfext_1  "signed16")
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; define uimm16
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(df f-uci_elfext_2-hi  "uci_elfext_2 uimm16 hi 4u7"   (mep-ext1-isa)  4  4 UINT #f #f)
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(df f-uci_elfext_2-lo  "uci_elfext_2 uimm16 lo 20u31" (mep-ext1-isa) 20 12 UINT #f #f)
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(define-multi-ifield
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  (name f-uci_elfext_2)
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  (comment "16-bits uci_elfext_ unsigned constant")
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  (attrs mep-ext1-isa)
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  (mode UINT)
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  (subfields f-uci_elfext_2-hi f-uci_elfext_2-lo)
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  (insert (sequence ()
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                    (set (ifield f-uci_elfext_2-hi) (srl (ifield f-uci_elfext_2) 12))
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                    (set (ifield f-uci_elfext_2-lo) (and (ifield f-uci_elfext_2) #xfff))))
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  (extract (set (ifield f-uci_elfext_2)
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                (or (sll (ifield f-uci_elfext_2-hi) 12)
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                    (ifield f-uci_elfext_2-lo))))
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  )
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(dpop uci_elfext_2uimm16    "unsigned imm (16 bits)"  (mep-ext1-isa) h-uint  f-uci_elfext_2  "unsigned16")
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; define sub-opcode
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(df f-uci_elfext-sub  "sub-opcode for uci_elfext instructions"  (mep-ext1-isa) 16 4 UINT #f #f)
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; define instruction
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(dni uci.elfext.1 "uci_elfext instruction 1" (OPTIONAL_UCI_INSN VOLATILE mep-ext1-isa)
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         "uci.elfext.1 $uci_elfext_1simm16"
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         (+ MAJ_15 (f-rm 0) (f-sub4 2) (f-uci_elfext-sub 1) uci_elfext_1simm16)
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         (c-call "check_option_uci" pc)
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         ()
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         )
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; define instruction
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(dni uci.elfext.2 "uci_elfext instruction 1" (OPTIONAL_UCI_INSN VOLATILE mep-ext1-isa)
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         "uci.elfext.2 $uci_elfext_2uimm16"
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         (+ MAJ_15 (f-rm 0) (f-sub4 2) (f-uci_elfext-sub 2) uci_elfext_2uimm16)
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         (c-call "check_option_uci" pc)
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         ()
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         )
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;; some general samples
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; UCI option.
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(dni uci "user defined instruction" (OPTIONAL_UCI_INSN mep-ext1-isa)
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     "uci $rn,$rm,$code16"
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     (+ MAJ_15 rn rm (f-sub4 2) code16)
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     (sequence ()
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               (c-call "check_option_uci" pc)
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               (unimp "uci"))
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     ())
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; DSP option.
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(dni dsp "dsp instruction" (OPTIONAL_DSP_INSN mep-ext1-isa)
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     "dsp $rn,$rm,$code16"
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     (+ MAJ_15 rn rm (f-sub4 0) code16)
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     (sequence ()
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               (c-call "check_option_dsp" pc)
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               (set pc (c-call USI "dsp_exception" pc)))
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     ())

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