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[/] [scarts/] [trunk/] [toolchain/] [scarts-binutils/] [binutils-2.19.1/] [cgen/] [doc/] [sim.texi] - Blame information for rev 6

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@c Copyright (C) 2000, 2009 Red Hat, Inc.
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@c This file is part of the CGEN manual.
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@c For copying conditions, see the file cgen.texi.
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@node Simulation
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@chapter Simulation support
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@cindex Simulation support
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Simulator support comes in the form of machine generated the decoder/executer
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as well as the structure that records CPU state information (i.e., registers).
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There are 3 architecture-wide generated files:
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@table @file
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@item arch.h
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Definitions and declarations common to the entire architecture.
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@item arch.c
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Tables and code common to the entire architecture, but which can't be
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put in the common area.
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@item cpuall.h
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Pseudo base classes of various structures.
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@end table
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Each ``CPU family'' has its own set of the following files:
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@table @file
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@item cpu.h
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Definitions and declarations specific to a particular CPU family.
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@item cpu.c
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Tables and code specific to a particular CPU family.
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@item decode.h
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Decoder definitions and declarations.
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@item decode.c
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Decoder tables and code.
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@item model.c
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Tables and code for each model in the CPU family.
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@item semantics.c
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Code to perform each instruction.
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@item sem-switch.c
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Same as @file{semantics.c} but as one giant @code{switch} statement.
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@end table
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A ``CPU family'' is an artificial creation to sort architecture variants
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along whatever lines seem useful.  Additional hand-written files must be
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provided.  @xref{Porting}, for details.

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