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[/] [scarts/] [trunk/] [toolchain/] [scarts-binutils/] [binutils-2.19.1/] [cgen/] [sid.scm] - Blame information for rev 6

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1 6 jlechner
; Simulator generator support routines.
2
; Copyright (C) 2000, 2005, 2009 Red Hat, Inc.
3
; This file is part of CGEN.
4
 
5
; i.e. this file fills in the missing pieces of the interface between
6
; the application independent part of CGEN (i.e. the code loaded by read.scm)
7
; and the application dependent part (i.e. sim-*.scm).
8
; `send' is not intended to appear in sim-*.scm.
9
; [It still does but that's to be fixed.]
10
; Specify which application.
11
 
12
; Currently supported options:
13
; with-scache
14
 
15
; with-pbb
16
 
17
; with-sem-frags
18
;       generate semantic fragment engine (requires with-pbb)
19
; with-profile fn|sw
20
;       generate code to do profiling in the semantic function
21
;       code (fn) or in the semantic switch (sw)
22
; with-multiple-isa
23
;       enable multiple-isa support (e.g. arm+thumb)
24
;       ??? wip.
25
; copyright fsf|redhat
26
;       emit an FSF or Red Hat copyright (temporary, pending decision)
27
; package gnusim|cygsim
28
;       indicate the software package
29
; #t if the scache is being used
30
; #t if we're generating profiling code
31
; Each of the function and switch semantic code can have profiling.
32
; The options as passed are stored in -with-profile-{fn,sw}?, and
33
; -with-profile? is set at code generation time.
34
 
35
; #t if semantics are generated as pbb computed-goto engine
36
; #t if the semantic fragment engine is to be used.
37
; This involves combining common fragments of each insn into one.
38
 
39
; String containing text defining the package we're generating code for.
40
; Initialize the options.
41
; Handle an option passed in from the command line.
42
"fn""sw""invalid with-profile value""fsf""redhat""invalid copyright value""gnusim""cygsim""invalid package value""unknown option"; #t if we're currently generating a pbb engine.
43
; #t if the cpu can execute insns parallely.
44
; This one isn't passed on the command line, but we follow the convention
45
; of prefixing these things with `with-'.
46
; While processing operand reading (or writing), parallel execution support
47
; needs to be turned off, so it is up to the appropriate cgen-foo.c proc to
48
 
49
; Kind of parallel support.
50
; If 'read, read pre-processing is done.
51
; If 'write, write post-processing is done.
52
 
53
; version used read pre-processing.  Not sure supporting both is useful
54
; in the long run.
55
; #t if parallel support is provided by read pre-processing.
56
 
57
; Cover functions for various methods.
58
; Return the C type of something.  This isn't always a mode.
59
; Return the C type of an index's value or #f if not needed (scalar).
60
; Misc. utilities.
61
 
62
; ISAS is a list of <isa> objects.
63
; The idea is that in multiple isa architectures (e.g. arm) the elements
64
 
65
; isa are kept in separate classes.
66
"current_cpu->@cpu@_hardware.""current_cpu->hardware."; Attribute support.
67
 
68
; PC-VAR is the C expression containing the address of the start of the
69
 
70
;
71
; We don't bother trying to handle bitsizes that don't have a
72
; corresponding GETIMEM method.  Doing so would require us to take
73
; endianness into account just to ensure that the requested bits end
74
; up at the proper place in the result.  It's easier just to make the
75
; caller ask us for something we can do directly.
76
;
77
; ??? Aligned/unaligned support?
78
"current_cpu->GETIMEM""UQI""UHI""USI""bad bitsize argument to gen-ifetch"" (pc, "" + "")"; Return definition of an object's attributes.
79
; This is like gen-obj-attr-defn, except split for sid.
80
; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
81
 
82
; ALL-ATTRS is an ordered alist of all attributes.
83
 
84
; duplicate entries have been removed.
85
"{ "","" 0"; drop the leading ","
86
; FIXME: Are we missing attr-prefix here?
87
", "" }"; Instruction field support code.
88
; Return a <c-expr> object of the value of an ifield.
89
; ??? Perhaps a better way would be to defer evaluating the src of a
90
; set until the method processing the dest.
91
""; Type system.
92
; Methods:
93
; gen-type - return C code representing the type
94
; gen-sym-decl - generate decl using the provided symbol
95
; gen-sym-get-macro - generate GET macro for accessing CPU elements
96
; gen-sym-set-macro - generate SET macro for accessing CPU elements
97
; Scalar type
98
"  /* "" */\n""  "" "";\n"; Array type
99
"  /* "" */\n""  "" "";\n"; Return a reference to the array.
100
; SYM is the name of the array.
101
; INDEX is either a single index object or a (possibly empty) list of objects,
102
; one object per dimension.
103
"[""]"; Integers
104
;
105
;(method-make!
106
; <integer> 'gen-type
107
; (lambda (self)
108
;   (mode:c-type (mode-find (elm-get self 'bits)
109
 
110
;                              'UINT 'INT)))
111
;   )
112
;)
113
;
114
 
115
;(method-make! <integer> 'gen-sym-get-macro (lambda (self sym comment) ""))
116
;(method-make! <integer> 'gen-sym-set-macro (lambda (self sym comment) ""))
117
; Hardware descriptions support code.
118
;
119
; Various operations are required for each h/w object to support the various
120
; things the simulator will want to do with it.
121
;
122
; Methods:
123
; gen-decl
124
 
125
; cxmake-get    - Return a <c-expr> object to fetch the value.
126
; gen-set-quiet - Set the value.
127
;                 ??? Could just call this gen-set as there is no gen-set-trace
128
;                 but for consistency with the messages passed to operands
129
;                 we use this same.
130
; gen-type      - C type to use to record value.
131
;                 ??? Delete and just use get-mode?
132
; save-index?   - return #t if an index needs to be saved for parallel
133
;                 execution post-write processing
134
; gen-profile-decl
135
; gen-record-profile
136
; get-mode
137
; gen-profile-locals
138
; gen-sym-decl  - Return a C declaration using the provided symbol.
139
; gen-sym-get-macro - Generate default GET access macro.
140
 
141
; gen-ref       - Return a C reference to the object.
142
 
143
""; Return a C reference to a hardware object.
144
 
145
"gen-write method not overridden:"; gen-type handler, must be overridden
146
 
147
""; nothing to do
148
 
149
; Return a <c-expr> object of the value of SELF.
150
; ESTATE is the current rtl evaluator state.
151
; INDEX is a <hw-index> object.  It must be an ifield.
152
; SELECTOR is a hardware selector RTX.
153
;(if (not (eq? 'ifield (hw-index:type index)))
154
;    (error "not an ifield hw-index" index))
155
 
156
; 'gen-set-quiet helper for PC values.
157
 
158
; If OPTIONS contains #:direct, set the PC directly, bypassing semantic
159
; code considerations.
160
; ??? OPTIONS support wip.  Probably want a new form (or extend existing form)
161
; of rtx: that takes a variable number of named arguments.
162
; ??? Another way to get #:direct might be (raw-reg h-pc).
163
 
164
; This is done in a post-processing pass after semantic evaluation.
165
; SFMT is the <sformat>.
166
; OP is the operand.
167
; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
168
; during semantic evaluation.
169
;
170
 
171
; At this point I'm reluctant to willy nilly make methods virtual.
172
 
173
; Forward these methods onto TYPE.
174
; For parallel instructions supported by queueing outputs for later update,
175
; return a boolean indicating if an index needs to be recorded.
176
; An example of when the index isn't needed is if the index can be determined
177
; during extraction.
178
; For array registers, we need to store away the index. 
179
; Handle updates of registers during parallel execution.
180
; This is done in a post-processing pass after semantic evaluation.
181
; SFMT is the <sformat>.
182
; OP is the <operand>.
183
; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
184
 
185
; FIXME: May need mode of OP.
186
; First get a hw-index object to use during indexing.
187
; Some indices, e.g. memory addresses, are computed during semantic
188
; evaluation.  Others are computed during the extraction phase.
189
"  "" ("")""  /* "" */\n""  unsigned long "";\n"; FIXME: Need to handle scalars.
190
;(send index 'gen-extracted-field-value)
191
; Utilities to generate register accesses via cover functions.
192
"current_cpu->"" ("""")""current_cpu->"" ("""", "");\n"; Utility to build a <c-expr> object to fetch the value of a register.
193
; If the register is accessed via a cover function/macro, do it.
194
; Otherwise fetch the value from the cached address or from the CPU struct.
195
; FIXME: redo test
196
 
197
; ??? raw-reg: support is wip
198
; Utilities to generate C code to assign a variable to a register.
199
; FIXME: redo test
200
"* "" = "";\n"" = "";\n"; raw-reg: support
201
; ??? wip
202
" = "";\n"; Return method name of access function.
203
; Common elements have no prefix.
204
 
205
"_""""_get""_""""_set"; Memory support.
206
"current_cpu->GETMEM""""ASI"" (""pc, """", "")""current_cpu->SETMEM""""ASI"" (""pc, """", "", "");\n"""""""; For parallel instructions supported by queueing outputs for later update,
207
; return the type of the index or #f if not needed.
208
; In the case of the complete memory address being an immediate
209
; argument, we can return #f (later).
210
"  "" ("")"; Immediates, addresses.
211
; Forward these methods onto TYPE.
212
"gen-write of <hw-immediate> shouldn't happen"; FIXME.
213
"ADDR"""""""; Return a <c-expr> object of the value of SELF.
214
; ESTATE is the current rtl evaluator state.
215
; INDEX is a hw-index object.  It must be an ifield.
216
; Needed because we record our own copy of the ifield in ARGBUF.
217
; SELECTOR is a hardware selector RTX.
218
"not an ifield hw-index""gen-write of <hw-address> shouldn't happen"; FIXME: revisit.
219
"IADDR"; Return a <c-expr> object of the value of SELF.
220
; ESTATE is the current rtl evaluator state.
221
; INDEX is a <hw-index> object.  It must be an ifield.
222
; Needed because we record our own copy of the ifield in ARGBUF,
223
; *and* because we want to record in the result the 'CACHED attribute
224
; since instruction addresses based on ifields are fixed [and thus cacheable].
225
; SELECTOR is a hardware selector RTX.
226
 
227
; set until the method processing the dest.
228
 
229
; Return the index to use by the gen-write method.
230
 
231
; execution time), the index is computed along with the value to be stored,
232
; so this is easy.
233
" ("")"; Return the name of the PAREXEC structure member holding a hardware index
234
; for operand OP.
235
"_idx"; Cover fn to hardware indices to generate the actual C code.
236
; INDEX is the hw-index object (i.e. op:index).
237
; The result is a string of C code.
238
; FIXME:wip
239
 
240
; ??? May wish to handle more similarily.
241
 
242
; e.g. doing array index calcs at extraction time.
243
"""(("") "")""""-gen-hw-index: invalid index:"; Return a <c-expr> object of the value of a hardware index.
244
; If MODE is VOID, abort.
245
"hw-index:cxmake-get: result needs a mode"; FIXME: Temporary hack to generate same code as before.
246
; Hardware selector support code.
247
 
248
; Instruction operand support code.
249
 
250
; gen-type      - Return C type to use to hold operand's value.
251
; gen-read      - Record an operand's value prior to parallely executing
252
;                 several instructions.  Not used if gen-write used.
253
; gen-write     - Write back an operand's value after parallely executing
254
 
255
; cxmake-get    - Return C code to fetch the value of an operand.
256
; gen-set-quiet - Return C code to set the value of an operand.
257
; gen-set-trace - Return C code to set the value of an operand, and print
258
;                 a result trace message.  ??? Ideally this will go away when
259
;                 trace record support is complete.
260
; Return the C type of an operand.
261
; Generally we forward things on to TYPE, but for the actual type we need to
262
; use the get-mode method.
263
 
264
; First get the mode.
265
 
266
; Extra pc operand methods.
267
 
268
"pc"; Default gen-read method.
269
; This is used to help support targets with parallel insns.
270
; Either this or gen-write (but not both) is used.
271
"  "" ("") = "; Pass #f for the index -> use the operand's builtin index.
272
 
273
";\n"; Forward gen-write onto the <hardware> object.
274
; If operand is conditionally written, we have to check that first.
275
; ??? If two (or more) operands are written based on the same condition,
276
; all the tests can be collapsed together.  Not sure that's a big
277
; enough win yet.
278
"  if (written & (1ULL << ""))\n""    {\n""    ""    }\n"; Return <c-expr> object to get the value of an operand.
279
; ESTATE is the current rtl evaluator state.
280
; If INDEX is non-#f use it, otherwise use (op:index self).
281
; This special handling of #f for INDEX is *only* supported for operands
282
; in cxmake-get, gen-set-quiet, and gen-set-trace.
283
; Ditto for SELECTOR.
284
 
285
"  {\n""    "" opval = "";\n""    written |= (1ULL << "");\n"""; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
286
; For each insn record array of operand numbers [or indices into
287
; operand instance table].
288
; Could just scan the operand table for the operand or hardware number,
289
 
290
"""    if (UNLIKELY(current_cpu->trace_result_p))\n""      current_cpu->trace_stream << "" << '['"" << "; print memory addresses in hex
291
"\"memory\""" \"0x\" << hex << (UDI) """"\"memory\""" << dec"""" << ']'"""" << \":=0x\" << hex << "; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
292
; from printing byte as plain raw char.
293
"(SI) ""(USI) """"opval << dec << \"  \";\n"; Dispatch to setter code if appropriate
294
"    ""opval""opval";else
295
"opval""  }\n""    ""_memory"""""""", ""  {\n";; delayed write: push it to the appropriate buffer
296
" opval = "";\n""buf.""_writes [(tick + "") % @prefix@::pipe_sz].push (@prefix@::write<"">(pc, opval""));\n";; else, uh, we should never have been called!
297
"-op-gen-delayed-set-maybe-trace called on non-delayed operand"; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
298
; For each insn record array of operand numbers [or indices into
299
; operand instance table].
300
; Could just scan the operand table for the operand or hardware number,
301
 
302
"    if (UNLIKELY(current_cpu->trace_result_p))\n""      current_cpu->trace_stream << "" << '['"" << "; print memory addresses in hex
303
"\"memory\""" \"0x\" << hex << (UDI) """"\"memory\""" << dec"""" << ']'"""" << \":=0x\" << hex << ";; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
304
;; from printing byte as plain raw char.
305
"(SI) ""(USI) """"opval << dec << \"  \";\n""  }\n";; else no tracing is emitted
306
""; Return C code to set the value of an operand.
307
; NEWVAL is a <c-expr> object of the value to store.
308
; If INDEX is non-#f use it, otherwise use (op:index self).
309
; This special handling of #f for INDEX is *only* supported for operands
310
; in cxmake-get, gen-set-quiet, and gen-set-trace.
311
; Ditto for SELECTOR.
312
; Return C code to set the value of an operand and print TRACE_RESULT message.
313
; NEWVAL is a <c-expr> object of the value to store.
314
; If INDEX is non-#f use it, otherwise use (op:index self).
315
; This special handling of #f for INDEX is *only* supported for operands
316
 
317
; Ditto for SELECTOR.
318
; Operand profiling and parallel execution support.
319
; Return boolean indicating if operand OP needs its index saved
320
; (for parallel write post-processing support).
321
; Return C code to record profile data for modeling use.
322
; In the case of a register, this is usually the register's number.
323
; This shouldn't be called in the case of a scalar, the code should be
324
; smart enough to know there is no need.
325
"c++"; Return C code to record the data needed for profiling operand SELF.
326
; This is done during extraction.
327
"""      ""out_""in_"" = "";\n"; Return C code to track profiling of operand SELF.
328
; This is usually called by the x-after handler.
329
"  ""@prefix@_model_mark_""set_""get_""_"" (current_cpu"""", ""out_""in_"");\n"; CPU, mach, model support.
330
; Return the declaration of the cpu/insn enum.
331
"@prefix@_insn_type""instructions in cpu family @prefix@""@PREFIX@_INSN_"; Return the enum of INSN in cpu family CPU.
332
; In addition to CGEN_INSN_TYPE, an enum is created for each insn in each
333
; cpu family.  This collapses the insn enum space for each cpu to increase
334
; cache efficiently (since the IDESC table is similarily collapsed).
335
"@PREFIX@_INSN_"; Return C code to declare the machine data.
336
"extern const MACH ""_mach;\n""\n"; Return C code to define the machine data.
337
"const MACH *sim_machs[] =\n{\n""#ifdef ""\n""  & ""_mach,\n""#endif\n""  0\n""};\n\n"; Return C declarations of cpu model support stuff.
338
; ??? This goes in arch.h but a better place is each cpu.h.
339
"model types""MODEL_""#define MAX_MODELS ((int) MODEL_MAX)\n\n"; Function units.
340
""; Lookup operand named OP-NAME in INSN.
341
; Returns #f if OP-NAME is not an operand of INSN.
342
 
343
; and 'in-out to request either (though if an operand is used for input and
344
 
345
; FIXME: Move elsewhere.
346
"insn-op-lookup: bad arg:"; Return C code to profile a unit's usage.
347
; UNIT-NUM is number of the unit in INSN.
348
; OVERRIDES is a list of (name value) pairs, where
349
; - NAME is a spec name, one of cycles, pred, in, out.
350
 
351
;   as they appear in the semantic code to operand names as they appear in
352
 
353
; - VALUE is the operand to NAME.  For in,out it is (NAME VALUE) where
354
 
355
;   - VALUE is the name of the operand as it appears in semantic code.
356
 
357
; ??? This is a big sucker, though half of it is just the definitions
358
 
359
"  'gen-profile-code\n"; Return C code to initialize UNIT-REFERENCED-VAR to be a bit mask
360
; of operands of UNIT that were read/written by INSN.
361
; INSN-REFERENCED-VAR is a bitmask of operands read/written by INSN.
362
; All we have to do is map INSN-REFERENCED-VAR to
363
; UNIT-REFERENCED-VAR.
364
 
365
"    gen-ref-arg\n""insn_referenced""referenced""    ""if ("" & (1 << "")) "" |= 1 << "";\n""    "" |= 1 << "";\n"""; Initialize unit argument ARG.
366
 
367
"    gen-arg-unit\n"; Ignore scalars.
368
; Ignore remapped arg, handled elsewhere.
369
; Ignore operands not in INSN.
370
"""    ""out_""in_"" = ""out_""in_"";\n"; Return C code to declare variable to hold unit argument ARG.
371
 
372
"    gen-arg-decl ""\n"; ignore scalars
373
 
374
; OUT? is #f for input args, #t for output args.
375
 
376
""", ""out_""in_""  {\n""    int referenced = 0;\n""    unsigned long long insn_referenced = abuf->written;\n"""; Declare variables to hold unit arguments.
377
; Initialize 'em, being careful not to initialize an operand that
378
; has an override.
379
; Make a list of names of in/out overrides.
380
"""""""""    in_"" = ""in_"";\n""""    out_"" = ""out_"";\n""""insn function unit spec""invalid spec"; Create bitmask indicating which args were referenced.
381
 
382
"    "" += "" (current_cpu, idesc"", "", referenced"""");\n""  }\n"; Return C code to profile an insn-specific unit's usage.
383
; UNIT-NUM is number of the unit in INSN.
384
; Mode support.
385
; Generate a table of mode data.
386
; For now all we need is the names.
387
 
388
; mode here, so ignore them.
389
"};\n\n"; Insn profiling support.
390
; Generate declarations for local variables needed for modelling code.
391
;   (let ((cti? (or (has-attr? self 'UNCOND-CTI)
392
;                  (has-attr? self 'COND-CTI))))
393
;     (string-append
394
;      (if cti? "  int UNUSED taken_p = 0;\n" "")
395
 
396
""; Generate C code to profile INSN.
397
 
398
; Return list of all instructions to use for scache engine.
399
; This is all real insns plus the `invalid' and `cond' virtual insns.
400
; It does not include the pbb virtual insns.
401
; Return list of all instructions to use for pbb engine.
402
; This is all real insns plus the `invalid' and `cond' virtual insns.
403
;; Subroutine of -create-virtual-insns!.
404
;; Add virtual insn INSN to the database.
405
 
406
;; and it helps to see them first in lists.
407
;; ORDINAL is a used to place the insn ahead of normal insns;
408
;; it is a pair so we can do the update for the next virtual insn here.
409
; Create the virtual insns.
410
"virtual insns";; Record as a pair so -virtual-insn-add! can update it.
411
"invalid insn handler""--invalid--""\
412
  {
413
    current_cpu->invalid_insn (pc);
414
    assert (0);
415
    /* NOTREACHED */
416
  }
417
""pbb begin handler""--begin--""\
418
  {
419
    vpc = current_cpu->@prefix@_pbb_begin (current_cpu->h_pc_get ());
420
  }
421
""pbb chain handler""--chain--""\
422
  {
423
    vpc = current_cpu->@prefix@_engine.pbb_chain (current_cpu, abuf);
424
    // If we don't have to give up control, don't.
425
 
426
    // end of the block.  This is defined to be ok.
427
 
428
      BREAK (vpc);
429
  }
430
""pbb cti-chain handler""--cti-chain--""\
431
  {
432
    vpc = current_cpu->@prefix@_engine.pbb_cti_chain (current_cpu, abuf, pbb_br_status, pbb_br_npc);
433
    // If we don't have to give up control, don't.
434
    // Note that we may overrun step_insn_count since we do the test at the
435
    // end of the block.  This is defined to be ok.
436
    if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
437
 
438
  }
439
""pbb before handler""--before--""\
440
  {
441
    current_cpu->@prefix@_engine.pbb_before (current_cpu, abuf);
442
  }
443
""pbb after handler""--after--""\
444
  {
445
    current_cpu->@prefix@_engine.pbb_after (current_cpu, abuf);
446
 
447
"; If entire instruction set is conditionally executed, create a virtual
448
; insn to handle that.
449
"conditional exec test""--cond--""\
450
  {
451
    // Assume branch not taken.
452
    pbb_br_status = BRANCH_UNTAKEN;
453
    UINT cond_code = abuf->cond;
454
    BI exec_p = ""cond_code"";
455
    if (! exec_p)
456
      ++vpc;
457
  }
458
"; Return a boolean indicating if INSN should be split.
459
 
460
; Build the ifield-assertion for ifield F-NAME.
461
 
462
; Subroutine of -decode-split-insn.
463
; Specialize INSN according to <decode-split> dspec.
464
; Split INSN.
465
; The result is a list of the split copies of INSN.
466
"Splitting "" ...\n"; FIXME: check constraint
467
 
468
; Create copies of insns to be split.
469
; ??? better phrase needed?  Possible confusion with gcc's define-split.
470
; The original insns are then marked as aliases so the simulator ignores them.
471
"Splitting instructions ...\n";; Splice new insns next to original.
472
 
473
;; easier to read for human viewer.
474
;; This is done by using an ordinal of
475
;; (major . minor).
476
"Done splitting.\n"; .cpu file loading support
477
; Only run sim-analyze-insns! once.
478
; List of computed sformat argument buffers.
479
; Called before the .cpu file has been read in.
480
; Called after the .cpu file has been read in.
481
 
482
; go through methods, thus allowing the programmer to override them.
483
"read hardware elements via cover functions/methods""write hardware elements via cover functions/methods"; If there is a .sim file, load it.
484
"/cpu/"".sim""Loading sim file "" ...\n"; If we're building files for an isa, create the virtual insns.
485
; Called after file is read in and global error checks are done
486
; to initialize tables.
487
; Scan insns, copying them to the simulator insn list, splitting the
488
; requested insns, then analyze the semantics and compute instruction formats.
489
 
490
; needs to be done or not (which is determined by what files are being
491
; generated).  Since this is an expensive operation, we defer doing this
492
; to the files that need it.
493
; This can only be done if one isa and one cpu family is being kept.
494
; don't include aliases
495
; do analyze the semantics
496
; Compute the set of sformat argument buffers.
497
; Do our own error checking.
498
 

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