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jlechner |
; Simulator generator support routines.
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; Copyright (C) 2000, 2005, 2009 Red Hat, Inc.
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; This file is part of CGEN.
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; i.e. this file fills in the missing pieces of the interface between
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; the application independent part of CGEN (i.e. the code loaded by read.scm)
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; and the application dependent part (i.e. sim-*.scm).
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; `send' is not intended to appear in sim-*.scm.
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; [It still does but that's to be fixed.]
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; Specify which application.
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; Currently supported options:
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; with-scache
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; with-pbb
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; with-sem-frags
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; generate semantic fragment engine (requires with-pbb)
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; with-profile fn|sw
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; generate code to do profiling in the semantic function
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; code (fn) or in the semantic switch (sw)
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; with-multiple-isa
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; enable multiple-isa support (e.g. arm+thumb)
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; ??? wip.
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; copyright fsf|redhat
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; emit an FSF or Red Hat copyright (temporary, pending decision)
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; package gnusim|cygsim
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; indicate the software package
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; #t if the scache is being used
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; #t if we're generating profiling code
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; Each of the function and switch semantic code can have profiling.
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; The options as passed are stored in -with-profile-{fn,sw}?, and
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; -with-profile? is set at code generation time.
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; #t if semantics are generated as pbb computed-goto engine
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; #t if the semantic fragment engine is to be used.
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; This involves combining common fragments of each insn into one.
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; String containing text defining the package we're generating code for.
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; Initialize the options.
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; Handle an option passed in from the command line.
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"fn""sw""invalid with-profile value""fsf""redhat""invalid copyright value""gnusim""cygsim""invalid package value""unknown option"; #t if we're currently generating a pbb engine.
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; #t if the cpu can execute insns parallely.
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; This one isn't passed on the command line, but we follow the convention
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; of prefixing these things with `with-'.
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; While processing operand reading (or writing), parallel execution support
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; needs to be turned off, so it is up to the appropriate cgen-foo.c proc to
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; Kind of parallel support.
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; If 'read, read pre-processing is done.
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; If 'write, write post-processing is done.
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; version used read pre-processing. Not sure supporting both is useful
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; in the long run.
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; #t if parallel support is provided by read pre-processing.
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; Cover functions for various methods.
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; Return the C type of something. This isn't always a mode.
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; Return the C type of an index's value or #f if not needed (scalar).
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; Misc. utilities.
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; ISAS is a list of <isa> objects.
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; The idea is that in multiple isa architectures (e.g. arm) the elements
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; isa are kept in separate classes.
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"current_cpu->@cpu@_hardware.""current_cpu->hardware."; Attribute support.
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; PC-VAR is the C expression containing the address of the start of the
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;
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; We don't bother trying to handle bitsizes that don't have a
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; corresponding GETIMEM method. Doing so would require us to take
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; endianness into account just to ensure that the requested bits end
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; up at the proper place in the result. It's easier just to make the
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; caller ask us for something we can do directly.
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;
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; ??? Aligned/unaligned support?
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"current_cpu->GETIMEM""UQI""UHI""USI""bad bitsize argument to gen-ifetch"" (pc, "" + "")"; Return definition of an object's attributes.
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; This is like gen-obj-attr-defn, except split for sid.
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; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
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; ALL-ATTRS is an ordered alist of all attributes.
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; duplicate entries have been removed.
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"{ "","" 0"; drop the leading ","
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; FIXME: Are we missing attr-prefix here?
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", "" }"; Instruction field support code.
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; Return a <c-expr> object of the value of an ifield.
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; ??? Perhaps a better way would be to defer evaluating the src of a
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; set until the method processing the dest.
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""; Type system.
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; Methods:
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; gen-type - return C code representing the type
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; gen-sym-decl - generate decl using the provided symbol
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; gen-sym-get-macro - generate GET macro for accessing CPU elements
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; gen-sym-set-macro - generate SET macro for accessing CPU elements
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; Scalar type
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" /* "" */\n"" "" "";\n"; Array type
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" /* "" */\n"" "" "";\n"; Return a reference to the array.
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; SYM is the name of the array.
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; INDEX is either a single index object or a (possibly empty) list of objects,
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; one object per dimension.
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"[""]"; Integers
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;
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;(method-make!
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; <integer> 'gen-type
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; (lambda (self)
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; (mode:c-type (mode-find (elm-get self 'bits)
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; 'UINT 'INT)))
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; )
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;)
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;
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;(method-make! <integer> 'gen-sym-get-macro (lambda (self sym comment) ""))
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;(method-make! <integer> 'gen-sym-set-macro (lambda (self sym comment) ""))
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; Hardware descriptions support code.
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;
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; Various operations are required for each h/w object to support the various
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; things the simulator will want to do with it.
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;
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; Methods:
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; gen-decl
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; cxmake-get - Return a <c-expr> object to fetch the value.
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; gen-set-quiet - Set the value.
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; ??? Could just call this gen-set as there is no gen-set-trace
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; but for consistency with the messages passed to operands
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; we use this same.
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; gen-type - C type to use to record value.
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; ??? Delete and just use get-mode?
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; save-index? - return #t if an index needs to be saved for parallel
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; execution post-write processing
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; gen-profile-decl
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; gen-record-profile
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; get-mode
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; gen-profile-locals
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; gen-sym-decl - Return a C declaration using the provided symbol.
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; gen-sym-get-macro - Generate default GET access macro.
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; gen-ref - Return a C reference to the object.
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""; Return a C reference to a hardware object.
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"gen-write method not overridden:"; gen-type handler, must be overridden
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""; nothing to do
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; Return a <c-expr> object of the value of SELF.
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; ESTATE is the current rtl evaluator state.
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; INDEX is a <hw-index> object. It must be an ifield.
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; SELECTOR is a hardware selector RTX.
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;(if (not (eq? 'ifield (hw-index:type index)))
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; (error "not an ifield hw-index" index))
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; 'gen-set-quiet helper for PC values.
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; If OPTIONS contains #:direct, set the PC directly, bypassing semantic
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; code considerations.
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; ??? OPTIONS support wip. Probably want a new form (or extend existing form)
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; of rtx: that takes a variable number of named arguments.
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; ??? Another way to get #:direct might be (raw-reg h-pc).
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; This is done in a post-processing pass after semantic evaluation.
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; SFMT is the <sformat>.
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; OP is the operand.
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; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
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; during semantic evaluation.
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;
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; At this point I'm reluctant to willy nilly make methods virtual.
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; Forward these methods onto TYPE.
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; For parallel instructions supported by queueing outputs for later update,
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; return a boolean indicating if an index needs to be recorded.
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; An example of when the index isn't needed is if the index can be determined
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; during extraction.
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; For array registers, we need to store away the index.
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; Handle updates of registers during parallel execution.
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; This is done in a post-processing pass after semantic evaluation.
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; SFMT is the <sformat>.
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; OP is the <operand>.
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; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
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; FIXME: May need mode of OP.
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; First get a hw-index object to use during indexing.
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; Some indices, e.g. memory addresses, are computed during semantic
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; evaluation. Others are computed during the extraction phase.
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" "" ("")"" /* "" */\n"" unsigned long "";\n"; FIXME: Need to handle scalars.
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;(send index 'gen-extracted-field-value)
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; Utilities to generate register accesses via cover functions.
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"current_cpu->"" ("""")""current_cpu->"" ("""", "");\n"; Utility to build a <c-expr> object to fetch the value of a register.
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; If the register is accessed via a cover function/macro, do it.
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; Otherwise fetch the value from the cached address or from the CPU struct.
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; FIXME: redo test
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; ??? raw-reg: support is wip
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; Utilities to generate C code to assign a variable to a register.
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; FIXME: redo test
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"* "" = "";\n"" = "";\n"; raw-reg: support
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; ??? wip
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" = "";\n"; Return method name of access function.
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; Common elements have no prefix.
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"_""""_get""_""""_set"; Memory support.
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"current_cpu->GETMEM""""ASI"" (""pc, """", "")""current_cpu->SETMEM""""ASI"" (""pc, """", "", "");\n"""""""; For parallel instructions supported by queueing outputs for later update,
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; return the type of the index or #f if not needed.
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; In the case of the complete memory address being an immediate
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; argument, we can return #f (later).
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" "" ("")"; Immediates, addresses.
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; Forward these methods onto TYPE.
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"gen-write of <hw-immediate> shouldn't happen"; FIXME.
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"ADDR"""""""; Return a <c-expr> object of the value of SELF.
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; ESTATE is the current rtl evaluator state.
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; INDEX is a hw-index object. It must be an ifield.
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; Needed because we record our own copy of the ifield in ARGBUF.
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; SELECTOR is a hardware selector RTX.
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"not an ifield hw-index""gen-write of <hw-address> shouldn't happen"; FIXME: revisit.
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"IADDR"; Return a <c-expr> object of the value of SELF.
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; ESTATE is the current rtl evaluator state.
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; INDEX is a <hw-index> object. It must be an ifield.
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; Needed because we record our own copy of the ifield in ARGBUF,
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; *and* because we want to record in the result the 'CACHED attribute
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; since instruction addresses based on ifields are fixed [and thus cacheable].
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; SELECTOR is a hardware selector RTX.
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; set until the method processing the dest.
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; Return the index to use by the gen-write method.
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; execution time), the index is computed along with the value to be stored,
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; so this is easy.
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" ("")"; Return the name of the PAREXEC structure member holding a hardware index
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; for operand OP.
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"_idx"; Cover fn to hardware indices to generate the actual C code.
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; INDEX is the hw-index object (i.e. op:index).
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; The result is a string of C code.
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; FIXME:wip
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; ??? May wish to handle more similarily.
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; e.g. doing array index calcs at extraction time.
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"""(("") "")""""-gen-hw-index: invalid index:"; Return a <c-expr> object of the value of a hardware index.
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; If MODE is VOID, abort.
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"hw-index:cxmake-get: result needs a mode"; FIXME: Temporary hack to generate same code as before.
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; Hardware selector support code.
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; Instruction operand support code.
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; gen-type - Return C type to use to hold operand's value.
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; gen-read - Record an operand's value prior to parallely executing
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; several instructions. Not used if gen-write used.
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; gen-write - Write back an operand's value after parallely executing
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; cxmake-get - Return C code to fetch the value of an operand.
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; gen-set-quiet - Return C code to set the value of an operand.
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; gen-set-trace - Return C code to set the value of an operand, and print
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; a result trace message. ??? Ideally this will go away when
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; trace record support is complete.
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; Return the C type of an operand.
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; Generally we forward things on to TYPE, but for the actual type we need to
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; use the get-mode method.
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; First get the mode.
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; Extra pc operand methods.
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"pc"; Default gen-read method.
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; This is used to help support targets with parallel insns.
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; Either this or gen-write (but not both) is used.
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" "" ("") = "; Pass #f for the index -> use the operand's builtin index.
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";\n"; Forward gen-write onto the <hardware> object.
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; If operand is conditionally written, we have to check that first.
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; ??? If two (or more) operands are written based on the same condition,
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; all the tests can be collapsed together. Not sure that's a big
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; enough win yet.
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" if (written & (1ULL << ""))\n"" {\n"" "" }\n"; Return <c-expr> object to get the value of an operand.
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; ESTATE is the current rtl evaluator state.
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; If INDEX is non-#f use it, otherwise use (op:index self).
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; This special handling of #f for INDEX is *only* supported for operands
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; in cxmake-get, gen-set-quiet, and gen-set-trace.
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; Ditto for SELECTOR.
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" {\n"" "" opval = "";\n"" written |= (1ULL << "");\n"""; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
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; For each insn record array of operand numbers [or indices into
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; operand instance table].
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; Could just scan the operand table for the operand or hardware number,
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""" if (UNLIKELY(current_cpu->trace_result_p))\n"" current_cpu->trace_stream << "" << '['"" << "; print memory addresses in hex
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"\"memory\""" \"0x\" << hex << (UDI) """"\"memory\""" << dec"""" << ']'"""" << \":=0x\" << hex << "; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
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; from printing byte as plain raw char.
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"(SI) ""(USI) """"opval << dec << \" \";\n"; Dispatch to setter code if appropriate
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" ""opval""opval";else
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"opval"" }\n"" ""_memory"""""""", "" {\n";; delayed write: push it to the appropriate buffer
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" opval = "";\n""buf.""_writes [(tick + "") % @prefix@::pipe_sz].push (@prefix@::write<"">(pc, opval""));\n";; else, uh, we should never have been called!
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"-op-gen-delayed-set-maybe-trace called on non-delayed operand"; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
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; For each insn record array of operand numbers [or indices into
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; operand instance table].
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; Could just scan the operand table for the operand or hardware number,
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" if (UNLIKELY(current_cpu->trace_result_p))\n"" current_cpu->trace_stream << "" << '['"" << "; print memory addresses in hex
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"\"memory\""" \"0x\" << hex << (UDI) """"\"memory\""" << dec"""" << ']'"""" << \":=0x\" << hex << ";; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
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;; from printing byte as plain raw char.
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"(SI) ""(USI) """"opval << dec << \" \";\n"" }\n";; else no tracing is emitted
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""; Return C code to set the value of an operand.
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; NEWVAL is a <c-expr> object of the value to store.
|
308 |
|
|
; If INDEX is non-#f use it, otherwise use (op:index self).
|
309 |
|
|
; This special handling of #f for INDEX is *only* supported for operands
|
310 |
|
|
; in cxmake-get, gen-set-quiet, and gen-set-trace.
|
311 |
|
|
; Ditto for SELECTOR.
|
312 |
|
|
; Return C code to set the value of an operand and print TRACE_RESULT message.
|
313 |
|
|
; NEWVAL is a <c-expr> object of the value to store.
|
314 |
|
|
; If INDEX is non-#f use it, otherwise use (op:index self).
|
315 |
|
|
; This special handling of #f for INDEX is *only* supported for operands
|
316 |
|
|
|
317 |
|
|
; Ditto for SELECTOR.
|
318 |
|
|
; Operand profiling and parallel execution support.
|
319 |
|
|
; Return boolean indicating if operand OP needs its index saved
|
320 |
|
|
; (for parallel write post-processing support).
|
321 |
|
|
; Return C code to record profile data for modeling use.
|
322 |
|
|
; In the case of a register, this is usually the register's number.
|
323 |
|
|
; This shouldn't be called in the case of a scalar, the code should be
|
324 |
|
|
; smart enough to know there is no need.
|
325 |
|
|
"c++"; Return C code to record the data needed for profiling operand SELF.
|
326 |
|
|
; This is done during extraction.
|
327 |
|
|
""" ""out_""in_"" = "";\n"; Return C code to track profiling of operand SELF.
|
328 |
|
|
; This is usually called by the x-after handler.
|
329 |
|
|
" ""@prefix@_model_mark_""set_""get_""_"" (current_cpu"""", ""out_""in_"");\n"; CPU, mach, model support.
|
330 |
|
|
; Return the declaration of the cpu/insn enum.
|
331 |
|
|
"@prefix@_insn_type""instructions in cpu family @prefix@""@PREFIX@_INSN_"; Return the enum of INSN in cpu family CPU.
|
332 |
|
|
; In addition to CGEN_INSN_TYPE, an enum is created for each insn in each
|
333 |
|
|
; cpu family. This collapses the insn enum space for each cpu to increase
|
334 |
|
|
; cache efficiently (since the IDESC table is similarily collapsed).
|
335 |
|
|
"@PREFIX@_INSN_"; Return C code to declare the machine data.
|
336 |
|
|
"extern const MACH ""_mach;\n""\n"; Return C code to define the machine data.
|
337 |
|
|
"const MACH *sim_machs[] =\n{\n""#ifdef ""\n"" & ""_mach,\n""#endif\n"" 0\n""};\n\n"; Return C declarations of cpu model support stuff.
|
338 |
|
|
; ??? This goes in arch.h but a better place is each cpu.h.
|
339 |
|
|
"model types""MODEL_""#define MAX_MODELS ((int) MODEL_MAX)\n\n"; Function units.
|
340 |
|
|
""; Lookup operand named OP-NAME in INSN.
|
341 |
|
|
; Returns #f if OP-NAME is not an operand of INSN.
|
342 |
|
|
|
343 |
|
|
; and 'in-out to request either (though if an operand is used for input and
|
344 |
|
|
|
345 |
|
|
; FIXME: Move elsewhere.
|
346 |
|
|
"insn-op-lookup: bad arg:"; Return C code to profile a unit's usage.
|
347 |
|
|
; UNIT-NUM is number of the unit in INSN.
|
348 |
|
|
; OVERRIDES is a list of (name value) pairs, where
|
349 |
|
|
; - NAME is a spec name, one of cycles, pred, in, out.
|
350 |
|
|
|
351 |
|
|
; as they appear in the semantic code to operand names as they appear in
|
352 |
|
|
|
353 |
|
|
; - VALUE is the operand to NAME. For in,out it is (NAME VALUE) where
|
354 |
|
|
|
355 |
|
|
; - VALUE is the name of the operand as it appears in semantic code.
|
356 |
|
|
|
357 |
|
|
; ??? This is a big sucker, though half of it is just the definitions
|
358 |
|
|
|
359 |
|
|
" 'gen-profile-code\n"; Return C code to initialize UNIT-REFERENCED-VAR to be a bit mask
|
360 |
|
|
; of operands of UNIT that were read/written by INSN.
|
361 |
|
|
; INSN-REFERENCED-VAR is a bitmask of operands read/written by INSN.
|
362 |
|
|
; All we have to do is map INSN-REFERENCED-VAR to
|
363 |
|
|
; UNIT-REFERENCED-VAR.
|
364 |
|
|
|
365 |
|
|
" gen-ref-arg\n""insn_referenced""referenced"" ""if ("" & (1 << "")) "" |= 1 << "";\n"" "" |= 1 << "";\n"""; Initialize unit argument ARG.
|
366 |
|
|
|
367 |
|
|
" gen-arg-unit\n"; Ignore scalars.
|
368 |
|
|
; Ignore remapped arg, handled elsewhere.
|
369 |
|
|
; Ignore operands not in INSN.
|
370 |
|
|
""" ""out_""in_"" = ""out_""in_"";\n"; Return C code to declare variable to hold unit argument ARG.
|
371 |
|
|
|
372 |
|
|
" gen-arg-decl ""\n"; ignore scalars
|
373 |
|
|
|
374 |
|
|
; OUT? is #f for input args, #t for output args.
|
375 |
|
|
|
376 |
|
|
""", ""out_""in_"" {\n"" int referenced = 0;\n"" unsigned long long insn_referenced = abuf->written;\n"""; Declare variables to hold unit arguments.
|
377 |
|
|
; Initialize 'em, being careful not to initialize an operand that
|
378 |
|
|
; has an override.
|
379 |
|
|
; Make a list of names of in/out overrides.
|
380 |
|
|
""""""""" in_"" = ""in_"";\n"""" out_"" = ""out_"";\n""""insn function unit spec""invalid spec"; Create bitmask indicating which args were referenced.
|
381 |
|
|
|
382 |
|
|
" "" += "" (current_cpu, idesc"", "", referenced"""");\n"" }\n"; Return C code to profile an insn-specific unit's usage.
|
383 |
|
|
; UNIT-NUM is number of the unit in INSN.
|
384 |
|
|
; Mode support.
|
385 |
|
|
; Generate a table of mode data.
|
386 |
|
|
; For now all we need is the names.
|
387 |
|
|
|
388 |
|
|
; mode here, so ignore them.
|
389 |
|
|
"};\n\n"; Insn profiling support.
|
390 |
|
|
; Generate declarations for local variables needed for modelling code.
|
391 |
|
|
; (let ((cti? (or (has-attr? self 'UNCOND-CTI)
|
392 |
|
|
; (has-attr? self 'COND-CTI))))
|
393 |
|
|
; (string-append
|
394 |
|
|
; (if cti? " int UNUSED taken_p = 0;\n" "")
|
395 |
|
|
|
396 |
|
|
""; Generate C code to profile INSN.
|
397 |
|
|
|
398 |
|
|
; Return list of all instructions to use for scache engine.
|
399 |
|
|
; This is all real insns plus the `invalid' and `cond' virtual insns.
|
400 |
|
|
; It does not include the pbb virtual insns.
|
401 |
|
|
; Return list of all instructions to use for pbb engine.
|
402 |
|
|
; This is all real insns plus the `invalid' and `cond' virtual insns.
|
403 |
|
|
;; Subroutine of -create-virtual-insns!.
|
404 |
|
|
;; Add virtual insn INSN to the database.
|
405 |
|
|
|
406 |
|
|
;; and it helps to see them first in lists.
|
407 |
|
|
;; ORDINAL is a used to place the insn ahead of normal insns;
|
408 |
|
|
;; it is a pair so we can do the update for the next virtual insn here.
|
409 |
|
|
; Create the virtual insns.
|
410 |
|
|
"virtual insns";; Record as a pair so -virtual-insn-add! can update it.
|
411 |
|
|
"invalid insn handler""--invalid--""\
|
412 |
|
|
{
|
413 |
|
|
current_cpu->invalid_insn (pc);
|
414 |
|
|
assert (0);
|
415 |
|
|
/* NOTREACHED */
|
416 |
|
|
}
|
417 |
|
|
""pbb begin handler""--begin--""\
|
418 |
|
|
{
|
419 |
|
|
vpc = current_cpu->@prefix@_pbb_begin (current_cpu->h_pc_get ());
|
420 |
|
|
}
|
421 |
|
|
""pbb chain handler""--chain--""\
|
422 |
|
|
{
|
423 |
|
|
vpc = current_cpu->@prefix@_engine.pbb_chain (current_cpu, abuf);
|
424 |
|
|
// If we don't have to give up control, don't.
|
425 |
|
|
|
426 |
|
|
// end of the block. This is defined to be ok.
|
427 |
|
|
|
428 |
|
|
BREAK (vpc);
|
429 |
|
|
}
|
430 |
|
|
""pbb cti-chain handler""--cti-chain--""\
|
431 |
|
|
{
|
432 |
|
|
vpc = current_cpu->@prefix@_engine.pbb_cti_chain (current_cpu, abuf, pbb_br_status, pbb_br_npc);
|
433 |
|
|
// If we don't have to give up control, don't.
|
434 |
|
|
// Note that we may overrun step_insn_count since we do the test at the
|
435 |
|
|
// end of the block. This is defined to be ok.
|
436 |
|
|
if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
|
437 |
|
|
|
438 |
|
|
}
|
439 |
|
|
""pbb before handler""--before--""\
|
440 |
|
|
{
|
441 |
|
|
current_cpu->@prefix@_engine.pbb_before (current_cpu, abuf);
|
442 |
|
|
}
|
443 |
|
|
""pbb after handler""--after--""\
|
444 |
|
|
{
|
445 |
|
|
current_cpu->@prefix@_engine.pbb_after (current_cpu, abuf);
|
446 |
|
|
|
447 |
|
|
"; If entire instruction set is conditionally executed, create a virtual
|
448 |
|
|
; insn to handle that.
|
449 |
|
|
"conditional exec test""--cond--""\
|
450 |
|
|
{
|
451 |
|
|
// Assume branch not taken.
|
452 |
|
|
pbb_br_status = BRANCH_UNTAKEN;
|
453 |
|
|
UINT cond_code = abuf->cond;
|
454 |
|
|
BI exec_p = ""cond_code"";
|
455 |
|
|
if (! exec_p)
|
456 |
|
|
++vpc;
|
457 |
|
|
}
|
458 |
|
|
"; Return a boolean indicating if INSN should be split.
|
459 |
|
|
|
460 |
|
|
; Build the ifield-assertion for ifield F-NAME.
|
461 |
|
|
|
462 |
|
|
; Subroutine of -decode-split-insn.
|
463 |
|
|
; Specialize INSN according to <decode-split> dspec.
|
464 |
|
|
; Split INSN.
|
465 |
|
|
; The result is a list of the split copies of INSN.
|
466 |
|
|
"Splitting "" ...\n"; FIXME: check constraint
|
467 |
|
|
|
468 |
|
|
; Create copies of insns to be split.
|
469 |
|
|
; ??? better phrase needed? Possible confusion with gcc's define-split.
|
470 |
|
|
; The original insns are then marked as aliases so the simulator ignores them.
|
471 |
|
|
"Splitting instructions ...\n";; Splice new insns next to original.
|
472 |
|
|
|
473 |
|
|
;; easier to read for human viewer.
|
474 |
|
|
;; This is done by using an ordinal of
|
475 |
|
|
;; (major . minor).
|
476 |
|
|
"Done splitting.\n"; .cpu file loading support
|
477 |
|
|
; Only run sim-analyze-insns! once.
|
478 |
|
|
; List of computed sformat argument buffers.
|
479 |
|
|
; Called before the .cpu file has been read in.
|
480 |
|
|
; Called after the .cpu file has been read in.
|
481 |
|
|
|
482 |
|
|
; go through methods, thus allowing the programmer to override them.
|
483 |
|
|
"read hardware elements via cover functions/methods""write hardware elements via cover functions/methods"; If there is a .sim file, load it.
|
484 |
|
|
"/cpu/"".sim""Loading sim file "" ...\n"; If we're building files for an isa, create the virtual insns.
|
485 |
|
|
; Called after file is read in and global error checks are done
|
486 |
|
|
; to initialize tables.
|
487 |
|
|
; Scan insns, copying them to the simulator insn list, splitting the
|
488 |
|
|
; requested insns, then analyze the semantics and compute instruction formats.
|
489 |
|
|
|
490 |
|
|
; needs to be done or not (which is determined by what files are being
|
491 |
|
|
; generated). Since this is an expensive operation, we defer doing this
|
492 |
|
|
; to the files that need it.
|
493 |
|
|
; This can only be done if one isa and one cpu family is being kept.
|
494 |
|
|
; don't include aliases
|
495 |
|
|
; do analyze the semantics
|
496 |
|
|
; Compute the set of sformat argument buffers.
|
497 |
|
|
; Do our own error checking.
|
498 |
|
|
|