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; Simulator generator support routines.

; Copyright (C) 2000, 2001, 2002, 2006, 2009 Red Hat, Inc.

; This file is part of CGEN.

; i.e. this file fills in the missing pieces of the interface between

; the application independent part of CGEN (i.e. the code loaded by read.scm)

; and the application dependent part (i.e. sim-*.scm).

; `send' is not intended to appear in sim-*.scm.

; [It still does but that's to be fixed.]

; Specify which application.

; Return the C type of something.  This isn't always a mode.

; Return the C type of an index's value or #f if not needed (scalar).

; Currently supported options:

;       generate code to use the scache

; with-profile fn|sw

;       code (fn) or in the semantic switch (sw)

;       For architectures that have parallel execution.

;       Execute the semantics by recording the results in a generic buffer,

;       and doing a post-semantics writeback pass.

; with-parallel-only

;       Only generate parallel versions of each insn.

; with-multiple-isa

; copyright fsf|redhat

; package gnusim|cygsim

;       indicate the software package

; #t if the scache is being used

; #t if we're generating profiling code

; Each of the function and switch semantic code can have profiling.

; The options as passed are stored in -with-profile-{fn,sw}?, and

; -with-profile? is set at code generation time.

; #t if multiple isa support is enabled

; Handle parallel execution with generic writeback pass.

; Only generate parallel versions of each insn.

; String containing copyright text.

; String containing text defining the package we're generating code for.

; Initialize the options.

; Handle an option passed in from the command line.

"fn""sw""invalid with-profile value""fsf""redhat""invalid copyright value""gnusim""cygsim""invalid package value""unknown option"; #t if the cpu can execute insns parallely.

; This one isn't passed on the command line, but we follow the convention

; of prefixing these things with `with-'.

; While processing operand reading (or writing), parallel execution support

; needs to be turned off, so it is up to the appropriate cgen-foo.c proc to

; Kind of parallel support.

; If 'read, read pre-processing is done.

; If 'write, write post-processing is done.

; version used read pre-processing.  Not sure supporting both is useful

; in the long run.

; #t if parallel support is provided by read pre-processing.

; #t if parallel support is provided by write post-processing.

; Misc. utilities.

; All machine generated cpu elements are accessed through a cover macro

; to hide the details of the underlying implementation.

"CPU"" ("")"; Return C code to fetch a value from instruction memory.

; PC-VAR is the C expression containing the address of the start of the

; ??? Aligned/unaligned support?

"GETIMEM""UQI""UHI""USI""bad bitsize argument to gen-ifetch"" (current_cpu, "" + "")"; Instruction field support code.

; Return a <c-expr> object of the value of an ifield.

; set until the method processing the dest.

""; Type system.

; Methods:

; gen-sym-decl - generate decl using the provided symbol

; gen-sym-get-macro - generate GET macro for accessing CPU elements

; gen-sym-set-macro - generate SET macro for accessing CPU elements

"  /* "" */\n""  "" "";\n"""""; Array type

"  /* "" */\n""  "" "";\n""#define GET_""("") ""\n""#define SET_""("", x) ""("" = (x))\n"; Return a reference to the array.

; INDEX is either a single index object or a (possibly empty) list of objects,

; one object per dimension.

;

; <integer> 'gen-type

; (lambda (self)

;   (mode:c-type (mode-find (elm-get self 'bits)

;                          (if (has-attr? self 'UNSIGNED)

;                              'UINT 'INT)))

;   )

;)

;

;(method-make! <integer> 'gen-sym-decl (lambda (self sym comment) ""))

;(method-make! <integer> 'gen-sym-get-macro (lambda (self sym comment) ""))

;(method-make! <integer> 'gen-sym-set-macro (lambda (self sym comment) ""))

;

; things the simulator will want to do with it.

;

; Methods:

; gen-decl

; gen-get-macro - Generate definition of the GET access macro.

; gen-set-macro - Generate definition of the SET access macro.

; gen-write     - Same as gen-read except done on output operands

; cxmake-get    - Return a <c-expr> object to fetch the value.

; gen-set-quiet - Set the value.

;                 ??? Could just call this gen-set as there is no gen-set-trace

;                 but for consistency with the messages passed to operands

;                 we use this same.

; gen-type      - C type to use to record value, as a string.

;                 ??? Delete and just use get-mode?

; save-index?   - return #t if an index needs to be saved for parallel

;                 execution post-write processing

; gen-profile-decl

; gen-record-profile

; get-mode

; gen-profile-locals

; gen-sym-decl  - Return a C declaration using the provided symbol.

; gen-sym-get-macro - Generate default GET access macro.

; gen-sym-set-macro - Generate default SET access macro.

; gen-ref       - Return a C reference to the object.

; Generate CPU state struct entries.

; Each hardware type must provide its own gen-write method.

"gen-write method not overridden:"; gen-type handler, must be overridden

"gen-type not overridden:"""; Default gen-record-profile method.

""; nothing to do

; Default cxmake-get method.

; Return a <c-expr> object of the value of SELF.

; ESTATE is the current rtl evaluator state.

; INDEX is a <hw-index> object.  It must be an ifield.

; SELECTOR is a hardware selector RTX.

""""; PC support

; 'gen-set-quiet helper for PC values.

; NEWVAL is a <c-expr> object of the value to be assigned.

; If OPTIONS contains #:direct, set the PC directly, bypassing semantic

; code considerations.

; ??? OPTIONS support wip.  Probably want a new form (or extend existing form)

; of rtx: that takes a variable number of named arguments.

; ??? Another way to get #:direct might be (raw-reg h-pc).

"Not a PC:""SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, "", vpc);\n""SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, "", vpc);\n"; Handle updates of the pc during parallel execution.

; This is done in a post-processing pass after semantic evaluation.

; SFMT is the <sformat>.

; OP is the operand.

; ACCESS-MACRO is the runtime C macro to use to fetch indices computed

; during semantic evaluation.

;

; At this point I'm reluctant to willy nilly make methods virtual.

; Forward these methods onto TYPE.

; For parallel instructions supported by queueing outputs for later update,

; An example of when the index isn't needed is if the index can be determined

; FIXME: Later handle case where register number is determined at runtime.

; Handle updates of registers during parallel execution.

; This is done in a post-processing pass after semantic evaluation.

; ACCESS-MACRO is the runtime C macro to use to fetch indices computed

; during semantic evaluation.

; FIXME: May need mode of OP.

; First get a hw-index object to use during indexing.

; evaluation.  Others are computed during the extraction phase.

"  "" ("")""  /* "" */\n""  unsigned long "";\n"; FIXME: Need to handle scalars.

"""index""index""""index""x"; not `mode', sets have mode VOID

"(x)""(index)""(x)"; Utility to build a <c-expr> object to fetch the value of a register.

; If the register is accessed via a cover function/macro, do it.

; Otherwise fetch the value from the cached address or from the CPU struct.

"GET_"" ("""")"; FIXME: redo test

"* "; raw-reg: support

; ??? raw-reg: support is wip

; Utilities to generate C code to assign a variable to a register.

"SET_"" ("""", "");\n"; FIXME: redo test

; ??? wip

"_""_get""_""_set"; Generate decls for access fns of register HW, beginning with

; SCALAR? is #t if the register is a scalar.  Otherwise it is #f and the

; register is a bank of registers.

" "" (SIM_CPU *"""", UINT"");\n""void "" (SIM_CPU *, """"UINT, "");\n"; Generate defns of access fns of register HW, beginning with

; PREFIX, using C type TYPE.

; SCALAR? is #t if the register is a scalar.  Otherwise it is #f and the

; register is a bank of registers.

; GET/SET-CODE are C fragments to get/set the value.

; ??? Inlining left for later.

"GETMEM""""ASI"" (""current_cpu, pc, """", "")""SETMEM""""ASI"" (""current_cpu, pc, """", "", "");\n"""""""; For parallel instructions supported by queueing outputs for later update,

; In the case of the complete memory address being an immediate

; argument, we can return #f (later).

"  "" ("")"; Immediates, addresses.

; Forward these methods onto TYPE.

"gen-write of <hw-immediate> shouldn't happen"; FIXME.

; ESTATE is the current rtl evaluator state.

; Needed because we record our own copy of the ifield in ARGBUF.

; SELECTOR is a hardware selector RTX.

"not an ifield hw-index""gen-write of <hw-address> shouldn't happen"; FIXME: revisit.

"IADDR"; Return a <c-expr> object of the value of SELF.

; INDEX is a <hw-index> object.  It must be an ifield.

; Needed because we record our own copy of the ifield in ARGBUF,

; *and* because we want to record in the result the 'CACHED attribute

; since instruction addresses based on ifields are fixed [and thus cacheable].

; SELECTOR is a hardware selector RTX.

"not an ifield hw-index"; ??? Perhaps a better way would be to defer evaluating the src of a

; set until the method processing the dest.

""; Hardware index support code.

; In the cases where this is needed (the index isn't known until insn

; execution time), the index is computed along with the value to be stored,

; so this is easy.

" ("")"; Return the name of the PAREXEC structure member holding a hardware index

; for operand OP.

"_idx"; Cover fn to hardware indices to generate the actual C code.

; The result is a string of C code.

; FIXME:wip

""; special case UINT to cut down on unnecessary verbosity.

; ??? May wish to handle more similarily.

"(("") "")""""-gen-hw-index-raw: invalid index:"; Same as -gen-hw-index-raw except used where speedups are possible.

; e.g. doing array index calcs at extraction time.

; FIXME: redo test

; If MODE is VOID, abort.

; Hardware selector support code.

; Generate C code for SEL.

; Instruction operand support code.

; Methods:

; gen-read      - Record an operand's value prior to parallely executing

;                 several instructions.  Not used if gen-write used.

; gen-write     - Write back an operand's value after parallely executing

;                 several instructions.  Not used if gen-read used.

; cxmake-get    - Return C code to fetch the value of an operand.

; gen-set-quiet - Return C code to set the value of an operand.

; gen-set-trace - Return C code to set the value of an operand, and print

;                 a result trace message.  ??? Ideally this will go away when

;                 trace record support is complete.

; Return the C type of an operand.

; Generally we forward things on to TYPE, but for the actual type we need to

;(method-make-forward! <operand> 'type '(gen-type))

; First get the mode.

; If it's VOID use the type's type.

; Extra pc operand methods.

; The enclosing function must set `pc' to the correct value.

"pc"; For parallel write post-processing, we don't want to defer setting the pc.

; ??? Not sure anymore.

;(method-make!

; <pc> 'gen-set-quiet

; (lambda (self estate mode index selector newval)

;   (-op-gen-set-quiet self estate mode index selector newval)))

; <pc> 'gen-set-trace

; (lambda (self estate mode index selector newval)

;   (-op-gen-set-trace self estate mode index selector newval)))

; Name of C macro to access parallel execution operand support.

"OPRND"; Return C code to fetch an operand's value and save it away for the

; semantic handler.  This is used to handle parallel execution of several

; instructions where all inputs of all insns are read before any outputs are

; written.

; For operands, the word `read' is only used in this context.

; Return C code to write an operand's value.

; This is used to handle parallel execution of several instructions where all

; outputs are written to temporary spots first, and then a final

; For operands, the word `write' is only used in this context.

; Default gen-read method.

; This is used to help support targets with parallel insns.

; Either this or gen-write (but not both) is used.

; Ditto for the selector.

";\n"; Forward gen-write onto the <hardware> object.

; If operand is conditionally written, we have to check that first.

; ??? If two (or more) operands are written based on the same condition,

; all the tests can be collapsed together.  Not sure that's a big

; enough win yet.

"  if (written & (1 << ""))\n""    {\n""    ""    }\n"; Return <c-expr> object to get the value of an operand.

; ESTATE is the current rtl evaluator state.

; If INDEX is non-#f use it, otherwise use (op:index self).

; This special handling of #f for INDEX is *only* supported for operands

; in cxmake-get, gen-set-quiet, and gen-set-trace.

; If the instruction could be parallely executed with others and we're

; doing read pre-processing, the operand has already been fetched, we

; just have to grab the cached value.

; ??? reg-raw: support wip

" ("")"; FIXME: want CACHED attr if present

; Utilities to implement gen-set-quiet/gen-set-trace.

; Return C code to call the appropriate queued-write handler.

; ??? wip

"    ""sim_queue_"; FIXME: clean up (pc? op) vs (memory? hw)

; FIXME: (send 'pc?) is a temporary hack, (pc? op) didn't work

"fn_""""pc""mem_""scalar_""""fn_""""_write (current_cpu"; ??? May need to include h/w id some day.

", ""@cpu@"""""", "", "", "", "");\n""    "" ("")"" = "";\n""""    "" ("")"" = "";\n""  {\n""    "" opval = "";\n"; Dispatch to setter code if appropriate

"    ""opval""opval";else

"opval""    written |= (1 << "");\n"""; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);

; operand instance table].

; Could just scan the operand table for the operand or hardware number,

; assuming the operand number is stored in `op'.

"    TRACE_RESULT (current_cpu, abuf"", "", "", opval);\n""  }\n""  {\n""    "" opval = "";\n""opval""    "" ("")"" = "";\n""""    "" ("")"" = opval;\n""    written |= (1 << "");\n"""; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);

; For each insn record array of operand numbers [or indices into

; operand instance table].

; Could just scan the operand table for the operand or hardware number,

; assuming the operand number is stored in `op'.

"    TRACE_RESULT (current_cpu, abuf"", "", "", opval);\n""  }\n"; Return C code to set the value of an operand.

; NEWVAL is a <c-expr> object of the value to store.

; If INDEX is non-#f use it, otherwise use (op:index self).

; This special handling of #f for INDEX is *only* supported for operands

; in cxmake-get, gen-set-quiet, and gen-set-trace.

; Ditto for SELECTOR.

; ??? raw-reg: support wip

; Return C code to set the value of an operand and print TRACE_RESULT message.

; NEWVAL is a <c-expr> object of the value to store.

; If INDEX is non-#f use it, otherwise use (op:index self).

; This special handling of #f for INDEX is *only* supported for operands

; in cxmake-get, gen-set-quiet, and gen-set-trace.

; Ditto for SELECTOR.

; ??? raw-reg: support wip

; Define and undefine C macros to tuck away details of instruction format used

; in the parallel execution functions.  See gen-define-field-macro for a

; similar thing done for extraction/semantic functions.

"#define ""(f) ""par_exec->operands."".f\n""#undef ""\n"; Operand profiling and parallel execution support.

; Return boolean indicating if operand OP needs its index saved

; Return C code to record profile data for modeling use.

; This shouldn't be called in the case of a scalar, the code should be

; smart enough to know there is no need.

; Return C code to record the data needed for profiling operand SELF.

; This is done during extraction.

"""      "" = "";\n"; Return C code to track profiling of operand SELF.

"  ""@cpu@_model_mark_""set_""get_"" (current_cpu"""", "");\n"; CPU, mach, model support.

"@prefix@_insn_type""instructions in cpu family @cpu@""@PREFIX@_INSN_"; Return the enum of INSN in cpu family CPU.

; cpu family.  This collapses the insn enum space for each cpu to increase

"@PREFIX@_INSN_"; Return C code to declare the machine data.

"const MACH *sim_machs[] =\n{\n""#ifdef ""\n""  & ""_mach,\n""#endif\n""  0\n""};\n\n"; Return C declarations of cpu model support stuff.

; ??? This goes in arch.h but a better place is each cpu.h.

"model types""MODEL_""#define MAX_MODELS ((int) MODEL_MAX)\n\n""unit types""UNIT_"; "apply append" squeezes out nils.

; create <model_name>-<unit-name> for each unit

; FIXME: revisit MAX_UNITS

""; Lookup operand named OP-NAME in INSN.

; IN-OUT is 'in to request an input operand, 'out to request an output operand,

; and 'in-out to request either (though if an operand is used for input and

; output then the input version is returned).

; FIXME: Move elsewhere.

; UNIT-NUM is number of the unit in INSN.

; - NAME is a spec name, one of cycles, pred, in, out.

;   as they appear in the semantic code to operand names as they appear in

;   the function unit spec.

; - VALUE is the operand to NAME.  For in,out it is (NAME VALUE) where

;   - NAME is the name of an input/output arg of the unit.

;   - VALUE is the name of the operand as it appears in semantic code.

; ??? This is a big sucker, though half of it is just the definitions

; of utility fns.

; Return C code to initialize UNIT-REFERENCED-VAR to be a bit mask

; of operands of UNIT that were read/written by INSN.

; INSN-REFERENCED-VAR is a bitmask of operands read/written by INSN.

; UNIT-REFERENCED-VAR.

; ??? For now we assume all input operands are read.

"insn_referenced""referenced""    ""if ("" & (1 << "")) "" |= 1 << "";\n""    "" |= 1 << "";\n"""; Initialize unit argument ARG.

; OUT? is #f for input args, #t for output args.

; Ignore scalars.

; Ignore remapped arg, handled elsewhere.

; Ignore operands not in INSN.

; OUT? is #f for input args, #t for output args.

"""    "" "" = ""0"";\n"; Return C code to pass unit argument ARG to the handler.

; OUT? is #f for input args, #t for output args.

; ignore scalars

""", ""  {\n""    int referenced = 0;\n""    int UNUSED insn_referenced = abuf->written;\n"; Declare variables to hold unit arguments.

; Initialize 'em, being careful not to initialize an operand that

; Make a list of names of in/out overrides.

"""""""""    "" = "";\n""""    "" = "";\n""""insn function unit spec""invalid spec"; Create bitmask indicating which args were referenced.

; Emit the call to the handler.

"    "" += "" (current_cpu, idesc"", "", referenced"");\n""  }\n"; Return C code to profile an insn-specific unit's usage.

; UNIT-NUM is number of the unit in INSN.

; ARGBUF support is put in cpuall.h, which doesn't depend on sim-cpu.scm,

; Utility of -gen-argbuf-fields-union to generate the definition for

; <sformat-abuf> SBUF.

"Processing sbuf format "" ...\n""  struct { /* "" */\n""    int empty;\n""    "" "";\n""  } "";\n"; Utility of gen-argbuf-type to generate the union of extracted ifields.

"\

/* Instruction argument buffer.  */

union sem_fields {\n""\

  /* Writeback handler.  */

  struct {

    /* Pointer to argbuf entry for insn whose results need writing back.  */

    const struct argbuf *abuf;

  } write;

  /* x-before handler */

  struct {

    /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/

    int first_p;

  } before;

  /* x-after handler */

  struct {

    int empty;

  /* This entry is used to terminate each pbb.  */

    /* Number of insns in pbb.  */

    int insn_count;

    /* Next pbb to execute.  */

    SCACHE *next;

    SCACHE *branch_target;

  } chain;

#endif

};\n\n"; Generate the definition of the structure that records arguments.

; This is a union of structures with one structure for each insn format.

; administrivia.

; CPU-DATA? is #t if data for the currently selected cpu is to be included.

"Generating ARGBUF type ...\n""""""#ifndef WANT_CPU\n""\

/* The ARGBUF struct.  */

struct argbuf {

  /* These are the baseclass definitions.  */

  IADDR addr;

  const IDESC *idesc;

  char profile_p;

  /* ??? Temporary hack for skip insns.  */

  char skip_count;

  char unused;

  /* cpu specific data follows */\n""\

  union sem semantic;

  int written;

  union sem_fields fields;\n""\

  CGEN_INSN_INT insn;

; This is cpu family specific (member `argbuf' is) so it is machine generated.

"Generating SCACHE type ...\n""""#ifndef WANT_CPU\n""\

/* A cached insn.

   ??? SCACHE used to contain more than just argbuf.  We could delete the

   type entirely and always just use ARGBUF, but for future concerns and as

struct scache {

  struct argbuf argbuf;\n""\

  int first_insn_p;

; Generate a table of mode data.

; For now all we need is the names.

"const char *mode_names[] = {\n""  \"""\",\n"; We don't treat aliases as being different from the real

; mode here, so ignore them.

"};\n\n"; Insn profiling support.

; Generate declarations for local variables needed for modelling code.

;                  (has-attr? self 'COND-CTI))))

;     (string-append

;      (if cti? "  int UNUSED taken_p = 0;\n" "")

;      ))

""; Generate C code to profile INSN.

; .cpu file loading support

; Only run sim-analyze-insns! once.

; Called before/after the .cpu file has been read in.

;; Subroutine of -create-virtual-insns!.

;; Add virtual insn INSN to the database.

;; We put virtual insns ahead of normal insns because they're kind of special,

;; and it helps to see them first in lists.

;; ORDINAL is a used to place the insn ahead of normal insns;

;; it is a pair so we can do the update for the next virtual insn here.

; Create the virtual insns.

"virtual insns";; Record as a pair so -virtual-insn-add! can update it.

"pbb begin handler""--begin--""\

  {

#if WITH_SCACHE_PBB_@PREFIX@

    /* In the switch case FAST_P is a constant, allowing several optimizations

       in any called inline functions.  */

    vpc = @prefix@_pbb_begin (current_cpu, FAST_P);

#else

#if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */

    vpc = @prefix@_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));

#else

#endif

#endif

#endif

  }

""pbb chain handler""--chain--""\

  {

    vpc = @prefix@_pbb_chain (current_cpu, sem_arg);

#ifdef DEFINE_SWITCH

    BREAK (sem);

#endif

#endif

  }

""pbb cti-chain handler""--cti-chain--""\

  {

#if WITH_SCACHE_PBB_@PREFIX@

#ifdef DEFINE_SWITCH

    vpc = @prefix@_pbb_cti_chain (current_cpu, sem_arg,

                               pbb_br_type, pbb_br_npc);

    BREAK (sem);

#else

    /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */

    vpc = @prefix@_pbb_cti_chain (current_cpu, sem_arg,

                               CPU_PBB_BR_TYPE (current_cpu),

                               CPU_PBB_BR_NPC (current_cpu));

#endif

  }

""pbb begin handler""--before--""\

  {

#if WITH_SCACHE_PBB_@PREFIX@

    @prefix@_pbb_before (current_cpu, sem_arg);

#endif

  }

""pbb after handler""--after--""\

  {

#if WITH_SCACHE_PBB_@PREFIX@

    @prefix@_pbb_after (current_cpu, sem_arg);

#endif

  }

""invalid insn handler""--invalid--""\

  {

    /* Update the recorded pc in the cpu state struct.

       Only necessary for WITH_SCACHE case, but to avoid the

       conditional compilation ....  */

    SET_H_PC (pc);

    /* Virtual insns have zero size.  Overwrite vpc with address of next insn

       using the default-insn-bitsize spec.  When executing insns in parallel

       we may want to queue the fault and continue execution.  */

    vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);

"; Add begin,chain,before,after,invalid handlers if not provided.

; The code generators should first look for x-foo-@prefix@, then for x-foo.

; ??? This is good enough for the first pass.  Will eventually need to use

; less C and more RTL.

; Called after file is read in and global error checks are done

; to initialize tables.

; Scan insns, analyzing semantics and computing instruction formats.

; 'twould be nice to do this in sim-analyze! but it doesn't know whether this

; needs to be done or not (which is determined by what files are being

; generated).  Since this is an expensive operation, we defer doing this

; to the files that need it.

; This can only be done if one isa and one cpu family is being kept.

; don't include aliases

; do analyze the semantics

; Compute the set of sformat argument buffers.

; Do our own error checking.

; For debugging.

;cgen-mem-ops.h

;cgen-sem-ops.h

;cgen-ops.c

;cgen-extract.c

;cgen-mainloop.in