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1 6 jlechner
This is as.info, produced by makeinfo version 4.8 from as.texinfo.
2
 
3
START-INFO-DIR-ENTRY
4
* As: (as).                     The GNU assembler.
5
* Gas: (as).                    The GNU assembler.
6
END-INFO-DIR-ENTRY
7
 
8
   This file documents the GNU Assembler "as".
9
 
10
   Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
11
2006, 2007 Free Software Foundation, Inc.
12
 
13
   Permission is granted to copy, distribute and/or modify this document
14
under the terms of the GNU Free Documentation License, Version 1.1 or
15
any later version published by the Free Software Foundation; with no
16
Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
17
Texts.  A copy of the license is included in the section entitled "GNU
18
Free Documentation License".
19
 
20

21
File: as.info,  Node: Top,  Next: Overview,  Up: (dir)
22
 
23
Using as
24
********
25
 
26
This file is a user guide to the GNU assembler `as' (GNU Binutils)
27
version 2.18.90.
28
 
29
   This document is distributed under the terms of the GNU Free
30
Documentation License.  A copy of the license is included in the
31
section entitled "GNU Free Documentation License".
32
 
33
* Menu:
34
 
35
* Overview::                    Overview
36
* Invoking::                    Command-Line Options
37
* Syntax::                      Syntax
38
* Sections::                    Sections and Relocation
39
* Symbols::                     Symbols
40
* Expressions::                 Expressions
41
* Pseudo Ops::                  Assembler Directives
42
 
43
* Object Attributes::           Object Attributes
44
* Machine Dependencies::        Machine Dependent Features
45
* Reporting Bugs::              Reporting Bugs
46
* Acknowledgements::            Who Did What
47
* GNU Free Documentation License::  GNU Free Documentation License
48
* AS Index::                    AS Index
49
 
50

51
File: as.info,  Node: Overview,  Next: Invoking,  Prev: Top,  Up: Top
52
 
53
1 Overview
54
**********
55
 
56
Here is a brief summary of how to invoke `as'.  For details, see *Note
57
Command-Line Options: Invoking.
58
 
59
     as [-a[cdghlns][=FILE]] [-alternate] [-D]
60
      [-debug-prefix-map OLD=NEW]
61
      [-defsym SYM=VAL] [-f] [-g] [-gstabs]
62
      [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J]
63
      [-K] [-L] [-listing-lhs-width=NUM]
64
      [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM]
65
      [-listing-cont-lines=NUM] [-keep-locals] [-o
66
      OBJFILE] [-R] [-reduce-memory-overheads] [-statistics]
67
      [-v] [-version] [-version] [-W] [-warn]
68
      [-fatal-warnings] [-w] [-x] [-Z] [@FILE]
69
      [-target-help] [TARGET-OPTIONS]
70
      [-|FILES ...]
71
 
72
     _Target Alpha options:_
73
        [-mCPU]
74
        [-mdebug | -no-mdebug]
75
        [-relax] [-g] [-GSIZE]
76
        [-F] [-32addr]
77
 
78
     _Target ARC options:_
79
        [-marc[5|6|7|8]]
80
        [-EB|-EL]
81
 
82
     _Target ARM options:_
83
        [-mcpu=PROCESSOR[+EXTENSION...]]
84
        [-march=ARCHITECTURE[+EXTENSION...]]
85
        [-mfpu=FLOATING-POINT-FORMAT]
86
        [-mfloat-abi=ABI]
87
        [-meabi=VER]
88
        [-mthumb]
89
        [-EB|-EL]
90
        [-mapcs-32|-mapcs-26|-mapcs-float|
91
         -mapcs-reentrant]
92
        [-mthumb-interwork] [-k]
93
 
94
     _Target CRIS options:_
95
        [-underscore | -no-underscore]
96
        [-pic] [-N]
97
        [-emulation=criself | -emulation=crisaout]
98
        [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32]
99
 
100
     _Target D10V options:_
101
        [-O]
102
 
103
     _Target D30V options:_
104
        [-O|-n|-N]
105
 
106
     _Target H8/300 options:_
107
        [-h-tick-hex]
108
 
109
     _Target i386 options:_
110
        [-32|-64] [-n]
111
        [-march=CPU[+EXTENSION...]] [-mtune=CPU]
112
 
113
     _Target i960 options:_
114
        [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
115
         -AKC|-AMC]
116
        [-b] [-no-relax]
117
 
118
     _Target IA-64 options:_
119
        [-mconstant-gp|-mauto-pic]
120
        [-milp32|-milp64|-mlp64|-mp64]
121
        [-mle|mbe]
122
        [-mtune=itanium1|-mtune=itanium2]
123
        [-munwind-check=warning|-munwind-check=error]
124
        [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
125
        [-x|-xexplicit] [-xauto] [-xdebug]
126
 
127
     _Target IP2K options:_
128
        [-mip2022|-mip2022ext]
129
 
130
     _Target M32C options:_
131
        [-m32c|-m16c] [-relax] [-h-tick-hex]
132
 
133
     _Target M32R options:_
134
        [-m32rx|-[no-]warn-explicit-parallel-conflicts|
135
        -W[n]p]
136
 
137
     _Target M680X0 options:_
138
        [-l] [-m68000|-m68010|-m68020|...]
139
 
140
     _Target M68HC11 options:_
141
        [-m68hc11|-m68hc12|-m68hcs12]
142
        [-mshort|-mlong]
143
        [-mshort-double|-mlong-double]
144
        [-force-long-branches] [-short-branches]
145
        [-strict-direct-mode] [-print-insn-syntax]
146
        [-print-opcodes] [-generate-example]
147
 
148
     _Target MCORE options:_
149
        [-jsri2bsr] [-sifilter] [-relax]
150
        [-mcpu=[210|340]]
151
 
152
     _Target MIPS options:_
153
        [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]]
154
        [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
155
        [-non_shared] [-xgot [-mvxworks-pic]
156
        [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
157
        [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
158
        [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
159
        [-mips64] [-mips64r2]
160
        [-construct-floats] [-no-construct-floats]
161
        [-trap] [-no-break] [-break] [-no-trap]
162
        [-mfix7000] [-mno-fix7000]
163
        [-mips16] [-no-mips16]
164
        [-msmartmips] [-mno-smartmips]
165
        [-mips3d] [-no-mips3d]
166
        [-mdmx] [-no-mdmx]
167
        [-mdsp] [-mno-dsp]
168
        [-mdspr2] [-mno-dspr2]
169
        [-mmt] [-mno-mt]
170
        [-mdebug] [-no-mdebug]
171
        [-mpdr] [-mno-pdr]
172
 
173
     _Target MMIX options:_
174
        [-fixed-special-register-names] [-globalize-symbols]
175
        [-gnu-syntax] [-relax] [-no-predefined-symbols]
176
        [-no-expand] [-no-merge-gregs] [-x]
177
        [-linker-allocated-gregs]
178
 
179
     _Target PDP11 options:_
180
        [-mpic|-mno-pic] [-mall] [-mno-extensions]
181
        [-mEXTENSION|-mno-EXTENSION]
182
        [-mCPU] [-mMACHINE]
183
 
184
     _Target picoJava options:_
185
        [-mb|-me]
186
 
187
     _Target PowerPC options:_
188
        [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
189
         -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke|
190
         -mbooke32|-mbooke64]
191
        [-mcom|-many|-maltivec|-mvsx] [-memb]
192
        [-mregnames|-mno-regnames]
193
        [-mrelocatable|-mrelocatable-lib]
194
        [-mlittle|-mlittle-endian|-mbig|-mbig-endian]
195
        [-msolaris|-mno-solaris]
196
 
197
     _Target SPARC options:_
198
        [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
199
         -Av8plus|-Av8plusa|-Av9|-Av9a]
200
        [-xarch=v8plus|-xarch=v8plusa] [-bump]
201
        [-32|-64]
202
 
203
     _Target TIC54X options:_
204
      [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
205
      [-merrors-to-file |-me ]
206
 
207
 
208
     _Target Z80 options:_
209
       [-z80] [-r800]
210
       [ -ignore-undocumented-instructions] [-Wnud]
211
       [ -ignore-unportable-instructions] [-Wnup]
212
       [ -warn-undocumented-instructions] [-Wud]
213
       [ -warn-unportable-instructions] [-Wup]
214
       [ -forbid-undocumented-instructions] [-Fud]
215
       [ -forbid-unportable-instructions] [-Fup]
216
 
217
 
218
     _Target Xtensa options:_
219
      [-[no-]text-section-literals] [-[no-]absolute-literals]
220
      [-[no-]target-align] [-[no-]longcalls]
221
      [-[no-]transform]
222
      [-rename-section OLDNAME=NEWNAME]
223
 
224
`@FILE'
225
     Read command-line options from FILE.  The options read are
226
     inserted in place of the original @FILE option.  If FILE does not
227
     exist, or cannot be read, then the option will be treated
228
     literally, and not removed.
229
 
230
     Options in FILE are separated by whitespace.  A whitespace
231
     character may be included in an option by surrounding the entire
232
     option in either single or double quotes.  Any character
233
     (including a backslash) may be included by prefixing the character
234
     to be included with a backslash.  The FILE may itself contain
235
     additional @FILE options; any such options will be processed
236
     recursively.
237
 
238
`-a[cdghlmns]'
239
     Turn on listings, in any of a variety of ways:
240
 
241
    `-ac'
242
          omit false conditionals
243
 
244
    `-ad'
245
          omit debugging directives
246
 
247
    `-ag'
248
          include general information, like as version and options
249
          passed
250
 
251
    `-ah'
252
          include high-level source
253
 
254
    `-al'
255
          include assembly
256
 
257
    `-am'
258
          include macro expansions
259
 
260
    `-an'
261
          omit forms processing
262
 
263
    `-as'
264
          include symbols
265
 
266
    `=file'
267
          set the name of the listing file
268
 
269
     You may combine these options; for example, use `-aln' for assembly
270
     listing without forms processing.  The `=file' option, if used,
271
     must be the last one.  By itself, `-a' defaults to `-ahls'.
272
 
273
`--alternate'
274
     Begin in alternate macro mode.  *Note `.altmacro': Altmacro.
275
 
276
`-D'
277
     Ignored.  This option is accepted for script compatibility with
278
     calls to other assemblers.
279
 
280
`--debug-prefix-map OLD=NEW'
281
     When assembling files in directory `OLD', record debugging
282
     information describing them as in `NEW' instead.
283
 
284
`--defsym SYM=VALUE'
285
     Define the symbol SYM to be VALUE before assembling the input file.
286
     VALUE must be an integer constant.  As in C, a leading `0x'
287
     indicates a hexadecimal value, and a leading `0' indicates an octal
288
     value.  The value of the symbol can be overridden inside a source
289
     file via the use of a `.set' pseudo-op.
290
 
291
`-f'
292
     "fast"--skip whitespace and comment preprocessing (assume source is
293
     compiler output).
294
 
295
`-g'
296
`--gen-debug'
297
     Generate debugging information for each assembler source line
298
     using whichever debug format is preferred by the target.  This
299
     currently means either STABS, ECOFF or DWARF2.
300
 
301
`--gstabs'
302
     Generate stabs debugging information for each assembler line.  This
303
     may help debugging assembler code, if the debugger can handle it.
304
 
305
`--gstabs+'
306
     Generate stabs debugging information for each assembler line, with
307
     GNU extensions that probably only gdb can handle, and that could
308
     make other debuggers crash or refuse to read your program.  This
309
     may help debugging assembler code.  Currently the only GNU
310
     extension is the location of the current working directory at
311
     assembling time.
312
 
313
`--gdwarf-2'
314
     Generate DWARF2 debugging information for each assembler line.
315
     This may help debugging assembler code, if the debugger can handle
316
     it.  Note--this option is only supported by some targets, not all
317
     of them.
318
 
319
`--help'
320
     Print a summary of the command line options and exit.
321
 
322
`--target-help'
323
     Print a summary of all target specific options and exit.
324
 
325
`-I DIR'
326
     Add directory DIR to the search list for `.include' directives.
327
 
328
`-J'
329
     Don't warn about signed overflow.
330
 
331
`-K'
332
     Issue warnings when difference tables altered for long
333
     displacements.
334
 
335
`-L'
336
`--keep-locals'
337
     Keep (in the symbol table) local symbols.  These symbols start with
338
     system-specific local label prefixes, typically `.L' for ELF
339
     systems or `L' for traditional a.out systems.  *Note Symbol
340
     Names::.
341
 
342
`--listing-lhs-width=NUMBER'
343
     Set the maximum width, in words, of the output data column for an
344
     assembler listing to NUMBER.
345
 
346
`--listing-lhs-width2=NUMBER'
347
     Set the maximum width, in words, of the output data column for
348
     continuation lines in an assembler listing to NUMBER.
349
 
350
`--listing-rhs-width=NUMBER'
351
     Set the maximum width of an input source line, as displayed in a
352
     listing, to NUMBER bytes.
353
 
354
`--listing-cont-lines=NUMBER'
355
     Set the maximum number of lines printed in a listing for a single
356
     line of input to NUMBER + 1.
357
 
358
`-o OBJFILE'
359
     Name the object-file output from `as' OBJFILE.
360
 
361
`-R'
362
     Fold the data section into the text section.
363
 
364
     Set the default size of GAS's hash tables to a prime number close
365
     to NUMBER.  Increasing this value can reduce the length of time it
366
     takes the assembler to perform its tasks, at the expense of
367
     increasing the assembler's memory requirements.  Similarly
368
     reducing this value can reduce the memory requirements at the
369
     expense of speed.
370
 
371
`--reduce-memory-overheads'
372
     This option reduces GAS's memory requirements, at the expense of
373
     making the assembly processes slower.  Currently this switch is a
374
     synonym for `--hash-size=4051', but in the future it may have
375
     other effects as well.
376
 
377
`--statistics'
378
     Print the maximum space (in bytes) and total time (in seconds)
379
     used by assembly.
380
 
381
`--strip-local-absolute'
382
     Remove local absolute symbols from the outgoing symbol table.
383
 
384
`-v'
385
`-version'
386
     Print the `as' version.
387
 
388
`--version'
389
     Print the `as' version and exit.
390
 
391
`-W'
392
`--no-warn'
393
     Suppress warning messages.
394
 
395
`--fatal-warnings'
396
     Treat warnings as errors.
397
 
398
`--warn'
399
     Don't suppress warning messages or treat them as errors.
400
 
401
`-w'
402
     Ignored.
403
 
404
`-x'
405
     Ignored.
406
 
407
`-Z'
408
     Generate an object file even after errors.
409
 
410
`-- | FILES ...'
411
     Standard input, or source files to assemble.
412
 
413
 
414
   The following options are available when as is configured for an ARC
415
processor.
416
 
417
`-marc[5|6|7|8]'
418
     This option selects the core processor variant.
419
 
420
`-EB | -EL'
421
     Select either big-endian (-EB) or little-endian (-EL) output.
422
 
423
   The following options are available when as is configured for the ARM
424
processor family.
425
 
426
`-mcpu=PROCESSOR[+EXTENSION...]'
427
     Specify which ARM processor variant is the target.
428
 
429
`-march=ARCHITECTURE[+EXTENSION...]'
430
     Specify which ARM architecture variant is used by the target.
431
 
432
`-mfpu=FLOATING-POINT-FORMAT'
433
     Select which Floating Point architecture is the target.
434
 
435
`-mfloat-abi=ABI'
436
     Select which floating point ABI is in use.
437
 
438
`-mthumb'
439
     Enable Thumb only instruction decoding.
440
 
441
`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant'
442
     Select which procedure calling convention is in use.
443
 
444
`-EB | -EL'
445
     Select either big-endian (-EB) or little-endian (-EL) output.
446
 
447
`-mthumb-interwork'
448
     Specify that the code has been generated with interworking between
449
     Thumb and ARM code in mind.
450
 
451
`-k'
452
     Specify that PIC code has been generated.
453
 
454
   See the info pages for documentation of the CRIS-specific options.
455
 
456
   The following options are available when as is configured for a D10V
457
processor.
458
`-O'
459
     Optimize output by parallelizing instructions.
460
 
461
   The following options are available when as is configured for a D30V
462
processor.
463
`-O'
464
     Optimize output by parallelizing instructions.
465
 
466
`-n'
467
     Warn when nops are generated.
468
 
469
`-N'
470
     Warn when a nop after a 32-bit multiply instruction is generated.
471
 
472
   The following options are available when as is configured for the
473
Intel 80960 processor.
474
 
475
`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
476
     Specify which variant of the 960 architecture is the target.
477
 
478
`-b'
479
     Add code to collect statistics about branches taken.
480
 
481
`-no-relax'
482
     Do not alter compare-and-branch instructions for long
483
     displacements; error if necessary.
484
 
485
 
486
   The following options are available when as is configured for the
487
Ubicom IP2K series.
488
 
489
`-mip2022ext'
490
     Specifies that the extended IP2022 instructions are allowed.
491
 
492
`-mip2022'
493
     Restores the default behaviour, which restricts the permitted
494
     instructions to just the basic IP2022 ones.
495
 
496
 
497
   The following options are available when as is configured for the
498
Renesas M32C and M16C processors.
499
 
500
`-m32c'
501
     Assemble M32C instructions.
502
 
503
`-m16c'
504
     Assemble M16C instructions (the default).
505
 
506
`-relax'
507
     Enable support for link-time relaxations.
508
 
509
`-h-tick-hex'
510
     Support H'00 style hex constants in addition to 0x00 style.
511
 
512
 
513
   The following options are available when as is configured for the
514
Renesas M32R (formerly Mitsubishi M32R) series.
515
 
516
`--m32rx'
517
     Specify which processor in the M32R family is the target.  The
518
     default is normally the M32R, but this option changes it to the
519
     M32RX.
520
 
521
`--warn-explicit-parallel-conflicts or --Wp'
522
     Produce warning messages when questionable parallel constructs are
523
     encountered.
524
 
525
`--no-warn-explicit-parallel-conflicts or --Wnp'
526
     Do not produce warning messages when questionable parallel
527
     constructs are encountered.
528
 
529
 
530
   The following options are available when as is configured for the
531
Motorola 68000 series.
532
 
533
`-l'
534
     Shorten references to undefined symbols, to one word instead of
535
     two.
536
 
537
`-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
538
`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
539
`| -m68333 | -m68340 | -mcpu32 | -m5200'
540
     Specify what processor in the 68000 family is the target.  The
541
     default is normally the 68020, but this can be changed at
542
     configuration time.
543
 
544
`-m68881 | -m68882 | -mno-68881 | -mno-68882'
545
     The target machine does (or does not) have a floating-point
546
     coprocessor.  The default is to assume a coprocessor for 68020,
547
     68030, and cpu32.  Although the basic 68000 is not compatible with
548
     the 68881, a combination of the two can be specified, since it's
549
     possible to do emulation of the coprocessor instructions with the
550
     main processor.
551
 
552
`-m68851 | -mno-68851'
553
     The target machine does (or does not) have a memory-management
554
     unit coprocessor.  The default is to assume an MMU for 68020 and
555
     up.
556
 
557
 
558
   For details about the PDP-11 machine dependent features options, see
559
*Note PDP-11-Options::.
560
 
561
`-mpic | -mno-pic'
562
     Generate position-independent (or position-dependent) code.  The
563
     default is `-mpic'.
564
 
565
`-mall'
566
`-mall-extensions'
567
     Enable all instruction set extensions.  This is the default.
568
 
569
`-mno-extensions'
570
     Disable all instruction set extensions.
571
 
572
`-mEXTENSION | -mno-EXTENSION'
573
     Enable (or disable) a particular instruction set extension.
574
 
575
`-mCPU'
576
     Enable the instruction set extensions supported by a particular
577
     CPU, and disable all other extensions.
578
 
579
`-mMACHINE'
580
     Enable the instruction set extensions supported by a particular
581
     machine model, and disable all other extensions.
582
 
583
   The following options are available when as is configured for a
584
picoJava processor.
585
 
586
`-mb'
587
     Generate "big endian" format output.
588
 
589
`-ml'
590
     Generate "little endian" format output.
591
 
592
 
593
   The following options are available when as is configured for the
594
Motorola 68HC11 or 68HC12 series.
595
 
596
`-m68hc11 | -m68hc12 | -m68hcs12'
597
     Specify what processor is the target.  The default is defined by
598
     the configuration option when building the assembler.
599
 
600
`-mshort'
601
     Specify to use the 16-bit integer ABI.
602
 
603
`-mlong'
604
     Specify to use the 32-bit integer ABI.
605
 
606
`-mshort-double'
607
     Specify to use the 32-bit double ABI.
608
 
609
`-mlong-double'
610
     Specify to use the 64-bit double ABI.
611
 
612
`--force-long-branches'
613
     Relative branches are turned into absolute ones. This concerns
614
     conditional branches, unconditional branches and branches to a sub
615
     routine.
616
 
617
`-S | --short-branches'
618
     Do not turn relative branches into absolute ones when the offset
619
     is out of range.
620
 
621
`--strict-direct-mode'
622
     Do not turn the direct addressing mode into extended addressing
623
     mode when the instruction does not support direct addressing mode.
624
 
625
`--print-insn-syntax'
626
     Print the syntax of instruction in case of error.
627
 
628
`--print-opcodes'
629
     print the list of instructions with syntax and then exit.
630
 
631
`--generate-example'
632
     print an example of instruction for each possible instruction and
633
     then exit.  This option is only useful for testing `as'.
634
 
635
 
636
   The following options are available when `as' is configured for the
637
SPARC architecture:
638
 
639
`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
640
`-Av8plus | -Av8plusa | -Av9 | -Av9a'
641
     Explicitly select a variant of the SPARC architecture.
642
 
643
     `-Av8plus' and `-Av8plusa' select a 32 bit environment.  `-Av9'
644
     and `-Av9a' select a 64 bit environment.
645
 
646
     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
647
     UltraSPARC extensions.
648
 
649
`-xarch=v8plus | -xarch=v8plusa'
650
     For compatibility with the Solaris v9 assembler.  These options are
651
     equivalent to -Av8plus and -Av8plusa, respectively.
652
 
653
`-bump'
654
     Warn when the assembler switches to another architecture.
655
 
656
   The following options are available when as is configured for the
657
'c54x architecture.
658
 
659
`-mfar-mode'
660
     Enable extended addressing mode.  All addresses and relocations
661
     will assume extended addressing (usually 23 bits).
662
 
663
`-mcpu=CPU_VERSION'
664
     Sets the CPU version being compiled for.
665
 
666
`-merrors-to-file FILENAME'
667
     Redirect error output to a file, for broken systems which don't
668
     support such behaviour in the shell.
669
 
670
   The following options are available when as is configured for a MIPS
671
processor.
672
 
673
`-G NUM'
674
     This option sets the largest size of an object that can be
675
     referenced implicitly with the `gp' register.  It is only accepted
676
     for targets that use ECOFF format, such as a DECstation running
677
     Ultrix.  The default value is 8.
678
 
679
`-EB'
680
     Generate "big endian" format output.
681
 
682
`-EL'
683
     Generate "little endian" format output.
684
 
685
`-mips1'
686
`-mips2'
687
`-mips3'
688
`-mips4'
689
`-mips5'
690
`-mips32'
691
`-mips32r2'
692
`-mips64'
693
`-mips64r2'
694
     Generate code for a particular MIPS Instruction Set Architecture
695
     level.  `-mips1' is an alias for `-march=r3000', `-mips2' is an
696
     alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
697
     and `-mips4' is an alias for `-march=r8000'.  `-mips5', `-mips32',
698
     `-mips32r2', `-mips64', and `-mips64r2' correspond to generic
699
     `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64
700
     Release 2' ISA processors, respectively.
701
 
702
`-march=CPU'
703
     Generate code for a particular MIPS cpu.
704
 
705
`-mtune=CPU'
706
     Schedule and tune for a particular MIPS cpu.
707
 
708
`-mfix7000'
709
`-mno-fix7000'
710
     Cause nops to be inserted if the read of the destination register
711
     of an mfhi or mflo instruction occurs in the following two
712
     instructions.
713
 
714
`-mdebug'
715
`-no-mdebug'
716
     Cause stabs-style debugging output to go into an ECOFF-style
717
     .mdebug section instead of the standard ELF .stabs sections.
718
 
719
`-mpdr'
720
`-mno-pdr'
721
     Control generation of `.pdr' sections.
722
 
723
`-mgp32'
724
`-mfp32'
725
     The register sizes are normally inferred from the ISA and ABI, but
726
     these flags force a certain group of registers to be treated as 32
727
     bits wide at all times.  `-mgp32' controls the size of
728
     general-purpose registers and `-mfp32' controls the size of
729
     floating-point registers.
730
 
731
`-mips16'
732
`-no-mips16'
733
     Generate code for the MIPS 16 processor.  This is equivalent to
734
     putting `.set mips16' at the start of the assembly file.
735
     `-no-mips16' turns off this option.
736
 
737
`-msmartmips'
738
`-mno-smartmips'
739
     Enables the SmartMIPS extension to the MIPS32 instruction set.
740
     This is equivalent to putting `.set smartmips' at the start of the
741
     assembly file.  `-mno-smartmips' turns off this option.
742
 
743
`-mips3d'
744
`-no-mips3d'
745
     Generate code for the MIPS-3D Application Specific Extension.
746
     This tells the assembler to accept MIPS-3D instructions.
747
     `-no-mips3d' turns off this option.
748
 
749
`-mdmx'
750
`-no-mdmx'
751
     Generate code for the MDMX Application Specific Extension.  This
752
     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
753
     off this option.
754
 
755
`-mdsp'
756
`-mno-dsp'
757
     Generate code for the DSP Release 1 Application Specific Extension.
758
     This tells the assembler to accept DSP Release 1 instructions.
759
     `-mno-dsp' turns off this option.
760
 
761
`-mdspr2'
762
`-mno-dspr2'
763
     Generate code for the DSP Release 2 Application Specific Extension.
764
     This option implies -mdsp.  This tells the assembler to accept DSP
765
     Release 2 instructions.  `-mno-dspr2' turns off this option.
766
 
767
`-mmt'
768
`-mno-mt'
769
     Generate code for the MT Application Specific Extension.  This
770
     tells the assembler to accept MT instructions.  `-mno-mt' turns
771
     off this option.
772
 
773
`--construct-floats'
774
`--no-construct-floats'
775
     The `--no-construct-floats' option disables the construction of
776
     double width floating point constants by loading the two halves of
777
     the value into the two single width floating point registers that
778
     make up the double width register.  By default
779
     `--construct-floats' is selected, allowing construction of these
780
     floating point constants.
781
 
782
`--emulation=NAME'
783
     This option causes `as' to emulate `as' configured for some other
784
     target, in all respects, including output format (choosing between
785
     ELF and ECOFF only), handling of pseudo-opcodes which may generate
786
     debugging information or store symbol table information, and
787
     default endianness.  The available configuration names are:
788
     `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf',
789
     `mipsbelf'.  The first two do not alter the default endianness
790
     from that of the primary target for which the assembler was
791
     configured; the others change the default to little- or big-endian
792
     as indicated by the `b' or `l' in the name.  Using `-EB' or `-EL'
793
     will override the endianness selection in any case.
794
 
795
     This option is currently supported only when the primary target
796
     `as' is configured for is a MIPS ELF or ECOFF target.
797
     Furthermore, the primary target or others specified with
798
     `--enable-targets=...' at configuration time must include support
799
     for the other format, if both are to be available.  For example,
800
     the Irix 5 configuration includes support for both.
801
 
802
     Eventually, this option will support more configurations, with more
803
     fine-grained control over the assembler's behavior, and will be
804
     supported for more processors.
805
 
806
`-nocpp'
807
     `as' ignores this option.  It is accepted for compatibility with
808
     the native tools.
809
 
810
`--trap'
811
`--no-trap'
812
`--break'
813
`--no-break'
814
     Control how to deal with multiplication overflow and division by
815
     zero.  `--trap' or `--no-break' (which are synonyms) take a trap
816
     exception (and only work for Instruction Set Architecture level 2
817
     and higher); `--break' or `--no-trap' (also synonyms, and the
818
     default) take a break exception.
819
 
820
`-n'
821
     When this option is used, `as' will issue a warning every time it
822
     generates a nop instruction from a macro.
823
 
824
   The following options are available when as is configured for an
825
MCore processor.
826
 
827
`-jsri2bsr'
828
`-nojsri2bsr'
829
     Enable or disable the JSRI to BSR transformation.  By default this
830
     is enabled.  The command line option `-nojsri2bsr' can be used to
831
     disable it.
832
 
833
`-sifilter'
834
`-nosifilter'
835
     Enable or disable the silicon filter behaviour.  By default this
836
     is disabled.  The default can be overridden by the `-sifilter'
837
     command line option.
838
 
839
`-relax'
840
     Alter jump instructions for long displacements.
841
 
842
`-mcpu=[210|340]'
843
     Select the cpu type on the target hardware.  This controls which
844
     instructions can be assembled.
845
 
846
`-EB'
847
     Assemble for a big endian target.
848
 
849
`-EL'
850
     Assemble for a little endian target.
851
 
852
 
853
   See the info pages for documentation of the MMIX-specific options.
854
 
855
   The following options are available when as is configured for an
856
Xtensa processor.
857
 
858
`--text-section-literals | --no-text-section-literals'
859
     With `--text-section-literals', literal pools are interspersed in
860
     the text section.  The default is `--no-text-section-literals',
861
     which places literals in a separate section in the output file.
862
     These options only affect literals referenced via PC-relative
863
     `L32R' instructions; literals for absolute mode `L32R'
864
     instructions are handled separately.
865
 
866
`--absolute-literals | --no-absolute-literals'
867
     Indicate to the assembler whether `L32R' instructions use absolute
868
     or PC-relative addressing.  The default is to assume absolute
869
     addressing if the Xtensa processor includes the absolute `L32R'
870
     addressing option.  Otherwise, only the PC-relative `L32R' mode
871
     can be used.
872
 
873
`--target-align | --no-target-align'
874
     Enable or disable automatic alignment to reduce branch penalties
875
     at the expense of some code density.  The default is
876
     `--target-align'.
877
 
878
`--longcalls | --no-longcalls'
879
     Enable or disable transformation of call instructions to allow
880
     calls across a greater range of addresses.  The default is
881
     `--no-longcalls'.
882
 
883
`--transform | --no-transform'
884
     Enable or disable all assembler transformations of Xtensa
885
     instructions.  The default is `--transform'; `--no-transform'
886
     should be used only in the rare cases when the instructions must
887
     be exactly as specified in the assembly source.
888
 
889
`--rename-section OLDNAME=NEWNAME'
890
     When generating output sections, rename the OLDNAME section to
891
     NEWNAME.
892
 
893
   The following options are available when as is configured for a Z80
894
family processor.
895
`-z80'
896
     Assemble for Z80 processor.
897
 
898
`-r800'
899
     Assemble for R800 processor.
900
 
901
`-ignore-undocumented-instructions'
902
`-Wnud'
903
     Assemble undocumented Z80 instructions that also work on R800
904
     without warning.
905
 
906
`-ignore-unportable-instructions'
907
`-Wnup'
908
     Assemble all undocumented Z80 instructions without warning.
909
 
910
`-warn-undocumented-instructions'
911
`-Wud'
912
     Issue a warning for undocumented Z80 instructions that also work
913
     on R800.
914
 
915
`-warn-unportable-instructions'
916
`-Wup'
917
     Issue a warning for undocumented Z80 instructions that do not work
918
     on R800.
919
 
920
`-forbid-undocumented-instructions'
921
`-Fud'
922
     Treat all undocumented instructions as errors.
923
 
924
`-forbid-unportable-instructions'
925
`-Fup'
926
     Treat undocumented Z80 instructions that do not work on R800 as
927
     errors.
928
 
929
* Menu:
930
 
931
* Manual::                      Structure of this Manual
932
* GNU Assembler::               The GNU Assembler
933
* Object Formats::              Object File Formats
934
* Command Line::                Command Line
935
* Input Files::                 Input Files
936
* Object::                      Output (Object) File
937
* Errors::                      Error and Warning Messages
938
 
939

940
File: as.info,  Node: Manual,  Next: GNU Assembler,  Up: Overview
941
 
942
1.1 Structure of this Manual
943
============================
944
 
945
This manual is intended to describe what you need to know to use GNU
946
`as'.  We cover the syntax expected in source files, including notation
947
for symbols, constants, and expressions; the directives that `as'
948
understands; and of course how to invoke `as'.
949
 
950
   This manual also describes some of the machine-dependent features of
951
various flavors of the assembler.
952
 
953
   On the other hand, this manual is _not_ intended as an introduction
954
to programming in assembly language--let alone programming in general!
955
In a similar vein, we make no attempt to introduce the machine
956
architecture; we do _not_ describe the instruction set, standard
957
mnemonics, registers or addressing modes that are standard to a
958
particular architecture.  You may want to consult the manufacturer's
959
machine architecture manual for this information.
960
 
961

962
File: as.info,  Node: GNU Assembler,  Next: Object Formats,  Prev: Manual,  Up: Overview
963
 
964
1.2 The GNU Assembler
965
=====================
966
 
967
GNU `as' is really a family of assemblers.  If you use (or have used)
968
the GNU assembler on one architecture, you should find a fairly similar
969
environment when you use it on another architecture.  Each version has
970
much in common with the others, including object file formats, most
971
assembler directives (often called "pseudo-ops") and assembler syntax.
972
 
973
   `as' is primarily intended to assemble the output of the GNU C
974
compiler `gcc' for use by the linker `ld'.  Nevertheless, we've tried
975
to make `as' assemble correctly everything that other assemblers for
976
the same machine would assemble.  Any exceptions are documented
977
explicitly (*note Machine Dependencies::).  This doesn't mean `as'
978
always uses the same syntax as another assembler for the same
979
architecture; for example, we know of several incompatible versions of
980
680x0 assembly language syntax.
981
 
982
   Unlike older assemblers, `as' is designed to assemble a source
983
program in one pass of the source file.  This has a subtle impact on the
984
`.org' directive (*note `.org': Org.).
985
 
986

987
File: as.info,  Node: Object Formats,  Next: Command Line,  Prev: GNU Assembler,  Up: Overview
988
 
989
1.3 Object File Formats
990
=======================
991
 
992
The GNU assembler can be configured to produce several alternative
993
object file formats.  For the most part, this does not affect how you
994
write assembly language programs; but directives for debugging symbols
995
are typically different in different file formats.  *Note Symbol
996
Attributes: Symbol Attributes.
997
 
998

999
File: as.info,  Node: Command Line,  Next: Input Files,  Prev: Object Formats,  Up: Overview
1000
 
1001
1.4 Command Line
1002
================
1003
 
1004
After the program name `as', the command line may contain options and
1005
file names.  Options may appear in any order, and may be before, after,
1006
or between file names.  The order of file names is significant.
1007
 
1008
   `--' (two hyphens) by itself names the standard input file
1009
explicitly, as one of the files for `as' to assemble.
1010
 
1011
   Except for `--' any command line argument that begins with a hyphen
1012
(`-') is an option.  Each option changes the behavior of `as'.  No
1013
option changes the way another option works.  An option is a `-'
1014
followed by one or more letters; the case of the letter is important.
1015
All options are optional.
1016
 
1017
   Some options expect exactly one file name to follow them.  The file
1018
name may either immediately follow the option's letter (compatible with
1019
older assemblers) or it may be the next command argument (GNU
1020
standard).  These two command lines are equivalent:
1021
 
1022
     as -o my-object-file.o mumble.s
1023
     as -omy-object-file.o mumble.s
1024
 
1025

1026
File: as.info,  Node: Input Files,  Next: Object,  Prev: Command Line,  Up: Overview
1027
 
1028
1.5 Input Files
1029
===============
1030
 
1031
We use the phrase "source program", abbreviated "source", to describe
1032
the program input to one run of `as'.  The program may be in one or
1033
more files; how the source is partitioned into files doesn't change the
1034
meaning of the source.
1035
 
1036
   The source program is a concatenation of the text in all the files,
1037
in the order specified.
1038
 
1039
   Each time you run `as' it assembles exactly one source program.  The
1040
source program is made up of one or more files.  (The standard input is
1041
also a file.)
1042
 
1043
   You give `as' a command line that has zero or more input file names.
1044
The input files are read (from left file name to right).  A command
1045
line argument (in any position) that has no special meaning is taken to
1046
be an input file name.
1047
 
1048
   If you give `as' no file names it attempts to read one input file
1049
from the `as' standard input, which is normally your terminal.  You may
1050
have to type  to tell `as' there is no more program to assemble.
1051
 
1052
   Use `--' if you need to explicitly name the standard input file in
1053
your command line.
1054
 
1055
   If the source is empty, `as' produces a small, empty object file.
1056
 
1057
Filenames and Line-numbers
1058
--------------------------
1059
 
1060
There are two ways of locating a line in the input file (or files) and
1061
either may be used in reporting error messages.  One way refers to a
1062
line number in a physical file; the other refers to a line number in a
1063
"logical" file.  *Note Error and Warning Messages: Errors.
1064
 
1065
   "Physical files" are those files named in the command line given to
1066
`as'.
1067
 
1068
   "Logical files" are simply names declared explicitly by assembler
1069
directives; they bear no relation to physical files.  Logical file
1070
names help error messages reflect the original source file, when `as'
1071
source is itself synthesized from other files.  `as' understands the
1072
`#' directives emitted by the `gcc' preprocessor.  See also *Note
1073
`.file': File.
1074
 
1075

1076
File: as.info,  Node: Object,  Next: Errors,  Prev: Input Files,  Up: Overview
1077
 
1078
1.6 Output (Object) File
1079
========================
1080
 
1081
Every time you run `as' it produces an output file, which is your
1082
assembly language program translated into numbers.  This file is the
1083
object file.  Its default name is `a.out'.  You can give it another
1084
name by using the `-o' option.  Conventionally, object file names end
1085
with `.o'.  The default name is used for historical reasons: older
1086
assemblers were capable of assembling self-contained programs directly
1087
into a runnable program.  (For some formats, this isn't currently
1088
possible, but it can be done for the `a.out' format.)
1089
 
1090
   The object file is meant for input to the linker `ld'.  It contains
1091
assembled program code, information to help `ld' integrate the
1092
assembled program into a runnable file, and (optionally) symbolic
1093
information for the debugger.
1094
 
1095

1096
File: as.info,  Node: Errors,  Prev: Object,  Up: Overview
1097
 
1098
1.7 Error and Warning Messages
1099
==============================
1100
 
1101
`as' may write warnings and error messages to the standard error file
1102
(usually your terminal).  This should not happen when  a compiler runs
1103
`as' automatically.  Warnings report an assumption made so that `as'
1104
could keep assembling a flawed program; errors report a grave problem
1105
that stops the assembly.
1106
 
1107
   Warning messages have the format
1108
 
1109
     file_name:NNN:Warning Message Text
1110
 
1111
(where NNN is a line number).  If a logical file name has been given
1112
(*note `.file': File.) it is used for the filename, otherwise the name
1113
of the current input file is used.  If a logical line number was given
1114
(*note `.line': Line.)  then it is used to calculate the number printed,
1115
otherwise the actual line in the current source file is printed.  The
1116
message text is intended to be self explanatory (in the grand Unix
1117
tradition).
1118
 
1119
   Error messages have the format
1120
     file_name:NNN:FATAL:Error Message Text
1121
   The file name and line number are derived as for warning messages.
1122
The actual message text may be rather less explanatory because many of
1123
them aren't supposed to happen.
1124
 
1125

1126
File: as.info,  Node: Invoking,  Next: Syntax,  Prev: Overview,  Up: Top
1127
 
1128
2 Command-Line Options
1129
**********************
1130
 
1131
This chapter describes command-line options available in _all_ versions
1132
of the GNU assembler; see *Note Machine Dependencies::, for options
1133
specific to particular machine architectures.
1134
 
1135
   If you are invoking `as' via the GNU C compiler, you can use the
1136
`-Wa' option to pass arguments through to the assembler.  The assembler
1137
arguments must be separated from each other (and the `-Wa') by commas.
1138
For example:
1139
 
1140
     gcc -c -g -O -Wa,-alh,-L file.c
1141
 
1142
This passes two options to the assembler: `-alh' (emit a listing to
1143
standard output with high-level and assembly source) and `-L' (retain
1144
local symbols in the symbol table).
1145
 
1146
   Usually you do not need to use this `-Wa' mechanism, since many
1147
compiler command-line options are automatically passed to the assembler
1148
by the compiler.  (You can call the GNU compiler driver with the `-v'
1149
option to see precisely what options it passes to each compilation
1150
pass, including the assembler.)
1151
 
1152
* Menu:
1153
 
1154
* a::             -a[cdghlns] enable listings
1155
* alternate::     --alternate enable alternate macro syntax
1156
* D::             -D for compatibility
1157
* f::             -f to work faster
1158
* I::             -I for .include search path
1159
 
1160
* K::             -K for difference tables
1161
 
1162
* L::             -L to retain local symbols
1163
* listing::       --listing-XXX to configure listing output
1164
* M::             -M or --mri to assemble in MRI compatibility mode
1165
* MD::            --MD for dependency tracking
1166
* o::             -o to name the object file
1167
* R::             -R to join data and text sections
1168
* statistics::    --statistics to see statistics about assembly
1169
* traditional-format:: --traditional-format for compatible output
1170
* v::             -v to announce version
1171
* W::             -W, --no-warn, --warn, --fatal-warnings to control warnings
1172
* Z::             -Z to make object file even after errors
1173
 
1174

1175
File: as.info,  Node: a,  Next: alternate,  Up: Invoking
1176
 
1177
2.1 Enable Listings: `-a[cdghlns]'
1178
==================================
1179
 
1180
These options enable listing output from the assembler.  By itself,
1181
`-a' requests high-level, assembly, and symbols listing.  You can use
1182
other letters to select specific options for the list: `-ah' requests a
1183
high-level language listing, `-al' requests an output-program assembly
1184
listing, and `-as' requests a symbol table listing.  High-level
1185
listings require that a compiler debugging option like `-g' be used,
1186
and that assembly listings (`-al') be requested also.
1187
 
1188
   Use the `-ag' option to print a first section with general assembly
1189
information, like as version, switches passed, or time stamp.
1190
 
1191
   Use the `-ac' option to omit false conditionals from a listing.  Any
1192
lines which are not assembled because of a false `.if' (or `.ifdef', or
1193
any other conditional), or a true `.if' followed by an `.else', will be
1194
omitted from the listing.
1195
 
1196
   Use the `-ad' option to omit debugging directives from the listing.
1197
 
1198
   Once you have specified one of these options, you can further control
1199
listing output and its appearance using the directives `.list',
1200
`.nolist', `.psize', `.eject', `.title', and `.sbttl'.  The `-an'
1201
option turns off all forms processing.  If you do not request listing
1202
output with one of the `-a' options, the listing-control directives
1203
have no effect.
1204
 
1205
   The letters after `-a' may be combined into one option, _e.g._,
1206
`-aln'.
1207
 
1208
   Note if the assembler source is coming from the standard input (e.g.,
1209
because it is being created by `gcc' and the `-pipe' command line switch
1210
is being used) then the listing will not contain any comments or
1211
preprocessor directives.  This is because the listing code buffers
1212
input source lines from stdin only after they have been preprocessed by
1213
the assembler.  This reduces memory usage and makes the code more
1214
efficient.
1215
 
1216

1217
File: as.info,  Node: alternate,  Next: D,  Prev: a,  Up: Invoking
1218
 
1219
2.2 `--alternate'
1220
=================
1221
 
1222
Begin in alternate macro mode, see *Note `.altmacro': Altmacro.
1223
 
1224

1225
File: as.info,  Node: D,  Next: f,  Prev: alternate,  Up: Invoking
1226
 
1227
2.3 `-D'
1228
========
1229
 
1230
This option has no effect whatsoever, but it is accepted to make it more
1231
likely that scripts written for other assemblers also work with `as'.
1232
 
1233

1234
File: as.info,  Node: f,  Next: I,  Prev: D,  Up: Invoking
1235
 
1236
2.4 Work Faster: `-f'
1237
=====================
1238
 
1239
`-f' should only be used when assembling programs written by a
1240
(trusted) compiler.  `-f' stops the assembler from doing whitespace and
1241
comment preprocessing on the input file(s) before assembling them.
1242
*Note Preprocessing: Preprocessing.
1243
 
1244
     _Warning:_ if you use `-f' when the files actually need to be
1245
     preprocessed (if they contain comments, for example), `as' does
1246
     not work correctly.
1247
 
1248

1249
File: as.info,  Node: I,  Next: K,  Prev: f,  Up: Invoking
1250
 
1251
2.5 `.include' Search Path: `-I' PATH
1252
=====================================
1253
 
1254
Use this option to add a PATH to the list of directories `as' searches
1255
for files specified in `.include' directives (*note `.include':
1256
Include.).  You may use `-I' as many times as necessary to include a
1257
variety of paths.  The current working directory is always searched
1258
first; after that, `as' searches any `-I' directories in the same order
1259
as they were specified (left to right) on the command line.
1260
 
1261

1262
File: as.info,  Node: K,  Next: L,  Prev: I,  Up: Invoking
1263
 
1264
2.6 Difference Tables: `-K'
1265
===========================
1266
 
1267
`as' sometimes alters the code emitted for directives of the form
1268
`.word SYM1-SYM2'.  *Note `.word': Word.  You can use the `-K' option
1269
if you want a warning issued when this is done.
1270
 
1271

1272
File: as.info,  Node: L,  Next: listing,  Prev: K,  Up: Invoking
1273
 
1274
2.7 Include Local Symbols: `-L'
1275
===============================
1276
 
1277
Symbols beginning with system-specific local label prefixes, typically
1278
`.L' for ELF systems or `L' for traditional a.out systems, are called
1279
"local symbols".  *Note Symbol Names::.  Normally you do not see such
1280
symbols when debugging, because they are intended for the use of
1281
programs (like compilers) that compose assembler programs, not for your
1282
notice.  Normally both `as' and `ld' discard such symbols, so you do
1283
not normally debug with them.
1284
 
1285
   This option tells `as' to retain those local symbols in the object
1286
file.  Usually if you do this you also tell the linker `ld' to preserve
1287
those symbols.
1288
 
1289

1290
File: as.info,  Node: listing,  Next: M,  Prev: L,  Up: Invoking
1291
 
1292
2.8 Configuring listing output: `--listing'
1293
===========================================
1294
 
1295
The listing feature of the assembler can be enabled via the command
1296
line switch `-a' (*note a::).  This feature combines the input source
1297
file(s) with a hex dump of the corresponding locations in the output
1298
object file, and displays them as a listing file.  The format of this
1299
listing can be controlled by directives inside the assembler source
1300
(i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl'
1301
(*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::)
1302
and also by the following switches:
1303
 
1304
`--listing-lhs-width=`number''
1305
     Sets the maximum width, in words, of the first line of the hex
1306
     byte dump.  This dump appears on the left hand side of the listing
1307
     output.
1308
 
1309
`--listing-lhs-width2=`number''
1310
     Sets the maximum width, in words, of any further lines of the hex
1311
     byte dump for a given input source line.  If this value is not
1312
     specified, it defaults to being the same as the value specified
1313
     for `--listing-lhs-width'.  If neither switch is used the default
1314
     is to one.
1315
 
1316
`--listing-rhs-width=`number''
1317
     Sets the maximum width, in characters, of the source line that is
1318
     displayed alongside the hex dump.  The default value for this
1319
     parameter is 100.  The source line is displayed on the right hand
1320
     side of the listing output.
1321
 
1322
`--listing-cont-lines=`number''
1323
     Sets the maximum number of continuation lines of hex dump that
1324
     will be displayed for a given single line of source input.  The
1325
     default value is 4.
1326
 
1327

1328
File: as.info,  Node: M,  Next: MD,  Prev: listing,  Up: Invoking
1329
 
1330
2.9 Assemble in MRI Compatibility Mode: `-M'
1331
============================================
1332
 
1333
The `-M' or `--mri' option selects MRI compatibility mode.  This
1334
changes the syntax and pseudo-op handling of `as' to make it compatible
1335
with the `ASM68K' or the `ASM960' (depending upon the configured
1336
target) assembler from Microtec Research.  The exact nature of the MRI
1337
syntax will not be documented here; see the MRI manuals for more
1338
information.  Note in particular that the handling of macros and macro
1339
arguments is somewhat different.  The purpose of this option is to
1340
permit assembling existing MRI assembler code using `as'.
1341
 
1342
   The MRI compatibility is not complete.  Certain operations of the
1343
MRI assembler depend upon its object file format, and can not be
1344
supported using other object file formats.  Supporting these would
1345
require enhancing each object file format individually.  These are:
1346
 
1347
   * global symbols in common section
1348
 
1349
     The m68k MRI assembler supports common sections which are merged
1350
     by the linker.  Other object file formats do not support this.
1351
     `as' handles common sections by treating them as a single common
1352
     symbol.  It permits local symbols to be defined within a common
1353
     section, but it can not support global symbols, since it has no
1354
     way to describe them.
1355
 
1356
   * complex relocations
1357
 
1358
     The MRI assemblers support relocations against a negated section
1359
     address, and relocations which combine the start addresses of two
1360
     or more sections.  These are not support by other object file
1361
     formats.
1362
 
1363
   * `END' pseudo-op specifying start address
1364
 
1365
     The MRI `END' pseudo-op permits the specification of a start
1366
     address.  This is not supported by other object file formats.  The
1367
     start address may instead be specified using the `-e' option to
1368
     the linker, or in a linker script.
1369
 
1370
   * `IDNT', `.ident' and `NAME' pseudo-ops
1371
 
1372
     The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
1373
     name to the output file.  This is not supported by other object
1374
     file formats.
1375
 
1376
   * `ORG' pseudo-op
1377
 
1378
     The m68k MRI `ORG' pseudo-op begins an absolute section at a given
1379
     address.  This differs from the usual `as' `.org' pseudo-op, which
1380
     changes the location within the current section.  Absolute
1381
     sections are not supported by other object file formats.  The
1382
     address of a section may be assigned within a linker script.
1383
 
1384
   There are some other features of the MRI assembler which are not
1385
supported by `as', typically either because they are difficult or
1386
because they seem of little consequence.  Some of these may be
1387
supported in future releases.
1388
 
1389
   * EBCDIC strings
1390
 
1391
     EBCDIC strings are not supported.
1392
 
1393
   * packed binary coded decimal
1394
 
1395
     Packed binary coded decimal is not supported.  This means that the
1396
     `DC.P' and `DCB.P' pseudo-ops are not supported.
1397
 
1398
   * `FEQU' pseudo-op
1399
 
1400
     The m68k `FEQU' pseudo-op is not supported.
1401
 
1402
   * `NOOBJ' pseudo-op
1403
 
1404
     The m68k `NOOBJ' pseudo-op is not supported.
1405
 
1406
   * `OPT' branch control options
1407
 
1408
     The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
1409
     and `BRW'--are ignored.  `as' automatically relaxes all branches,
1410
     whether forward or backward, to an appropriate size, so these
1411
     options serve no purpose.
1412
 
1413
   * `OPT' list control options
1414
 
1415
     The following m68k `OPT' list control options are ignored: `C',
1416
     `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.
1417
 
1418
   * other `OPT' options
1419
 
1420
     The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
1421
     `OP', `P', `PCO', `PCR', `PCS', `R'.
1422
 
1423
   * `OPT' `D' option is default
1424
 
1425
     The m68k `OPT' `D' option is the default, unlike the MRI assembler.
1426
     `OPT NOD' may be used to turn it off.
1427
 
1428
   * `XREF' pseudo-op.
1429
 
1430
     The m68k `XREF' pseudo-op is ignored.
1431
 
1432
   * `.debug' pseudo-op
1433
 
1434
     The i960 `.debug' pseudo-op is not supported.
1435
 
1436
   * `.extended' pseudo-op
1437
 
1438
     The i960 `.extended' pseudo-op is not supported.
1439
 
1440
   * `.list' pseudo-op.
1441
 
1442
     The various options of the i960 `.list' pseudo-op are not
1443
     supported.
1444
 
1445
   * `.optimize' pseudo-op
1446
 
1447
     The i960 `.optimize' pseudo-op is not supported.
1448
 
1449
   * `.output' pseudo-op
1450
 
1451
     The i960 `.output' pseudo-op is not supported.
1452
 
1453
   * `.setreal' pseudo-op
1454
 
1455
     The i960 `.setreal' pseudo-op is not supported.
1456
 
1457
 
1458

1459
File: as.info,  Node: MD,  Next: o,  Prev: M,  Up: Invoking
1460
 
1461
2.10 Dependency Tracking: `--MD'
1462
================================
1463
 
1464
`as' can generate a dependency file for the file it creates.  This file
1465
consists of a single rule suitable for `make' describing the
1466
dependencies of the main source file.
1467
 
1468
   The rule is written to the file named in its argument.
1469
 
1470
   This feature is used in the automatic updating of makefiles.
1471
 
1472

1473
File: as.info,  Node: o,  Next: R,  Prev: MD,  Up: Invoking
1474
 
1475
2.11 Name the Object File: `-o'
1476
===============================
1477
 
1478
There is always one object file output when you run `as'.  By default
1479
it has the name `a.out' (or `b.out', for Intel 960 targets only).  You
1480
use this option (which takes exactly one filename) to give the object
1481
file a different name.
1482
 
1483
   Whatever the object file is called, `as' overwrites any existing
1484
file of the same name.
1485
 
1486

1487
File: as.info,  Node: R,  Next: statistics,  Prev: o,  Up: Invoking
1488
 
1489
2.12 Join Data and Text Sections: `-R'
1490
======================================
1491
 
1492
`-R' tells `as' to write the object file as if all data-section data
1493
lives in the text section.  This is only done at the very last moment:
1494
your binary data are the same, but data section parts are relocated
1495
differently.  The data section part of your object file is zero bytes
1496
long because all its bytes are appended to the text section.  (*Note
1497
Sections and Relocation: Sections.)
1498
 
1499
   When you specify `-R' it would be possible to generate shorter
1500
address displacements (because we do not have to cross between text and
1501
data section).  We refrain from doing this simply for compatibility with
1502
older versions of `as'.  In future, `-R' may work this way.
1503
 
1504
   When `as' is configured for COFF or ELF output, this option is only
1505
useful if you use sections named `.text' and `.data'.
1506
 
1507
   `-R' is not supported for any of the HPPA targets.  Using `-R'
1508
generates a warning from `as'.
1509
 
1510

1511
File: as.info,  Node: statistics,  Next: traditional-format,  Prev: R,  Up: Invoking
1512
 
1513
2.13 Display Assembly Statistics: `--statistics'
1514
================================================
1515
 
1516
Use `--statistics' to display two statistics about the resources used by
1517
`as': the maximum amount of space allocated during the assembly (in
1518
bytes), and the total execution time taken for the assembly (in CPU
1519
seconds).
1520
 
1521

1522
File: as.info,  Node: traditional-format,  Next: v,  Prev: statistics,  Up: Invoking
1523
 
1524
2.14 Compatible Output: `--traditional-format'
1525
==============================================
1526
 
1527
For some targets, the output of `as' is different in some ways from the
1528
output of some existing assembler.  This switch requests `as' to use
1529
the traditional format instead.
1530
 
1531
   For example, it disables the exception frame optimizations which
1532
`as' normally does by default on `gcc' output.
1533
 
1534

1535
File: as.info,  Node: v,  Next: W,  Prev: traditional-format,  Up: Invoking
1536
 
1537
2.15 Announce Version: `-v'
1538
===========================
1539
 
1540
You can find out what version of as is running by including the option
1541
`-v' (which you can also spell as `-version') on the command line.
1542
 
1543

1544
File: as.info,  Node: W,  Next: Z,  Prev: v,  Up: Invoking
1545
 
1546
2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
1547
======================================================================
1548
 
1549
`as' should never give a warning or error message when assembling
1550
compiler output.  But programs written by people often cause `as' to
1551
give a warning that a particular assumption was made.  All such
1552
warnings are directed to the standard error file.
1553
 
1554
   If you use the `-W' and `--no-warn' options, no warnings are issued.
1555
This only affects the warning messages: it does not change any
1556
particular of how `as' assembles your file.  Errors, which stop the
1557
assembly, are still reported.
1558
 
1559
   If you use the `--fatal-warnings' option, `as' considers files that
1560
generate warnings to be in error.
1561
 
1562
   You can switch these options off again by specifying `--warn', which
1563
causes warnings to be output as usual.
1564
 
1565

1566
File: as.info,  Node: Z,  Prev: W,  Up: Invoking
1567
 
1568
2.17 Generate Object File in Spite of Errors: `-Z'
1569
==================================================
1570
 
1571
After an error message, `as' normally produces no output.  If for some
1572
reason you are interested in object file output even after `as' gives
1573
an error message on your program, use the `-Z' option.  If there are
1574
any errors, `as' continues anyways, and writes an object file after a
1575
final warning message of the form `N errors, M warnings, generating bad
1576
object file.'
1577
 
1578

1579
File: as.info,  Node: Syntax,  Next: Sections,  Prev: Invoking,  Up: Top
1580
 
1581
3 Syntax
1582
********
1583
 
1584
This chapter describes the machine-independent syntax allowed in a
1585
source file.  `as' syntax is similar to what many other assemblers use;
1586
it is inspired by the BSD 4.2 assembler, except that `as' does not
1587
assemble Vax bit-fields.
1588
 
1589
* Menu:
1590
 
1591
* Preprocessing::              Preprocessing
1592
* Whitespace::                  Whitespace
1593
* Comments::                    Comments
1594
* Symbol Intro::                Symbols
1595
* Statements::                  Statements
1596
* Constants::                   Constants
1597
 
1598

1599
File: as.info,  Node: Preprocessing,  Next: Whitespace,  Up: Syntax
1600
 
1601
3.1 Preprocessing
1602
=================
1603
 
1604
The `as' internal preprocessor:
1605
   * adjusts and removes extra whitespace.  It leaves one space or tab
1606
     before the keywords on a line, and turns any other whitespace on
1607
     the line into a single space.
1608
 
1609
   * removes all comments, replacing them with a single space, or an
1610
     appropriate number of newlines.
1611
 
1612
   * converts character constants into the appropriate numeric values.
1613
 
1614
   It does not do macro processing, include file handling, or anything
1615
else you may get from your C compiler's preprocessor.  You can do
1616
include file processing with the `.include' directive (*note
1617
`.include': Include.).  You can use the GNU C compiler driver to get
1618
other "CPP" style preprocessing by giving the input file a `.S' suffix.
1619
*Note Options Controlling the Kind of Output: (gcc.info)Overall
1620
Options.
1621
 
1622
   Excess whitespace, comments, and character constants cannot be used
1623
in the portions of the input text that are not preprocessed.
1624
 
1625
   If the first line of an input file is `#NO_APP' or if you use the
1626
`-f' option, whitespace and comments are not removed from the input
1627
file.  Within an input file, you can ask for whitespace and comment
1628
removal in specific portions of the by putting a line that says `#APP'
1629
before the text that may contain whitespace or comments, and putting a
1630
line that says `#NO_APP' after this text.  This feature is mainly
1631
intend to support `asm' statements in compilers whose output is
1632
otherwise free of comments and whitespace.
1633
 
1634

1635
File: as.info,  Node: Whitespace,  Next: Comments,  Prev: Preprocessing,  Up: Syntax
1636
 
1637
3.2 Whitespace
1638
==============
1639
 
1640
"Whitespace" is one or more blanks or tabs, in any order.  Whitespace
1641
is used to separate symbols, and to make programs neater for people to
1642
read.  Unless within character constants (*note Character Constants:
1643
Characters.), any whitespace means the same as exactly one space.
1644
 
1645

1646
File: as.info,  Node: Comments,  Next: Symbol Intro,  Prev: Whitespace,  Up: Syntax
1647
 
1648
3.3 Comments
1649
============
1650
 
1651
There are two ways of rendering comments to `as'.  In both cases the
1652
comment is equivalent to one space.
1653
 
1654
   Anything from `/*' through the next `*/' is a comment.  This means
1655
you may not nest these comments.
1656
 
1657
     /*
1658
       The only way to include a newline ('\n') in a comment
1659
       is to use this sort of comment.
1660
     */
1661
 
1662
     /* This sort of comment does not nest. */
1663
 
1664
   Anything from the "line comment" character to the next newline is
1665
considered a comment and is ignored.  The line comment character is `;'
1666
on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA;
1667
`#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;'
1668
for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH;
1669
`!' on the SPARC; `#' on the ip2k; `#' on the m32c; `#' on the m32r;
1670
`|' on the 680x0; `#' on the 68HC11 and 68HC12; `#' on the Vax; `;' for
1671
the Z80; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems;
1672
see *Note Machine Dependencies::.
1673
 
1674
   On some machines there are two different line comment characters.
1675
One character only begins a comment if it is the first non-whitespace
1676
character on a line, while the other always begins a comment.
1677
 
1678
   The V850 assembler also supports a double dash as starting a comment
1679
that extends to the end of the line.
1680
 
1681
   `--';
1682
 
1683
   To be compatible with past assemblers, lines that begin with `#'
1684
have a special interpretation.  Following the `#' should be an absolute
1685
expression (*note Expressions::): the logical line number of the _next_
1686
line.  Then a string (*note Strings: Strings.) is allowed: if present
1687
it is a new logical file name.  The rest of the line, if any, should be
1688
whitespace.
1689
 
1690
   If the first non-whitespace characters on the line are not numeric,
1691
the line is ignored.  (Just like a comment.)
1692
 
1693
                               # This is an ordinary comment.
1694
     # 42-6 "new_file_name"    # New logical file name
1695
                               # This is logical line # 36.
1696
   This feature is deprecated, and may disappear from future versions
1697
of `as'.
1698
 
1699

1700
File: as.info,  Node: Symbol Intro,  Next: Statements,  Prev: Comments,  Up: Syntax
1701
 
1702
3.4 Symbols
1703
===========
1704
 
1705
A "symbol" is one or more characters chosen from the set of all letters
1706
(both upper and lower case), digits and the three characters `_.$'.  On
1707
most machines, you can also use `$' in symbol names; exceptions are
1708
noted in *Note Machine Dependencies::.  No symbol may begin with a
1709
digit.  Case is significant.  There is no length limit: all characters
1710
are significant.  Symbols are delimited by characters not in that set,
1711
or by the beginning of a file (since the source program must end with a
1712
newline, the end of a file is not a possible symbol delimiter).  *Note
1713
Symbols::.
1714
 
1715

1716
File: as.info,  Node: Statements,  Next: Constants,  Prev: Symbol Intro,  Up: Syntax
1717
 
1718
3.5 Statements
1719
==============
1720
 
1721
A "statement" ends at a newline character (`\n') or line separator
1722
character.  (The line separator is usually `;', unless this conflicts
1723
with the comment character; see *Note Machine Dependencies::.)  The
1724
newline or separator character is considered part of the preceding
1725
statement.  Newlines and separators within character constants are an
1726
exception: they do not end statements.
1727
 
1728
It is an error to end any statement with end-of-file:  the last
1729
character of any input file should be a newline.
1730
 
1731
   An empty statement is allowed, and may include whitespace.  It is
1732
ignored.
1733
 
1734
   A statement begins with zero or more labels, optionally followed by a
1735
key symbol which determines what kind of statement it is.  The key
1736
symbol determines the syntax of the rest of the statement.  If the
1737
symbol begins with a dot `.' then the statement is an assembler
1738
directive: typically valid for any computer.  If the symbol begins with
1739
a letter the statement is an assembly language "instruction": it
1740
assembles into a machine language instruction.  Different versions of
1741
`as' for different computers recognize different instructions.  In
1742
fact, the same symbol may represent a different instruction in a
1743
different computer's assembly language.
1744
 
1745
   A label is a symbol immediately followed by a colon (`:').
1746
Whitespace before a label or after a colon is permitted, but you may not
1747
have whitespace between a label's symbol and its colon. *Note Labels::.
1748
 
1749
   For HPPA targets, labels need not be immediately followed by a
1750
colon, but the definition of a label must begin in column zero.  This
1751
also implies that only one label may be defined on each line.
1752
 
1753
     label:     .directive    followed by something
1754
     another_label:           # This is an empty statement.
1755
                instruction   operand_1, operand_2, ...
1756
 
1757

1758
File: as.info,  Node: Constants,  Prev: Statements,  Up: Syntax
1759
 
1760
3.6 Constants
1761
=============
1762
 
1763
A constant is a number, written so that its value is known by
1764
inspection, without knowing any context.  Like this:
1765
     .byte  74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
1766
     .ascii "Ring the bell\7"                  # A string constant.
1767
     .octa  0x123456789abcdef0123456789ABCDEF0 # A bignum.
1768
     .float 0f-314159265358979323846264338327\
1769
     95028841971.693993751E-40                 # - pi, a flonum.
1770
 
1771
* Menu:
1772
 
1773
* Characters::                  Character Constants
1774
* Numbers::                     Number Constants
1775
 
1776

1777
File: as.info,  Node: Characters,  Next: Numbers,  Up: Constants
1778
 
1779
3.6.1 Character Constants
1780
-------------------------
1781
 
1782
There are two kinds of character constants.  A "character" stands for
1783
one character in one byte and its value may be used in numeric
1784
expressions.  String constants (properly called string _literals_) are
1785
potentially many bytes and their values may not be used in arithmetic
1786
expressions.
1787
 
1788
* Menu:
1789
 
1790
* Strings::                     Strings
1791
* Chars::                       Characters
1792
 
1793

1794
File: as.info,  Node: Strings,  Next: Chars,  Up: Characters
1795
 
1796
3.6.1.1 Strings
1797
...............
1798
 
1799
A "string" is written between double-quotes.  It may contain
1800
double-quotes or null characters.  The way to get special characters
1801
into a string is to "escape" these characters: precede them with a
1802
backslash `\' character.  For example `\\' represents one backslash:
1803
the first `\' is an escape which tells `as' to interpret the second
1804
character literally as a backslash (which prevents `as' from
1805
recognizing the second `\' as an escape character).  The complete list
1806
of escapes follows.
1807
 
1808
`\b'
1809
     Mnemonic for backspace; for ASCII this is octal code 010.
1810
 
1811
`\f'
1812
     Mnemonic for FormFeed; for ASCII this is octal code 014.
1813
 
1814
`\n'
1815
     Mnemonic for newline; for ASCII this is octal code 012.
1816
 
1817
`\r'
1818
     Mnemonic for carriage-Return; for ASCII this is octal code 015.
1819
 
1820
`\t'
1821
     Mnemonic for horizontal Tab; for ASCII this is octal code 011.
1822
 
1823
`\ DIGIT DIGIT DIGIT'
1824
     An octal character code.  The numeric code is 3 octal digits.  For
1825
     compatibility with other Unix systems, 8 and 9 are accepted as
1826
     digits: for example, `\008' has the value 010, and `\009' the
1827
     value 011.
1828
 
1829
`\`x' HEX-DIGITS...'
1830
     A hex character code.  All trailing hex digits are combined.
1831
     Either upper or lower case `x' works.
1832
 
1833
`\\'
1834
     Represents one `\' character.
1835
 
1836
`\"'
1837
     Represents one `"' character.  Needed in strings to represent this
1838
     character, because an unescaped `"' would end the string.
1839
 
1840
`\ ANYTHING-ELSE'
1841
     Any other character when escaped by `\' gives a warning, but
1842
     assembles as if the `\' was not present.  The idea is that if you
1843
     used an escape sequence you clearly didn't want the literal
1844
     interpretation of the following character.  However `as' has no
1845
     other interpretation, so `as' knows it is giving you the wrong
1846
     code and warns you of the fact.
1847
 
1848
   Which characters are escapable, and what those escapes represent,
1849
varies widely among assemblers.  The current set is what we think the
1850
BSD 4.2 assembler recognizes, and is a subset of what most C compilers
1851
recognize.  If you are in doubt, do not use an escape sequence.
1852
 
1853

1854
File: as.info,  Node: Chars,  Prev: Strings,  Up: Characters
1855
 
1856
3.6.1.2 Characters
1857
..................
1858
 
1859
A single character may be written as a single quote immediately
1860
followed by that character.  The same escapes apply to characters as to
1861
strings.  So if you want to write the character backslash, you must
1862
write `'\\' where the first `\' escapes the second `\'.  As you can
1863
see, the quote is an acute accent, not a grave accent.  A newline
1864
immediately following an acute accent is taken as a literal character
1865
and does not count as the end of a statement.  The value of a character
1866
constant in a numeric expression is the machine's byte-wide code for
1867
that character.  `as' assumes your character code is ASCII: `'A' means
1868
65, `'B' means 66, and so on.
1869
 
1870

1871
File: as.info,  Node: Numbers,  Prev: Characters,  Up: Constants
1872
 
1873
3.6.2 Number Constants
1874
----------------------
1875
 
1876
`as' distinguishes three kinds of numbers according to how they are
1877
stored in the target machine.  _Integers_ are numbers that would fit
1878
into an `int' in the C language.  _Bignums_ are integers, but they are
1879
stored in more than 32 bits.  _Flonums_ are floating point numbers,
1880
described below.
1881
 
1882
* Menu:
1883
 
1884
* Integers::                    Integers
1885
* Bignums::                     Bignums
1886
* Flonums::                     Flonums
1887
 
1888

1889
File: as.info,  Node: Integers,  Next: Bignums,  Up: Numbers
1890
 
1891
3.6.2.1 Integers
1892
................
1893
 
1894
A binary integer is `0b' or `0B' followed by zero or more of the binary
1895
digits `01'.
1896
 
1897
   An octal integer is `0' followed by zero or more of the octal digits
1898
(`01234567').
1899
 
1900
   A decimal integer starts with a non-zero digit followed by zero or
1901
more digits (`0123456789').
1902
 
1903
   A hexadecimal integer is `0x' or `0X' followed by one or more
1904
hexadecimal digits chosen from `0123456789abcdefABCDEF'.
1905
 
1906
   Integers have the usual values.  To denote a negative integer, use
1907
the prefix operator `-' discussed under expressions (*note Prefix
1908
Operators: Prefix Ops.).
1909
 
1910

1911
File: as.info,  Node: Bignums,  Next: Flonums,  Prev: Integers,  Up: Numbers
1912
 
1913
3.6.2.2 Bignums
1914
...............
1915
 
1916
A "bignum" has the same syntax and semantics as an integer except that
1917
the number (or its negative) takes more than 32 bits to represent in
1918
binary.  The distinction is made because in some places integers are
1919
permitted while bignums are not.
1920
 
1921

1922
File: as.info,  Node: Flonums,  Prev: Bignums,  Up: Numbers
1923
 
1924
3.6.2.3 Flonums
1925
...............
1926
 
1927
A "flonum" represents a floating point number.  The translation is
1928
indirect: a decimal floating point number from the text is converted by
1929
`as' to a generic binary floating point number of more than sufficient
1930
precision.  This generic floating point number is converted to a
1931
particular computer's floating point format (or formats) by a portion
1932
of `as' specialized to that computer.
1933
 
1934
   A flonum is written by writing (in order)
1935
   * The digit `0'.  (`0' is optional on the HPPA.)
1936
 
1937
   * A letter, to tell `as' the rest of the number is a flonum.  `e' is
1938
     recommended.  Case is not important.
1939
 
1940
     On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the
1941
     letter must be one of the letters `DFPRSX' (in upper or lower
1942
     case).
1943
 
1944
     On the ARC, the letter must be one of the letters `DFRS' (in upper
1945
     or lower case).
1946
 
1947
     On the Intel 960 architecture, the letter must be one of the
1948
     letters `DFT' (in upper or lower case).
1949
 
1950
     On the HPPA architecture, the letter must be `E' (upper case only).
1951
 
1952
   * An optional sign: either `+' or `-'.
1953
 
1954
   * An optional "integer part": zero or more decimal digits.
1955
 
1956
   * An optional "fractional part": `.' followed by zero or more
1957
     decimal digits.
1958
 
1959
   * An optional exponent, consisting of:
1960
 
1961
        * An `E' or `e'.
1962
 
1963
        * Optional sign: either `+' or `-'.
1964
 
1965
        * One or more decimal digits.
1966
 
1967
 
1968
   At least one of the integer part or the fractional part must be
1969
present.  The floating point number has the usual base-10 value.
1970
 
1971
   `as' does all processing using integers.  Flonums are computed
1972
independently of any floating point hardware in the computer running
1973
`as'.
1974
 
1975

1976
File: as.info,  Node: Sections,  Next: Symbols,  Prev: Syntax,  Up: Top
1977
 
1978
4 Sections and Relocation
1979
*************************
1980
 
1981
* Menu:
1982
 
1983
* Secs Background::             Background
1984
* Ld Sections::                 Linker Sections
1985
* As Sections::                 Assembler Internal Sections
1986
* Sub-Sections::                Sub-Sections
1987
* bss::                         bss Section
1988
 
1989

1990
File: as.info,  Node: Secs Background,  Next: Ld Sections,  Up: Sections
1991
 
1992
4.1 Background
1993
==============
1994
 
1995
Roughly, a section is a range of addresses, with no gaps; all data "in"
1996
those addresses is treated the same for some particular purpose.  For
1997
example there may be a "read only" section.
1998
 
1999
   The linker `ld' reads many object files (partial programs) and
2000
combines their contents to form a runnable program.  When `as' emits an
2001
object file, the partial program is assumed to start at address 0.
2002
`ld' assigns the final addresses for the partial program, so that
2003
different partial programs do not overlap.  This is actually an
2004
oversimplification, but it suffices to explain how `as' uses sections.
2005
 
2006
   `ld' moves blocks of bytes of your program to their run-time
2007
addresses.  These blocks slide to their run-time addresses as rigid
2008
units; their length does not change and neither does the order of bytes
2009
within them.  Such a rigid unit is called a _section_.  Assigning
2010
run-time addresses to sections is called "relocation".  It includes the
2011
task of adjusting mentions of object-file addresses so they refer to
2012
the proper run-time addresses.  For the H8/300, and for the Renesas /
2013
SuperH SH, `as' pads sections if needed to ensure they end on a word
2014
(sixteen bit) boundary.
2015
 
2016
   An object file written by `as' has at least three sections, any of
2017
which may be empty.  These are named "text", "data" and "bss" sections.
2018
 
2019
   When it generates COFF or ELF output, `as' can also generate
2020
whatever other named sections you specify using the `.section'
2021
directive (*note `.section': Section.).  If you do not use any
2022
directives that place output in the `.text' or `.data' sections, these
2023
sections still exist, but are empty.
2024
 
2025
   When `as' generates SOM or ELF output for the HPPA, `as' can also
2026
generate whatever other named sections you specify using the `.space'
2027
and `.subspace' directives.  See `HP9000 Series 800 Assembly Language
2028
Reference Manual' (HP 92432-90001) for details on the `.space' and
2029
`.subspace' assembler directives.
2030
 
2031
   Additionally, `as' uses different names for the standard text, data,
2032
and bss sections when generating SOM output.  Program text is placed
2033
into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
2034
 
2035
   Within the object file, the text section starts at address `0', the
2036
data section follows, and the bss section follows the data section.
2037
 
2038
   When generating either SOM or ELF output files on the HPPA, the text
2039
section starts at address `0', the data section at address `0x4000000',
2040
and the bss section follows the data section.
2041
 
2042
   To let `ld' know which data changes when the sections are relocated,
2043
and how to change that data, `as' also writes to the object file
2044
details of the relocation needed.  To perform relocation `ld' must
2045
know, each time an address in the object file is mentioned:
2046
   * Where in the object file is the beginning of this reference to an
2047
     address?
2048
 
2049
   * How long (in bytes) is this reference?
2050
 
2051
   * Which section does the address refer to?  What is the numeric
2052
     value of
2053
          (ADDRESS) - (START-ADDRESS OF SECTION)?
2054
 
2055
   * Is the reference to an address "Program-Counter relative"?
2056
 
2057
   In fact, every address `as' ever uses is expressed as
2058
     (SECTION) + (OFFSET INTO SECTION)
2059
   Further, most expressions `as' computes have this section-relative
2060
nature.  (For some object formats, such as SOM for the HPPA, some
2061
expressions are symbol-relative instead.)
2062
 
2063
   In this manual we use the notation {SECNAME N} to mean "offset N
2064
into section SECNAME."
2065
 
2066
   Apart from text, data and bss sections you need to know about the
2067
"absolute" section.  When `ld' mixes partial programs, addresses in the
2068
absolute section remain unchanged.  For example, address `{absolute 0}'
2069
is "relocated" to run-time address 0 by `ld'.  Although the linker
2070
never arranges two partial programs' data sections with overlapping
2071
addresses after linking, _by definition_ their absolute sections must
2072
overlap.  Address `{absolute 239}' in one part of a program is always
2073
the same address when the program is running as address `{absolute
2074
239}' in any other part of the program.
2075
 
2076
   The idea of sections is extended to the "undefined" section.  Any
2077
address whose section is unknown at assembly time is by definition
2078
rendered {undefined U}--where U is filled in later.  Since numbers are
2079
always defined, the only way to generate an undefined address is to
2080
mention an undefined symbol.  A reference to a named common block would
2081
be such a symbol: its value is unknown at assembly time so it has
2082
section _undefined_.
2083
 
2084
   By analogy the word _section_ is used to describe groups of sections
2085
in the linked program.  `ld' puts all partial programs' text sections
2086
in contiguous addresses in the linked program.  It is customary to
2087
refer to the _text section_ of a program, meaning all the addresses of
2088
all partial programs' text sections.  Likewise for data and bss
2089
sections.
2090
 
2091
   Some sections are manipulated by `ld'; others are invented for use
2092
of `as' and have no meaning except during assembly.
2093
 
2094

2095
File: as.info,  Node: Ld Sections,  Next: As Sections,  Prev: Secs Background,  Up: Sections
2096
 
2097
4.2 Linker Sections
2098
===================
2099
 
2100
`ld' deals with just four kinds of sections, summarized below.
2101
 
2102
*named sections*
2103
*text section*
2104
*data section*
2105
     These sections hold your program.  `as' and `ld' treat them as
2106
     separate but equal sections.  Anything you can say of one section
2107
     is true of another.  When the program is running, however, it is
2108
     customary for the text section to be unalterable.  The text
2109
     section is often shared among processes: it contains instructions,
2110
     constants and the like.  The data section of a running program is
2111
     usually alterable: for example, C variables would be stored in the
2112
     data section.
2113
 
2114
*bss section*
2115
     This section contains zeroed bytes when your program begins
2116
     running.  It is used to hold uninitialized variables or common
2117
     storage.  The length of each partial program's bss section is
2118
     important, but because it starts out containing zeroed bytes there
2119
     is no need to store explicit zero bytes in the object file.  The
2120
     bss section was invented to eliminate those explicit zeros from
2121
     object files.
2122
 
2123
*absolute section*
2124
     Address 0 of this section is always "relocated" to runtime address
2125
     0.  This is useful if you want to refer to an address that `ld'
2126
     must not change when relocating.  In this sense we speak of
2127
     absolute addresses being "unrelocatable": they do not change
2128
     during relocation.
2129
 
2130
*undefined section*
2131
     This "section" is a catch-all for address references to objects
2132
     not in the preceding sections.
2133
 
2134
   An idealized example of three relocatable sections follows.  The
2135
example uses the traditional section names `.text' and `.data'.  Memory
2136
addresses are on the horizontal axis.
2137
 
2138
                           +-----+----+--+
2139
     partial program # 1:  |ttttt|dddd|00|
2140
                           +-----+----+--+
2141
 
2142
                           text   data bss
2143
                           seg.   seg. seg.
2144
 
2145
                           +---+---+---+
2146
     partial program # 2:  |TTT|DDD|000|
2147
                           +---+---+---+
2148
 
2149
                           +--+---+-----+--+----+---+-----+~~
2150
     linked program:       |  |TTT|ttttt|  |dddd|DDD|00000|
2151
                           +--+---+-----+--+----+---+-----+~~
2152
 
2153
         addresses:        0 ...
2154
 
2155

2156
File: as.info,  Node: As Sections,  Next: Sub-Sections,  Prev: Ld Sections,  Up: Sections
2157
 
2158
4.3 Assembler Internal Sections
2159
===============================
2160
 
2161
These sections are meant only for the internal use of `as'.  They have
2162
no meaning at run-time.  You do not really need to know about these
2163
sections for most purposes; but they can be mentioned in `as' warning
2164
messages, so it might be helpful to have an idea of their meanings to
2165
`as'.  These sections are used to permit the value of every expression
2166
in your assembly language program to be a section-relative address.
2167
 
2168
ASSEMBLER-INTERNAL-LOGIC-ERROR!
2169
     An internal assembler logic error has been found.  This means
2170
     there is a bug in the assembler.
2171
 
2172
expr section
2173
     The assembler stores complex expression internally as combinations
2174
     of symbols.  When it needs to represent an expression as a symbol,
2175
     it puts it in the expr section.
2176
 
2177

2178
File: as.info,  Node: Sub-Sections,  Next: bss,  Prev: As Sections,  Up: Sections
2179
 
2180
4.4 Sub-Sections
2181
================
2182
 
2183
Assembled bytes conventionally fall into two sections: text and data.
2184
You may have separate groups of data in named sections that you want to
2185
end up near to each other in the object file, even though they are not
2186
contiguous in the assembler source.  `as' allows you to use
2187
"subsections" for this purpose.  Within each section, there can be
2188
numbered subsections with values from 0 to 8192.  Objects assembled
2189
into the same subsection go into the object file together with other
2190
objects in the same subsection.  For example, a compiler might want to
2191
store constants in the text section, but might not want to have them
2192
interspersed with the program being assembled.  In this case, the
2193
compiler could issue a `.text 0' before each section of code being
2194
output, and a `.text 1' before each group of constants being output.
2195
 
2196
Subsections are optional.  If you do not use subsections, everything
2197
goes in subsection number zero.
2198
 
2199
   Each subsection is zero-padded up to a multiple of four bytes.
2200
(Subsections may be padded a different amount on different flavors of
2201
`as'.)
2202
 
2203
   Subsections appear in your object file in numeric order, lowest
2204
numbered to highest.  (All this to be compatible with other people's
2205
assemblers.)  The object file contains no representation of
2206
subsections; `ld' and other programs that manipulate object files see
2207
no trace of them.  They just see all your text subsections as a text
2208
section, and all your data subsections as a data section.
2209
 
2210
   To specify which subsection you want subsequent statements assembled
2211
into, use a numeric argument to specify it, in a `.text EXPRESSION' or
2212
a `.data EXPRESSION' statement.  When generating COFF output, you can
2213
also use an extra subsection argument with arbitrary named sections:
2214
`.section NAME, EXPRESSION'.  When generating ELF output, you can also
2215
use the `.subsection' directive (*note SubSection::) to specify a
2216
subsection: `.subsection EXPRESSION'.  EXPRESSION should be an absolute
2217
expression (*note Expressions::).  If you just say `.text' then `.text
2218
0' is assumed.  Likewise `.data' means `.data 0'.  Assembly begins in
2219
`text 0'.  For instance:
2220
     .text 0     # The default subsection is text 0 anyway.
2221
     .ascii "This lives in the first text subsection. *"
2222
     .text 1
2223
     .ascii "But this lives in the second text subsection."
2224
     .data 0
2225
     .ascii "This lives in the data section,"
2226
     .ascii "in the first data subsection."
2227
     .text 0
2228
     .ascii "This lives in the first text section,"
2229
     .ascii "immediately following the asterisk (*)."
2230
 
2231
   Each section has a "location counter" incremented by one for every
2232
byte assembled into that section.  Because subsections are merely a
2233
convenience restricted to `as' there is no concept of a subsection
2234
location counter.  There is no way to directly manipulate a location
2235
counter--but the `.align' directive changes it, and any label
2236
definition captures its current value.  The location counter of the
2237
section where statements are being assembled is said to be the "active"
2238
location counter.
2239
 
2240

2241
File: as.info,  Node: bss,  Prev: Sub-Sections,  Up: Sections
2242
 
2243
4.5 bss Section
2244
===============
2245
 
2246
The bss section is used for local common variable storage.  You may
2247
allocate address space in the bss section, but you may not dictate data
2248
to load into it before your program executes.  When your program starts
2249
running, all the contents of the bss section are zeroed bytes.
2250
 
2251
   The `.lcomm' pseudo-op defines a symbol in the bss section; see
2252
*Note `.lcomm': Lcomm.
2253
 
2254
   The `.comm' pseudo-op may be used to declare a common symbol, which
2255
is another form of uninitialized symbol; see *Note `.comm': Comm.
2256
 
2257
   When assembling for a target which supports multiple sections, such
2258
as ELF or COFF, you may switch into the `.bss' section and define
2259
symbols as usual; see *Note `.section': Section.  You may only assemble
2260
zero values into the section.  Typically the section will only contain
2261
symbol definitions and `.skip' directives (*note `.skip': Skip.).
2262
 
2263

2264
File: as.info,  Node: Symbols,  Next: Expressions,  Prev: Sections,  Up: Top
2265
 
2266
5 Symbols
2267
*********
2268
 
2269
Symbols are a central concept: the programmer uses symbols to name
2270
things, the linker uses symbols to link, and the debugger uses symbols
2271
to debug.
2272
 
2273
     _Warning:_ `as' does not place symbols in the object file in the
2274
     same order they were declared.  This may break some debuggers.
2275
 
2276
* Menu:
2277
 
2278
* Labels::                      Labels
2279
* Setting Symbols::             Giving Symbols Other Values
2280
* Symbol Names::                Symbol Names
2281
* Dot::                         The Special Dot Symbol
2282
* Symbol Attributes::           Symbol Attributes
2283
 
2284

2285
File: as.info,  Node: Labels,  Next: Setting Symbols,  Up: Symbols
2286
 
2287
5.1 Labels
2288
==========
2289
 
2290
A "label" is written as a symbol immediately followed by a colon `:'.
2291
The symbol then represents the current value of the active location
2292
counter, and is, for example, a suitable instruction operand.  You are
2293
warned if you use the same symbol to represent two different locations:
2294
the first definition overrides any other definitions.
2295
 
2296
   On the HPPA, the usual form for a label need not be immediately
2297
followed by a colon, but instead must start in column zero.  Only one
2298
label may be defined on a single line.  To work around this, the HPPA
2299
version of `as' also provides a special directive `.label' for defining
2300
labels more flexibly.
2301
 
2302

2303
File: as.info,  Node: Setting Symbols,  Next: Symbol Names,  Prev: Labels,  Up: Symbols
2304
 
2305
5.2 Giving Symbols Other Values
2306
===============================
2307
 
2308
A symbol can be given an arbitrary value by writing a symbol, followed
2309
by an equals sign `=', followed by an expression (*note Expressions::).
2310
This is equivalent to using the `.set' directive.  *Note `.set': Set.
2311
In the same way, using a double equals sign `='`=' here represents an
2312
equivalent of the `.eqv' directive.  *Note `.eqv': Eqv.
2313
 
2314

2315
File: as.info,  Node: Symbol Names,  Next: Dot,  Prev: Setting Symbols,  Up: Symbols
2316
 
2317
5.3 Symbol Names
2318
================
2319
 
2320
Symbol names begin with a letter or with one of `._'.  On most
2321
machines, you can also use `$' in symbol names; exceptions are noted in
2322
*Note Machine Dependencies::.  That character may be followed by any
2323
string of digits, letters, dollar signs (unless otherwise noted for a
2324
particular target machine), and underscores.
2325
 
2326
Case of letters is significant: `foo' is a different symbol name than
2327
`Foo'.
2328
 
2329
   Each symbol has exactly one name.  Each name in an assembly language
2330
program refers to exactly one symbol.  You may use that symbol name any
2331
number of times in a program.
2332
 
2333
Local Symbol Names
2334
------------------
2335
 
2336
A local symbol is any symbol beginning with certain local label
2337
prefixes.  By default, the local label prefix is `.L' for ELF systems or
2338
`L' for traditional a.out systems, but each target may have its own set
2339
of local label prefixes.  On the HPPA local symbols begin with `L$'.
2340
 
2341
   Local symbols are defined and used within the assembler, but they are
2342
normally not saved in object files.  Thus, they are not visible when
2343
debugging.  You may use the `-L' option (*note Include Local Symbols:
2344
`-L': L.) to retain the local symbols in the object files.
2345
 
2346
Local Labels
2347
------------
2348
 
2349
Local labels help compilers and programmers use names temporarily.
2350
They create symbols which are guaranteed to be unique over the entire
2351
scope of the input source code and which can be referred to by a simple
2352
notation.  To define a local label, write a label of the form `N:'
2353
(where N represents any positive integer).  To refer to the most recent
2354
previous definition of that label write `Nb', using the same number as
2355
when you defined the label.  To refer to the next definition of a local
2356
label, write `Nf'--the `b' stands for "backwards" and the `f' stands
2357
for "forwards".
2358
 
2359
   There is no restriction on how you can use these labels, and you can
2360
reuse them too.  So that it is possible to repeatedly define the same
2361
local label (using the same number `N'), although you can only refer to
2362
the most recently defined local label of that number (for a backwards
2363
reference) or the next definition of a specific local label for a
2364
forward reference.  It is also worth noting that the first 10 local
2365
labels (`0:'...`9:') are implemented in a slightly more efficient
2366
manner than the others.
2367
 
2368
   Here is an example:
2369
 
2370
     1:        branch 1f
2371
     2:        branch 1b
2372
     1:        branch 2f
2373
     2:        branch 1b
2374
 
2375
   Which is the equivalent of:
2376
 
2377
     label_1:  branch label_3
2378
     label_2:  branch label_1
2379
     label_3:  branch label_4
2380
     label_4:  branch label_3
2381
 
2382
   Local label names are only a notational device.  They are immediately
2383
transformed into more conventional symbol names before the assembler
2384
uses them.  The symbol names are stored in the symbol table, appear in
2385
error messages, and are optionally emitted to the object file.  The
2386
names are constructed using these parts:
2387
 
2388
`_local label prefix_'
2389
     All local symbols begin with the system-specific local label
2390
     prefix.  Normally both `as' and `ld' forget symbols that start
2391
     with the local label prefix.  These labels are used for symbols
2392
     you are never intended to see.  If you use the `-L' option then
2393
     `as' retains these symbols in the object file. If you also
2394
     instruct `ld' to retain these symbols, you may use them in
2395
     debugging.
2396
 
2397
`NUMBER'
2398
     This is the number that was used in the local label definition.
2399
     So if the label is written `55:' then the number is `55'.
2400
 
2401
`C-B'
2402
     This unusual character is included so you do not accidentally
2403
     invent a symbol of the same name.  The character has ASCII value
2404
     of `\002' (control-B).
2405
 
2406
`_ordinal number_'
2407
     This is a serial number to keep the labels distinct.  The first
2408
     definition of `0:' gets the number `1'.  The 15th definition of
2409
     `0:' gets the number `15', and so on.  Likewise the first
2410
     definition of `1:' gets the number `1' and its 15th definition
2411
     gets `15' as well.
2412
 
2413
   So for example, the first `1:' may be named `.L1C-B1', and the 44th
2414
`3:' may be named `.L3C-B44'.
2415
 
2416
Dollar Local Labels
2417
-------------------
2418
 
2419
`as' also supports an even more local form of local labels called
2420
dollar labels.  These labels go out of scope (i.e., they become
2421
undefined) as soon as a non-local label is defined.  Thus they remain
2422
valid for only a small region of the input source code.  Normal local
2423
labels, by contrast, remain in scope for the entire file, or until they
2424
are redefined by another occurrence of the same local label.
2425
 
2426
   Dollar labels are defined in exactly the same way as ordinary local
2427
labels, except that instead of being terminated by a colon, they are
2428
terminated by a dollar sign, e.g., `55$'.
2429
 
2430
   They can also be distinguished from ordinary local labels by their
2431
transformed names which use ASCII character `\001' (control-A) as the
2432
magic character to distinguish them from ordinary labels.  For example,
2433
the fifth definition of `6$' may be named `.L6C-A5'.
2434
 
2435

2436
File: as.info,  Node: Dot,  Next: Symbol Attributes,  Prev: Symbol Names,  Up: Symbols
2437
 
2438
5.4 The Special Dot Symbol
2439
==========================
2440
 
2441
The special symbol `.' refers to the current address that `as' is
2442
assembling into.  Thus, the expression `melvin: .long .' defines
2443
`melvin' to contain its own address.  Assigning a value to `.' is
2444
treated the same as a `.org' directive.  Thus, the expression `.=.+4'
2445
is the same as saying `.space 4'.
2446
 
2447

2448
File: as.info,  Node: Symbol Attributes,  Prev: Dot,  Up: Symbols
2449
 
2450
5.5 Symbol Attributes
2451
=====================
2452
 
2453
Every symbol has, as well as its name, the attributes "Value" and
2454
"Type".  Depending on output format, symbols can also have auxiliary
2455
attributes.
2456
 
2457
   If you use a symbol without defining it, `as' assumes zero for all
2458
these attributes, and probably won't warn you.  This makes the symbol
2459
an externally defined symbol, which is generally what you would want.
2460
 
2461
* Menu:
2462
 
2463
* Symbol Value::                Value
2464
* Symbol Type::                 Type
2465
 
2466
 
2467
* a.out Symbols::               Symbol Attributes: `a.out'
2468
 
2469
* COFF Symbols::                Symbol Attributes for COFF
2470
 
2471
* SOM Symbols::                Symbol Attributes for SOM
2472
 
2473

2474
File: as.info,  Node: Symbol Value,  Next: Symbol Type,  Up: Symbol Attributes
2475
 
2476
5.5.1 Value
2477
-----------
2478
 
2479
The value of a symbol is (usually) 32 bits.  For a symbol which labels a
2480
location in the text, data, bss or absolute sections the value is the
2481
number of addresses from the start of that section to the label.
2482
Naturally for text, data and bss sections the value of a symbol changes
2483
as `ld' changes section base addresses during linking.  Absolute
2484
symbols' values do not change during linking: that is why they are
2485
called absolute.
2486
 
2487
   The value of an undefined symbol is treated in a special way.  If it
2488
is 0 then the symbol is not defined in this assembler source file, and
2489
`ld' tries to determine its value from other files linked into the same
2490
program.  You make this kind of symbol simply by mentioning a symbol
2491
name without defining it.  A non-zero value represents a `.comm' common
2492
declaration.  The value is how much common storage to reserve, in bytes
2493
(addresses).  The symbol refers to the first address of the allocated
2494
storage.
2495
 
2496

2497
File: as.info,  Node: Symbol Type,  Next: a.out Symbols,  Prev: Symbol Value,  Up: Symbol Attributes
2498
 
2499
5.5.2 Type
2500
----------
2501
 
2502
The type attribute of a symbol contains relocation (section)
2503
information, any flag settings indicating that a symbol is external, and
2504
(optionally), other information for linkers and debuggers.  The exact
2505
format depends on the object-code output format in use.
2506
 
2507

2508
File: as.info,  Node: a.out Symbols,  Next: COFF Symbols,  Prev: Symbol Type,  Up: Symbol Attributes
2509
 
2510
5.5.3 Symbol Attributes: `a.out'
2511
--------------------------------
2512
 
2513
* Menu:
2514
 
2515
* Symbol Desc::                 Descriptor
2516
* Symbol Other::                Other
2517
 
2518

2519
File: as.info,  Node: Symbol Desc,  Next: Symbol Other,  Up: a.out Symbols
2520
 
2521
5.5.3.1 Descriptor
2522
..................
2523
 
2524
This is an arbitrary 16-bit value.  You may establish a symbol's
2525
descriptor value by using a `.desc' statement (*note `.desc': Desc.).
2526
A descriptor value means nothing to `as'.
2527
 
2528

2529
File: as.info,  Node: Symbol Other,  Prev: Symbol Desc,  Up: a.out Symbols
2530
 
2531
5.5.3.2 Other
2532
.............
2533
 
2534
This is an arbitrary 8-bit value.  It means nothing to `as'.
2535
 
2536

2537
File: as.info,  Node: COFF Symbols,  Next: SOM Symbols,  Prev: a.out Symbols,  Up: Symbol Attributes
2538
 
2539
5.5.4 Symbol Attributes for COFF
2540
--------------------------------
2541
 
2542
The COFF format supports a multitude of auxiliary symbol attributes;
2543
like the primary symbol attributes, they are set between `.def' and
2544
`.endef' directives.
2545
 
2546
5.5.4.1 Primary Attributes
2547
..........................
2548
 
2549
The symbol name is set with `.def'; the value and type, respectively,
2550
with `.val' and `.type'.
2551
 
2552
5.5.4.2 Auxiliary Attributes
2553
............................
2554
 
2555
The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and
2556
`.weak' can generate auxiliary symbol table information for COFF.
2557
 
2558

2559
File: as.info,  Node: SOM Symbols,  Prev: COFF Symbols,  Up: Symbol Attributes
2560
 
2561
5.5.5 Symbol Attributes for SOM
2562
-------------------------------
2563
 
2564
The SOM format for the HPPA supports a multitude of symbol attributes
2565
set with the `.EXPORT' and `.IMPORT' directives.
2566
 
2567
   The attributes are described in `HP9000 Series 800 Assembly Language
2568
Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
2569
assembler directive documentation.
2570
 
2571

2572
File: as.info,  Node: Expressions,  Next: Pseudo Ops,  Prev: Symbols,  Up: Top
2573
 
2574
6 Expressions
2575
*************
2576
 
2577
An "expression" specifies an address or numeric value.  Whitespace may
2578
precede and/or follow an expression.
2579
 
2580
   The result of an expression must be an absolute number, or else an
2581
offset into a particular section.  If an expression is not absolute,
2582
and there is not enough information when `as' sees the expression to
2583
know its section, a second pass over the source program might be
2584
necessary to interpret the expression--but the second pass is currently
2585
not implemented.  `as' aborts with an error message in this situation.
2586
 
2587
* Menu:
2588
 
2589
* Empty Exprs::                 Empty Expressions
2590
* Integer Exprs::               Integer Expressions
2591
 
2592

2593
File: as.info,  Node: Empty Exprs,  Next: Integer Exprs,  Up: Expressions
2594
 
2595
6.1 Empty Expressions
2596
=====================
2597
 
2598
An empty expression has no value: it is just whitespace or null.
2599
Wherever an absolute expression is required, you may omit the
2600
expression, and `as' assumes a value of (absolute) 0.  This is
2601
compatible with other assemblers.
2602
 
2603

2604
File: as.info,  Node: Integer Exprs,  Prev: Empty Exprs,  Up: Expressions
2605
 
2606
6.2 Integer Expressions
2607
=======================
2608
 
2609
An "integer expression" is one or more _arguments_ delimited by
2610
_operators_.
2611
 
2612
* Menu:
2613
 
2614
* Arguments::                   Arguments
2615
* Operators::                   Operators
2616
* Prefix Ops::                  Prefix Operators
2617
* Infix Ops::                   Infix Operators
2618
 
2619

2620
File: as.info,  Node: Arguments,  Next: Operators,  Up: Integer Exprs
2621
 
2622
6.2.1 Arguments
2623
---------------
2624
 
2625
"Arguments" are symbols, numbers or subexpressions.  In other contexts
2626
arguments are sometimes called "arithmetic operands".  In this manual,
2627
to avoid confusing them with the "instruction operands" of the machine
2628
language, we use the term "argument" to refer to parts of expressions
2629
only, reserving the word "operand" to refer only to machine instruction
2630
operands.
2631
 
2632
   Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
2633
text, data, bss, absolute, or undefined.  NNN is a signed, 2's
2634
complement 32 bit integer.
2635
 
2636
   Numbers are usually integers.
2637
 
2638
   A number can be a flonum or bignum.  In this case, you are warned
2639
that only the low order 32 bits are used, and `as' pretends these 32
2640
bits are an integer.  You may write integer-manipulating instructions
2641
that act on exotic constants, compatible with other assemblers.
2642
 
2643
   Subexpressions are a left parenthesis `(' followed by an integer
2644
expression, followed by a right parenthesis `)'; or a prefix operator
2645
followed by an argument.
2646
 
2647

2648
File: as.info,  Node: Operators,  Next: Prefix Ops,  Prev: Arguments,  Up: Integer Exprs
2649
 
2650
6.2.2 Operators
2651
---------------
2652
 
2653
"Operators" are arithmetic functions, like `+' or `%'.  Prefix
2654
operators are followed by an argument.  Infix operators appear between
2655
their arguments.  Operators may be preceded and/or followed by
2656
whitespace.
2657
 
2658

2659
File: as.info,  Node: Prefix Ops,  Next: Infix Ops,  Prev: Operators,  Up: Integer Exprs
2660
 
2661
6.2.3 Prefix Operator
2662
---------------------
2663
 
2664
`as' has the following "prefix operators".  They each take one
2665
argument, which must be absolute.
2666
 
2667
`-'
2668
     "Negation".  Two's complement negation.
2669
 
2670
`~'
2671
     "Complementation".  Bitwise not.
2672
 
2673

2674
File: as.info,  Node: Infix Ops,  Prev: Prefix Ops,  Up: Integer Exprs
2675
 
2676
6.2.4 Infix Operators
2677
---------------------
2678
 
2679
"Infix operators" take two arguments, one on either side.  Operators
2680
have precedence, but operations with equal precedence are performed left
2681
to right.  Apart from `+' or `-', both arguments must be absolute, and
2682
the result is absolute.
2683
 
2684
  1. Highest Precedence
2685
 
2686
    `*'
2687
          "Multiplication".
2688
 
2689
    `/'
2690
          "Division".  Truncation is the same as the C operator `/'
2691
 
2692
    `%'
2693
          "Remainder".
2694
 
2695
    `<<'
2696
          "Shift Left".  Same as the C operator `<<'.
2697
 
2698
    `>>'
2699
          "Shift Right".  Same as the C operator `>>'.
2700
 
2701
  2. Intermediate precedence
2702
 
2703
    `|'
2704
          "Bitwise Inclusive Or".
2705
 
2706
    `&'
2707
          "Bitwise And".
2708
 
2709
    `^'
2710
          "Bitwise Exclusive Or".
2711
 
2712
    `!'
2713
          "Bitwise Or Not".
2714
 
2715
  3. Low Precedence
2716
 
2717
    `+'
2718
          "Addition".  If either argument is absolute, the result has
2719
          the section of the other argument.  You may not add together
2720
          arguments from different sections.
2721
 
2722
    `-'
2723
          "Subtraction".  If the right argument is absolute, the result
2724
          has the section of the left argument.  If both arguments are
2725
          in the same section, the result is absolute.  You may not
2726
          subtract arguments from different sections.
2727
 
2728
    `=='
2729
          "Is Equal To"
2730
 
2731
    `<>'
2732
    `!='
2733
          "Is Not Equal To"
2734
 
2735
    `<'
2736
          "Is Less Than"
2737
 
2738
    `>'
2739
          "Is Greater Than"
2740
 
2741
    `>='
2742
          "Is Greater Than Or Equal To"
2743
 
2744
    `<='
2745
          "Is Less Than Or Equal To"
2746
 
2747
          The comparison operators can be used as infix operators.  A
2748
          true results has a value of -1 whereas a false result has a
2749
          value of 0.   Note, these operators perform signed
2750
          comparisons.
2751
 
2752
  4. Lowest Precedence
2753
 
2754
    `&&'
2755
          "Logical And".
2756
 
2757
    `||'
2758
          "Logical Or".
2759
 
2760
          These two logical operations can be used to combine the
2761
          results of sub expressions.  Note, unlike the comparison
2762
          operators a true result returns a value of 1 but a false
2763
          results does still return 0.  Also note that the logical or
2764
          operator has a slightly lower precedence than logical and.
2765
 
2766
 
2767
   In short, it's only meaningful to add or subtract the _offsets_ in an
2768
address; you can only have a defined section in one of the two
2769
arguments.
2770
 
2771

2772
File: as.info,  Node: Pseudo Ops,  Next: Object Attributes,  Prev: Expressions,  Up: Top
2773
 
2774
7 Assembler Directives
2775
**********************
2776
 
2777
All assembler directives have names that begin with a period (`.').
2778
The rest of the name is letters, usually in lower case.
2779
 
2780
   This chapter discusses directives that are available regardless of
2781
the target machine configuration for the GNU assembler.  Some machine
2782
configurations provide additional directives.  *Note Machine
2783
Dependencies::.
2784
 
2785
* Menu:
2786
 
2787
* Abort::                       `.abort'
2788
 
2789
* ABORT (COFF)::                `.ABORT'
2790
 
2791
* Align::                       `.align ABS-EXPR , ABS-EXPR'
2792
* Altmacro::                    `.altmacro'
2793
* Ascii::                       `.ascii "STRING"'...
2794
* Asciz::                       `.asciz "STRING"'...
2795
* Balign::                      `.balign ABS-EXPR , ABS-EXPR'
2796
* Byte::                        `.byte EXPRESSIONS'
2797
* Comm::                        `.comm SYMBOL , LENGTH '
2798
 
2799
* CFI directives::              `.cfi_startproc [simple]', `.cfi_endproc', etc.
2800
 
2801
* Data::                        `.data SUBSECTION'
2802
 
2803
* Def::                         `.def NAME'
2804
 
2805
* Desc::                        `.desc SYMBOL, ABS-EXPRESSION'
2806
 
2807
* Dim::                         `.dim'
2808
 
2809
* Double::                      `.double FLONUMS'
2810
* Eject::                       `.eject'
2811
* Else::                        `.else'
2812
* Elseif::                      `.elseif'
2813
* End::                         `.end'
2814
 
2815
* Endef::                       `.endef'
2816
 
2817
* Endfunc::                     `.endfunc'
2818
* Endif::                       `.endif'
2819
* Equ::                         `.equ SYMBOL, EXPRESSION'
2820
* Equiv::                       `.equiv SYMBOL, EXPRESSION'
2821
* Eqv::                         `.eqv SYMBOL, EXPRESSION'
2822
* Err::                         `.err'
2823
* Error::                       `.error STRING'
2824
* Exitm::                       `.exitm'
2825
* Extern::                      `.extern'
2826
* Fail::                        `.fail'
2827
 
2828
* File::                        `.file STRING'
2829
 
2830
* Fill::                        `.fill REPEAT , SIZE , VALUE'
2831
* Float::                       `.float FLONUMS'
2832
* Func::                        `.func'
2833
* Global::                      `.global SYMBOL', `.globl SYMBOL'
2834
 
2835
* Gnu_attribute::               `.gnu_attribute TAG,VALUE'
2836
* Hidden::                      `.hidden NAMES'
2837
 
2838
* hword::                       `.hword EXPRESSIONS'
2839
* Ident::                       `.ident'
2840
* If::                          `.if ABSOLUTE EXPRESSION'
2841
* Incbin::                      `.incbin "FILE"[,SKIP[,COUNT]]'
2842
* Include::                     `.include "FILE"'
2843
* Int::                         `.int EXPRESSIONS'
2844
 
2845
* Internal::                    `.internal NAMES'
2846
 
2847
* Irp::                         `.irp SYMBOL,VALUES'...
2848
* Irpc::                        `.irpc SYMBOL,VALUES'...
2849
* Lcomm::                       `.lcomm SYMBOL , LENGTH'
2850
* Lflags::                      `.lflags'
2851
 
2852
* Line::                        `.line LINE-NUMBER'
2853
 
2854
* Linkonce::                    `.linkonce [TYPE]'
2855
* List::                        `.list'
2856
* Ln::                          `.ln LINE-NUMBER'
2857
 
2858
* LNS directives::              `.file', `.loc', etc.
2859
 
2860
* Long::                        `.long EXPRESSIONS'
2861
 
2862
* Macro::                       `.macro NAME ARGS'...
2863
* MRI::                         `.mri VAL'
2864
* Noaltmacro::                  `.noaltmacro'
2865
* Nolist::                      `.nolist'
2866
* Octa::                        `.octa BIGNUMS'
2867
* Org::                         `.org NEW-LC, FILL'
2868
* P2align::                     `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR'
2869
 
2870
* PopSection::                  `.popsection'
2871
* Previous::                    `.previous'
2872
 
2873
* Print::                       `.print STRING'
2874
 
2875
* Protected::                   `.protected NAMES'
2876
 
2877
* Psize::                       `.psize LINES, COLUMNS'
2878
* Purgem::                      `.purgem NAME'
2879
 
2880
* PushSection::                 `.pushsection NAME'
2881
 
2882
* Quad::                        `.quad BIGNUMS'
2883
* Reloc::                       `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
2884
* Rept::                        `.rept COUNT'
2885
* Sbttl::                       `.sbttl "SUBHEADING"'
2886
 
2887
* Scl::                         `.scl CLASS'
2888
 
2889
* Section::                     `.section NAME[, FLAGS]'
2890
 
2891
* Set::                         `.set SYMBOL, EXPRESSION'
2892
* Short::                       `.short EXPRESSIONS'
2893
* Single::                      `.single FLONUMS'
2894
 
2895
* Size::                        `.size [NAME , EXPRESSION]'
2896
 
2897
* Skip::                        `.skip SIZE , FILL'
2898
* Sleb128::                     `.sleb128 EXPRESSIONS'
2899
* Space::                       `.space SIZE , FILL'
2900
 
2901
* Stab::                        `.stabd, .stabn, .stabs'
2902
 
2903
* String::                      `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"'
2904
* Struct::                      `.struct EXPRESSION'
2905
 
2906
* SubSection::                  `.subsection'
2907
* Symver::                      `.symver NAME,NAME2@NODENAME'
2908
 
2909
 
2910
* Tag::                         `.tag STRUCTNAME'
2911
 
2912
* Text::                        `.text SUBSECTION'
2913
* Title::                       `.title "HEADING"'
2914
 
2915
* Type::                        `.type '
2916
 
2917
* Uleb128::                     `.uleb128 EXPRESSIONS'
2918
 
2919
* Val::                         `.val ADDR'
2920
 
2921
 
2922
* Version::                     `.version "STRING"'
2923
* VTableEntry::                 `.vtable_entry TABLE, OFFSET'
2924
* VTableInherit::               `.vtable_inherit CHILD, PARENT'
2925
 
2926
* Warning::                     `.warning STRING'
2927
* Weak::                        `.weak NAMES'
2928
* Weakref::                     `.weakref ALIAS, SYMBOL'
2929
* Word::                        `.word EXPRESSIONS'
2930
* Deprecated::                  Deprecated Directives
2931
 
2932

2933
File: as.info,  Node: Abort,  Next: ABORT (COFF),  Up: Pseudo Ops
2934
 
2935
7.1 `.abort'
2936
============
2937
 
2938
This directive stops the assembly immediately.  It is for compatibility
2939
with other assemblers.  The original idea was that the assembly
2940
language source would be piped into the assembler.  If the sender of
2941
the source quit, it could use this directive tells `as' to quit also.
2942
One day `.abort' will not be supported.
2943
 
2944

2945
File: as.info,  Node: ABORT (COFF),  Next: Align,  Prev: Abort,  Up: Pseudo Ops
2946
 
2947
7.2 `.ABORT' (COFF)
2948
===================
2949
 
2950
When producing COFF output, `as' accepts this directive as a synonym
2951
for `.abort'.
2952
 
2953

2954
File: as.info,  Node: Align,  Next: Altmacro,  Prev: ABORT (COFF),  Up: Pseudo Ops
2955
 
2956
7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
2957
=========================================
2958
 
2959
Pad the location counter (in the current subsection) to a particular
2960
storage boundary.  The first expression (which must be absolute) is the
2961
alignment required, as described below.
2962
 
2963
   The second expression (also absolute) gives the fill value to be
2964
stored in the padding bytes.  It (and the comma) may be omitted.  If it
2965
is omitted, the padding bytes are normally zero.  However, on some
2966
systems, if the section is marked as containing code and the fill value
2967
is omitted, the space is filled with no-op instructions.
2968
 
2969
   The third expression is also absolute, and is also optional.  If it
2970
is present, it is the maximum number of bytes that should be skipped by
2971
this alignment directive.  If doing the alignment would require
2972
skipping more bytes than the specified maximum, then the alignment is
2973
not done at all.  You can omit the fill value (the second argument)
2974
entirely by simply using two commas after the required alignment; this
2975
can be useful if you want the alignment to be filled with no-op
2976
instructions when appropriate.
2977
 
2978
   The way the required alignment is specified varies from system to
2979
system.  For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
2980
s390, sparc, tic4x, tic80 and xtensa, the first expression is the
2981
alignment request in bytes.  For example `.align 8' advances the
2982
location counter until it is a multiple of 8.  If the location counter
2983
is already a multiple of 8, no change is needed.  For the tic54x, the
2984
first expression is the alignment request in words.
2985
 
2986
   For other systems, including ppc, i386 using a.out format, arm and
2987
strongarm, it is the number of low-order zero bits the location counter
2988
must have after advancement.  For example `.align 3' advances the
2989
location counter until it a multiple of 8.  If the location counter is
2990
already a multiple of 8, no change is needed.
2991
 
2992
   This inconsistency is due to the different behaviors of the various
2993
native assemblers for these systems which GAS must emulate.  GAS also
2994
provides `.balign' and `.p2align' directives, described later, which
2995
have a consistent behavior across all architectures (but are specific
2996
to GAS).
2997
 
2998

2999
File: as.info,  Node: Ascii,  Next: Asciz,  Prev: Altmacro,  Up: Pseudo Ops
3000
 
3001
7.4 `.ascii "STRING"'...
3002
========================
3003
 
3004
`.ascii' expects zero or more string literals (*note Strings::)
3005
separated by commas.  It assembles each string (with no automatic
3006
trailing zero byte) into consecutive addresses.
3007
 
3008

3009
File: as.info,  Node: Asciz,  Next: Balign,  Prev: Ascii,  Up: Pseudo Ops
3010
 
3011
7.5 `.asciz "STRING"'...
3012
========================
3013
 
3014
`.asciz' is just like `.ascii', but each string is followed by a zero
3015
byte.  The "z" in `.asciz' stands for "zero".
3016
 
3017

3018
File: as.info,  Node: Balign,  Next: Byte,  Prev: Asciz,  Up: Pseudo Ops
3019
 
3020
7.6 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
3021
==============================================
3022
 
3023
Pad the location counter (in the current subsection) to a particular
3024
storage boundary.  The first expression (which must be absolute) is the
3025
alignment request in bytes.  For example `.balign 8' advances the
3026
location counter until it is a multiple of 8.  If the location counter
3027
is already a multiple of 8, no change is needed.
3028
 
3029
   The second expression (also absolute) gives the fill value to be
3030
stored in the padding bytes.  It (and the comma) may be omitted.  If it
3031
is omitted, the padding bytes are normally zero.  However, on some
3032
systems, if the section is marked as containing code and the fill value
3033
is omitted, the space is filled with no-op instructions.
3034
 
3035
   The third expression is also absolute, and is also optional.  If it
3036
is present, it is the maximum number of bytes that should be skipped by
3037
this alignment directive.  If doing the alignment would require
3038
skipping more bytes than the specified maximum, then the alignment is
3039
not done at all.  You can omit the fill value (the second argument)
3040
entirely by simply using two commas after the required alignment; this
3041
can be useful if you want the alignment to be filled with no-op
3042
instructions when appropriate.
3043
 
3044
   The `.balignw' and `.balignl' directives are variants of the
3045
`.balign' directive.  The `.balignw' directive treats the fill pattern
3046
as a two byte word value.  The `.balignl' directives treats the fill
3047
pattern as a four byte longword value.  For example, `.balignw
3048
4,0x368d' will align to a multiple of 4.  If it skips two bytes, they
3049
will be filled in with the value 0x368d (the exact placement of the
3050
bytes depends upon the endianness of the processor).  If it skips 1 or
3051
3 bytes, the fill value is undefined.
3052
 
3053

3054
File: as.info,  Node: Byte,  Next: Comm,  Prev: Balign,  Up: Pseudo Ops
3055
 
3056
7.7 `.byte EXPRESSIONS'
3057
=======================
3058
 
3059
`.byte' expects zero or more expressions, separated by commas.  Each
3060
expression is assembled into the next byte.
3061
 
3062

3063
File: as.info,  Node: Comm,  Next: CFI directives,  Prev: Byte,  Up: Pseudo Ops
3064
 
3065
7.8 `.comm SYMBOL , LENGTH '
3066
============================
3067
 
3068
`.comm' declares a common symbol named SYMBOL.  When linking, a common
3069
symbol in one object file may be merged with a defined or common symbol
3070
of the same name in another object file.  If `ld' does not see a
3071
definition for the symbol-just one or more common symbols-then it will
3072
allocate LENGTH bytes of uninitialized memory.  LENGTH must be an
3073
absolute expression.  If `ld' sees multiple common symbols with the
3074
same name, and they do not all have the same size, it will allocate
3075
space using the largest size.
3076
 
3077
   When using ELF, the `.comm' directive takes an optional third
3078
argument.  This is the desired alignment of the symbol, specified as a
3079
byte boundary (for example, an alignment of 16 means that the least
3080
significant 4 bits of the address should be zero).  The alignment must
3081
be an absolute expression, and it must be a power of two.  If `ld'
3082
allocates uninitialized memory for the common symbol, it will use the
3083
alignment when placing the symbol.  If no alignment is specified, `as'
3084
will set the alignment to the largest power of two less than or equal
3085
to the size of the symbol, up to a maximum of 16.
3086
 
3087
   The syntax for `.comm' differs slightly on the HPPA.  The syntax is
3088
`SYMBOL .comm, LENGTH'; SYMBOL is optional.
3089
 
3090

3091
File: as.info,  Node: CFI directives,  Next: Data,  Prev: Comm,  Up: Pseudo Ops
3092
 
3093
7.9 `.cfi_startproc [simple]'
3094
=============================
3095
 
3096
`.cfi_startproc' is used at the beginning of each function that should
3097
have an entry in `.eh_frame'. It initializes some internal data
3098
structures. Don't forget to close the function by `.cfi_endproc'.
3099
 
3100
   Unless `.cfi_startproc' is used along with parameter `simple' it
3101
also emits some architecture dependent initial CFI instructions.
3102
 
3103
7.10 `.cfi_endproc'
3104
===================
3105
 
3106
`.cfi_endproc' is used at the end of a function where it closes its
3107
unwind entry previously opened by `.cfi_startproc', and emits it to
3108
`.eh_frame'.
3109
 
3110
7.11 `.cfi_personality ENCODING [, EXP]'
3111
========================================
3112
 
3113
`.cfi_personality' defines personality routine and its encoding.
3114
ENCODING must be a constant determining how the personality should be
3115
encoded.  If it is 255 (`DW_EH_PE_omit'), second argument is not
3116
present, otherwise second argument should be a constant or a symbol
3117
name.  When using indirect encodings, the symbol provided should be the
3118
location where personality can be loaded from, not the personality
3119
routine itself.  The default after `.cfi_startproc' is
3120
`.cfi_personality 0xff', no personality routine.
3121
 
3122
7.12 `.cfi_lsda ENCODING [, EXP]'
3123
=================================
3124
 
3125
`.cfi_lsda' defines LSDA and its encoding.  ENCODING must be a constant
3126
determining how the LSDA should be encoded.  If it is 255
3127
(`DW_EH_PE_omit'), second argument is not present, otherwise second
3128
argument should be a constant or a symbol name.  The default after
3129
`.cfi_startproc' is `.cfi_lsda 0xff', no LSDA.
3130
 
3131
7.13 `.cfi_def_cfa REGISTER, OFFSET'
3132
====================================
3133
 
3134
`.cfi_def_cfa' defines a rule for computing CFA as: take address from
3135
REGISTER and add OFFSET to it.
3136
 
3137
7.14 `.cfi_def_cfa_register REGISTER'
3138
=====================================
3139
 
3140
`.cfi_def_cfa_register' modifies a rule for computing CFA. From now on
3141
REGISTER will be used instead of the old one. Offset remains the same.
3142
 
3143
7.15 `.cfi_def_cfa_offset OFFSET'
3144
=================================
3145
 
3146
`.cfi_def_cfa_offset' modifies a rule for computing CFA. Register
3147
remains the same, but OFFSET is new. Note that it is the absolute
3148
offset that will be added to a defined register to compute CFA address.
3149
 
3150
7.16 `.cfi_adjust_cfa_offset OFFSET'
3151
====================================
3152
 
3153
Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is
3154
added/substracted from the previous offset.
3155
 
3156
7.17 `.cfi_offset REGISTER, OFFSET'
3157
===================================
3158
 
3159
Previous value of REGISTER is saved at offset OFFSET from CFA.
3160
 
3161
7.18 `.cfi_rel_offset REGISTER, OFFSET'
3162
=======================================
3163
 
3164
Previous value of REGISTER is saved at offset OFFSET from the current
3165
CFA register.  This is transformed to `.cfi_offset' using the known
3166
displacement of the CFA register from the CFA.  This is often easier to
3167
use, because the number will match the code it's annotating.
3168
 
3169
7.19 `.cfi_register REGISTER1, REGISTER2'
3170
=========================================
3171
 
3172
Previous value of REGISTER1 is saved in register REGISTER2.
3173
 
3174
7.20 `.cfi_restore REGISTER'
3175
============================
3176
 
3177
`.cfi_restore' says that the rule for REGISTER is now the same as it
3178
was at the beginning of the function, after all initial instruction
3179
added by `.cfi_startproc' were executed.
3180
 
3181
7.21 `.cfi_undefined REGISTER'
3182
==============================
3183
 
3184
From now on the previous value of REGISTER can't be restored anymore.
3185
 
3186
7.22 `.cfi_same_value REGISTER'
3187
===============================
3188
 
3189
Current value of REGISTER is the same like in the previous frame, i.e.
3190
no restoration needed.
3191
 
3192
7.23 `.cfi_remember_state',
3193
===========================
3194
 
3195
First save all current rules for all registers by `.cfi_remember_state',
3196
then totally screw them up by subsequent `.cfi_*' directives and when
3197
everything is hopelessly bad, use `.cfi_restore_state' to restore the
3198
previous saved state.
3199
 
3200
7.24 `.cfi_return_column REGISTER'
3201
==================================
3202
 
3203
Change return column REGISTER, i.e. the return address is either
3204
directly in REGISTER or can be accessed by rules for REGISTER.
3205
 
3206
7.25 `.cfi_signal_frame'
3207
========================
3208
 
3209
Mark current function as signal trampoline.
3210
 
3211
7.26 `.cfi_window_save'
3212
=======================
3213
 
3214
SPARC register window has been saved.
3215
 
3216
7.27 `.cfi_escape' EXPRESSION[, ...]
3217
====================================
3218
 
3219
Allows the user to add arbitrary bytes to the unwind info.  One might
3220
use this to add OS-specific CFI opcodes, or generic CFI opcodes that
3221
GAS does not yet support.
3222
 
3223
7.28 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL'
3224
======================================================
3225
 
3226
The current value of REGISTER is LABEL.  The value of LABEL will be
3227
encoded in the output file according to ENCODING; see the description
3228
of `.cfi_personality' for details on this encoding.
3229
 
3230
   The usefulness of equating a register to a fixed label is probably
3231
limited to the return address register.  Here, it can be useful to mark
3232
a code segment that has only one return address which is reached by a
3233
direct branch and no copy of the return address exists in memory or
3234
another register.
3235
 
3236

3237
File: as.info,  Node: LNS directives,  Next: Long,  Prev: Ln,  Up: Pseudo Ops
3238
 
3239
7.29 `.file FILENO FILENAME'
3240
============================
3241
 
3242
When emitting dwarf2 line number information `.file' assigns filenames
3243
to the `.debug_line' file name table.  The FILENO operand should be a
3244
unique positive integer to use as the index of the entry in the table.
3245
The FILENAME operand is a C string literal.
3246
 
3247
   The detail of filename indices is exposed to the user because the
3248
filename table is shared with the `.debug_info' section of the dwarf2
3249
debugging information, and thus the user must know the exact indices
3250
that table entries will have.
3251
 
3252
7.30 `.loc FILENO LINENO [COLUMN] [OPTIONS]'
3253
============================================
3254
 
3255
The `.loc' directive will add row to the `.debug_line' line number
3256
matrix corresponding to the immediately following assembly instruction.
3257
The FILENO, LINENO, and optional COLUMN arguments will be applied to
3258
the `.debug_line' state machine before the row is added.
3259
 
3260
   The OPTIONS are a sequence of the following tokens in any order:
3261
 
3262
`basic_block'
3263
     This option will set the `basic_block' register in the
3264
     `.debug_line' state machine to `true'.
3265
 
3266
`prologue_end'
3267
     This option will set the `prologue_end' register in the
3268
     `.debug_line' state machine to `true'.
3269
 
3270
`epilogue_begin'
3271
     This option will set the `epilogue_begin' register in the
3272
     `.debug_line' state machine to `true'.
3273
 
3274
`is_stmt VALUE'
3275
     This option will set the `is_stmt' register in the `.debug_line'
3276
     state machine to `value', which must be either 0 or 1.
3277
 
3278
`isa VALUE'
3279
     This directive will set the `isa' register in the `.debug_line'
3280
     state machine to VALUE, which must be an unsigned integer.
3281
 
3282
 
3283
7.31 `.loc_mark_labels ENABLE'
3284
==============================
3285
 
3286
The `.loc_mark_labels' directive makes the assembler emit an entry to
3287
the `.debug_line' line number matrix with the `basic_block' register in
3288
the state machine set whenever a code label is seen.  The ENABLE
3289
argument should be either 1 or 0, to enable or disable this function
3290
respectively.
3291
 
3292

3293
File: as.info,  Node: Data,  Next: Def,  Prev: CFI directives,  Up: Pseudo Ops
3294
 
3295
7.32 `.data SUBSECTION'
3296
=======================
3297
 
3298
`.data' tells `as' to assemble the following statements onto the end of
3299
the data subsection numbered SUBSECTION (which is an absolute
3300
expression).  If SUBSECTION is omitted, it defaults to zero.
3301
 
3302

3303
File: as.info,  Node: Def,  Next: Desc,  Prev: Data,  Up: Pseudo Ops
3304
 
3305
7.33 `.def NAME'
3306
================
3307
 
3308
Begin defining debugging information for a symbol NAME; the definition
3309
extends until the `.endef' directive is encountered.
3310
 
3311

3312
File: as.info,  Node: Desc,  Next: Dim,  Prev: Def,  Up: Pseudo Ops
3313
 
3314
7.34 `.desc SYMBOL, ABS-EXPRESSION'
3315
===================================
3316
 
3317
This directive sets the descriptor of the symbol (*note Symbol
3318
Attributes::) to the low 16 bits of an absolute expression.
3319
 
3320
   The `.desc' directive is not available when `as' is configured for
3321
COFF output; it is only for `a.out' or `b.out' object format.  For the
3322
sake of compatibility, `as' accepts it, but produces no output, when
3323
configured for COFF.
3324
 
3325

3326
File: as.info,  Node: Dim,  Next: Double,  Prev: Desc,  Up: Pseudo Ops
3327
 
3328
7.35 `.dim'
3329
===========
3330
 
3331
This directive is generated by compilers to include auxiliary debugging
3332
information in the symbol table.  It is only permitted inside
3333
`.def'/`.endef' pairs.
3334
 
3335

3336
File: as.info,  Node: Double,  Next: Eject,  Prev: Dim,  Up: Pseudo Ops
3337
 
3338
7.36 `.double FLONUMS'
3339
======================
3340
 
3341
`.double' expects zero or more flonums, separated by commas.  It
3342
assembles floating point numbers.  The exact kind of floating point
3343
numbers emitted depends on how `as' is configured.  *Note Machine
3344
Dependencies::.
3345
 
3346

3347
File: as.info,  Node: Eject,  Next: Else,  Prev: Double,  Up: Pseudo Ops
3348
 
3349
7.37 `.eject'
3350
=============
3351
 
3352
Force a page break at this point, when generating assembly listings.
3353
 
3354

3355
File: as.info,  Node: Else,  Next: Elseif,  Prev: Eject,  Up: Pseudo Ops
3356
 
3357
7.38 `.else'
3358
============
3359
 
3360
`.else' is part of the `as' support for conditional assembly; see *Note
3361
`.if': If.  It marks the beginning of a section of code to be assembled
3362
if the condition for the preceding `.if' was false.
3363
 
3364

3365
File: as.info,  Node: Elseif,  Next: End,  Prev: Else,  Up: Pseudo Ops
3366
 
3367
7.39 `.elseif'
3368
==============
3369
 
3370
`.elseif' is part of the `as' support for conditional assembly; see
3371
*Note `.if': If.  It is shorthand for beginning a new `.if' block that
3372
would otherwise fill the entire `.else' section.
3373
 
3374

3375
File: as.info,  Node: End,  Next: Endef,  Prev: Elseif,  Up: Pseudo Ops
3376
 
3377
7.40 `.end'
3378
===========
3379
 
3380
`.end' marks the end of the assembly file.  `as' does not process
3381
anything in the file past the `.end' directive.
3382
 
3383

3384
File: as.info,  Node: Endef,  Next: Endfunc,  Prev: End,  Up: Pseudo Ops
3385
 
3386
7.41 `.endef'
3387
=============
3388
 
3389
This directive flags the end of a symbol definition begun with `.def'.
3390
 
3391

3392
File: as.info,  Node: Endfunc,  Next: Endif,  Prev: Endef,  Up: Pseudo Ops
3393
 
3394
7.42 `.endfunc'
3395
===============
3396
 
3397
`.endfunc' marks the end of a function specified with `.func'.
3398
 
3399

3400
File: as.info,  Node: Endif,  Next: Equ,  Prev: Endfunc,  Up: Pseudo Ops
3401
 
3402
7.43 `.endif'
3403
=============
3404
 
3405
`.endif' is part of the `as' support for conditional assembly; it marks
3406
the end of a block of code that is only assembled conditionally.  *Note
3407
`.if': If.
3408
 
3409

3410
File: as.info,  Node: Equ,  Next: Equiv,  Prev: Endif,  Up: Pseudo Ops
3411
 
3412
7.44 `.equ SYMBOL, EXPRESSION'
3413
==============================
3414
 
3415
This directive sets the value of SYMBOL to EXPRESSION.  It is
3416
synonymous with `.set'; see *Note `.set': Set.
3417
 
3418
   The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.
3419
 
3420
   The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'.  On the
3421
Z80 it is an eror if SYMBOL is already defined, but the symbol is not
3422
protected from later redefinition.  Compare *Note Equiv::.
3423
 
3424

3425
File: as.info,  Node: Equiv,  Next: Eqv,  Prev: Equ,  Up: Pseudo Ops
3426
 
3427
7.45 `.equiv SYMBOL, EXPRESSION'
3428
================================
3429
 
3430
The `.equiv' directive is like `.equ' and `.set', except that the
3431
assembler will signal an error if SYMBOL is already defined.  Note a
3432
symbol which has been referenced but not actually defined is considered
3433
to be undefined.
3434
 
3435
   Except for the contents of the error message, this is roughly
3436
equivalent to
3437
     .ifdef SYM
3438
     .err
3439
     .endif
3440
     .equ SYM,VAL
3441
   plus it protects the symbol from later redefinition.
3442
 
3443

3444
File: as.info,  Node: Eqv,  Next: Err,  Prev: Equiv,  Up: Pseudo Ops
3445
 
3446
7.46 `.eqv SYMBOL, EXPRESSION'
3447
==============================
3448
 
3449
The `.eqv' directive is like `.equiv', but no attempt is made to
3450
evaluate the expression or any part of it immediately.  Instead each
3451
time the resulting symbol is used in an expression, a snapshot of its
3452
current value is taken.
3453
 
3454

3455
File: as.info,  Node: Err,  Next: Error,  Prev: Eqv,  Up: Pseudo Ops
3456
 
3457
7.47 `.err'
3458
===========
3459
 
3460
If `as' assembles a `.err' directive, it will print an error message
3461
and, unless the `-Z' option was used, it will not generate an object
3462
file.  This can be used to signal an error in conditionally compiled
3463
code.
3464
 
3465

3466
File: as.info,  Node: Error,  Next: Exitm,  Prev: Err,  Up: Pseudo Ops
3467
 
3468
7.48 `.error "STRING"'
3469
======================
3470
 
3471
Similarly to `.err', this directive emits an error, but you can specify
3472
a string that will be emitted as the error message.  If you don't
3473
specify the message, it defaults to `".error directive invoked in
3474
source file"'.  *Note Error and Warning Messages: Errors.
3475
 
3476
      .error "This code has not been assembled and tested."
3477
 
3478

3479
File: as.info,  Node: Exitm,  Next: Extern,  Prev: Error,  Up: Pseudo Ops
3480
 
3481
7.49 `.exitm'
3482
=============
3483
 
3484
Exit early from the current macro definition.  *Note Macro::.
3485
 
3486

3487
File: as.info,  Node: Extern,  Next: Fail,  Prev: Exitm,  Up: Pseudo Ops
3488
 
3489
7.50 `.extern'
3490
==============
3491
 
3492
`.extern' is accepted in the source program--for compatibility with
3493
other assemblers--but it is ignored.  `as' treats all undefined symbols
3494
as external.
3495
 
3496

3497
File: as.info,  Node: Fail,  Next: File,  Prev: Extern,  Up: Pseudo Ops
3498
 
3499
7.51 `.fail EXPRESSION'
3500
=======================
3501
 
3502
Generates an error or a warning.  If the value of the EXPRESSION is 500
3503
or more, `as' will print a warning message.  If the value is less than
3504
500, `as' will print an error message.  The message will include the
3505
value of EXPRESSION.  This can occasionally be useful inside complex
3506
nested macros or conditional assembly.
3507
 
3508

3509
File: as.info,  Node: File,  Next: Fill,  Prev: Fail,  Up: Pseudo Ops
3510
 
3511
7.52 `.file STRING'
3512
===================
3513
 
3514
`.file' tells `as' that we are about to start a new logical file.
3515
STRING is the new file name.  In general, the filename is recognized
3516
whether or not it is surrounded by quotes `"'; but if you wish to
3517
specify an empty file name, you must give the quotes-`""'.  This
3518
statement may go away in future: it is only recognized to be compatible
3519
with old `as' programs.
3520
 
3521

3522
File: as.info,  Node: Fill,  Next: Float,  Prev: File,  Up: Pseudo Ops
3523
 
3524
7.53 `.fill REPEAT , SIZE , VALUE'
3525
==================================
3526
 
3527
REPEAT, SIZE and VALUE are absolute expressions.  This emits REPEAT
3528
copies of SIZE bytes.  REPEAT may be zero or more.  SIZE may be zero or
3529
more, but if it is more than 8, then it is deemed to have the value 8,
3530
compatible with other people's assemblers.  The contents of each REPEAT
3531
bytes is taken from an 8-byte number.  The highest order 4 bytes are
3532
zero.  The lowest order 4 bytes are VALUE rendered in the byte-order of
3533
an integer on the computer `as' is assembling for.  Each SIZE bytes in
3534
a repetition is taken from the lowest order SIZE bytes of this number.
3535
Again, this bizarre behavior is compatible with other people's
3536
assemblers.
3537
 
3538
   SIZE and VALUE are optional.  If the second comma and VALUE are
3539
absent, VALUE is assumed zero.  If the first comma and following tokens
3540
are absent, SIZE is assumed to be 1.
3541
 
3542

3543
File: as.info,  Node: Float,  Next: Func,  Prev: Fill,  Up: Pseudo Ops
3544
 
3545
7.54 `.float FLONUMS'
3546
=====================
3547
 
3548
This directive assembles zero or more flonums, separated by commas.  It
3549
has the same effect as `.single'.  The exact kind of floating point
3550
numbers emitted depends on how `as' is configured.  *Note Machine
3551
Dependencies::.
3552
 
3553

3554
File: as.info,  Node: Func,  Next: Global,  Prev: Float,  Up: Pseudo Ops
3555
 
3556
7.55 `.func NAME[,LABEL]'
3557
=========================
3558
 
3559
`.func' emits debugging information to denote function NAME, and is
3560
ignored unless the file is assembled with debugging enabled.  Only
3561
`--gstabs[+]' is currently supported.  LABEL is the entry point of the
3562
function and if omitted NAME prepended with the `leading char' is used.
3563
`leading char' is usually `_' or nothing, depending on the target.  All
3564
functions are currently defined to have `void' return type.  The
3565
function must be terminated with `.endfunc'.
3566
 
3567

3568
File: as.info,  Node: Global,  Next: Gnu_attribute,  Prev: Func,  Up: Pseudo Ops
3569
 
3570
7.56 `.global SYMBOL', `.globl SYMBOL'
3571
======================================
3572
 
3573
`.global' makes the symbol visible to `ld'.  If you define SYMBOL in
3574
your partial program, its value is made available to other partial
3575
programs that are linked with it.  Otherwise, SYMBOL takes its
3576
attributes from a symbol of the same name from another file linked into
3577
the same program.
3578
 
3579
   Both spellings (`.globl' and `.global') are accepted, for
3580
compatibility with other assemblers.
3581
 
3582
   On the HPPA, `.global' is not always enough to make it accessible to
3583
other partial programs.  You may need the HPPA-only `.EXPORT' directive
3584
as well.  *Note HPPA Assembler Directives: HPPA Directives.
3585
 
3586

3587
File: as.info,  Node: Gnu_attribute,  Next: Hidden,  Prev: Global,  Up: Pseudo Ops
3588
 
3589
7.57 `.gnu_attribute TAG,VALUE'
3590
===============================
3591
 
3592
Record a GNU object attribute for this file.  *Note Object Attributes::.
3593
 
3594

3595
File: as.info,  Node: Hidden,  Next: hword,  Prev: Gnu_attribute,  Up: Pseudo Ops
3596
 
3597
7.58 `.hidden NAMES'
3598
====================
3599
 
3600
This is one of the ELF visibility directives.  The other two are
3601
`.internal' (*note `.internal': Internal.) and `.protected' (*note
3602
`.protected': Protected.).
3603
 
3604
   This directive overrides the named symbols default visibility (which
3605
is set by their binding: local, global or weak).  The directive sets
3606
the visibility to `hidden' which means that the symbols are not visible
3607
to other components.  Such symbols are always considered to be
3608
`protected' as well.
3609
 
3610

3611
File: as.info,  Node: hword,  Next: Ident,  Prev: Hidden,  Up: Pseudo Ops
3612
 
3613
7.59 `.hword EXPRESSIONS'
3614
=========================
3615
 
3616
This expects zero or more EXPRESSIONS, and emits a 16 bit number for
3617
each.
3618
 
3619
   This directive is a synonym for `.short'; depending on the target
3620
architecture, it may also be a synonym for `.word'.
3621
 
3622

3623
File: as.info,  Node: Ident,  Next: If,  Prev: hword,  Up: Pseudo Ops
3624
 
3625
7.60 `.ident'
3626
=============
3627
 
3628
This directive is used by some assemblers to place tags in object
3629
files.  The behavior of this directive varies depending on the target.
3630
When using the a.out object file format, `as' simply accepts the
3631
directive for source-file compatibility with existing assemblers, but
3632
does not emit anything for it.  When using COFF, comments are emitted
3633
to the `.comment' or `.rdata' section, depending on the target.  When
3634
using ELF, comments are emitted to the `.comment' section.
3635
 
3636

3637
File: as.info,  Node: If,  Next: Incbin,  Prev: Ident,  Up: Pseudo Ops
3638
 
3639
7.61 `.if ABSOLUTE EXPRESSION'
3640
==============================
3641
 
3642
`.if' marks the beginning of a section of code which is only considered
3643
part of the source program being assembled if the argument (which must
3644
be an ABSOLUTE EXPRESSION) is non-zero.  The end of the conditional
3645
section of code must be marked by `.endif' (*note `.endif': Endif.);
3646
optionally, you may include code for the alternative condition, flagged
3647
by `.else' (*note `.else': Else.).  If you have several conditions to
3648
check, `.elseif' may be used to avoid nesting blocks if/else within
3649
each subsequent `.else' block.
3650
 
3651
   The following variants of `.if' are also supported:
3652
`.ifdef SYMBOL'
3653
     Assembles the following section of code if the specified SYMBOL
3654
     has been defined.  Note a symbol which has been referenced but not
3655
     yet defined is considered to be undefined.
3656
 
3657
`.ifb TEXT'
3658
     Assembles the following section of code if the operand is blank
3659
     (empty).
3660
 
3661
`.ifc STRING1,STRING2'
3662
     Assembles the following section of code if the two strings are the
3663
     same.  The strings may be optionally quoted with single quotes.
3664
     If they are not quoted, the first string stops at the first comma,
3665
     and the second string stops at the end of the line.  Strings which
3666
     contain whitespace should be quoted.  The string comparison is
3667
     case sensitive.
3668
 
3669
`.ifeq ABSOLUTE EXPRESSION'
3670
     Assembles the following section of code if the argument is zero.
3671
 
3672
`.ifeqs STRING1,STRING2'
3673
     Another form of `.ifc'.  The strings must be quoted using double
3674
     quotes.
3675
 
3676
`.ifge ABSOLUTE EXPRESSION'
3677
     Assembles the following section of code if the argument is greater
3678
     than or equal to zero.
3679
 
3680
`.ifgt ABSOLUTE EXPRESSION'
3681
     Assembles the following section of code if the argument is greater
3682
     than zero.
3683
 
3684
`.ifle ABSOLUTE EXPRESSION'
3685
     Assembles the following section of code if the argument is less
3686
     than or equal to zero.
3687
 
3688
`.iflt ABSOLUTE EXPRESSION'
3689
     Assembles the following section of code if the argument is less
3690
     than zero.
3691
 
3692
`.ifnb TEXT'
3693
     Like `.ifb', but the sense of the test is reversed: this assembles
3694
     the following section of code if the operand is non-blank
3695
     (non-empty).
3696
 
3697
`.ifnc STRING1,STRING2.'
3698
     Like `.ifc', but the sense of the test is reversed: this assembles
3699
     the following section of code if the two strings are not the same.
3700
 
3701
`.ifndef SYMBOL'
3702
`.ifnotdef SYMBOL'
3703
     Assembles the following section of code if the specified SYMBOL
3704
     has not been defined.  Both spelling variants are equivalent.
3705
     Note a symbol which has been referenced but not yet defined is
3706
     considered to be undefined.
3707
 
3708
`.ifne ABSOLUTE EXPRESSION'
3709
     Assembles the following section of code if the argument is not
3710
     equal to zero (in other words, this is equivalent to `.if').
3711
 
3712
`.ifnes STRING1,STRING2'
3713
     Like `.ifeqs', but the sense of the test is reversed: this
3714
     assembles the following section of code if the two strings are not
3715
     the same.
3716
 
3717

3718
File: as.info,  Node: Incbin,  Next: Include,  Prev: If,  Up: Pseudo Ops
3719
 
3720
7.62 `.incbin "FILE"[,SKIP[,COUNT]]'
3721
====================================
3722
 
3723
The `incbin' directive includes FILE verbatim at the current location.
3724
You can control the search paths used with the `-I' command-line option
3725
(*note Command-Line Options: Invoking.).  Quotation marks are required
3726
around FILE.
3727
 
3728
   The SKIP argument skips a number of bytes from the start of the
3729
FILE.  The COUNT argument indicates the maximum number of bytes to
3730
read.  Note that the data is not aligned in any way, so it is the user's
3731
responsibility to make sure that proper alignment is provided both
3732
before and after the `incbin' directive.
3733
 
3734

3735
File: as.info,  Node: Include,  Next: Int,  Prev: Incbin,  Up: Pseudo Ops
3736
 
3737
7.63 `.include "FILE"'
3738
======================
3739
 
3740
This directive provides a way to include supporting files at specified
3741
points in your source program.  The code from FILE is assembled as if
3742
it followed the point of the `.include'; when the end of the included
3743
file is reached, assembly of the original file continues.  You can
3744
control the search paths used with the `-I' command-line option (*note
3745
Command-Line Options: Invoking.).  Quotation marks are required around
3746
FILE.
3747
 
3748

3749
File: as.info,  Node: Int,  Next: Internal,  Prev: Include,  Up: Pseudo Ops
3750
 
3751
7.64 `.int EXPRESSIONS'
3752
=======================
3753
 
3754
Expect zero or more EXPRESSIONS, of any section, separated by commas.
3755
For each expression, emit a number that, at run time, is the value of
3756
that expression.  The byte order and bit size of the number depends on
3757
what kind of target the assembly is for.
3758
 
3759

3760
File: as.info,  Node: Internal,  Next: Irp,  Prev: Int,  Up: Pseudo Ops
3761
 
3762
7.65 `.internal NAMES'
3763
======================
3764
 
3765
This is one of the ELF visibility directives.  The other two are
3766
`.hidden' (*note `.hidden': Hidden.) and `.protected' (*note
3767
`.protected': Protected.).
3768
 
3769
   This directive overrides the named symbols default visibility (which
3770
is set by their binding: local, global or weak).  The directive sets
3771
the visibility to `internal' which means that the symbols are
3772
considered to be `hidden' (i.e., not visible to other components), and
3773
that some extra, processor specific processing must also be performed
3774
upon the  symbols as well.
3775
 
3776

3777
File: as.info,  Node: Irp,  Next: Irpc,  Prev: Internal,  Up: Pseudo Ops
3778
 
3779
7.66 `.irp SYMBOL,VALUES'...
3780
============================
3781
 
3782
Evaluate a sequence of statements assigning different values to SYMBOL.
3783
The sequence of statements starts at the `.irp' directive, and is
3784
terminated by an `.endr' directive.  For each VALUE, SYMBOL is set to
3785
VALUE, and the sequence of statements is assembled.  If no VALUE is
3786
listed, the sequence of statements is assembled once, with SYMBOL set
3787
to the null string.  To refer to SYMBOL within the sequence of
3788
statements, use \SYMBOL.
3789
 
3790
   For example, assembling
3791
 
3792
             .irp    param,1,2,3
3793
             move    d\param,sp@-
3794
             .endr
3795
 
3796
   is equivalent to assembling
3797
 
3798
             move    d1,sp@-
3799
             move    d2,sp@-
3800
             move    d3,sp@-
3801
 
3802
   For some caveats with the spelling of SYMBOL, see also *Note Macro::.
3803
 
3804

3805
File: as.info,  Node: Irpc,  Next: Lcomm,  Prev: Irp,  Up: Pseudo Ops
3806
 
3807
7.67 `.irpc SYMBOL,VALUES'...
3808
=============================
3809
 
3810
Evaluate a sequence of statements assigning different values to SYMBOL.
3811
The sequence of statements starts at the `.irpc' directive, and is
3812
terminated by an `.endr' directive.  For each character in VALUE,
3813
SYMBOL is set to the character, and the sequence of statements is
3814
assembled.  If no VALUE is listed, the sequence of statements is
3815
assembled once, with SYMBOL set to the null string.  To refer to SYMBOL
3816
within the sequence of statements, use \SYMBOL.
3817
 
3818
   For example, assembling
3819
 
3820
             .irpc    param,123
3821
             move    d\param,sp@-
3822
             .endr
3823
 
3824
   is equivalent to assembling
3825
 
3826
             move    d1,sp@-
3827
             move    d2,sp@-
3828
             move    d3,sp@-
3829
 
3830
   For some caveats with the spelling of SYMBOL, see also the discussion
3831
at *Note Macro::.
3832
 
3833

3834
File: as.info,  Node: Lcomm,  Next: Lflags,  Prev: Irpc,  Up: Pseudo Ops
3835
 
3836
7.68 `.lcomm SYMBOL , LENGTH'
3837
=============================
3838
 
3839
Reserve LENGTH (an absolute expression) bytes for a local common
3840
denoted by SYMBOL.  The section and value of SYMBOL are those of the
3841
new local common.  The addresses are allocated in the bss section, so
3842
that at run-time the bytes start off zeroed.  SYMBOL is not declared
3843
global (*note `.global': Global.), so is normally not visible to `ld'.
3844
 
3845
   Some targets permit a third argument to be used with `.lcomm'.  This
3846
argument specifies the desired alignment of the symbol in the bss
3847
section.
3848
 
3849
   The syntax for `.lcomm' differs slightly on the HPPA.  The syntax is
3850
`SYMBOL .lcomm, LENGTH'; SYMBOL is optional.
3851
 
3852

3853
File: as.info,  Node: Lflags,  Next: Line,  Prev: Lcomm,  Up: Pseudo Ops
3854
 
3855
7.69 `.lflags'
3856
==============
3857
 
3858
`as' accepts this directive, for compatibility with other assemblers,
3859
but ignores it.
3860
 
3861

3862
File: as.info,  Node: Line,  Next: Linkonce,  Prev: Lflags,  Up: Pseudo Ops
3863
 
3864
7.70 `.line LINE-NUMBER'
3865
========================
3866
 
3867
   Change the logical line number.  LINE-NUMBER must be an absolute
3868
expression.  The next line has that logical line number.  Therefore any
3869
other statements on the current line (after a statement separator
3870
character) are reported as on logical line number LINE-NUMBER - 1.  One
3871
day `as' will no longer support this directive: it is recognized only
3872
for compatibility with existing assembler programs.
3873
 
3874
   Even though this is a directive associated with the `a.out' or
3875
`b.out' object-code formats, `as' still recognizes it when producing
3876
COFF output, and treats `.line' as though it were the COFF `.ln' _if_
3877
it is found outside a `.def'/`.endef' pair.
3878
 
3879
   Inside a `.def', `.line' is, instead, one of the directives used by
3880
compilers to generate auxiliary symbol information for debugging.
3881
 
3882

3883
File: as.info,  Node: Linkonce,  Next: List,  Prev: Line,  Up: Pseudo Ops
3884
 
3885
7.71 `.linkonce [TYPE]'
3886
=======================
3887
 
3888
Mark the current section so that the linker only includes a single copy
3889
of it.  This may be used to include the same section in several
3890
different object files, but ensure that the linker will only include it
3891
once in the final output file.  The `.linkonce' pseudo-op must be used
3892
for each instance of the section.  Duplicate sections are detected
3893
based on the section name, so it should be unique.
3894
 
3895
   This directive is only supported by a few object file formats; as of
3896
this writing, the only object file format which supports it is the
3897
Portable Executable format used on Windows NT.
3898
 
3899
   The TYPE argument is optional.  If specified, it must be one of the
3900
following strings.  For example:
3901
     .linkonce same_size
3902
   Not all types may be supported on all object file formats.
3903
 
3904
`discard'
3905
     Silently discard duplicate sections.  This is the default.
3906
 
3907
`one_only'
3908
     Warn if there are duplicate sections, but still keep only one copy.
3909
 
3910
`same_size'
3911
     Warn if any of the duplicates have different sizes.
3912
 
3913
`same_contents'
3914
     Warn if any of the duplicates do not have exactly the same
3915
     contents.
3916
 
3917

3918
File: as.info,  Node: Ln,  Next: LNS directives,  Prev: List,  Up: Pseudo Ops
3919
 
3920
7.72 `.ln LINE-NUMBER'
3921
======================
3922
 
3923
`.ln' is a synonym for `.line'.
3924
 
3925

3926
File: as.info,  Node: MRI,  Next: Noaltmacro,  Prev: Macro,  Up: Pseudo Ops
3927
 
3928
7.73 `.mri VAL'
3929
===============
3930
 
3931
If VAL is non-zero, this tells `as' to enter MRI mode.  If VAL is zero,
3932
this tells `as' to exit MRI mode.  This change affects code assembled
3933
until the next `.mri' directive, or until the end of the file.  *Note
3934
MRI mode: M.
3935
 
3936

3937
File: as.info,  Node: List,  Next: Ln,  Prev: Linkonce,  Up: Pseudo Ops
3938
 
3939
7.74 `.list'
3940
============
3941
 
3942
Control (in conjunction with the `.nolist' directive) whether or not
3943
assembly listings are generated.  These two directives maintain an
3944
internal counter (which is zero initially).   `.list' increments the
3945
counter, and `.nolist' decrements it.  Assembly listings are generated
3946
whenever the counter is greater than zero.
3947
 
3948
   By default, listings are disabled.  When you enable them (with the
3949
`-a' command line option; *note Command-Line Options: Invoking.), the
3950
initial value of the listing counter is one.
3951
 
3952

3953
File: as.info,  Node: Long,  Next: Macro,  Prev: LNS directives,  Up: Pseudo Ops
3954
 
3955
7.75 `.long EXPRESSIONS'
3956
========================
3957
 
3958
`.long' is the same as `.int'.  *Note `.int': Int.
3959
 
3960

3961
File: as.info,  Node: Macro,  Next: MRI,  Prev: Long,  Up: Pseudo Ops
3962
 
3963
7.76 `.macro'
3964
=============
3965
 
3966
The commands `.macro' and `.endm' allow you to define macros that
3967
generate assembly output.  For example, this definition specifies a
3968
macro `sum' that puts a sequence of numbers into memory:
3969
 
3970
             .macro  sum from=0, to=5
3971
             .long   \from
3972
             .if     \to-\from
3973
             sum     "(\from+1)",\to
3974
             .endif
3975
             .endm
3976
 
3977
With that definition, `SUM 0,5' is equivalent to this assembly input:
3978
 
3979
             .long   0
3980
             .long   1
3981
             .long   2
3982
             .long   3
3983
             .long   4
3984
             .long   5
3985
 
3986
`.macro MACNAME'
3987
`.macro MACNAME MACARGS ...'
3988
     Begin the definition of a macro called MACNAME.  If your macro
3989
     definition requires arguments, specify their names after the macro
3990
     name, separated by commas or spaces.  You can qualify the macro
3991
     argument to indicate whether all invocations must specify a
3992
     non-blank value (through `:`req''), or whether it takes all of the
3993
     remaining arguments (through `:`vararg'').  You can supply a
3994
     default value for any macro argument by following the name with
3995
     `=DEFLT'.  You cannot define two macros with the same MACNAME
3996
     unless it has been subject to the `.purgem' directive (*note
3997
     Purgem::) between the two definitions.  For example, these are all
3998
     valid `.macro' statements:
3999
 
4000
    `.macro comm'
4001
          Begin the definition of a macro called `comm', which takes no
4002
          arguments.
4003
 
4004
    `.macro plus1 p, p1'
4005
    `.macro plus1 p p1'
4006
          Either statement begins the definition of a macro called
4007
          `plus1', which takes two arguments; within the macro
4008
          definition, write `\p' or `\p1' to evaluate the arguments.
4009
 
4010
    `.macro reserve_str p1=0 p2'
4011
          Begin the definition of a macro called `reserve_str', with two
4012
          arguments.  The first argument has a default value, but not
4013
          the second.  After the definition is complete, you can call
4014
          the macro either as `reserve_str A,B' (with `\p1' evaluating
4015
          to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
4016
          `\p1' evaluating as the default, in this case `0', and `\p2'
4017
          evaluating to B).
4018
 
4019
    `.macro m p1:req, p2=0, p3:vararg'
4020
          Begin the definition of a macro called `m', with at least
4021
          three arguments.  The first argument must always have a value
4022
          specified, but not the second, which instead has a default
4023
          value. The third formal will get assigned all remaining
4024
          arguments specified at invocation time.
4025
 
4026
          When you call a macro, you can specify the argument values
4027
          either by position, or by keyword.  For example, `sum 9,17'
4028
          is equivalent to `sum to=17, from=9'.
4029
 
4030
 
4031
     Note that since each of the MACARGS can be an identifier exactly
4032
     as any other one permitted by the target architecture, there may be
4033
     occasional problems if the target hand-crafts special meanings to
4034
     certain characters when they occur in a special position.  For
4035
     example, if the colon (`:') is generally permitted to be part of a
4036
     symbol name, but the architecture specific code special-cases it
4037
     when occurring as the final character of a symbol (to denote a
4038
     label), then the macro parameter replacement code will have no way
4039
     of knowing that and consider the whole construct (including the
4040
     colon) an identifier, and check only this identifier for being the
4041
     subject to parameter substitution.  So for example this macro
4042
     definition:
4043
 
4044
                .macro label l
4045
          \l:
4046
                .endm
4047
 
4048
     might not work as expected.  Invoking `label foo' might not create
4049
     a label called `foo' but instead just insert the text `\l:' into
4050
     the assembler source, probably generating an error about an
4051
     unrecognised identifier.
4052
 
4053
     Similarly problems might occur with the period character (`.')
4054
     which is often allowed inside opcode names (and hence identifier
4055
     names).  So for example constructing a macro to build an opcode
4056
     from a base name and a length specifier like this:
4057
 
4058
                .macro opcode base length
4059
                  \base.\length
4060
                .endm
4061
 
4062
     and invoking it as `opcode store l' will not create a `store.l'
4063
     instruction but instead generate some kind of error as the
4064
     assembler tries to interpret the text `\base.\length'.
4065
 
4066
     There are several possible ways around this problem:
4067
 
4068
    `Insert white space'
4069
          If it is possible to use white space characters then this is
4070
          the simplest solution.  eg:
4071
 
4072
                .macro label l
4073
               \l :
4074
                .endm
4075
 
4076
    `Use `\()''
4077
          The string `\()' can be used to separate the end of a macro
4078
          argument from the following text.  eg:
4079
 
4080
                .macro opcode base length
4081
                       \base\().\length
4082
                .endm
4083
 
4084
    `Use the alternate macro syntax mode'
4085
          In the alternative macro syntax mode the ampersand character
4086
          (`&') can be used as a separator.  eg:
4087
 
4088
                .altmacro
4089
                .macro label l
4090
               l&:
4091
                .endm
4092
 
4093
     Note: this problem of correctly identifying string parameters to
4094
     pseudo ops also applies to the identifiers used in `.irp' (*note
4095
     Irp::) and `.irpc' (*note Irpc::) as well.
4096
 
4097
`.endm'
4098
     Mark the end of a macro definition.
4099
 
4100
`.exitm'
4101
     Exit early from the current macro definition.
4102
 
4103
`\@'
4104
     `as' maintains a counter of how many macros it has executed in
4105
     this pseudo-variable; you can copy that number to your output with
4106
     `\@', but _only within a macro definition_.
4107
 
4108
`LOCAL NAME [ , ... ]'
4109
     _Warning: `LOCAL' is only available if you select "alternate macro
4110
     syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro':
4111
     Altmacro.
4112
 
4113

4114
File: as.info,  Node: Altmacro,  Next: Ascii,  Prev: Align,  Up: Pseudo Ops
4115
 
4116
7.77 `.altmacro'
4117
================
4118
 
4119
Enable alternate macro mode, enabling:
4120
 
4121
`LOCAL NAME [ , ... ]'
4122
     One additional directive, `LOCAL', is available.  It is used to
4123
     generate a string replacement for each of the NAME arguments, and
4124
     replace any instances of NAME in each macro expansion.  The
4125
     replacement string is unique in the assembly, and different for
4126
     each separate macro expansion.  `LOCAL' allows you to write macros
4127
     that define symbols, without fear of conflict between separate
4128
     macro expansions.
4129
 
4130
`String delimiters'
4131
     You can write strings delimited in these other ways besides
4132
     `"STRING"':
4133
 
4134
    `'STRING''
4135
          You can delimit strings with single-quote characters.
4136
 
4137
    `'
4138
          You can delimit strings with matching angle brackets.
4139
 
4140
`single-character string escape'
4141
     To include any single character literally in a string (even if the
4142
     character would otherwise have some special meaning), you can
4143
     prefix the character with `!' (an exclamation mark).  For example,
4144
     you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 >
4145
     5.4!'.
4146
 
4147
`Expression results as strings'
4148
     You can write `%EXPR' to evaluate the expression EXPR and use the
4149
     result as a string.
4150
 
4151

4152
File: as.info,  Node: Noaltmacro,  Next: Nolist,  Prev: MRI,  Up: Pseudo Ops
4153
 
4154
7.78 `.noaltmacro'
4155
==================
4156
 
4157
Disable alternate macro mode.  *Note Altmacro::.
4158
 
4159

4160
File: as.info,  Node: Nolist,  Next: Octa,  Prev: Noaltmacro,  Up: Pseudo Ops
4161
 
4162
7.79 `.nolist'
4163
==============
4164
 
4165
Control (in conjunction with the `.list' directive) whether or not
4166
assembly listings are generated.  These two directives maintain an
4167
internal counter (which is zero initially).   `.list' increments the
4168
counter, and `.nolist' decrements it.  Assembly listings are generated
4169
whenever the counter is greater than zero.
4170
 
4171

4172
File: as.info,  Node: Octa,  Next: Org,  Prev: Nolist,  Up: Pseudo Ops
4173
 
4174
7.80 `.octa BIGNUMS'
4175
====================
4176
 
4177
This directive expects zero or more bignums, separated by commas.  For
4178
each bignum, it emits a 16-byte integer.
4179
 
4180
   The term "octa" comes from contexts in which a "word" is two bytes;
4181
hence _octa_-word for 16 bytes.
4182
 
4183

4184
File: as.info,  Node: Org,  Next: P2align,  Prev: Octa,  Up: Pseudo Ops
4185
 
4186
7.81 `.org NEW-LC , FILL'
4187
=========================
4188
 
4189
Advance the location counter of the current section to NEW-LC.  NEW-LC
4190
is either an absolute expression or an expression with the same section
4191
as the current subsection.  That is, you can't use `.org' to cross
4192
sections: if NEW-LC has the wrong section, the `.org' directive is
4193
ignored.  To be compatible with former assemblers, if the section of
4194
NEW-LC is absolute, `as' issues a warning, then pretends the section of
4195
NEW-LC is the same as the current subsection.
4196
 
4197
   `.org' may only increase the location counter, or leave it
4198
unchanged; you cannot use `.org' to move the location counter backwards.
4199
 
4200
   Because `as' tries to assemble programs in one pass, NEW-LC may not
4201
be undefined.  If you really detest this restriction we eagerly await a
4202
chance to share your improved assembler.
4203
 
4204
   Beware that the origin is relative to the start of the section, not
4205
to the start of the subsection.  This is compatible with other people's
4206
assemblers.
4207
 
4208
   When the location counter (of the current subsection) is advanced,
4209
the intervening bytes are filled with FILL which should be an absolute
4210
expression.  If the comma and FILL are omitted, FILL defaults to zero.
4211
 
4212

4213
File: as.info,  Node: P2align,  Next: PopSection,  Prev: Org,  Up: Pseudo Ops
4214
 
4215
7.82 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
4216
================================================
4217
 
4218
Pad the location counter (in the current subsection) to a particular
4219
storage boundary.  The first expression (which must be absolute) is the
4220
number of low-order zero bits the location counter must have after
4221
advancement.  For example `.p2align 3' advances the location counter
4222
until it a multiple of 8.  If the location counter is already a
4223
multiple of 8, no change is needed.
4224
 
4225
   The second expression (also absolute) gives the fill value to be
4226
stored in the padding bytes.  It (and the comma) may be omitted.  If it
4227
is omitted, the padding bytes are normally zero.  However, on some
4228
systems, if the section is marked as containing code and the fill value
4229
is omitted, the space is filled with no-op instructions.
4230
 
4231
   The third expression is also absolute, and is also optional.  If it
4232
is present, it is the maximum number of bytes that should be skipped by
4233
this alignment directive.  If doing the alignment would require
4234
skipping more bytes than the specified maximum, then the alignment is
4235
not done at all.  You can omit the fill value (the second argument)
4236
entirely by simply using two commas after the required alignment; this
4237
can be useful if you want the alignment to be filled with no-op
4238
instructions when appropriate.
4239
 
4240
   The `.p2alignw' and `.p2alignl' directives are variants of the
4241
`.p2align' directive.  The `.p2alignw' directive treats the fill
4242
pattern as a two byte word value.  The `.p2alignl' directives treats the
4243
fill pattern as a four byte longword value.  For example, `.p2alignw
4244
2,0x368d' will align to a multiple of 4.  If it skips two bytes, they
4245
will be filled in with the value 0x368d (the exact placement of the
4246
bytes depends upon the endianness of the processor).  If it skips 1 or
4247
3 bytes, the fill value is undefined.
4248
 
4249

4250
File: as.info,  Node: Previous,  Next: Print,  Prev: PopSection,  Up: Pseudo Ops
4251
 
4252
7.83 `.previous'
4253
================
4254
 
4255
This is one of the ELF section stack manipulation directives.  The
4256
others are `.section' (*note Section::), `.subsection' (*note
4257
SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
4258
(*note PopSection::).
4259
 
4260
   This directive swaps the current section (and subsection) with most
4261
recently referenced section/subsection pair prior to this one.  Multiple
4262
`.previous' directives in a row will flip between two sections (and
4263
their subsections).  For example:
4264
 
4265
     .section A
4266
      .subsection 1
4267
       .word 0x1234
4268
      .subsection 2
4269
       .word 0x5678
4270
     .previous
4271
      .word 0x9abc
4272
 
4273
   Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into
4274
subsection 2 of section A.  Whilst:
4275
 
4276
     .section A
4277
     .subsection 1
4278
       # Now in section A subsection 1
4279
       .word 0x1234
4280
     .section B
4281
     .subsection 0
4282
       # Now in section B subsection 0
4283
       .word 0x5678
4284
     .subsection 1
4285
       # Now in section B subsection 1
4286
       .word 0x9abc
4287
     .previous
4288
       # Now in section B subsection 0
4289
       .word 0xdef0
4290
 
4291
   Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection
4292
 
4293
 
4294
   In terms of the section stack, this directive swaps the current
4295
section with the top section on the section stack.
4296
 
4297

4298
File: as.info,  Node: PopSection,  Next: Previous,  Prev: P2align,  Up: Pseudo Ops
4299
 
4300
7.84 `.popsection'
4301
==================
4302
 
4303
This is one of the ELF section stack manipulation directives.  The
4304
others are `.section' (*note Section::), `.subsection' (*note
4305
SubSection::), `.pushsection' (*note PushSection::), and `.previous'
4306
(*note Previous::).
4307
 
4308
   This directive replaces the current section (and subsection) with
4309
the top section (and subsection) on the section stack.  This section is
4310
popped off the stack.
4311
 
4312

4313
File: as.info,  Node: Print,  Next: Protected,  Prev: Previous,  Up: Pseudo Ops
4314
 
4315
7.85 `.print STRING'
4316
====================
4317
 
4318
`as' will print STRING on the standard output during assembly.  You
4319
must put STRING in double quotes.
4320
 
4321

4322
File: as.info,  Node: Protected,  Next: Psize,  Prev: Print,  Up: Pseudo Ops
4323
 
4324
7.86 `.protected NAMES'
4325
=======================
4326
 
4327
This is one of the ELF visibility directives.  The other two are
4328
`.hidden' (*note Hidden::) and `.internal' (*note Internal::).
4329
 
4330
   This directive overrides the named symbols default visibility (which
4331
is set by their binding: local, global or weak).  The directive sets
4332
the visibility to `protected' which means that any references to the
4333
symbols from within the components that defines them must be resolved
4334
to the definition in that component, even if a definition in another
4335
component would normally preempt this.
4336
 
4337

4338
File: as.info,  Node: Psize,  Next: Purgem,  Prev: Protected,  Up: Pseudo Ops
4339
 
4340
7.87 `.psize LINES , COLUMNS'
4341
=============================
4342
 
4343
Use this directive to declare the number of lines--and, optionally, the
4344
number of columns--to use for each page, when generating listings.
4345
 
4346
   If you do not use `.psize', listings use a default line-count of 60.
4347
You may omit the comma and COLUMNS specification; the default width is
4348
200 columns.
4349
 
4350
   `as' generates formfeeds whenever the specified number of lines is
4351
exceeded (or whenever you explicitly request one, using `.eject').
4352
 
4353
   If you specify LINES as `0', no formfeeds are generated save those
4354
explicitly specified with `.eject'.
4355
 
4356

4357
File: as.info,  Node: Purgem,  Next: PushSection,  Prev: Psize,  Up: Pseudo Ops
4358
 
4359
7.88 `.purgem NAME'
4360
===================
4361
 
4362
Undefine the macro NAME, so that later uses of the string will not be
4363
expanded.  *Note Macro::.
4364
 
4365

4366
File: as.info,  Node: PushSection,  Next: Quad,  Prev: Purgem,  Up: Pseudo Ops
4367
 
4368
7.89 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]'
4369
========================================================================
4370
 
4371
This is one of the ELF section stack manipulation directives.  The
4372
others are `.section' (*note Section::), `.subsection' (*note
4373
SubSection::), `.popsection' (*note PopSection::), and `.previous'
4374
(*note Previous::).
4375
 
4376
   This directive pushes the current section (and subsection) onto the
4377
top of the section stack, and then replaces the current section and
4378
subsection with `name' and `subsection'. The optional `flags', `type'
4379
and `arguments' are treated the same as in the `.section' (*note
4380
Section::) directive.
4381
 
4382

4383
File: as.info,  Node: Quad,  Next: Reloc,  Prev: PushSection,  Up: Pseudo Ops
4384
 
4385
7.90 `.quad BIGNUMS'
4386
====================
4387
 
4388
`.quad' expects zero or more bignums, separated by commas.  For each
4389
bignum, it emits an 8-byte integer.  If the bignum won't fit in 8
4390
bytes, it prints a warning message; and just takes the lowest order 8
4391
bytes of the bignum.
4392
 
4393
   The term "quad" comes from contexts in which a "word" is two bytes;
4394
hence _quad_-word for 8 bytes.
4395
 
4396

4397
File: as.info,  Node: Reloc,  Next: Rept,  Prev: Quad,  Up: Pseudo Ops
4398
 
4399
7.91 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
4400
==============================================
4401
 
4402
Generate a relocation at OFFSET of type RELOC_NAME with value
4403
EXPRESSION.  If OFFSET is a number, the relocation is generated in the
4404
current section.  If OFFSET is an expression that resolves to a symbol
4405
plus offset, the relocation is generated in the given symbol's section.
4406
EXPRESSION, if present, must resolve to a symbol plus addend or to an
4407
absolute value, but note that not all targets support an addend.  e.g.
4408
ELF REL targets such as i386 store an addend in the section contents
4409
rather than in the relocation.  This low level interface does not
4410
support addends stored in the section.
4411
 
4412

4413
File: as.info,  Node: Rept,  Next: Sbttl,  Prev: Reloc,  Up: Pseudo Ops
4414
 
4415
7.92 `.rept COUNT'
4416
==================
4417
 
4418
Repeat the sequence of lines between the `.rept' directive and the next
4419
`.endr' directive COUNT times.
4420
 
4421
   For example, assembling
4422
 
4423
             .rept   3
4424
             .long   0
4425
             .endr
4426
 
4427
   is equivalent to assembling
4428
 
4429
             .long   0
4430
             .long   0
4431
             .long   0
4432
 
4433

4434
File: as.info,  Node: Sbttl,  Next: Scl,  Prev: Rept,  Up: Pseudo Ops
4435
 
4436
7.93 `.sbttl "SUBHEADING"'
4437
==========================
4438
 
4439
Use SUBHEADING as the title (third line, immediately after the title
4440
line) when generating assembly listings.
4441
 
4442
   This directive affects subsequent pages, as well as the current page
4443
if it appears within ten lines of the top of a page.
4444
 
4445

4446
File: as.info,  Node: Scl,  Next: Section,  Prev: Sbttl,  Up: Pseudo Ops
4447
 
4448
7.94 `.scl CLASS'
4449
=================
4450
 
4451
Set the storage-class value for a symbol.  This directive may only be
4452
used inside a `.def'/`.endef' pair.  Storage class may flag whether a
4453
symbol is static or external, or it may record further symbolic
4454
debugging information.
4455
 
4456

4457
File: as.info,  Node: Section,  Next: Set,  Prev: Scl,  Up: Pseudo Ops
4458
 
4459
7.95 `.section NAME'
4460
====================
4461
 
4462
Use the `.section' directive to assemble the following code into a
4463
section named NAME.
4464
 
4465
   This directive is only supported for targets that actually support
4466
arbitrarily named sections; on `a.out' targets, for example, it is not
4467
accepted, even with a standard `a.out' section name.
4468
 
4469
COFF Version
4470
------------
4471
 
4472
   For COFF targets, the `.section' directive is used in one of the
4473
following ways:
4474
 
4475
     .section NAME[, "FLAGS"]
4476
     .section NAME[, SUBSECTION]
4477
 
4478
   If the optional argument is quoted, it is taken as flags to use for
4479
the section.  Each flag is a single character.  The following flags are
4480
recognized:
4481
`b'
4482
     bss section (uninitialized data)
4483
 
4484
`n'
4485
     section is not loaded
4486
 
4487
`w'
4488
     writable section
4489
 
4490
`d'
4491
     data section
4492
 
4493
`r'
4494
     read-only section
4495
 
4496
`x'
4497
     executable section
4498
 
4499
`s'
4500
     shared section (meaningful for PE targets)
4501
 
4502
`a'
4503
     ignored.  (For compatibility with the ELF version)
4504
 
4505
   If no flags are specified, the default flags depend upon the section
4506
name.  If the section name is not recognized, the default will be for
4507
the section to be loaded and writable.  Note the `n' and `w' flags
4508
remove attributes from the section, rather than adding them, so if they
4509
are used on their own it will be as if no flags had been specified at
4510
all.
4511
 
4512
   If the optional argument to the `.section' directive is not quoted,
4513
it is taken as a subsection number (*note Sub-Sections::).
4514
 
4515
ELF Version
4516
-----------
4517
 
4518
   This is one of the ELF section stack manipulation directives.  The
4519
others are `.subsection' (*note SubSection::), `.pushsection' (*note
4520
PushSection::), `.popsection' (*note PopSection::), and `.previous'
4521
(*note Previous::).
4522
 
4523
   For ELF targets, the `.section' directive is used like this:
4524
 
4525
     .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]]
4526
 
4527
   The optional FLAGS argument is a quoted string which may contain any
4528
combination of the following characters:
4529
`a'
4530
     section is allocatable
4531
 
4532
`w'
4533
     section is writable
4534
 
4535
`x'
4536
     section is executable
4537
 
4538
`M'
4539
     section is mergeable
4540
 
4541
`S'
4542
     section contains zero terminated strings
4543
 
4544
`G'
4545
     section is a member of a section group
4546
 
4547
`T'
4548
     section is used for thread-local-storage
4549
 
4550
   The optional TYPE argument may contain one of the following
4551
constants:
4552
`@progbits'
4553
     section contains data
4554
 
4555
`@nobits'
4556
     section does not contain data (i.e., section only occupies space)
4557
 
4558
`@note'
4559
     section contains data which is used by things other than the
4560
     program
4561
 
4562
`@init_array'
4563
     section contains an array of pointers to init functions
4564
 
4565
`@fini_array'
4566
     section contains an array of pointers to finish functions
4567
 
4568
`@preinit_array'
4569
     section contains an array of pointers to pre-init functions
4570
 
4571
   Many targets only support the first three section types.
4572
 
4573
   Note on targets where the `@' character is the start of a comment (eg
4574
ARM) then another character is used instead.  For example the ARM port
4575
uses the `%' character.
4576
 
4577
   If FLAGS contains the `M' symbol then the TYPE argument must be
4578
specified as well as an extra argument--ENTSIZE--like this:
4579
 
4580
     .section NAME , "FLAGS"M, @TYPE, ENTSIZE
4581
 
4582
   Sections with the `M' flag but not `S' flag must contain fixed size
4583
constants, each ENTSIZE octets long. Sections with both `M' and `S'
4584
must contain zero terminated strings where each character is ENTSIZE
4585
bytes long. The linker may remove duplicates within sections with the
4586
same name, same entity size and same flags.  ENTSIZE must be an
4587
absolute expression.
4588
 
4589
   If FLAGS contains the `G' symbol then the TYPE argument must be
4590
present along with an additional field like this:
4591
 
4592
     .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE]
4593
 
4594
   The GROUPNAME field specifies the name of the section group to which
4595
this particular section belongs.  The optional linkage field can
4596
contain:
4597
`comdat'
4598
     indicates that only one copy of this section should be retained
4599
 
4600
`.gnu.linkonce'
4601
     an alias for comdat
4602
 
4603
   Note: if both the M and G flags are present then the fields for the
4604
Merge flag should come first, like this:
4605
 
4606
     .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE]
4607
 
4608
   If no flags are specified, the default flags depend upon the section
4609
name.  If the section name is not recognized, the default will be for
4610
the section to have none of the above flags: it will not be allocated
4611
in memory, nor writable, nor executable.  The section will contain data.
4612
 
4613
   For ELF targets, the assembler supports another type of `.section'
4614
directive for compatibility with the Solaris assembler:
4615
 
4616
     .section "NAME"[, FLAGS...]
4617
 
4618
   Note that the section name is quoted.  There may be a sequence of
4619
comma separated flags:
4620
`#alloc'
4621
     section is allocatable
4622
 
4623
`#write'
4624
     section is writable
4625
 
4626
`#execinstr'
4627
     section is executable
4628
 
4629
`#tls'
4630
     section is used for thread local storage
4631
 
4632
   This directive replaces the current section and subsection.  See the
4633
contents of the gas testsuite directory `gas/testsuite/gas/elf' for
4634
some examples of how this directive and the other section stack
4635
directives work.
4636
 
4637

4638
File: as.info,  Node: Set,  Next: Short,  Prev: Section,  Up: Pseudo Ops
4639
 
4640
7.96 `.set SYMBOL, EXPRESSION'
4641
==============================
4642
 
4643
Set the value of SYMBOL to EXPRESSION.  This changes SYMBOL's value and
4644
type to conform to EXPRESSION.  If SYMBOL was flagged as external, it
4645
remains flagged (*note Symbol Attributes::).
4646
 
4647
   You may `.set' a symbol many times in the same assembly.
4648
 
4649
   If you `.set' a global symbol, the value stored in the object file
4650
is the last value stored into it.
4651
 
4652
   The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'.
4653
 
4654
   On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION'
4655
instead.
4656
 
4657

4658
File: as.info,  Node: Short,  Next: Single,  Prev: Set,  Up: Pseudo Ops
4659
 
4660
7.97 `.short EXPRESSIONS'
4661
=========================
4662
 
4663
`.short' is normally the same as `.word'.  *Note `.word': Word.
4664
 
4665
   In some configurations, however, `.short' and `.word' generate
4666
numbers of different lengths.  *Note Machine Dependencies::.
4667
 
4668

4669
File: as.info,  Node: Single,  Next: Size,  Prev: Short,  Up: Pseudo Ops
4670
 
4671
7.98 `.single FLONUMS'
4672
======================
4673
 
4674
This directive assembles zero or more flonums, separated by commas.  It
4675
has the same effect as `.float'.  The exact kind of floating point
4676
numbers emitted depends on how `as' is configured.  *Note Machine
4677
Dependencies::.
4678
 
4679

4680
File: as.info,  Node: Size,  Next: Skip,  Prev: Single,  Up: Pseudo Ops
4681
 
4682
7.99 `.size'
4683
============
4684
 
4685
This directive is used to set the size associated with a symbol.
4686
 
4687
COFF Version
4688
------------
4689
 
4690
   For COFF targets, the `.size' directive is only permitted inside
4691
`.def'/`.endef' pairs.  It is used like this:
4692
 
4693
     .size EXPRESSION
4694
 
4695
ELF Version
4696
-----------
4697
 
4698
   For ELF targets, the `.size' directive is used like this:
4699
 
4700
     .size NAME , EXPRESSION
4701
 
4702
   This directive sets the size associated with a symbol NAME.  The
4703
size in bytes is computed from EXPRESSION which can make use of label
4704
arithmetic.  This directive is typically used to set the size of
4705
function symbols.
4706
 
4707

4708
File: as.info,  Node: Sleb128,  Next: Space,  Prev: Skip,  Up: Pseudo Ops
4709
 
4710
7.100 `.sleb128 EXPRESSIONS'
4711
============================
4712
 
4713
SLEB128 stands for "signed little endian base 128."  This is a compact,
4714
variable length representation of numbers used by the DWARF symbolic
4715
debugging format.  *Note `.uleb128': Uleb128.
4716
 
4717

4718
File: as.info,  Node: Skip,  Next: Sleb128,  Prev: Size,  Up: Pseudo Ops
4719
 
4720
7.101 `.skip SIZE , FILL'
4721
=========================
4722
 
4723
This directive emits SIZE bytes, each of value FILL.  Both SIZE and
4724
FILL are absolute expressions.  If the comma and FILL are omitted, FILL
4725
is assumed to be zero.  This is the same as `.space'.
4726
 
4727

4728
File: as.info,  Node: Space,  Next: Stab,  Prev: Sleb128,  Up: Pseudo Ops
4729
 
4730
7.102 `.space SIZE , FILL'
4731
==========================
4732
 
4733
This directive emits SIZE bytes, each of value FILL.  Both SIZE and
4734
FILL are absolute expressions.  If the comma and FILL are omitted, FILL
4735
is assumed to be zero.  This is the same as `.skip'.
4736
 
4737
     _Warning:_ `.space' has a completely different meaning for HPPA
4738
     targets; use `.block' as a substitute.  See `HP9000 Series 800
4739
     Assembly Language Reference Manual' (HP 92432-90001) for the
4740
     meaning of the `.space' directive.  *Note HPPA Assembler
4741
     Directives: HPPA Directives, for a summary.
4742
 
4743

4744
File: as.info,  Node: Stab,  Next: String,  Prev: Space,  Up: Pseudo Ops
4745
 
4746
7.103 `.stabd, .stabn, .stabs'
4747
==============================
4748
 
4749
There are three directives that begin `.stab'.  All emit symbols (*note
4750
Symbols::), for use by symbolic debuggers.  The symbols are not entered
4751
in the `as' hash table: they cannot be referenced elsewhere in the
4752
source file.  Up to five fields are required:
4753
 
4754
STRING
4755
     This is the symbol's name.  It may contain any character except
4756
     `\000', so is more general than ordinary symbol names.  Some
4757
     debuggers used to code arbitrarily complex structures into symbol
4758
     names using this field.
4759
 
4760
TYPE
4761
     An absolute expression.  The symbol's type is set to the low 8
4762
     bits of this expression.  Any bit pattern is permitted, but `ld'
4763
     and debuggers choke on silly bit patterns.
4764
 
4765
OTHER
4766
     An absolute expression.  The symbol's "other" attribute is set to
4767
     the low 8 bits of this expression.
4768
 
4769
DESC
4770
     An absolute expression.  The symbol's descriptor is set to the low
4771
     16 bits of this expression.
4772
 
4773
VALUE
4774
     An absolute expression which becomes the symbol's value.
4775
 
4776
   If a warning is detected while reading a `.stabd', `.stabn', or
4777
`.stabs' statement, the symbol has probably already been created; you
4778
get a half-formed symbol in your object file.  This is compatible with
4779
earlier assemblers!
4780
 
4781
`.stabd TYPE , OTHER , DESC'
4782
     The "name" of the symbol generated is not even an empty string.
4783
     It is a null pointer, for compatibility.  Older assemblers used a
4784
     null pointer so they didn't waste space in object files with empty
4785
     strings.
4786
 
4787
     The symbol's value is set to the location counter, relocatably.
4788
     When your program is linked, the value of this symbol is the
4789
     address of the location counter when the `.stabd' was assembled.
4790
 
4791
`.stabn TYPE , OTHER , DESC , VALUE'
4792
     The name of the symbol is set to the empty string `""'.
4793
 
4794
`.stabs STRING ,  TYPE , OTHER , DESC , VALUE'
4795
     All five fields are specified.
4796
 
4797

4798
File: as.info,  Node: String,  Next: Struct,  Prev: Stab,  Up: Pseudo Ops
4799
 
4800
7.104 `.string' "STR", `.string8' "STR", `.string16'
4801
====================================================
4802
 
4803
"STR", `.string32' "STR", `.string64' "STR"
4804
 
4805
   Copy the characters in STR to the object file.  You may specify more
4806
than one string to copy, separated by commas.  Unless otherwise
4807
specified for a particular machine, the assembler marks the end of each
4808
string with a 0 byte.  You can use any of the escape sequences
4809
described in *Note Strings: Strings.
4810
 
4811
   The variants `string16', `string32' and `string64' differ from the
4812
`string' pseudo opcode in that each 8-bit character from STR is copied
4813
and expanded to 16, 32 or 64 bits respectively.  The expanded characters
4814
are stored in target endianness byte order.
4815
 
4816
   Example:
4817
        .string32 "BYE"
4818
     expands to:
4819
        .string   "B\0\0\0Y\0\0\0E\0\0\0"  /* On little endian targets.  */
4820
        .string   "\0\0\0B\0\0\0Y\0\0\0E"  /* On big endian targets.  */
4821
 
4822

4823
File: as.info,  Node: Struct,  Next: SubSection,  Prev: String,  Up: Pseudo Ops
4824
 
4825
7.105 `.struct EXPRESSION'
4826
==========================
4827
 
4828
Switch to the absolute section, and set the section offset to
4829
EXPRESSION, which must be an absolute expression.  You might use this
4830
as follows:
4831
             .struct 0
4832
     field1:
4833
             .struct field1 + 4
4834
     field2:
4835
             .struct field2 + 4
4836
     field3:
4837
   This would define the symbol `field1' to have the value 0, the symbol
4838
`field2' to have the value 4, and the symbol `field3' to have the value
4839
8.  Assembly would be left in the absolute section, and you would need
4840
to use a `.section' directive of some sort to change to some other
4841
section before further assembly.
4842
 
4843

4844
File: as.info,  Node: SubSection,  Next: Symver,  Prev: Struct,  Up: Pseudo Ops
4845
 
4846
7.106 `.subsection NAME'
4847
========================
4848
 
4849
This is one of the ELF section stack manipulation directives.  The
4850
others are `.section' (*note Section::), `.pushsection' (*note
4851
PushSection::), `.popsection' (*note PopSection::), and `.previous'
4852
(*note Previous::).
4853
 
4854
   This directive replaces the current subsection with `name'.  The
4855
current section is not changed.  The replaced subsection is put onto
4856
the section stack in place of the then current top of stack subsection.
4857
 
4858

4859
File: as.info,  Node: Symver,  Next: Tag,  Prev: SubSection,  Up: Pseudo Ops
4860
 
4861
7.107 `.symver'
4862
===============
4863
 
4864
Use the `.symver' directive to bind symbols to specific version nodes
4865
within a source file.  This is only supported on ELF platforms, and is
4866
typically used when assembling files to be linked into a shared library.
4867
There are cases where it may make sense to use this in objects to be
4868
bound into an application itself so as to override a versioned symbol
4869
from a shared library.
4870
 
4871
   For ELF targets, the `.symver' directive can be used like this:
4872
     .symver NAME, NAME2@NODENAME
4873
   If the symbol NAME is defined within the file being assembled, the
4874
`.symver' directive effectively creates a symbol alias with the name
4875
NAME2@NODENAME, and in fact the main reason that we just don't try and
4876
create a regular alias is that the @ character isn't permitted in
4877
symbol names.  The NAME2 part of the name is the actual name of the
4878
symbol by which it will be externally referenced.  The name NAME itself
4879
is merely a name of convenience that is used so that it is possible to
4880
have definitions for multiple versions of a function within a single
4881
source file, and so that the compiler can unambiguously know which
4882
version of a function is being mentioned.  The NODENAME portion of the
4883
alias should be the name of a node specified in the version script
4884
supplied to the linker when building a shared library.  If you are
4885
attempting to override a versioned symbol from a shared library, then
4886
NODENAME should correspond to the nodename of the symbol you are trying
4887
to override.
4888
 
4889
   If the symbol NAME is not defined within the file being assembled,
4890
all references to NAME will be changed to NAME2@NODENAME.  If no
4891
reference to NAME is made, NAME2@NODENAME will be removed from the
4892
symbol table.
4893
 
4894
   Another usage of the `.symver' directive is:
4895
     .symver NAME, NAME2@@NODENAME
4896
   In this case, the symbol NAME must exist and be defined within the
4897
file being assembled. It is similar to NAME2@NODENAME. The difference
4898
is NAME2@@NODENAME will also be used to resolve references to NAME2 by
4899
the linker.
4900
 
4901
   The third usage of the `.symver' directive is:
4902
     .symver NAME, NAME2@@@NODENAME
4903
   When NAME is not defined within the file being assembled, it is
4904
treated as NAME2@NODENAME. When NAME is defined within the file being
4905
assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.
4906
 
4907

4908
File: as.info,  Node: Tag,  Next: Text,  Prev: Symver,  Up: Pseudo Ops
4909
 
4910
7.108 `.tag STRUCTNAME'
4911
=======================
4912
 
4913
This directive is generated by compilers to include auxiliary debugging
4914
information in the symbol table.  It is only permitted inside
4915
`.def'/`.endef' pairs.  Tags are used to link structure definitions in
4916
the symbol table with instances of those structures.
4917
 
4918

4919
File: as.info,  Node: Text,  Next: Title,  Prev: Tag,  Up: Pseudo Ops
4920
 
4921
7.109 `.text SUBSECTION'
4922
========================
4923
 
4924
Tells `as' to assemble the following statements onto the end of the
4925
text subsection numbered SUBSECTION, which is an absolute expression.
4926
If SUBSECTION is omitted, subsection number zero is used.
4927
 
4928

4929
File: as.info,  Node: Title,  Next: Type,  Prev: Text,  Up: Pseudo Ops
4930
 
4931
7.110 `.title "HEADING"'
4932
========================
4933
 
4934
Use HEADING as the title (second line, immediately after the source
4935
file name and pagenumber) when generating assembly listings.
4936
 
4937
   This directive affects subsequent pages, as well as the current page
4938
if it appears within ten lines of the top of a page.
4939
 
4940

4941
File: as.info,  Node: Type,  Next: Uleb128,  Prev: Title,  Up: Pseudo Ops
4942
 
4943
7.111 `.type'
4944
=============
4945
 
4946
This directive is used to set the type of a symbol.
4947
 
4948
COFF Version
4949
------------
4950
 
4951
   For COFF targets, this directive is permitted only within
4952
`.def'/`.endef' pairs.  It is used like this:
4953
 
4954
     .type INT
4955
 
4956
   This records the integer INT as the type attribute of a symbol table
4957
entry.
4958
 
4959
ELF Version
4960
-----------
4961
 
4962
   For ELF targets, the `.type' directive is used like this:
4963
 
4964
     .type NAME , TYPE DESCRIPTION
4965
 
4966
   This sets the type of symbol NAME to be either a function symbol or
4967
an object symbol.  There are five different syntaxes supported for the
4968
TYPE DESCRIPTION field, in order to provide compatibility with various
4969
other assemblers.
4970
 
4971
   Because some of the characters used in these syntaxes (such as `@'
4972
and `#') are comment characters for some architectures, some of the
4973
syntaxes below do not work on all architectures.  The first variant
4974
will be accepted by the GNU assembler on all architectures so that
4975
variant should be used for maximum portability, if you do not need to
4976
assemble your code with other assemblers.
4977
 
4978
   The syntaxes supported are:
4979
 
4980
       .type  STT_
4981
       .type ,#
4982
       .type ,@
4983
       .type ,%>type>
4984
       .type ,""
4985
 
4986
   The types supported are:
4987
 
4988
`STT_FUNC'
4989
`function'
4990
     Mark the symbol as being a function name.
4991
 
4992
`STT_OBJECT'
4993
`object'
4994
     Mark the symbol as being a data object.
4995
 
4996
`STT_TLS'
4997
`tls_object'
4998
     Mark the symbol as being a thead-local data object.
4999
 
5000
`STT_COMMON'
5001
`common'
5002
     Mark the symbol as being a common data object.
5003
 
5004
   Note: Some targets support extra types in addition to those listed
5005
above.
5006
 
5007

5008
File: as.info,  Node: Uleb128,  Next: Val,  Prev: Type,  Up: Pseudo Ops
5009
 
5010
7.112 `.uleb128 EXPRESSIONS'
5011
============================
5012
 
5013
ULEB128 stands for "unsigned little endian base 128."  This is a
5014
compact, variable length representation of numbers used by the DWARF
5015
symbolic debugging format.  *Note `.sleb128': Sleb128.
5016
 
5017

5018
File: as.info,  Node: Val,  Next: Version,  Prev: Uleb128,  Up: Pseudo Ops
5019
 
5020
7.113 `.val ADDR'
5021
=================
5022
 
5023
This directive, permitted only within `.def'/`.endef' pairs, records
5024
the address ADDR as the value attribute of a symbol table entry.
5025
 
5026

5027
File: as.info,  Node: Version,  Next: VTableEntry,  Prev: Val,  Up: Pseudo Ops
5028
 
5029
7.114 `.version "STRING"'
5030
=========================
5031
 
5032
This directive creates a `.note' section and places into it an ELF
5033
formatted note of type NT_VERSION.  The note's name is set to `string'.
5034
 
5035

5036
File: as.info,  Node: VTableEntry,  Next: VTableInherit,  Prev: Version,  Up: Pseudo Ops
5037
 
5038
7.115 `.vtable_entry TABLE, OFFSET'
5039
===================================
5040
 
5041
This directive finds or creates a symbol `table' and creates a
5042
`VTABLE_ENTRY' relocation for it with an addend of `offset'.
5043
 
5044

5045
File: as.info,  Node: VTableInherit,  Next: Warning,  Prev: VTableEntry,  Up: Pseudo Ops
5046
 
5047
7.116 `.vtable_inherit CHILD, PARENT'
5048
=====================================
5049
 
5050
This directive finds the symbol `child' and finds or creates the symbol
5051
`parent' and then creates a `VTABLE_INHERIT' relocation for the parent
5052
whose addend is the value of the child symbol.  As a special case the
5053
parent name of `0' is treated as referring to the `*ABS*' section.
5054
 
5055

5056
File: as.info,  Node: Warning,  Next: Weak,  Prev: VTableInherit,  Up: Pseudo Ops
5057
 
5058
7.117 `.warning "STRING"'
5059
=========================
5060
 
5061
Similar to the directive `.error' (*note `.error "STRING"': Error.),
5062
but just emits a warning.
5063
 
5064

5065
File: as.info,  Node: Weak,  Next: Weakref,  Prev: Warning,  Up: Pseudo Ops
5066
 
5067
7.118 `.weak NAMES'
5068
===================
5069
 
5070
This directive sets the weak attribute on the comma separated list of
5071
symbol `names'.  If the symbols do not already exist, they will be
5072
created.
5073
 
5074
   On COFF targets other than PE, weak symbols are a GNU extension.
5075
This directive sets the weak attribute on the comma separated list of
5076
symbol `names'.  If the symbols do not already exist, they will be
5077
created.
5078
 
5079
   On the PE target, weak symbols are supported natively as weak
5080
aliases.  When a weak symbol is created that is not an alias, GAS
5081
creates an alternate symbol to hold the default value.
5082
 
5083

5084
File: as.info,  Node: Weakref,  Next: Word,  Prev: Weak,  Up: Pseudo Ops
5085
 
5086
7.119 `.weakref ALIAS, TARGET'
5087
==============================
5088
 
5089
This directive creates an alias to the target symbol that enables the
5090
symbol to be referenced with weak-symbol semantics, but without
5091
actually making it weak.  If direct references or definitions of the
5092
symbol are present, then the symbol will not be weak, but if all
5093
references to it are through weak references, the symbol will be marked
5094
as weak in the symbol table.
5095
 
5096
   The effect is equivalent to moving all references to the alias to a
5097
separate assembly source file, renaming the alias to the symbol in it,
5098
declaring the symbol as weak there, and running a reloadable link to
5099
merge the object files resulting from the assembly of the new source
5100
file and the old source file that had the references to the alias
5101
removed.
5102
 
5103
   The alias itself never makes to the symbol table, and is entirely
5104
handled within the assembler.
5105
 
5106

5107
File: as.info,  Node: Word,  Next: Deprecated,  Prev: Weakref,  Up: Pseudo Ops
5108
 
5109
7.120 `.word EXPRESSIONS'
5110
=========================
5111
 
5112
This directive expects zero or more EXPRESSIONS, of any section,
5113
separated by commas.
5114
 
5115
   The size of the number emitted, and its byte order, depend on what
5116
target computer the assembly is for.
5117
 
5118
     _Warning: Special Treatment to support Compilers_
5119
 
5120
   Machines with a 32-bit address space, but that do less than 32-bit
5121
addressing, require the following special treatment.  If the machine of
5122
interest to you does 32-bit addressing (or doesn't require it; *note
5123
Machine Dependencies::), you can ignore this issue.
5124
 
5125
   In order to assemble compiler output into something that works, `as'
5126
occasionally does strange things to `.word' directives.  Directives of
5127
the form `.word sym1-sym2' are often emitted by compilers as part of
5128
jump tables.  Therefore, when `as' assembles a directive of the form
5129
`.word sym1-sym2', and the difference between `sym1' and `sym2' does
5130
not fit in 16 bits, `as' creates a "secondary jump table", immediately
5131
before the next label.  This secondary jump table is preceded by a
5132
short-jump to the first byte after the secondary table.  This
5133
short-jump prevents the flow of control from accidentally falling into
5134
the new table.  Inside the table is a long-jump to `sym2'.  The
5135
original `.word' contains `sym1' minus the address of the long-jump to
5136
`sym2'.
5137
 
5138
   If there were several occurrences of `.word sym1-sym2' before the
5139
secondary jump table, all of them are adjusted.  If there was a `.word
5140
sym3-sym4', that also did not fit in sixteen bits, a long-jump to
5141
`sym4' is included in the secondary jump table, and the `.word'
5142
directives are adjusted to contain `sym3' minus the address of the
5143
long-jump to `sym4'; and so on, for as many entries in the original
5144
jump table as necessary.
5145
 
5146

5147
File: as.info,  Node: Deprecated,  Prev: Word,  Up: Pseudo Ops
5148
 
5149
7.121 Deprecated Directives
5150
===========================
5151
 
5152
One day these directives won't work.  They are included for
5153
compatibility with older assemblers.
5154
.abort
5155
 
5156
.line
5157
 
5158

5159
File: as.info,  Node: Object Attributes,  Next: Machine Dependencies,  Prev: Pseudo Ops,  Up: Top
5160
 
5161
8 Object Attributes
5162
*******************
5163
 
5164
`as' assembles source files written for a specific architecture into
5165
object files for that architecture.  But not all object files are alike.
5166
Many architectures support incompatible variations.  For instance,
5167
floating point arguments might be passed in floating point registers if
5168
the object file requires hardware floating point support--or floating
5169
point arguments might be passed in integer registers if the object file
5170
supports processors with no hardware floating point unit.  Or, if two
5171
objects are built for different generations of the same architecture,
5172
the combination may require the newer generation at run-time.
5173
 
5174
   This information is useful during and after linking.  At link time,
5175
`ld' can warn about incompatible object files.  After link time, tools
5176
like `gdb' can use it to process the linked file correctly.
5177
 
5178
   Compatibility information is recorded as a series of object
5179
attributes.  Each attribute has a "vendor", "tag", and "value".  The
5180
vendor is a string, and indicates who sets the meaning of the tag.  The
5181
tag is an integer, and indicates what property the attribute describes.
5182
The value may be a string or an integer, and indicates how the
5183
property affects this object.  Missing attributes are the same as
5184
attributes with a zero value or empty string value.
5185
 
5186
   Object attributes were developed as part of the ABI for the ARM
5187
Architecture.  The file format is documented in `ELF for the ARM
5188
Architecture'.
5189
 
5190
* Menu:
5191
 
5192
* GNU Object Attributes::               GNU Object Attributes
5193
* Defining New Object Attributes::      Defining New Object Attributes
5194
 
5195

5196
File: as.info,  Node: GNU Object Attributes,  Next: Defining New Object Attributes,  Up: Object Attributes
5197
 
5198
8.1 GNU Object Attributes
5199
=========================
5200
 
5201
The `.gnu_attribute' directive records an object attribute with vendor
5202
`gnu'.
5203
 
5204
   Except for `Tag_compatibility', which has both an integer and a
5205
string for its value, GNU attributes have a string value if the tag
5206
number is odd and an integer value if the tag number is even.  The
5207
second bit (`TAG & 2' is set for architecture-independent attributes
5208
and clear for architecture-dependent ones.
5209
 
5210
8.1.1 Common GNU attributes
5211
---------------------------
5212
 
5213
These attributes are valid on all architectures.
5214
 
5215
Tag_compatibility (32)
5216
     The compatibility attribute takes an integer flag value and a
5217
     vendor name.  If the flag value is 0, the file is compatible with
5218
     other toolchains.  If it is 1, then the file is only compatible
5219
     with the named toolchain.  If it is greater than 1, the file can
5220
     only be processed by other toolchains under some private
5221
     arrangement indicated by the flag value and the vendor name.
5222
 
5223
8.1.2 MIPS Attributes
5224
---------------------
5225
 
5226
Tag_GNU_MIPS_ABI_FP (4)
5227
     The floating-point ABI used by this object file.  The value will
5228
     be:
5229
 
5230
        * 0 for files not affected by the floating-point ABI.
5231
 
5232
        * 1 for files using the hardware floating-point with a standard
5233
          double-precision FPU.
5234
 
5235
        * 2 for files using the hardware floating-point ABI with a
5236
          single-precision FPU.
5237
 
5238
        * 3 for files using the software floating-point ABI.
5239
 
5240
        * 4 for files using the hardware floating-point ABI with 64-bit
5241
          wide double-precision floating-point registers and 32-bit
5242
          wide general purpose registers.
5243
 
5244
8.1.3 PowerPC Attributes
5245
------------------------
5246
 
5247
Tag_GNU_Power_ABI_FP (4)
5248
     The floating-point ABI used by this object file.  The value will
5249
     be:
5250
 
5251
        * 0 for files not affected by the floating-point ABI.
5252
 
5253
        * 1 for files using double-precision hardware floating-point
5254
          ABI.
5255
 
5256
        * 2 for files using the software floating-point ABI.
5257
 
5258
        * 3 for files using single-precision hardware floating-point
5259
          ABI.
5260
 
5261
Tag_GNU_Power_ABI_Vector (8)
5262
     The vector ABI used by this object file.  The value will be:
5263
 
5264
        * 0 for files not affected by the vector ABI.
5265
 
5266
        * 1 for files using general purpose registers to pass vectors.
5267
 
5268
        * 2 for files using AltiVec registers to pass vectors.
5269
 
5270
        * 3 for files using SPE registers to pass vectors.
5271
 
5272

5273
File: as.info,  Node: Defining New Object Attributes,  Prev: GNU Object Attributes,  Up: Object Attributes
5274
 
5275
8.2 Defining New Object Attributes
5276
==================================
5277
 
5278
If you want to define a new GNU object attribute, here are the places
5279
you will need to modify.  New attributes should be discussed on the
5280
`binutils' mailing list.
5281
 
5282
   * This manual, which is the official register of attributes.
5283
 
5284
   * The header for your architecture `include/elf', to define the tag.
5285
 
5286
   * The `bfd' support file for your architecture, to merge the
5287
     attribute and issue any appropriate link warnings.
5288
 
5289
   * Test cases in `ld/testsuite' for merging and link warnings.
5290
 
5291
   * `binutils/readelf.c' to display your attribute.
5292
 
5293
   * GCC, if you want the compiler to mark the attribute automatically.
5294
 
5295

5296
File: as.info,  Node: Machine Dependencies,  Next: Reporting Bugs,  Prev: Object Attributes,  Up: Top
5297
 
5298
9 Machine Dependent Features
5299
****************************
5300
 
5301
The machine instruction sets are (almost by definition) different on
5302
each machine where `as' runs.  Floating point representations vary as
5303
well, and `as' often supports a few additional directives or
5304
command-line options for compatibility with other assemblers on a
5305
particular platform.  Finally, some versions of `as' support special
5306
pseudo-instructions for branch optimization.
5307
 
5308
   This chapter discusses most of these differences, though it does not
5309
include details on any machine's instruction set.  For details on that
5310
subject, see the hardware manufacturer's manual.
5311
 
5312
* Menu:
5313
 
5314
 
5315
* Alpha-Dependent::             Alpha Dependent Features
5316
 
5317
* ARC-Dependent::               ARC Dependent Features
5318
 
5319
* ARM-Dependent::               ARM Dependent Features
5320
 
5321
* AVR-Dependent::               AVR Dependent Features
5322
 
5323
* BFIN-Dependent::              BFIN Dependent Features
5324
 
5325
* CR16-Dependent::              CR16 Dependent Features
5326
 
5327
* CRIS-Dependent::              CRIS Dependent Features
5328
 
5329
* D10V-Dependent::              D10V Dependent Features
5330
 
5331
* D30V-Dependent::              D30V Dependent Features
5332
 
5333
* H8/300-Dependent::            Renesas H8/300 Dependent Features
5334
 
5335
* HPPA-Dependent::              HPPA Dependent Features
5336
 
5337
* ESA/390-Dependent::           IBM ESA/390 Dependent Features
5338
 
5339
* i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features
5340
 
5341
* i860-Dependent::              Intel 80860 Dependent Features
5342
 
5343
* i960-Dependent::              Intel 80960 Dependent Features
5344
 
5345
* IA-64-Dependent::             Intel IA-64 Dependent Features
5346
 
5347
* IP2K-Dependent::              IP2K Dependent Features
5348
 
5349
* M32C-Dependent::              M32C Dependent Features
5350
 
5351
* M32R-Dependent::              M32R Dependent Features
5352
 
5353
* M68K-Dependent::              M680x0 Dependent Features
5354
 
5355
* M68HC11-Dependent::           M68HC11 and 68HC12 Dependent Features
5356
 
5357
* MIPS-Dependent::              MIPS Dependent Features
5358
 
5359
* MMIX-Dependent::              MMIX Dependent Features
5360
 
5361
* MSP430-Dependent::            MSP430 Dependent Features
5362
 
5363
* SH-Dependent::                Renesas / SuperH SH Dependent Features
5364
* SH64-Dependent::              SuperH SH64 Dependent Features
5365
 
5366
* PDP-11-Dependent::            PDP-11 Dependent Features
5367
 
5368
* PJ-Dependent::                picoJava Dependent Features
5369
 
5370
* PPC-Dependent::               PowerPC Dependent Features
5371
 
5372
* Sparc-Dependent::             SPARC Dependent Features
5373
 
5374
* TIC54X-Dependent::            TI TMS320C54x Dependent Features
5375
 
5376
* V850-Dependent::              V850 Dependent Features
5377
 
5378
* Xtensa-Dependent::            Xtensa Dependent Features
5379
 
5380
* Z80-Dependent::               Z80 Dependent Features
5381
 
5382
* Z8000-Dependent::             Z8000 Dependent Features
5383
 
5384
* Vax-Dependent::               VAX Dependent Features
5385
 
5386

5387
File: as.info,  Node: Alpha-Dependent,  Next: ARC-Dependent,  Up: Machine Dependencies
5388
 
5389
9.1 Alpha Dependent Features
5390
============================
5391
 
5392
* Menu:
5393
 
5394
* Alpha Notes::                Notes
5395
* Alpha Options::              Options
5396
* Alpha Syntax::               Syntax
5397
* Alpha Floating Point::       Floating Point
5398
* Alpha Directives::           Alpha Machine Directives
5399
* Alpha Opcodes::              Opcodes
5400
 
5401

5402
File: as.info,  Node: Alpha Notes,  Next: Alpha Options,  Up: Alpha-Dependent
5403
 
5404
9.1.1 Notes
5405
-----------
5406
 
5407
The documentation here is primarily for the ELF object format.  `as'
5408
also supports the ECOFF and EVAX formats, but features specific to
5409
these formats are not yet documented.
5410
 
5411

5412
File: as.info,  Node: Alpha Options,  Next: Alpha Syntax,  Prev: Alpha Notes,  Up: Alpha-Dependent
5413
 
5414
9.1.2 Options
5415
-------------
5416
 
5417
`-mCPU'
5418
     This option specifies the target processor.  If an attempt is made
5419
     to assemble an instruction which will not execute on the target
5420
     processor, the assembler may either expand the instruction as a
5421
     macro or issue an error message.  This option is equivalent to the
5422
     `.arch' directive.
5423
 
5424
     The following processor names are recognized: `21064', `21064a',
5425
     `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
5426
     `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
5427
     `ev67', `ev68'.  The special name `all' may be used to allow the
5428
     assembler to accept instructions valid for any Alpha processor.
5429
 
5430
     In order to support existing practice in OSF/1 with respect to
5431
     `.arch', and existing practice within `MILO' (the Linux ARC
5432
     bootloader), the numbered processor names (e.g. 21064) enable the
5433
     processor-specific PALcode instructions, while the
5434
     "electro-vlasic" names (e.g. `ev4') do not.
5435
 
5436
`-mdebug'
5437
`-no-mdebug'
5438
     Enables or disables the generation of `.mdebug' encapsulation for
5439
     stabs directives and procedure descriptors.  The default is to
5440
     automatically enable `.mdebug' when the first stabs directive is
5441
     seen.
5442
 
5443
`-relax'
5444
     This option forces all relocations to be put into the object file,
5445
     instead of saving space and resolving some relocations at assembly
5446
     time.  Note that this option does not propagate all symbol
5447
     arithmetic into the object file, because not all symbol arithmetic
5448
     can be represented.  However, the option can still be useful in
5449
     specific applications.
5450
 
5451
`-g'
5452
     This option is used when the compiler generates debug information.
5453
     When `gcc' is using `mips-tfile' to generate debug information
5454
     for ECOFF, local labels must be passed through to the object file.
5455
     Otherwise this option has no effect.
5456
 
5457
`-GSIZE'
5458
     A local common symbol larger than SIZE is placed in `.bss', while
5459
     smaller symbols are placed in `.sbss'.
5460
 
5461
`-F'
5462
`-32addr'
5463
     These options are ignored for backward compatibility.
5464
 
5465

5466
File: as.info,  Node: Alpha Syntax,  Next: Alpha Floating Point,  Prev: Alpha Options,  Up: Alpha-Dependent
5467
 
5468
9.1.3 Syntax
5469
------------
5470
 
5471
The assembler syntax closely follow the Alpha Reference Manual;
5472
assembler directives and general syntax closely follow the OSF/1 and
5473
OpenVMS syntax, with a few differences for ELF.
5474
 
5475
* Menu:
5476
 
5477
* Alpha-Chars::                Special Characters
5478
* Alpha-Regs::                 Register Names
5479
* Alpha-Relocs::               Relocations
5480
 
5481

5482
File: as.info,  Node: Alpha-Chars,  Next: Alpha-Regs,  Up: Alpha Syntax
5483
 
5484
9.1.3.1 Special Characters
5485
..........................
5486
 
5487
`#' is the line comment character.
5488
 
5489
   `;' can be used instead of a newline to separate statements.
5490
 
5491

5492
File: as.info,  Node: Alpha-Regs,  Next: Alpha-Relocs,  Prev: Alpha-Chars,  Up: Alpha Syntax
5493
 
5494
9.1.3.2 Register Names
5495
......................
5496
 
5497
The 32 integer registers are referred to as `$N' or `$rN'.  In
5498
addition, registers 15, 28, 29, and 30 may be referred to by the
5499
symbols `$fp', `$at', `$gp', and `$sp' respectively.
5500
 
5501
   The 32 floating-point registers are referred to as `$fN'.
5502
 
5503

5504
File: as.info,  Node: Alpha-Relocs,  Prev: Alpha-Regs,  Up: Alpha Syntax
5505
 
5506
9.1.3.3 Relocations
5507
...................
5508
 
5509
Some of these relocations are available for ECOFF, but mostly only for
5510
ELF.  They are modeled after the relocation format introduced in
5511
Digital Unix 4.0, but there are additions.
5512
 
5513
   The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
5514
relocation.  In some cases NUMBER is used to relate specific
5515
instructions.
5516
 
5517
   The relocation is placed at the end of the instruction like so:
5518
 
5519
     ldah  $0,a($29)    !gprelhigh
5520
     lda   $0,a($0)     !gprellow
5521
     ldq   $1,b($29)    !literal!100
5522
     ldl   $2,0($1)     !lituse_base!100
5523
 
5524
`!literal'
5525
`!literal!N'
5526
     Used with an `ldq' instruction to load the address of a symbol
5527
     from the GOT.
5528
 
5529
     A sequence number N is optional, and if present is used to pair
5530
     `lituse' relocations with this `literal' relocation.  The `lituse'
5531
     relocations are used by the linker to optimize the code based on
5532
     the final location of the symbol.
5533
 
5534
     Note that these optimizations are dependent on the data flow of the
5535
     program.  Therefore, if _any_ `lituse' is paired with a `literal'
5536
     relocation, then _all_ uses of the register set by the `literal'
5537
     instruction must also be marked with `lituse' relocations.  This
5538
     is because the original `literal' instruction may be deleted or
5539
     transformed into another instruction.
5540
 
5541
     Also note that there may be a one-to-many relationship between
5542
     `literal' and `lituse', but not a many-to-one.  That is, if there
5543
     are two code paths that load up the same address and feed the
5544
     value to a single use, then the use may not use a `lituse'
5545
     relocation.
5546
 
5547
`!lituse_base!N'
5548
     Used with any memory format instruction (e.g. `ldl') to indicate
5549
     that the literal is used for an address load.  The offset field of
5550
     the instruction must be zero.  During relaxation, the code may be
5551
     altered to use a gp-relative load.
5552
 
5553
`!lituse_jsr!N'
5554
     Used with a register branch format instruction (e.g. `jsr') to
5555
     indicate that the literal is used for a call.  During relaxation,
5556
     the code may be altered to use a direct branch (e.g. `bsr').
5557
 
5558
`!lituse_jsrdirect!N'
5559
     Similar to `lituse_jsr', but also that this call cannot be vectored
5560
     through a PLT entry.  This is useful for functions with special
5561
     calling conventions which do not allow the normal call-clobbered
5562
     registers to be clobbered.
5563
 
5564
`!lituse_bytoff!N'
5565
     Used with a byte mask instruction (e.g. `extbl') to indicate that
5566
     only the low 3 bits of the address are relevant.  During
5567
     relaxation, the code may be altered to use an immediate instead of
5568
     a register shift.
5569
 
5570
`!lituse_addr!N'
5571
     Used with any other instruction to indicate that the original
5572
     address is in fact used, and the original `ldq' instruction may
5573
     not be altered or deleted.  This is useful in conjunction with
5574
     `lituse_jsr' to test whether a weak symbol is defined.
5575
 
5576
          ldq  $27,foo($29)   !literal!1
5577
          beq  $27,is_undef   !lituse_addr!1
5578
          jsr  $26,($27),foo  !lituse_jsr!1
5579
 
5580
`!lituse_tlsgd!N'
5581
     Used with a register branch format instruction to indicate that the
5582
     literal is the call to `__tls_get_addr' used to compute the
5583
     address of the thread-local storage variable whose descriptor was
5584
     loaded with `!tlsgd!N'.
5585
 
5586
`!lituse_tlsldm!N'
5587
     Used with a register branch format instruction to indicate that the
5588
     literal is the call to `__tls_get_addr' used to compute the
5589
     address of the base of the thread-local storage block for the
5590
     current module.  The descriptor for the module must have been
5591
     loaded with `!tlsldm!N'.
5592
 
5593
`!gpdisp!N'
5594
     Used with `ldah' and `lda' to load the GP from the current
5595
     address, a-la the `ldgp' macro.  The source register for the
5596
     `ldah' instruction must contain the address of the `ldah'
5597
     instruction.  There must be exactly one `lda' instruction paired
5598
     with the `ldah' instruction, though it may appear anywhere in the
5599
     instruction stream.  The immediate operands must be zero.
5600
 
5601
          bsr  $26,foo
5602
          ldah $29,0($26)     !gpdisp!1
5603
          lda  $29,0($29)     !gpdisp!1
5604
 
5605
`!gprelhigh'
5606
     Used with an `ldah' instruction to add the high 16 bits of a
5607
     32-bit displacement from the GP.
5608
 
5609
`!gprellow'
5610
     Used with any memory format instruction to add the low 16 bits of a
5611
     32-bit displacement from the GP.
5612
 
5613
`!gprel'
5614
     Used with any memory format instruction to add a 16-bit
5615
     displacement from the GP.
5616
 
5617
`!samegp'
5618
     Used with any branch format instruction to skip the GP load at the
5619
     target address.  The referenced symbol must have the same GP as the
5620
     source object file, and it must be declared to either not use `$27'
5621
     or perform a standard GP load in the first two instructions via the
5622
     `.prologue' directive.
5623
 
5624
`!tlsgd'
5625
`!tlsgd!N'
5626
     Used with an `lda' instruction to load the address of a TLS
5627
     descriptor for a symbol in the GOT.
5628
 
5629
     The sequence number N is optional, and if present it used to pair
5630
     the descriptor load with both the `literal' loading the address of
5631
     the `__tls_get_addr' function and the `lituse_tlsgd' marking the
5632
     call to that function.
5633
 
5634
     For proper relaxation, both the `tlsgd', `literal' and `lituse'
5635
     relocations must be in the same extended basic block.  That is,
5636
     the relocation with the lowest address must be executed first at
5637
     runtime.
5638
 
5639
`!tlsldm'
5640
`!tlsldm!N'
5641
     Used with an `lda' instruction to load the address of a TLS
5642
     descriptor for the current module in the GOT.
5643
 
5644
     Similar in other respects to `tlsgd'.
5645
 
5646
`!gotdtprel'
5647
     Used with an `ldq' instruction to load the offset of the TLS
5648
     symbol within its module's thread-local storage block.  Also known
5649
     as the dynamic thread pointer offset or dtp-relative offset.
5650
 
5651
`!dtprelhi'
5652
`!dtprello'
5653
`!dtprel'
5654
     Like `gprel' relocations except they compute dtp-relative offsets.
5655
 
5656
`!gottprel'
5657
     Used with an `ldq' instruction to load the offset of the TLS
5658
     symbol from the thread pointer.  Also known as the tp-relative
5659
     offset.
5660
 
5661
`!tprelhi'
5662
`!tprello'
5663
`!tprel'
5664
     Like `gprel' relocations except they compute tp-relative offsets.
5665
 
5666

5667
File: as.info,  Node: Alpha Floating Point,  Next: Alpha Directives,  Prev: Alpha Syntax,  Up: Alpha-Dependent
5668
 
5669
9.1.4 Floating Point
5670
--------------------
5671
 
5672
The Alpha family uses both IEEE and VAX floating-point numbers.
5673
 
5674

5675
File: as.info,  Node: Alpha Directives,  Next: Alpha Opcodes,  Prev: Alpha Floating Point,  Up: Alpha-Dependent
5676
 
5677
9.1.5 Alpha Assembler Directives
5678
--------------------------------
5679
 
5680
`as' for the Alpha supports many additional directives for
5681
compatibility with the native assembler.  This section describes them
5682
only briefly.
5683
 
5684
   These are the additional directives in `as' for the Alpha:
5685
 
5686
`.arch CPU'
5687
     Specifies the target processor.  This is equivalent to the `-mCPU'
5688
     command-line option.  *Note Options: Alpha Options, for a list of
5689
     values for CPU.
5690
 
5691
`.ent FUNCTION[, N]'
5692
     Mark the beginning of FUNCTION.  An optional number may follow for
5693
     compatibility with the OSF/1 assembler, but is ignored.  When
5694
     generating `.mdebug' information, this will create a procedure
5695
     descriptor for the function.  In ELF, it will mark the symbol as a
5696
     function a-la the generic `.type' directive.
5697
 
5698
`.end FUNCTION'
5699
     Mark the end of FUNCTION.  In ELF, it will set the size of the
5700
     symbol a-la the generic `.size' directive.
5701
 
5702
`.mask MASK, OFFSET'
5703
     Indicate which of the integer registers are saved in the current
5704
     function's stack frame.  MASK is interpreted a bit mask in which
5705
     bit N set indicates that register N is saved.  The registers are
5706
     saved in a block located OFFSET bytes from the "canonical frame
5707
     address" (CFA) which is the value of the stack pointer on entry to
5708
     the function.  The registers are saved sequentially, except that
5709
     the return address register (normally `$26') is saved first.
5710
 
5711
     This and the other directives that describe the stack frame are
5712
     currently only used when generating `.mdebug' information.  They
5713
     may in the future be used to generate DWARF2 `.debug_frame' unwind
5714
     information for hand written assembly.
5715
 
5716
`.fmask MASK, OFFSET'
5717
     Indicate which of the floating-point registers are saved in the
5718
     current stack frame.  The MASK and OFFSET parameters are
5719
     interpreted as with `.mask'.
5720
 
5721
`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
5722
     Describes the shape of the stack frame.  The frame pointer in use
5723
     is FRAMEREG; normally this is either `$fp' or `$sp'.  The frame
5724
     pointer is FRAMEOFFSET bytes below the CFA.  The return address is
5725
     initially located in RETREG until it is saved as indicated in
5726
     `.mask'.  For compatibility with OSF/1 an optional ARGOFFSET
5727
     parameter is accepted and ignored.  It is believed to indicate the
5728
     offset from the CFA to the saved argument registers.
5729
 
5730
`.prologue N'
5731
     Indicate that the stack frame is set up and all registers have been
5732
     spilled.  The argument N indicates whether and how the function
5733
     uses the incoming "procedure vector" (the address of the called
5734
     function) in `$27'.  0 indicates that `$27' is not used; 1
5735
     indicates that the first two instructions of the function use `$27'
5736
     to perform a load of the GP register; 2 indicates that `$27' is
5737
     used in some non-standard way and so the linker cannot elide the
5738
     load of the procedure vector during relaxation.
5739
 
5740
`.usepv FUNCTION, WHICH'
5741
     Used to indicate the use of the `$27' register, similar to
5742
     `.prologue', but without the other semantics of needing to be
5743
     inside an open `.ent'/`.end' block.
5744
 
5745
     The WHICH argument should be either `no', indicating that `$27' is
5746
     not used, or `std', indicating that the first two instructions of
5747
     the function perform a GP load.
5748
 
5749
     One might use this directive instead of `.prologue' if you are
5750
     also using dwarf2 CFI directives.
5751
 
5752
`.gprel32 EXPRESSION'
5753
     Computes the difference between the address in EXPRESSION and the
5754
     GP for the current object file, and stores it in 4 bytes.  In
5755
     addition to being smaller than a full 8 byte address, this also
5756
     does not require a dynamic relocation when used in a shared
5757
     library.
5758
 
5759
`.t_floating EXPRESSION'
5760
     Stores EXPRESSION as an IEEE double precision value.
5761
 
5762
`.s_floating EXPRESSION'
5763
     Stores EXPRESSION as an IEEE single precision value.
5764
 
5765
`.f_floating EXPRESSION'
5766
     Stores EXPRESSION as a VAX F format value.
5767
 
5768
`.g_floating EXPRESSION'
5769
     Stores EXPRESSION as a VAX G format value.
5770
 
5771
`.d_floating EXPRESSION'
5772
     Stores EXPRESSION as a VAX D format value.
5773
 
5774
`.set FEATURE'
5775
     Enables or disables various assembler features.  Using the positive
5776
     name of the feature enables while using `noFEATURE' disables.
5777
 
5778
    `at'
5779
          Indicates that macro expansions may clobber the "assembler
5780
          temporary" (`$at' or `$28') register.  Some macros may not be
5781
          expanded without this and will generate an error message if
5782
          `noat' is in effect.  When `at' is in effect, a warning will
5783
          be generated if `$at' is used by the programmer.
5784
 
5785
    `macro'
5786
          Enables the expansion of macro instructions.  Note that
5787
          variants of real instructions, such as `br label' vs `br
5788
          $31,label' are considered alternate forms and not macros.
5789
 
5790
    `move'
5791
    `reorder'
5792
    `volatile'
5793
          These control whether and how the assembler may re-order
5794
          instructions.  Accepted for compatibility with the OSF/1
5795
          assembler, but `as' does not do instruction scheduling, so
5796
          these features are ignored.
5797
 
5798
   The following directives are recognized for compatibility with the
5799
OSF/1 assembler but are ignored.
5800
 
5801
     .proc           .aproc
5802
     .reguse         .livereg
5803
     .option         .aent
5804
     .ugen           .eflag
5805
     .alias          .noalias
5806
 
5807

5808
File: as.info,  Node: Alpha Opcodes,  Prev: Alpha Directives,  Up: Alpha-Dependent
5809
 
5810
9.1.6 Opcodes
5811
-------------
5812
 
5813
For detailed information on the Alpha machine instruction set, see the
5814
Alpha Architecture Handbook
5815
(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).
5816
 
5817

5818
File: as.info,  Node: ARC-Dependent,  Next: ARM-Dependent,  Prev: Alpha-Dependent,  Up: Machine Dependencies
5819
 
5820
9.2 ARC Dependent Features
5821
==========================
5822
 
5823
* Menu:
5824
 
5825
* ARC Options::              Options
5826
* ARC Syntax::               Syntax
5827
* ARC Floating Point::       Floating Point
5828
* ARC Directives::           ARC Machine Directives
5829
* ARC Opcodes::              Opcodes
5830
 
5831

5832
File: as.info,  Node: ARC Options,  Next: ARC Syntax,  Up: ARC-Dependent
5833
 
5834
9.2.1 Options
5835
-------------
5836
 
5837
`-marc[5|6|7|8]'
5838
     This option selects the core processor variant.  Using `-marc' is
5839
     the same as `-marc6', which is also the default.
5840
 
5841
    `arc5'
5842
          Base instruction set.
5843
 
5844
    `arc6'
5845
          Jump-and-link (jl) instruction.  No requirement of an
5846
          instruction between setting flags and conditional jump.  For
5847
          example:
5848
 
5849
                 mov.f r0,r1
5850
                 beq   foo
5851
 
5852
    `arc7'
5853
          Break (brk) and sleep (sleep) instructions.
5854
 
5855
    `arc8'
5856
          Software interrupt (swi) instruction.
5857
 
5858
 
5859
     Note: the `.option' directive can to be used to select a core
5860
     variant from within assembly code.
5861
 
5862
`-EB'
5863
     This option specifies that the output generated by the assembler
5864
     should be marked as being encoded for a big-endian processor.
5865
 
5866
`-EL'
5867
     This option specifies that the output generated by the assembler
5868
     should be marked as being encoded for a little-endian processor -
5869
     this is the default.
5870
 
5871
 
5872

5873
File: as.info,  Node: ARC Syntax,  Next: ARC Floating Point,  Prev: ARC Options,  Up: ARC-Dependent
5874
 
5875
9.2.2 Syntax
5876
------------
5877
 
5878
* Menu:
5879
 
5880
* ARC-Chars::                Special Characters
5881
* ARC-Regs::                 Register Names
5882
 
5883

5884
File: as.info,  Node: ARC-Chars,  Next: ARC-Regs,  Up: ARC Syntax
5885
 
5886
9.2.2.1 Special Characters
5887
..........................
5888
 
5889
*TODO*
5890
 
5891

5892
File: as.info,  Node: ARC-Regs,  Prev: ARC-Chars,  Up: ARC Syntax
5893
 
5894
9.2.2.2 Register Names
5895
......................
5896
 
5897
*TODO*
5898
 
5899

5900
File: as.info,  Node: ARC Floating Point,  Next: ARC Directives,  Prev: ARC Syntax,  Up: ARC-Dependent
5901
 
5902
9.2.3 Floating Point
5903
--------------------
5904
 
5905
The ARC core does not currently have hardware floating point support.
5906
Software floating point support is provided by `GCC' and uses IEEE
5907
floating-point numbers.
5908
 
5909

5910
File: as.info,  Node: ARC Directives,  Next: ARC Opcodes,  Prev: ARC Floating Point,  Up: ARC-Dependent
5911
 
5912
9.2.4 ARC Machine Directives
5913
----------------------------
5914
 
5915
The ARC version of `as' supports the following additional machine
5916
directives:
5917
 
5918
`.2byte EXPRESSIONS'
5919
     *TODO*
5920
 
5921
`.3byte EXPRESSIONS'
5922
     *TODO*
5923
 
5924
`.4byte EXPRESSIONS'
5925
     *TODO*
5926
 
5927
`.extAuxRegister NAME,ADDRESS,MODE'
5928
     The ARCtangent A4 has extensible auxiliary register space.  The
5929
     auxiliary registers can be defined in the assembler source code by
5930
     using this directive.  The first parameter is the NAME of the new
5931
     auxiallry register.  The second parameter is the ADDRESS of the
5932
     register in the auxiliary register memory map for the variant of
5933
     the ARC.  The third parameter specifies the MODE in which the
5934
     register can be operated is and it can be one of:
5935
 
5936
    `r          (readonly)'
5937
 
5938
    `w          (write only)'
5939
 
5940
    `r|w        (read or write)'
5941
 
5942
     For example:
5943
 
5944
            .extAuxRegister mulhi,0x12,w
5945
 
5946
     This specifies an extension auxiliary register called _mulhi_
5947
     which is at address 0x12 in the memory space and which is only
5948
     writable.
5949
 
5950
`.extCondCode SUFFIX,VALUE'
5951
     The condition codes on the ARCtangent A4 are extensible and can be
5952
     specified by means of this assembler directive.  They are specified
5953
     by the suffix and the value for the condition code.  They can be
5954
     used to specify extra condition codes with any values.  For
5955
     example:
5956
 
5957
            .extCondCode is_busy,0x14
5958
 
5959
             add.is_busy  r1,r2,r3
5960
             bis_busy     _main
5961
 
5962
`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
5963
     Specifies an extension core register NAME for the application.
5964
     This allows a register NAME with a valid REGNUM between 0 and 60,
5965
     with the following as valid values for MODE
5966
 
5967
    `_r_   (readonly)'
5968
 
5969
    `_w_   (write only)'
5970
 
5971
    `_r|w_ (read or write)'
5972
 
5973
     The other parameter gives a description of the register having a
5974
     SHORTCUT in the pipeline.  The valid values are:
5975
 
5976
    `can_shortcut'
5977
 
5978
    `cannot_shortcut'
5979
 
5980
     For example:
5981
 
5982
            .extCoreRegister mlo,57,r,can_shortcut
5983
 
5984
     This defines an extension core register mlo with the value 57 which
5985
     can shortcut the pipeline.
5986
 
5987
`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
5988
     The ARCtangent A4 allows the user to specify extension
5989
     instructions.  The extension instructions are not macros.  The
5990
     assembler creates encodings for use of these instructions
5991
     according to the specification by the user.  The parameters are:
5992
 
5993
    *NAME
5994
          Name of the extension instruction
5995
 
5996
    *OPCODE
5997
          Opcode to be used. (Bits 27:31 in the encoding).  Valid values
5998
          0x10-0x1f or 0x03
5999
 
6000
    *SUBOPCODE
6001
          Subopcode to be used.  Valid values are from 0x09-0x3f.
6002
          However the correct value also depends on SYNTAXCLASS
6003
 
6004
    *SUFFIXCLASS
6005
          Determines the kinds of suffixes to be allowed.  Valid values
6006
          are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which
6007
          indicates the absence or presence of conditional suffixes and
6008
          flag setting by the extension instruction.  It is also
6009
          possible to specify that an instruction sets the flags and is
6010
          conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'.
6011
 
6012
    *SYNTAXCLASS
6013
          Determines the syntax class for the instruction.  It can have
6014
          the following values:
6015
 
6016
         ``SYNTAX_2OP':'
6017
               2 Operand Instruction
6018
 
6019
         ``SYNTAX_3OP':'
6020
               3 Operand Instruction
6021
 
6022
          In addition there could be modifiers for the syntax class as
6023
          described below:
6024
 
6025
               Syntax Class Modifiers are:
6026
 
6027
             - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP,
6028
               specifying that the first operand of a three-operand
6029
               instruction must be an immediate (i.e., the result is
6030
               discarded).  OP1_MUST_BE_IMM is used by bitwise ORing it
6031
               with SYNTAX_3OP as given in the example below.  This
6032
               could usually be used to set the flags using specific
6033
               instructions and not retain results.
6034
 
6035
             - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it
6036
               specifies that there is an implied immediate destination
6037
               operand which does not appear in the syntax.  For
6038
               example, if the source code contains an instruction like:
6039
 
6040
                    inst r1,r2
6041
 
6042
               it really means that the first argument is an implied
6043
               immediate (that is, the result is discarded).  This is
6044
               the same as though the source code were: inst 0,r1,r2.
6045
               You use OP1_IMM_IMPLIED by bitwise ORing it with
6046
               SYNTAX_20P.
6047
 
6048
 
6049
     For example, defining 64-bit multiplier with immediate operands:
6050
 
6051
          .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
6052
                          SYNTAX_3OP|OP1_MUST_BE_IMM
6053
 
6054
     The above specifies an extension instruction called mp64 which has
6055
     3 operands, sets the flags, can be used with a condition code, for
6056
     which the first operand is an immediate.  (Equivalent to
6057
     discarding the result of the operation).
6058
 
6059
           .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
6060
 
6061
     This describes a 2 operand instruction with an implicit first
6062
     immediate operand.  The result of this operation would be
6063
     discarded.
6064
 
6065
`.half EXPRESSIONS'
6066
     *TODO*
6067
 
6068
`.long EXPRESSIONS'
6069
     *TODO*
6070
 
6071
`.option ARC|ARC5|ARC6|ARC7|ARC8'
6072
     The `.option' directive must be followed by the desired core
6073
     version. Again `arc' is an alias for `arc6'.
6074
 
6075
     Note: the `.option' directive overrides the command line option
6076
     `-marc'; a warning is emitted when the version is not consistent
6077
     between the two - even for the implicit default core version
6078
     (arc6).
6079
 
6080
`.short EXPRESSIONS'
6081
     *TODO*
6082
 
6083
`.word EXPRESSIONS'
6084
     *TODO*
6085
 
6086
 
6087

6088
File: as.info,  Node: ARC Opcodes,  Prev: ARC Directives,  Up: ARC-Dependent
6089
 
6090
9.2.5 Opcodes
6091
-------------
6092
 
6093
For information on the ARC instruction set, see `ARC Programmers
6094
Reference Manual', ARC International (www.arc.com)
6095
 
6096

6097
File: as.info,  Node: ARM-Dependent,  Next: AVR-Dependent,  Prev: ARC-Dependent,  Up: Machine Dependencies
6098
 
6099
9.3 ARM Dependent Features
6100
==========================
6101
 
6102
* Menu:
6103
 
6104
* ARM Options::              Options
6105
* ARM Syntax::               Syntax
6106
* ARM Floating Point::       Floating Point
6107
* ARM Directives::           ARM Machine Directives
6108
* ARM Opcodes::              Opcodes
6109
* ARM Mapping Symbols::      Mapping Symbols
6110
* ARM Unwinding Tutorial::   Unwinding
6111
 
6112

6113
File: as.info,  Node: ARM Options,  Next: ARM Syntax,  Up: ARM-Dependent
6114
 
6115
9.3.1 Options
6116
-------------
6117
 
6118
`-mcpu=PROCESSOR[+EXTENSION...]'
6119
     This option specifies the target processor.  The assembler will
6120
     issue an error message if an attempt is made to assemble an
6121
     instruction which will not execute on the target processor.  The
6122
     following processor names are recognized: `arm1', `arm2', `arm250',
6123
     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
6124
     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
6125
     `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
6126
     `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
6127
     `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1',
6128
     `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920',
6129
     `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday
6130
     FA526 processor), `fa626' (Faraday FA626 processor), `arm9e',
6131
     `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s',
6132
     `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t',
6133
     `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e',
6134
     `arm1022e', `arm1026ej-s', `fa626te' (Faraday FA626TE processor),
6135
     `fa726te' (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s',
6136
     `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s',
6137
     `mpcore', `mpcorenovfp', `cortex-a8', `cortex-a9', `cortex-r4',
6138
     `cortex-m3', `ep9312' (ARM920 with Cirrus Maverick coprocessor),
6139
     `i80200' (Intel XScale processor) `iwmmxt' (Intel(r) XScale
6140
     processor with Wireless MMX(tm) technology coprocessor) and
6141
     `xscale'.  The special name `all' may be used to allow the
6142
     assembler to accept instructions valid for any ARM processor.
6143
 
6144
     In addition to the basic instruction set, the assembler can be
6145
     told to accept various extension mnemonics that extend the
6146
     processor using the co-processor instruction space.  For example,
6147
     `-mcpu=arm920+maverick' is equivalent to specifying
6148
     `-mcpu=ep9312'.  The following extensions are currently supported:
6149
     `+maverick' `+iwmmxt' and `+xscale'.
6150
 
6151
`-march=ARCHITECTURE[+EXTENSION...]'
6152
     This option specifies the target architecture.  The assembler will
6153
     issue an error message if an attempt is made to assemble an
6154
     instruction which will not execute on the target architecture.
6155
     The following architecture names are recognized: `armv1', `armv2',
6156
     `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
6157
     `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
6158
     `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk',
6159
     `armv7', `armv7-a', `armv7-r', `armv7-m', `iwmmxt' and `xscale'.
6160
     If both `-mcpu' and `-march' are specified, the assembler will use
6161
     the setting for `-mcpu'.
6162
 
6163
     The architecture option can be extended with the same instruction
6164
     set extension options as the `-mcpu' option.
6165
 
6166
`-mfpu=FLOATING-POINT-FORMAT'
6167
     This option specifies the floating point format to assemble for.
6168
     The assembler will issue an error message if an attempt is made to
6169
     assemble an instruction which will not execute on the target
6170
     floating point unit.  The following format options are recognized:
6171
     `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
6172
     `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
6173
     `vfp9', `vfpxd', `vfpv2' `vfpv3' `vfpv3-d16' `arm1020t',
6174
     `arm1020e', `arm1136jf-s', `maverick' and `neon'.
6175
 
6176
     In addition to determining which instructions are assembled, this
6177
     option also affects the way in which the `.double' assembler
6178
     directive behaves when assembling little-endian code.
6179
 
6180
     The default is dependent on the processor selected.  For
6181
     Architecture 5 or later, the default is to assembler for VFP
6182
     instructions; for earlier architectures the default is to assemble
6183
     for FPA instructions.
6184
 
6185
`-mthumb'
6186
     This option specifies that the assembler should start assembling
6187
     Thumb instructions; that is, it should behave as though the file
6188
     starts with a `.code 16' directive.
6189
 
6190
`-mthumb-interwork'
6191
     This option specifies that the output generated by the assembler
6192
     should be marked as supporting interworking.
6193
 
6194
`-mapcs `[26|32]''
6195
     This option specifies that the output generated by the assembler
6196
     should be marked as supporting the indicated version of the Arm
6197
     Procedure.  Calling Standard.
6198
 
6199
`-matpcs'
6200
     This option specifies that the output generated by the assembler
6201
     should be marked as supporting the Arm/Thumb Procedure Calling
6202
     Standard.  If enabled this option will cause the assembler to
6203
     create an empty debugging section in the object file called
6204
     .arm.atpcs.  Debuggers can use this to determine the ABI being
6205
     used by.
6206
 
6207
`-mapcs-float'
6208
     This indicates the floating point variant of the APCS should be
6209
     used.  In this variant floating point arguments are passed in FP
6210
     registers rather than integer registers.
6211
 
6212
`-mapcs-reentrant'
6213
     This indicates that the reentrant variant of the APCS should be
6214
     used.  This variant supports position independent code.
6215
 
6216
`-mfloat-abi=ABI'
6217
     This option specifies that the output generated by the assembler
6218
     should be marked as using specified floating point ABI.  The
6219
     following values are recognized: `soft', `softfp' and `hard'.
6220
 
6221
`-meabi=VER'
6222
     This option specifies which EABI version the produced object files
6223
     should conform to.  The following values are recognized: `gnu', `4'
6224
     and `5'.
6225
 
6226
`-EB'
6227
     This option specifies that the output generated by the assembler
6228
     should be marked as being encoded for a big-endian processor.
6229
 
6230
`-EL'
6231
     This option specifies that the output generated by the assembler
6232
     should be marked as being encoded for a little-endian processor.
6233
 
6234
`-k'
6235
     This option specifies that the output of the assembler should be
6236
     marked as position-independent code (PIC).
6237
 
6238
`--fix-v4bx'
6239
     Allow `BX' instructions in ARMv4 code.  This is intended for use
6240
     with the linker option of the same name.
6241
 
6242
 
6243

6244
File: as.info,  Node: ARM Syntax,  Next: ARM Floating Point,  Prev: ARM Options,  Up: ARM-Dependent
6245
 
6246
9.3.2 Syntax
6247
------------
6248
 
6249
* Menu:
6250
 
6251
* ARM-Chars::                Special Characters
6252
* ARM-Regs::                 Register Names
6253
* ARM-Relocations::          Relocations
6254
 
6255

6256
File: as.info,  Node: ARM-Chars,  Next: ARM-Regs,  Up: ARM Syntax
6257
 
6258
9.3.2.1 Special Characters
6259
..........................
6260
 
6261
The presence of a `@' on a line indicates the start of a comment that
6262
extends to the end of the current line.  If a `#' appears as the first
6263
character of a line, the whole line is treated as a comment.
6264
 
6265
   The `;' character can be used instead of a newline to separate
6266
statements.
6267
 
6268
   Either `#' or `$' can be used to indicate immediate operands.
6269
 
6270
   *TODO* Explain about /data modifier on symbols.
6271
 
6272

6273
File: as.info,  Node: ARM-Regs,  Next: ARM-Relocations,  Prev: ARM-Chars,  Up: ARM Syntax
6274
 
6275
9.3.2.2 Register Names
6276
......................
6277
 
6278
*TODO* Explain about ARM register naming, and the predefined names.
6279
 
6280

6281
File: as.info,  Node: ARM Floating Point,  Next: ARM Directives,  Prev: ARM Syntax,  Up: ARM-Dependent
6282
 
6283
9.3.3 Floating Point
6284
--------------------
6285
 
6286
The ARM family uses IEEE floating-point numbers.
6287
 
6288

6289
File: as.info,  Node: ARM-Relocations,  Prev: ARM-Regs,  Up: ARM Syntax
6290
 
6291
9.3.3.1 ARM relocation generation
6292
.................................
6293
 
6294
Specific data relocations can be generated by putting the relocation
6295
name in parentheses after the symbol name.  For example:
6296
 
6297
             .word foo(TARGET1)
6298
 
6299
   This will generate an `R_ARM_TARGET1' relocation against the symbol
6300
FOO.  The following relocations are supported: `GOT', `GOTOFF',
6301
`TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `GOTTPOFF'
6302
and `TPOFF'.
6303
 
6304
   For compatibility with older toolchains the assembler also accepts
6305
`(PLT)' after branch targets.  This will generate the deprecated
6306
`R_ARM_PLT32' relocation.
6307
 
6308
   Relocations for `MOVW' and `MOVT' instructions can be generated by
6309
prefixing the value with `#:lower16:' and `#:upper16' respectively.
6310
For example to load the 32-bit address of foo into r0:
6311
 
6312
             MOVW r0, #:lower16:foo
6313
             MOVT r0, #:upper16:foo
6314
 
6315

6316
File: as.info,  Node: ARM Directives,  Next: ARM Opcodes,  Prev: ARM Floating Point,  Up: ARM-Dependent
6317
 
6318
9.3.4 ARM Machine Directives
6319
----------------------------
6320
 
6321
`.align EXPRESSION [, EXPRESSION]'
6322
     This is the generic .ALIGN directive.  For the ARM however if the
6323
     first argument is zero (ie no alignment is needed) the assembler
6324
     will behave as if the argument had been 2 (ie pad to the next four
6325
     byte boundary).  This is for compatibility with ARM's own
6326
     assembler.
6327
 
6328
`NAME .req REGISTER NAME'
6329
     This creates an alias for REGISTER NAME called NAME.  For example:
6330
 
6331
                  foo .req r0
6332
 
6333
`.unreq ALIAS-NAME'
6334
     This undefines a register alias which was previously defined using
6335
     the `req', `dn' or `qn' directives.  For example:
6336
 
6337
                  foo .req r0
6338
                  .unreq foo
6339
 
6340
     An error occurs if the name is undefined.  Note - this pseudo op
6341
     can be used to delete builtin in register name aliases (eg 'r0').
6342
     This should only be done if it is really necessary.
6343
 
6344
`NAME .dn REGISTER NAME [.TYPE] [[INDEX]]'
6345
 
6346
`NAME .qn REGISTER NAME [.TYPE] [[INDEX]]'
6347
     The `dn' and `qn' directives are used to create typed and/or
6348
     indexed register aliases for use in Advanced SIMD Extension (Neon)
6349
     instructions.  The former should be used to create aliases of
6350
     double-precision registers, and the latter to create aliases of
6351
     quad-precision registers.
6352
 
6353
     If these directives are used to create typed aliases, those
6354
     aliases can be used in Neon instructions instead of writing types
6355
     after the mnemonic or after each operand.  For example:
6356
 
6357
                  x .dn d2.f32
6358
                  y .dn d3.f32
6359
                  z .dn d4.f32[1]
6360
                  vmul x,y,z
6361
 
6362
     This is equivalent to writing the following:
6363
 
6364
                  vmul.f32 d2,d3,d4[1]
6365
 
6366
     Aliases created using `dn' or `qn' can be destroyed using `unreq'.
6367
 
6368
`.code `[16|32]''
6369
     This directive selects the instruction set being generated. The
6370
     value 16 selects Thumb, with the value 32 selecting ARM.
6371
 
6372
`.thumb'
6373
     This performs the same action as .CODE 16.
6374
 
6375
`.arm'
6376
     This performs the same action as .CODE 32.
6377
 
6378
`.force_thumb'
6379
     This directive forces the selection of Thumb instructions, even if
6380
     the target processor does not support those instructions
6381
 
6382
`.thumb_func'
6383
     This directive specifies that the following symbol is the name of a
6384
     Thumb encoded function.  This information is necessary in order to
6385
     allow the assembler and linker to generate correct code for
6386
     interworking between Arm and Thumb instructions and should be used
6387
     even if interworking is not going to be performed.  The presence
6388
     of this directive also implies `.thumb'
6389
 
6390
     This directive is not neccessary when generating EABI objects.  On
6391
     these targets the encoding is implicit when generating Thumb code.
6392
 
6393
`.thumb_set'
6394
     This performs the equivalent of a `.set' directive in that it
6395
     creates a symbol which is an alias for another symbol (possibly
6396
     not yet defined).  This directive also has the added property in
6397
     that it marks the aliased symbol as being a thumb function entry
6398
     point, in the same way that the `.thumb_func' directive does.
6399
 
6400
`.ltorg'
6401
     This directive causes the current contents of the literal pool to
6402
     be dumped into the current section (which is assumed to be the
6403
     .text section) at the current location (aligned to a word
6404
     boundary).  `GAS' maintains a separate literal pool for each
6405
     section and each sub-section.  The `.ltorg' directive will only
6406
     affect the literal pool of the current section and sub-section.
6407
     At the end of assembly all remaining, un-empty literal pools will
6408
     automatically be dumped.
6409
 
6410
     Note - older versions of `GAS' would dump the current literal pool
6411
     any time a section change occurred.  This is no longer done, since
6412
     it prevents accurate control of the placement of literal pools.
6413
 
6414
`.pool'
6415
     This is a synonym for .ltorg.
6416
 
6417
`.fnstart'
6418
     Marks the start of a function with an unwind table entry.
6419
 
6420
`.fnend'
6421
     Marks the end of a function with an unwind table entry.  The
6422
     unwind index table entry is created when this directive is
6423
     processed.
6424
 
6425
     If no personality routine has been specified then standard
6426
     personality routine 0 or 1 will be used, depending on the number
6427
     of unwind opcodes required.
6428
 
6429
`.cantunwind'
6430
     Prevents unwinding through the current function.  No personality
6431
     routine or exception table data is required or permitted.
6432
 
6433
`.personality NAME'
6434
     Sets the personality routine for the current function to NAME.
6435
 
6436
`.personalityindex INDEX'
6437
     Sets the personality routine for the current function to the EABI
6438
     standard routine number INDEX
6439
 
6440
`.handlerdata'
6441
     Marks the end of the current function, and the start of the
6442
     exception table entry for that function.  Anything between this
6443
     directive and the `.fnend' directive will be added to the
6444
     exception table entry.
6445
 
6446
     Must be preceded by a `.personality' or `.personalityindex'
6447
     directive.
6448
 
6449
`.save REGLIST'
6450
     Generate unwinder annotations to restore the registers in REGLIST.
6451
     The format of REGLIST is the same as the corresponding
6452
     store-multiple instruction.
6453
 
6454
     _core registers_
6455
            .save {r4, r5, r6, lr}
6456
            stmfd sp!, {r4, r5, r6, lr}
6457
     _FPA registers_
6458
            .save f4, 2
6459
            sfmfd f4, 2, [sp]!
6460
     _VFP registers_
6461
            .save {d8, d9, d10}
6462
            fstmdx sp!, {d8, d9, d10}
6463
     _iWMMXt registers_
6464
            .save {wr10, wr11}
6465
            wstrd wr11, [sp, #-8]!
6466
            wstrd wr10, [sp, #-8]!
6467
          or
6468
            .save wr11
6469
            wstrd wr11, [sp, #-8]!
6470
            .save wr10
6471
            wstrd wr10, [sp, #-8]!
6472
 
6473
`.vsave VFP-REGLIST'
6474
     Generate unwinder annotations to restore the VFP registers in
6475
     VFP-REGLIST using FLDMD.  Also works for VFPv3 registers that are
6476
     to be restored using VLDM.  The format of VFP-REGLIST is the same
6477
     as the corresponding store-multiple instruction.
6478
 
6479
     _VFP registers_
6480
            .vsave {d8, d9, d10}
6481
            fstmdd sp!, {d8, d9, d10}
6482
     _VFPv3 registers_
6483
            .vsave {d15, d16, d17}
6484
            vstm sp!, {d15, d16, d17}
6485
 
6486
     Since FLDMX and FSTMX are now deprecated, this directive should be
6487
     used in favour of `.save' for saving VFP registers for ARMv6 and
6488
     above.
6489
 
6490
`.pad #COUNT'
6491
     Generate unwinder annotations for a stack adjustment of COUNT
6492
     bytes.  A positive value indicates the function prologue allocated
6493
     stack space by decrementing the stack pointer.
6494
 
6495
`.movsp REG [, #OFFSET]'
6496
     Tell the unwinder that REG contains an offset from the current
6497
     stack pointer.  If OFFSET is not specified then it is assumed to be
6498
     zero.
6499
 
6500
`.setfp FPREG, SPREG [, #OFFSET]'
6501
     Make all unwinder annotations relaive to a frame pointer.  Without
6502
     this the unwinder will use offsets from the stack pointer.
6503
 
6504
     The syntax of this directive is the same as the `sub' or `mov'
6505
     instruction used to set the frame pointer.  SPREG must be either
6506
     `sp' or mentioned in a previous `.movsp' directive.
6507
 
6508
          .movsp ip
6509
          mov ip, sp
6510
          ...
6511
          .setfp fp, ip, #4
6512
          sub fp, ip, #4
6513
 
6514
`.raw OFFSET, BYTE1, ...'
6515
     Insert one of more arbitary unwind opcode bytes, which are known
6516
     to adjust the stack pointer by OFFSET bytes.
6517
 
6518
     For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save
6519
     {r0}'
6520
 
6521
`.cpu NAME'
6522
     Select the target processor.  Valid values for NAME are the same as
6523
     for the `-mcpu' commandline option.
6524
 
6525
`.arch NAME'
6526
     Select the target architecture.  Valid values for NAME are the
6527
     same as for the `-march' commandline option.
6528
 
6529
`.object_arch NAME'
6530
     Override the architecture recorded in the EABI object attribute
6531
     section.  Valid values for NAME are the same as for the `.arch'
6532
     directive.  Typically this is useful when code uses runtime
6533
     detection of CPU features.
6534
 
6535
`.fpu NAME'
6536
     Select the floating point unit to assemble for.  Valid values for
6537
     NAME are the same as for the `-mfpu' commandline option.
6538
 
6539
`.eabi_attribute TAG, VALUE'
6540
     Set the EABI object attribute number TAG to VALUE.  The value is
6541
     either a `number', `"string"', or `number, "string"' depending on
6542
     the tag.
6543
 
6544
 
6545

6546
File: as.info,  Node: ARM Opcodes,  Next: ARM Mapping Symbols,  Prev: ARM Directives,  Up: ARM-Dependent
6547
 
6548
9.3.5 Opcodes
6549
-------------
6550
 
6551
`as' implements all the standard ARM opcodes.  It also implements
6552
several pseudo opcodes, including several synthetic load instructions.
6553
 
6554
`NOP'
6555
            nop
6556
 
6557
     This pseudo op will always evaluate to a legal ARM instruction
6558
     that does nothing.  Currently it will evaluate to MOV r0, r0.
6559
 
6560
`LDR'
6561
            ldr  , = 
6562
 
6563
     If expression evaluates to a numeric constant then a MOV or MVN
6564
     instruction will be used in place of the LDR instruction, if the
6565
     constant can be generated by either of these instructions.
6566
     Otherwise the constant will be placed into the nearest literal
6567
     pool (if it not already there) and a PC relative LDR instruction
6568
     will be generated.
6569
 
6570
`ADR'
6571
            adr  
6572
 
6573
     This instruction will load the address of LABEL into the indicated
6574
     register.  The instruction will evaluate to a PC relative ADD or
6575
     SUB instruction depending upon where the label is located.  If the
6576
     label is out of range, or if it is not defined in the same file
6577
     (and section) as the ADR instruction, then an error will be
6578
     generated.  This instruction will not make use of the literal pool.
6579
 
6580
`ADRL'
6581
            adrl  
6582
 
6583
     This instruction will load the address of LABEL into the indicated
6584
     register.  The instruction will evaluate to one or two PC relative
6585
     ADD or SUB instructions depending upon where the label is located.
6586
     If a second instruction is not needed a NOP instruction will be
6587
     generated in its place, so that this instruction is always 8 bytes
6588
     long.
6589
 
6590
     If the label is out of range, or if it is not defined in the same
6591
     file (and section) as the ADRL instruction, then an error will be
6592
     generated.  This instruction will not make use of the literal pool.
6593
 
6594
 
6595
   For information on the ARM or Thumb instruction sets, see `ARM
6596
Software Development Toolkit Reference Manual', Advanced RISC Machines
6597
Ltd.
6598
 
6599

6600
File: as.info,  Node: ARM Mapping Symbols,  Next: ARM Unwinding Tutorial,  Prev: ARM Opcodes,  Up: ARM-Dependent
6601
 
6602
9.3.6 Mapping Symbols
6603
---------------------
6604
 
6605
The ARM ELF specification requires that special symbols be inserted
6606
into object files to mark certain features:
6607
 
6608
`$a'
6609
     At the start of a region of code containing ARM instructions.
6610
 
6611
`$t'
6612
     At the start of a region of code containing THUMB instructions.
6613
 
6614
`$d'
6615
     At the start of a region of data.
6616
 
6617
 
6618
   The assembler will automatically insert these symbols for you - there
6619
is no need to code them yourself.  Support for tagging symbols ($b, $f,
6620
$p and $m) which is also mentioned in the current ARM ELF specification
6621
is not implemented.  This is because they have been dropped from the
6622
new EABI and so tools cannot rely upon their presence.
6623
 
6624

6625
File: as.info,  Node: ARM Unwinding Tutorial,  Prev: ARM Mapping Symbols,  Up: ARM-Dependent
6626
 
6627
9.3.7 Unwinding
6628
---------------
6629
 
6630
The ABI for the ARM Architecture specifies a standard format for
6631
exception unwind information.  This information is used when an
6632
exception is thrown to determine where control should be transferred.
6633
In particular, the unwind information is used to determine which
6634
function called the function that threw the exception, and which
6635
function called that one, and so forth.  This information is also used
6636
to restore the values of callee-saved registers in the function
6637
catching the exception.
6638
 
6639
   If you are writing functions in assembly code, and those functions
6640
call other functions that throw exceptions, you must use assembly
6641
pseudo ops to ensure that appropriate exception unwind information is
6642
generated.  Otherwise, if one of the functions called by your assembly
6643
code throws an exception, the run-time library will be unable to unwind
6644
the stack through your assembly code and your program will not behave
6645
correctly.
6646
 
6647
   To illustrate the use of these pseudo ops, we will examine the code
6648
that G++ generates for the following C++ input:
6649
 
6650
 
6651
void callee (int *);
6652
 
6653
int
6654
caller ()
6655
{
6656
  int i;
6657
  callee (&i);
6658
  return i;
6659
}
6660
 
6661
   This example does not show how to throw or catch an exception from
6662
assembly code.  That is a much more complex operation and should always
6663
be done in a high-level language, such as C++, that directly supports
6664
exceptions.
6665
 
6666
   The code generated by one particular version of G++ when compiling
6667
the example above is:
6668
 
6669
 
6670
_Z6callerv:
6671
        .fnstart
6672
.LFB2:
6673
        @ Function supports interworking.
6674
        @ args = 0, pretend = 0, frame = 8
6675
        @ frame_needed = 1, uses_anonymous_args = 0
6676
        stmfd   sp!, {fp, lr}
6677
        .save {fp, lr}
6678
.LCFI0:
6679
        .setfp fp, sp, #4
6680
        add     fp, sp, #4
6681
.LCFI1:
6682
        .pad #8
6683
        sub     sp, sp, #8
6684
.LCFI2:
6685
        sub     r3, fp, #8
6686
        mov     r0, r3
6687
        bl      _Z6calleePi
6688
        ldr     r3, [fp, #-8]
6689
        mov     r0, r3
6690
        sub     sp, fp, #4
6691
        ldmfd   sp!, {fp, lr}
6692
        bx      lr
6693
.LFE2:
6694
        .fnend
6695
 
6696
   Of course, the sequence of instructions varies based on the options
6697
you pass to GCC and on the version of GCC in use.  The exact
6698
instructions are not important since we are focusing on the pseudo ops
6699
that are used to generate unwind information.
6700
 
6701
   An important assumption made by the unwinder is that the stack frame
6702
does not change during the body of the function.  In particular, since
6703
we assume that the assembly code does not itself throw an exception,
6704
the only point where an exception can be thrown is from a call, such as
6705
the `bl' instruction above.  At each call site, the same saved
6706
registers (including `lr', which indicates the return address) must be
6707
located in the same locations relative to the frame pointer.
6708
 
6709
   The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op
6710
appears immediately before the first instruction of the function while
6711
the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears
6712
immediately after the last instruction of the function.  These pseudo
6713
ops specify the range of the function.
6714
 
6715
   Only the order of the other pseudos ops (e.g., `.setfp' or `.pad')
6716
matters; their exact locations are irrelevant.  In the example above,
6717
the compiler emits the pseudo ops with particular instructions.  That
6718
makes it easier to understand the code, but it is not required for
6719
correctness.  It would work just as well to emit all of the pseudo ops
6720
other than `.fnend' in the same order, but immediately after `.fnstart'.
6721
 
6722
   The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates
6723
registers that have been saved to the stack so that they can be
6724
restored before the function returns.  The argument to the `.save'
6725
pseudo op is a list of registers to save.  If a register is
6726
"callee-saved" (as specified by the ABI) and is modified by the
6727
function you are writing, then your code must save the value before it
6728
is modified and restore the original value before the function returns.
6729
If an exception is thrown, the run-time library restores the values of
6730
these registers from their locations on the stack before returning
6731
control to the exception handler.  (Of course, if an exception is not
6732
thrown, the function that contains the `.save' pseudo op restores these
6733
registers in the function epilogue, as is done with the `ldmfd'
6734
instruction above.)
6735
 
6736
   You do not have to save callee-saved registers at the very beginning
6737
of the function and you do not need to use the `.save' pseudo op
6738
immediately following the point at which the registers are saved.
6739
However, if you modify a callee-saved register, you must save it on the
6740
stack before modifying it and before calling any functions which might
6741
throw an exception.  And, you must use the `.save' pseudo op to
6742
indicate that you have done so.
6743
 
6744
   The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification
6745
of the stack pointer that does not save any registers.  The argument is
6746
the number of bytes (in decimal) that are subtracted from the stack
6747
pointer.  (On ARM CPUs, the stack grows downwards, so subtracting from
6748
the stack pointer increases the size of the stack.)
6749
 
6750
   The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op
6751
indicates the register that contains the frame pointer.  The first
6752
argument is the register that is set, which is typically `fp'.  The
6753
second argument indicates the register from which the frame pointer
6754
takes its value.  The third argument, if present, is the value (in
6755
decimal) added to the register specified by the second argument to
6756
compute the value of the frame pointer.  You should not modify the
6757
frame pointer in the body of the function.
6758
 
6759
   If you do not use a frame pointer, then you should not use the
6760
`.setfp' pseudo op.  If you do not use a frame pointer, then you should
6761
avoid modifying the stack pointer outside of the function prologue.
6762
Otherwise, the run-time library will be unable to find saved registers
6763
when it is unwinding the stack.
6764
 
6765
   The pseudo ops described above are sufficient for writing assembly
6766
code that calls functions which may throw exceptions.  If you need to
6767
know more about the object-file format used to represent unwind
6768
information, you may consult the `Exception Handling ABI for the ARM
6769
Architecture' available from `http://infocenter.arm.com'.
6770
 
6771

6772
File: as.info,  Node: AVR-Dependent,  Next: BFIN-Dependent,  Prev: ARM-Dependent,  Up: Machine Dependencies
6773
 
6774
9.4 AVR Dependent Features
6775
==========================
6776
 
6777
* Menu:
6778
 
6779
* AVR Options::              Options
6780
* AVR Syntax::               Syntax
6781
* AVR Opcodes::              Opcodes
6782
 
6783

6784
File: as.info,  Node: AVR Options,  Next: AVR Syntax,  Up: AVR-Dependent
6785
 
6786
9.4.1 Options
6787
-------------
6788
 
6789
`-mmcu=MCU'
6790
     Specify ATMEL AVR instruction set or MCU type.
6791
 
6792
     Instruction set avr1 is for the minimal AVR core, not supported by
6793
     the C compiler, only for assembler programs (MCU types: at90s1200,
6794
     attiny11, attiny12, attiny15, attiny28).
6795
 
6796
     Instruction set avr2 (default) is for the classic AVR core with up
6797
     to 8K program memory space (MCU types: at90s2313, at90s2323,
6798
     at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433,
6799
     at90s4434, at90s8515, at90c8534, at90s8535).
6800
 
6801
     Instruction set avr25 is for the classic AVR core with up to 8K
6802
     program memory space plus the MOVW instruction (MCU types:
6803
     attiny13, attiny13a, attiny2313, attiny24, attiny44, attiny84,
6804
     attiny25, attiny45, attiny85, attiny261, attiny461, attiny861,
6805
     attiny43u, attiny48, attiny88, at86rf401).
6806
 
6807
     Instruction set avr3 is for the classic AVR core with up to 128K
6808
     program memory space (MCU types: at43usb355, at76c711).
6809
 
6810
     Instruction set avr31 is for the classic AVR core with exactly
6811
     128K program memory space (MCU types: atmega103, at43usb320).
6812
 
6813
     Instruction set avr35 is for classic AVR core plus MOVW, CALL, and
6814
     JMP instructions (MCU types: attiny167, at90usb82, at90usb162).
6815
 
6816
     Instruction set avr4 is for the enhanced AVR core with up to 8K
6817
     program memory space (MCU types: atmega48, atmega48p,atmega8,
6818
     atmega88, atmega88p, atmega8515, atmega8535, atmega8hva, at90pwm1,
6819
     at90pwm2, at90pwm2b, at90pwm3, at90pwm3b).
6820
 
6821
     Instruction set avr5 is for the enhanced AVR core with up to 128K
6822
     program memory space (MCU types: atmega16, atmega161, atmega162,
6823
     atmega163, atmega164p, atmega165, atmega165p, atmega168,
6824
     atmega168p, atmega169, atmega169p, atmega32, atmega323,
6825
     atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
6826
     atmega328p, atmega329, atmega329p, atmega3290, atmega3290p,
6827
     atmega406, atmega64, atmega640, atmega644, atmega644p, atmega645,
6828
     atmega6450, atmega649, atmega6490, atmega16hva, at90can32,
6829
     at90can64, at90pwm216, at90pwm316, atmega16u4, atmega32c1,
6830
     atmega32m1, atmega32u4, at90usb646, at90usb647, at94k).
6831
 
6832
     Instruction set avr51 is for the enhanced AVR core with exactly
6833
     128K program memory space (MCU types: atmega128, atmega1280,
6834
     atmega1281, atmega1284p, at90can128, at90usb1286, at90usb1287).
6835
 
6836
     Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
6837
     (MCU types: atmega2560, atmega2561).
6838
 
6839
`-mall-opcodes'
6840
     Accept all AVR opcodes, even if not supported by `-mmcu'.
6841
 
6842
`-mno-skip-bug'
6843
     This option disable warnings for skipping two-word instructions.
6844
 
6845
`-mno-wrap'
6846
     This option reject `rjmp/rcall' instructions with 8K wrap-around.
6847
 
6848
 
6849

6850
File: as.info,  Node: AVR Syntax,  Next: AVR Opcodes,  Prev: AVR Options,  Up: AVR-Dependent
6851
 
6852
9.4.2 Syntax
6853
------------
6854
 
6855
* Menu:
6856
 
6857
* AVR-Chars::                Special Characters
6858
* AVR-Regs::                 Register Names
6859
* AVR-Modifiers::            Relocatable Expression Modifiers
6860
 
6861

6862
File: as.info,  Node: AVR-Chars,  Next: AVR-Regs,  Up: AVR Syntax
6863
 
6864
9.4.2.1 Special Characters
6865
..........................
6866
 
6867
The presence of a `;' on a line indicates the start of a comment that
6868
extends to the end of the current line.  If a `#' appears as the first
6869
character of a line, the whole line is treated as a comment.
6870
 
6871
   The `$' character can be used instead of a newline to separate
6872
statements.
6873
 
6874

6875
File: as.info,  Node: AVR-Regs,  Next: AVR-Modifiers,  Prev: AVR-Chars,  Up: AVR Syntax
6876
 
6877
9.4.2.2 Register Names
6878
......................
6879
 
6880
The AVR has 32 x 8-bit general purpose working registers `r0', `r1',
6881
... `r31'.  Six of the 32 registers can be used as three 16-bit
6882
indirect address register pointers for Data Space addressing. One of
6883
the these address pointers can also be used as an address pointer for
6884
look up tables in Flash program memory. These added function registers
6885
are the 16-bit `X', `Y' and `Z' - registers.
6886
 
6887
     X = r26:r27
6888
     Y = r28:r29
6889
     Z = r30:r31
6890
 
6891

6892
File: as.info,  Node: AVR-Modifiers,  Prev: AVR-Regs,  Up: AVR Syntax
6893
 
6894
9.4.2.3 Relocatable Expression Modifiers
6895
........................................
6896
 
6897
The assembler supports several modifiers when using relocatable
6898
addresses in AVR instruction operands.  The general syntax is the
6899
following:
6900
 
6901
     modifier(relocatable-expression)
6902
 
6903
`lo8'
6904
     This modifier allows you to use bits 0 through 7 of an address
6905
     expression as 8 bit relocatable expression.
6906
 
6907
`hi8'
6908
     This modifier allows you to use bits 7 through 15 of an address
6909
     expression as 8 bit relocatable expression.  This is useful with,
6910
     for example, the AVR `ldi' instruction and `lo8' modifier.
6911
 
6912
     For example
6913
 
6914
          ldi r26, lo8(sym+10)
6915
          ldi r27, hi8(sym+10)
6916
 
6917
`hh8'
6918
     This modifier allows you to use bits 16 through 23 of an address
6919
     expression as 8 bit relocatable expression.  Also, can be useful
6920
     for loading 32 bit constants.
6921
 
6922
`hlo8'
6923
     Synonym of `hh8'.
6924
 
6925
`hhi8'
6926
     This modifier allows you to use bits 24 through 31 of an
6927
     expression as 8 bit expression. This is useful with, for example,
6928
     the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8',
6929
     modifier.
6930
 
6931
     For example
6932
 
6933
          ldi r26, lo8(285774925)
6934
          ldi r27, hi8(285774925)
6935
          ldi r28, hlo8(285774925)
6936
          ldi r29, hhi8(285774925)
6937
          ; r29,r28,r27,r26 = 285774925
6938
 
6939
`pm_lo8'
6940
     This modifier allows you to use bits 0 through 7 of an address
6941
     expression as 8 bit relocatable expression.  This modifier useful
6942
     for addressing data or code from Flash/Program memory. The using
6943
     of `pm_lo8' similar to `lo8'.
6944
 
6945
`pm_hi8'
6946
     This modifier allows you to use bits 8 through 15 of an address
6947
     expression as 8 bit relocatable expression.  This modifier useful
6948
     for addressing data or code from Flash/Program memory.
6949
 
6950
`pm_hh8'
6951
     This modifier allows you to use bits 15 through 23 of an address
6952
     expression as 8 bit relocatable expression.  This modifier useful
6953
     for addressing data or code from Flash/Program memory.
6954
 
6955
 
6956

6957
File: as.info,  Node: AVR Opcodes,  Prev: AVR Syntax,  Up: AVR-Dependent
6958
 
6959
9.4.3 Opcodes
6960
-------------
6961
 
6962
For detailed information on the AVR machine instruction set, see
6963
`www.atmel.com/products/AVR'.
6964
 
6965
   `as' implements all the standard AVR opcodes.  The following table
6966
summarizes the AVR opcodes, and their arguments.
6967
 
6968
     Legend:
6969
        r   any register
6970
        d   `ldi' register (r16-r31)
6971
        v   `movw' even register (r0, r2, ..., r28, r30)
6972
        a   `fmul' register (r16-r23)
6973
        w   `adiw' register (r24,r26,r28,r30)
6974
        e   pointer registers (X,Y,Z)
6975
        b   base pointer register and displacement ([YZ]+disp)
6976
        z   Z pointer register (for [e]lpm Rd,Z[+])
6977
        M   immediate value from 0 to 255
6978
        n   immediate value from 0 to 255 ( n = ~M ). Relocation impossible
6979
        s   immediate value from 0 to 7
6980
        P   Port address value from 0 to 63. (in, out)
6981
        p   Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
6982
        K   immediate value from 0 to 63 (used in `adiw', `sbiw')
6983
        i   immediate value
6984
        l   signed pc relative offset from -64 to 63
6985
        L   signed pc relative offset from -2048 to 2047
6986
        h   absolute code address (call, jmp)
6987
        S   immediate value from 0 to 7 (S = s << 4)
6988
        ?   use this opcode entry if no parameters, else use next opcode entry
6989
 
6990
     1001010010001000   clc
6991
     1001010011011000   clh
6992
     1001010011111000   cli
6993
     1001010010101000   cln
6994
     1001010011001000   cls
6995
     1001010011101000   clt
6996
     1001010010111000   clv
6997
     1001010010011000   clz
6998
     1001010000001000   sec
6999
     1001010001011000   seh
7000
     1001010001111000   sei
7001
     1001010000101000   sen
7002
     1001010001001000   ses
7003
     1001010001101000   set
7004
     1001010000111000   sev
7005
     1001010000011000   sez
7006
     100101001SSS1000   bclr    S
7007
     100101000SSS1000   bset    S
7008
     1001010100001001   icall
7009
     1001010000001001   ijmp
7010
     1001010111001000   lpm     ?
7011
     1001000ddddd010+   lpm     r,z
7012
     1001010111011000   elpm    ?
7013
     1001000ddddd011+   elpm    r,z
7014
     0000000000000000   nop
7015
     1001010100001000   ret
7016
     1001010100011000   reti
7017
     1001010110001000   sleep
7018
     1001010110011000   break
7019
     1001010110101000   wdr
7020
     1001010111101000   spm
7021
     000111rdddddrrrr   adc     r,r
7022
     000011rdddddrrrr   add     r,r
7023
     001000rdddddrrrr   and     r,r
7024
     000101rdddddrrrr   cp      r,r
7025
     000001rdddddrrrr   cpc     r,r
7026
     000100rdddddrrrr   cpse    r,r
7027
     001001rdddddrrrr   eor     r,r
7028
     001011rdddddrrrr   mov     r,r
7029
     100111rdddddrrrr   mul     r,r
7030
     001010rdddddrrrr   or      r,r
7031
     000010rdddddrrrr   sbc     r,r
7032
     000110rdddddrrrr   sub     r,r
7033
     001001rdddddrrrr   clr     r
7034
     000011rdddddrrrr   lsl     r
7035
     000111rdddddrrrr   rol     r
7036
     001000rdddddrrrr   tst     r
7037
     0111KKKKddddKKKK   andi    d,M
7038
     0111KKKKddddKKKK   cbr     d,n
7039
     1110KKKKddddKKKK   ldi     d,M
7040
     11101111dddd1111   ser     d
7041
     0110KKKKddddKKKK   ori     d,M
7042
     0110KKKKddddKKKK   sbr     d,M
7043
     0011KKKKddddKKKK   cpi     d,M
7044
     0100KKKKddddKKKK   sbci    d,M
7045
     0101KKKKddddKKKK   subi    d,M
7046
     1111110rrrrr0sss   sbrc    r,s
7047
     1111111rrrrr0sss   sbrs    r,s
7048
     1111100ddddd0sss   bld     r,s
7049
     1111101ddddd0sss   bst     r,s
7050
     10110PPdddddPPPP   in      r,P
7051
     10111PPrrrrrPPPP   out     P,r
7052
     10010110KKddKKKK   adiw    w,K
7053
     10010111KKddKKKK   sbiw    w,K
7054
     10011000pppppsss   cbi     p,s
7055
     10011010pppppsss   sbi     p,s
7056
     10011001pppppsss   sbic    p,s
7057
     10011011pppppsss   sbis    p,s
7058
     111101lllllll000   brcc    l
7059
     111100lllllll000   brcs    l
7060
     111100lllllll001   breq    l
7061
     111101lllllll100   brge    l
7062
     111101lllllll101   brhc    l
7063
     111100lllllll101   brhs    l
7064
     111101lllllll111   brid    l
7065
     111100lllllll111   brie    l
7066
     111100lllllll000   brlo    l
7067
     111100lllllll100   brlt    l
7068
     111100lllllll010   brmi    l
7069
     111101lllllll001   brne    l
7070
     111101lllllll010   brpl    l
7071
     111101lllllll000   brsh    l
7072
     111101lllllll110   brtc    l
7073
     111100lllllll110   brts    l
7074
     111101lllllll011   brvc    l
7075
     111100lllllll011   brvs    l
7076
     111101lllllllsss   brbc    s,l
7077
     111100lllllllsss   brbs    s,l
7078
     1101LLLLLLLLLLLL   rcall   L
7079
     1100LLLLLLLLLLLL   rjmp    L
7080
     1001010hhhhh111h   call    h
7081
     1001010hhhhh110h   jmp     h
7082
     1001010rrrrr0101   asr     r
7083
     1001010rrrrr0000   com     r
7084
     1001010rrrrr1010   dec     r
7085
     1001010rrrrr0011   inc     r
7086
     1001010rrrrr0110   lsr     r
7087
     1001010rrrrr0001   neg     r
7088
     1001000rrrrr1111   pop     r
7089
     1001001rrrrr1111   push    r
7090
     1001010rrrrr0111   ror     r
7091
     1001010rrrrr0010   swap    r
7092
     00000001ddddrrrr   movw    v,v
7093
     00000010ddddrrrr   muls    d,d
7094
     000000110ddd0rrr   mulsu   a,a
7095
     000000110ddd1rrr   fmul    a,a
7096
     000000111ddd0rrr   fmuls   a,a
7097
     000000111ddd1rrr   fmulsu  a,a
7098
     1001001ddddd0000   sts     i,r
7099
     1001000ddddd0000   lds     r,i
7100
     10o0oo0dddddbooo   ldd     r,b
7101
     100!000dddddee-+   ld      r,e
7102
     10o0oo1rrrrrbooo   std     b,r
7103
     100!001rrrrree-+   st      e,r
7104
     1001010100011001   eicall
7105
     1001010000011001   eijmp
7106
 
7107

7108
File: as.info,  Node: BFIN-Dependent,  Next: CR16-Dependent,  Prev: AVR-Dependent,  Up: Machine Dependencies
7109
 
7110
9.5 Blackfin Dependent Features
7111
===============================
7112
 
7113
* Menu:
7114
 
7115
* BFIN Syntax::                 BFIN Syntax
7116
* BFIN Directives::             BFIN Directives
7117
 
7118

7119
File: as.info,  Node: BFIN Syntax,  Next: BFIN Directives,  Up: BFIN-Dependent
7120
 
7121
9.5.1 Syntax
7122
------------
7123
 
7124
`Special Characters'
7125
     Assembler input is free format and may appear anywhere on the line.
7126
     One instruction may extend across multiple lines or more than one
7127
     instruction may appear on the same line.  White space (space, tab,
7128
     comments or newline) may appear anywhere between tokens.  A token
7129
     must not have embedded spaces.  Tokens include numbers, register
7130
     names, keywords, user identifiers, and also some multicharacter
7131
     special symbols like "+=", "/*" or "||".
7132
 
7133
`Instruction Delimiting'
7134
     A semicolon must terminate every instruction.  Sometimes a complete
7135
     instruction will consist of more than one operation.  There are two
7136
     cases where this occurs.  The first is when two general operations
7137
     are combined.  Normally a comma separates the different parts, as
7138
     in
7139
 
7140
          a0= r3.h * r2.l, a1 = r3.l * r2.h ;
7141
 
7142
     The second case occurs when a general instruction is combined with
7143
     one or two memory references for joint issue.  The latter portions
7144
     are set off by a "||" token.
7145
 
7146
          a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
7147
 
7148
`Register Names'
7149
     The assembler treats register names and instruction keywords in a
7150
     case insensitive manner.  User identifiers are case sensitive.
7151
     Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the
7152
     assembler.
7153
 
7154
     Register names are reserved and may not be used as program
7155
     identifiers.
7156
 
7157
     Some operations (such as "Move Register") require a register pair.
7158
     Register pairs are always data registers and are denoted using a
7159
     colon, eg., R3:2.  The larger number must be written firsts.  Note
7160
     that the hardware only supports odd-even pairs, eg., R7:6, R5:4,
7161
     R3:2, and R1:0.
7162
 
7163
     Some instructions (such as -SP (Push Multiple)) require a group of
7164
     adjacent registers.  Adjacent registers are denoted in the syntax
7165
     by the range enclosed in parentheses and separated by a colon,
7166
     eg., (R7:3).  Again, the larger number appears first.
7167
 
7168
     Portions of a particular register may be individually specified.
7169
     This is written with a dot (".") following the register name and
7170
     then a letter denoting the desired portion.  For 32-bit registers,
7171
     ".H" denotes the most significant ("High") portion.  ".L" denotes
7172
     the least-significant portion.  The subdivisions of the 40-bit
7173
     registers are described later.
7174
 
7175
`Accumulators'
7176
     The set of 40-bit registers A1 and A0 that normally contain data
7177
     that is being manipulated.  Each accumulator can be accessed in
7178
     four ways.
7179
 
7180
    `one 40-bit register'
7181
          The register will be referred to as A1 or A0.
7182
 
7183
    `one 32-bit register'
7184
          The registers are designated as A1.W or A0.W.
7185
 
7186
    `two 16-bit registers'
7187
          The registers are designated as A1.H, A1.L, A0.H or A0.L.
7188
 
7189
    `one 8-bit register'
7190
          The registers are designated as A1.X or A0.X for the bits that
7191
          extend beyond bit 31.
7192
 
7193
`Data Registers'
7194
     The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7)
7195
     that normally contain data for manipulation.  These are
7196
     abbreviated as D-register or Dreg.  Data registers can be accessed
7197
     as 32-bit registers or as two independent 16-bit registers.  The
7198
     least significant 16 bits of each register is called the "low"
7199
     half and is designated with ".L" following the register name.  The
7200
     most significant 16 bits are called the "high" half and is
7201
     designated with ".H" following the name.
7202
 
7203
             R7.L, r2.h, r4.L, R0.H
7204
 
7205
`Pointer Registers'
7206
     The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP)
7207
     that normally contain byte addresses of data structures.  These are
7208
     abbreviated as P-register or Preg.
7209
 
7210
          p2, p5, fp, sp
7211
 
7212
`Stack Pointer SP'
7213
     The stack pointer contains the 32-bit address of the last occupied
7214
     byte location in the stack.  The stack grows by decrementing the
7215
     stack pointer.
7216
 
7217
`Frame Pointer FP'
7218
     The frame pointer contains the 32-bit address of the previous frame
7219
     pointer in the stack.  It is located at the top of a frame.
7220
 
7221
`Loop Top'
7222
     LT0 and LT1.  These registers contain the 32-bit address of the
7223
     top of a zero overhead loop.
7224
 
7225
`Loop Count'
7226
     LC0 and LC1.  These registers contain the 32-bit counter of the
7227
     zero overhead loop executions.
7228
 
7229
`Loop Bottom'
7230
     LB0 and LB1.  These registers contain the 32-bit address of the
7231
     bottom of a zero overhead loop.
7232
 
7233
`Index Registers'
7234
     The set of 32-bit registers (I0, I1, I2, I3) that normally contain
7235
     byte addresses of data structures.  Abbreviated I-register or Ireg.
7236
 
7237
`Modify Registers'
7238
     The set of 32-bit registers (M0, M1, M2, M3) that normally contain
7239
     offset values that are added and subracted to one of the index
7240
     registers.  Abbreviated as Mreg.
7241
 
7242
`Length Registers'
7243
     The set of 32-bit registers (L0, L1, L2, L3) that normally contain
7244
     the length in bytes of the circular buffer.  Abbreviated as Lreg.
7245
     Clear the Lreg to disable circular addressing for the
7246
     corresponding Ireg.
7247
 
7248
`Base Registers'
7249
     The set of 32-bit registers (B0, B1, B2, B3) that normally contain
7250
     the base address in bytes of the circular buffer.  Abbreviated as
7251
     Breg.
7252
 
7253
`Floating Point'
7254
     The Blackfin family has no hardware floating point but the .float
7255
     directive generates ieee floating point numbers for use with
7256
     software floating point libraries.
7257
 
7258
`Blackfin Opcodes'
7259
     For detailed information on the Blackfin machine instruction set,
7260
     see the Blackfin(r) Processor Instruction Set Reference.
7261
 
7262
 
7263

7264
File: as.info,  Node: BFIN Directives,  Prev: BFIN Syntax,  Up: BFIN-Dependent
7265
 
7266
9.5.2 Directives
7267
----------------
7268
 
7269
The following directives are provided for compatibility with the VDSP
7270
assembler.
7271
 
7272
`.byte2'
7273
     Initializes a four byte data object.
7274
 
7275
`.byte4'
7276
     Initializes a two byte data object.
7277
 
7278
`.db'
7279
     TBD
7280
 
7281
`.dd'
7282
     TBD
7283
 
7284
`.dw'
7285
     TBD
7286
 
7287
`.var'
7288
     Define and initialize a 32 bit data object.
7289
 
7290

7291
File: as.info,  Node: CR16-Dependent,  Next: CRIS-Dependent,  Prev: BFIN-Dependent,  Up: Machine Dependencies
7292
 
7293
9.6 CR16 Dependent Features
7294
===========================
7295
 
7296
* Menu:
7297
 
7298
* CR16 Operand Qualifiers::     CR16 Machine Operand Qualifiers
7299
 
7300

7301
File: as.info,  Node: CR16 Operand Qualifiers,  Up: CR16-Dependent
7302
 
7303
9.6.1 CR16 Operand Qualifiers
7304
-----------------------------
7305
 
7306
The National Semiconductor CR16 target of `as' has a few machine
7307
dependent operand qualifiers.
7308
 
7309
   Operand expression type qualifier is an optional field in the
7310
instruction operand, to determines the type of the expression field of
7311
an operand. The `@' is required. CR16 architecture uses one of the
7312
following expression qualifiers:
7313
 
7314
`s'
7315
     - `Specifies expression operand type as small'
7316
 
7317
`m'
7318
     - `Specifies expression operand type as medium'
7319
 
7320
`l'
7321
     - `Specifies expression operand type as large'
7322
 
7323
`c'
7324
     - `Specifies the CR16 Assembler generates a relocation entry for
7325
     the operand, where pc has implied bit, the expression is adjusted
7326
     accordingly. The linker uses the relocation entry to update the
7327
     operand address at link time.'
7328
 
7329
   CR16 target operand qualifiers and its size (in bits):
7330
 
7331
`Immediate Operand'
7332
     - s --- 4 bits
7333
 
7334
`'
7335
     - m --- 16 bits, for movb and movw instructions.
7336
 
7337
`'
7338
     - m --- 20 bits, movd instructions.
7339
 
7340
`'
7341
     - l --- 32 bits
7342
 
7343
`Absolute Operand'
7344
     - s --- Illegal specifier for this operand.
7345
 
7346
`'
7347
     - m --- 20 bits, movd instructions.
7348
 
7349
`Displacement Operand'
7350
     - s --- 8 bits
7351
 
7352
`'
7353
     - m --- 16 bits
7354
 
7355
`'
7356
     - l --- 24 bits
7357
 
7358
   For example:
7359
     1   `movw $_myfun@c,r1'
7360
 
7361
         This loads the address of _myfun, shifted right by 1, into r1.
7362
 
7363
     2   `movd $_myfun@c,(r2,r1)'
7364
 
7365
         This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
7366
 
7367
     3   `_myfun_ptr:'
7368
         `.long _myfun@c'
7369
         `loadd _myfun_ptr, (r1,r0)'
7370
         `jal (r1,r0)'
7371
 
7372
         This .long directive, the address of _myfunc, shifted right by 1 at link time.
7373
 
7374

7375
File: as.info,  Node: CRIS-Dependent,  Next: D10V-Dependent,  Prev: CR16-Dependent,  Up: Machine Dependencies
7376
 
7377
9.7 CRIS Dependent Features
7378
===========================
7379
 
7380
* Menu:
7381
 
7382
* CRIS-Opts::              Command-line Options
7383
* CRIS-Expand::            Instruction expansion
7384
* CRIS-Symbols::           Symbols
7385
* CRIS-Syntax::            Syntax
7386
 
7387

7388
File: as.info,  Node: CRIS-Opts,  Next: CRIS-Expand,  Up: CRIS-Dependent
7389
 
7390
9.7.1 Command-line Options
7391
--------------------------
7392
 
7393
The CRIS version of `as' has these machine-dependent command-line
7394
options.
7395
 
7396
   The format of the generated object files can be either ELF or a.out,
7397
specified by the command-line options `--emulation=crisaout' and
7398
`--emulation=criself'.  The default is ELF (criself), unless `as' has
7399
been configured specifically for a.out by using the configuration name
7400
`cris-axis-aout'.
7401
 
7402
   There are two different link-incompatible ELF object file variants
7403
for CRIS, for use in environments where symbols are expected to be
7404
prefixed by a leading `_' character and for environments without such a
7405
symbol prefix.  The variant used for GNU/Linux port has no symbol
7406
prefix.  Which variant to produce is specified by either of the options
7407
`--underscore' and `--no-underscore'.  The default is `--underscore'.
7408
Since symbols in CRIS a.out objects are expected to have a `_' prefix,
7409
specifying `--no-underscore' when generating a.out objects is an error.
7410
Besides the object format difference, the effect of this option is to
7411
parse register names differently (*note crisnous::).  The
7412
`--no-underscore' option makes a `$' register prefix mandatory.
7413
 
7414
   The option `--pic' must be passed to `as' in order to recognize the
7415
symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
7416
crispic::).  This will also affect expansion of instructions.  The
7417
expansion with `--pic' will use PC-relative rather than (slightly
7418
faster) absolute addresses in those expansions.
7419
 
7420
   The option `--march=ARCHITECTURE' specifies the recognized
7421
instruction set and recognized register names.  It also controls the
7422
architecture type of the object file.  Valid values for ARCHITECTURE
7423
are:
7424
`v0_v10'
7425
     All instructions and register names for any architecture variant
7426
     in the set v0...v10 are recognized.  This is the default if the
7427
     target is configured as cris-*.
7428
 
7429
`v10'
7430
     Only instructions and register names for CRIS v10 (as found in
7431
     ETRAX 100 LX) are recognized.  This is the default if the target
7432
     is configured as crisv10-*.
7433
 
7434
`v32'
7435
     Only instructions and register names for CRIS v32 (code name
7436
     Guinness) are recognized.  This is the default if the target is
7437
     configured as crisv32-*.  This value implies `--no-mul-bug-abort'.
7438
     (A subsequent `--mul-bug-abort' will turn it back on.)
7439
 
7440
`common_v10_v32'
7441
     Only instructions with register names and addressing modes with
7442
     opcodes common to the v10 and v32 are recognized.
7443
 
7444
   When `-N' is specified, `as' will emit a warning when a 16-bit
7445
branch instruction is expanded into a 32-bit multiple-instruction
7446
construct (*note CRIS-Expand::).
7447
 
7448
   Some versions of the CRIS v10, for example in the Etrax 100 LX,
7449
contain a bug that causes destabilizing memory accesses when a multiply
7450
instruction is executed with certain values in the first operand just
7451
before a cache-miss.  When the `--mul-bug-abort' command line option is
7452
active (the default value), `as' will refuse to assemble a file
7453
containing a multiply instruction at a dangerous offset, one that could
7454
be the last on a cache-line, or is in a section with insufficient
7455
alignment.  This placement checking does not catch any case where the
7456
multiply instruction is dangerously placed because it is located in a
7457
delay-slot.  The `--mul-bug-abort' command line option turns off the
7458
checking.
7459
 
7460

7461
File: as.info,  Node: CRIS-Expand,  Next: CRIS-Symbols,  Prev: CRIS-Opts,  Up: CRIS-Dependent
7462
 
7463
9.7.2 Instruction expansion
7464
---------------------------
7465
 
7466
`as' will silently choose an instruction that fits the operand size for
7467
`[register+constant]' operands.  For example, the offset `127' in
7468
`move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
7469
Similarly, `move.d [r2+32767],r1' will generate an instruction using a
7470
16-bit offset.  For symbolic expressions and constants that do not fit
7471
in 16 bits including the sign bit, a 32-bit offset is generated.
7472
 
7473
   For branches, `as' will expand from a 16-bit branch instruction into
7474
a sequence of instructions that can reach a full 32-bit address.  Since
7475
this does not correspond to a single instruction, such expansions can
7476
optionally be warned about.  *Note CRIS-Opts::.
7477
 
7478
   If the operand is found to fit the range, a `lapc' mnemonic will
7479
translate to a `lapcq' instruction.  Use `lapc.d' to force the 32-bit
7480
`lapc' instruction.
7481
 
7482
   Similarly, the `addo' mnemonic will translate to the shortest
7483
fitting instruction of `addoq', `addo.w' and `addo.d', when used with a
7484
operand that is a constant known at assembly time.
7485
 
7486

7487
File: as.info,  Node: CRIS-Symbols,  Next: CRIS-Syntax,  Prev: CRIS-Expand,  Up: CRIS-Dependent
7488
 
7489
9.7.3 Symbols
7490
-------------
7491
 
7492
Some symbols are defined by the assembler.  They're intended to be used
7493
in conditional assembly, for example:
7494
      .if ..asm.arch.cris.v32
7495
      CODE FOR CRIS V32
7496
      .elseif ..asm.arch.cris.common_v10_v32
7497
      CODE COMMON TO CRIS V32 AND CRIS V10
7498
      .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
7499
      CODE FOR V10
7500
      .else
7501
      .error "Code needs to be added here."
7502
      .endif
7503
 
7504
   These symbols are defined in the assembler, reflecting command-line
7505
options, either when specified or the default.  They are always
7506
defined, to 0 or 1.
7507
`..asm.arch.cris.any_v0_v10'
7508
     This symbol is non-zero when `--march=v0_v10' is specified or the
7509
     default.
7510
 
7511
`..asm.arch.cris.common_v10_v32'
7512
     Set according to the option `--march=common_v10_v32'.
7513
 
7514
`..asm.arch.cris.v10'
7515
     Reflects the option `--march=v10'.
7516
 
7517
`..asm.arch.cris.v32'
7518
     Corresponds to `--march=v10'.
7519
 
7520
   Speaking of symbols, when a symbol is used in code, it can have a
7521
suffix modifying its value for use in position-independent code. *Note
7522
CRIS-Pic::.
7523
 
7524

7525
File: as.info,  Node: CRIS-Syntax,  Prev: CRIS-Symbols,  Up: CRIS-Dependent
7526
 
7527
9.7.4 Syntax
7528
------------
7529
 
7530
There are different aspects of the CRIS assembly syntax.
7531
 
7532
* Menu:
7533
 
7534
* CRIS-Chars::                  Special Characters
7535
* CRIS-Pic::                    Position-Independent Code Symbols
7536
* CRIS-Regs::                   Register Names
7537
* CRIS-Pseudos::                Assembler Directives
7538
 
7539

7540
File: as.info,  Node: CRIS-Chars,  Next: CRIS-Pic,  Up: CRIS-Syntax
7541
 
7542
9.7.4.1 Special Characters
7543
..........................
7544
 
7545
The character `#' is a line comment character.  It starts a comment if
7546
and only if it is placed at the beginning of a line.
7547
 
7548
   A `;' character starts a comment anywhere on the line, causing all
7549
characters up to the end of the line to be ignored.
7550
 
7551
   A `@' character is handled as a line separator equivalent to a
7552
logical new-line character (except in a comment), so separate
7553
instructions can be specified on a single line.
7554
 
7555

7556
File: as.info,  Node: CRIS-Pic,  Next: CRIS-Regs,  Prev: CRIS-Chars,  Up: CRIS-Syntax
7557
 
7558
9.7.4.2 Symbols in position-independent code
7559
............................................
7560
 
7561
When generating position-independent code (SVR4 PIC) for use in
7562
cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol
7563
suffixes are used to specify what kind of run-time symbol lookup will
7564
be used, expressed in the object as different _relocation types_.
7565
Usually, all absolute symbol values must be located in a table, the
7566
_global offset table_, leaving the code position-independent;
7567
independent of values of global symbols and independent of the address
7568
of the code.  The suffix modifies the value of the symbol, into for
7569
example an index into the global offset table where the real symbol
7570
value is entered, or a PC-relative value, or a value relative to the
7571
start of the global offset table.  All symbol suffixes start with the
7572
character `:' (omitted in the list below).  Every symbol use in code or
7573
a read-only section must therefore have a PIC suffix to enable a useful
7574
shared library to be created.  Usually, these constructs must not be
7575
used with an additive constant offset as is usually allowed, i.e. no 4
7576
as in `symbol + 4' is allowed.  This restriction is checked at
7577
link-time, not at assembly-time.
7578
 
7579
`GOT'
7580
     Attaching this suffix to a symbol in an instruction causes the
7581
     symbol to be entered into the global offset table.  The value is a
7582
     32-bit index for that symbol into the global offset table.  The
7583
     name of the corresponding relocation is `R_CRIS_32_GOT'.  Example:
7584
     `move.d [$r0+extsym:GOT],$r9'
7585
 
7586
`GOT16'
7587
     Same as for `GOT', but the value is a 16-bit index into the global
7588
     offset table.  The corresponding relocation is `R_CRIS_16_GOT'.
7589
     Example: `move.d [$r0+asymbol:GOT16],$r10'
7590
 
7591
`PLT'
7592
     This suffix is used for function symbols.  It causes a _procedure
7593
     linkage table_, an array of code stubs, to be created at the time
7594
     the shared object is created or linked against, together with a
7595
     global offset table entry.  The value is a pc-relative offset to
7596
     the corresponding stub code in the procedure linkage table.  This
7597
     arrangement causes the run-time symbol resolver to be called to
7598
     look up and set the value of the symbol the first time the
7599
     function is called (at latest; depending environment variables).
7600
     It is only safe to leave the symbol unresolved this way if all
7601
     references are function calls.  The name of the relocation is
7602
     `R_CRIS_32_PLT_PCREL'.  Example: `add.d fnname:PLT,$pc'
7603
 
7604
`PLTG'
7605
     Like PLT, but the value is relative to the beginning of the global
7606
     offset table.  The relocation is `R_CRIS_32_PLT_GOTREL'.  Example:
7607
     `move.d fnname:PLTG,$r3'
7608
 
7609
`GOTPLT'
7610
     Similar to `PLT', but the value of the symbol is a 32-bit index
7611
     into the global offset table.  This is somewhat of a mix between
7612
     the effect of the `GOT' and the `PLT' suffix; the difference to
7613
     `GOT' is that there will be a procedure linkage table entry
7614
     created, and that the symbol is assumed to be a function entry and
7615
     will be resolved by the run-time resolver as with `PLT'.  The
7616
     relocation is `R_CRIS_32_GOTPLT'.  Example: `jsr
7617
     [$r0+fnname:GOTPLT]'
7618
 
7619
`GOTPLT16'
7620
     A variant of `GOTPLT' giving a 16-bit value.  Its relocation name
7621
     is `R_CRIS_16_GOTPLT'.  Example: `jsr [$r0+fnname:GOTPLT16]'
7622
 
7623
`GOTOFF'
7624
     This suffix must only be attached to a local symbol, but may be
7625
     used in an expression adding an offset.  The value is the address
7626
     of the symbol relative to the start of the global offset table.
7627
     The relocation name is `R_CRIS_32_GOTREL'.  Example: `move.d
7628
     [$r0+localsym:GOTOFF],r3'
7629
 
7630

7631
File: as.info,  Node: CRIS-Regs,  Next: CRIS-Pseudos,  Prev: CRIS-Pic,  Up: CRIS-Syntax
7632
 
7633
9.7.4.3 Register names
7634
......................
7635
 
7636
A `$' character may always prefix a general or special register name in
7637
an instruction operand but is mandatory when the option
7638
`--no-underscore' is specified or when the `.syntax register_prefix'
7639
directive is in effect (*note crisnous::).  Register names are
7640
case-insensitive.
7641
 
7642

7643
File: as.info,  Node: CRIS-Pseudos,  Prev: CRIS-Regs,  Up: CRIS-Syntax
7644
 
7645
9.7.4.4 Assembler Directives
7646
............................
7647
 
7648
There are a few CRIS-specific pseudo-directives in addition to the
7649
generic ones.  *Note Pseudo Ops::.  Constants emitted by
7650
pseudo-directives are in little-endian order for CRIS.  There is no
7651
support for floating-point-specific directives for CRIS.
7652
 
7653
`.dword EXPRESSIONS'
7654
     The `.dword' directive is a synonym for `.int', expecting zero or
7655
     more EXPRESSIONS, separated by commas.  For each expression, a
7656
     32-bit little-endian constant is emitted.
7657
 
7658
`.syntax ARGUMENT'
7659
     The `.syntax' directive takes as ARGUMENT one of the following
7660
     case-sensitive choices.
7661
 
7662
    `no_register_prefix'
7663
          The `.syntax no_register_prefix' directive makes a `$'
7664
          character prefix on all registers optional.  It overrides a
7665
          previous setting, including the corresponding effect of the
7666
          option `--no-underscore'.  If this directive is used when
7667
          ordinary symbols do not have a `_' character prefix, care
7668
          must be taken to avoid ambiguities whether an operand is a
7669
          register or a symbol; using symbols with names the same as
7670
          general or special registers then invoke undefined behavior.
7671
 
7672
    `register_prefix'
7673
          This directive makes a `$' character prefix on all registers
7674
          mandatory.  It overrides a previous setting, including the
7675
          corresponding effect of the option `--underscore'.
7676
 
7677
    `leading_underscore'
7678
          This is an assertion directive, emitting an error if the
7679
          `--no-underscore' option is in effect.
7680
 
7681
    `no_leading_underscore'
7682
          This is the opposite of the `.syntax leading_underscore'
7683
          directive and emits an error if the option `--underscore' is
7684
          in effect.
7685
 
7686
`.arch ARGUMENT'
7687
     This is an assertion directive, giving an error if the specified
7688
     ARGUMENT is not the same as the specified or default value for the
7689
     `--march=ARCHITECTURE' option (*note march-option::).
7690
 
7691
 
7692

7693
File: as.info,  Node: D10V-Dependent,  Next: D30V-Dependent,  Prev: CRIS-Dependent,  Up: Machine Dependencies
7694
 
7695
9.8 D10V Dependent Features
7696
===========================
7697
 
7698
* Menu:
7699
 
7700
* D10V-Opts::                   D10V Options
7701
* D10V-Syntax::                 Syntax
7702
* D10V-Float::                  Floating Point
7703
* D10V-Opcodes::                Opcodes
7704
 
7705

7706
File: as.info,  Node: D10V-Opts,  Next: D10V-Syntax,  Up: D10V-Dependent
7707
 
7708
9.8.1 D10V Options
7709
------------------
7710
 
7711
The Mitsubishi D10V version of `as' has a few machine dependent options.
7712
 
7713
`-O'
7714
     The D10V can often execute two sub-instructions in parallel. When
7715
     this option is used, `as' will attempt to optimize its output by
7716
     detecting when instructions can be executed in parallel.
7717
 
7718
`--nowarnswap'
7719
     To optimize execution performance, `as' will sometimes swap the
7720
     order of instructions. Normally this generates a warning. When
7721
     this option is used, no warning will be generated when
7722
     instructions are swapped.
7723
 
7724
`--gstabs-packing'
7725
 
7726
`--no-gstabs-packing'
7727
     `as' packs adjacent short instructions into a single packed
7728
     instruction. `--no-gstabs-packing' turns instruction packing off if
7729
     `--gstabs' is specified as well; `--gstabs-packing' (the default)
7730
     turns instruction packing on even when `--gstabs' is specified.
7731
 
7732

7733
File: as.info,  Node: D10V-Syntax,  Next: D10V-Float,  Prev: D10V-Opts,  Up: D10V-Dependent
7734
 
7735
9.8.2 Syntax
7736
------------
7737
 
7738
The D10V syntax is based on the syntax in Mitsubishi's D10V
7739
architecture manual.  The differences are detailed below.
7740
 
7741
* Menu:
7742
 
7743
* D10V-Size::                 Size Modifiers
7744
* D10V-Subs::                 Sub-Instructions
7745
* D10V-Chars::                Special Characters
7746
* D10V-Regs::                 Register Names
7747
* D10V-Addressing::           Addressing Modes
7748
* D10V-Word::                 @WORD Modifier
7749
 
7750

7751
File: as.info,  Node: D10V-Size,  Next: D10V-Subs,  Up: D10V-Syntax
7752
 
7753
9.8.2.1 Size Modifiers
7754
......................
7755
 
7756
The D10V version of `as' uses the instruction names in the D10V
7757
Architecture Manual.  However, the names in the manual are sometimes
7758
ambiguous.  There are instruction names that can assemble to a short or
7759
long form opcode.  How does the assembler pick the correct form?  `as'
7760
will always pick the smallest form if it can.  When dealing with a
7761
symbol that is not defined yet when a line is being assembled, it will
7762
always use the long form.  If you need to force the assembler to use
7763
either the short or long form of the instruction, you can append either
7764
`.s' (short) or `.l' (long) to it.  For example, if you are writing an
7765
assembly program and you want to do a branch to a symbol that is
7766
defined later in your program, you can write `bra.s   foo'.  Objdump
7767
and GDB will always append `.s' or `.l' to instructions which have both
7768
short and long forms.
7769
 
7770

7771
File: as.info,  Node: D10V-Subs,  Next: D10V-Chars,  Prev: D10V-Size,  Up: D10V-Syntax
7772
 
7773
9.8.2.2 Sub-Instructions
7774
........................
7775
 
7776
The D10V assembler takes as input a series of instructions, either
7777
one-per-line, or in the special two-per-line format described in the
7778
next section.  Some of these instructions will be short-form or
7779
sub-instructions.  These sub-instructions can be packed into a single
7780
instruction.  The assembler will do this automatically.  It will also
7781
detect when it should not pack instructions.  For example, when a label
7782
is defined, the next instruction will never be packaged with the
7783
previous one.  Whenever a branch and link instruction is called, it
7784
will not be packaged with the next instruction so the return address
7785
will be valid.  Nops are automatically inserted when necessary.
7786
 
7787
   If you do not want the assembler automatically making these
7788
decisions, you can control the packaging and execution type (parallel
7789
or sequential) with the special execution symbols described in the next
7790
section.
7791
 
7792

7793
File: as.info,  Node: D10V-Chars,  Next: D10V-Regs,  Prev: D10V-Subs,  Up: D10V-Syntax
7794
 
7795
9.8.2.3 Special Characters
7796
..........................
7797
 
7798
`;' and `#' are the line comment characters.  Sub-instructions may be
7799
executed in order, in reverse-order, or in parallel.  Instructions
7800
listed in the standard one-per-line format will be executed
7801
sequentially.  To specify the executing order, use the following
7802
symbols:
7803
`->'
7804
     Sequential with instruction on the left first.
7805
 
7806
`<-'
7807
     Sequential with instruction on the right first.
7808
 
7809
`||'
7810
     Parallel
7811
   The D10V syntax allows either one instruction per line, one
7812
instruction per line with the execution symbol, or two instructions per
7813
line.  For example
7814
`abs       a1      ->      abs     r0'
7815
     Execute these sequentially.  The instruction on the right is in
7816
     the right container and is executed second.
7817
 
7818
`abs       r0      <-      abs     a1'
7819
     Execute these reverse-sequentially.  The instruction on the right
7820
     is in the right container, and is executed first.
7821
 
7822
`ld2w    r2,@r8+         ||      mac     a0,r0,r7'
7823
     Execute these in parallel.
7824
 
7825
`ld2w    r2,@r8+         ||'
7826
`mac     a0,r0,r7'
7827
     Two-line format. Execute these in parallel.
7828
 
7829
`ld2w    r2,@r8+'
7830
`mac     a0,r0,r7'
7831
     Two-line format. Execute these sequentially.  Assembler will put
7832
     them in the proper containers.
7833
 
7834
`ld2w    r2,@r8+         ->'
7835
`mac     a0,r0,r7'
7836
     Two-line format. Execute these sequentially.  Same as above but
7837
     second instruction will always go into right container.
7838
   Since `$' has no special meaning, you may use it in symbol names.
7839
 
7840

7841
File: as.info,  Node: D10V-Regs,  Next: D10V-Addressing,  Prev: D10V-Chars,  Up: D10V-Syntax
7842
 
7843
9.8.2.4 Register Names
7844
......................
7845
 
7846
You can use the predefined symbols `r0' through `r15' to refer to the
7847
D10V registers.  You can also use `sp' as an alias for `r15'.  The
7848
accumulators are `a0' and `a1'.  There are special register-pair names
7849
that may optionally be used in opcodes that require even-numbered
7850
registers. Register names are not case sensitive.
7851
 
7852
   Register Pairs
7853
`r0-r1'
7854
 
7855
`r2-r3'
7856
 
7857
`r4-r5'
7858
 
7859
`r6-r7'
7860
 
7861
`r8-r9'
7862
 
7863
`r10-r11'
7864
 
7865
`r12-r13'
7866
 
7867
`r14-r15'
7868
 
7869
   The D10V also has predefined symbols for these control registers and
7870
status bits:
7871
`psw'
7872
     Processor Status Word
7873
 
7874
`bpsw'
7875
     Backup Processor Status Word
7876
 
7877
`pc'
7878
     Program Counter
7879
 
7880
`bpc'
7881
     Backup Program Counter
7882
 
7883
`rpt_c'
7884
     Repeat Count
7885
 
7886
`rpt_s'
7887
     Repeat Start address
7888
 
7889
`rpt_e'
7890
     Repeat End address
7891
 
7892
`mod_s'
7893
     Modulo Start address
7894
 
7895
`mod_e'
7896
     Modulo End address
7897
 
7898
`iba'
7899
     Instruction Break Address
7900
 
7901
`f0'
7902
     Flag 0
7903
 
7904
`f1'
7905
     Flag 1
7906
 
7907
`c'
7908
     Carry flag
7909
 
7910

7911
File: as.info,  Node: D10V-Addressing,  Next: D10V-Word,  Prev: D10V-Regs,  Up: D10V-Syntax
7912
 
7913
9.8.2.5 Addressing Modes
7914
........................
7915
 
7916
`as' understands the following addressing modes for the D10V.  `RN' in
7917
the following refers to any of the numbered registers, but _not_ the
7918
control registers.
7919
`RN'
7920
     Register direct
7921
 
7922
`@RN'
7923
     Register indirect
7924
 
7925
`@RN+'
7926
     Register indirect with post-increment
7927
 
7928
`@RN-'
7929
     Register indirect with post-decrement
7930
 
7931
`@-SP'
7932
     Register indirect with pre-decrement
7933
 
7934
`@(DISP, RN)'
7935
     Register indirect with displacement
7936
 
7937
`ADDR'
7938
     PC relative address (for branch or rep).
7939
 
7940
`#IMM'
7941
     Immediate data (the `#' is optional and ignored)
7942
 
7943

7944
File: as.info,  Node: D10V-Word,  Prev: D10V-Addressing,  Up: D10V-Syntax
7945
 
7946
9.8.2.6 @WORD Modifier
7947
......................
7948
 
7949
Any symbol followed by `@word' will be replaced by the symbol's value
7950
shifted right by 2.  This is used in situations such as loading a
7951
register with the address of a function (or any other code fragment).
7952
For example, if you want to load a register with the location of the
7953
function `main' then jump to that function, you could do it as follows:
7954
     ldi     r2, main@word
7955
     jmp     r2
7956
 
7957

7958
File: as.info,  Node: D10V-Float,  Next: D10V-Opcodes,  Prev: D10V-Syntax,  Up: D10V-Dependent
7959
 
7960
9.8.3 Floating Point
7961
--------------------
7962
 
7963
The D10V has no hardware floating point, but the `.float' and `.double'
7964
directives generates IEEE floating-point numbers for compatibility with
7965
other development tools.
7966
 
7967

7968
File: as.info,  Node: D10V-Opcodes,  Prev: D10V-Float,  Up: D10V-Dependent
7969
 
7970
9.8.4 Opcodes
7971
-------------
7972
 
7973
For detailed information on the D10V machine instruction set, see `D10V
7974
Architecture: A VLIW Microprocessor for Multimedia Applications'
7975
(Mitsubishi Electric Corp.).  `as' implements all the standard D10V
7976
opcodes.  The only changes are those described in the section on size
7977
modifiers
7978
 
7979

7980
File: as.info,  Node: D30V-Dependent,  Next: H8/300-Dependent,  Prev: D10V-Dependent,  Up: Machine Dependencies
7981
 
7982
9.9 D30V Dependent Features
7983
===========================
7984
 
7985
* Menu:
7986
 
7987
* D30V-Opts::                   D30V Options
7988
* D30V-Syntax::                 Syntax
7989
* D30V-Float::                  Floating Point
7990
* D30V-Opcodes::                Opcodes
7991
 
7992

7993
File: as.info,  Node: D30V-Opts,  Next: D30V-Syntax,  Up: D30V-Dependent
7994
 
7995
9.9.1 D30V Options
7996
------------------
7997
 
7998
The Mitsubishi D30V version of `as' has a few machine dependent options.
7999
 
8000
`-O'
8001
     The D30V can often execute two sub-instructions in parallel. When
8002
     this option is used, `as' will attempt to optimize its output by
8003
     detecting when instructions can be executed in parallel.
8004
 
8005
`-n'
8006
     When this option is used, `as' will issue a warning every time it
8007
     adds a nop instruction.
8008
 
8009
`-N'
8010
     When this option is used, `as' will issue a warning if it needs to
8011
     insert a nop after a 32-bit multiply before a load or 16-bit
8012
     multiply instruction.
8013
 
8014

8015
File: as.info,  Node: D30V-Syntax,  Next: D30V-Float,  Prev: D30V-Opts,  Up: D30V-Dependent
8016
 
8017
9.9.2 Syntax
8018
------------
8019
 
8020
The D30V syntax is based on the syntax in Mitsubishi's D30V
8021
architecture manual.  The differences are detailed below.
8022
 
8023
* Menu:
8024
 
8025
* D30V-Size::                 Size Modifiers
8026
* D30V-Subs::                 Sub-Instructions
8027
* D30V-Chars::                Special Characters
8028
* D30V-Guarded::              Guarded Execution
8029
* D30V-Regs::                 Register Names
8030
* D30V-Addressing::           Addressing Modes
8031
 
8032

8033
File: as.info,  Node: D30V-Size,  Next: D30V-Subs,  Up: D30V-Syntax
8034
 
8035
9.9.2.1 Size Modifiers
8036
......................
8037
 
8038
The D30V version of `as' uses the instruction names in the D30V
8039
Architecture Manual.  However, the names in the manual are sometimes
8040
ambiguous.  There are instruction names that can assemble to a short or
8041
long form opcode.  How does the assembler pick the correct form?  `as'
8042
will always pick the smallest form if it can.  When dealing with a
8043
symbol that is not defined yet when a line is being assembled, it will
8044
always use the long form.  If you need to force the assembler to use
8045
either the short or long form of the instruction, you can append either
8046
`.s' (short) or `.l' (long) to it.  For example, if you are writing an
8047
assembly program and you want to do a branch to a symbol that is
8048
defined later in your program, you can write `bra.s foo'.  Objdump and
8049
GDB will always append `.s' or `.l' to instructions which have both
8050
short and long forms.
8051
 
8052

8053
File: as.info,  Node: D30V-Subs,  Next: D30V-Chars,  Prev: D30V-Size,  Up: D30V-Syntax
8054
 
8055
9.9.2.2 Sub-Instructions
8056
........................
8057
 
8058
The D30V assembler takes as input a series of instructions, either
8059
one-per-line, or in the special two-per-line format described in the
8060
next section.  Some of these instructions will be short-form or
8061
sub-instructions.  These sub-instructions can be packed into a single
8062
instruction.  The assembler will do this automatically.  It will also
8063
detect when it should not pack instructions.  For example, when a label
8064
is defined, the next instruction will never be packaged with the
8065
previous one.  Whenever a branch and link instruction is called, it
8066
will not be packaged with the next instruction so the return address
8067
will be valid.  Nops are automatically inserted when necessary.
8068
 
8069
   If you do not want the assembler automatically making these
8070
decisions, you can control the packaging and execution type (parallel
8071
or sequential) with the special execution symbols described in the next
8072
section.
8073
 
8074

8075
File: as.info,  Node: D30V-Chars,  Next: D30V-Guarded,  Prev: D30V-Subs,  Up: D30V-Syntax
8076
 
8077
9.9.2.3 Special Characters
8078
..........................
8079
 
8080
`;' and `#' are the line comment characters.  Sub-instructions may be
8081
executed in order, in reverse-order, or in parallel.  Instructions
8082
listed in the standard one-per-line format will be executed
8083
sequentially unless you use the `-O' option.
8084
 
8085
   To specify the executing order, use the following symbols:
8086
`->'
8087
     Sequential with instruction on the left first.
8088
 
8089
`<-'
8090
     Sequential with instruction on the right first.
8091
 
8092
`||'
8093
     Parallel
8094
 
8095
   The D30V syntax allows either one instruction per line, one
8096
instruction per line with the execution symbol, or two instructions per
8097
line.  For example
8098
`abs r2,r3 -> abs r4,r5'
8099
     Execute these sequentially.  The instruction on the right is in
8100
     the right container and is executed second.
8101
 
8102
`abs r2,r3 <- abs r4,r5'
8103
     Execute these reverse-sequentially.  The instruction on the right
8104
     is in the right container, and is executed first.
8105
 
8106
`abs r2,r3 || abs r4,r5'
8107
     Execute these in parallel.
8108
 
8109
`ldw r2,@(r3,r4) ||'
8110
`mulx r6,r8,r9'
8111
     Two-line format. Execute these in parallel.
8112
 
8113
`mulx a0,r8,r9'
8114
`stw r2,@(r3,r4)'
8115
     Two-line format. Execute these sequentially unless `-O' option is
8116
     used.  If the `-O' option is used, the assembler will determine if
8117
     the instructions could be done in parallel (the above two
8118
     instructions can be done in parallel), and if so, emit them as
8119
     parallel instructions.  The assembler will put them in the proper
8120
     containers.  In the above example, the assembler will put the
8121
     `stw' instruction in left container and the `mulx' instruction in
8122
     the right container.
8123
 
8124
`stw r2,@(r3,r4) ->'
8125
`mulx a0,r8,r9'
8126
     Two-line format.  Execute the `stw' instruction followed by the
8127
     `mulx' instruction sequentially.  The first instruction goes in the
8128
     left container and the second instruction goes into right
8129
     container.  The assembler will give an error if the machine
8130
     ordering constraints are violated.
8131
 
8132
`stw r2,@(r3,r4) <-'
8133
`mulx a0,r8,r9'
8134
     Same as previous example, except that the `mulx' instruction is
8135
     executed before the `stw' instruction.
8136
 
8137
   Since `$' has no special meaning, you may use it in symbol names.
8138
 
8139

8140
File: as.info,  Node: D30V-Guarded,  Next: D30V-Regs,  Prev: D30V-Chars,  Up: D30V-Syntax
8141
 
8142
9.9.2.4 Guarded Execution
8143
.........................
8144
 
8145
`as' supports the full range of guarded execution directives for each
8146
instruction.  Just append the directive after the instruction proper.
8147
The directives are:
8148
 
8149
`/tx'
8150
     Execute the instruction if flag f0 is true.
8151
 
8152
`/fx'
8153
     Execute the instruction if flag f0 is false.
8154
 
8155
`/xt'
8156
     Execute the instruction if flag f1 is true.
8157
 
8158
`/xf'
8159
     Execute the instruction if flag f1 is false.
8160
 
8161
`/tt'
8162
     Execute the instruction if both flags f0 and f1 are true.
8163
 
8164
`/tf'
8165
     Execute the instruction if flag f0 is true and flag f1 is false.
8166
 
8167

8168
File: as.info,  Node: D30V-Regs,  Next: D30V-Addressing,  Prev: D30V-Guarded,  Up: D30V-Syntax
8169
 
8170
9.9.2.5 Register Names
8171
......................
8172
 
8173
You can use the predefined symbols `r0' through `r63' to refer to the
8174
D30V registers.  You can also use `sp' as an alias for `r63' and `link'
8175
as an alias for `r62'.  The accumulators are `a0' and `a1'.
8176
 
8177
   The D30V also has predefined symbols for these control registers and
8178
status bits:
8179
`psw'
8180
     Processor Status Word
8181
 
8182
`bpsw'
8183
     Backup Processor Status Word
8184
 
8185
`pc'
8186
     Program Counter
8187
 
8188
`bpc'
8189
     Backup Program Counter
8190
 
8191
`rpt_c'
8192
     Repeat Count
8193
 
8194
`rpt_s'
8195
     Repeat Start address
8196
 
8197
`rpt_e'
8198
     Repeat End address
8199
 
8200
`mod_s'
8201
     Modulo Start address
8202
 
8203
`mod_e'
8204
     Modulo End address
8205
 
8206
`iba'
8207
     Instruction Break Address
8208
 
8209
`f0'
8210
     Flag 0
8211
 
8212
`f1'
8213
     Flag 1
8214
 
8215
`f2'
8216
     Flag 2
8217
 
8218
`f3'
8219
     Flag 3
8220
 
8221
`f4'
8222
     Flag 4
8223
 
8224
`f5'
8225
     Flag 5
8226
 
8227
`f6'
8228
     Flag 6
8229
 
8230
`f7'
8231
     Flag 7
8232
 
8233
`s'
8234
     Same as flag 4 (saturation flag)
8235
 
8236
`v'
8237
     Same as flag 5 (overflow flag)
8238
 
8239
`va'
8240
     Same as flag 6 (sticky overflow flag)
8241
 
8242
`c'
8243
     Same as flag 7 (carry/borrow flag)
8244
 
8245
`b'
8246
     Same as flag 7 (carry/borrow flag)
8247
 
8248

8249
File: as.info,  Node: D30V-Addressing,  Prev: D30V-Regs,  Up: D30V-Syntax
8250
 
8251
9.9.2.6 Addressing Modes
8252
........................
8253
 
8254
`as' understands the following addressing modes for the D30V.  `RN' in
8255
the following refers to any of the numbered registers, but _not_ the
8256
control registers.
8257
`RN'
8258
     Register direct
8259
 
8260
`@RN'
8261
     Register indirect
8262
 
8263
`@RN+'
8264
     Register indirect with post-increment
8265
 
8266
`@RN-'
8267
     Register indirect with post-decrement
8268
 
8269
`@-SP'
8270
     Register indirect with pre-decrement
8271
 
8272
`@(DISP, RN)'
8273
     Register indirect with displacement
8274
 
8275
`ADDR'
8276
     PC relative address (for branch or rep).
8277
 
8278
`#IMM'
8279
     Immediate data (the `#' is optional and ignored)
8280
 
8281

8282
File: as.info,  Node: D30V-Float,  Next: D30V-Opcodes,  Prev: D30V-Syntax,  Up: D30V-Dependent
8283
 
8284
9.9.3 Floating Point
8285
--------------------
8286
 
8287
The D30V has no hardware floating point, but the `.float' and `.double'
8288
directives generates IEEE floating-point numbers for compatibility with
8289
other development tools.
8290
 
8291

8292
File: as.info,  Node: D30V-Opcodes,  Prev: D30V-Float,  Up: D30V-Dependent
8293
 
8294
9.9.4 Opcodes
8295
-------------
8296
 
8297
For detailed information on the D30V machine instruction set, see `D30V
8298
Architecture: A VLIW Microprocessor for Multimedia Applications'
8299
(Mitsubishi Electric Corp.).  `as' implements all the standard D30V
8300
opcodes.  The only changes are those described in the section on size
8301
modifiers
8302
 
8303

8304
File: as.info,  Node: H8/300-Dependent,  Next: HPPA-Dependent,  Prev: D30V-Dependent,  Up: Machine Dependencies
8305
 
8306
9.10 H8/300 Dependent Features
8307
==============================
8308
 
8309
* Menu:
8310
 
8311
* H8/300 Options::              Options
8312
* H8/300 Syntax::               Syntax
8313
* H8/300 Floating Point::       Floating Point
8314
* H8/300 Directives::           H8/300 Machine Directives
8315
* H8/300 Opcodes::              Opcodes
8316
 
8317

8318
File: as.info,  Node: H8/300 Options,  Next: H8/300 Syntax,  Up: H8/300-Dependent
8319
 
8320
9.10.1 Options
8321
--------------
8322
 
8323
The Renesas H8/300 version of `as' has one machine-dependent option:
8324
 
8325
`-h-tick-hex'
8326
     Support H'00 style hex constants in addition to 0x00 style.
8327
 
8328
 
8329

8330
File: as.info,  Node: H8/300 Syntax,  Next: H8/300 Floating Point,  Prev: H8/300 Options,  Up: H8/300-Dependent
8331
 
8332
9.10.2 Syntax
8333
-------------
8334
 
8335
* Menu:
8336
 
8337
* H8/300-Chars::                Special Characters
8338
* H8/300-Regs::                 Register Names
8339
* H8/300-Addressing::           Addressing Modes
8340
 
8341

8342
File: as.info,  Node: H8/300-Chars,  Next: H8/300-Regs,  Up: H8/300 Syntax
8343
 
8344
9.10.2.1 Special Characters
8345
...........................
8346
 
8347
`;' is the line comment character.
8348
 
8349
   `$' can be used instead of a newline to separate statements.
8350
Therefore _you may not use `$' in symbol names_ on the H8/300.
8351
 
8352

8353
File: as.info,  Node: H8/300-Regs,  Next: H8/300-Addressing,  Prev: H8/300-Chars,  Up: H8/300 Syntax
8354
 
8355
9.10.2.2 Register Names
8356
.......................
8357
 
8358
You can use predefined symbols of the form `rNh' and `rNl' to refer to
8359
the H8/300 registers as sixteen 8-bit general-purpose registers.  N is
8360
a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
8361
register names.
8362
 
8363
   You can also use the eight predefined symbols `rN' to refer to the
8364
H8/300 registers as 16-bit registers (you must use this form for
8365
addressing).
8366
 
8367
   On the H8/300H, you can also use the eight predefined symbols `erN'
8368
(`er0' ... `er7') to refer to the 32-bit general purpose registers.
8369
 
8370
   The two control registers are called `pc' (program counter; a 16-bit
8371
register, except on the H8/300H where it is 24 bits) and `ccr'
8372
(condition code register; an 8-bit register).  `r7' is used as the
8373
stack pointer, and can also be called `sp'.
8374
 
8375

8376
File: as.info,  Node: H8/300-Addressing,  Prev: H8/300-Regs,  Up: H8/300 Syntax
8377
 
8378
9.10.2.3 Addressing Modes
8379
.........................
8380
 
8381
as understands the following addressing modes for the H8/300:
8382
`rN'
8383
     Register direct
8384
 
8385
`@rN'
8386
     Register indirect
8387
 
8388
`@(D, rN)'
8389
`@(D:16, rN)'
8390
`@(D:24, rN)'
8391
     Register indirect: 16-bit or 24-bit displacement D from register
8392
     N.  (24-bit displacements are only meaningful on the H8/300H.)
8393
 
8394
`@rN+'
8395
     Register indirect with post-increment
8396
 
8397
`@-rN'
8398
     Register indirect with pre-decrement
8399
 
8400
``@'AA'
8401
``@'AA:8'
8402
``@'AA:16'
8403
``@'AA:24'
8404
     Absolute address `aa'.  (The address size `:24' only makes sense
8405
     on the H8/300H.)
8406
 
8407
`#XX'
8408
`#XX:8'
8409
`#XX:16'
8410
`#XX:32'
8411
     Immediate data XX.  You may specify the `:8', `:16', or `:32' for
8412
     clarity, if you wish; but `as' neither requires this nor uses
8413
     it--the data size required is taken from context.
8414
 
8415
``@'`@'AA'
8416
``@'`@'AA:8'
8417
     Memory indirect.  You may specify the `:8' for clarity, if you
8418
     wish; but `as' neither requires this nor uses it.
8419
 
8420

8421
File: as.info,  Node: H8/300 Floating Point,  Next: H8/300 Directives,  Prev: H8/300 Syntax,  Up: H8/300-Dependent
8422
 
8423
9.10.3 Floating Point
8424
---------------------
8425
 
8426
The H8/300 family has no hardware floating point, but the `.float'
8427
directive generates IEEE floating-point numbers for compatibility with
8428
other development tools.
8429
 
8430

8431
File: as.info,  Node: H8/300 Directives,  Next: H8/300 Opcodes,  Prev: H8/300 Floating Point,  Up: H8/300-Dependent
8432
 
8433
9.10.4 H8/300 Machine Directives
8434
--------------------------------
8435
 
8436
`as' has the following machine-dependent directives for the H8/300:
8437
 
8438
`.h8300h'
8439
     Recognize and emit additional instructions for the H8/300H
8440
     variant, and also make `.int' emit 32-bit numbers rather than the
8441
     usual (16-bit) for the H8/300 family.
8442
 
8443
`.h8300s'
8444
     Recognize and emit additional instructions for the H8S variant, and
8445
     also make `.int' emit 32-bit numbers rather than the usual (16-bit)
8446
     for the H8/300 family.
8447
 
8448
`.h8300hn'
8449
     Recognize and emit additional instructions for the H8/300H variant
8450
     in normal mode, and also make `.int' emit 32-bit numbers rather
8451
     than the usual (16-bit) for the H8/300 family.
8452
 
8453
`.h8300sn'
8454
     Recognize and emit additional instructions for the H8S variant in
8455
     normal mode, and also make `.int' emit 32-bit numbers rather than
8456
     the usual (16-bit) for the H8/300 family.
8457
 
8458
   On the H8/300 family (including the H8/300H) `.word' directives
8459
generate 16-bit numbers.
8460
 
8461

8462
File: as.info,  Node: H8/300 Opcodes,  Prev: H8/300 Directives,  Up: H8/300-Dependent
8463
 
8464
9.10.5 Opcodes
8465
--------------
8466
 
8467
For detailed information on the H8/300 machine instruction set, see
8468
`H8/300 Series Programming Manual'.  For information specific to the
8469
H8/300H, see `H8/300H Series Programming Manual' (Renesas).
8470
 
8471
   `as' implements all the standard H8/300 opcodes.  No additional
8472
pseudo-instructions are needed on this family.
8473
 
8474
   The following table summarizes the H8/300 opcodes, and their
8475
arguments.  Entries marked `*' are opcodes used only on the H8/300H.
8476
 
8477
              Legend:
8478
                 Rs   source register
8479
                 Rd   destination register
8480
                 abs  absolute address
8481
                 imm  immediate data
8482
              disp:N  N-bit displacement from a register
8483
             pcrel:N  N-bit displacement relative to program counter
8484
 
8485
        add.b #imm,rd              *  andc #imm,ccr
8486
        add.b rs,rd                   band #imm,rd
8487
        add.w rs,rd                   band #imm,@rd
8488
     *  add.w #imm,rd                 band #imm,@abs:8
8489
     *  add.l rs,rd                   bra  pcrel:8
8490
     *  add.l #imm,rd              *  bra  pcrel:16
8491
        adds #imm,rd                  bt   pcrel:8
8492
        addx #imm,rd               *  bt   pcrel:16
8493
        addx rs,rd                    brn  pcrel:8
8494
        and.b #imm,rd              *  brn  pcrel:16
8495
        and.b rs,rd                   bf   pcrel:8
8496
     *  and.w rs,rd                *  bf   pcrel:16
8497
     *  and.w #imm,rd                 bhi  pcrel:8
8498
     *  and.l #imm,rd              *  bhi  pcrel:16
8499
     *  and.l rs,rd                   bls  pcrel:8
8500
 
8501
     *  bls  pcrel:16                 bld  #imm,rd
8502
        bcc  pcrel:8                  bld  #imm,@rd
8503
     *  bcc  pcrel:16                 bld  #imm,@abs:8
8504
        bhs  pcrel:8                  bnot #imm,rd
8505
     *  bhs  pcrel:16                 bnot #imm,@rd
8506
        bcs  pcrel:8                  bnot #imm,@abs:8
8507
     *  bcs  pcrel:16                 bnot rs,rd
8508
        blo  pcrel:8                  bnot rs,@rd
8509
     *  blo  pcrel:16                 bnot rs,@abs:8
8510
        bne  pcrel:8                  bor  #imm,rd
8511
     *  bne  pcrel:16                 bor  #imm,@rd
8512
        beq  pcrel:8                  bor  #imm,@abs:8
8513
     *  beq  pcrel:16                 bset #imm,rd
8514
        bvc  pcrel:8                  bset #imm,@rd
8515
     *  bvc  pcrel:16                 bset #imm,@abs:8
8516
        bvs  pcrel:8                  bset rs,rd
8517
     *  bvs  pcrel:16                 bset rs,@rd
8518
        bpl  pcrel:8                  bset rs,@abs:8
8519
     *  bpl  pcrel:16                 bsr  pcrel:8
8520
        bmi  pcrel:8                  bsr  pcrel:16
8521
     *  bmi  pcrel:16                 bst  #imm,rd
8522
        bge  pcrel:8                  bst  #imm,@rd
8523
     *  bge  pcrel:16                 bst  #imm,@abs:8
8524
        blt  pcrel:8                  btst #imm,rd
8525
     *  blt  pcrel:16                 btst #imm,@rd
8526
        bgt  pcrel:8                  btst #imm,@abs:8
8527
     *  bgt  pcrel:16                 btst rs,rd
8528
        ble  pcrel:8                  btst rs,@rd
8529
     *  ble  pcrel:16                 btst rs,@abs:8
8530
        bclr #imm,rd                  bxor #imm,rd
8531
        bclr #imm,@rd                 bxor #imm,@rd
8532
        bclr #imm,@abs:8              bxor #imm,@abs:8
8533
        bclr rs,rd                    cmp.b #imm,rd
8534
        bclr rs,@rd                   cmp.b rs,rd
8535
        bclr rs,@abs:8                cmp.w rs,rd
8536
        biand #imm,rd                 cmp.w rs,rd
8537
        biand #imm,@rd             *  cmp.w #imm,rd
8538
        biand #imm,@abs:8          *  cmp.l #imm,rd
8539
        bild #imm,rd               *  cmp.l rs,rd
8540
        bild #imm,@rd                 daa  rs
8541
        bild #imm,@abs:8              das  rs
8542
        bior #imm,rd                  dec.b rs
8543
        bior #imm,@rd              *  dec.w #imm,rd
8544
        bior #imm,@abs:8           *  dec.l #imm,rd
8545
        bist #imm,rd                  divxu.b rs,rd
8546
        bist #imm,@rd              *  divxu.w rs,rd
8547
        bist #imm,@abs:8           *  divxs.b rs,rd
8548
        bixor #imm,rd              *  divxs.w rs,rd
8549
        bixor #imm,@rd                eepmov
8550
        bixor #imm,@abs:8          *  eepmovw
8551
 
8552
     *  exts.w rd                     mov.w rs,@abs:16
8553
     *  exts.l rd                  *  mov.l #imm,rd
8554
     *  extu.w rd                  *  mov.l rs,rd
8555
     *  extu.l rd                  *  mov.l @rs,rd
8556
        inc  rs                    *  mov.l @(disp:16,rs),rd
8557
     *  inc.w #imm,rd              *  mov.l @(disp:24,rs),rd
8558
     *  inc.l #imm,rd              *  mov.l @rs+,rd
8559
        jmp  @rs                   *  mov.l @abs:16,rd
8560
        jmp  abs                   *  mov.l @abs:24,rd
8561
        jmp  @@abs:8               *  mov.l rs,@rd
8562
        jsr  @rs                   *  mov.l rs,@(disp:16,rd)
8563
        jsr  abs                   *  mov.l rs,@(disp:24,rd)
8564
        jsr  @@abs:8               *  mov.l rs,@-rd
8565
        ldc  #imm,ccr              *  mov.l rs,@abs:16
8566
        ldc  rs,ccr                *  mov.l rs,@abs:24
8567
     *  ldc  @abs:16,ccr              movfpe @abs:16,rd
8568
     *  ldc  @abs:24,ccr              movtpe rs,@abs:16
8569
     *  ldc  @(disp:16,rs),ccr        mulxu.b rs,rd
8570
     *  ldc  @(disp:24,rs),ccr     *  mulxu.w rs,rd
8571
     *  ldc  @rs+,ccr              *  mulxs.b rs,rd
8572
     *  ldc  @rs,ccr               *  mulxs.w rs,rd
8573
     *  mov.b @(disp:24,rs),rd        neg.b rs
8574
     *  mov.b rs,@(disp:24,rd)     *  neg.w rs
8575
        mov.b @abs:16,rd           *  neg.l rs
8576
        mov.b rs,rd                   nop
8577
        mov.b @abs:8,rd               not.b rs
8578
        mov.b rs,@abs:8            *  not.w rs
8579
        mov.b rs,rd                *  not.l rs
8580
        mov.b #imm,rd                 or.b #imm,rd
8581
        mov.b @rs,rd                  or.b rs,rd
8582
        mov.b @(disp:16,rs),rd     *  or.w #imm,rd
8583
        mov.b @rs+,rd              *  or.w rs,rd
8584
        mov.b @abs:8,rd            *  or.l #imm,rd
8585
        mov.b rs,@rd               *  or.l rs,rd
8586
        mov.b rs,@(disp:16,rd)        orc  #imm,ccr
8587
        mov.b rs,@-rd                 pop.w rs
8588
        mov.b rs,@abs:8            *  pop.l rs
8589
        mov.w rs,@rd                  push.w rs
8590
     *  mov.w @(disp:24,rs),rd     *  push.l rs
8591
     *  mov.w rs,@(disp:24,rd)        rotl.b rs
8592
     *  mov.w @abs:24,rd           *  rotl.w rs
8593
     *  mov.w rs,@abs:24           *  rotl.l rs
8594
        mov.w rs,rd                   rotr.b rs
8595
        mov.w #imm,rd              *  rotr.w rs
8596
        mov.w @rs,rd               *  rotr.l rs
8597
        mov.w @(disp:16,rs),rd        rotxl.b rs
8598
        mov.w @rs+,rd              *  rotxl.w rs
8599
        mov.w @abs:16,rd           *  rotxl.l rs
8600
        mov.w rs,@(disp:16,rd)        rotxr.b rs
8601
        mov.w rs,@-rd              *  rotxr.w rs
8602
 
8603
     *  rotxr.l rs                 *  stc  ccr,@(disp:24,rd)
8604
        bpt                        *  stc  ccr,@-rd
8605
        rte                        *  stc  ccr,@abs:16
8606
        rts                        *  stc  ccr,@abs:24
8607
        shal.b rs                     sub.b rs,rd
8608
     *  shal.w rs                     sub.w rs,rd
8609
     *  shal.l rs                  *  sub.w #imm,rd
8610
        shar.b rs                  *  sub.l rs,rd
8611
     *  shar.w rs                  *  sub.l #imm,rd
8612
     *  shar.l rs                     subs #imm,rd
8613
        shll.b rs                     subx #imm,rd
8614
     *  shll.w rs                     subx rs,rd
8615
     *  shll.l rs                  *  trapa #imm
8616
        shlr.b rs                     xor  #imm,rd
8617
     *  shlr.w rs                     xor  rs,rd
8618
     *  shlr.l rs                  *  xor.w #imm,rd
8619
        sleep                      *  xor.w rs,rd
8620
        stc  ccr,rd                *  xor.l #imm,rd
8621
     *  stc  ccr,@rs               *  xor.l rs,rd
8622
     *  stc  ccr,@(disp:16,rd)        xorc #imm,ccr
8623
 
8624
   Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
8625
with variants using the suffixes `.b', `.w', and `.l' to specify the
8626
size of a memory operand.  `as' supports these suffixes, but does not
8627
require them; since one of the operands is always a register, `as' can
8628
deduce the correct size.
8629
 
8630
   For example, since `r0' refers to a 16-bit register,
8631
     mov    r0,@foo
8632
is equivalent to
8633
     mov.w  r0,@foo
8634
 
8635
   If you use the size suffixes, `as' issues a warning when the suffix
8636
and the register size do not match.
8637
 
8638

8639
File: as.info,  Node: HPPA-Dependent,  Next: ESA/390-Dependent,  Prev: H8/300-Dependent,  Up: Machine Dependencies
8640
 
8641
9.11 HPPA Dependent Features
8642
============================
8643
 
8644
* Menu:
8645
 
8646
* HPPA Notes::                Notes
8647
* HPPA Options::              Options
8648
* HPPA Syntax::               Syntax
8649
* HPPA Floating Point::       Floating Point
8650
* HPPA Directives::           HPPA Machine Directives
8651
* HPPA Opcodes::              Opcodes
8652
 
8653

8654
File: as.info,  Node: HPPA Notes,  Next: HPPA Options,  Up: HPPA-Dependent
8655
 
8656
9.11.1 Notes
8657
------------
8658
 
8659
As a back end for GNU CC `as' has been throughly tested and should work
8660
extremely well.  We have tested it only minimally on hand written
8661
assembly code and no one has tested it much on the assembly output from
8662
the HP compilers.
8663
 
8664
   The format of the debugging sections has changed since the original
8665
`as' port (version 1.3X) was released; therefore, you must rebuild all
8666
HPPA objects and libraries with the new assembler so that you can debug
8667
the final executable.
8668
 
8669
   The HPPA `as' port generates a small subset of the relocations
8670
available in the SOM and ELF object file formats.  Additional relocation
8671
support will be added as it becomes necessary.
8672
 
8673

8674
File: as.info,  Node: HPPA Options,  Next: HPPA Syntax,  Prev: HPPA Notes,  Up: HPPA-Dependent
8675
 
8676
9.11.2 Options
8677
--------------
8678
 
8679
`as' has no machine-dependent command-line options for the HPPA.
8680
 
8681

8682
File: as.info,  Node: HPPA Syntax,  Next: HPPA Floating Point,  Prev: HPPA Options,  Up: HPPA-Dependent
8683
 
8684
9.11.3 Syntax
8685
-------------
8686
 
8687
The assembler syntax closely follows the HPPA instruction set reference
8688
manual; assembler directives and general syntax closely follow the HPPA
8689
assembly language reference manual, with a few noteworthy differences.
8690
 
8691
   First, a colon may immediately follow a label definition.  This is
8692
simply for compatibility with how most assembly language programmers
8693
write code.
8694
 
8695
   Some obscure expression parsing problems may affect hand written
8696
code which uses the `spop' instructions, or code which makes significant
8697
use of the `!' line separator.
8698
 
8699
   `as' is much less forgiving about missing arguments and other
8700
similar oversights than the HP assembler.  `as' notifies you of missing
8701
arguments as syntax errors; this is regarded as a feature, not a bug.
8702
 
8703
   Finally, `as' allows you to use an external symbol without
8704
explicitly importing the symbol.  _Warning:_ in the future this will be
8705
an error for HPPA targets.
8706
 
8707
   Special characters for HPPA targets include:
8708
 
8709
   `;' is the line comment character.
8710
 
8711
   `!' can be used instead of a newline to separate statements.
8712
 
8713
   Since `$' has no special meaning, you may use it in symbol names.
8714
 
8715

8716
File: as.info,  Node: HPPA Floating Point,  Next: HPPA Directives,  Prev: HPPA Syntax,  Up: HPPA-Dependent
8717
 
8718
9.11.4 Floating Point
8719
---------------------
8720
 
8721
The HPPA family uses IEEE floating-point numbers.
8722
 
8723

8724
File: as.info,  Node: HPPA Directives,  Next: HPPA Opcodes,  Prev: HPPA Floating Point,  Up: HPPA-Dependent
8725
 
8726
9.11.5 HPPA Assembler Directives
8727
--------------------------------
8728
 
8729
`as' for the HPPA supports many additional directives for compatibility
8730
with the native assembler.  This section describes them only briefly.
8731
For detailed information on HPPA-specific assembler directives, see
8732
`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).
8733
 
8734
   `as' does _not_ support the following assembler directives described
8735
in the HP manual:
8736
 
8737
     .endm           .liston
8738
     .enter          .locct
8739
     .leave          .macro
8740
     .listoff
8741
 
8742
   Beyond those implemented for compatibility, `as' supports one
8743
additional assembler directive for the HPPA: `.param'.  It conveys
8744
register argument locations for static functions.  Its syntax closely
8745
follows the `.export' directive.
8746
 
8747
   These are the additional directives in `as' for the HPPA:
8748
 
8749
`.block N'
8750
`.blockz N'
8751
     Reserve N bytes of storage, and initialize them to zero.
8752
 
8753
`.call'
8754
     Mark the beginning of a procedure call.  Only the special case
8755
     with _no arguments_ is allowed.
8756
 
8757
`.callinfo [ PARAM=VALUE, ... ]  [ FLAG, ... ]'
8758
     Specify a number of parameters and flags that define the
8759
     environment for a procedure.
8760
 
8761
     PARAM may be any of `frame' (frame size), `entry_gr' (end of
8762
     general register range), `entry_fr' (end of float register range),
8763
     `entry_sr' (end of space register range).
8764
 
8765
     The values for FLAG are `calls' or `caller' (proc has
8766
     subroutines), `no_calls' (proc does not call subroutines),
8767
     `save_rp' (preserve return pointer), `save_sp' (proc preserves
8768
     stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
8769
     (proc is interrupt routine).
8770
 
8771
`.code'
8772
     Assemble into the standard section called `$TEXT$', subsection
8773
     `$CODE$'.
8774
 
8775
`.copyright "STRING"'
8776
     In the SOM object format, insert STRING into the object code,
8777
     marked as a copyright string.
8778
 
8779
`.copyright "STRING"'
8780
     In the ELF object format, insert STRING into the object code,
8781
     marked as a version string.
8782
 
8783
`.enter'
8784
     Not yet supported; the assembler rejects programs containing this
8785
     directive.
8786
 
8787
`.entry'
8788
     Mark the beginning of a procedure.
8789
 
8790
`.exit'
8791
     Mark the end of a procedure.
8792
 
8793
`.export NAME [ ,TYP ]  [ ,PARAM=R ]'
8794
     Make a procedure NAME available to callers.  TYP, if present, must
8795
     be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
8796
     `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
8797
 
8798
     PARAM, if present, provides either relocation information for the
8799
     procedure arguments and result, or a privilege level.  PARAM may be
8800
     `argwN' (where N ranges from `0' to `3', and indicates one of four
8801
     one-word arguments); `rtnval' (the procedure's result); or
8802
     `priv_lev' (privilege level).  For arguments or the result, R
8803
     specifies how to relocate, and must be one of `no' (not
8804
     relocatable), `gr' (argument is in general register), `fr' (in
8805
     floating point register), or `fu' (upper half of float register).
8806
     For `priv_lev', R is an integer.
8807
 
8808
`.half N'
8809
     Define a two-byte integer constant N; synonym for the portable
8810
     `as' directive `.short'.
8811
 
8812
`.import NAME [ ,TYP ]'
8813
     Converse of `.export'; make a procedure available to call.  The
8814
     arguments use the same conventions as the first two arguments for
8815
     `.export'.
8816
 
8817
`.label NAME'
8818
     Define NAME as a label for the current assembly location.
8819
 
8820
`.leave'
8821
     Not yet supported; the assembler rejects programs containing this
8822
     directive.
8823
 
8824
`.origin LC'
8825
     Advance location counter to LC. Synonym for the `as' portable
8826
     directive `.org'.
8827
 
8828
`.param NAME [ ,TYP ]  [ ,PARAM=R ]'
8829
     Similar to `.export', but used for static procedures.
8830
 
8831
`.proc'
8832
     Use preceding the first statement of a procedure.
8833
 
8834
`.procend'
8835
     Use following the last statement of a procedure.
8836
 
8837
`LABEL .reg EXPR'
8838
     Synonym for `.equ'; define LABEL with the absolute expression EXPR
8839
     as its value.
8840
 
8841
`.space SECNAME [ ,PARAMS ]'
8842
     Switch to section SECNAME, creating a new section by that name if
8843
     necessary.  You may only use PARAMS when creating a new section,
8844
     not when switching to an existing one.  SECNAME may identify a
8845
     section by number rather than by name.
8846
 
8847
     If specified, the list PARAMS declares attributes of the section,
8848
     identified by keywords.  The keywords recognized are `spnum=EXP'
8849
     (identify this section by the number EXP, an absolute expression),
8850
     `sort=EXP' (order sections according to this sort key when linking;
8851
     EXP is an absolute expression), `unloadable' (section contains no
8852
     loadable data), `notdefined' (this section defined elsewhere), and
8853
     `private' (data in this section not available to other programs).
8854
 
8855
`.spnum SECNAM'
8856
     Allocate four bytes of storage, and initialize them with the
8857
     section number of the section named SECNAM.  (You can define the
8858
     section number with the HPPA `.space' directive.)
8859
 
8860
`.string "STR"'
8861
     Copy the characters in the string STR to the object file.  *Note
8862
     Strings: Strings, for information on escape sequences you can use
8863
     in `as' strings.
8864
 
8865
     _Warning!_ The HPPA version of `.string' differs from the usual
8866
     `as' definition: it does _not_ write a zero byte after copying STR.
8867
 
8868
`.stringz "STR"'
8869
     Like `.string', but appends a zero byte after copying STR to object
8870
     file.
8871
 
8872
`.subspa NAME [ ,PARAMS ]'
8873
`.nsubspa NAME [ ,PARAMS ]'
8874
     Similar to `.space', but selects a subsection NAME within the
8875
     current section.  You may only specify PARAMS when you create a
8876
     subsection (in the first instance of `.subspa' for this NAME).
8877
 
8878
     If specified, the list PARAMS declares attributes of the
8879
     subsection, identified by keywords.  The keywords recognized are
8880
     `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
8881
     (alignment for beginning of this subsection; a power of two),
8882
     `access=EXPR' (value for "access rights" field), `sort=EXPR'
8883
     (sorting order for this subspace in link), `code_only' (subsection
8884
     contains only code), `unloadable' (subsection cannot be loaded
8885
     into memory), `comdat' (subsection is comdat), `common'
8886
     (subsection is common block), `dup_comm' (subsection may have
8887
     duplicate names), or `zero' (subsection is all zeros, do not write
8888
     in object file).
8889
 
8890
     `.nsubspa' always creates a new subspace with the given name, even
8891
     if one with the same name already exists.
8892
 
8893
     `comdat', `common' and `dup_comm' can be used to implement various
8894
     flavors of one-only support when using the SOM linker.  The SOM
8895
     linker only supports specific combinations of these flags.  The
8896
     details are not documented.  A brief description is provided here.
8897
 
8898
     `comdat' provides a form of linkonce support.  It is useful for
8899
     both code and data subspaces.  A `comdat' subspace has a key symbol
8900
     marked by the `is_comdat' flag or `ST_COMDAT'.  Only the first
8901
     subspace for any given key is selected.  The key symbol becomes
8902
     universal in shared links.  This is similar to the behavior of
8903
     `secondary_def' symbols.
8904
 
8905
     `common' provides Fortran named common support.  It is only useful
8906
     for data subspaces.  Symbols with the flag `is_common' retain this
8907
     flag in shared links.  Referencing a `is_common' symbol in a shared
8908
     library from outside the library doesn't work.  Thus, `is_common'
8909
     symbols must be output whenever they are needed.
8910
 
8911
     `common' and `dup_comm' together provide Cobol common support.
8912
     The subspaces in this case must all be the same length.
8913
     Otherwise, this support is similar to the Fortran common support.
8914
 
8915
     `dup_comm' by itself provides a type of one-only support for code.
8916
     Only the first `dup_comm' subspace is selected.  There is a rather
8917
     complex algorithm to compare subspaces.  Code symbols marked with
8918
     the `dup_common' flag are hidden.  This support was intended for
8919
     "C++ duplicate inlines".
8920
 
8921
     A simplified technique is used to mark the flags of symbols based
8922
     on the flags of their subspace.  A symbol with the scope
8923
     SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with
8924
     the corresponding settings of `comdat', `common' and `dup_comm'
8925
     from the subspace, respectively.  This avoids having to introduce
8926
     additional directives to mark these symbols.  The HP assembler
8927
     sets `is_common' from `common'.  However, it doesn't set the
8928
     `dup_common' from `dup_comm'.  It doesn't have `comdat' support.
8929
 
8930
`.version "STR"'
8931
     Write STR as version identifier in object code.
8932
 
8933

8934
File: as.info,  Node: HPPA Opcodes,  Prev: HPPA Directives,  Up: HPPA-Dependent
8935
 
8936
9.11.6 Opcodes
8937
--------------
8938
 
8939
For detailed information on the HPPA machine instruction set, see
8940
`PA-RISC Architecture and Instruction Set Reference Manual' (HP
8941
09740-90039).
8942
 
8943

8944
File: as.info,  Node: ESA/390-Dependent,  Next: i386-Dependent,  Prev: HPPA-Dependent,  Up: Machine Dependencies
8945
 
8946
9.12 ESA/390 Dependent Features
8947
===============================
8948
 
8949
* Menu:
8950
 
8951
* ESA/390 Notes::                Notes
8952
* ESA/390 Options::              Options
8953
* ESA/390 Syntax::               Syntax
8954
* ESA/390 Floating Point::       Floating Point
8955
* ESA/390 Directives::           ESA/390 Machine Directives
8956
* ESA/390 Opcodes::              Opcodes
8957
 
8958

8959
File: as.info,  Node: ESA/390 Notes,  Next: ESA/390 Options,  Up: ESA/390-Dependent
8960
 
8961
9.12.1 Notes
8962
------------
8963
 
8964
The ESA/390 `as' port is currently intended to be a back-end for the
8965
GNU CC compiler.  It is not HLASM compatible, although it does support
8966
a subset of some of the HLASM directives.  The only supported binary
8967
file format is ELF; none of the usual MVS/VM/OE/USS object file
8968
formats, such as ESD or XSD, are supported.
8969
 
8970
   When used with the GNU CC compiler, the ESA/390 `as' will produce
8971
correct, fully relocated, functional binaries, and has been used to
8972
compile and execute large projects.  However, many aspects should still
8973
be considered experimental; these include shared library support,
8974
dynamically loadable objects, and any relocation other than the 31-bit
8975
relocation.
8976
 
8977

8978
File: as.info,  Node: ESA/390 Options,  Next: ESA/390 Syntax,  Prev: ESA/390 Notes,  Up: ESA/390-Dependent
8979
 
8980
9.12.2 Options
8981
--------------
8982
 
8983
`as' has no machine-dependent command-line options for the ESA/390.
8984
 
8985

8986
File: as.info,  Node: ESA/390 Syntax,  Next: ESA/390 Floating Point,  Prev: ESA/390 Options,  Up: ESA/390-Dependent
8987
 
8988
9.12.3 Syntax
8989
-------------
8990
 
8991
The opcode/operand syntax follows the ESA/390 Principles of Operation
8992
manual; assembler directives and general syntax are loosely based on the
8993
prevailing AT&T/SVR4/ELF/Solaris style notation.  HLASM-style directives
8994
are _not_ supported for the most part, with the exception of those
8995
described herein.
8996
 
8997
   A leading dot in front of directives is optional, and the case of
8998
directives is ignored; thus for example, .using and USING have the same
8999
effect.
9000
 
9001
   A colon may immediately follow a label definition.  This is simply
9002
for compatibility with how most assembly language programmers write
9003
code.
9004
 
9005
   `#' is the line comment character.
9006
 
9007
   `;' can be used instead of a newline to separate statements.
9008
 
9009
   Since `$' has no special meaning, you may use it in symbol names.
9010
 
9011
   Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
9012
fp6.  By using thesse symbolic names, `as' can detect simple syntax
9013
errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
9014
r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
9015
for r3 and rpgt or r.pgt for r4.
9016
 
9017
   `*' is the current location counter.  Unlike `.' it is always
9018
relative to the last USING directive.  Note that this means that
9019
expressions cannot use multiplication, as any occurrence of `*' will be
9020
interpreted as a location counter.
9021
 
9022
   All labels are relative to the last USING.  Thus, branches to a label
9023
always imply the use of base+displacement.
9024
 
9025
   Many of the usual forms of address constants / address literals are
9026
supported.  Thus,
9027
        .using  *,r3
9028
        L       r15,=A(some_routine)
9029
        LM      r6,r7,=V(some_longlong_extern)
9030
        A       r1,=F'12'
9031
        AH      r0,=H'42'
9032
        ME      r6,=E'3.1416'
9033
        MD      r6,=D'3.14159265358979'
9034
        O       r6,=XL4'cacad0d0'
9035
        .ltorg
9036
   should all behave as expected: that is, an entry in the literal pool
9037
will be created (or reused if it already exists), and the instruction
9038
operands will be the displacement into the literal pool using the
9039
current base register (as last declared with the `.using' directive).
9040
 
9041

9042
File: as.info,  Node: ESA/390 Floating Point,  Next: ESA/390 Directives,  Prev: ESA/390 Syntax,  Up: ESA/390-Dependent
9043
 
9044
9.12.4 Floating Point
9045
---------------------
9046
 
9047
The assembler generates only IEEE floating-point numbers.  The older
9048
floating point formats are not supported.
9049
 
9050

9051
File: as.info,  Node: ESA/390 Directives,  Next: ESA/390 Opcodes,  Prev: ESA/390 Floating Point,  Up: ESA/390-Dependent
9052
 
9053
9.12.5 ESA/390 Assembler Directives
9054
-----------------------------------
9055
 
9056
`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
9057
directives that are documented in the main part of this documentation.
9058
Several additional directives are supported in order to implement the
9059
ESA/390 addressing model.  The most important of these are `.using' and
9060
`.ltorg'
9061
 
9062
   These are the additional directives in `as' for the ESA/390:
9063
 
9064
`.dc'
9065
     A small subset of the usual DC directive is supported.
9066
 
9067
`.drop REGNO'
9068
     Stop using REGNO as the base register.  The REGNO must have been
9069
     previously declared with a `.using' directive in the same section
9070
     as the current section.
9071
 
9072
`.ebcdic STRING'
9073
     Emit the EBCDIC equivalent of the indicated string.  The emitted
9074
     string will be null terminated.  Note that the directives
9075
     `.string' etc. emit ascii strings by default.
9076
 
9077
`EQU'
9078
     The standard HLASM-style EQU directive is not supported; however,
9079
     the standard `as' directive .equ can be used to the same effect.
9080
 
9081
`.ltorg'
9082
     Dump the literal pool accumulated so far; begin a new literal pool.
9083
     The literal pool will be written in the current section; in order
9084
     to generate correct assembly, a `.using' must have been previously
9085
     specified in the same section.
9086
 
9087
`.using EXPR,REGNO'
9088
     Use REGNO as the base register for all subsequent RX, RS, and SS
9089
     form instructions. The EXPR will be evaluated to obtain the base
9090
     address; usually, EXPR will merely be `*'.
9091
 
9092
     This assembler allows two `.using' directives to be simultaneously
9093
     outstanding, one in the `.text' section, and one in another section
9094
     (typically, the `.data' section).  This feature allows dynamically
9095
     loaded objects to be implemented in a relatively straightforward
9096
     way.  A `.using' directive must always be specified in the `.text'
9097
     section; this will specify the base register that will be used for
9098
     branches in the `.text' section.  A second `.using' may be
9099
     specified in another section; this will specify the base register
9100
     that is used for non-label address literals.  When a second
9101
     `.using' is specified, then the subsequent `.ltorg' must be put in
9102
     the same section; otherwise an error will result.
9103
 
9104
     Thus, for example, the following code uses `r3' to address branch
9105
     targets and `r4' to address the literal pool, which has been
9106
     written to the `.data' section.  The is, the constants
9107
     `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
9108
     the `.data' section.
9109
 
9110
          .data
9111
                .using  LITPOOL,r4
9112
          .text
9113
                BASR    r3,0
9114
                .using  *,r3
9115
                  B       START
9116
                .long   LITPOOL
9117
          START:
9118
                L       r4,4(,r3)
9119
                L       r15,=A(some_routine)
9120
                LTR     r15,r15
9121
                BNE     LABEL
9122
                AH      r0,=H'42'
9123
          LABEL:
9124
                ME      r6,=E'3.1416'
9125
          .data
9126
          LITPOOL:
9127
                .ltorg
9128
 
9129
     Note that this dual-`.using' directive semantics extends and is
9130
     not compatible with HLASM semantics.  Note that this assembler
9131
     directive does not support the full range of HLASM semantics.
9132
 
9133
 
9134

9135
File: as.info,  Node: ESA/390 Opcodes,  Prev: ESA/390 Directives,  Up: ESA/390-Dependent
9136
 
9137
9.12.6 Opcodes
9138
--------------
9139
 
9140
For detailed information on the ESA/390 machine instruction set, see
9141
`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).
9142
 
9143

9144
File: as.info,  Node: i386-Dependent,  Next: i860-Dependent,  Prev: ESA/390-Dependent,  Up: Machine Dependencies
9145
 
9146
9.13 80386 Dependent Features
9147
=============================
9148
 
9149
   The i386 version `as' supports both the original Intel 386
9150
architecture in both 16 and 32-bit mode as well as AMD x86-64
9151
architecture extending the Intel architecture to 64-bits.
9152
 
9153
* Menu:
9154
 
9155
* i386-Options::                Options
9156
* i386-Directives::             X86 specific directives
9157
* i386-Syntax::                 AT&T Syntax versus Intel Syntax
9158
* i386-Mnemonics::              Instruction Naming
9159
* i386-Regs::                   Register Naming
9160
* i386-Prefixes::               Instruction Prefixes
9161
* i386-Memory::                 Memory References
9162
* i386-Jumps::                  Handling of Jump Instructions
9163
* i386-Float::                  Floating Point
9164
* i386-SIMD::                   Intel's MMX and AMD's 3DNow! SIMD Operations
9165
* i386-16bit::                  Writing 16-bit Code
9166
* i386-Arch::                   Specifying an x86 CPU architecture
9167
* i386-Bugs::                   AT&T Syntax bugs
9168
* i386-Notes::                  Notes
9169
 
9170

9171
File: as.info,  Node: i386-Options,  Next: i386-Directives,  Up: i386-Dependent
9172
 
9173
9.13.1 Options
9174
--------------
9175
 
9176
The i386 version of `as' has a few machine dependent options:
9177
 
9178
`--32 | --64'
9179
     Select the word size, either 32 bits or 64 bits. Selecting 32-bit
9180
     implies Intel i386 architecture, while 64-bit implies AMD x86-64
9181
     architecture.
9182
 
9183
     These options are only available with the ELF object file format,
9184
     and require that the necessary BFD support has been included (on a
9185
     32-bit platform you have to add -enable-64-bit-bfd to configure
9186
     enable 64-bit usage and use x86-64 as target platform).
9187
 
9188
`-n'
9189
     By default, x86 GAS replaces multiple nop instructions used for
9190
     alignment within code sections with multi-byte nop instructions
9191
     such as leal 0(%esi,1),%esi.  This switch disables the
9192
     optimization.
9193
 
9194
`--divide'
9195
     On SVR4-derived platforms, the character `/' is treated as a
9196
     comment character, which means that it cannot be used in
9197
     expressions.  The `--divide' option turns `/' into a normal
9198
     character.  This does not disable `/' at the beginning of a line
9199
     starting a comment, or affect using `#' for starting a comment.
9200
 
9201
`-march=CPU[+EXTENSION...]'
9202
     This option specifies the target processor.  The assembler will
9203
     issue an error message if an attempt is made to assemble an
9204
     instruction which will not execute on the target processor.  The
9205
     following processor names are recognized: `i8086', `i186', `i286',
9206
     `i386', `i486', `i586', `i686', `pentium', `pentiumpro',
9207
     `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona',
9208
     `core', `core2', `k6', `k6_2', `athlon', `opteron', `k8',
9209
     `amdfam10', `generic32' and `generic64'.
9210
 
9211
     In addition to the basic instruction set, the assembler can be
9212
     told to accept various extension mnemonics.  For example,
9213
     `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX.  The
9214
     following extensions are currently supported: `mmx', `sse', `sse2',
9215
     `sse3', `ssse3', `sse4.1', `sse4.2', `sse4', `avx', `vmx', `smx',
9216
     `xsave', `aes', `pclmul', `fma', `movbe', `ept', `3dnow', `3dnowa',
9217
     `sse4a', `sse5', `svme', `abm' and `padlock'.
9218
 
9219
     When the `.arch' directive is used with `-march', the `.arch'
9220
     directive will take precedent.
9221
 
9222
`-mtune=CPU'
9223
     This option specifies a processor to optimize for. When used in
9224
     conjunction with the `-march' option, only instructions of the
9225
     processor specified by the `-march' option will be generated.
9226
 
9227
     Valid CPU values are identical to the processor list of
9228
     `-march=CPU'.
9229
 
9230
`-msse2avx'
9231
     This option specifies that the assembler should encode SSE
9232
     instructions with VEX prefix.
9233
 
9234
`-msse-check=NONE'
9235
 
9236
`-msse-check=WARNING'
9237
 
9238
`-msse-check=ERROR'
9239
     These options control if the assembler should check SSE
9240
     intructions.  `-msse-check=NONE' will make the assembler not to
9241
     check SSE instructions,  which is the default.
9242
     `-msse-check=WARNING' will make the assembler issue a warning for
9243
     any SSE intruction.  `-msse-check=ERROR' will make the assembler
9244
     issue an error for any SSE intruction.
9245
 
9246
`-mmnemonic=ATT'
9247
 
9248
`-mmnemonic=INTEL'
9249
     This option specifies instruction mnemonic for matching
9250
     instructions.  The `.att_mnemonic' and `.intel_mnemonic'
9251
     directives will take precedent.
9252
 
9253
`-msyntax=ATT'
9254
 
9255
`-msyntax=INTEL'
9256
     This option specifies instruction syntax when processing
9257
     instructions.  The `.att_syntax' and `.intel_syntax' directives
9258
     will take precedent.
9259
 
9260
`-mnaked-reg'
9261
     This opetion specifies that registers don't require a `%' prefix.
9262
     The `.att_syntax' and `.intel_syntax' directives will take
9263
     precedent.
9264
 
9265
 
9266

9267
File: as.info,  Node: i386-Directives,  Next: i386-Syntax,  Prev: i386-Options,  Up: i386-Dependent
9268
 
9269
9.13.2 x86 specific Directives
9270
------------------------------
9271
 
9272
`.lcomm SYMBOL , LENGTH[, ALIGNMENT]'
9273
     Reserve LENGTH (an absolute expression) bytes for a local common
9274
     denoted by SYMBOL.  The section and value of SYMBOL are those of
9275
     the new local common.  The addresses are allocated in the bss
9276
     section, so that at run-time the bytes start off zeroed.  Since
9277
     SYMBOL is not declared global, it is normally not visible to `ld'.
9278
     The optional third parameter, ALIGNMENT, specifies the desired
9279
     alignment of the symbol in the bss section.
9280
 
9281
     This directive is only available for COFF based x86 targets.
9282
 
9283
 
9284

9285
File: as.info,  Node: i386-Syntax,  Next: i386-Mnemonics,  Prev: i386-Directives,  Up: i386-Dependent
9286
 
9287
9.13.3 AT&T Syntax versus Intel Syntax
9288
--------------------------------------
9289
 
9290
`as' now supports assembly using Intel assembler syntax.
9291
`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
9292
the usual AT&T mode for compatibility with the output of `gcc'.  Either
9293
of these directives may have an optional argument, `prefix', or
9294
`noprefix' specifying whether registers require a `%' prefix.  AT&T
9295
System V/386 assembler syntax is quite different from Intel syntax.  We
9296
mention these differences because almost all 80386 documents use Intel
9297
syntax.  Notable differences between the two syntaxes are:
9298
 
9299
   * AT&T immediate operands are preceded by `$'; Intel immediate
9300
     operands are undelimited (Intel `push 4' is AT&T `pushl $4').
9301
     AT&T register operands are preceded by `%'; Intel register operands
9302
     are undelimited.  AT&T absolute (as opposed to PC relative)
9303
     jump/call operands are prefixed by `*'; they are undelimited in
9304
     Intel syntax.
9305
 
9306
   * AT&T and Intel syntax use the opposite order for source and
9307
     destination operands.  Intel `add eax, 4' is `addl $4, %eax'.  The
9308
     `source, dest' convention is maintained for compatibility with
9309
     previous Unix assemblers.  Note that `bound', `invlpga', and
9310
     instructions with 2 immediate operands, such as the `enter'
9311
     instruction, do _not_ have reversed order.  *Note i386-Bugs::.
9312
 
9313
   * In AT&T syntax the size of memory operands is determined from the
9314
     last character of the instruction mnemonic.  Mnemonic suffixes of
9315
     `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
9316
     (32-bit) and quadruple word (64-bit) memory references.  Intel
9317
     syntax accomplishes this by prefixing memory operands (_not_ the
9318
     instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
9319
     and `qword ptr'.  Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
9320
     %al' in AT&T syntax.
9321
 
9322
   * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
9323
     $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
9324
     SECTION:OFFSET'.  Also, the far return instruction is `lret
9325
     $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
9326
     STACK-ADJUST'.
9327
 
9328
   * The AT&T assembler does not provide support for multiple section
9329
     programs.  Unix style systems expect all programs to be single
9330
     sections.
9331
 
9332

9333
File: as.info,  Node: i386-Mnemonics,  Next: i386-Regs,  Prev: i386-Syntax,  Up: i386-Dependent
9334
 
9335
9.13.4 Instruction Naming
9336
-------------------------
9337
 
9338
Instruction mnemonics are suffixed with one character modifiers which
9339
specify the size of operands.  The letters `b', `w', `l' and `q'
9340
specify byte, word, long and quadruple word operands.  If no suffix is
9341
specified by an instruction then `as' tries to fill in the missing
9342
suffix based on the destination register operand (the last one by
9343
convention).  Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
9344
also, `mov $1, %bx' is equivalent to `movw $1, bx'.  Note that this is
9345
incompatible with the AT&T Unix assembler which assumes that a missing
9346
mnemonic suffix implies long operand size.  (This incompatibility does
9347
not affect compiler output since compilers always explicitly specify
9348
the mnemonic suffix.)
9349
 
9350
   Almost all instructions have the same names in AT&T and Intel format.
9351
There are a few exceptions.  The sign extend and zero extend
9352
instructions need two sizes to specify them.  They need a size to
9353
sign/zero extend _from_ and a size to zero extend _to_.  This is
9354
accomplished by using two instruction mnemonic suffixes in AT&T syntax.
9355
Base names for sign extend and zero extend are `movs...' and `movz...'
9356
in AT&T syntax (`movsx' and `movzx' in Intel syntax).  The instruction
9357
mnemonic suffixes are tacked on to this base name, the _from_ suffix
9358
before the _to_ suffix.  Thus, `movsbl %al, %edx' is AT&T syntax for
9359
"move sign extend _from_ %al _to_ %edx."  Possible suffixes, thus, are
9360
`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
9361
long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
9362
word), and `lq' (from long to quadruple word).
9363
 
9364
   The Intel-syntax conversion instructions
9365
 
9366
   * `cbw' -- sign-extend byte in `%al' to word in `%ax',
9367
 
9368
   * `cwde' -- sign-extend word in `%ax' to long in `%eax',
9369
 
9370
   * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
9371
 
9372
   * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
9373
 
9374
   * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
9375
     only),
9376
 
9377
   * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
9378
     (x86-64 only),
9379
 
9380
are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
9381
naming.  `as' accepts either naming for these instructions.
9382
 
9383
   Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
9384
but are `call far' and `jump far' in Intel convention.
9385
 
9386
9.13.5 AT&T Mnemonic versus Intel Mnemonic
9387
------------------------------------------
9388
 
9389
`as' supports assembly using Intel mnemonic.  `.intel_mnemonic' selects
9390
Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to
9391
the usual AT&T mnemonic with AT&T syntax for compatibility with the
9392
output of `gcc'.  Several x87 instructions, `fadd', `fdiv', `fdivp',
9393
`fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp',  are
9394
implemented in AT&T System V/386 assembler with different mnemonics
9395
from those in Intel IA32 specification.  `gcc' generates those
9396
instructions with AT&T mnemonic.
9397
 
9398

9399
File: as.info,  Node: i386-Regs,  Next: i386-Prefixes,  Prev: i386-Mnemonics,  Up: i386-Dependent
9400
 
9401
9.13.6 Register Naming
9402
----------------------
9403
 
9404
Register operands are always prefixed with `%'.  The 80386 registers
9405
consist of
9406
 
9407
   * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
9408
     `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
9409
     (the stack pointer).
9410
 
9411
   * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
9412
     `%si', `%bp', and `%sp'.
9413
 
9414
   * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
9415
     `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
9416
     `%bx', `%cx', and `%dx')
9417
 
9418
   * the 6 section registers `%cs' (code section), `%ds' (data
9419
     section), `%ss' (stack section), `%es', `%fs', and `%gs'.
9420
 
9421
   * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
9422
 
9423
   * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
9424
     `%db7'.
9425
 
9426
   * the 2 test registers `%tr6' and `%tr7'.
9427
 
9428
   * the 8 floating point register stack `%st' or equivalently
9429
     `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
9430
     `%st(6)', and `%st(7)'.  These registers are overloaded by 8 MMX
9431
     registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
9432
     and `%mm7'.
9433
 
9434
   * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
9435
     `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.
9436
 
9437
   The AMD x86-64 architecture extends the register set by:
9438
 
9439
   * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
9440
     accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
9441
     frame pointer), `%rsp' (the stack pointer)
9442
 
9443
   * the 8 extended registers `%r8'-`%r15'.
9444
 
9445
   * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'
9446
 
9447
   * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'
9448
 
9449
   * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'
9450
 
9451
   * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.
9452
 
9453
   * the 8 debug registers: `%db8'-`%db15'.
9454
 
9455
   * the 8 SSE registers: `%xmm8'-`%xmm15'.
9456
 
9457

9458
File: as.info,  Node: i386-Prefixes,  Next: i386-Memory,  Prev: i386-Regs,  Up: i386-Dependent
9459
 
9460
9.13.7 Instruction Prefixes
9461
---------------------------
9462
 
9463
Instruction prefixes are used to modify the following instruction.  They
9464
are used to repeat string instructions, to provide section overrides, to
9465
perform bus lock operations, and to change operand and address sizes.
9466
(Most instructions that normally operate on 32-bit operands will use
9467
16-bit operands if the instruction has an "operand size" prefix.)
9468
Instruction prefixes are best written on the same line as the
9469
instruction they act upon. For example, the `scas' (scan string)
9470
instruction is repeated with:
9471
 
9472
             repne scas %es:(%edi),%al
9473
 
9474
   You may also place prefixes on the lines immediately preceding the
9475
instruction, but this circumvents checks that `as' does with prefixes,
9476
and will not work with all prefixes.
9477
 
9478
   Here is a list of instruction prefixes:
9479
 
9480
   * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
9481
     These are automatically added by specifying using the
9482
     SECTION:MEMORY-OPERAND form for memory references.
9483
 
9484
   * Operand/Address size prefixes `data16' and `addr16' change 32-bit
9485
     operands/addresses into 16-bit operands/addresses, while `data32'
9486
     and `addr32' change 16-bit ones (in a `.code16' section) into
9487
     32-bit operands/addresses.  These prefixes _must_ appear on the
9488
     same line of code as the instruction they modify. For example, in
9489
     a 16-bit `.code16' section, you might write:
9490
 
9491
                  addr32 jmpl *(%ebx)
9492
 
9493
   * The bus lock prefix `lock' inhibits interrupts during execution of
9494
     the instruction it precedes.  (This is only valid with certain
9495
     instructions; see a 80386 manual for details).
9496
 
9497
   * The wait for coprocessor prefix `wait' waits for the coprocessor to
9498
     complete the current instruction.  This should never be needed for
9499
     the 80386/80387 combination.
9500
 
9501
   * The `rep', `repe', and `repne' prefixes are added to string
9502
     instructions to make them repeat `%ecx' times (`%cx' times if the
9503
     current address size is 16-bits).
9504
 
9505
   * The `rex' family of prefixes is used by x86-64 to encode
9506
     extensions to i386 instruction set.  The `rex' prefix has four
9507
     bits -- an operand size overwrite (`64') used to change operand
9508
     size from 32-bit to 64-bit and X, Y and Z extensions bits used to
9509
     extend the register set.
9510
 
9511
     You may write the `rex' prefixes directly. The `rex64xyz'
9512
     instruction emits `rex' prefix with all the bits set.  By omitting
9513
     the `64', `x', `y' or `z' you may write other prefixes as well.
9514
     Normally, there is no need to write the prefixes explicitly, since
9515
     gas will automatically generate them based on the instruction
9516
     operands.
9517
 
9518

9519
File: as.info,  Node: i386-Memory,  Next: i386-Jumps,  Prev: i386-Prefixes,  Up: i386-Dependent
9520
 
9521
9.13.8 Memory References
9522
------------------------
9523
 
9524
An Intel syntax indirect memory reference of the form
9525
 
9526
     SECTION:[BASE + INDEX*SCALE + DISP]
9527
 
9528
is translated into the AT&T syntax
9529
 
9530
     SECTION:DISP(BASE, INDEX, SCALE)
9531
 
9532
where BASE and INDEX are the optional 32-bit base and index registers,
9533
DISP is the optional displacement, and SCALE, taking the values 1, 2,
9534
4, and 8, multiplies INDEX to calculate the address of the operand.  If
9535
no SCALE is specified, SCALE is taken to be 1.  SECTION specifies the
9536
optional section register for the memory operand, and may override the
9537
default section register (see a 80386 manual for section register
9538
defaults). Note that section overrides in AT&T syntax _must_ be
9539
preceded by a `%'.  If you specify a section override which coincides
9540
with the default section register, `as' does _not_ output any section
9541
register override prefixes to assemble the given instruction.  Thus,
9542
section overrides can be specified to emphasize which section register
9543
is used for a given memory operand.
9544
 
9545
   Here are some examples of Intel and AT&T style memory references:
9546
 
9547
AT&T: `-4(%ebp)', Intel:  `[ebp - 4]'
9548
     BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
9549
     section is used (`%ss' for addressing with `%ebp' as the base
9550
     register).  INDEX, SCALE are both missing.
9551
 
9552
AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
9553
     INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'.  All other
9554
     fields are missing.  The section register here defaults to `%ds'.
9555
 
9556
AT&T: `foo(,1)'; Intel `[foo]'
9557
     This uses the value pointed to by `foo' as a memory operand.  Note
9558
     that BASE and INDEX are both missing, but there is only _one_ `,'.
9559
     This is a syntactic exception.
9560
 
9561
AT&T: `%gs:foo'; Intel `gs:foo'
9562
     This selects the contents of the variable `foo' with section
9563
     register SECTION being `%gs'.
9564
 
9565
   Absolute (as opposed to PC relative) call and jump operands must be
9566
prefixed with `*'.  If no `*' is specified, `as' always chooses PC
9567
relative addressing for jump/call labels.
9568
 
9569
   Any instruction that has a memory operand, but no register operand,
9570
_must_ specify its size (byte, word, long, or quadruple) with an
9571
instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
9572
 
9573
   The x86-64 architecture adds an RIP (instruction pointer relative)
9574
addressing.  This addressing mode is specified by using `rip' as a base
9575
register.  Only constant offsets are valid. For example:
9576
 
9577
AT&T: `1234(%rip)', Intel: `[rip + 1234]'
9578
     Points to the address 1234 bytes past the end of the current
9579
     instruction.
9580
 
9581
AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
9582
     Points to the `symbol' in RIP relative way, this is shorter than
9583
     the default absolute addressing.
9584
 
9585
   Other addressing modes remain unchanged in x86-64 architecture,
9586
except registers used are 64-bit instead of 32-bit.
9587
 
9588

9589
File: as.info,  Node: i386-Jumps,  Next: i386-Float,  Prev: i386-Memory,  Up: i386-Dependent
9590
 
9591
9.13.9 Handling of Jump Instructions
9592
------------------------------------
9593
 
9594
Jump instructions are always optimized to use the smallest possible
9595
displacements.  This is accomplished by using byte (8-bit) displacement
9596
jumps whenever the target is sufficiently close.  If a byte displacement
9597
is insufficient a long displacement is used.  We do not support word
9598
(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
9599
instruction with the `data16' instruction prefix), since the 80386
9600
insists upon masking `%eip' to 16 bits after the word displacement is
9601
added. (See also *note i386-Arch::)
9602
 
9603
   Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
9604
and `loopne' instructions only come in byte displacements, so that if
9605
you use these instructions (`gcc' does not use them) you may get an
9606
error message (and incorrect code).  The AT&T 80386 assembler tries to
9607
get around this problem by expanding `jcxz foo' to
9608
 
9609
              jcxz cx_zero
9610
              jmp cx_nonzero
9611
     cx_zero: jmp foo
9612
     cx_nonzero:
9613
 
9614

9615
File: as.info,  Node: i386-Float,  Next: i386-SIMD,  Prev: i386-Jumps,  Up: i386-Dependent
9616
 
9617
9.13.10 Floating Point
9618
----------------------
9619
 
9620
All 80387 floating point types except packed BCD are supported.  (BCD
9621
support may be added without much difficulty).  These data types are
9622
16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
9623
and extended (80-bit) precision floating point.  Each supported type
9624
has an instruction mnemonic suffix and a constructor associated with
9625
it.  Instruction mnemonic suffixes specify the operand's data type.
9626
Constructors build these data types into memory.
9627
 
9628
   * Floating point constructors are `.float' or `.single', `.double',
9629
     and `.tfloat' for 32-, 64-, and 80-bit formats.  These correspond
9630
     to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
9631
     80-bit (ten byte) real.  The 80387 only supports this format via
9632
     the `fldt' (load 80-bit real to stack top) and `fstpt' (store
9633
     80-bit real and pop stack) instructions.
9634
 
9635
   * Integer constructors are `.word', `.long' or `.int', and `.quad'
9636
     for the 16-, 32-, and 64-bit integer formats.  The corresponding
9637
     instruction mnemonic suffixes are `s' (single), `l' (long), and
9638
     `q' (quad).  As with the 80-bit real format, the 64-bit `q' format
9639
     is only present in the `fildq' (load quad integer to stack top)
9640
     and `fistpq' (store quad integer and pop stack) instructions.
9641
 
9642
   Register to register operations should not use instruction mnemonic
9643
suffixes.  `fstl %st, %st(1)' will give a warning, and be assembled as
9644
if you wrote `fst %st, %st(1)', since all register to register
9645
operations use 80-bit floating point operands. (Contrast this with
9646
`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
9647
point format, then stores the result in the 4 byte location `mem')
9648
 
9649

9650
File: as.info,  Node: i386-SIMD,  Next: i386-16bit,  Prev: i386-Float,  Up: i386-Dependent
9651
 
9652
9.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations
9653
----------------------------------------------------
9654
 
9655
`as' supports Intel's MMX instruction set (SIMD instructions for
9656
integer data), available on Intel's Pentium MMX processors and Pentium
9657
II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
9658
probably others.  It also supports AMD's 3DNow!  instruction set (SIMD
9659
instructions for 32-bit floating point data) available on AMD's K6-2
9660
processor and possibly others in the future.
9661
 
9662
   Currently, `as' does not support Intel's floating point SIMD, Katmai
9663
(KNI).
9664
 
9665
   The eight 64-bit MMX operands, also used by 3DNow!, are called
9666
`%mm0', `%mm1', ... `%mm7'.  They contain eight 8-bit integers, four
9667
16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
9668
floating point values.  The MMX registers cannot be used at the same
9669
time as the floating point stack.
9670
 
9671
   See Intel and AMD documentation, keeping in mind that the operand
9672
order in instructions is reversed from the Intel syntax.
9673
 
9674

9675
File: as.info,  Node: i386-16bit,  Next: i386-Arch,  Prev: i386-SIMD,  Up: i386-Dependent
9676
 
9677
9.13.12 Writing 16-bit Code
9678
---------------------------
9679
 
9680
While `as' normally writes only "pure" 32-bit i386 code or 64-bit
9681
x86-64 code depending on the default configuration, it also supports
9682
writing code to run in real mode or in 16-bit protected mode code
9683
segments.  To do this, put a `.code16' or `.code16gcc' directive before
9684
the assembly language instructions to be run in 16-bit mode.  You can
9685
switch `as' back to writing normal 32-bit code with the `.code32'
9686
directive.
9687
 
9688
   `.code16gcc' provides experimental support for generating 16-bit
9689
code from gcc, and differs from `.code16' in that `call', `ret',
9690
`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
9691
instructions default to 32-bit size.  This is so that the stack pointer
9692
is manipulated in the same way over function calls, allowing access to
9693
function parameters at the same stack offsets as in 32-bit mode.
9694
`.code16gcc' also automatically adds address size prefixes where
9695
necessary to use the 32-bit addressing modes that gcc generates.
9696
 
9697
   The code which `as' generates in 16-bit mode will not necessarily
9698
run on a 16-bit pre-80386 processor.  To write code that runs on such a
9699
processor, you must refrain from using _any_ 32-bit constructs which
9700
require `as' to output address or operand size prefixes.
9701
 
9702
   Note that writing 16-bit code instructions by explicitly specifying a
9703
prefix or an instruction mnemonic suffix within a 32-bit code section
9704
generates different machine instructions than those generated for a
9705
16-bit code segment.  In a 32-bit code section, the following code
9706
generates the machine opcode bytes `66 6a 04', which pushes the value
9707
`4' onto the stack, decrementing `%esp' by 2.
9708
 
9709
             pushw $4
9710
 
9711
   The same code in a 16-bit code section would generate the machine
9712
opcode bytes `6a 04' (i.e., without the operand size prefix), which is
9713
correct since the processor default operand size is assumed to be 16
9714
bits in a 16-bit code section.
9715
 
9716

9717
File: as.info,  Node: i386-Bugs,  Next: i386-Notes,  Prev: i386-Arch,  Up: i386-Dependent
9718
 
9719
9.13.13 AT&T Syntax bugs
9720
------------------------
9721
 
9722
The UnixWare assembler, and probably other AT&T derived ix86 Unix
9723
assemblers, generate floating point instructions with reversed source
9724
and destination registers in certain cases.  Unfortunately, gcc and
9725
possibly many other programs use this reversed syntax, so we're stuck
9726
with it.
9727
 
9728
   For example
9729
 
9730
             fsub %st,%st(3)
9731
   results in `%st(3)' being updated to `%st - %st(3)' rather than the
9732
expected `%st(3) - %st'.  This happens with all the non-commutative
9733
arithmetic floating point operations with two register operands where
9734
the source register is `%st' and the destination register is `%st(i)'.
9735
 
9736

9737
File: as.info,  Node: i386-Arch,  Next: i386-Bugs,  Prev: i386-16bit,  Up: i386-Dependent
9738
 
9739
9.13.14 Specifying CPU Architecture
9740
-----------------------------------
9741
 
9742
`as' may be told to assemble for a particular CPU (sub-)architecture
9743
with the `.arch CPU_TYPE' directive.  This directive enables a warning
9744
when gas detects an instruction that is not supported on the CPU
9745
specified.  The choices for CPU_TYPE are:
9746
 
9747
`i8086'        `i186'         `i286'         `i386'
9748
`i486'         `i586'         `i686'         `pentium'
9749
`pentiumpro'   `pentiumii'    `pentiumiii'   `pentium4'
9750
`prescott'     `nocona'       `core'         `core2'
9751
`k6'           `k6_2'         `athlon'       `k8'
9752
`amdfam10'
9753
`generic32'    `generic64'
9754
`.mmx'         `.sse'         `.sse2'        `.sse3'
9755
`.ssse3'       `.sse4.1'      `.sse4.2'      `.sse4'
9756
`.avx'         `.vmx'         `.smx'         `.xsave'
9757
`.aes'         `.pclmul'      `.fma'         `.movbe'
9758
`.ept'
9759
`.3dnow'       `.3dnowa'      `.sse4a'       `.sse5'
9760
`.svme'        `.abm'
9761
`.padlock'
9762
 
9763
   Apart from the warning, there are only two other effects on `as'
9764
operation;  Firstly, if you specify a CPU other than `i486', then shift
9765
by one instructions such as `sarl $1, %eax' will automatically use a
9766
two byte opcode sequence.  The larger three byte opcode sequence is
9767
used on the 486 (and when no architecture is specified) because it
9768
executes faster on the 486.  Note that you can explicitly request the
9769
two byte opcode by writing `sarl %eax'.  Secondly, if you specify
9770
`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
9771
offset conditional jumps will be promoted when necessary to a two
9772
instruction sequence consisting of a conditional jump of the opposite
9773
sense around an unconditional jump to the target.
9774
 
9775
   Following the CPU architecture (but not a sub-architecture, which
9776
are those starting with a dot), you may specify `jumps' or `nojumps' to
9777
control automatic promotion of conditional jumps. `jumps' is the
9778
default, and enables jump promotion;  All external jumps will be of the
9779
long variety, and file-local jumps will be promoted as necessary.
9780
(*note i386-Jumps::)  `nojumps' leaves external conditional jumps as
9781
byte offset jumps, and warns about file-local conditional jumps that
9782
`as' promotes.  Unconditional jumps are treated as for `jumps'.
9783
 
9784
   For example
9785
 
9786
      .arch i8086,nojumps
9787
 
9788

9789
File: as.info,  Node: i386-Notes,  Prev: i386-Bugs,  Up: i386-Dependent
9790
 
9791
9.13.15 Notes
9792
-------------
9793
 
9794
There is some trickery concerning the `mul' and `imul' instructions
9795
that deserves mention.  The 16-, 32-, 64- and 128-bit expanding
9796
multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
9797
can be output only in the one operand form.  Thus, `imul %ebx, %eax'
9798
does _not_ select the expanding multiply; the expanding multiply would
9799
clobber the `%edx' register, and this would confuse `gcc' output.  Use
9800
`imul %ebx' to get the 64-bit product in `%edx:%eax'.
9801
 
9802
   We have added a two operand form of `imul' when the first operand is
9803
an immediate mode expression and the second operand is a register.
9804
This is just a shorthand, so that, multiplying `%eax' by 69, for
9805
example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
9806
%eax'.
9807
 
9808

9809
File: as.info,  Node: i860-Dependent,  Next: i960-Dependent,  Prev: i386-Dependent,  Up: Machine Dependencies
9810
 
9811
9.14 Intel i860 Dependent Features
9812
==================================
9813
 
9814
* Menu:
9815
 
9816
* Notes-i860::                  i860 Notes
9817
* Options-i860::                i860 Command-line Options
9818
* Directives-i860::             i860 Machine Directives
9819
* Opcodes for i860::            i860 Opcodes
9820
 
9821

9822
File: as.info,  Node: Notes-i860,  Next: Options-i860,  Up: i860-Dependent
9823
 
9824
9.14.1 i860 Notes
9825
-----------------
9826
 
9827
This is a fairly complete i860 assembler which is compatible with the
9828
UNIX System V/860 Release 4 assembler. However, it does not currently
9829
support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').
9830
 
9831
   Like the SVR4/860 assembler, the output object format is ELF32.
9832
Currently, this is the only supported object format. If there is
9833
sufficient interest, other formats such as COFF may be implemented.
9834
 
9835
   Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
9836
being the default.  One difference is that AT&T syntax requires the '%'
9837
prefix on register names while Intel syntax does not.  Another
9838
difference is in the specification of relocatable expressions.  The
9839
Intel syntax is `ha%expression' whereas the SVR4 syntax is
9840
`[expression]@ha' (and similarly for the "l" and "h" selectors).
9841
 
9842

9843
File: as.info,  Node: Options-i860,  Next: Directives-i860,  Prev: Notes-i860,  Up: i860-Dependent
9844
 
9845
9.14.2 i860 Command-line Options
9846
--------------------------------
9847
 
9848
9.14.2.1 SVR4 compatibility options
9849
...................................
9850
 
9851
`-V'
9852
     Print assembler version.
9853
 
9854
`-Qy'
9855
     Ignored.
9856
 
9857
`-Qn'
9858
     Ignored.
9859
 
9860
9.14.2.2 Other options
9861
......................
9862
 
9863
`-EL'
9864
     Select little endian output (this is the default).
9865
 
9866
`-EB'
9867
     Select big endian output. Note that the i860 always reads
9868
     instructions as little endian data, so this option only effects
9869
     data and not instructions.
9870
 
9871
`-mwarn-expand'
9872
     Emit a warning message if any pseudo-instruction expansions
9873
     occurred.  For example, a `or' instruction with an immediate
9874
     larger than 16-bits will be expanded into two instructions. This
9875
     is a very undesirable feature to rely on, so this flag can help
9876
     detect any code where it happens. One use of it, for instance, has
9877
     been to find and eliminate any place where `gcc' may emit these
9878
     pseudo-instructions.
9879
 
9880
`-mxp'
9881
     Enable support for the i860XP instructions and control registers.
9882
     By default, this option is disabled so that only the base
9883
     instruction set (i.e., i860XR) is supported.
9884
 
9885
`-mintel-syntax'
9886
     The i860 assembler defaults to AT&T/SVR4 syntax.  This option
9887
     enables the Intel syntax.
9888
 
9889

9890
File: as.info,  Node: Directives-i860,  Next: Opcodes for i860,  Prev: Options-i860,  Up: i860-Dependent
9891
 
9892
9.14.3 i860 Machine Directives
9893
------------------------------
9894
 
9895
`.dual'
9896
     Enter dual instruction mode. While this directive is supported, the
9897
     preferred way to use dual instruction mode is to explicitly code
9898
     the dual bit with the `d.' prefix.
9899
 
9900
`.enddual'
9901
     Exit dual instruction mode. While this directive is supported, the
9902
     preferred way to use dual instruction mode is to explicitly code
9903
     the dual bit with the `d.' prefix.
9904
 
9905
`.atmp'
9906
     Change the temporary register used when expanding pseudo
9907
     operations. The default register is `r31'.
9908
 
9909
   The `.dual', `.enddual', and `.atmp' directives are available only
9910
in the Intel syntax mode.
9911
 
9912
   Both syntaxes allow for the standard `.align' directive.  However,
9913
the Intel syntax additionally allows keywords for the alignment
9914
parameter: "`.align type'", where `type' is one of `.short', `.long',
9915
`.quad', `.single', `.double' representing alignments of 2, 4, 16, 4,
9916
and 8, respectively.
9917
 
9918

9919
File: as.info,  Node: Opcodes for i860,  Prev: Directives-i860,  Up: i860-Dependent
9920
 
9921
9.14.4 i860 Opcodes
9922
-------------------
9923
 
9924
All of the Intel i860XR and i860XP machine instructions are supported.
9925
Please see either _i860 Microprocessor Programmer's Reference Manual_
9926
or _i860 Microprocessor Architecture_ for more information.
9927
 
9928
9.14.4.1 Other instruction support (pseudo-instructions)
9929
........................................................
9930
 
9931
For compatibility with some other i860 assemblers, a number of
9932
pseudo-instructions are supported. While these are supported, they are
9933
a very undesirable feature that should be avoided - in particular, when
9934
they result in an expansion to multiple actual i860 instructions. Below
9935
are the pseudo-instructions that result in expansions.
9936
   * Load large immediate into general register:
9937
 
9938
     The pseudo-instruction `mov imm,%rn' (where the immediate does not
9939
     fit within a signed 16-bit field) will be expanded into:
9940
          orh large_imm@h,%r0,%rn
9941
          or large_imm@l,%rn,%rn
9942
 
9943
   * Load/store with relocatable address expression:
9944
 
9945
     For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
9946
     be expanded into:
9947
          orh addr_exp@ha,%rx,%r31
9948
          ld.l addr_exp@l(%r31),%rn
9949
 
9950
     The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
9951
     fst.x', and `pst.x' as well.
9952
 
9953
   * Signed large immediate with add/subtract:
9954
 
9955
     If any of the arithmetic operations `adds, addu, subs, subu' are
9956
     used with an immediate larger than 16-bits (signed), then they
9957
     will be expanded.  For instance, the pseudo-instruction `adds
9958
     large_imm,%rx,%rn' expands to:
9959
          orh large_imm@h,%r0,%r31
9960
          or large_imm@l,%r31,%r31
9961
          adds %r31,%rx,%rn
9962
 
9963
   * Unsigned large immediate with logical operations:
9964
 
9965
     Logical operations (`or, andnot, or, xor') also result in
9966
     expansions.  The pseudo-instruction `or large_imm,%rx,%rn' results
9967
     in:
9968
          orh large_imm@h,%rx,%r31
9969
          or large_imm@l,%r31,%rn
9970
 
9971
     Similarly for the others, except for `and' which expands to:
9972
          andnot (-1 - large_imm)@h,%rx,%r31
9973
          andnot (-1 - large_imm)@l,%r31,%rn
9974
 
9975

9976
File: as.info,  Node: i960-Dependent,  Next: IA-64-Dependent,  Prev: i860-Dependent,  Up: Machine Dependencies
9977
 
9978
9.15 Intel 80960 Dependent Features
9979
===================================
9980
 
9981
* Menu:
9982
 
9983
* Options-i960::                i960 Command-line Options
9984
* Floating Point-i960::         Floating Point
9985
* Directives-i960::             i960 Machine Directives
9986
* Opcodes for i960::            i960 Opcodes
9987
 
9988

9989
File: as.info,  Node: Options-i960,  Next: Floating Point-i960,  Up: i960-Dependent
9990
 
9991
9.15.1 i960 Command-line Options
9992
--------------------------------
9993
 
9994
`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
9995
     Select the 80960 architecture.  Instructions or features not
9996
     supported by the selected architecture cause fatal errors.
9997
 
9998
     `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
9999
     Synonyms are provided for compatibility with other tools.
10000
 
10001
     If you do not specify any of these options, `as' generates code
10002
     for any instruction or feature that is supported by _some_ version
10003
     of the 960 (even if this means mixing architectures!).  In
10004
     principle, `as' attempts to deduce the minimal sufficient
10005
     processor type if none is specified; depending on the object code
10006
     format, the processor type may be recorded in the object file.  If
10007
     it is critical that the `as' output match a specific architecture,
10008
     specify that architecture explicitly.
10009
 
10010
`-b'
10011
     Add code to collect information about conditional branches taken,
10012
     for later optimization using branch prediction bits.  (The
10013
     conditional branch instructions have branch prediction bits in the
10014
     CA, CB, and CC architectures.)  If BR represents a conditional
10015
     branch instruction, the following represents the code generated by
10016
     the assembler when `-b' is specified:
10017
 
10018
                  call    INCREMENT ROUTINE
10019
                  .word   0       # pre-counter
10020
          Label:  BR
10021
                  call    INCREMENT ROUTINE
10022
                  .word   0       # post-counter
10023
 
10024
     The counter following a branch records the number of times that
10025
     branch was _not_ taken; the difference between the two counters is
10026
     the number of times the branch _was_ taken.
10027
 
10028
     A table of every such `Label' is also generated, so that the
10029
     external postprocessor `gbr960' (supplied by Intel) can locate all
10030
     the counters.  This table is always labeled `__BRANCH_TABLE__';
10031
     this is a local symbol to permit collecting statistics for many
10032
     separate object files.  The table is word aligned, and begins with
10033
     a two-word header.  The first word, initialized to 0, is used in
10034
     maintaining linked lists of branch tables.  The second word is a
10035
     count of the number of entries in the table, which follow
10036
     immediately: each is a word, pointing to one of the labels
10037
     illustrated above.
10038
 
10039
           +------------+------------+------------+ ... +------------+
10040
           |            |            |            |     |            |
10041
           |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |
10042
           |            |            |            |     |            |
10043
           +------------+------------+------------+ ... +------------+
10044
 
10045
                         __BRANCH_TABLE__ layout
10046
 
10047
     The first word of the header is used to locate multiple branch
10048
     tables, since each object file may contain one. Normally the links
10049
     are maintained with a call to an initialization routine, placed at
10050
     the beginning of each function in the file.  The GNU C compiler
10051
     generates these calls automatically when you give it a `-b' option.
10052
     For further details, see the documentation of `gbr960'.
10053
 
10054
`-no-relax'
10055
     Normally, Compare-and-Branch instructions with targets that require
10056
     displacements greater than 13 bits (or that have external targets)
10057
     are replaced with the corresponding compare (or `chkbit') and
10058
     branch instructions.  You can use the `-no-relax' option to
10059
     specify that `as' should generate errors instead, if the target
10060
     displacement is larger than 13 bits.
10061
 
10062
     This option does not affect the Compare-and-Jump instructions; the
10063
     code emitted for them is _always_ adjusted when necessary
10064
     (depending on displacement size), regardless of whether you use
10065
     `-no-relax'.
10066
 
10067

10068
File: as.info,  Node: Floating Point-i960,  Next: Directives-i960,  Prev: Options-i960,  Up: i960-Dependent
10069
 
10070
9.15.2 Floating Point
10071
---------------------
10072
 
10073
`as' generates IEEE floating-point numbers for the directives `.float',
10074
`.double', `.extended', and `.single'.
10075
 
10076

10077
File: as.info,  Node: Directives-i960,  Next: Opcodes for i960,  Prev: Floating Point-i960,  Up: i960-Dependent
10078
 
10079
9.15.3 i960 Machine Directives
10080
------------------------------
10081
 
10082
`.bss SYMBOL, LENGTH, ALIGN'
10083
     Reserve LENGTH bytes in the bss section for a local SYMBOL,
10084
     aligned to the power of two specified by ALIGN.  LENGTH and ALIGN
10085
     must be positive absolute expressions.  This directive differs
10086
     from `.lcomm' only in that it permits you to specify an alignment.
10087
     *Note `.lcomm': Lcomm.
10088
 
10089
`.extended FLONUMS'
10090
     `.extended' expects zero or more flonums, separated by commas; for
10091
     each flonum, `.extended' emits an IEEE extended-format (80-bit)
10092
     floating-point number.
10093
 
10094
`.leafproc CALL-LAB, BAL-LAB'
10095
     You can use the `.leafproc' directive in conjunction with the
10096
     optimized `callj' instruction to enable faster calls of leaf
10097
     procedures.  If a procedure is known to call no other procedures,
10098
     you may define an entry point that skips procedure prolog code
10099
     (and that does not depend on system-supplied saved context), and
10100
     declare it as the BAL-LAB using `.leafproc'.  If the procedure
10101
     also has an entry point that goes through the normal prolog, you
10102
     can specify that entry point as CALL-LAB.
10103
 
10104
     A `.leafproc' declaration is meant for use in conjunction with the
10105
     optimized call instruction `callj'; the directive records the data
10106
     needed later to choose between converting the `callj' into a `bal'
10107
     or a `call'.
10108
 
10109
     CALL-LAB is optional; if only one argument is present, or if the
10110
     two arguments are identical, the single argument is assumed to be
10111
     the `bal' entry point.
10112
 
10113
`.sysproc NAME, INDEX'
10114
     The `.sysproc' directive defines a name for a system procedure.
10115
     After you define it using `.sysproc', you can use NAME to refer to
10116
     the system procedure identified by INDEX when calling procedures
10117
     with the optimized call instruction `callj'.
10118
 
10119
     Both arguments are required; INDEX must be between 0 and 31
10120
     (inclusive).
10121
 
10122

10123
File: as.info,  Node: Opcodes for i960,  Prev: Directives-i960,  Up: i960-Dependent
10124
 
10125
9.15.4 i960 Opcodes
10126
-------------------
10127
 
10128
All Intel 960 machine instructions are supported; *note i960
10129
Command-line Options: Options-i960. for a discussion of selecting the
10130
instruction subset for a particular 960 architecture.
10131
 
10132
   Some opcodes are processed beyond simply emitting a single
10133
corresponding instruction: `callj', and Compare-and-Branch or
10134
Compare-and-Jump instructions with target displacements larger than 13
10135
bits.
10136
 
10137
* Menu:
10138
 
10139
* callj-i960::                  `callj'
10140
* Compare-and-branch-i960::     Compare-and-Branch
10141
 
10142

10143
File: as.info,  Node: callj-i960,  Next: Compare-and-branch-i960,  Up: Opcodes for i960
10144
 
10145
9.15.4.1 `callj'
10146
................
10147
 
10148
You can write `callj' to have the assembler or the linker determine the
10149
most appropriate form of subroutine call: `call', `bal', or `calls'.
10150
If the assembly source contains enough information--a `.leafproc' or
10151
`.sysproc' directive defining the operand--then `as' translates the
10152
`callj'; if not, it simply emits the `callj', leaving it for the linker
10153
to resolve.
10154
 
10155

10156
File: as.info,  Node: Compare-and-branch-i960,  Prev: callj-i960,  Up: Opcodes for i960
10157
 
10158
9.15.4.2 Compare-and-Branch
10159
...........................
10160
 
10161
The 960 architectures provide combined Compare-and-Branch instructions
10162
that permit you to store the branch target in the lower 13 bits of the
10163
instruction word itself.  However, if you specify a branch target far
10164
enough away that its address won't fit in 13 bits, the assembler can
10165
either issue an error, or convert your Compare-and-Branch instruction
10166
into separate instructions to do the compare and the branch.
10167
 
10168
   Whether `as' gives an error or expands the instruction depends on
10169
two choices you can make: whether you use the `-no-relax' option, and
10170
whether you use a "Compare and Branch" instruction or a "Compare and
10171
Jump" instruction.  The "Jump" instructions are _always_ expanded if
10172
necessary; the "Branch" instructions are expanded when necessary
10173
_unless_ you specify `-no-relax'--in which case `as' gives an error
10174
instead.
10175
 
10176
   These are the Compare-and-Branch instructions, their "Jump" variants,
10177
and the instruction pairs they may expand into:
10178
 
10179
             Compare and
10180
          Branch      Jump       Expanded to
10181
          ------    ------       ------------
10182
             bbc                 chkbit; bno
10183
             bbs                 chkbit; bo
10184
          cmpibe    cmpije       cmpi; be
10185
          cmpibg    cmpijg       cmpi; bg
10186
         cmpibge   cmpijge       cmpi; bge
10187
          cmpibl    cmpijl       cmpi; bl
10188
         cmpible   cmpijle       cmpi; ble
10189
         cmpibno   cmpijno       cmpi; bno
10190
         cmpibne   cmpijne       cmpi; bne
10191
          cmpibo    cmpijo       cmpi; bo
10192
          cmpobe    cmpoje       cmpo; be
10193
          cmpobg    cmpojg       cmpo; bg
10194
         cmpobge   cmpojge       cmpo; bge
10195
          cmpobl    cmpojl       cmpo; bl
10196
         cmpoble   cmpojle       cmpo; ble
10197
         cmpobne   cmpojne       cmpo; bne
10198
 
10199

10200
File: as.info,  Node: IA-64-Dependent,  Next: IP2K-Dependent,  Prev: i960-Dependent,  Up: Machine Dependencies
10201
 
10202
9.16 IA-64 Dependent Features
10203
=============================
10204
 
10205
* Menu:
10206
 
10207
* IA-64 Options::              Options
10208
* IA-64 Syntax::               Syntax
10209
* IA-64 Opcodes::              Opcodes
10210
 
10211

10212
File: as.info,  Node: IA-64 Options,  Next: IA-64 Syntax,  Up: IA-64-Dependent
10213
 
10214
9.16.1 Options
10215
--------------
10216
 
10217
`-mconstant-gp'
10218
     This option instructs the assembler to mark the resulting object
10219
     file as using the "constant GP" model.  With this model, it is
10220
     assumed that the entire program uses a single global pointer (GP)
10221
     value.  Note that this option does not in any fashion affect the
10222
     machine code emitted by the assembler.  All it does is turn on the
10223
     EF_IA_64_CONS_GP flag in the ELF file header.
10224
 
10225
`-mauto-pic'
10226
     This option instructs the assembler to mark the resulting object
10227
     file as using the "constant GP without function descriptor" data
10228
     model.  This model is like the "constant GP" model, except that it
10229
     additionally does away with function descriptors.  What this means
10230
     is that the address of a function refers directly to the
10231
     function's code entry-point.  Normally, such an address would
10232
     refer to a function descriptor, which contains both the code
10233
     entry-point and the GP-value needed by the function.  Note that
10234
     this option does not in any fashion affect the machine code
10235
     emitted by the assembler.  All it does is turn on the
10236
     EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
10237
 
10238
`-milp32'
10239
 
10240
`-milp64'
10241
 
10242
`-mlp64'
10243
 
10244
`-mp64'
10245
     These options select the data model.  The assembler defaults to
10246
     `-mlp64' (LP64 data model).
10247
 
10248
`-mle'
10249
 
10250
`-mbe'
10251
     These options select the byte order.  The `-mle' option selects
10252
     little-endian byte order (default) and `-mbe' selects big-endian
10253
     byte order.  Note that IA-64 machine code always uses
10254
     little-endian byte order.
10255
 
10256
`-mtune=itanium1'
10257
 
10258
`-mtune=itanium2'
10259
     Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default
10260
     is ITANIUM2.
10261
 
10262
`-munwind-check=warning'
10263
 
10264
`-munwind-check=error'
10265
     These options control what the assembler will do when performing
10266
     consistency checks on unwind directives.  `-munwind-check=warning'
10267
     will make the assembler issue a warning when an unwind directive
10268
     check fails.  This is the default.  `-munwind-check=error' will
10269
     make the assembler issue an error when an unwind directive check
10270
     fails.
10271
 
10272
`-mhint.b=ok'
10273
 
10274
`-mhint.b=warning'
10275
 
10276
`-mhint.b=error'
10277
     These options control what the assembler will do when the `hint.b'
10278
     instruction is used.  `-mhint.b=ok' will make the assembler accept
10279
     `hint.b'.  `-mint.b=warning' will make the assembler issue a
10280
     warning when `hint.b' is used.  `-mhint.b=error' will make the
10281
     assembler treat `hint.b' as an error, which is the default.
10282
 
10283
`-x'
10284
 
10285
`-xexplicit'
10286
     These options turn on dependency violation checking.
10287
 
10288
`-xauto'
10289
     This option instructs the assembler to automatically insert stop
10290
     bits where necessary to remove dependency violations.  This is the
10291
     default mode.
10292
 
10293
`-xnone'
10294
     This option turns off dependency violation checking.
10295
 
10296
`-xdebug'
10297
     This turns on debug output intended to help tracking down bugs in
10298
     the dependency violation checker.
10299
 
10300
`-xdebugn'
10301
     This is a shortcut for -xnone -xdebug.
10302
 
10303
`-xdebugx'
10304
     This is a shortcut for -xexplicit -xdebug.
10305
 
10306
 
10307

10308
File: as.info,  Node: IA-64 Syntax,  Next: IA-64 Opcodes,  Prev: IA-64 Options,  Up: IA-64-Dependent
10309
 
10310
9.16.2 Syntax
10311
-------------
10312
 
10313
The assembler syntax closely follows the IA-64 Assembly Language
10314
Reference Guide.
10315
 
10316
* Menu:
10317
 
10318
* IA-64-Chars::                Special Characters
10319
* IA-64-Regs::                 Register Names
10320
* IA-64-Bits::                 Bit Names
10321
 
10322

10323
File: as.info,  Node: IA-64-Chars,  Next: IA-64-Regs,  Up: IA-64 Syntax
10324
 
10325
9.16.2.1 Special Characters
10326
...........................
10327
 
10328
`//' is the line comment token.
10329
 
10330
   `;' can be used instead of a newline to separate statements.
10331
 
10332

10333
File: as.info,  Node: IA-64-Regs,  Next: IA-64-Bits,  Prev: IA-64-Chars,  Up: IA-64 Syntax
10334
 
10335
9.16.2.2 Register Names
10336
.......................
10337
 
10338
The 128 integer registers are referred to as `rN'.  The 128
10339
floating-point registers are referred to as `fN'.  The 128 application
10340
registers are referred to as `arN'.  The 128 control registers are
10341
referred to as `crN'.  The 64 one-bit predicate registers are referred
10342
to as `pN'.  The 8 branch registers are referred to as `bN'.  In
10343
addition, the assembler defines a number of aliases: `gp' (`r1'), `sp'
10344
(`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'),
10345
`ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N').
10346
 
10347
   For convenience, the assembler also defines aliases for all named
10348
application and control registers.  For example, `ar.bsp' refers to the
10349
register backing store pointer (`ar17').  Similarly, `cr.eoi' refers to
10350
the end-of-interrupt register (`cr67').
10351
 
10352

10353
File: as.info,  Node: IA-64-Bits,  Prev: IA-64-Regs,  Up: IA-64 Syntax
10354
 
10355
9.16.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
10356
........................................................
10357
 
10358
The assembler defines bit masks for each of the bits in the IA-64
10359
processor status register.  For example, `psr.ic' corresponds to a
10360
value of 0x2000.  These masks are primarily intended for use with the
10361
`ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere
10362
else where an integer constant is expected.
10363
 
10364

10365
File: as.info,  Node: IA-64 Opcodes,  Prev: IA-64 Syntax,  Up: IA-64-Dependent
10366
 
10367
9.16.3 Opcodes
10368
--------------
10369
 
10370
For detailed information on the IA-64 machine instruction set, see the
10371
IA-64 Architecture Handbook
10372
(http://developer.intel.com/design/itanium/arch_spec.htm).
10373
 
10374

10375
File: as.info,  Node: IP2K-Dependent,  Next: M32C-Dependent,  Prev: IA-64-Dependent,  Up: Machine Dependencies
10376
 
10377
9.17 IP2K Dependent Features
10378
============================
10379
 
10380
* Menu:
10381
 
10382
* IP2K-Opts::                   IP2K Options
10383
 
10384

10385
File: as.info,  Node: IP2K-Opts,  Up: IP2K-Dependent
10386
 
10387
9.17.1 IP2K Options
10388
-------------------
10389
 
10390
The Ubicom IP2K version of `as' has a few machine dependent options:
10391
 
10392
`-mip2022ext'
10393
     `as' can assemble the extended IP2022 instructions, but it will
10394
     only do so if this is specifically allowed via this command line
10395
     option.
10396
 
10397
`-mip2022'
10398
     This option restores the assembler's default behaviour of not
10399
     permitting the extended IP2022 instructions to be assembled.
10400
 
10401
 
10402

10403
File: as.info,  Node: M32C-Dependent,  Next: M32R-Dependent,  Prev: IP2K-Dependent,  Up: Machine Dependencies
10404
 
10405
9.18 M32C Dependent Features
10406
============================
10407
 
10408
   `as' can assemble code for several different members of the Renesas
10409
M32C family.  Normally the default is to assemble code for the M16C
10410
microprocessor.  The `-m32c' option may be used to change the default
10411
to the M32C microprocessor.
10412
 
10413
* Menu:
10414
 
10415
* M32C-Opts::                   M32C Options
10416
* M32C-Modifiers::              Symbolic Operand Modifiers
10417
 
10418

10419
File: as.info,  Node: M32C-Opts,  Next: M32C-Modifiers,  Up: M32C-Dependent
10420
 
10421
9.18.1 M32C Options
10422
-------------------
10423
 
10424
The Renesas M32C version of `as' has these machine-dependent options:
10425
 
10426
`-m32c'
10427
     Assemble M32C instructions.
10428
 
10429
`-m16c'
10430
     Assemble M16C instructions (default).
10431
 
10432
`-relax'
10433
     Enable support for link-time relaxations.
10434
 
10435
`-h-tick-hex'
10436
     Support H'00 style hex constants in addition to 0x00 style.
10437
 
10438
 
10439

10440
File: as.info,  Node: M32C-Modifiers,  Prev: M32C-Opts,  Up: M32C-Dependent
10441
 
10442
9.18.2 Symbolic Operand Modifiers
10443
---------------------------------
10444
 
10445
The assembler supports several modifiers when using symbol addresses in
10446
M32C instruction operands.  The general syntax is the following:
10447
 
10448
     %modifier(symbol)
10449
 
10450
`%dsp8'
10451
`%dsp16'
10452
     These modifiers override the assembler's assumptions about how big
10453
     a symbol's address is.  Normally, when it sees an operand like
10454
     `sym[a0]' it assumes `sym' may require the widest displacement
10455
     field (16 bits for `-m16c', 24 bits for `-m32c').  These modifiers
10456
     tell it to assume the address will fit in an 8 or 16 bit
10457
     (respectively) unsigned displacement.  Note that, of course, if it
10458
     doesn't actually fit you will get linker errors.  Example:
10459
 
10460
          mov.w %dsp8(sym)[a0],r1
10461
          mov.b #0,%dsp8(sym)[a0]
10462
 
10463
`%hi8'
10464
     This modifier allows you to load bits 16 through 23 of a 24 bit
10465
     address into an 8 bit register.  This is useful with, for example,
10466
     the M16C `smovf' instruction, which expects a 20 bit address in
10467
     `r1h' and `a0'.  Example:
10468
 
10469
          mov.b #%hi8(sym),r1h
10470
          mov.w #%lo16(sym),a0
10471
          smovf.b
10472
 
10473
`%lo16'
10474
     Likewise, this modifier allows you to load bits 0 through 15 of a
10475
     24 bit address into a 16 bit register.
10476
 
10477
`%hi16'
10478
     This modifier allows you to load bits 16 through 31 of a 32 bit
10479
     address into a 16 bit register.  While the M32C family only has 24
10480
     bits of address space, it does support addresses in pairs of 16 bit
10481
     registers (like `a1a0' for the `lde' instruction).  This modifier
10482
     is for loading the upper half in such cases.  Example:
10483
 
10484
          mov.w #%hi16(sym),a1
10485
          mov.w #%lo16(sym),a0
10486
          ...
10487
          lde.w [a1a0],r1
10488
 
10489
 
10490

10491
File: as.info,  Node: M32R-Dependent,  Next: M68K-Dependent,  Prev: M32C-Dependent,  Up: Machine Dependencies
10492
 
10493
9.19 M32R Dependent Features
10494
============================
10495
 
10496
* Menu:
10497
 
10498
* M32R-Opts::                   M32R Options
10499
* M32R-Directives::             M32R Directives
10500
* M32R-Warnings::               M32R Warnings
10501
 
10502

10503
File: as.info,  Node: M32R-Opts,  Next: M32R-Directives,  Up: M32R-Dependent
10504
 
10505
9.19.1 M32R Options
10506
-------------------
10507
 
10508
The Renease M32R version of `as' has a few machine dependent options:
10509
 
10510
`-m32rx'
10511
     `as' can assemble code for several different members of the
10512
     Renesas M32R family.  Normally the default is to assemble code for
10513
     the M32R microprocessor.  This option may be used to change the
10514
     default to the M32RX microprocessor, which adds some more
10515
     instructions to the basic M32R instruction set, and some
10516
     additional parameters to some of the original instructions.
10517
 
10518
`-m32r2'
10519
     This option changes the target processor to the the M32R2
10520
     microprocessor.
10521
 
10522
`-m32r'
10523
     This option can be used to restore the assembler's default
10524
     behaviour of assembling for the M32R microprocessor.  This can be
10525
     useful if the default has been changed by a previous command line
10526
     option.
10527
 
10528
`-little'
10529
     This option tells the assembler to produce little-endian code and
10530
     data.  The default is dependent upon how the toolchain was
10531
     configured.
10532
 
10533
`-EL'
10534
     This is a synonym for _-little_.
10535
 
10536
`-big'
10537
     This option tells the assembler to produce big-endian code and
10538
     data.
10539
 
10540
`-EB'
10541
     This is a synonum for _-big_.
10542
 
10543
`-KPIC'
10544
     This option specifies that the output of the assembler should be
10545
     marked as position-independent code (PIC).
10546
 
10547
`-parallel'
10548
     This option tells the assembler to attempts to combine two
10549
     sequential instructions into a single, parallel instruction, where
10550
     it is legal to do so.
10551
 
10552
`-no-parallel'
10553
     This option disables a previously enabled _-parallel_ option.
10554
 
10555
`-no-bitinst'
10556
     This option disables the support for the extended bit-field
10557
     instructions provided by the M32R2.  If this support needs to be
10558
     re-enabled the _-bitinst_ switch can be used to restore it.
10559
 
10560
`-O'
10561
     This option tells the assembler to attempt to optimize the
10562
     instructions that it produces.  This includes filling delay slots
10563
     and converting sequential instructions into parallel ones.  This
10564
     option implies _-parallel_.
10565
 
10566
`-warn-explicit-parallel-conflicts'
10567
     Instructs `as' to produce warning messages when questionable
10568
     parallel instructions are encountered.  This option is enabled by
10569
     default, but `gcc' disables it when it invokes `as' directly.
10570
     Questionable instructions are those whose behaviour would be
10571
     different if they were executed sequentially.  For example the
10572
     code fragment `mv r1, r2 || mv r3, r1' produces a different result
10573
     from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
10574
     and then r2 into r1, whereas the later moves r2 into r1 and r3.
10575
 
10576
`-Wp'
10577
     This is a shorter synonym for the
10578
     _-warn-explicit-parallel-conflicts_ option.
10579
 
10580
`-no-warn-explicit-parallel-conflicts'
10581
     Instructs `as' not to produce warning messages when questionable
10582
     parallel instructions are encountered.
10583
 
10584
`-Wnp'
10585
     This is a shorter synonym for the
10586
     _-no-warn-explicit-parallel-conflicts_ option.
10587
 
10588
`-ignore-parallel-conflicts'
10589
     This option tells the assembler's to stop checking parallel
10590
     instructions for constraint violations.  This ability is provided
10591
     for hardware vendors testing chip designs and should not be used
10592
     under normal circumstances.
10593
 
10594
`-no-ignore-parallel-conflicts'
10595
     This option restores the assembler's default behaviour of checking
10596
     parallel instructions to detect constraint violations.
10597
 
10598
`-Ip'
10599
     This is a shorter synonym for the _-ignore-parallel-conflicts_
10600
     option.
10601
 
10602
`-nIp'
10603
     This is a shorter synonym for the _-no-ignore-parallel-conflicts_
10604
     option.
10605
 
10606
`-warn-unmatched-high'
10607
     This option tells the assembler to produce a warning message if a
10608
     `.high' pseudo op is encountered without a matching `.low' pseudo
10609
     op.  The presence of such an unmatched pseudo op usually indicates
10610
     a programming error.
10611
 
10612
`-no-warn-unmatched-high'
10613
     Disables a previously enabled _-warn-unmatched-high_ option.
10614
 
10615
`-Wuh'
10616
     This is a shorter synonym for the _-warn-unmatched-high_ option.
10617
 
10618
`-Wnuh'
10619
     This is a shorter synonym for the _-no-warn-unmatched-high_ option.
10620
 
10621
 
10622

10623
File: as.info,  Node: M32R-Directives,  Next: M32R-Warnings,  Prev: M32R-Opts,  Up: M32R-Dependent
10624
 
10625
9.19.2 M32R Directives
10626
----------------------
10627
 
10628
The Renease M32R version of `as' has a few architecture specific
10629
directives:
10630
 
10631
`low EXPRESSION'
10632
     The `low' directive computes the value of its expression and
10633
     places the lower 16-bits of the result into the immediate-field of
10634
     the instruction.  For example:
10635
 
10636
             or3   r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
10637
             add3, r0, r0, #low(fred)   ; compute r0 = r0 + low 16-bits of address of fred
10638
 
10639
`high EXPRESSION'
10640
     The `high' directive computes the value of its expression and
10641
     places the upper 16-bits of the result into the immediate-field of
10642
     the instruction.  For example:
10643
 
10644
             seth  r0, #high(0x12345678) ; compute r0 = 0x12340000
10645
             seth, r0, #high(fred)       ; compute r0 = upper 16-bits of address of fred
10646
 
10647
`shigh EXPRESSION'
10648
     The `shigh' directive is very similar to the `high' directive.  It
10649
     also computes the value of its expression and places the upper
10650
     16-bits of the result into the immediate-field of the instruction.
10651
     The difference is that `shigh' also checks to see if the lower
10652
     16-bits could be interpreted as a signed number, and if so it
10653
     assumes that a borrow will occur from the upper-16 bits.  To
10654
     compensate for this the `shigh' directive pre-biases the upper 16
10655
     bit value by adding one to it.  For example:
10656
 
10657
     For example:
10658
 
10659
             seth  r0, #shigh(0x12345678) ; compute r0 = 0x12340000
10660
             seth  r0, #shigh(0x00008000) ; compute r0 = 0x00010000
10661
 
10662
     In the second example the lower 16-bits are 0x8000.  If these are
10663
     treated as a signed value and sign extended to 32-bits then the
10664
     value becomes 0xffff8000.  If this value is then added to
10665
     0x00010000 then the result is 0x00008000.
10666
 
10667
     This behaviour is to allow for the different semantics of the
10668
     `or3' and `add3' instructions.  The `or3' instruction treats its
10669
     16-bit immediate argument as unsigned whereas the `add3' treats
10670
     its 16-bit immediate as a signed value.  So for example:
10671
 
10672
             seth  r0, #shigh(0x00008000)
10673
             add3  r0, r0, #low(0x00008000)
10674
 
10675
     Produces the correct result in r0, whereas:
10676
 
10677
             seth  r0, #shigh(0x00008000)
10678
             or3   r0, r0, #low(0x00008000)
10679
 
10680
     Stores 0xffff8000 into r0.
10681
 
10682
     Note - the `shigh' directive does not know where in the assembly
10683
     source code the lower 16-bits of the value are going set, so it
10684
     cannot check to make sure that an `or3' instruction is being used
10685
     rather than an `add3' instruction.  It is up to the programmer to
10686
     make sure that correct directives are used.
10687
 
10688
`.m32r'
10689
     The directive performs a similar thing as the _-m32r_ command line
10690
     option.  It tells the assembler to only accept M32R instructions
10691
     from now on.  An instructions from later M32R architectures are
10692
     refused.
10693
 
10694
`.m32rx'
10695
     The directive performs a similar thing as the _-m32rx_ command
10696
     line option.  It tells the assembler to start accepting the extra
10697
     instructions in the M32RX ISA as well as the ordinary M32R ISA.
10698
 
10699
`.m32r2'
10700
     The directive performs a similar thing as the _-m32r2_ command
10701
     line option.  It tells the assembler to start accepting the extra
10702
     instructions in the M32R2 ISA as well as the ordinary M32R ISA.
10703
 
10704
`.little'
10705
     The directive performs a similar thing as the _-little_ command
10706
     line option.  It tells the assembler to start producing
10707
     little-endian code and data.  This option should be used with care
10708
     as producing mixed-endian binary files is fraught with danger.
10709
 
10710
`.big'
10711
     The directive performs a similar thing as the _-big_ command line
10712
     option.  It tells the assembler to start producing big-endian code
10713
     and data.  This option should be used with care as producing
10714
     mixed-endian binary files is fraught with danger.
10715
 
10716
 
10717

10718
File: as.info,  Node: M32R-Warnings,  Prev: M32R-Directives,  Up: M32R-Dependent
10719
 
10720
9.19.3 M32R Warnings
10721
--------------------
10722
 
10723
There are several warning and error messages that can be produced by
10724
`as' which are specific to the M32R:
10725
 
10726
`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
10727
     This message is only produced if warnings for explicit parallel
10728
     conflicts have been enabled.  It indicates that the assembler has
10729
     encountered a parallel instruction in which the destination
10730
     register of the left hand instruction is used as an input register
10731
     in the right hand instruction.  For example in this code fragment
10732
     `mv r1, r2 || neg r3, r1' register r1 is the destination of the
10733
     move instruction and the input to the neg instruction.
10734
 
10735
`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
10736
     This message is only produced if warnings for explicit parallel
10737
     conflicts have been enabled.  It indicates that the assembler has
10738
     encountered a parallel instruction in which the destination
10739
     register of the right hand instruction is used as an input
10740
     register in the left hand instruction.  For example in this code
10741
     fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
10742
     of the neg instruction and the input to the move instruction.
10743
 
10744
`instruction `...' is for the M32RX only'
10745
     This message is produced when the assembler encounters an
10746
     instruction which is only supported by the M32Rx processor, and
10747
     the `-m32rx' command line flag has not been specified to allow
10748
     assembly of such instructions.
10749
 
10750
`unknown instruction `...''
10751
     This message is produced when the assembler encounters an
10752
     instruction which it does not recognize.
10753
 
10754
`only the NOP instruction can be issued in parallel on the m32r'
10755
     This message is produced when the assembler encounters a parallel
10756
     instruction which does not involve a NOP instruction and the
10757
     `-m32rx' command line flag has not been specified.  Only the M32Rx
10758
     processor is able to execute two instructions in parallel.
10759
 
10760
`instruction `...' cannot be executed in parallel.'
10761
     This message is produced when the assembler encounters a parallel
10762
     instruction which is made up of one or two instructions which
10763
     cannot be executed in parallel.
10764
 
10765
`Instructions share the same execution pipeline'
10766
     This message is produced when the assembler encounters a parallel
10767
     instruction whoes components both use the same execution pipeline.
10768
 
10769
`Instructions write to the same destination register.'
10770
     This message is produced when the assembler encounters a parallel
10771
     instruction where both components attempt to modify the same
10772
     register.  For example these code fragments will produce this
10773
     message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
10774
     @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
10775
     r3, r4' (Both write to the condition bit)
10776
 
10777
 
10778

10779
File: as.info,  Node: M68K-Dependent,  Next: M68HC11-Dependent,  Prev: M32R-Dependent,  Up: Machine Dependencies
10780
 
10781
9.20 M680x0 Dependent Features
10782
==============================
10783
 
10784
* Menu:
10785
 
10786
* M68K-Opts::                   M680x0 Options
10787
* M68K-Syntax::                 Syntax
10788
* M68K-Moto-Syntax::            Motorola Syntax
10789
* M68K-Float::                  Floating Point
10790
* M68K-Directives::             680x0 Machine Directives
10791
* M68K-opcodes::                Opcodes
10792
 
10793

10794
File: as.info,  Node: M68K-Opts,  Next: M68K-Syntax,  Up: M68K-Dependent
10795
 
10796
9.20.1 M680x0 Options
10797
---------------------
10798
 
10799
The Motorola 680x0 version of `as' has a few machine dependent options:
10800
 
10801
`-march=ARCHITECTURE'
10802
     This option specifies a target architecture.  The following
10803
     architectures are recognized: `68000', `68010', `68020', `68030',
10804
     `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and
10805
     `cfv4e'.
10806
 
10807
`-mcpu=CPU'
10808
     This option specifies a target cpu.  When used in conjunction with
10809
     the `-march' option, the cpu must be within the specified
10810
     architecture.  Also, the generic features of the architecture are
10811
     used for instruction generation, rather than those of the specific
10812
     chip.
10813
 
10814
`-m[no-]68851'
10815
 
10816
`-m[no-]68881'
10817
 
10818
`-m[no-]div'
10819
 
10820
`-m[no-]usp'
10821
 
10822
`-m[no-]float'
10823
 
10824
`-m[no-]mac'
10825
 
10826
`-m[no-]emac'
10827
     Enable or disable various architecture specific features.  If a
10828
     chip or architecture by default supports an option (for instance
10829
     `-march=isaaplus' includes the `-mdiv' option), explicitly
10830
     disabling the option will override the default.
10831
 
10832
`-l'
10833
     You can use the `-l' option to shorten the size of references to
10834
     undefined symbols.  If you do not use the `-l' option, references
10835
     to undefined symbols are wide enough for a full `long' (32 bits).
10836
     (Since `as' cannot know where these symbols end up, `as' can only
10837
     allocate space for the linker to fill in later.  Since `as' does
10838
     not know how far away these symbols are, it allocates as much
10839
     space as it can.)  If you use this option, the references are only
10840
     one word wide (16 bits).  This may be useful if you want the
10841
     object file to be as small as possible, and you know that the
10842
     relevant symbols are always less than 17 bits away.
10843
 
10844
`--register-prefix-optional'
10845
     For some configurations, especially those where the compiler
10846
     normally does not prepend an underscore to the names of user
10847
     variables, the assembler requires a `%' before any use of a
10848
     register name.  This is intended to let the assembler distinguish
10849
     between C variables and functions named `a0' through `a7', and so
10850
     on.  The `%' is always accepted, but is not required for certain
10851
     configurations, notably `sun3'.  The `--register-prefix-optional'
10852
     option may be used to permit omitting the `%' even for
10853
     configurations for which it is normally required.  If this is
10854
     done, it will generally be impossible to refer to C variables and
10855
     functions with the same names as register names.
10856
 
10857
`--bitwise-or'
10858
     Normally the character `|' is treated as a comment character, which
10859
     means that it can not be used in expressions.  The `--bitwise-or'
10860
     option turns `|' into a normal character.  In this mode, you must
10861
     either use C style comments, or start comments with a `#' character
10862
     at the beginning of a line.
10863
 
10864
`--base-size-default-16  --base-size-default-32'
10865
     If you use an addressing mode with a base register without
10866
     specifying the size, `as' will normally use the full 32 bit value.
10867
     For example, the addressing mode `%a0@(%d0)' is equivalent to
10868
     `%a0@(%d0:l)'.  You may use the `--base-size-default-16' option to
10869
     tell `as' to default to using the 16 bit value.  In this case,
10870
     `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'.  You may use the
10871
     `--base-size-default-32' option to restore the default behaviour.
10872
 
10873
`--disp-size-default-16  --disp-size-default-32'
10874
     If you use an addressing mode with a displacement, and the value
10875
     of the displacement is not known, `as' will normally assume that
10876
     the value is 32 bits.  For example, if the symbol `disp' has not
10877
     been defined, `as' will assemble the addressing mode
10878
     `%a0@(disp,%d0)' as though `disp' is a 32 bit value.  You may use
10879
     the `--disp-size-default-16' option to tell `as' to instead assume
10880
     that the displacement is 16 bits.  In this case, `as' will
10881
     assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value.  You
10882
     may use the `--disp-size-default-32' option to restore the default
10883
     behaviour.
10884
 
10885
`--pcrel'
10886
     Always keep branches PC-relative.  In the M680x0 architecture all
10887
     branches are defined as PC-relative.  However, on some processors
10888
     they are limited to word displacements maximum.  When `as' needs a
10889
     long branch that is not available, it normally emits an absolute
10890
     jump instead.  This option disables this substitution.  When this
10891
     option is given and no long branches are available, only word
10892
     branches will be emitted.  An error message will be generated if a
10893
     word branch cannot reach its target.  This option has no effect on
10894
     68020 and other processors that have long branches.  *note Branch
10895
     Improvement: M68K-Branch.
10896
 
10897
`-m68000'
10898
     `as' can assemble code for several different members of the
10899
     Motorola 680x0 family.  The default depends upon how `as' was
10900
     configured when it was built; normally, the default is to assemble
10901
     code for the 68020 microprocessor.  The following options may be
10902
     used to change the default.  These options control which
10903
     instructions and addressing modes are permitted.  The members of
10904
     the 680x0 family are very similar.  For detailed information about
10905
     the differences, see the Motorola manuals.
10906
 
10907
    `-m68000'
10908
    `-m68ec000'
10909
    `-m68hc000'
10910
    `-m68hc001'
10911
    `-m68008'
10912
    `-m68302'
10913
    `-m68306'
10914
    `-m68307'
10915
    `-m68322'
10916
    `-m68356'
10917
          Assemble for the 68000. `-m68008', `-m68302', and so on are
10918
          synonyms for `-m68000', since the chips are the same from the
10919
          point of view of the assembler.
10920
 
10921
    `-m68010'
10922
          Assemble for the 68010.
10923
 
10924
    `-m68020'
10925
    `-m68ec020'
10926
          Assemble for the 68020.  This is normally the default.
10927
 
10928
    `-m68030'
10929
    `-m68ec030'
10930
          Assemble for the 68030.
10931
 
10932
    `-m68040'
10933
    `-m68ec040'
10934
          Assemble for the 68040.
10935
 
10936
    `-m68060'
10937
    `-m68ec060'
10938
          Assemble for the 68060.
10939
 
10940
    `-mcpu32'
10941
    `-m68330'
10942
    `-m68331'
10943
    `-m68332'
10944
    `-m68333'
10945
    `-m68334'
10946
    `-m68336'
10947
    `-m68340'
10948
    `-m68341'
10949
    `-m68349'
10950
    `-m68360'
10951
          Assemble for the CPU32 family of chips.
10952
 
10953
    `-m5200'
10954
 
10955
    `-m5202'
10956
 
10957
    `-m5204'
10958
 
10959
    `-m5206'
10960
 
10961
    `-m5206e'
10962
 
10963
    `-m521x'
10964
 
10965
    `-m5249'
10966
 
10967
    `-m528x'
10968
 
10969
    `-m5307'
10970
 
10971
    `-m5407'
10972
 
10973
    `-m547x'
10974
 
10975
    `-m548x'
10976
 
10977
    `-mcfv4'
10978
 
10979
    `-mcfv4e'
10980
          Assemble for the ColdFire family of chips.
10981
 
10982
    `-m68881'
10983
    `-m68882'
10984
          Assemble 68881 floating point instructions.  This is the
10985
          default for the 68020, 68030, and the CPU32.  The 68040 and
10986
          68060 always support floating point instructions.
10987
 
10988
    `-mno-68881'
10989
          Do not assemble 68881 floating point instructions.  This is
10990
          the default for 68000 and the 68010.  The 68040 and 68060
10991
          always support floating point instructions, even if this
10992
          option is used.
10993
 
10994
    `-m68851'
10995
          Assemble 68851 MMU instructions.  This is the default for the
10996
          68020, 68030, and 68060.  The 68040 accepts a somewhat
10997
          different set of MMU instructions; `-m68851' and `-m68040'
10998
          should not be used together.
10999
 
11000
    `-mno-68851'
11001
          Do not assemble 68851 MMU instructions.  This is the default
11002
          for the 68000, 68010, and the CPU32.  The 68040 accepts a
11003
          somewhat different set of MMU instructions.
11004
 
11005

11006
File: as.info,  Node: M68K-Syntax,  Next: M68K-Moto-Syntax,  Prev: M68K-Opts,  Up: M68K-Dependent
11007
 
11008
9.20.2 Syntax
11009
-------------
11010
 
11011
This syntax for the Motorola 680x0 was developed at MIT.
11012
 
11013
   The 680x0 version of `as' uses instructions names and syntax
11014
compatible with the Sun assembler.  Intervening periods are ignored;
11015
for example, `movl' is equivalent to `mov.l'.
11016
 
11017
   In the following table APC stands for any of the address registers
11018
(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
11019
relative to the program counter (`%zpc'), a suppressed address register
11020
(`%za0' through `%za7'), or it may be omitted entirely.  The use of
11021
SIZE means one of `w' or `l', and it may be omitted, along with the
11022
leading colon, unless a scale is also specified.  The use of SCALE
11023
means one of `1', `2', `4', or `8', and it may always be omitted along
11024
with the leading colon.
11025
 
11026
   The following addressing modes are understood:
11027
"Immediate"
11028
     `#NUMBER'
11029
 
11030
"Data Register"
11031
     `%d0' through `%d7'
11032
 
11033
"Address Register"
11034
     `%a0' through `%a7'
11035
     `%a7' is also known as `%sp', i.e., the Stack Pointer.  `%a6' is
11036
     also known as `%fp', the Frame Pointer.
11037
 
11038
"Address Register Indirect"
11039
     `%a0@' through `%a7@'
11040
 
11041
"Address Register Postincrement"
11042
     `%a0@+' through `%a7@+'
11043
 
11044
"Address Register Predecrement"
11045
     `%a0@-' through `%a7@-'
11046
 
11047
"Indirect Plus Offset"
11048
     `APC@(NUMBER)'
11049
 
11050
"Index"
11051
     `APC@(NUMBER,REGISTER:SIZE:SCALE)'
11052
 
11053
     The NUMBER may be omitted.
11054
 
11055
"Postindex"
11056
     `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
11057
 
11058
     The ONUMBER or the REGISTER, but not both, may be omitted.
11059
 
11060
"Preindex"
11061
     `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
11062
 
11063
     The NUMBER may be omitted.  Omitting the REGISTER produces the
11064
     Postindex addressing mode.
11065
 
11066
"Absolute"
11067
     `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
11068
 
11069

11070
File: as.info,  Node: M68K-Moto-Syntax,  Next: M68K-Float,  Prev: M68K-Syntax,  Up: M68K-Dependent
11071
 
11072
9.20.3 Motorola Syntax
11073
----------------------
11074
 
11075
The standard Motorola syntax for this chip differs from the syntax
11076
already discussed (*note Syntax: M68K-Syntax.).  `as' can accept
11077
Motorola syntax for operands, even if MIT syntax is used for other
11078
operands in the same instruction.  The two kinds of syntax are fully
11079
compatible.
11080
 
11081
   In the following table APC stands for any of the address registers
11082
(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
11083
relative to the program counter (`%zpc'), or a suppressed address
11084
register (`%za0' through `%za7').  The use of SIZE means one of `w' or
11085
`l', and it may always be omitted along with the leading dot.  The use
11086
of SCALE means one of `1', `2', `4', or `8', and it may always be
11087
omitted along with the leading asterisk.
11088
 
11089
   The following additional addressing modes are understood:
11090
 
11091
"Address Register Indirect"
11092
     `(%a0)' through `(%a7)'
11093
     `%a7' is also known as `%sp', i.e., the Stack Pointer.  `%a6' is
11094
     also known as `%fp', the Frame Pointer.
11095
 
11096
"Address Register Postincrement"
11097
     `(%a0)+' through `(%a7)+'
11098
 
11099
"Address Register Predecrement"
11100
     `-(%a0)' through `-(%a7)'
11101
 
11102
"Indirect Plus Offset"
11103
     `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'.
11104
 
11105
     The NUMBER may also appear within the parentheses, as in
11106
     `(NUMBER,%A0)'.  When used with the PC, the NUMBER may be omitted
11107
     (with an address register, omitting the NUMBER produces Address
11108
     Register Indirect mode).
11109
 
11110
"Index"
11111
     `NUMBER(APC,REGISTER.SIZE*SCALE)'
11112
 
11113
     The NUMBER may be omitted, or it may appear within the
11114
     parentheses.  The APC may be omitted.  The REGISTER and the APC
11115
     may appear in either order.  If both APC and REGISTER are address
11116
     registers, and the SIZE and SCALE are omitted, then the first
11117
     register is taken as the base register, and the second as the
11118
     index register.
11119
 
11120
"Postindex"
11121
     `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)'
11122
 
11123
     The ONUMBER, or the REGISTER, or both, may be omitted.  Either the
11124
     NUMBER or the APC may be omitted, but not both.
11125
 
11126
"Preindex"
11127
     `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)'
11128
 
11129
     The NUMBER, or the APC, or the REGISTER, or any two of them, may
11130
     be omitted.  The ONUMBER may be omitted.  The REGISTER and the APC
11131
     may appear in either order.  If both APC and REGISTER are address
11132
     registers, and the SIZE and SCALE are omitted, then the first
11133
     register is taken as the base register, and the second as the
11134
     index register.
11135
 
11136

11137
File: as.info,  Node: M68K-Float,  Next: M68K-Directives,  Prev: M68K-Moto-Syntax,  Up: M68K-Dependent
11138
 
11139
9.20.4 Floating Point
11140
---------------------
11141
 
11142
Packed decimal (P) format floating literals are not supported.  Feel
11143
free to add the code!
11144
 
11145
   The floating point formats generated by directives are these.
11146
 
11147
`.float'
11148
     `Single' precision floating point constants.
11149
 
11150
`.double'
11151
     `Double' precision floating point constants.
11152
 
11153
`.extend'
11154
`.ldouble'
11155
     `Extended' precision (`long double') floating point constants.
11156
 
11157

11158
File: as.info,  Node: M68K-Directives,  Next: M68K-opcodes,  Prev: M68K-Float,  Up: M68K-Dependent
11159
 
11160
9.20.5 680x0 Machine Directives
11161
-------------------------------
11162
 
11163
In order to be compatible with the Sun assembler the 680x0 assembler
11164
understands the following directives.
11165
 
11166
`.data1'
11167
     This directive is identical to a `.data 1' directive.
11168
 
11169
`.data2'
11170
     This directive is identical to a `.data 2' directive.
11171
 
11172
`.even'
11173
     This directive is a special case of the `.align' directive; it
11174
     aligns the output to an even byte boundary.
11175
 
11176
`.skip'
11177
     This directive is identical to a `.space' directive.
11178
 
11179
`.arch NAME'
11180
     Select the target architecture and extension features.  Valid
11181
     values for NAME are the same as for the `-march' command line
11182
     option.  This directive cannot be specified after any instructions
11183
     have been assembled.  If it is given multiple times, or in
11184
     conjunction with the `-march' option, all uses must be for the
11185
     same architecture and extension set.
11186
 
11187
`.cpu NAME'
11188
     Select the target cpu.  Valid valuse for NAME are the same as for
11189
     the `-mcpu' command line option.  This directive cannot be
11190
     specified after any instructions have been assembled.  If it is
11191
     given multiple times, or in conjunction with the `-mopt' option,
11192
     all uses must be for the same cpu.
11193
 
11194
 
11195

11196
File: as.info,  Node: M68K-opcodes,  Prev: M68K-Directives,  Up: M68K-Dependent
11197
 
11198
9.20.6 Opcodes
11199
--------------
11200
 
11201
* Menu:
11202
 
11203
* M68K-Branch::                 Branch Improvement
11204
* M68K-Chars::                  Special Characters
11205
 
11206

11207
File: as.info,  Node: M68K-Branch,  Next: M68K-Chars,  Up: M68K-opcodes
11208
 
11209
9.20.6.1 Branch Improvement
11210
...........................
11211
 
11212
Certain pseudo opcodes are permitted for branch instructions.  They
11213
expand to the shortest branch instruction that reach the target.
11214
Generally these mnemonics are made by substituting `j' for `b' at the
11215
start of a Motorola mnemonic.
11216
 
11217
   The following table summarizes the pseudo-operations.  A `*' flags
11218
cases that are more fully described after the table:
11219
 
11220
               Displacement
11221
               +------------------------------------------------------------
11222
               |                68020           68000/10, not PC-relative OK
11223
     Pseudo-Op |BYTE    WORD    LONG            ABSOLUTE LONG JUMP    **
11224
               +------------------------------------------------------------
11225
          jbsr |bsrs    bsrw    bsrl            jsr
11226
           jra |bras    braw    bral            jmp
11227
     *     jXX |bXXs    bXXw    bXXl            bNXs;jmp
11228
     *    dbXX | N/A    dbXXw   dbXX;bras;bral  dbXX;bras;jmp
11229
          fjXX | N/A    fbXXw   fbXXl            N/A
11230
 
11231
     XX: condition
11232
     NX: negative of condition XX
11233
                       `*'--see full description below
11234
         `**'--this expansion mode is disallowed by `--pcrel'
11235
 
11236
`jbsr'
11237
`jra'
11238
     These are the simplest jump pseudo-operations; they always map to
11239
     one particular machine instruction, depending on the displacement
11240
     to the branch target.  This instruction will be a byte or word
11241
     branch is that is sufficient.  Otherwise, a long branch will be
11242
     emitted if available.  If no long branches are available and the
11243
     `--pcrel' option is not given, an absolute long jump will be
11244
     emitted instead.  If no long branches are available, the `--pcrel'
11245
     option is given, and a word branch cannot reach the target, an
11246
     error message is generated.
11247
 
11248
     In addition to standard branch operands, `as' allows these
11249
     pseudo-operations to have all operands that are allowed for jsr
11250
     and jmp, substituting these instructions if the operand given is
11251
     not valid for a branch instruction.
11252
 
11253
`jXX'
11254
     Here, `jXX' stands for an entire family of pseudo-operations,
11255
     where XX is a conditional branch or condition-code test.  The full
11256
     list of pseudo-ops in this family is:
11257
           jhi   jls   jcc   jcs   jne   jeq   jvc
11258
           jvs   jpl   jmi   jge   jlt   jgt   jle
11259
 
11260
     Usually, each of these pseudo-operations expands to a single branch
11261
     instruction.  However, if a word branch is not sufficient, no long
11262
     branches are available, and the `--pcrel' option is not given, `as'
11263
     issues a longer code fragment in terms of NX, the opposite
11264
     condition to XX.  For example, under these conditions:
11265
              jXX foo
11266
     gives
11267
               bNXs oof
11268
               jmp foo
11269
           oof:
11270
 
11271
`dbXX'
11272
     The full family of pseudo-operations covered here is
11273
           dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
11274
           dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
11275
           dbf    dbra   dbt
11276
 
11277
     Motorola `dbXX' instructions allow word displacements only.  When
11278
     a word displacement is sufficient, each of these pseudo-operations
11279
     expands to the corresponding Motorola instruction.  When a word
11280
     displacement is not sufficient and long branches are available,
11281
     when the source reads `dbXX foo', `as' emits
11282
               dbXX oo1
11283
               bras oo2
11284
           oo1:bral foo
11285
           oo2:
11286
 
11287
     If, however, long branches are not available and the `--pcrel'
11288
     option is not given, `as' emits
11289
               dbXX oo1
11290
               bras oo2
11291
           oo1:jmp foo
11292
           oo2:
11293
 
11294
`fjXX'
11295
     This family includes
11296
           fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
11297
           fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
11298
           fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
11299
           fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
11300
           fjugt  fjule  fjult  fjun
11301
 
11302
     Each of these pseudo-operations always expands to a single Motorola
11303
     coprocessor branch instruction, word or long.  All Motorola
11304
     coprocessor branch instructions allow both word and long
11305
     displacements.
11306
 
11307
 
11308

11309
File: as.info,  Node: M68K-Chars,  Prev: M68K-Branch,  Up: M68K-opcodes
11310
 
11311
9.20.6.2 Special Characters
11312
...........................
11313
 
11314
The immediate character is `#' for Sun compatibility.  The line-comment
11315
character is `|' (unless the `--bitwise-or' option is used).  If a `#'
11316
appears at the beginning of a line, it is treated as a comment unless
11317
it looks like `# line file', in which case it is treated normally.
11318
 
11319

11320
File: as.info,  Node: M68HC11-Dependent,  Next: MIPS-Dependent,  Prev: M68K-Dependent,  Up: Machine Dependencies
11321
 
11322
9.21 M68HC11 and M68HC12 Dependent Features
11323
===========================================
11324
 
11325
* Menu:
11326
 
11327
* M68HC11-Opts::                   M68HC11 and M68HC12 Options
11328
* M68HC11-Syntax::                 Syntax
11329
* M68HC11-Modifiers::              Symbolic Operand Modifiers
11330
* M68HC11-Directives::             Assembler Directives
11331
* M68HC11-Float::                  Floating Point
11332
* M68HC11-opcodes::                Opcodes
11333
 
11334

11335
File: as.info,  Node: M68HC11-Opts,  Next: M68HC11-Syntax,  Up: M68HC11-Dependent
11336
 
11337
9.21.1 M68HC11 and M68HC12 Options
11338
----------------------------------
11339
 
11340
The Motorola 68HC11 and 68HC12 version of `as' have a few machine
11341
dependent options.
11342
 
11343
`-m68hc11'
11344
     This option switches the assembler in the M68HC11 mode. In this
11345
     mode, the assembler only accepts 68HC11 operands and mnemonics. It
11346
     produces code for the 68HC11.
11347
 
11348
`-m68hc12'
11349
     This option switches the assembler in the M68HC12 mode. In this
11350
     mode, the assembler also accepts 68HC12 operands and mnemonics. It
11351
     produces code for the 68HC12. A few 68HC11 instructions are
11352
     replaced by some 68HC12 instructions as recommended by Motorola
11353
     specifications.
11354
 
11355
`-m68hcs12'
11356
     This option switches the assembler in the M68HCS12 mode.  This
11357
     mode is similar to `-m68hc12' but specifies to assemble for the
11358
     68HCS12 series.  The only difference is on the assembling of the
11359
     `movb' and `movw' instruction when a PC-relative operand is used.
11360
 
11361
`-mshort'
11362
     This option controls the ABI and indicates to use a 16-bit integer
11363
     ABI.  It has no effect on the assembled instructions.  This is the
11364
     default.
11365
 
11366
`-mlong'
11367
     This option controls the ABI and indicates to use a 32-bit integer
11368
     ABI.
11369
 
11370
`-mshort-double'
11371
     This option controls the ABI and indicates to use a 32-bit float
11372
     ABI.  This is the default.
11373
 
11374
`-mlong-double'
11375
     This option controls the ABI and indicates to use a 64-bit float
11376
     ABI.
11377
 
11378
`--strict-direct-mode'
11379
     You can use the `--strict-direct-mode' option to disable the
11380
     automatic translation of direct page mode addressing into extended
11381
     mode when the instruction does not support direct mode.  For
11382
     example, the `clr' instruction does not support direct page mode
11383
     addressing. When it is used with the direct page mode, `as' will
11384
     ignore it and generate an absolute addressing.  This option
11385
     prevents `as' from doing this, and the wrong usage of the direct
11386
     page mode will raise an error.
11387
 
11388
`--short-branches'
11389
     The `--short-branches' option turns off the translation of
11390
     relative branches into absolute branches when the branch offset is
11391
     out of range. By default `as' transforms the relative branch
11392
     (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc',
11393
     `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch
11394
     when the offset is out of the -128 .. 127 range.  In that case,
11395
     the `bsr' instruction is translated into a `jsr', the `bra'
11396
     instruction is translated into a `jmp' and the conditional
11397
     branches instructions are inverted and followed by a `jmp'. This
11398
     option disables these translations and `as' will generate an error
11399
     if a relative branch is out of range. This option does not affect
11400
     the optimization associated to the `jbra', `jbsr' and `jbXX'
11401
     pseudo opcodes.
11402
 
11403
`--force-long-branches'
11404
     The `--force-long-branches' option forces the translation of
11405
     relative branches into absolute branches. This option does not
11406
     affect the optimization associated to the `jbra', `jbsr' and
11407
     `jbXX' pseudo opcodes.
11408
 
11409
`--print-insn-syntax'
11410
     You can use the `--print-insn-syntax' option to obtain the syntax
11411
     description of the instruction when an error is detected.
11412
 
11413
`--print-opcodes'
11414
     The `--print-opcodes' option prints the list of all the
11415
     instructions with their syntax. The first item of each line
11416
     represents the instruction name and the rest of the line indicates
11417
     the possible operands for that instruction. The list is printed in
11418
     alphabetical order. Once the list is printed `as' exits.
11419
 
11420
`--generate-example'
11421
     The `--generate-example' option is similar to `--print-opcodes'
11422
     but it generates an example for each instruction instead.
11423
 
11424

11425
File: as.info,  Node: M68HC11-Syntax,  Next: M68HC11-Modifiers,  Prev: M68HC11-Opts,  Up: M68HC11-Dependent
11426
 
11427
9.21.2 Syntax
11428
-------------
11429
 
11430
In the M68HC11 syntax, the instruction name comes first and it may be
11431
followed by one or several operands (up to three). Operands are
11432
separated by comma (`,'). In the normal mode, `as' will complain if too
11433
many operands are specified for a given instruction. In the MRI mode
11434
(turned on with `-M' option), it will treat them as comments. Example:
11435
 
11436
     inx
11437
     lda  #23
11438
     bset 2,x #4
11439
     brclr *bot #8 foo
11440
 
11441
   The following addressing modes are understood for 68HC11 and 68HC12:
11442
"Immediate"
11443
     `#NUMBER'
11444
 
11445
"Address Register"
11446
     `NUMBER,X', `NUMBER,Y'
11447
 
11448
     The NUMBER may be omitted in which case 0 is assumed.
11449
 
11450
"Direct Addressing mode"
11451
     `*SYMBOL', or `*DIGITS'
11452
 
11453
"Absolute"
11454
     `SYMBOL', or `DIGITS'
11455
 
11456
   The M68HC12 has other more complex addressing modes. All of them are
11457
supported and they are represented below:
11458
 
11459
"Constant Offset Indexed Addressing Mode"
11460
     `NUMBER,REG'
11461
 
11462
     The NUMBER may be omitted in which case 0 is assumed.  The
11463
     register can be either `X', `Y', `SP' or `PC'.  The assembler will
11464
     use the smaller post-byte definition according to the constant
11465
     value (5-bit constant offset, 9-bit constant offset or 16-bit
11466
     constant offset).  If the constant is not known by the assembler
11467
     it will use the 16-bit constant offset post-byte and the value
11468
     will be resolved at link time.
11469
 
11470
"Offset Indexed Indirect"
11471
     `[NUMBER,REG]'
11472
 
11473
     The register can be either `X', `Y', `SP' or `PC'.
11474
 
11475
"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
11476
     `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+'
11477
 
11478
     The number must be in the range `-8'..`+8' and must not be 0.  The
11479
     register can be either `X', `Y', `SP' or `PC'.
11480
 
11481
"Accumulator Offset"
11482
     `ACC,REG'
11483
 
11484
     The accumulator register can be either `A', `B' or `D'.  The
11485
     register can be either `X', `Y', `SP' or `PC'.
11486
 
11487
"Accumulator D offset indexed-indirect"
11488
     `[D,REG]'
11489
 
11490
     The register can be either `X', `Y', `SP' or `PC'.
11491
 
11492
 
11493
   For example:
11494
 
11495
     ldab 1024,sp
11496
     ldd [10,x]
11497
     orab 3,+x
11498
     stab -2,y-
11499
     ldx a,pc
11500
     sty [d,sp]
11501
 
11502

11503
File: as.info,  Node: M68HC11-Modifiers,  Next: M68HC11-Directives,  Prev: M68HC11-Syntax,  Up: M68HC11-Dependent
11504
 
11505
9.21.3 Symbolic Operand Modifiers
11506
---------------------------------
11507
 
11508
The assembler supports several modifiers when using symbol addresses in
11509
68HC11 and 68HC12 instruction operands.  The general syntax is the
11510
following:
11511
 
11512
     %modifier(symbol)
11513
 
11514
`%addr'
11515
     This modifier indicates to the assembler and linker to use the
11516
     16-bit physical address corresponding to the symbol.  This is
11517
     intended to be used on memory window systems to map a symbol in
11518
     the memory bank window.  If the symbol is in a memory expansion
11519
     part, the physical address corresponds to the symbol address
11520
     within the memory bank window.  If the symbol is not in a memory
11521
     expansion part, this is the symbol address (using or not using the
11522
     %addr modifier has no effect in that case).
11523
 
11524
`%page'
11525
     This modifier indicates to use the memory page number corresponding
11526
     to the symbol.  If the symbol is in a memory expansion part, its
11527
     page number is computed by the linker as a number used to map the
11528
     page containing the symbol in the memory bank window.  If the
11529
     symbol is not in a memory expansion part, the page number is 0.
11530
 
11531
`%hi'
11532
     This modifier indicates to use the 8-bit high part of the physical
11533
     address of the symbol.
11534
 
11535
`%lo'
11536
     This modifier indicates to use the 8-bit low part of the physical
11537
     address of the symbol.
11538
 
11539
 
11540
   For example a 68HC12 call to a function `foo_example' stored in
11541
memory expansion part could be written as follows:
11542
 
11543
     call %addr(foo_example),%page(foo_example)
11544
 
11545
   and this is equivalent to
11546
 
11547
     call foo_example
11548
 
11549
   And for 68HC11 it could be written as follows:
11550
 
11551
     ldab #%page(foo_example)
11552
     stab _page_switch
11553
     jsr  %addr(foo_example)
11554
 
11555

11556
File: as.info,  Node: M68HC11-Directives,  Next: M68HC11-Float,  Prev: M68HC11-Modifiers,  Up: M68HC11-Dependent
11557
 
11558
9.21.4 Assembler Directives
11559
---------------------------
11560
 
11561
The 68HC11 and 68HC12 version of `as' have the following specific
11562
assembler directives:
11563
 
11564
`.relax'
11565
     The relax directive is used by the `GNU Compiler' to emit a
11566
     specific relocation to mark a group of instructions for linker
11567
     relaxation.  The sequence of instructions within the group must be
11568
     known to the linker so that relaxation can be performed.
11569
 
11570
`.mode [mshort|mlong|mshort-double|mlong-double]'
11571
     This directive specifies the ABI.  It overrides the `-mshort',
11572
     `-mlong', `-mshort-double' and `-mlong-double' options.
11573
 
11574
`.far SYMBOL'
11575
     This directive marks the symbol as a `far' symbol meaning that it
11576
     uses a `call/rtc' calling convention as opposed to `jsr/rts'.
11577
     During a final link, the linker will identify references to the
11578
     `far' symbol and will verify the proper calling convention.
11579
 
11580
`.interrupt SYMBOL'
11581
     This directive marks the symbol as an interrupt entry point.  This
11582
     information is then used by the debugger to correctly unwind the
11583
     frame across interrupts.
11584
 
11585
`.xrefb SYMBOL'
11586
     This directive is defined for compatibility with the
11587
     `Specification for Motorola 8 and 16-Bit Assembly Language Input
11588
     Standard' and is ignored.
11589
 
11590
 
11591

11592
File: as.info,  Node: M68HC11-Float,  Next: M68HC11-opcodes,  Prev: M68HC11-Directives,  Up: M68HC11-Dependent
11593
 
11594
9.21.5 Floating Point
11595
---------------------
11596
 
11597
Packed decimal (P) format floating literals are not supported.  Feel
11598
free to add the code!
11599
 
11600
   The floating point formats generated by directives are these.
11601
 
11602
`.float'
11603
     `Single' precision floating point constants.
11604
 
11605
`.double'
11606
     `Double' precision floating point constants.
11607
 
11608
`.extend'
11609
`.ldouble'
11610
     `Extended' precision (`long double') floating point constants.
11611
 
11612

11613
File: as.info,  Node: M68HC11-opcodes,  Prev: M68HC11-Float,  Up: M68HC11-Dependent
11614
 
11615
9.21.6 Opcodes
11616
--------------
11617
 
11618
* Menu:
11619
 
11620
* M68HC11-Branch::                 Branch Improvement
11621
 
11622

11623
File: as.info,  Node: M68HC11-Branch,  Up: M68HC11-opcodes
11624
 
11625
9.21.6.1 Branch Improvement
11626
...........................
11627
 
11628
Certain pseudo opcodes are permitted for branch instructions.  They
11629
expand to the shortest branch instruction that reach the target.
11630
Generally these mnemonics are made by prepending `j' to the start of
11631
Motorola mnemonic. These pseudo opcodes are not affected by the
11632
`--short-branches' or `--force-long-branches' options.
11633
 
11634
   The following table summarizes the pseudo-operations.
11635
 
11636
                             Displacement Width
11637
          +-------------------------------------------------------------+
11638
          |                     Options                                 |
11639
          |    --short-branches           --force-long-branches         |
11640
          +--------------------------+----------------------------------+
11641
       Op |BYTE             WORD     | BYTE          WORD               |
11642
          +--------------------------+----------------------------------+
11643
      bsr | bsr       |               jsr           |
11644
      bra | bra       |               jmp           |
11645
     jbsr | bsr    jsr  | bsr   jsr           |
11646
     jbra | bra    jmp  | bra   jmp           |
11647
      bXX | bXX       |               bNX +3; jmp   |
11648
     jbXX | bXX    bNX +3;   | bXX   bNX +3; jmp   |
11649
          |                jmp  |                                  |
11650
          +--------------------------+----------------------------------+
11651
     XX: condition
11652
     NX: negative of condition XX
11653
 
11654
`jbsr'
11655
`jbra'
11656
     These are the simplest jump pseudo-operations; they always map to
11657
     one particular machine instruction, depending on the displacement
11658
     to the branch target.
11659
 
11660
`jbXX'
11661
     Here, `jbXX' stands for an entire family of pseudo-operations,
11662
     where XX is a conditional branch or condition-code test.  The full
11663
     list of pseudo-ops in this family is:
11664
           jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
11665
           jbcs   jbne   jblt   jble   jbls   jbvc   jbmi
11666
 
11667
     For the cases of non-PC relative displacements and long
11668
     displacements, `as' issues a longer code fragment in terms of NX,
11669
     the opposite condition to XX.  For example, for the non-PC
11670
     relative case:
11671
              jbXX foo
11672
     gives
11673
               bNXs oof
11674
               jmp foo
11675
           oof:
11676
 
11677
 
11678

11679
File: as.info,  Node: MIPS-Dependent,  Next: MMIX-Dependent,  Prev: M68HC11-Dependent,  Up: Machine Dependencies
11680
 
11681
9.22 MIPS Dependent Features
11682
============================
11683
 
11684
   GNU `as' for MIPS architectures supports several different MIPS
11685
processors, and MIPS ISA levels I through V, MIPS32, and MIPS64.  For
11686
information about the MIPS instruction set, see `MIPS RISC
11687
Architecture', by Kane and Heindrich (Prentice-Hall).  For an overview
11688
of MIPS assembly conventions, see "Appendix D: Assembly Language
11689
Programming" in the same work.
11690
 
11691
* Menu:
11692
 
11693
* MIPS Opts::           Assembler options
11694
* MIPS Object::         ECOFF object code
11695
* MIPS Stabs::          Directives for debugging information
11696
* MIPS ISA::            Directives to override the ISA level
11697
* MIPS symbol sizes::   Directives to override the size of symbols
11698
* MIPS autoextend::     Directives for extending MIPS 16 bit instructions
11699
* MIPS insn::           Directive to mark data as an instruction
11700
* MIPS option stack::   Directives to save and restore options
11701
* MIPS ASE instruction generation overrides:: Directives to control
11702
                        generation of MIPS ASE instructions
11703
* MIPS floating-point:: Directives to override floating-point options
11704
 
11705

11706
File: as.info,  Node: MIPS Opts,  Next: MIPS Object,  Up: MIPS-Dependent
11707
 
11708
9.22.1 Assembler options
11709
------------------------
11710
 
11711
The MIPS configurations of GNU `as' support these special options:
11712
 
11713
`-G NUM'
11714
     This option sets the largest size of an object that can be
11715
     referenced implicitly with the `gp' register.  It is only accepted
11716
     for targets that use ECOFF format.  The default value is 8.
11717
 
11718
`-EB'
11719
`-EL'
11720
     Any MIPS configuration of `as' can select big-endian or
11721
     little-endian output at run time (unlike the other GNU development
11722
     tools, which must be configured for one or the other).  Use `-EB'
11723
     to select big-endian output, and `-EL' for little-endian.
11724
 
11725
`-KPIC'
11726
     Generate SVR4-style PIC.  This option tells the assembler to
11727
     generate SVR4-style position-independent macro expansions.  It
11728
     also tells the assembler to mark the output file as PIC.
11729
 
11730
`-mvxworks-pic'
11731
     Generate VxWorks PIC.  This option tells the assembler to generate
11732
     VxWorks-style position-independent macro expansions.
11733
 
11734
`-mips1'
11735
`-mips2'
11736
`-mips3'
11737
`-mips4'
11738
`-mips5'
11739
`-mips32'
11740
`-mips32r2'
11741
`-mips64'
11742
`-mips64r2'
11743
     Generate code for a particular MIPS Instruction Set Architecture
11744
     level.  `-mips1' corresponds to the R2000 and R3000 processors,
11745
     `-mips2' to the R6000 processor, `-mips3' to the R4000 processor,
11746
     and `-mips4' to the R8000 and R10000 processors.  `-mips5',
11747
     `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to
11748
     generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64
11749
     RELEASE 2 ISA processors, respectively.  You can also switch
11750
     instruction sets during the assembly; see *Note Directives to
11751
     override the ISA level: MIPS ISA.
11752
 
11753
`-mgp32'
11754
`-mfp32'
11755
     Some macros have different expansions for 32-bit and 64-bit
11756
     registers.  The register sizes are normally inferred from the ISA
11757
     and ABI, but these flags force a certain group of registers to be
11758
     treated as 32 bits wide at all times.  `-mgp32' controls the size
11759
     of general-purpose registers and `-mfp32' controls the size of
11760
     floating-point registers.
11761
 
11762
     The `.set gp=32' and `.set fp=32' directives allow the size of
11763
     registers to be changed for parts of an object. The default value
11764
     is restored by `.set gp=default' and `.set fp=default'.
11765
 
11766
     On some MIPS variants there is a 32-bit mode flag; when this flag
11767
     is set, 64-bit instructions generate a trap.  Also, some 32-bit
11768
     OSes only save the 32-bit registers on a context switch, so it is
11769
     essential never to use the 64-bit registers.
11770
 
11771
`-mgp64'
11772
`-mfp64'
11773
     Assume that 64-bit registers are available.  This is provided in
11774
     the interests of symmetry with `-mgp32' and `-mfp32'.
11775
 
11776
     The `.set gp=64' and `.set fp=64' directives allow the size of
11777
     registers to be changed for parts of an object. The default value
11778
     is restored by `.set gp=default' and `.set fp=default'.
11779
 
11780
`-mips16'
11781
`-no-mips16'
11782
     Generate code for the MIPS 16 processor.  This is equivalent to
11783
     putting `.set mips16' at the start of the assembly file.
11784
     `-no-mips16' turns off this option.
11785
 
11786
`-msmartmips'
11787
`-mno-smartmips'
11788
     Enables the SmartMIPS extensions to the MIPS32 instruction set,
11789
     which provides a number of new instructions which target smartcard
11790
     and cryptographic applications.  This is equivalent to putting
11791
     `.set smartmips' at the start of the assembly file.
11792
     `-mno-smartmips' turns off this option.
11793
 
11794
`-mips3d'
11795
`-no-mips3d'
11796
     Generate code for the MIPS-3D Application Specific Extension.
11797
     This tells the assembler to accept MIPS-3D instructions.
11798
     `-no-mips3d' turns off this option.
11799
 
11800
`-mdmx'
11801
`-no-mdmx'
11802
     Generate code for the MDMX Application Specific Extension.  This
11803
     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
11804
     off this option.
11805
 
11806
`-mdsp'
11807
`-mno-dsp'
11808
     Generate code for the DSP Release 1 Application Specific Extension.
11809
     This tells the assembler to accept DSP Release 1 instructions.
11810
     `-mno-dsp' turns off this option.
11811
 
11812
`-mdspr2'
11813
`-mno-dspr2'
11814
     Generate code for the DSP Release 2 Application Specific Extension.
11815
     This option implies -mdsp.  This tells the assembler to accept DSP
11816
     Release 2 instructions.  `-mno-dspr2' turns off this option.
11817
 
11818
`-mmt'
11819
`-mno-mt'
11820
     Generate code for the MT Application Specific Extension.  This
11821
     tells the assembler to accept MT instructions.  `-mno-mt' turns
11822
     off this option.
11823
 
11824
`-mfix7000'
11825
`-mno-fix7000'
11826
     Cause nops to be inserted if the read of the destination register
11827
     of an mfhi or mflo instruction occurs in the following two
11828
     instructions.
11829
 
11830
`-mfix-vr4120'
11831
`-no-mfix-vr4120'
11832
     Insert nops to work around certain VR4120 errata.  This option is
11833
     intended to be used on GCC-generated code: it is not designed to
11834
     catch all problems in hand-written assembler code.
11835
 
11836
`-mfix-vr4130'
11837
`-no-mfix-vr4130'
11838
     Insert nops to work around the VR4130 `mflo'/`mfhi' errata.
11839
 
11840
`-m4010'
11841
`-no-m4010'
11842
     Generate code for the LSI R4010 chip.  This tells the assembler to
11843
     accept the R4010 specific instructions (`addciu', `ffc', etc.),
11844
     and to not schedule `nop' instructions around accesses to the `HI'
11845
     and `LO' registers.  `-no-m4010' turns off this option.
11846
 
11847
`-m4650'
11848
`-no-m4650'
11849
     Generate code for the MIPS R4650 chip.  This tells the assembler
11850
     to accept the `mad' and `madu' instruction, and to not schedule
11851
     `nop' instructions around accesses to the `HI' and `LO' registers.
11852
     `-no-m4650' turns off this option.
11853
 
11854
`-m3900'
11855
`-no-m3900'
11856
`-m4100'
11857
`-no-m4100'
11858
     For each option `-mNNNN', generate code for the MIPS RNNNN chip.
11859
     This tells the assembler to accept instructions specific to that
11860
     chip, and to schedule for that chip's hazards.
11861
 
11862
`-march=CPU'
11863
     Generate code for a particular MIPS cpu.  It is exactly equivalent
11864
     to `-mCPU', except that there are more value of CPU understood.
11865
     Valid CPU value are:
11866
 
11867
          2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130,
11868
          vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231,
11869
          rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000,
11870
          10000, 12000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem, 4kep, 4ksd,
11871
          m4k, m4kp, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1,
11872
          24kef, 24kef1_1, 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc, 74kf2_1,
11873
          74kf, 74kf1_1, 74kf3_2, 5kc, 5kf, 20kc, 25kf, sb1, sb1a,
11874
          loongson2e, loongson2f, octeon
11875
 
11876
     For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms
11877
     for `Nf1_1'.  These values are deprecated.
11878
 
11879
`-mtune=CPU'
11880
     Schedule and tune for a particular MIPS cpu.  Valid CPU values are
11881
     identical to `-march=CPU'.
11882
 
11883
`-mabi=ABI'
11884
     Record which ABI the source code uses.  The recognized arguments
11885
     are: `32', `n32', `o64', `64' and `eabi'.
11886
 
11887
`-msym32'
11888
`-mno-sym32'
11889
     Equivalent to adding `.set sym32' or `.set nosym32' to the
11890
     beginning of the assembler input.  *Note MIPS symbol sizes::.
11891
 
11892
`-nocpp'
11893
     This option is ignored.  It is accepted for command-line
11894
     compatibility with other assemblers, which use it to turn off C
11895
     style preprocessing.  With GNU `as', there is no need for
11896
     `-nocpp', because the GNU assembler itself never runs the C
11897
     preprocessor.
11898
 
11899
`-msoft-float'
11900
`-mhard-float'
11901
     Disable or enable floating-point instructions.  Note that by
11902
     default floating-point instructions are always allowed even with
11903
     CPU targets that don't have support for these instructions.
11904
 
11905
`-msingle-float'
11906
`-mdouble-float'
11907
     Disable or enable double-precision floating-point operations.  Note
11908
     that by default double-precision floating-point operations are
11909
     always allowed even with CPU targets that don't have support for
11910
     these operations.
11911
 
11912
`--construct-floats'
11913
`--no-construct-floats'
11914
     The `--no-construct-floats' option disables the construction of
11915
     double width floating point constants by loading the two halves of
11916
     the value into the two single width floating point registers that
11917
     make up the double width register.  This feature is useful if the
11918
     processor support the FR bit in its status  register, and this bit
11919
     is known (by the programmer) to be set.  This bit prevents the
11920
     aliasing of the double width register by the single width
11921
     registers.
11922
 
11923
     By default `--construct-floats' is selected, allowing construction
11924
     of these floating point constants.
11925
 
11926
`--trap'
11927
`--no-break'
11928
     `as' automatically macro expands certain division and
11929
     multiplication instructions to check for overflow and division by
11930
     zero.  This option causes `as' to generate code to take a trap
11931
     exception rather than a break exception when an error is detected.
11932
     The trap instructions are only supported at Instruction Set
11933
     Architecture level 2 and higher.
11934
 
11935
`--break'
11936
`--no-trap'
11937
     Generate code to take a break exception rather than a trap
11938
     exception when an error is detected.  This is the default.
11939
 
11940
`-mpdr'
11941
`-mno-pdr'
11942
     Control generation of `.pdr' sections.  Off by default on IRIX, on
11943
     elsewhere.
11944
 
11945
`-mshared'
11946
`-mno-shared'
11947
     When generating code using the Unix calling conventions (selected
11948
     by `-KPIC' or `-mcall_shared'), gas will normally generate code
11949
     which can go into a shared library.  The `-mno-shared' option
11950
     tells gas to generate code which uses the calling convention, but
11951
     can not go into a shared library.  The resulting code is slightly
11952
     more efficient.  This option only affects the handling of the
11953
     `.cpload' and `.cpsetup' pseudo-ops.
11954
 
11955

11956
File: as.info,  Node: MIPS Object,  Next: MIPS Stabs,  Prev: MIPS Opts,  Up: MIPS-Dependent
11957
 
11958
9.22.2 MIPS ECOFF object code
11959
-----------------------------
11960
 
11961
Assembling for a MIPS ECOFF target supports some additional sections
11962
besides the usual `.text', `.data' and `.bss'.  The additional sections
11963
are `.rdata', used for read-only data, `.sdata', used for small data,
11964
and `.sbss', used for small common objects.
11965
 
11966
   When assembling for ECOFF, the assembler uses the `$gp' (`$28')
11967
register to form the address of a "small object".  Any object in the
11968
`.sdata' or `.sbss' sections is considered "small" in this sense.  For
11969
external objects, or for objects in the `.bss' section, you can use the
11970
`gcc' `-G' option to control the size of objects addressed via `$gp';
11971
the default value is 8, meaning that a reference to any object eight
11972
bytes or smaller uses `$gp'.  Passing `-G 0' to `as' prevents it from
11973
using the `$gp' register on the basis of object size (but the assembler
11974
uses `$gp' for objects in `.sdata' or `sbss' in any case).  The size of
11975
an object in the `.bss' section is set by the `.comm' or `.lcomm'
11976
directive that defines it.  The size of an external object may be set
11977
with the `.extern' directive.  For example, `.extern sym,4' declares
11978
that the object at `sym' is 4 bytes in length, whie leaving `sym'
11979
otherwise undefined.
11980
 
11981
   Using small ECOFF objects requires linker support, and assumes that
11982
the `$gp' register is correctly initialized (normally done
11983
automatically by the startup code).  MIPS ECOFF assembly code must not
11984
modify the `$gp' register.
11985
 
11986

11987
File: as.info,  Node: MIPS Stabs,  Next: MIPS ISA,  Prev: MIPS Object,  Up: MIPS-Dependent
11988
 
11989
9.22.3 Directives for debugging information
11990
-------------------------------------------
11991
 
11992
MIPS ECOFF `as' supports several directives used for generating
11993
debugging information which are not support by traditional MIPS
11994
assemblers.  These are `.def', `.endef', `.dim', `.file', `.scl',
11995
`.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'.
11996
The debugging information generated by the three `.stab' directives can
11997
only be read by GDB, not by traditional MIPS debuggers (this
11998
enhancement is required to fully support C++ debugging).  These
11999
directives are primarily used by compilers, not assembly language
12000
programmers!
12001
 
12002

12003
File: as.info,  Node: MIPS symbol sizes,  Next: MIPS autoextend,  Prev: MIPS ISA,  Up: MIPS-Dependent
12004
 
12005
9.22.4 Directives to override the size of symbols
12006
-------------------------------------------------
12007
 
12008
The n64 ABI allows symbols to have any 64-bit value.  Although this
12009
provides a great deal of flexibility, it means that some macros have
12010
much longer expansions than their 32-bit counterparts.  For example,
12011
the non-PIC expansion of `dla $4,sym' is usually:
12012
 
12013
     lui     $4,%highest(sym)
12014
     lui     $1,%hi(sym)
12015
     daddiu  $4,$4,%higher(sym)
12016
     daddiu  $1,$1,%lo(sym)
12017
     dsll32  $4,$4,0
12018
     daddu   $4,$4,$1
12019
 
12020
   whereas the 32-bit expansion is simply:
12021
 
12022
     lui     $4,%hi(sym)
12023
     daddiu  $4,$4,%lo(sym)
12024
 
12025
   n64 code is sometimes constructed in such a way that all symbolic
12026
constants are known to have 32-bit values, and in such cases, it's
12027
preferable to use the 32-bit expansion instead of the 64-bit expansion.
12028
 
12029
   You can use the `.set sym32' directive to tell the assembler that,
12030
from this point on, all expressions of the form `SYMBOL' or `SYMBOL +
12031
OFFSET' have 32-bit values.  For example:
12032
 
12033
     .set sym32
12034
     dla     $4,sym
12035
     lw      $4,sym+16
12036
     sw      $4,sym+0x8000($4)
12037
 
12038
   will cause the assembler to treat `sym', `sym+16' and `sym+0x8000'
12039
as 32-bit values.  The handling of non-symbolic addresses is not
12040
affected.
12041
 
12042
   The directive `.set nosym32' ends a `.set sym32' block and reverts
12043
to the normal behavior.  It is also possible to change the symbol size
12044
using the command-line options `-msym32' and `-mno-sym32'.
12045
 
12046
   These options and directives are always accepted, but at present,
12047
they have no effect for anything other than n64.
12048
 
12049

12050
File: as.info,  Node: MIPS ISA,  Next: MIPS symbol sizes,  Prev: MIPS Stabs,  Up: MIPS-Dependent
12051
 
12052
9.22.5 Directives to override the ISA level
12053
-------------------------------------------
12054
 
12055
GNU `as' supports an additional directive to change the MIPS
12056
Instruction Set Architecture level on the fly: `.set mipsN'.  N should
12057
be a number from 0 to 5, or 32, 32r2, 64 or 64r2.  The values other
12058
than 0 make the assembler accept instructions for the corresponding ISA
12059
level, from that point on in the assembly.  `.set mipsN' affects not
12060
only which instructions are permitted, but also how certain macros are
12061
expanded.  `.set mips0' restores the ISA level to its original level:
12062
either the level you selected with command line options, or the default
12063
for your configuration.  You can use this feature to permit specific
12064
MIPS3 instructions while assembling in 32 bit mode.  Use this directive
12065
with care!
12066
 
12067
   The `.set arch=CPU' directive provides even finer control.  It
12068
changes the effective CPU target and allows the assembler to use
12069
instructions specific to a particular CPU.  All CPUs supported by the
12070
`-march' command line option are also selectable by this directive.
12071
The original value is restored by `.set arch=default'.
12072
 
12073
   The directive `.set mips16' puts the assembler into MIPS 16 mode, in
12074
which it will assemble instructions for the MIPS 16 processor.  Use
12075
`.set nomips16' to return to normal 32 bit mode.
12076
 
12077
   Traditional MIPS assemblers do not support this directive.
12078
 
12079

12080
File: as.info,  Node: MIPS autoextend,  Next: MIPS insn,  Prev: MIPS symbol sizes,  Up: MIPS-Dependent
12081
 
12082
9.22.6 Directives for extending MIPS 16 bit instructions
12083
--------------------------------------------------------
12084
 
12085
By default, MIPS 16 instructions are automatically extended to 32 bits
12086
when necessary.  The directive `.set noautoextend' will turn this off.
12087
When `.set noautoextend' is in effect, any 32 bit instruction must be
12088
explicitly extended with the `.e' modifier (e.g., `li.e $4,1000').  The
12089
directive `.set autoextend' may be used to once again automatically
12090
extend instructions when necessary.
12091
 
12092
   This directive is only meaningful when in MIPS 16 mode.  Traditional
12093
MIPS assemblers do not support this directive.
12094
 
12095

12096
File: as.info,  Node: MIPS insn,  Next: MIPS option stack,  Prev: MIPS autoextend,  Up: MIPS-Dependent
12097
 
12098
9.22.7 Directive to mark data as an instruction
12099
-----------------------------------------------
12100
 
12101
The `.insn' directive tells `as' that the following data is actually
12102
instructions.  This makes a difference in MIPS 16 mode: when loading
12103
the address of a label which precedes instructions, `as' automatically
12104
adds 1 to the value, so that jumping to the loaded address will do the
12105
right thing.
12106
 
12107

12108
File: as.info,  Node: MIPS option stack,  Next: MIPS ASE instruction generation overrides,  Prev: MIPS insn,  Up: MIPS-Dependent
12109
 
12110
9.22.8 Directives to save and restore options
12111
---------------------------------------------
12112
 
12113
The directives `.set push' and `.set pop' may be used to save and
12114
restore the current settings for all the options which are controlled
12115
by `.set'.  The `.set push' directive saves the current settings on a
12116
stack.  The `.set pop' directive pops the stack and restores the
12117
settings.
12118
 
12119
   These directives can be useful inside an macro which must change an
12120
option such as the ISA level or instruction reordering but does not want
12121
to change the state of the code which invoked the macro.
12122
 
12123
   Traditional MIPS assemblers do not support these directives.
12124
 
12125

12126
File: as.info,  Node: MIPS ASE instruction generation overrides,  Next: MIPS floating-point,  Prev: MIPS option stack,  Up: MIPS-Dependent
12127
 
12128
9.22.9 Directives to control generation of MIPS ASE instructions
12129
----------------------------------------------------------------
12130
 
12131
The directive `.set mips3d' makes the assembler accept instructions
12132
from the MIPS-3D Application Specific Extension from that point on in
12133
the assembly.  The `.set nomips3d' directive prevents MIPS-3D
12134
instructions from being accepted.
12135
 
12136
   The directive `.set smartmips' makes the assembler accept
12137
instructions from the SmartMIPS Application Specific Extension to the
12138
MIPS32 ISA from that point on in the assembly.  The `.set nosmartmips'
12139
directive prevents SmartMIPS instructions from being accepted.
12140
 
12141
   The directive `.set mdmx' makes the assembler accept instructions
12142
from the MDMX Application Specific Extension from that point on in the
12143
assembly.  The `.set nomdmx' directive prevents MDMX instructions from
12144
being accepted.
12145
 
12146
   The directive `.set dsp' makes the assembler accept instructions
12147
from the DSP Release 1 Application Specific Extension from that point
12148
on in the assembly.  The `.set nodsp' directive prevents DSP Release 1
12149
instructions from being accepted.
12150
 
12151
   The directive `.set dspr2' makes the assembler accept instructions
12152
from the DSP Release 2 Application Specific Extension from that point
12153
on in the assembly.  This dirctive implies `.set dsp'.  The `.set
12154
nodspr2' directive prevents DSP Release 2 instructions from being
12155
accepted.
12156
 
12157
   The directive `.set mt' makes the assembler accept instructions from
12158
the MT Application Specific Extension from that point on in the
12159
assembly.  The `.set nomt' directive prevents MT instructions from
12160
being accepted.
12161
 
12162
   Traditional MIPS assemblers do not support these directives.
12163
 
12164

12165
File: as.info,  Node: MIPS floating-point,  Prev: MIPS ASE instruction generation overrides,  Up: MIPS-Dependent
12166
 
12167
9.22.10 Directives to override floating-point options
12168
-----------------------------------------------------
12169
 
12170
The directives `.set softfloat' and `.set hardfloat' provide finer
12171
control of disabling and enabling float-point instructions.  These
12172
directives always override the default (that hard-float instructions
12173
are accepted) or the command-line options (`-msoft-float' and
12174
`-mhard-float').
12175
 
12176
   The directives `.set singlefloat' and `.set doublefloat' provide
12177
finer control of disabling and enabling double-precision float-point
12178
operations.  These directives always override the default (that
12179
double-precision operations are accepted) or the command-line options
12180
(`-msingle-float' and `-mdouble-float').
12181
 
12182
   Traditional MIPS assemblers do not support these directives.
12183
 
12184

12185
File: as.info,  Node: MMIX-Dependent,  Next: MSP430-Dependent,  Prev: MIPS-Dependent,  Up: Machine Dependencies
12186
 
12187
9.23 MMIX Dependent Features
12188
============================
12189
 
12190
* Menu:
12191
 
12192
* MMIX-Opts::              Command-line Options
12193
* MMIX-Expand::            Instruction expansion
12194
* MMIX-Syntax::            Syntax
12195
* MMIX-mmixal::            Differences to `mmixal' syntax and semantics
12196
 
12197

12198
File: as.info,  Node: MMIX-Opts,  Next: MMIX-Expand,  Up: MMIX-Dependent
12199
 
12200
9.23.1 Command-line Options
12201
---------------------------
12202
 
12203
The MMIX version of `as' has some machine-dependent options.
12204
 
12205
   When `--fixed-special-register-names' is specified, only the register
12206
names specified in *Note MMIX-Regs:: are recognized in the instructions
12207
`PUT' and `GET'.
12208
 
12209
   You can use the `--globalize-symbols' to make all symbols global.
12210
This option is useful when splitting up a `mmixal' program into several
12211
files.
12212
 
12213
   The `--gnu-syntax' turns off most syntax compatibility with
12214
`mmixal'.  Its usability is currently doubtful.
12215
 
12216
   The `--relax' option is not fully supported, but will eventually make
12217
the object file prepared for linker relaxation.
12218
 
12219
   If you want to avoid inadvertently calling a predefined symbol and
12220
would rather get an error, for example when using `as' with a compiler
12221
or other machine-generated code, specify `--no-predefined-syms'.  This
12222
turns off built-in predefined definitions of all such symbols,
12223
including rounding-mode symbols, segment symbols, `BIT' symbols, and
12224
`TRAP' symbols used in `mmix' "system calls".  It also turns off
12225
predefined special-register names, except when used in `PUT' and `GET'
12226
instructions.
12227
 
12228
   By default, some instructions are expanded to fit the size of the
12229
operand or an external symbol (*note MMIX-Expand::).  By passing
12230
`--no-expand', no such expansion will be done, instead causing errors
12231
at link time if the operand does not fit.
12232
 
12233
   The `mmixal' documentation (*note mmixsite::) specifies that global
12234
registers allocated with the `GREG' directive (*note MMIX-greg::) and
12235
initialized to the same non-zero value, will refer to the same global
12236
register.  This isn't strictly enforceable in `as' since the final
12237
addresses aren't known until link-time, but it will do an effort unless
12238
the `--no-merge-gregs' option is specified.  (Register merging isn't
12239
yet implemented in `ld'.)
12240
 
12241
   `as' will warn every time it expands an instruction to fit an
12242
operand unless the option `-x' is specified.  It is believed that this
12243
behaviour is more useful than just mimicking `mmixal''s behaviour, in
12244
which instructions are only expanded if the `-x' option is specified,
12245
and assembly fails otherwise, when an instruction needs to be expanded.
12246
It needs to be kept in mind that `mmixal' is both an assembler and
12247
linker, while `as' will expand instructions that at link stage can be
12248
contracted.  (Though linker relaxation isn't yet implemented in `ld'.)
12249
The option `-x' also imples `--linker-allocated-gregs'.
12250
 
12251
   If instruction expansion is enabled, `as' can expand a `PUSHJ'
12252
instruction into a series of instructions.  The shortest expansion is
12253
to not expand it, but just mark the call as redirectable to a stub,
12254
which `ld' creates at link-time, but only if the original `PUSHJ'
12255
instruction is found not to reach the target.  The stub consists of the
12256
necessary instructions to form a jump to the target.  This happens if
12257
`as' can assert that the `PUSHJ' instruction can reach such a stub.
12258
The option `--no-pushj-stubs' disables this shorter expansion, and the
12259
longer series of instructions is then created at assembly-time.  The
12260
option `--no-stubs' is a synonym, intended for compatibility with
12261
future releases, where generation of stubs for other instructions may
12262
be implemented.
12263
 
12264
   Usually a two-operand-expression (*note GREG-base::) without a
12265
matching `GREG' directive is treated as an error by `as'.  When the
12266
option `--linker-allocated-gregs' is in effect, they are instead passed
12267
through to the linker, which will allocate as many global registers as
12268
is needed.
12269
 
12270

12271
File: as.info,  Node: MMIX-Expand,  Next: MMIX-Syntax,  Prev: MMIX-Opts,  Up: MMIX-Dependent
12272
 
12273
9.23.2 Instruction expansion
12274
----------------------------
12275
 
12276
When `as' encounters an instruction with an operand that is either not
12277
known or does not fit the operand size of the instruction, `as' (and
12278
`ld') will expand the instruction into a sequence of instructions
12279
semantically equivalent to the operand fitting the instruction.
12280
Expansion will take place for the following instructions:
12281
 
12282
`GETA'
12283
     Expands to a sequence of four instructions: `SETL', `INCML',
12284
     `INCMH' and `INCH'.  The operand must be a multiple of four.
12285
 
12286
Conditional branches
12287
     A branch instruction is turned into a branch with the complemented
12288
     condition and prediction bit over five instructions; four
12289
     instructions setting `$255' to the operand value, which like with
12290
     `GETA' must be a multiple of four, and a final `GO $255,$255,0'.
12291
 
12292
`PUSHJ'
12293
     Similar to expansion for conditional branches; four instructions
12294
     set `$255' to the operand value, followed by a `PUSHGO
12295
     $255,$255,0'.
12296
 
12297
`JMP'
12298
     Similar to conditional branches and `PUSHJ'.  The final instruction
12299
     is `GO $255,$255,0'.
12300
 
12301
   The linker `ld' is expected to shrink these expansions for code
12302
assembled with `--relax' (though not currently implemented).
12303
 
12304

12305
File: as.info,  Node: MMIX-Syntax,  Next: MMIX-mmixal,  Prev: MMIX-Expand,  Up: MMIX-Dependent
12306
 
12307
9.23.3 Syntax
12308
-------------
12309
 
12310
The assembly syntax is supposed to be upward compatible with that
12311
described in Sections 1.3 and 1.4 of `The Art of Computer Programming,
12312
Volume 1'.  Draft versions of those chapters as well as other MMIX
12313
information is located at
12314
`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'.  Most code
12315
examples from the mmixal package located there should work unmodified
12316
when assembled and linked as single files, with a few noteworthy
12317
exceptions (*note MMIX-mmixal::).
12318
 
12319
   Before an instruction is emitted, the current location is aligned to
12320
the next four-byte boundary.  If a label is defined at the beginning of
12321
the line, its value will be the aligned value.
12322
 
12323
   In addition to the traditional hex-prefix `0x', a hexadecimal number
12324
can also be specified by the prefix character `#'.
12325
 
12326
   After all operands to an MMIX instruction or directive have been
12327
specified, the rest of the line is ignored, treated as a comment.
12328
 
12329
* Menu:
12330
 
12331
* MMIX-Chars::                  Special Characters
12332
* MMIX-Symbols::                Symbols
12333
* MMIX-Regs::                   Register Names
12334
* MMIX-Pseudos::                Assembler Directives
12335
 
12336

12337
File: as.info,  Node: MMIX-Chars,  Next: MMIX-Symbols,  Up: MMIX-Syntax
12338
 
12339
9.23.3.1 Special Characters
12340
...........................
12341
 
12342
The characters `*' and `#' are line comment characters; each start a
12343
comment at the beginning of a line, but only at the beginning of a
12344
line.  A `#' prefixes a hexadecimal number if found elsewhere on a line.
12345
 
12346
   Two other characters, `%' and `!', each start a comment anywhere on
12347
the line.  Thus you can't use the `modulus' and `not' operators in
12348
expressions normally associated with these two characters.
12349
 
12350
   A `;' is a line separator, treated as a new-line, so separate
12351
instructions can be specified on a single line.
12352
 
12353

12354
File: as.info,  Node: MMIX-Symbols,  Next: MMIX-Regs,  Prev: MMIX-Chars,  Up: MMIX-Syntax
12355
 
12356
9.23.3.2 Symbols
12357
................
12358
 
12359
The character `:' is permitted in identifiers.  There are two
12360
exceptions to it being treated as any other symbol character: if a
12361
symbol begins with `:', it means that the symbol is in the global
12362
namespace and that the current prefix should not be prepended to that
12363
symbol (*note MMIX-prefix::).  The `:' is then not considered part of
12364
the symbol.  For a symbol in the label position (first on a line), a `:'
12365
at the end of a symbol is silently stripped off.  A label is permitted,
12366
but not required, to be followed by a `:', as with many other assembly
12367
formats.
12368
 
12369
   The character `@' in an expression, is a synonym for `.', the
12370
current location.
12371
 
12372
   In addition to the common forward and backward local symbol formats
12373
(*note Symbol Names::), they can be specified with upper-case `B' and
12374
`F', as in `8B' and `9F'.  A local label defined for the current
12375
position is written with a `H' appended to the number:
12376
     3H LDB $0,$1,2
12377
   This and traditional local-label formats cannot be mixed: a label
12378
must be defined and referred to using the same format.
12379
 
12380
   There's a minor caveat: just as for the ordinary local symbols, the
12381
local symbols are translated into ordinary symbols using control
12382
characters are to hide the ordinal number of the symbol.
12383
Unfortunately, these symbols are not translated back in error messages.
12384
Thus you may see confusing error messages when local symbols are used.
12385
Control characters `\003' (control-C) and `\004' (control-D) are used
12386
for the MMIX-specific local-symbol syntax.
12387
 
12388
   The symbol `Main' is handled specially; it is always global.
12389
 
12390
   By defining the symbols `__.MMIX.start..text' and
12391
`__.MMIX.start..data', the address of respectively the `.text' and
12392
`.data' segments of the final program can be defined, though when
12393
linking more than one object file, the code or data in the object file
12394
containing the symbol is not guaranteed to be start at that position;
12395
just the final executable.  *Note MMIX-loc::.
12396
 
12397

12398
File: as.info,  Node: MMIX-Regs,  Next: MMIX-Pseudos,  Prev: MMIX-Symbols,  Up: MMIX-Syntax
12399
 
12400
9.23.3.3 Register names
12401
.......................
12402
 
12403
Local and global registers are specified as `$0' to `$255'.  The
12404
recognized special register names are `rJ', `rA', `rB', `rC', `rD',
12405
`rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ',
12406
`rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT',
12407
`rWW', `rXX', `rYY' and `rZZ'.  A leading `:' is optional for special
12408
register names.
12409
 
12410
   Local and global symbols can be equated to register names and used in
12411
place of ordinary registers.
12412
 
12413
   Similarly for special registers, local and global symbols can be
12414
used.  Also, symbols equated from numbers and constant expressions are
12415
allowed in place of a special register, except when either of the
12416
options `--no-predefined-syms' and `--fixed-special-register-names' are
12417
specified.  Then only the special register names above are allowed for
12418
the instructions having a special register operand; `GET' and `PUT'.
12419
 
12420

12421
File: as.info,  Node: MMIX-Pseudos,  Prev: MMIX-Regs,  Up: MMIX-Syntax
12422
 
12423
9.23.3.4 Assembler Directives
12424
.............................
12425
 
12426
`LOC'
12427
     The `LOC' directive sets the current location to the value of the
12428
     operand field, which may include changing sections.  If the
12429
     operand is a constant, the section is set to either `.data' if the
12430
     value is `0x2000000000000000' or larger, else it is set to `.text'.
12431
     Within a section, the current location may only be changed to
12432
     monotonically higher addresses.  A LOC expression must be a
12433
     previously defined symbol or a "pure" constant.
12434
 
12435
     An example, which sets the label PREV to the current location, and
12436
     updates the current location to eight bytes forward:
12437
          prev LOC @+8
12438
 
12439
     When a LOC has a constant as its operand, a symbol
12440
     `__.MMIX.start..text' or `__.MMIX.start..data' is defined
12441
     depending on the address as mentioned above.  Each such symbol is
12442
     interpreted as special by the linker, locating the section at that
12443
     address.  Note that if multiple files are linked, the first object
12444
     file with that section will be mapped to that address (not
12445
     necessarily the file with the LOC definition).
12446
 
12447
`LOCAL'
12448
     Example:
12449
           LOCAL external_symbol
12450
           LOCAL 42
12451
           .local asymbol
12452
 
12453
     This directive-operation generates a link-time assertion that the
12454
     operand does not correspond to a global register.  The operand is
12455
     an expression that at link-time resolves to a register symbol or a
12456
     number.  A number is treated as the register having that number.
12457
     There is one restriction on the use of this directive: the
12458
     pseudo-directive must be placed in a section with contents, code
12459
     or data.
12460
 
12461
`IS'
12462
     The `IS' directive:
12463
          asymbol IS an_expression
12464
     sets the symbol `asymbol' to `an_expression'.  A symbol may not be
12465
     set more than once using this directive.  Local labels may be set
12466
     using this directive, for example:
12467
          5H IS @+4
12468
 
12469
`GREG'
12470
     This directive reserves a global register, gives it an initial
12471
     value and optionally gives it a symbolic name.  Some examples:
12472
 
12473
          areg GREG
12474
          breg GREG data_value
12475
               GREG data_buffer
12476
               .greg creg, another_data_value
12477
 
12478
     The symbolic register name can be used in place of a (non-special)
12479
     register.  If a value isn't provided, it defaults to zero.  Unless
12480
     the option `--no-merge-gregs' is specified, non-zero registers
12481
     allocated with this directive may be eliminated by `as'; another
12482
     register with the same value used in its place.  Any of the
12483
     instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU',
12484
     `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW',
12485
     `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT',
12486
     `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can
12487
     have a value nearby an initial value in place of its second and
12488
     third operands.  Here, "nearby" is defined as within the range
12489
     0...255 from the initial value of such an allocated register.
12490
 
12491
          buffer1 BYTE 0,0,0,0,0
12492
          buffer2 BYTE 0,0,0,0,0
12493
           ...
12494
           GREG buffer1
12495
           LDOU $42,buffer2
12496
     In the example above, the `Y' field of the `LDOUI' instruction
12497
     (LDOU with a constant Z) will be replaced with the global register
12498
     allocated for `buffer1', and the `Z' field will have the value 5,
12499
     the offset from `buffer1' to `buffer2'.  The result is equivalent
12500
     to this code:
12501
          buffer1 BYTE 0,0,0,0,0
12502
          buffer2 BYTE 0,0,0,0,0
12503
           ...
12504
          tmpreg GREG buffer1
12505
           LDOU $42,tmpreg,(buffer2-buffer1)
12506
 
12507
     Global registers allocated with this directive are allocated in
12508
     order higher-to-lower within a file.  Other than that, the exact
12509
     order of register allocation and elimination is undefined.  For
12510
     example, the order is undefined when more than one file with such
12511
     directives are linked together.  With the options `-x' and
12512
     `--linker-allocated-gregs', `GREG' directives for two-operand
12513
     cases like the one mentioned above can be omitted.  Sufficient
12514
     global registers will then be allocated by the linker.
12515
 
12516
`BYTE'
12517
     The `BYTE' directive takes a series of operands separated by a
12518
     comma.  If an operand is a string (*note Strings::), each
12519
     character of that string is emitted as a byte.  Other operands
12520
     must be constant expressions without forward references, in the
12521
     range 0...255.  If you need operands having expressions with
12522
     forward references, use `.byte' (*note Byte::).  An operand can be
12523
     omitted, defaulting to a zero value.
12524
 
12525
`WYDE'
12526
`TETRA'
12527
`OCTA'
12528
     The directives `WYDE', `TETRA' and `OCTA' emit constants of two,
12529
     four and eight bytes size respectively.  Before anything else
12530
     happens for the directive, the current location is aligned to the
12531
     respective constant-size boundary.  If a label is defined at the
12532
     beginning of the line, its value will be that after the alignment.
12533
     A single operand can be omitted, defaulting to a zero value
12534
     emitted for the directive.  Operands can be expressed as strings
12535
     (*note Strings::), in which case each character in the string is
12536
     emitted as a separate constant of the size indicated by the
12537
     directive.
12538
 
12539
`PREFIX'
12540
     The `PREFIX' directive sets a symbol name prefix to be prepended to
12541
     all symbols (except local symbols, *note MMIX-Symbols::), that are
12542
     not prefixed with `:', until the next `PREFIX' directive.  Such
12543
     prefixes accumulate.  For example,
12544
           PREFIX a
12545
           PREFIX b
12546
          c IS 0
12547
     defines a symbol `abc' with the value 0.
12548
 
12549
`BSPEC'
12550
`ESPEC'
12551
     A pair of `BSPEC' and `ESPEC' directives delimit a section of
12552
     special contents (without specified semantics).  Example:
12553
           BSPEC 42
12554
           TETRA 1,2,3
12555
           ESPEC
12556
     The single operand to `BSPEC' must be number in the range 0...255.
12557
     The `BSPEC' number 80 is used by the GNU binutils implementation.
12558
 
12559

12560
File: as.info,  Node: MMIX-mmixal,  Prev: MMIX-Syntax,  Up: MMIX-Dependent
12561
 
12562
9.23.4 Differences to `mmixal'
12563
------------------------------
12564
 
12565
The binutils `as' and `ld' combination has a few differences in
12566
function compared to `mmixal' (*note mmixsite::).
12567
 
12568
   The replacement of a symbol with a GREG-allocated register (*note
12569
GREG-base::) is not handled the exactly same way in `as' as in
12570
`mmixal'.  This is apparent in the `mmixal' example file `inout.mms',
12571
where different registers with different offsets, eventually yielding
12572
the same address, are used in the first instruction.  This type of
12573
difference should however not affect the function of any program unless
12574
it has specific assumptions about the allocated register number.
12575
 
12576
   Line numbers (in the `mmo' object format) are currently not
12577
supported.
12578
 
12579
   Expression operator precedence is not that of mmixal: operator
12580
precedence is that of the C programming language.  It's recommended to
12581
use parentheses to explicitly specify wanted operator precedence
12582
whenever more than one type of operators are used.
12583
 
12584
   The serialize unary operator `&', the fractional division operator
12585
`//', the logical not operator `!' and the modulus operator `%' are not
12586
available.
12587
 
12588
   Symbols are not global by default, unless the option
12589
`--globalize-symbols' is passed.  Use the `.global' directive to
12590
globalize symbols (*note Global::).
12591
 
12592
   Operand syntax is a bit stricter with `as' than `mmixal'.  For
12593
example, you can't say `addu 1,2,3', instead you must write `addu
12594
$1,$2,3'.
12595
 
12596
   You can't LOC to a lower address than those already visited (i.e.,
12597
"backwards").
12598
 
12599
   A LOC directive must come before any emitted code.
12600
 
12601
   Predefined symbols are visible as file-local symbols after use.  (In
12602
the ELF file, that is--the linked mmo file has no notion of a file-local
12603
symbol.)
12604
 
12605
   Some mapping of constant expressions to sections in LOC expressions
12606
is attempted, but that functionality is easily confused and should be
12607
avoided unless compatibility with `mmixal' is required.  A LOC
12608
expression to `0x2000000000000000' or higher, maps to the `.data'
12609
section and lower addresses map to the `.text' section (*note
12610
MMIX-loc::).
12611
 
12612
   The code and data areas are each contiguous.  Sparse programs with
12613
far-away LOC directives will take up the same amount of space as a
12614
contiguous program with zeros filled in the gaps between the LOC
12615
directives.  If you need sparse programs, you might try and get the
12616
wanted effect with a linker script and splitting up the code parts into
12617
sections (*note Section::).  Assembly code for this, to be compatible
12618
with `mmixal', would look something like:
12619
      .if 0
12620
      LOC away_expression
12621
      .else
12622
      .section away,"ax"
12623
      .fi
12624
   `as' will not execute the LOC directive and `mmixal' ignores the
12625
lines with `.'.  This construct can be used generally to help
12626
compatibility.
12627
 
12628
   Symbols can't be defined twice-not even to the same value.
12629
 
12630
   Instruction mnemonics are recognized case-insensitive, though the
12631
`IS' and `GREG' pseudo-operations must be specified in upper-case
12632
characters.
12633
 
12634
   There's no unicode support.
12635
 
12636
   The following is a list of programs in `mmix.tar.gz', available at
12637
`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last
12638
checked with the version dated 2001-08-25 (md5sum
12639
c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do
12640
not assemble with `as':
12641
 
12642
`silly.mms'
12643
     LOC to a previous address.
12644
 
12645
`sim.mms'
12646
     Redefines symbol `Done'.
12647
 
12648
`test.mms'
12649
     Uses the serial operator `&'.
12650
 
12651

12652
File: as.info,  Node: MSP430-Dependent,  Next: SH-Dependent,  Prev: MMIX-Dependent,  Up: Machine Dependencies
12653
 
12654
9.24 MSP 430 Dependent Features
12655
===============================
12656
 
12657
* Menu:
12658
 
12659
* MSP430 Options::              Options
12660
* MSP430 Syntax::               Syntax
12661
* MSP430 Floating Point::       Floating Point
12662
* MSP430 Directives::           MSP 430 Machine Directives
12663
* MSP430 Opcodes::              Opcodes
12664
* MSP430 Profiling Capability:: Profiling Capability
12665
 
12666

12667
File: as.info,  Node: MSP430 Options,  Next: MSP430 Syntax,  Up: MSP430-Dependent
12668
 
12669
9.24.1 Options
12670
--------------
12671
 
12672
`-m'
12673
     select the mpu arch. Currently has no effect.
12674
 
12675
`-mP'
12676
     enables polymorph instructions handler.
12677
 
12678
`-mQ'
12679
     enables relaxation at assembly time. DANGEROUS!
12680
 
12681
 
12682

12683
File: as.info,  Node: MSP430 Syntax,  Next: MSP430 Floating Point,  Prev: MSP430 Options,  Up: MSP430-Dependent
12684
 
12685
9.24.2 Syntax
12686
-------------
12687
 
12688
* Menu:
12689
 
12690
* MSP430-Macros::               Macros
12691
* MSP430-Chars::                Special Characters
12692
* MSP430-Regs::                 Register Names
12693
* MSP430-Ext::                  Assembler Extensions
12694
 
12695

12696
File: as.info,  Node: MSP430-Macros,  Next: MSP430-Chars,  Up: MSP430 Syntax
12697
 
12698
9.24.2.1 Macros
12699
...............
12700
 
12701
The macro syntax used on the MSP 430 is like that described in the MSP
12702
430 Family Assembler Specification.  Normal `as' macros should still
12703
work.
12704
 
12705
   Additional built-in macros are:
12706
 
12707
`llo(exp)'
12708
     Extracts least significant word from 32-bit expression 'exp'.
12709
 
12710
`lhi(exp)'
12711
     Extracts most significant word from 32-bit expression 'exp'.
12712
 
12713
`hlo(exp)'
12714
     Extracts 3rd word from 64-bit expression 'exp'.
12715
 
12716
`hhi(exp)'
12717
     Extracts 4rd word from 64-bit expression 'exp'.
12718
 
12719
 
12720
   They normally being used as an immediate source operand.
12721
         mov    #llo(1), r10    ;       == mov  #1, r10
12722
         mov    #lhi(1), r10    ;       == mov  #0, r10
12723
 
12724

12725
File: as.info,  Node: MSP430-Chars,  Next: MSP430-Regs,  Prev: MSP430-Macros,  Up: MSP430 Syntax
12726
 
12727
9.24.2.2 Special Characters
12728
...........................
12729
 
12730
`;' is the line comment character.
12731
 
12732
   The character `$' in jump instructions indicates current location and
12733
implemented only for TI syntax compatibility.
12734
 
12735

12736
File: as.info,  Node: MSP430-Regs,  Next: MSP430-Ext,  Prev: MSP430-Chars,  Up: MSP430 Syntax
12737
 
12738
9.24.2.3 Register Names
12739
.......................
12740
 
12741
General-purpose registers are represented by predefined symbols of the
12742
form `rN' (for global registers), where N represents a number between
12743
`0' and `15'.  The leading letters may be in either upper or lower
12744
case; for example, `r13' and `R7' are both valid register names.
12745
 
12746
   Register names `PC', `SP' and `SR' cannot be used as register names
12747
and will be treated as variables. Use `r0', `r1', and `r2' instead.
12748
 
12749

12750
File: as.info,  Node: MSP430-Ext,  Prev: MSP430-Regs,  Up: MSP430 Syntax
12751
 
12752
9.24.2.4 Assembler Extensions
12753
.............................
12754
 
12755
`@rN'
12756
     As destination operand being treated as `0(rn)'
12757
 
12758
`0(rN)'
12759
     As source operand being treated as `@rn'
12760
 
12761
`jCOND +N'
12762
     Skips next N bytes followed by jump instruction and equivalent to
12763
     `jCOND $+N+2'
12764
 
12765
 
12766
   Also, there are some instructions, which cannot be found in other
12767
assemblers.  These are branch instructions, which has different opcodes
12768
upon jump distance.  They all got PC relative addressing mode.
12769
 
12770
`beq label'
12771
     A polymorph instruction which is `jeq label' in case if jump
12772
     distance within allowed range for cpu's jump instruction. If not,
12773
     this unrolls into a sequence of
12774
            jne $+6
12775
            br  label
12776
 
12777
`bne label'
12778
     A polymorph instruction which is `jne label' or `jeq +4; br label'
12779
 
12780
`blt label'
12781
     A polymorph instruction which is `jl label' or `jge +4; br label'
12782
 
12783
`bltn label'
12784
     A polymorph instruction which is `jn label' or `jn +2; jmp +4; br
12785
     label'
12786
 
12787
`bltu label'
12788
     A polymorph instruction which is `jlo label' or `jhs +2; br label'
12789
 
12790
`bge label'
12791
     A polymorph instruction which is `jge label' or `jl +4; br label'
12792
 
12793
`bgeu label'
12794
     A polymorph instruction which is `jhs label' or `jlo +4; br label'
12795
 
12796
`bgt label'
12797
     A polymorph instruction which is `jeq +2; jge label' or `jeq +6;
12798
     jl  +4; br label'
12799
 
12800
`bgtu label'
12801
     A polymorph instruction which is `jeq +2; jhs label' or `jeq +6;
12802
     jlo +4; br label'
12803
 
12804
`bleu label'
12805
     A polymorph instruction which is `jeq label; jlo label' or `jeq
12806
     +2; jhs +4; br label'
12807
 
12808
`ble label'
12809
     A polymorph instruction which is `jeq label; jl  label' or `jeq
12810
     +2; jge +4; br label'
12811
 
12812
`jump label'
12813
     A polymorph instruction which is `jmp label' or `br label'
12814
 
12815

12816
File: as.info,  Node: MSP430 Floating Point,  Next: MSP430 Directives,  Prev: MSP430 Syntax,  Up: MSP430-Dependent
12817
 
12818
9.24.3 Floating Point
12819
---------------------
12820
 
12821
The MSP 430 family uses IEEE 32-bit floating-point numbers.
12822
 
12823

12824
File: as.info,  Node: MSP430 Directives,  Next: MSP430 Opcodes,  Prev: MSP430 Floating Point,  Up: MSP430-Dependent
12825
 
12826
9.24.4 MSP 430 Machine Directives
12827
---------------------------------
12828
 
12829
`.file'
12830
     This directive is ignored; it is accepted for compatibility with
12831
     other MSP 430 assemblers.
12832
 
12833
          _Warning:_ in other versions of the GNU assembler, `.file' is
12834
          used for the directive called `.app-file' in the MSP 430
12835
          support.
12836
 
12837
`.line'
12838
     This directive is ignored; it is accepted for compatibility with
12839
     other MSP 430 assemblers.
12840
 
12841
`.arch'
12842
     Currently this directive is ignored; it is accepted for
12843
     compatibility with other MSP 430 assemblers.
12844
 
12845
`.profiler'
12846
     This directive instructs assembler to add new profile entry to the
12847
     object file.
12848
 
12849
 
12850

12851
File: as.info,  Node: MSP430 Opcodes,  Next: MSP430 Profiling Capability,  Prev: MSP430 Directives,  Up: MSP430-Dependent
12852
 
12853
9.24.5 Opcodes
12854
--------------
12855
 
12856
`as' implements all the standard MSP 430 opcodes.  No additional
12857
pseudo-instructions are needed on this family.
12858
 
12859
   For information on the 430 machine instruction set, see `MSP430
12860
User's Manual, document slau049d', Texas Instrument, Inc.
12861
 
12862

12863
File: as.info,  Node: MSP430 Profiling Capability,  Prev: MSP430 Opcodes,  Up: MSP430-Dependent
12864
 
12865
9.24.6 Profiling Capability
12866
---------------------------
12867
 
12868
It is a performance hit to use gcc's profiling approach for this tiny
12869
target.  Even more - jtag hardware facility does not perform any
12870
profiling functions.  However we've got gdb's built-in simulator where
12871
we can do anything.
12872
 
12873
   We define new section `.profiler' which holds all profiling
12874
information.  We define new pseudo operation `.profiler' which will
12875
instruct assembler to add new profile entry to the object file. Profile
12876
should take place at the present address.
12877
 
12878
   Pseudo operation format:
12879
 
12880
   `.profiler flags,function_to_profile [, cycle_corrector, extra]'
12881
 
12882
   where:
12883
 
12884
          `flags' is a combination of the following characters:
12885
 
12886
    `s'
12887
          function entry
12888
 
12889
    `x'
12890
          function exit
12891
 
12892
    `i'
12893
          function is in init section
12894
 
12895
    `f'
12896
          function is in fini section
12897
 
12898
    `l'
12899
          library call
12900
 
12901
    `c'
12902
          libc standard call
12903
 
12904
    `d'
12905
          stack value demand
12906
 
12907
    `I'
12908
          interrupt service routine
12909
 
12910
    `P'
12911
          prologue start
12912
 
12913
    `p'
12914
          prologue end
12915
 
12916
    `E'
12917
          epilogue start
12918
 
12919
    `e'
12920
          epilogue end
12921
 
12922
    `j'
12923
          long jump / sjlj unwind
12924
 
12925
    `a'
12926
          an arbitrary code fragment
12927
 
12928
    `t'
12929
          extra parameter saved (a constant value like frame size)
12930
 
12931
`function_to_profile'
12932
     a function address
12933
 
12934
`cycle_corrector'
12935
     a value which should be added to the cycle counter, zero if
12936
     omitted.
12937
 
12938
`extra'
12939
     any extra parameter, zero if omitted.
12940
 
12941
 
12942
   For example:
12943
     .global fxx
12944
     .type fxx,@function
12945
     fxx:
12946
     .LFrameOffset_fxx=0x08
12947
     .profiler "scdP", fxx     ; function entry.
12948
                          ; we also demand stack value to be saved
12949
       push r11
12950
       push r10
12951
       push r9
12952
       push r8
12953
     .profiler "cdpt",fxx,0, .LFrameOffset_fxx  ; check stack value at this point
12954
                                          ; (this is a prologue end)
12955
                                          ; note, that spare var filled with
12956
                                          ; the farme size
12957
       mov r15,r8
12958
     ...
12959
     .profiler cdE,fxx         ; check stack
12960
       pop r8
12961
       pop r9
12962
       pop r10
12963
       pop r11
12964
     .profiler xcde,fxx,3      ; exit adds 3 to the cycle counter
12965
       ret                     ; cause 'ret' insn takes 3 cycles
12966
 
12967

12968
File: as.info,  Node: PDP-11-Dependent,  Next: PJ-Dependent,  Prev: SH64-Dependent,  Up: Machine Dependencies
12969
 
12970
9.25 PDP-11 Dependent Features
12971
==============================
12972
 
12973
* Menu:
12974
 
12975
* PDP-11-Options::              Options
12976
* PDP-11-Pseudos::              Assembler Directives
12977
* PDP-11-Syntax::               DEC Syntax versus BSD Syntax
12978
* PDP-11-Mnemonics::            Instruction Naming
12979
* PDP-11-Synthetic::            Synthetic Instructions
12980
 
12981

12982
File: as.info,  Node: PDP-11-Options,  Next: PDP-11-Pseudos,  Up: PDP-11-Dependent
12983
 
12984
9.25.1 Options
12985
--------------
12986
 
12987
The PDP-11 version of `as' has a rich set of machine dependent options.
12988
 
12989
9.25.1.1 Code Generation Options
12990
................................
12991
 
12992
`-mpic | -mno-pic'
12993
     Generate position-independent (or position-dependent) code.
12994
 
12995
     The default is to generate position-independent code.
12996
 
12997
9.25.1.2 Instruction Set Extension Options
12998
..........................................
12999
 
13000
These options enables or disables the use of extensions over the base
13001
line instruction set as introduced by the first PDP-11 CPU: the KA11.
13002
Most options come in two variants: a `-m'EXTENSION that enables
13003
EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION.
13004
 
13005
   The default is to enable all extensions.
13006
 
13007
`-mall | -mall-extensions'
13008
     Enable all instruction set extensions.
13009
 
13010
`-mno-extensions'
13011
     Disable all instruction set extensions.
13012
 
13013
`-mcis | -mno-cis'
13014
     Enable (or disable) the use of the commercial instruction set,
13015
     which consists of these instructions: `ADDNI', `ADDN', `ADDPI',
13016
     `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC',
13017
     `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI',
13018
     `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL',
13019
     `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI',
13020
     `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC',
13021
     `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI',
13022
     `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'.
13023
 
13024
`-mcsm | -mno-csm'
13025
     Enable (or disable) the use of the `CSM' instruction.
13026
 
13027
`-meis | -mno-eis'
13028
     Enable (or disable) the use of the extended instruction set, which
13029
     consists of these instructions: `ASHC', `ASH', `DIV', `MARK',
13030
     `MUL', `RTT', `SOB' `SXT', and `XOR'.
13031
 
13032
`-mfis | -mkev11'
13033
`-mno-fis | -mno-kev11'
13034
     Enable (or disable) the use of the KEV11 floating-point
13035
     instructions: `FADD', `FDIV', `FMUL', and `FSUB'.
13036
 
13037
`-mfpp | -mfpu | -mfp-11'
13038
`-mno-fpp | -mno-fpu | -mno-fp-11'
13039
     Enable (or disable) the use of FP-11 floating-point instructions:
13040
     `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF',
13041
     `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF',
13042
     `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST',
13043
     `SUBF', and `TSTF'.
13044
 
13045
`-mlimited-eis | -mno-limited-eis'
13046
     Enable (or disable) the use of the limited extended instruction
13047
     set: `MARK', `RTT', `SOB', `SXT', and `XOR'.
13048
 
13049
     The -mno-limited-eis options also implies -mno-eis.
13050
 
13051
`-mmfpt | -mno-mfpt'
13052
     Enable (or disable) the use of the `MFPT' instruction.
13053
 
13054
`-mmultiproc | -mno-multiproc'
13055
     Enable (or disable) the use of multiprocessor instructions:
13056
     `TSTSET' and `WRTLCK'.
13057
 
13058
`-mmxps | -mno-mxps'
13059
     Enable (or disable) the use of the `MFPS' and `MTPS' instructions.
13060
 
13061
`-mspl | -mno-spl'
13062
     Enable (or disable) the use of the `SPL' instruction.
13063
 
13064
     Enable (or disable) the use of the microcode instructions: `LDUB',
13065
     `MED', and `XFC'.
13066
 
13067
9.25.1.3 CPU Model Options
13068
..........................
13069
 
13070
These options enable the instruction set extensions supported by a
13071
particular CPU, and disables all other extensions.
13072
 
13073
`-mka11'
13074
     KA11 CPU.  Base line instruction set only.
13075
 
13076
`-mkb11'
13077
     KB11 CPU.  Enable extended instruction set and `SPL'.
13078
 
13079
`-mkd11a'
13080
     KD11-A CPU.  Enable limited extended instruction set.
13081
 
13082
`-mkd11b'
13083
     KD11-B CPU.  Base line instruction set only.
13084
 
13085
`-mkd11d'
13086
     KD11-D CPU.  Base line instruction set only.
13087
 
13088
`-mkd11e'
13089
     KD11-E CPU.  Enable extended instruction set, `MFPS', and `MTPS'.
13090
 
13091
`-mkd11f | -mkd11h | -mkd11q'
13092
     KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended
13093
     instruction set, `MFPS', and `MTPS'.
13094
 
13095
`-mkd11k'
13096
     KD11-K CPU.  Enable extended instruction set, `LDUB', `MED',
13097
     `MFPS', `MFPT', `MTPS', and `XFC'.
13098
 
13099
`-mkd11z'
13100
     KD11-Z CPU.  Enable extended instruction set, `CSM', `MFPS',
13101
     `MFPT', `MTPS', and `SPL'.
13102
 
13103
`-mf11'
13104
     F11 CPU.  Enable extended instruction set, `MFPS', `MFPT', and
13105
     `MTPS'.
13106
 
13107
`-mj11'
13108
     J11 CPU.  Enable extended instruction set, `CSM', `MFPS', `MFPT',
13109
     `MTPS', `SPL', `TSTSET', and `WRTLCK'.
13110
 
13111
`-mt11'
13112
     T11 CPU.  Enable limited extended instruction set, `MFPS', and
13113
     `MTPS'.
13114
 
13115
9.25.1.4 Machine Model Options
13116
..............................
13117
 
13118
These options enable the instruction set extensions supported by a
13119
particular machine model, and disables all other extensions.
13120
 
13121
`-m11/03'
13122
     Same as `-mkd11f'.
13123
 
13124
`-m11/04'
13125
     Same as `-mkd11d'.
13126
 
13127
`-m11/05 | -m11/10'
13128
     Same as `-mkd11b'.
13129
 
13130
`-m11/15 | -m11/20'
13131
     Same as `-mka11'.
13132
 
13133
`-m11/21'
13134
     Same as `-mt11'.
13135
 
13136
`-m11/23 | -m11/24'
13137
     Same as `-mf11'.
13138
 
13139
`-m11/34'
13140
     Same as `-mkd11e'.
13141
 
13142
`-m11/34a'
13143
     Ame as `-mkd11e' `-mfpp'.
13144
 
13145
`-m11/35 | -m11/40'
13146
     Same as `-mkd11a'.
13147
 
13148
`-m11/44'
13149
     Same as `-mkd11z'.
13150
 
13151
`-m11/45 | -m11/50 | -m11/55 | -m11/70'
13152
     Same as `-mkb11'.
13153
 
13154
`-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94'
13155
     Same as `-mj11'.
13156
 
13157
`-m11/60'
13158
     Same as `-mkd11k'.
13159
 
13160

13161
File: as.info,  Node: PDP-11-Pseudos,  Next: PDP-11-Syntax,  Prev: PDP-11-Options,  Up: PDP-11-Dependent
13162
 
13163
9.25.2 Assembler Directives
13164
---------------------------
13165
 
13166
The PDP-11 version of `as' has a few machine dependent assembler
13167
directives.
13168
 
13169
`.bss'
13170
     Switch to the `bss' section.
13171
 
13172
`.even'
13173
     Align the location counter to an even number.
13174
 
13175

13176
File: as.info,  Node: PDP-11-Syntax,  Next: PDP-11-Mnemonics,  Prev: PDP-11-Pseudos,  Up: PDP-11-Dependent
13177
 
13178
9.25.3 PDP-11 Assembly Language Syntax
13179
--------------------------------------
13180
 
13181
`as' supports both DEC syntax and BSD syntax.  The only difference is
13182
that in DEC syntax, a `#' character is used to denote an immediate
13183
constants, while in BSD syntax the character for this purpose is `$'.
13184
 
13185
   general-purpose registers are named `r0' through `r7'.  Mnemonic
13186
alternatives for `r6' and `r7' are `sp' and `pc', respectively.
13187
 
13188
   Floating-point registers are named `ac0' through `ac3', or
13189
alternatively `fr0' through `fr3'.
13190
 
13191
   Comments are started with a `#' or a `/' character, and extend to
13192
the end of the line.  (FIXME: clash with immediates?)
13193
 
13194

13195
File: as.info,  Node: PDP-11-Mnemonics,  Next: PDP-11-Synthetic,  Prev: PDP-11-Syntax,  Up: PDP-11-Dependent
13196
 
13197
9.25.4 Instruction Naming
13198
-------------------------
13199
 
13200
Some instructions have alternative names.
13201
 
13202
`BCC'
13203
     `BHIS'
13204
 
13205
`BCS'
13206
     `BLO'
13207
 
13208
`L2DR'
13209
     `L2D'
13210
 
13211
`L3DR'
13212
     `L3D'
13213
 
13214
`SYS'
13215
     `TRAP'
13216
 
13217

13218
File: as.info,  Node: PDP-11-Synthetic,  Prev: PDP-11-Mnemonics,  Up: PDP-11-Dependent
13219
 
13220
9.25.5 Synthetic Instructions
13221
-----------------------------
13222
 
13223
The `JBR' and `J'CC synthetic instructions are not supported yet.
13224
 
13225

13226
File: as.info,  Node: PJ-Dependent,  Next: PPC-Dependent,  Prev: PDP-11-Dependent,  Up: Machine Dependencies
13227
 
13228
9.26 picoJava Dependent Features
13229
================================
13230
 
13231
* Menu:
13232
 
13233
* PJ Options::              Options
13234
 
13235

13236
File: as.info,  Node: PJ Options,  Up: PJ-Dependent
13237
 
13238
9.26.1 Options
13239
--------------
13240
 
13241
`as' has two additional command-line options for the picoJava
13242
architecture.
13243
`-ml'
13244
     This option selects little endian data output.
13245
 
13246
`-mb'
13247
     This option selects big endian data output.
13248
 
13249

13250
File: as.info,  Node: PPC-Dependent,  Next: Sparc-Dependent,  Prev: PJ-Dependent,  Up: Machine Dependencies
13251
 
13252
9.27 PowerPC Dependent Features
13253
===============================
13254
 
13255
* Menu:
13256
 
13257
* PowerPC-Opts::                Options
13258
* PowerPC-Pseudo::              PowerPC Assembler Directives
13259
 
13260

13261
File: as.info,  Node: PowerPC-Opts,  Next: PowerPC-Pseudo,  Up: PPC-Dependent
13262
 
13263
9.27.1 Options
13264
--------------
13265
 
13266
The PowerPC chip family includes several successive levels, using the
13267
same core instruction set, but including a few additional instructions
13268
at each level.  There are exceptions to this however.  For details on
13269
what instructions each variant supports, please see the chip's
13270
architecture reference manual.
13271
 
13272
   The following table lists all available PowerPC options.
13273
 
13274
`-mpwrx | -mpwr2'
13275
     Generate code for POWER/2 (RIOS2).
13276
 
13277
`-mpwr'
13278
     Generate code for POWER (RIOS1)
13279
 
13280
`-m601'
13281
     Generate code for PowerPC 601.
13282
 
13283
`-mppc, -mppc32, -m603, -m604'
13284
     Generate code for PowerPC 603/604.
13285
 
13286
`-m403, -m405'
13287
     Generate code for PowerPC 403/405.
13288
 
13289
`-m440'
13290
     Generate code for PowerPC 440.  BookE and some 405 instructions.
13291
 
13292
`-m7400, -m7410, -m7450, -m7455'
13293
     Generate code for PowerPC 7400/7410/7450/7455.
13294
 
13295
`-m750cl'
13296
     Generate code for PowerPC 750CL.
13297
 
13298
`-mppc64, -m620'
13299
     Generate code for PowerPC 620/625/630.
13300
 
13301
`-me500, -me500x2'
13302
     Generate code for Motorola e500 core complex.
13303
 
13304
`-mspe'
13305
     Generate code for Motorola SPE instructions.
13306
 
13307
`-mppc64bridge'
13308
     Generate code for PowerPC 64, including bridge insns.
13309
 
13310
`-mbooke64'
13311
     Generate code for 64-bit BookE.
13312
 
13313
`-mbooke, mbooke32'
13314
     Generate code for 32-bit BookE.
13315
 
13316
`-me300'
13317
     Generate code for PowerPC e300 family.
13318
 
13319
`-maltivec'
13320
     Generate code for processors with AltiVec instructions.
13321
 
13322
`-mvsx'
13323
     Generate code for processors with Vector-Scalar (VSX) instructions.
13324
 
13325
`-mpower4'
13326
     Generate code for Power4 architecture.
13327
 
13328
`-mpower5'
13329
     Generate code for Power5 architecture.
13330
 
13331
`-mpower6'
13332
     Generate code for Power6 architecture.
13333
 
13334
`-mpower7'
13335
     Generate code for Power7 architecture.
13336
 
13337
`-mcell'
13338
     Generate code for Cell Broadband Engine architecture.
13339
 
13340
`-mcom'
13341
     Generate code Power/PowerPC common instructions.
13342
 
13343
`-many'
13344
     Generate code for any architecture (PWR/PWRX/PPC).
13345
 
13346
`-mregnames'
13347
     Allow symbolic names for registers.
13348
 
13349
`-mno-regnames'
13350
     Do not allow symbolic names for registers.
13351
 
13352
`-mrelocatable'
13353
     Support for GCC's -mrelocatable option.
13354
 
13355
`-mrelocatable-lib'
13356
     Support for GCC's -mrelocatable-lib option.
13357
 
13358
`-memb'
13359
     Set PPC_EMB bit in ELF flags.
13360
 
13361
`-mlittle, -mlittle-endian'
13362
     Generate code for a little endian machine.
13363
 
13364
`-mbig, -mbig-endian'
13365
     Generate code for a big endian machine.
13366
 
13367
`-msolaris'
13368
     Generate code for Solaris.
13369
 
13370
`-mno-solaris'
13371
     Do not generate code for Solaris.
13372
 
13373

13374
File: as.info,  Node: PowerPC-Pseudo,  Prev: PowerPC-Opts,  Up: PPC-Dependent
13375
 
13376
9.27.2 PowerPC Assembler Directives
13377
-----------------------------------
13378
 
13379
A number of assembler directives are available for PowerPC.  The
13380
following table is far from complete.
13381
 
13382
`.machine "string"'
13383
     This directive allows you to change the machine for which code is
13384
     generated.  `"string"' may be any of the -m cpu selection options
13385
     (without the -m) enclosed in double quotes, `"push"', or `"pop"'.
13386
     `.machine "push"' saves the currently selected cpu, which may be
13387
     restored with `.machine "pop"'.
13388
 
13389

13390
File: as.info,  Node: SH-Dependent,  Next: SH64-Dependent,  Prev: MSP430-Dependent,  Up: Machine Dependencies
13391
 
13392
9.28 Renesas / SuperH SH Dependent Features
13393
===========================================
13394
 
13395
* Menu:
13396
 
13397
* SH Options::              Options
13398
* SH Syntax::               Syntax
13399
* SH Floating Point::       Floating Point
13400
* SH Directives::           SH Machine Directives
13401
* SH Opcodes::              Opcodes
13402
 
13403

13404
File: as.info,  Node: SH Options,  Next: SH Syntax,  Up: SH-Dependent
13405
 
13406
9.28.1 Options
13407
--------------
13408
 
13409
`as' has following command-line options for the Renesas (formerly
13410
Hitachi) / SuperH SH family.
13411
 
13412
`--little'
13413
     Generate little endian code.
13414
 
13415
`--big'
13416
     Generate big endian code.
13417
 
13418
`--relax'
13419
     Alter jump instructions for long displacements.
13420
 
13421
`--small'
13422
     Align sections to 4 byte boundaries, not 16.
13423
 
13424
`--dsp'
13425
     Enable sh-dsp insns, and disable sh3e / sh4 insns.
13426
 
13427
`--renesas'
13428
     Disable optimization with section symbol for compatibility with
13429
     Renesas assembler.
13430
 
13431
`--allow-reg-prefix'
13432
     Allow '$' as a register name prefix.
13433
 
13434
`--isa=sh4 | sh4a'
13435
     Specify the sh4 or sh4a instruction set.
13436
 
13437
`--isa=dsp'
13438
     Enable sh-dsp insns, and disable sh3e / sh4 insns.
13439
 
13440
`--isa=fp'
13441
     Enable sh2e, sh3e, sh4, and sh4a insn sets.
13442
 
13443
`--isa=all'
13444
     Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
13445
 
13446
`-h-tick-hex'
13447
     Support H'00 style hex constants in addition to 0x00 style.
13448
 
13449
 
13450

13451
File: as.info,  Node: SH Syntax,  Next: SH Floating Point,  Prev: SH Options,  Up: SH-Dependent
13452
 
13453
9.28.2 Syntax
13454
-------------
13455
 
13456
* Menu:
13457
 
13458
* SH-Chars::                Special Characters
13459
* SH-Regs::                 Register Names
13460
* SH-Addressing::           Addressing Modes
13461
 
13462

13463
File: as.info,  Node: SH-Chars,  Next: SH-Regs,  Up: SH Syntax
13464
 
13465
9.28.2.1 Special Characters
13466
...........................
13467
 
13468
`!' is the line comment character.
13469
 
13470
   You can use `;' instead of a newline to separate statements.
13471
 
13472
   Since `$' has no special meaning, you may use it in symbol names.
13473
 
13474

13475
File: as.info,  Node: SH-Regs,  Next: SH-Addressing,  Prev: SH-Chars,  Up: SH Syntax
13476
 
13477
9.28.2.2 Register Names
13478
.......................
13479
 
13480
You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
13481
`r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to
13482
refer to the SH registers.
13483
 
13484
   The SH also has these control registers:
13485
 
13486
`pr'
13487
     procedure register (holds return address)
13488
 
13489
`pc'
13490
     program counter
13491
 
13492
`mach'
13493
`macl'
13494
     high and low multiply accumulator registers
13495
 
13496
`sr'
13497
     status register
13498
 
13499
`gbr'
13500
     global base register
13501
 
13502
`vbr'
13503
     vector base register (for interrupt vectors)
13504
 
13505

13506
File: as.info,  Node: SH-Addressing,  Prev: SH-Regs,  Up: SH Syntax
13507
 
13508
9.28.2.3 Addressing Modes
13509
.........................
13510
 
13511
`as' understands the following addressing modes for the SH.  `RN' in
13512
the following refers to any of the numbered registers, but _not_ the
13513
control registers.
13514
 
13515
`RN'
13516
     Register direct
13517
 
13518
`@RN'
13519
     Register indirect
13520
 
13521
`@-RN'
13522
     Register indirect with pre-decrement
13523
 
13524
`@RN+'
13525
     Register indirect with post-increment
13526
 
13527
`@(DISP, RN)'
13528
     Register indirect with displacement
13529
 
13530
`@(R0, RN)'
13531
     Register indexed
13532
 
13533
`@(DISP, GBR)'
13534
     `GBR' offset
13535
 
13536
`@(R0, GBR)'
13537
     GBR indexed
13538
 
13539
`ADDR'
13540
`@(DISP, PC)'
13541
     PC relative address (for branch or for addressing memory).  The
13542
     `as' implementation allows you to use the simpler form ADDR
13543
     anywhere a PC relative address is called for; the alternate form
13544
     is supported for compatibility with other assemblers.
13545
 
13546
`#IMM'
13547
     Immediate data
13548
 
13549

13550
File: as.info,  Node: SH Floating Point,  Next: SH Directives,  Prev: SH Syntax,  Up: SH-Dependent
13551
 
13552
9.28.3 Floating Point
13553
---------------------
13554
 
13555
SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
13556
SH groups can use `.float' directive to generate IEEE floating-point
13557
numbers.
13558
 
13559
   SH2E and SH3E support single-precision floating point calculations as
13560
well as entirely PCAPI compatible emulation of double-precision
13561
floating point calculations. SH2E and SH3E instructions are a subset of
13562
the floating point calculations conforming to the IEEE754 standard.
13563
 
13564
   In addition to single-precision and double-precision floating-point
13565
operation capability, the on-chip FPU of SH4 has a 128-bit graphic
13566
engine that enables 32-bit floating-point data to be processed 128 bits
13567
at a time. It also supports 4 * 4 array operations and inner product
13568
operations. Also, a superscalar architecture is employed that enables
13569
simultaneous execution of two instructions (including FPU
13570
instructions), providing performance of up to twice that of
13571
conventional architectures at the same frequency.
13572
 
13573

13574
File: as.info,  Node: SH Directives,  Next: SH Opcodes,  Prev: SH Floating Point,  Up: SH-Dependent
13575
 
13576
9.28.4 SH Machine Directives
13577
----------------------------
13578
 
13579
`uaword'
13580
`ualong'
13581
     `as' will issue a warning when a misaligned `.word' or `.long'
13582
     directive is used.  You may use `.uaword' or `.ualong' to indicate
13583
     that the value is intentionally misaligned.
13584
 
13585

13586
File: as.info,  Node: SH Opcodes,  Prev: SH Directives,  Up: SH-Dependent
13587
 
13588
9.28.5 Opcodes
13589
--------------
13590
 
13591
For detailed information on the SH machine instruction set, see
13592
`SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core
13593
Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH).
13594
 
13595
   `as' implements all the standard SH opcodes.  No additional
13596
pseudo-instructions are needed on this family.  Note, however, that
13597
because `as' supports a simpler form of PC-relative addressing, you may
13598
simply write (for example)
13599
 
13600
     mov.l  bar,r0
13601
 
13602
where other assemblers might require an explicit displacement to `bar'
13603
from the program counter:
13604
 
13605
     mov.l  @(DISP, PC)
13606
 
13607
   Here is a summary of SH opcodes:
13608
 
13609
     Legend:
13610
     Rn        a numbered register
13611
     Rm        another numbered register
13612
     #imm      immediate data
13613
     disp      displacement
13614
     disp8     8-bit displacement
13615
     disp12    12-bit displacement
13616
 
13617
     add #imm,Rn                    lds.l @Rn+,PR
13618
     add Rm,Rn                      mac.w @Rm+,@Rn+
13619
     addc Rm,Rn                     mov #imm,Rn
13620
     addv Rm,Rn                     mov Rm,Rn
13621
     and #imm,R0                    mov.b Rm,@(R0,Rn)
13622
     and Rm,Rn                      mov.b Rm,@-Rn
13623
     and.b #imm,@(R0,GBR)           mov.b Rm,@Rn
13624
     bf disp8                       mov.b @(disp,Rm),R0
13625
     bra disp12                     mov.b @(disp,GBR),R0
13626
     bsr disp12                     mov.b @(R0,Rm),Rn
13627
     bt disp8                       mov.b @Rm+,Rn
13628
     clrmac                         mov.b @Rm,Rn
13629
     clrt                           mov.b R0,@(disp,Rm)
13630
     cmp/eq #imm,R0                 mov.b R0,@(disp,GBR)
13631
     cmp/eq Rm,Rn                   mov.l Rm,@(disp,Rn)
13632
     cmp/ge Rm,Rn                   mov.l Rm,@(R0,Rn)
13633
     cmp/gt Rm,Rn                   mov.l Rm,@-Rn
13634
     cmp/hi Rm,Rn                   mov.l Rm,@Rn
13635
     cmp/hs Rm,Rn                   mov.l @(disp,Rn),Rm
13636
     cmp/pl Rn                      mov.l @(disp,GBR),R0
13637
     cmp/pz Rn                      mov.l @(disp,PC),Rn
13638
     cmp/str Rm,Rn                  mov.l @(R0,Rm),Rn
13639
     div0s Rm,Rn                    mov.l @Rm+,Rn
13640
     div0u                          mov.l @Rm,Rn
13641
     div1 Rm,Rn                     mov.l R0,@(disp,GBR)
13642
     exts.b Rm,Rn                   mov.w Rm,@(R0,Rn)
13643
     exts.w Rm,Rn                   mov.w Rm,@-Rn
13644
     extu.b Rm,Rn                   mov.w Rm,@Rn
13645
     extu.w Rm,Rn                   mov.w @(disp,Rm),R0
13646
     jmp @Rn                        mov.w @(disp,GBR),R0
13647
     jsr @Rn                        mov.w @(disp,PC),Rn
13648
     ldc Rn,GBR                     mov.w @(R0,Rm),Rn
13649
     ldc Rn,SR                      mov.w @Rm+,Rn
13650
     ldc Rn,VBR                     mov.w @Rm,Rn
13651
     ldc.l @Rn+,GBR                 mov.w R0,@(disp,Rm)
13652
     ldc.l @Rn+,SR                  mov.w R0,@(disp,GBR)
13653
     ldc.l @Rn+,VBR                 mova @(disp,PC),R0
13654
     lds Rn,MACH                    movt Rn
13655
     lds Rn,MACL                    muls Rm,Rn
13656
     lds Rn,PR                      mulu Rm,Rn
13657
     lds.l @Rn+,MACH                neg Rm,Rn
13658
     lds.l @Rn+,MACL                negc Rm,Rn
13659
 
13660
     nop                            stc VBR,Rn
13661
     not Rm,Rn                      stc.l GBR,@-Rn
13662
     or #imm,R0                     stc.l SR,@-Rn
13663
     or Rm,Rn                       stc.l VBR,@-Rn
13664
     or.b #imm,@(R0,GBR)            sts MACH,Rn
13665
     rotcl Rn                       sts MACL,Rn
13666
     rotcr Rn                       sts PR,Rn
13667
     rotl Rn                        sts.l MACH,@-Rn
13668
     rotr Rn                        sts.l MACL,@-Rn
13669
     rte                            sts.l PR,@-Rn
13670
     rts                            sub Rm,Rn
13671
     sett                           subc Rm,Rn
13672
     shal Rn                        subv Rm,Rn
13673
     shar Rn                        swap.b Rm,Rn
13674
     shll Rn                        swap.w Rm,Rn
13675
     shll16 Rn                      tas.b @Rn
13676
     shll2 Rn                       trapa #imm
13677
     shll8 Rn                       tst #imm,R0
13678
     shlr Rn                        tst Rm,Rn
13679
     shlr16 Rn                      tst.b #imm,@(R0,GBR)
13680
     shlr2 Rn                       xor #imm,R0
13681
     shlr8 Rn                       xor Rm,Rn
13682
     sleep                          xor.b #imm,@(R0,GBR)
13683
     stc GBR,Rn                     xtrct Rm,Rn
13684
     stc SR,Rn
13685
 
13686

13687
File: as.info,  Node: SH64-Dependent,  Next: PDP-11-Dependent,  Prev: SH-Dependent,  Up: Machine Dependencies
13688
 
13689
9.29 SuperH SH64 Dependent Features
13690
===================================
13691
 
13692
* Menu:
13693
 
13694
* SH64 Options::              Options
13695
* SH64 Syntax::               Syntax
13696
* SH64 Directives::           SH64 Machine Directives
13697
* SH64 Opcodes::              Opcodes
13698
 
13699

13700
File: as.info,  Node: SH64 Options,  Next: SH64 Syntax,  Up: SH64-Dependent
13701
 
13702
9.29.1 Options
13703
--------------
13704
 
13705
`-isa=sh4 | sh4a'
13706
     Specify the sh4 or sh4a instruction set.
13707
 
13708
`-isa=dsp'
13709
     Enable sh-dsp insns, and disable sh3e / sh4 insns.
13710
 
13711
`-isa=fp'
13712
     Enable sh2e, sh3e, sh4, and sh4a insn sets.
13713
 
13714
`-isa=all'
13715
     Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
13716
 
13717
`-isa=shmedia | -isa=shcompact'
13718
     Specify the default instruction set.  `SHmedia' specifies the
13719
     32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes
13720
     compatible with previous SH families.  The default depends on the
13721
     ABI selected; the default for the 64-bit ABI is SHmedia, and the
13722
     default for the 32-bit ABI is SHcompact.  If neither the ABI nor
13723
     the ISA is specified, the default is 32-bit SHcompact.
13724
 
13725
     Note that the `.mode' pseudo-op is not permitted if the ISA is not
13726
     specified on the command line.
13727
 
13728
`-abi=32 | -abi=64'
13729
     Specify the default ABI.  If the ISA is specified and the ABI is
13730
     not, the default ABI depends on the ISA, with SHmedia defaulting
13731
     to 64-bit and SHcompact defaulting to 32-bit.
13732
 
13733
     Note that the `.abi' pseudo-op is not permitted if the ABI is not
13734
     specified on the command line.  When the ABI is specified on the
13735
     command line, any `.abi' pseudo-ops in the source must match it.
13736
 
13737
`-shcompact-const-crange'
13738
     Emit code-range descriptors for constants in SHcompact code
13739
     sections.
13740
 
13741
`-no-mix'
13742
     Disallow SHmedia code in the same section as constants and
13743
     SHcompact code.
13744
 
13745
`-no-expand'
13746
     Do not expand MOVI, PT, PTA or PTB instructions.
13747
 
13748
`-expand-pt32'
13749
     With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
13750
 
13751
`-h-tick-hex'
13752
     Support H'00 style hex constants in addition to 0x00 style.
13753
 
13754
 
13755

13756
File: as.info,  Node: SH64 Syntax,  Next: SH64 Directives,  Prev: SH64 Options,  Up: SH64-Dependent
13757
 
13758
9.29.2 Syntax
13759
-------------
13760
 
13761
* Menu:
13762
 
13763
* SH64-Chars::                Special Characters
13764
* SH64-Regs::                 Register Names
13765
* SH64-Addressing::           Addressing Modes
13766
 
13767

13768
File: as.info,  Node: SH64-Chars,  Next: SH64-Regs,  Up: SH64 Syntax
13769
 
13770
9.29.2.1 Special Characters
13771
...........................
13772
 
13773
`!' is the line comment character.
13774
 
13775
   You can use `;' instead of a newline to separate statements.
13776
 
13777
   Since `$' has no special meaning, you may use it in symbol names.
13778
 
13779

13780
File: as.info,  Node: SH64-Regs,  Next: SH64-Addressing,  Prev: SH64-Chars,  Up: SH64 Syntax
13781
 
13782
9.29.2.2 Register Names
13783
.......................
13784
 
13785
You can use the predefined symbols `r0' through `r63' to refer to the
13786
SH64 general registers, `cr0' through `cr63' for control registers,
13787
`tr0' through `tr7' for target address registers, `fr0' through `fr63'
13788
for single-precision floating point registers, `dr0' through `dr62'
13789
(even numbered registers only) for double-precision floating point
13790
registers, `fv0' through `fv60' (multiples of four only) for
13791
single-precision floating point vectors, `fp0' through `fp62' (even
13792
numbered registers only) for single-precision floating point pairs,
13793
`mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of
13794
single-precision floating point registers, `pc' for the program
13795
counter, and `fpscr' for the floating point status and control register.
13796
 
13797
   You can also refer to the control registers by the mnemonics `sr',
13798
`ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc',
13799
`resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.
13800
 
13801

13802
File: as.info,  Node: SH64-Addressing,  Prev: SH64-Regs,  Up: SH64 Syntax
13803
 
13804
9.29.2.3 Addressing Modes
13805
.........................
13806
 
13807
SH64 operands consist of either a register or immediate value.  The
13808
immediate value can be a constant or label reference (or portion of a
13809
label reference), as in this example:
13810
 
13811
        movi    4,r2
13812
        pt      function, tr4
13813
        movi    (function >> 16) & 65535,r0
13814
        shori   function & 65535, r0
13815
        ld.l    r0,4,r0
13816
 
13817
   Instruction label references can reference labels in either SHmedia
13818
or SHcompact.  To differentiate between the two, labels in SHmedia
13819
sections will always have the least significant bit set (i.e. they will
13820
be odd), which SHcompact labels will have the least significant bit
13821
reset (i.e. they will be even).  If you need to reference the actual
13822
address of a label, you can use the `datalabel' modifier, as in this
13823
example:
13824
 
13825
        .long   function
13826
        .long   datalabel function
13827
 
13828
   In that example, the first longword may or may not have the least
13829
significant bit set depending on whether the label is an SHmedia label
13830
or an SHcompact label.  The second longword will be the actual address
13831
of the label, regardless of what type of label it is.
13832
 
13833

13834
File: as.info,  Node: SH64 Directives,  Next: SH64 Opcodes,  Prev: SH64 Syntax,  Up: SH64-Dependent
13835
 
13836
9.29.3 SH64 Machine Directives
13837
------------------------------
13838
 
13839
In addition to the SH directives, the SH64 provides the following
13840
directives:
13841
 
13842
`.mode [shmedia|shcompact]'
13843
`.isa [shmedia|shcompact]'
13844
     Specify the ISA for the following instructions (the two directives
13845
     are equivalent).  Note that programs such as `objdump' rely on
13846
     symbolic labels to determine when such mode switches occur (by
13847
     checking the least significant bit of the label's address), so
13848
     such mode/isa changes should always be followed by a label (in
13849
     practice, this is true anyway).  Note that you cannot use these
13850
     directives if you didn't specify an ISA on the command line.
13851
 
13852
`.abi [32|64]'
13853
     Specify the ABI for the following instructions.  Note that you
13854
     cannot use this directive unless you specified an ABI on the
13855
     command line, and the ABIs specified must match.
13856
 
13857
`.uaquad'
13858
     Like .uaword and .ualong, this allows you to specify an
13859
     intentionally unaligned quadword (64 bit word).
13860
 
13861
 
13862

13863
File: as.info,  Node: SH64 Opcodes,  Prev: SH64 Directives,  Up: SH64-Dependent
13864
 
13865
9.29.4 Opcodes
13866
--------------
13867
 
13868
For detailed information on the SH64 machine instruction set, see
13869
`SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
13870
 
13871
   `as' implements all the standard SH64 opcodes.  In addition, the
13872
following pseudo-opcodes may be expanded into one or more alternate
13873
opcodes:
13874
 
13875
`movi'
13876
     If the value doesn't fit into a standard `movi' opcode, `as' will
13877
     replace the `movi' with a sequence of `movi' and `shori' opcodes.
13878
 
13879
`pt'
13880
     This expands to a sequence of `movi' and `shori' opcode, followed
13881
     by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on
13882
     the label referenced.
13883
 
13884
 
13885

13886
File: as.info,  Node: Sparc-Dependent,  Next: TIC54X-Dependent,  Prev: PPC-Dependent,  Up: Machine Dependencies
13887
 
13888
9.30 SPARC Dependent Features
13889
=============================
13890
 
13891
* Menu:
13892
 
13893
* Sparc-Opts::                  Options
13894
* Sparc-Aligned-Data::          Option to enforce aligned data
13895
* Sparc-Syntax::                Syntax
13896
* Sparc-Float::                 Floating Point
13897
* Sparc-Directives::            Sparc Machine Directives
13898
 
13899

13900
File: as.info,  Node: Sparc-Opts,  Next: Sparc-Aligned-Data,  Up: Sparc-Dependent
13901
 
13902
9.30.1 Options
13903
--------------
13904
 
13905
The SPARC chip family includes several successive versions, using the
13906
same core instruction set, but including a few additional instructions
13907
at each version.  There are exceptions to this however.  For details on
13908
what instructions each variant supports, please see the chip's
13909
architecture reference manual.
13910
 
13911
   By default, `as' assumes the core instruction set (SPARC v6), but
13912
"bumps" the architecture level as needed: it switches to successively
13913
higher architectures as it encounters instructions that only exist in
13914
the higher levels.
13915
 
13916
   If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump
13917
past sparclite by default, an option must be passed to enable the v9
13918
instructions.
13919
 
13920
   GAS treats sparclite as being compatible with v8, unless an
13921
architecture is explicitly requested.  SPARC v9 is always incompatible
13922
with sparclite.
13923
 
13924
`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
13925
`-Av8plus | -Av8plusa | -Av9 | -Av9a'
13926
     Use one of the `-A' options to select one of the SPARC
13927
     architectures explicitly.  If you select an architecture
13928
     explicitly, `as' reports a fatal error if it encounters an
13929
     instruction or feature requiring an incompatible or higher level.
13930
 
13931
     `-Av8plus' and `-Av8plusa' select a 32 bit environment.
13932
 
13933
     `-Av9' and `-Av9a' select a 64 bit environment and are not
13934
     available unless GAS is explicitly configured with 64 bit
13935
     environment support.
13936
 
13937
     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
13938
     UltraSPARC extensions.
13939
 
13940
`-xarch=v8plus | -xarch=v8plusa'
13941
     For compatibility with the SunOS v9 assembler.  These options are
13942
     equivalent to -Av8plus and -Av8plusa, respectively.
13943
 
13944
`-bump'
13945
     Warn whenever it is necessary to switch to another level.  If an
13946
     architecture level is explicitly requested, GAS will not issue
13947
     warnings until that level is reached, and will then bump the level
13948
     as required (except between incompatible levels).
13949
 
13950
`-32 | -64'
13951
     Select the word size, either 32 bits or 64 bits.  These options
13952
     are only available with the ELF object file format, and require
13953
     that the necessary BFD support has been included.
13954
 
13955

13956
File: as.info,  Node: Sparc-Aligned-Data,  Next: Sparc-Syntax,  Prev: Sparc-Opts,  Up: Sparc-Dependent
13957
 
13958
9.30.2 Enforcing aligned data
13959
-----------------------------
13960
 
13961
SPARC GAS normally permits data to be misaligned.  For example, it
13962
permits the `.long' pseudo-op to be used on a byte boundary.  However,
13963
the native SunOS assemblers issue an error when they see misaligned
13964
data.
13965
 
13966
   You can use the `--enforce-aligned-data' option to make SPARC GAS
13967
also issue an error about misaligned data, just as the SunOS assemblers
13968
do.
13969
 
13970
   The `--enforce-aligned-data' option is not the default because gcc
13971
issues misaligned data pseudo-ops when it initializes certain packed
13972
data structures (structures defined using the `packed' attribute).  You
13973
may have to assemble with GAS in order to initialize packed data
13974
structures in your own code.
13975
 
13976

13977
File: as.info,  Node: Sparc-Syntax,  Next: Sparc-Float,  Prev: Sparc-Aligned-Data,  Up: Sparc-Dependent
13978
 
13979
9.30.3 Sparc Syntax
13980
-------------------
13981
 
13982
The assembler syntax closely follows The Sparc Architecture Manual,
13983
versions 8 and 9, as well as most extensions defined by Sun for their
13984
UltraSPARC and Niagara line of processors.
13985
 
13986
* Menu:
13987
 
13988
* Sparc-Chars::                Special Characters
13989
* Sparc-Regs::                 Register Names
13990
* Sparc-Constants::            Constant Names
13991
* Sparc-Relocs::               Relocations
13992
* Sparc-Size-Translations::    Size Translations
13993
 
13994

13995
File: as.info,  Node: Sparc-Chars,  Next: Sparc-Regs,  Up: Sparc-Syntax
13996
 
13997
9.30.3.1 Special Characters
13998
...........................
13999
 
14000
`#' is the line comment character.
14001
 
14002
   `;' can be used instead of a newline to separate statements.
14003
 
14004

14005
File: as.info,  Node: Sparc-Regs,  Next: Sparc-Constants,  Prev: Sparc-Chars,  Up: Sparc-Syntax
14006
 
14007
9.30.3.2 Register Names
14008
.......................
14009
 
14010
The Sparc integer register file is broken down into global, outgoing,
14011
local, and incoming.
14012
 
14013
   * The 8 global registers are referred to as `%gN'.
14014
 
14015
   * The 8 outgoing registers are referred to as `%oN'.
14016
 
14017
   * The 8 local registers are referred to as `%lN'.
14018
 
14019
   * The 8 incoming registers are referred to as `%iN'.
14020
 
14021
   * The frame pointer register `%i6' can be referenced using the alias
14022
     `%fp'.
14023
 
14024
   * The stack pointer register `%o6' can be referenced using the alias
14025
     `%sp'.
14026
 
14027
   Floating point registers are simply referred to as `%fN'.  When
14028
assembling for pre-V9, only 32 floating point registers are available.
14029
For V9 and later there are 64, but there are restrictions when
14030
referencing the upper 32 registers.  They can only be accessed as
14031
double or quad, and thus only even or quad numbered accesses are
14032
allowed.  For example, `%f34' is a legal floating point register, but
14033
`%f35' is not.
14034
 
14035
   Certain V9 instructions allow access to ancillary state registers.
14036
Most simply they can be referred to as `%asrN' where N can be from 16
14037
to 31.  However, there are some aliases defined to reference ASR
14038
registers defined for various UltraSPARC processors:
14039
 
14040
   * The tick compare register is referred to as `%tick_cmpr'.
14041
 
14042
   * The system tick register is referred to as `%stick'.  An alias,
14043
     `%sys_tick', exists but is deprecated and should not be used by
14044
     new software.
14045
 
14046
   * The system tick compare register is referred to as `%stick_cmpr'.
14047
     An alias, `%sys_tick_cmpr', exists but is deprecated and should
14048
     not be used by new software.
14049
 
14050
   * The software interrupt register is referred to as `%softint'.
14051
 
14052
   * The set software interrupt register is referred to as
14053
     `%set_softint'.  The mnemonic `%softint_set' is provided as an
14054
     alias.
14055
 
14056
   * The clear software interrupt register is referred to as
14057
     `%clear_softint'.  The mnemonic `%softint_clear' is provided as an
14058
     alias.
14059
 
14060
   * The performance instrumentation counters register is referred to as
14061
     `%pic'.
14062
 
14063
   * The performance control register is referred to as `%pcr'.
14064
 
14065
   * The graphics status register is referred to as `%gsr'.
14066
 
14067
   * The V9 dispatch control register is referred to as `%dcr'.
14068
 
14069
   Various V9 branch and conditional move instructions allow
14070
specification of which set of integer condition codes to test.  These
14071
are referred to as `%xcc' and `%icc'.
14072
 
14073
   In V9, there are 4 sets of floating point condition codes which are
14074
referred to as `%fccN'.
14075
 
14076
   Several special privileged and non-privileged registers exist:
14077
 
14078
   * The V9 address space identifier register is referred to as `%asi'.
14079
 
14080
   * The V9 restorable windows register is referred to as `%canrestore'.
14081
 
14082
   * The V9 savable windows register is referred to as `%cansave'.
14083
 
14084
   * The V9 clean windows register is referred to as `%cleanwin'.
14085
 
14086
   * The V9 current window pointer register is referred to as `%cwp'.
14087
 
14088
   * The floating-point queue register is referred to as `%fq'.
14089
 
14090
   * The V8 co-processor queue register is referred to as `%cq'.
14091
 
14092
   * The floating point status register is referred to as `%fsr'.
14093
 
14094
   * The other windows register is referred to as `%otherwin'.
14095
 
14096
   * The V9 program counter register is referred to as `%pc'.
14097
 
14098
   * The V9 next program counter register is referred to as `%npc'.
14099
 
14100
   * The V9 processor interrupt level register is referred to as `%pil'.
14101
 
14102
   * The V9 processor state register is referred to as `%pstate'.
14103
 
14104
   * The trap base address register is referred to as `%tba'.
14105
 
14106
   * The V9 tick register is referred to as `%tick'.
14107
 
14108
   * The V9 trap level is referred to as `%tl'.
14109
 
14110
   * The V9 trap program counter is referred to as `%tpc'.
14111
 
14112
   * The V9 trap next program counter is referred to as `%tnpc'.
14113
 
14114
   * The V9 trap state is referred to as `%tstate'.
14115
 
14116
   * The V9 trap type is referred to as `%tt'.
14117
 
14118
   * The V9 condition codes is referred to as `%ccr'.
14119
 
14120
   * The V9 floating-point registers state is referred to as `%fprs'.
14121
 
14122
   * The V9 version register is referred to as `%ver'.
14123
 
14124
   * The V9 window state register is referred to as `%wstate'.
14125
 
14126
   * The Y register is referred to as `%y'.
14127
 
14128
   * The V8 window invalid mask register is referred to as `%wim'.
14129
 
14130
   * The V8 processor state register is referred to as `%psr'.
14131
 
14132
   * The V9 global register level register is referred to as `%gl'.
14133
 
14134
   Several special register names exist for hypervisor mode code:
14135
 
14136
   * The hyperprivileged processor state register is referred to as
14137
     `%hpstate'.
14138
 
14139
   * The hyperprivileged trap state register is referred to as
14140
     `%htstate'.
14141
 
14142
   * The hyperprivileged interrupt pending register is referred to as
14143
     `%hintp'.
14144
 
14145
   * The hyperprivileged trap base address register is referred to as
14146
     `%htba'.
14147
 
14148
   * The hyperprivileged implementation version register is referred to
14149
     as `%hver'.
14150
 
14151
   * The hyperprivileged system tick compare register is referred to as
14152
     `%hstick_cmpr'.  Note that there is no `%hstick' register, the
14153
     normal `%stick' is used.
14154
 
14155

14156
File: as.info,  Node: Sparc-Constants,  Next: Sparc-Relocs,  Prev: Sparc-Regs,  Up: Sparc-Syntax
14157
 
14158
9.30.3.3 Constants
14159
..................
14160
 
14161
Several Sparc instructions take an immediate operand field for which
14162
mnemonic names exist.  Two such examples are `membar' and `prefetch'.
14163
Another example are the set of V9 memory access instruction that allow
14164
specification of an address space identifier.
14165
 
14166
   The `membar' instruction specifies a memory barrier that is the
14167
defined by the operand which is a bitmask.  The supported mask
14168
mnemonics are:
14169
 
14170
   * `#Sync' requests that all operations (including nonmemory
14171
     reference operations) appearing prior to the `membar' must have
14172
     been performed and the effects of any exceptions become visible
14173
     before any instructions after the `membar' may be initiated.  This
14174
     corresponds to `membar' cmask field bit 2.
14175
 
14176
   * `#MemIssue' requests that all memory reference operations
14177
     appearing prior to the `membar' must have been performed before
14178
     any memory operation after the `membar' may be initiated.  This
14179
     corresponds to `membar' cmask field bit 1.
14180
 
14181
   * `#Lookaside' requests that a store appearing prior to the `membar'
14182
     must complete before any load following the `membar' referencing
14183
     the same address can be initiated.  This corresponds to `membar'
14184
     cmask field bit 0.
14185
 
14186
   * `#StoreStore' defines that the effects of all stores appearing
14187
     prior to the `membar' instruction must be visible to all
14188
     processors before the effect of any stores following the `membar'.
14189
     Equivalent to the deprecated `stbar' instruction.  This
14190
     corresponds to `membar' mmask field bit 3.
14191
 
14192
   * `#LoadStore' defines all loads appearing prior to the `membar'
14193
     instruction must have been performed before the effect of any
14194
     stores following the `membar' is visible to any other processor.
14195
     This corresponds to `membar' mmask field bit 2.
14196
 
14197
   * `#StoreLoad' defines that the effects of all stores appearing
14198
     prior to the `membar' instruction must be visible to all
14199
     processors before loads following the `membar' may be performed.
14200
     This corresponds to `membar' mmask field bit 1.
14201
 
14202
   * `#LoadLoad' defines that all loads appearing prior to the `membar'
14203
     instruction must have been performed before any loads following
14204
     the `membar' may be performed.  This corresponds to `membar' mmask
14205
     field bit 0.
14206
 
14207
 
14208
   These values can be ored together, for example:
14209
 
14210
     membar #Sync
14211
     membar #StoreLoad | #LoadLoad
14212
     membar #StoreLoad | #StoreStore
14213
 
14214
   The `prefetch' and `prefetcha' instructions take a prefetch function
14215
code.  The following prefetch function code constant mnemonics are
14216
available:
14217
 
14218
   * `#n_reads' requests a prefetch for several reads, and corresponds
14219
     to a prefetch function code of 0.
14220
 
14221
     `#one_read' requests a prefetch for one read, and corresponds to a
14222
     prefetch function code of 1.
14223
 
14224
     `#n_writes' requests a prefetch for several writes (and possibly
14225
     reads), and corresponds to a prefetch function code of 2.
14226
 
14227
     `#one_write' requests a prefetch for one write, and corresponds to
14228
     a prefetch function code of 3.
14229
 
14230
     `#page' requests a prefetch page, and corresponds to a prefetch
14231
     function code of 4.
14232
 
14233
     `#invalidate' requests a prefetch invalidate, and corresponds to a
14234
     prefetch function code of 16.
14235
 
14236
     `#unified' requests a prefetch to the nearest unified cache, and
14237
     corresponds to a prefetch function code of 17.
14238
 
14239
     `#n_reads_strong' requests a strong prefetch for several reads,
14240
     and corresponds to a prefetch function code of 20.
14241
 
14242
     `#one_read_strong' requests a strong prefetch for one read, and
14243
     corresponds to a prefetch function code of 21.
14244
 
14245
     `#n_writes_strong' requests a strong prefetch for several writes,
14246
     and corresponds to a prefetch function code of 22.
14247
 
14248
     `#one_write_strong' requests a strong prefetch for one write, and
14249
     corresponds to a prefetch function code of 23.
14250
 
14251
     Onle one prefetch code may be specified.  Here are some examples:
14252
 
14253
          prefetch  [%l0 + %l2], #one_read
14254
          prefetch  [%g2 + 8], #n_writes
14255
          prefetcha [%g1] 0x8, #unified
14256
          prefetcha [%o0 + 0x10] %asi, #n_reads
14257
 
14258
     The actual behavior of a given prefetch function code is processor
14259
     specific.  If a processor does not implement a given prefetch
14260
     function code, it will treat the prefetch instruction as a nop.
14261
 
14262
     For instructions that accept an immediate address space identifier,
14263
     `as' provides many mnemonics corresponding to V9 defined as well
14264
     as UltraSPARC and Niagara extended values.  For example, `#ASI_P'
14265
     and `#ASI_BLK_INIT_QUAD_LDD_AIUS'.  See the V9 and processor
14266
     specific manuals for details.
14267
 
14268
 
14269

14270
File: as.info,  Node: Sparc-Relocs,  Next: Sparc-Size-Translations,  Prev: Sparc-Constants,  Up: Sparc-Syntax
14271
 
14272
9.30.3.4 Relocations
14273
....................
14274
 
14275
ELF relocations are available as defined in the 32-bit and 64-bit Sparc
14276
ELF specifications.
14277
 
14278
   `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is
14279
obtained using `%lo'.  Likewise `R_SPARC_HIX22' is obtained from `%hix'
14280
and `R_SPARC_LOX10' is obtained using `%lox'.  For example:
14281
 
14282
     sethi %hi(symbol), %g1
14283
     or    %g1, %lo(symbol), %g1
14284
 
14285
     sethi %hix(symbol), %g1
14286
     xor   %g1, %lox(symbol), %g1
14287
 
14288
   These "high" mnemonics extract bits 31:10 of their operand, and the
14289
"low" mnemonics extract bits 9:0 of their operand.
14290
 
14291
   V9 code model relocations can be requested as follows:
14292
 
14293
   * `R_SPARC_HH22' is requested using `%hh'.  It can also be generated
14294
     using `%uhi'.
14295
 
14296
   * `R_SPARC_HM10' is requested using `%hm'.  It can also be generated
14297
     using `%ulo'.
14298
 
14299
   * `R_SPARC_LM22' is requested using `%lm'.
14300
 
14301
   * `R_SPARC_H44' is requested using `%h44'.
14302
 
14303
   * `R_SPARC_M44' is requested using `%m44'.
14304
 
14305
   * `R_SPARC_L44' is requested using `%l44'.
14306
 
14307
   The PC relative relocation `R_SPARC_PC22' can be obtained by
14308
enclosing an operand inside of `%pc22'.  Likewise, the `R_SPARC_PC10'
14309
relocation can be obtained using `%pc10'.  These are mostly used when
14310
assembling PIC code.  For example, the standard PIC sequence on Sparc
14311
to get the base of the global offset table, PC relative, into a
14312
register, can be performed as:
14313
 
14314
     sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7
14315
     add   %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7
14316
 
14317
   Several relocations exist to allow the link editor to potentially
14318
optimize GOT data references.  The `R_SPARC_GOTDATA_OP_HIX22'
14319
relocation can obtained by enclosing an operand inside of
14320
`%gdop_hix22'.  The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained
14321
by enclosing an operand inside of `%gdop_lox10'.  Likewise,
14322
`R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of
14323
`%gdop'.  For example, assuming the GOT base is in register `%l7':
14324
 
14325
     sethi %gdop_hix22(symbol), %l1
14326
     xor   %l1, %gdop_lox10(symbol), %l1
14327
     ld    [%l7 + %l1], %l2, %gdop(symbol)
14328
 
14329
   There are many relocations that can be requested for access to
14330
thread local storage variables.  All of the Sparc TLS mnemonics are
14331
supported:
14332
 
14333
   * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'.
14334
 
14335
   * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'.
14336
 
14337
   * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'.
14338
 
14339
   * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'.
14340
 
14341
   * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'.
14342
 
14343
   * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'.
14344
 
14345
   * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'.
14346
 
14347
   * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'.
14348
 
14349
   * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'.
14350
 
14351
   * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'.
14352
 
14353
   * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'.
14354
 
14355
   * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'.
14356
 
14357
   * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'.
14358
 
14359
   * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'.
14360
 
14361
   * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'.
14362
 
14363
   * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'.
14364
 
14365
   * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'.
14366
 
14367
   * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'.
14368
 
14369
   Here are some example TLS model sequences.
14370
 
14371
   First, General Dynamic:
14372
 
14373
     sethi  %tgd_hi22(symbol), %l1
14374
     add    %l1, %tgd_lo10(symbol), %l1
14375
     add    %l7, %l1, %o0, %tgd_add(symbol)
14376
     call   __tls_get_addr, %tgd_call(symbol)
14377
     nop
14378
 
14379
   Local Dynamic:
14380
 
14381
     sethi  %tldm_hi22(symbol), %l1
14382
     add    %l1, %tldm_lo10(symbol), %l1
14383
     add    %l7, %l1, %o0, %tldm_add(symbol)
14384
     call   __tls_get_addr, %tldm_call(symbol)
14385
     nop
14386
 
14387
     sethi  %tldo_hix22(symbol), %l1
14388
     xor    %l1, %tldo_lox10(symbol), %l1
14389
     add    %o0, %l1, %l1, %tldo_add(symbol)
14390
 
14391
   Initial Exec:
14392
 
14393
     sethi  %tie_hi22(symbol), %l1
14394
     add    %l1, %tie_lo10(symbol), %l1
14395
     ld     [%l7 + %l1], %o0, %tie_ld(symbol)
14396
     add    %g7, %o0, %o0, %tie_add(symbol)
14397
 
14398
     sethi  %tie_hi22(symbol), %l1
14399
     add    %l1, %tie_lo10(symbol), %l1
14400
     ldx    [%l7 + %l1], %o0, %tie_ldx(symbol)
14401
     add    %g7, %o0, %o0, %tie_add(symbol)
14402
 
14403
   And finally, Local Exec:
14404
 
14405
     sethi  %tle_hix22(symbol), %l1
14406
     add    %l1, %tle_lox10(symbol), %l1
14407
     add    %g7, %l1, %l1
14408
 
14409
   When assembling for 64-bit, and a secondary constant addend is
14410
specified in an address expression that would normally generate an
14411
`R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10'
14412
instead.
14413
 
14414

14415
File: as.info,  Node: Sparc-Size-Translations,  Prev: Sparc-Relocs,  Up: Sparc-Syntax
14416
 
14417
9.30.3.5 Size Translations
14418
..........................
14419
 
14420
Often it is desirable to write code in an operand size agnostic manner.
14421
`as' provides support for this via operand size opcode translations.
14422
Translations are supported for loads, stores, shifts, compare-and-swap
14423
atomics, and the `clr' synthetic instruction.
14424
 
14425
   If generating 32-bit code, `as' will generate the 32-bit opcode.
14426
Whereas if 64-bit code is being generated, the 64-bit opcode will be
14427
emitted.  For example `ldn' will be transformed into `ld' for 32-bit
14428
code and `ldx' for 64-bit code.
14429
 
14430
   Here is an example meant to demonstrate all the supported opcode
14431
translations:
14432
 
14433
     ldn   [%o0], %o1
14434
     ldna  [%o0] %asi, %o2
14435
     stn   %o1, [%o0]
14436
     stna  %o2, [%o0] %asi
14437
     slln  %o3, 3, %o3
14438
     srln  %o4, 8, %o4
14439
     sran  %o5, 12, %o5
14440
     casn  [%o0], %o1, %o2
14441
     casna [%o0] %asi, %o1, %o2
14442
     clrn  %g1
14443
 
14444
   In 32-bit mode `as' will emit:
14445
 
14446
     ld   [%o0], %o1
14447
     lda  [%o0] %asi, %o2
14448
     st   %o1, [%o0]
14449
     sta  %o2, [%o0] %asi
14450
     sll  %o3, 3, %o3
14451
     srl  %o4, 8, %o4
14452
     sra  %o5, 12, %o5
14453
     cas  [%o0], %o1, %o2
14454
     casa [%o0] %asi, %o1, %o2
14455
     clr  %g1
14456
 
14457
   And in 64-bit mode `as' will emit:
14458
 
14459
     ldx   [%o0], %o1
14460
     ldxa  [%o0] %asi, %o2
14461
     stx   %o1, [%o0]
14462
     stxa  %o2, [%o0] %asi
14463
     sllx  %o3, 3, %o3
14464
     srlx  %o4, 8, %o4
14465
     srax  %o5, 12, %o5
14466
     casx  [%o0], %o1, %o2
14467
     casxa [%o0] %asi, %o1, %o2
14468
     clrx  %g1
14469
 
14470
   Finally, the `.nword' translating directive is supported as well.
14471
It is documented in the section on Sparc machine directives.
14472
 
14473

14474
File: as.info,  Node: Sparc-Float,  Next: Sparc-Directives,  Prev: Sparc-Syntax,  Up: Sparc-Dependent
14475
 
14476
9.30.4 Floating Point
14477
---------------------
14478
 
14479
The Sparc uses IEEE floating-point numbers.
14480
 
14481

14482
File: as.info,  Node: Sparc-Directives,  Prev: Sparc-Float,  Up: Sparc-Dependent
14483
 
14484
9.30.5 Sparc Machine Directives
14485
-------------------------------
14486
 
14487
The Sparc version of `as' supports the following additional machine
14488
directives:
14489
 
14490
`.align'
14491
     This must be followed by the desired alignment in bytes.
14492
 
14493
`.common'
14494
     This must be followed by a symbol name, a positive number, and
14495
     `"bss"'.  This behaves somewhat like `.comm', but the syntax is
14496
     different.
14497
 
14498
`.half'
14499
     This is functionally identical to `.short'.
14500
 
14501
`.nword'
14502
     On the Sparc, the `.nword' directive produces native word sized
14503
     value, ie. if assembling with -32 it is equivalent to `.word', if
14504
     assembling with -64 it is equivalent to `.xword'.
14505
 
14506
`.proc'
14507
     This directive is ignored.  Any text following it on the same line
14508
     is also ignored.
14509
 
14510
`.register'
14511
     This directive declares use of a global application or system
14512
     register.  It must be followed by a register name %g2, %g3, %g6 or
14513
     %g7, comma and the symbol name for that register.  If symbol name
14514
     is `#scratch', it is a scratch register, if it is `#ignore', it
14515
     just suppresses any errors about using undeclared global register,
14516
     but does not emit any information about it into the object file.
14517
     This can be useful e.g. if you save the register before use and
14518
     restore it after.
14519
 
14520
`.reserve'
14521
     This must be followed by a symbol name, a positive number, and
14522
     `"bss"'.  This behaves somewhat like `.lcomm', but the syntax is
14523
     different.
14524
 
14525
`.seg'
14526
     This must be followed by `"text"', `"data"', or `"data1"'.  It
14527
     behaves like `.text', `.data', or `.data 1'.
14528
 
14529
`.skip'
14530
     This is functionally identical to the `.space' directive.
14531
 
14532
`.word'
14533
     On the Sparc, the `.word' directive produces 32 bit values,
14534
     instead of the 16 bit values it produces on many other machines.
14535
 
14536
`.xword'
14537
     On the Sparc V9 processor, the `.xword' directive produces 64 bit
14538
     values.
14539
 
14540

14541
File: as.info,  Node: TIC54X-Dependent,  Next: V850-Dependent,  Prev: Sparc-Dependent,  Up: Machine Dependencies
14542
 
14543
9.31 TIC54X Dependent Features
14544
==============================
14545
 
14546
* Menu:
14547
 
14548
* TIC54X-Opts::              Command-line Options
14549
* TIC54X-Block::             Blocking
14550
* TIC54X-Env::               Environment Settings
14551
* TIC54X-Constants::         Constants Syntax
14552
* TIC54X-Subsyms::           String Substitution
14553
* TIC54X-Locals::            Local Label Syntax
14554
* TIC54X-Builtins::          Builtin Assembler Math Functions
14555
* TIC54X-Ext::               Extended Addressing Support
14556
* TIC54X-Directives::        Directives
14557
* TIC54X-Macros::            Macro Features
14558
* TIC54X-MMRegs::            Memory-mapped Registers
14559
 
14560

14561
File: as.info,  Node: TIC54X-Opts,  Next: TIC54X-Block,  Up: TIC54X-Dependent
14562
 
14563
9.31.1 Options
14564
--------------
14565
 
14566
The TMS320C54X version of `as' has a few machine-dependent options.
14567
 
14568
   You can use the `-mfar-mode' option to enable extended addressing
14569
mode.  All addresses will be assumed to be > 16 bits, and the
14570
appropriate relocation types will be used.  This option is equivalent
14571
to using the `.far_mode' directive in the assembly code.  If you do not
14572
use the `-mfar-mode' option, all references will be assumed to be 16
14573
bits.  This option may be abbreviated to `-mf'.
14574
 
14575
   You can use the `-mcpu' option to specify a particular CPU.  This
14576
option is equivalent to using the `.version' directive in the assembly
14577
code.  For recognized CPU codes, see *Note `.version':
14578
TIC54X-Directives.  The default CPU version is `542'.
14579
 
14580
   You can use the `-merrors-to-file' option to redirect error output
14581
to a file (this provided for those deficient environments which don't
14582
provide adequate output redirection).  This option may be abbreviated to
14583
`-me'.
14584
 
14585

14586
File: as.info,  Node: TIC54X-Block,  Next: TIC54X-Env,  Prev: TIC54X-Opts,  Up: TIC54X-Dependent
14587
 
14588
9.31.2 Blocking
14589
---------------
14590
 
14591
A blocked section or memory block is guaranteed not to cross the
14592
blocking boundary (usually a page, or 128 words) if it is smaller than
14593
the blocking size, or to start on a page boundary if it is larger than
14594
the blocking size.
14595
 
14596

14597
File: as.info,  Node: TIC54X-Env,  Next: TIC54X-Constants,  Prev: TIC54X-Block,  Up: TIC54X-Dependent
14598
 
14599
9.31.3 Environment Settings
14600
---------------------------
14601
 
14602
`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added
14603
to the list of directories normally searched for source and include
14604
files.  `C54XDSP_DIR' will override `A_DIR'.
14605
 
14606

14607
File: as.info,  Node: TIC54X-Constants,  Next: TIC54X-Subsyms,  Prev: TIC54X-Env,  Up: TIC54X-Dependent
14608
 
14609
9.31.4 Constants Syntax
14610
-----------------------
14611
 
14612
The TIC54X version of `as' allows the following additional constant
14613
formats, using a suffix to indicate the radix:
14614
 
14615
     Binary                  `000000B, 011000b'
14616
     Octal                   `10Q, 224q'
14617
     Hexadecimal             `45h, 0FH'
14618
 
14619

14620
File: as.info,  Node: TIC54X-Subsyms,  Next: TIC54X-Locals,  Prev: TIC54X-Constants,  Up: TIC54X-Dependent
14621
 
14622
9.31.5 String Substitution
14623
--------------------------
14624
 
14625
A subset of allowable symbols (which we'll call subsyms) may be assigned
14626
arbitrary string values.  This is roughly equivalent to C preprocessor
14627
#define macros.  When `as' encounters one of these symbols, the symbol
14628
is replaced in the input stream by its string value.  Subsym names
14629
*must* begin with a letter.
14630
 
14631
   Subsyms may be defined using the `.asg' and `.eval' directives
14632
(*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives.
14633
 
14634
   Expansion is recursive until a previously encountered symbol is
14635
seen, at which point substitution stops.
14636
 
14637
   In this example, x is replaced with SYM2; SYM2 is replaced with
14638
SYM1, and SYM1 is replaced with x.  At this point, x has already been
14639
encountered and the substitution stops.
14640
 
14641
      .asg   "x",SYM1
14642
      .asg   "SYM1",SYM2
14643
      .asg   "SYM2",x
14644
      add    x,a             ; final code assembled is "add  x, a"
14645
 
14646
   Macro parameters are converted to subsyms; a side effect of this is
14647
the normal `as' '\ARG' dereferencing syntax is unnecessary.  Subsyms
14648
defined within a macro will have global scope, unless the `.var'
14649
directive is used to identify the subsym as a local macro variable
14650
*note `.var': TIC54X-Directives.
14651
 
14652
   Substitution may be forced in situations where replacement might be
14653
ambiguous by placing colons on either side of the subsym.  The following
14654
code:
14655
 
14656
      .eval  "10",x
14657
     LAB:X:  add     #x, a
14658
 
14659
   When assembled becomes:
14660
 
14661
     LAB10  add     #10, a
14662
 
14663
   Smaller parts of the string assigned to a subsym may be accessed with
14664
the following syntax:
14665
 
14666
``:SYMBOL(CHAR_INDEX):''
14667
     Evaluates to a single-character string, the character at
14668
     CHAR_INDEX.
14669
 
14670
``:SYMBOL(START,LENGTH):''
14671
     Evaluates to a substring of SYMBOL beginning at START with length
14672
     LENGTH.
14673
 
14674

14675
File: as.info,  Node: TIC54X-Locals,  Next: TIC54X-Builtins,  Prev: TIC54X-Subsyms,  Up: TIC54X-Dependent
14676
 
14677
9.31.6 Local Labels
14678
-------------------
14679
 
14680
Local labels may be defined in two ways:
14681
 
14682
   * $N, where N is a decimal number between 0 and 9
14683
 
14684
   * LABEL?, where LABEL is any legal symbol name.
14685
 
14686
   Local labels thus defined may be redefined or automatically
14687
generated.  The scope of a local label is based on when it may be
14688
undefined or reset.  This happens when one of the following situations
14689
is encountered:
14690
 
14691
   * .newblock directive *note `.newblock': TIC54X-Directives.
14692
 
14693
   * The current section is changed (.sect, .text, or .data)
14694
 
14695
   * Entering or leaving an included file
14696
 
14697
   * The macro scope where the label was defined is exited
14698
 
14699

14700
File: as.info,  Node: TIC54X-Builtins,  Next: TIC54X-Ext,  Prev: TIC54X-Locals,  Up: TIC54X-Dependent
14701
 
14702
9.31.7 Math Builtins
14703
--------------------
14704
 
14705
The following built-in functions may be used to generate a
14706
floating-point value.  All return a floating-point value except `$cvi',
14707
`$int', and `$sgn', which return an integer value.
14708
 
14709
``$acos(EXPR)''
14710
     Returns the floating point arccosine of EXPR.
14711
 
14712
``$asin(EXPR)''
14713
     Returns the floating point arcsine of EXPR.
14714
 
14715
``$atan(EXPR)''
14716
     Returns the floating point arctangent of EXPR.
14717
 
14718
``$atan2(EXPR1,EXPR2)''
14719
     Returns the floating point arctangent of EXPR1 / EXPR2.
14720
 
14721
``$ceil(EXPR)''
14722
     Returns the smallest integer not less than EXPR as floating point.
14723
 
14724
``$cosh(EXPR)''
14725
     Returns the floating point hyperbolic cosine of EXPR.
14726
 
14727
``$cos(EXPR)''
14728
     Returns the floating point cosine of EXPR.
14729
 
14730
``$cvf(EXPR)''
14731
     Returns the integer value EXPR converted to floating-point.
14732
 
14733
``$cvi(EXPR)''
14734
     Returns the floating point value EXPR converted to integer.
14735
 
14736
``$exp(EXPR)''
14737
     Returns the floating point value e ^ EXPR.
14738
 
14739
``$fabs(EXPR)''
14740
     Returns the floating point absolute value of EXPR.
14741
 
14742
``$floor(EXPR)''
14743
     Returns the largest integer that is not greater than EXPR as
14744
     floating point.
14745
 
14746
``$fmod(EXPR1,EXPR2)''
14747
     Returns the floating point remainder of EXPR1 / EXPR2.
14748
 
14749
``$int(EXPR)''
14750
     Returns 1 if EXPR evaluates to an integer, zero otherwise.
14751
 
14752
``$ldexp(EXPR1,EXPR2)''
14753
     Returns the floating point value EXPR1 * 2 ^ EXPR2.
14754
 
14755
``$log10(EXPR)''
14756
     Returns the base 10 logarithm of EXPR.
14757
 
14758
``$log(EXPR)''
14759
     Returns the natural logarithm of EXPR.
14760
 
14761
``$max(EXPR1,EXPR2)''
14762
     Returns the floating point maximum of EXPR1 and EXPR2.
14763
 
14764
``$min(EXPR1,EXPR2)''
14765
     Returns the floating point minimum of EXPR1 and EXPR2.
14766
 
14767
``$pow(EXPR1,EXPR2)''
14768
     Returns the floating point value EXPR1 ^ EXPR2.
14769
 
14770
``$round(EXPR)''
14771
     Returns the nearest integer to EXPR as a floating point number.
14772
 
14773
``$sgn(EXPR)''
14774
     Returns -1, 0, or 1 based on the sign of EXPR.
14775
 
14776
``$sin(EXPR)''
14777
     Returns the floating point sine of EXPR.
14778
 
14779
``$sinh(EXPR)''
14780
     Returns the floating point hyperbolic sine of EXPR.
14781
 
14782
``$sqrt(EXPR)''
14783
     Returns the floating point square root of EXPR.
14784
 
14785
``$tan(EXPR)''
14786
     Returns the floating point tangent of EXPR.
14787
 
14788
``$tanh(EXPR)''
14789
     Returns the floating point hyperbolic tangent of EXPR.
14790
 
14791
``$trunc(EXPR)''
14792
     Returns the integer value of EXPR truncated towards zero as
14793
     floating point.
14794
 
14795
 
14796

14797
File: as.info,  Node: TIC54X-Ext,  Next: TIC54X-Directives,  Prev: TIC54X-Builtins,  Up: TIC54X-Dependent
14798
 
14799
9.31.8 Extended Addressing
14800
--------------------------
14801
 
14802
The `LDX' pseudo-op is provided for loading the extended addressing bits
14803
of a label or address.  For example, if an address `_label' resides in
14804
extended program memory, the value of `_label' may be loaded as follows:
14805
      ldx     #_label,16,a    ; loads extended bits of _label
14806
      or      #_label,a       ; loads lower 16 bits of _label
14807
      bacc    a               ; full address is in accumulator A
14808
 
14809

14810
File: as.info,  Node: TIC54X-Directives,  Next: TIC54X-Macros,  Prev: TIC54X-Ext,  Up: TIC54X-Dependent
14811
 
14812
9.31.9 Directives
14813
-----------------
14814
 
14815
`.align [SIZE]'
14816
`.even'
14817
     Align the section program counter on the next boundary, based on
14818
     SIZE.  SIZE may be any power of 2.  `.even' is equivalent to
14819
     `.align' with a SIZE of 2.
14820
    `1'
14821
          Align SPC to word boundary
14822
 
14823
    `2'
14824
          Align SPC to longword boundary (same as .even)
14825
 
14826
    `128'
14827
          Align SPC to page boundary
14828
 
14829
`.asg STRING, NAME'
14830
     Assign NAME the string STRING.  String replacement is performed on
14831
     STRING before assignment.
14832
 
14833
`.eval STRING, NAME'
14834
     Evaluate the contents of string STRING and assign the result as a
14835
     string to the subsym NAME.  String replacement is performed on
14836
     STRING before assignment.
14837
 
14838
`.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
14839
     Reserve space for SYMBOL in the .bss section.  SIZE is in words.
14840
     If present, BLOCKING_FLAG indicates the allocated space should be
14841
     aligned on a page boundary if it would otherwise cross a page
14842
     boundary.  If present, ALIGNMENT_FLAG causes the assembler to
14843
     allocate SIZE on a long word boundary.
14844
 
14845
`.byte VALUE [,...,VALUE_N]'
14846
`.ubyte VALUE [,...,VALUE_N]'
14847
`.char VALUE [,...,VALUE_N]'
14848
`.uchar VALUE [,...,VALUE_N]'
14849
     Place one or more bytes into consecutive words of the current
14850
     section.  The upper 8 bits of each word is zero-filled.  If a
14851
     label is used, it points to the word allocated for the first byte
14852
     encountered.
14853
 
14854
`.clink ["SECTION_NAME"]'
14855
     Set STYP_CLINK flag for this section, which indicates to the
14856
     linker that if no symbols from this section are referenced, the
14857
     section should not be included in the link.  If SECTION_NAME is
14858
     omitted, the current section is used.
14859
 
14860
`.c_mode'
14861
     TBD.
14862
 
14863
`.copy "FILENAME" | FILENAME'
14864
`.include "FILENAME" | FILENAME'
14865
     Read source statements from FILENAME.  The normal include search
14866
     path is used.  Normally .copy will cause statements from the
14867
     included file to be printed in the assembly listing and .include
14868
     will not, but this distinction is not currently implemented.
14869
 
14870
`.data'
14871
     Begin assembling code into the .data section.
14872
 
14873
`.double VALUE [,...,VALUE_N]'
14874
`.ldouble VALUE [,...,VALUE_N]'
14875
`.float VALUE [,...,VALUE_N]'
14876
`.xfloat VALUE [,...,VALUE_N]'
14877
     Place an IEEE single-precision floating-point representation of
14878
     one or more floating-point values into the current section.  All
14879
     but `.xfloat' align the result on a longword boundary.  Values are
14880
     stored most-significant word first.
14881
 
14882
`.drlist'
14883
`.drnolist'
14884
     Control printing of directives to the listing file.  Ignored.
14885
 
14886
`.emsg STRING'
14887
`.mmsg STRING'
14888
`.wmsg STRING'
14889
     Emit a user-defined error, message, or warning, respectively.
14890
 
14891
`.far_mode'
14892
     Use extended addressing when assembling statements.  This should
14893
     appear only once per file, and is equivalent to the -mfar-mode
14894
     option *note `-mfar-mode': TIC54X-Opts.
14895
 
14896
`.fclist'
14897
`.fcnolist'
14898
     Control printing of false conditional blocks to the listing file.
14899
 
14900
`.field VALUE [,SIZE]'
14901
     Initialize a bitfield of SIZE bits in the current section.  If
14902
     VALUE is relocatable, then SIZE must be 16.  SIZE defaults to 16
14903
     bits.  If VALUE does not fit into SIZE bits, the value will be
14904
     truncated.  Successive `.field' directives will pack starting at
14905
     the current word, filling the most significant bits first, and
14906
     aligning to the start of the next word if the field size does not
14907
     fit into the space remaining in the current word.  A `.align'
14908
     directive with an operand of 1 will force the next `.field'
14909
     directive to begin packing into a new word.  If a label is used, it
14910
     points to the word that contains the specified field.
14911
 
14912
`.global SYMBOL [,...,SYMBOL_N]'
14913
`.def SYMBOL [,...,SYMBOL_N]'
14914
`.ref SYMBOL [,...,SYMBOL_N]'
14915
     `.def' nominally identifies a symbol defined in the current file
14916
     and available to other files.  `.ref' identifies a symbol used in
14917
     the current file but defined elsewhere.  Both map to the standard
14918
     `.global' directive.
14919
 
14920
`.half VALUE [,...,VALUE_N]'
14921
`.uhalf VALUE [,...,VALUE_N]'
14922
`.short VALUE [,...,VALUE_N]'
14923
`.ushort VALUE [,...,VALUE_N]'
14924
`.int VALUE [,...,VALUE_N]'
14925
`.uint VALUE [,...,VALUE_N]'
14926
`.word VALUE [,...,VALUE_N]'
14927
`.uword VALUE [,...,VALUE_N]'
14928
     Place one or more values into consecutive words of the current
14929
     section.  If a label is used, it points to the word allocated for
14930
     the first value encountered.
14931
 
14932
`.label SYMBOL'
14933
     Define a special SYMBOL to refer to the load time address of the
14934
     current section program counter.
14935
 
14936
`.length'
14937
`.width'
14938
     Set the page length and width of the output listing file.  Ignored.
14939
 
14940
`.list'
14941
`.nolist'
14942
     Control whether the source listing is printed.  Ignored.
14943
 
14944
`.long VALUE [,...,VALUE_N]'
14945
`.ulong VALUE [,...,VALUE_N]'
14946
`.xlong VALUE [,...,VALUE_N]'
14947
     Place one or more 32-bit values into consecutive words in the
14948
     current section.  The most significant word is stored first.
14949
     `.long' and `.ulong' align the result on a longword boundary;
14950
     `xlong' does not.
14951
 
14952
`.loop [COUNT]'
14953
`.break [CONDITION]'
14954
`.endloop'
14955
     Repeatedly assemble a block of code.  `.loop' begins the block, and
14956
     `.endloop' marks its termination.  COUNT defaults to 1024, and
14957
     indicates the number of times the block should be repeated.
14958
     `.break' terminates the loop so that assembly begins after the
14959
     `.endloop' directive.  The optional CONDITION will cause the loop
14960
     to terminate only if it evaluates to zero.
14961
 
14962
`MACRO_NAME .macro [PARAM1][,...PARAM_N]'
14963
`[.mexit]'
14964
`.endm'
14965
     See the section on macros for more explanation (*Note
14966
     TIC54X-Macros::.
14967
 
14968
`.mlib "FILENAME" | FILENAME'
14969
     Load the macro library FILENAME.  FILENAME must be an archived
14970
     library (BFD ar-compatible) of text files, expected to contain
14971
     only macro definitions.   The standard include search path is used.
14972
 
14973
`.mlist'
14974
 
14975
`.mnolist'
14976
     Control whether to include macro and loop block expansions in the
14977
     listing output.  Ignored.
14978
 
14979
`.mmregs'
14980
     Define global symbolic names for the 'c54x registers.  Supposedly
14981
     equivalent to executing `.set' directives for each register with
14982
     its memory-mapped value, but in reality is provided only for
14983
     compatibility and does nothing.
14984
 
14985
`.newblock'
14986
     This directive resets any TIC54X local labels currently defined.
14987
     Normal `as' local labels are unaffected.
14988
 
14989
`.option OPTION_LIST'
14990
     Set listing options.  Ignored.
14991
 
14992
`.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]'
14993
     Designate SECTION_NAME for blocking.  Blocking guarantees that a
14994
     section will start on a page boundary (128 words) if it would
14995
     otherwise cross a page boundary.  Only initialized sections may be
14996
     designated with this directive.  See also *Note TIC54X-Block::.
14997
 
14998
`.sect "SECTION_NAME"'
14999
     Define a named initialized section and make it the current section.
15000
 
15001
`SYMBOL .set "VALUE"'
15002
`SYMBOL .equ "VALUE"'
15003
     Equate a constant VALUE to a SYMBOL, which is placed in the symbol
15004
     table.  SYMBOL may not be previously defined.
15005
 
15006
`.space SIZE_IN_BITS'
15007
`.bes SIZE_IN_BITS'
15008
     Reserve the given number of bits in the current section and
15009
     zero-fill them.  If a label is used with `.space', it points to the
15010
     *first* word reserved.  With `.bes', the label points to the
15011
     *last* word reserved.
15012
 
15013
`.sslist'
15014
`.ssnolist'
15015
     Controls the inclusion of subsym replacement in the listing
15016
     output.  Ignored.
15017
 
15018
`.string "STRING" [,...,"STRING_N"]'
15019
`.pstring "STRING" [,...,"STRING_N"]'
15020
     Place 8-bit characters from STRING into the current section.
15021
     `.string' zero-fills the upper 8 bits of each word, while
15022
     `.pstring' puts two characters into each word, filling the
15023
     most-significant bits first.  Unused space is zero-filled.  If a
15024
     label is used, it points to the first word initialized.
15025
 
15026
`[STAG] .struct [OFFSET]'
15027
`[NAME_1] element [COUNT_1]'
15028
`[NAME_2] element [COUNT_2]'
15029
`[TNAME] .tag STAGX [TCOUNT]'
15030
`...'
15031
`[NAME_N] element [COUNT_N]'
15032
`[SSIZE] .endstruct'
15033
`LABEL .tag [STAG]'
15034
     Assign symbolic offsets to the elements of a structure.  STAG
15035
     defines a symbol to use to reference the structure.  OFFSET
15036
     indicates a starting value to use for the first element
15037
     encountered; otherwise it defaults to zero.  Each element can have
15038
     a named offset, NAME, which is a symbol assigned the value of the
15039
     element's offset into the structure.  If STAG is missing, these
15040
     become global symbols.  COUNT adjusts the offset that many times,
15041
     as if `element' were an array.  `element' may be one of `.byte',
15042
     `.word', `.long', `.float', or any equivalent of those, and the
15043
     structure offset is adjusted accordingly.  `.field' and `.string'
15044
     are also allowed; the size of `.field' is one bit, and `.string'
15045
     is considered to be one word in size.  Only element descriptors,
15046
     structure/union tags, `.align' and conditional assembly directives
15047
     are allowed within `.struct'/`.endstruct'.  `.align' aligns member
15048
     offsets to word boundaries only.  SSIZE, if provided, will always
15049
     be assigned the size of the structure.
15050
 
15051
     The `.tag' directive, in addition to being used to define a
15052
     structure/union element within a structure, may be used to apply a
15053
     structure to a symbol.  Once applied to LABEL, the individual
15054
     structure elements may be applied to LABEL to produce the desired
15055
     offsets using LABEL as the structure base.
15056
 
15057
`.tab'
15058
     Set the tab size in the output listing.  Ignored.
15059
 
15060
`[UTAG] .union'
15061
`[NAME_1] element [COUNT_1]'
15062
`[NAME_2] element [COUNT_2]'
15063
`[TNAME] .tag UTAGX[,TCOUNT]'
15064
`...'
15065
`[NAME_N] element [COUNT_N]'
15066
`[USIZE] .endstruct'
15067
`LABEL .tag [UTAG]'
15068
     Similar to `.struct', but the offset after each element is reset to
15069
     zero, and the USIZE is set to the maximum of all defined elements.
15070
     Starting offset for the union is always zero.
15071
 
15072
`[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
15073
     Reserve space for variables in a named, uninitialized section
15074
     (similar to .bss).  `.usect' allows definitions sections
15075
     independent of .bss.  SYMBOL points to the first location reserved
15076
     by this allocation.  The symbol may be used as a variable name.
15077
     SIZE is the allocated size in words.  BLOCKING_FLAG indicates
15078
     whether to block this section on a page boundary (128 words)
15079
     (*note TIC54X-Block::).  ALIGNMENT FLAG indicates whether the
15080
     section should be longword-aligned.
15081
 
15082
`.var SYM[,..., SYM_N]'
15083
     Define a subsym to be a local variable within a macro.  See *Note
15084
     TIC54X-Macros::.
15085
 
15086
`.version VERSION'
15087
     Set which processor to build instructions for.  Though the
15088
     following values are accepted, the op is ignored.
15089
    `541'
15090
    `542'
15091
    `543'
15092
    `545'
15093
    `545LP'
15094
    `546LP'
15095
    `548'
15096
    `549'
15097
 
15098

15099
File: as.info,  Node: TIC54X-Macros,  Next: TIC54X-MMRegs,  Prev: TIC54X-Directives,  Up: TIC54X-Dependent
15100
 
15101
9.31.10 Macros
15102
--------------
15103
 
15104
Macros do not require explicit dereferencing of arguments (i.e., \ARG).
15105
 
15106
   During macro expansion, the macro parameters are converted to
15107
subsyms.  If the number of arguments passed the macro invocation
15108
exceeds the number of parameters defined, the last parameter is
15109
assigned the string equivalent of all remaining arguments.  If fewer
15110
arguments are given than parameters, the missing parameters are
15111
assigned empty strings.  To include a comma in an argument, you must
15112
enclose the argument in quotes.
15113
 
15114
   The following built-in subsym functions allow examination of the
15115
string value of subsyms (or ordinary strings).  The arguments are
15116
strings unless otherwise indicated (subsyms passed as args will be
15117
replaced by the strings they represent).
15118
``$symlen(STR)''
15119
     Returns the length of STR.
15120
 
15121
``$symcmp(STR1,STR2)''
15122
     Returns 0 if STR1 == STR2, non-zero otherwise.
15123
 
15124
``$firstch(STR,CH)''
15125
     Returns index of the first occurrence of character constant CH in
15126
     STR.
15127
 
15128
``$lastch(STR,CH)''
15129
     Returns index of the last occurrence of character constant CH in
15130
     STR.
15131
 
15132
``$isdefed(SYMBOL)''
15133
     Returns zero if the symbol SYMBOL is not in the symbol table,
15134
     non-zero otherwise.
15135
 
15136
``$ismember(SYMBOL,LIST)''
15137
     Assign the first member of comma-separated string LIST to SYMBOL;
15138
     LIST is reassigned the remainder of the list.  Returns zero if
15139
     LIST is a null string.  Both arguments must be subsyms.
15140
 
15141
``$iscons(EXPR)''
15142
     Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal,
15143
     4 if a character, 5 if decimal, and zero if not an integer.
15144
 
15145
``$isname(NAME)''
15146
     Returns 1 if NAME is a valid symbol name, zero otherwise.
15147
 
15148
``$isreg(REG)''
15149
     Returns 1 if REG is a valid predefined register name (AR0-AR7
15150
     only).
15151
 
15152
``$structsz(STAG)''
15153
     Returns the size of the structure or union represented by STAG.
15154
 
15155
``$structacc(STAG)''
15156
     Returns the reference point of the structure or union represented
15157
     by STAG.   Always returns zero.
15158
 
15159
 
15160

15161
File: as.info,  Node: TIC54X-MMRegs,  Prev: TIC54X-Macros,  Up: TIC54X-Dependent
15162
 
15163
9.31.11 Memory-mapped Registers
15164
-------------------------------
15165
 
15166
The following symbols are recognized as memory-mapped registers:
15167
 
15168
 
15169

15170
File: as.info,  Node: Z80-Dependent,  Next: Z8000-Dependent,  Prev: Xtensa-Dependent,  Up: Machine Dependencies
15171
 
15172
9.32 Z80 Dependent Features
15173
===========================
15174
 
15175
* Menu:
15176
 
15177
* Z80 Options::              Options
15178
* Z80 Syntax::               Syntax
15179
* Z80 Floating Point::       Floating Point
15180
* Z80 Directives::           Z80 Machine Directives
15181
* Z80 Opcodes::              Opcodes
15182
 
15183

15184
File: as.info,  Node: Z80 Options,  Next: Z80 Syntax,  Up: Z80-Dependent
15185
 
15186
9.32.1 Options
15187
--------------
15188
 
15189
The Zilog Z80 and Ascii R800 version of `as' have a few machine
15190
dependent options.
15191
`-z80'
15192
     Produce code for the Z80 processor. There are additional options to
15193
     request warnings and error messages for undocumented instructions.
15194
 
15195
`-ignore-undocumented-instructions'
15196
`-Wnud'
15197
     Silently assemble undocumented Z80-instructions that have been
15198
     adopted as documented R800-instructions.
15199
 
15200
`-ignore-unportable-instructions'
15201
`-Wnup'
15202
     Silently assemble all undocumented Z80-instructions.
15203
 
15204
`-warn-undocumented-instructions'
15205
`-Wud'
15206
     Issue warnings for undocumented Z80-instructions that work on
15207
     R800, do not assemble other undocumented instructions without
15208
     warning.
15209
 
15210
`-warn-unportable-instructions'
15211
`-Wup'
15212
     Issue warnings for other undocumented Z80-instructions, do not
15213
     treat any undocumented instructions as errors.
15214
 
15215
`-forbid-undocumented-instructions'
15216
`-Fud'
15217
     Treat all undocumented z80-instructions as errors.
15218
 
15219
`-forbid-unportable-instructions'
15220
`-Fup'
15221
     Treat undocumented z80-instructions that do not work on R800 as
15222
     errors.
15223
 
15224
`-r800'
15225
     Produce code for the R800 processor. The assembler does not support
15226
     undocumented instructions for the R800.  In line with common
15227
     practice, `as' uses Z80 instruction names for the R800 processor,
15228
     as far as they exist.
15229
 
15230

15231
File: as.info,  Node: Z80 Syntax,  Next: Z80 Floating Point,  Prev: Z80 Options,  Up: Z80-Dependent
15232
 
15233
9.32.2 Syntax
15234
-------------
15235
 
15236
The assembler syntax closely follows the 'Z80 family CPU User Manual' by
15237
Zilog.  In expressions a single `=' may be used as "is equal to"
15238
comparison operator.
15239
 
15240
   Suffices can be used to indicate the radix of integer constants; `H'
15241
or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o'
15242
for octal, and `B' for binary.
15243
 
15244
   The suffix `b' denotes a backreference to local label.
15245
 
15246
* Menu:
15247
 
15248
* Z80-Chars::                Special Characters
15249
* Z80-Regs::                 Register Names
15250
* Z80-Case::                 Case Sensitivity
15251
 
15252

15253
File: as.info,  Node: Z80-Chars,  Next: Z80-Regs,  Up: Z80 Syntax
15254
 
15255
9.32.2.1 Special Characters
15256
...........................
15257
 
15258
The semicolon `;' is the line comment character;
15259
 
15260
   The dollar sign `$' can be used as a prefix for hexadecimal numbers
15261
and as a symbol denoting the current location counter.
15262
 
15263
   A backslash `\' is an ordinary character for the Z80 assembler.
15264
 
15265
   The single quote `'' must be followed by a closing quote. If there
15266
is one character in between, it is a character constant, otherwise it is
15267
a string constant.
15268
 
15269

15270
File: as.info,  Node: Z80-Regs,  Next: Z80-Case,  Prev: Z80-Chars,  Up: Z80 Syntax
15271
 
15272
9.32.2.2 Register Names
15273
.......................
15274
 
15275
The registers are referred to with the letters assigned to them by
15276
Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and
15277
most significant octet in `ix', and similarly `iyl' and  `iyh' as parts
15278
of `iy'.
15279
 
15280

15281
File: as.info,  Node: Z80-Case,  Prev: Z80-Regs,  Up: Z80 Syntax
15282
 
15283
9.32.2.3 Case Sensitivity
15284
.........................
15285
 
15286
Upper and lower case are equivalent in register names, opcodes,
15287
condition codes  and assembler directives.  The case of letters is
15288
significant in labels and symbol names. The case is also important to
15289
distinguish the suffix `b' for a backward reference to a local label
15290
from the suffix `B' for a number in binary notation.
15291
 
15292

15293
File: as.info,  Node: Z80 Floating Point,  Next: Z80 Directives,  Prev: Z80 Syntax,  Up: Z80-Dependent
15294
 
15295
9.32.3 Floating Point
15296
---------------------
15297
 
15298
Floating-point numbers are not supported.
15299
 
15300

15301
File: as.info,  Node: Z80 Directives,  Next: Z80 Opcodes,  Prev: Z80 Floating Point,  Up: Z80-Dependent
15302
 
15303
9.32.4 Z80 Assembler Directives
15304
-------------------------------
15305
 
15306
`as' for the Z80 supports some additional directives for compatibility
15307
with other assemblers.
15308
 
15309
   These are the additional directives in `as' for the Z80:
15310
 
15311
`db EXPRESSION|STRING[,EXPRESSION|STRING...]'
15312
`defb EXPRESSION|STRING[,EXPRESSION|STRING...]'
15313
     For each STRING the characters are copied to the object file, for
15314
     each other EXPRESSION the value is stored in one byte.  A warning
15315
     is issued in case of an overflow.
15316
 
15317
`dw EXPRESSION[,EXPRESSION...]'
15318
`defw EXPRESSION[,EXPRESSION...]'
15319
     For each EXPRESSION the value is stored in two bytes, ignoring
15320
     overflow.
15321
 
15322
`d24 EXPRESSION[,EXPRESSION...]'
15323
`def24 EXPRESSION[,EXPRESSION...]'
15324
     For each EXPRESSION the value is stored in three bytes, ignoring
15325
     overflow.
15326
 
15327
`d32 EXPRESSION[,EXPRESSION...]'
15328
`def32 EXPRESSION[,EXPRESSION...]'
15329
     For each EXPRESSION the value is stored in four bytes, ignoring
15330
     overflow.
15331
 
15332
`ds COUNT[, VALUE]'
15333
`defs COUNT[, VALUE]'
15334
     Fill COUNT bytes in the object file with VALUE, if VALUE is
15335
     omitted it defaults to zero.
15336
 
15337
`SYMBOL equ EXPRESSION'
15338
`SYMBOL defl EXPRESSION'
15339
     These directives set the value of SYMBOL to EXPRESSION. If `equ'
15340
     is used, it is an error if SYMBOL is already defined.  Symbols
15341
     defined with `equ' are not protected from redefinition.
15342
 
15343
`set'
15344
     This is a normal instruction on Z80, and not an assembler
15345
     directive.
15346
 
15347
`psect NAME'
15348
     A synonym for *Note Section::, no second argument should be given.
15349
 
15350
 
15351

15352
File: as.info,  Node: Z80 Opcodes,  Prev: Z80 Directives,  Up: Z80-Dependent
15353
 
15354
9.32.5 Opcodes
15355
--------------
15356
 
15357
In line with common practice, Z80 mnemonics are used for both the Z80
15358
and the R800.
15359
 
15360
   In many instructions it is possible to use one of the half index
15361
registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general
15362
purpose register. This yields instructions that are documented on the
15363
R800 and undocumented on the Z80.  Similarly `in f,(c)' is documented
15364
on the R800 and undocumented on the Z80.
15365
 
15366
   The assembler also supports the following undocumented
15367
Z80-instructions, that have not been adopted in the R800 instruction
15368
set:
15369
`out (c),0'
15370
     Sends zero to the port pointed to by register c.
15371
 
15372
`sli M'
15373
     Equivalent to `M = (M<<1)+1', the operand M can be any operand
15374
     that is valid for `sla'. One can use `sll' as a synonym for `sli'.
15375
 
15376
`OP (ix+D), R'
15377
     This is equivalent to
15378
 
15379
          ld R, (ix+D)
15380
          OPC R
15381
          ld (ix+D), R
15382
 
15383
     The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc',
15384
     `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R'
15385
     may be any of `a', `b', `c', `d', `e', `h' and `l'.
15386
 
15387
`OPC (iy+D), R'
15388
     As above, but with `iy' instead of `ix'.
15389
 
15390
   The web site at `http://www.z80.info' is a good starting place to
15391
find more information on programming the Z80.
15392
 
15393

15394
File: as.info,  Node: Z8000-Dependent,  Next: Vax-Dependent,  Prev: Z80-Dependent,  Up: Machine Dependencies
15395
 
15396
9.33 Z8000 Dependent Features
15397
=============================
15398
 
15399
   The Z8000 as supports both members of the Z8000 family: the
15400
unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
15401
24 bit addresses.
15402
 
15403
   When the assembler is in unsegmented mode (specified with the
15404
`unsegm' directive), an address takes up one word (16 bit) sized
15405
register.  When the assembler is in segmented mode (specified with the
15406
`segm' directive), a 24-bit address takes up a long (32 bit) register.
15407
*Note Assembler Directives for the Z8000: Z8000 Directives, for a list
15408
of other Z8000 specific assembler directives.
15409
 
15410
* Menu:
15411
 
15412
* Z8000 Options::               Command-line options for the Z8000
15413
* Z8000 Syntax::                Assembler syntax for the Z8000
15414
* Z8000 Directives::            Special directives for the Z8000
15415
* Z8000 Opcodes::               Opcodes
15416
 
15417

15418
File: as.info,  Node: Z8000 Options,  Next: Z8000 Syntax,  Up: Z8000-Dependent
15419
 
15420
9.33.1 Options
15421
--------------
15422
 
15423
`-z8001'
15424
     Generate segmented code by default.
15425
 
15426
`-z8002'
15427
     Generate unsegmented code by default.
15428
 
15429

15430
File: as.info,  Node: Z8000 Syntax,  Next: Z8000 Directives,  Prev: Z8000 Options,  Up: Z8000-Dependent
15431
 
15432
9.33.2 Syntax
15433
-------------
15434
 
15435
* Menu:
15436
 
15437
* Z8000-Chars::                Special Characters
15438
* Z8000-Regs::                 Register Names
15439
* Z8000-Addressing::           Addressing Modes
15440
 
15441

15442
File: as.info,  Node: Z8000-Chars,  Next: Z8000-Regs,  Up: Z8000 Syntax
15443
 
15444
9.33.2.1 Special Characters
15445
...........................
15446
 
15447
`!' is the line comment character.
15448
 
15449
   You can use `;' instead of a newline to separate statements.
15450
 
15451

15452
File: as.info,  Node: Z8000-Regs,  Next: Z8000-Addressing,  Prev: Z8000-Chars,  Up: Z8000 Syntax
15453
 
15454
9.33.2.2 Register Names
15455
.......................
15456
 
15457
The Z8000 has sixteen 16 bit registers, numbered 0 to 15.  You can refer
15458
to different sized groups of registers by register number, with the
15459
prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for
15460
64 bit registers.  You can also refer to the contents of the first
15461
eight (of the sixteen 16 bit registers) by bytes.  They are named `rlN'
15462
and `rhN'.
15463
 
15464
_byte registers_
15465
     rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
15466
     rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
15467
 
15468
_word registers_
15469
     r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
15470
 
15471
_long word registers_
15472
     rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
15473
 
15474
_quad word registers_
15475
     rq0 rq4 rq8 rq12
15476
 
15477

15478
File: as.info,  Node: Z8000-Addressing,  Prev: Z8000-Regs,  Up: Z8000 Syntax
15479
 
15480
9.33.2.3 Addressing Modes
15481
.........................
15482
 
15483
as understands the following addressing modes for the Z8000:
15484
 
15485
`rlN'
15486
`rhN'
15487
`rN'
15488
`rrN'
15489
`rqN'
15490
     Register direct:  8bit, 16bit, 32bit, and 64bit registers.
15491
 
15492
`@rN'
15493
`@rrN'
15494
     Indirect register:  @rrN in segmented mode, @rN in unsegmented
15495
     mode.
15496
 
15497
`ADDR'
15498
     Direct: the 16 bit or 24 bit address (depending on whether the
15499
     assembler is in segmented or unsegmented mode) of the operand is
15500
     in the instruction.
15501
 
15502
`address(rN)'
15503
     Indexed: the 16 or 24 bit address is added to the 16 bit register
15504
     to produce the final address in memory of the operand.
15505
 
15506
`rN(#IMM)'
15507
`rrN(#IMM)'
15508
     Base Address: the 16 or 24 bit register is added to the 16 bit sign
15509
     extended immediate displacement to produce the final address in
15510
     memory of the operand.
15511
 
15512
`rN(rM)'
15513
`rrN(rM)'
15514
     Base Index: the 16 or 24 bit register rN or rrN is added to the
15515
     sign extended 16 bit index register rM to produce the final
15516
     address in memory of the operand.
15517
 
15518
`#XX'
15519
     Immediate data XX.
15520
 
15521

15522
File: as.info,  Node: Z8000 Directives,  Next: Z8000 Opcodes,  Prev: Z8000 Syntax,  Up: Z8000-Dependent
15523
 
15524
9.33.3 Assembler Directives for the Z8000
15525
-----------------------------------------
15526
 
15527
The Z8000 port of as includes additional assembler directives, for
15528
compatibility with other Z8000 assemblers.  These do not begin with `.'
15529
(unlike the ordinary as directives).
15530
 
15531
`segm'
15532
`.z8001'
15533
     Generate code for the segmented Z8001.
15534
 
15535
`unsegm'
15536
`.z8002'
15537
     Generate code for the unsegmented Z8002.
15538
 
15539
`name'
15540
     Synonym for `.file'
15541
 
15542
`global'
15543
     Synonym for `.global'
15544
 
15545
`wval'
15546
     Synonym for `.word'
15547
 
15548
`lval'
15549
     Synonym for `.long'
15550
 
15551
`bval'
15552
     Synonym for `.byte'
15553
 
15554
`sval'
15555
     Assemble a string.  `sval' expects one string literal, delimited by
15556
     single quotes.  It assembles each byte of the string into
15557
     consecutive addresses.  You can use the escape sequence `%XX'
15558
     (where XX represents a two-digit hexadecimal number) to represent
15559
     the character whose ASCII value is XX.  Use this feature to
15560
     describe single quote and other characters that may not appear in
15561
     string literals as themselves.  For example, the C statement
15562
     `char *a = "he said \"it's 50% off\"";' is represented in Z8000
15563
     assembly language (shown with the assembler output in hex at the
15564
     left) as
15565
 
15566
          68652073    sval    'he said %22it%27s 50%25 off%22%00'
15567
          61696420
15568
          22697427
15569
          73203530
15570
          25206F66
15571
          662200
15572
 
15573
`rsect'
15574
     synonym for `.section'
15575
 
15576
`block'
15577
     synonym for `.space'
15578
 
15579
`even'
15580
     special case of `.align'; aligns output to even byte boundary.
15581
 
15582

15583
File: as.info,  Node: Z8000 Opcodes,  Prev: Z8000 Directives,  Up: Z8000-Dependent
15584
 
15585
9.33.4 Opcodes
15586
--------------
15587
 
15588
For detailed information on the Z8000 machine instruction set, see
15589
`Z8000 Technical Manual'.
15590
 
15591
   The following table summarizes the opcodes and their arguments:
15592
 
15593
                 rs   16 bit source register
15594
                 rd   16 bit destination register
15595
                 rbs   8 bit source register
15596
                 rbd   8 bit destination register
15597
                 rrs   32 bit source register
15598
                 rrd   32 bit destination register
15599
                 rqs   64 bit source register
15600
                 rqd   64 bit destination register
15601
                 addr 16/24 bit address
15602
                 imm  immediate data
15603
 
15604
     adc rd,rs               clrb addr               cpsir @rd,@rs,rr,cc
15605
     adcb rbd,rbs            clrb addr(rd)           cpsirb @rd,@rs,rr,cc
15606
     add rd,@rs              clrb rbd                dab rbd
15607
     add rd,addr             com @rd                 dbjnz rbd,disp7
15608
     add rd,addr(rs)         com addr                dec @rd,imm4m1
15609
     add rd,imm16            com addr(rd)            dec addr(rd),imm4m1
15610
     add rd,rs               com rd                  dec addr,imm4m1
15611
     addb rbd,@rs            comb @rd                dec rd,imm4m1
15612
     addb rbd,addr           comb addr               decb @rd,imm4m1
15613
     addb rbd,addr(rs)       comb addr(rd)           decb addr(rd),imm4m1
15614
     addb rbd,imm8           comb rbd                decb addr,imm4m1
15615
     addb rbd,rbs            comflg flags            decb rbd,imm4m1
15616
     addl rrd,@rs            cp @rd,imm16            di i2
15617
     addl rrd,addr           cp addr(rd),imm16       div rrd,@rs
15618
     addl rrd,addr(rs)       cp addr,imm16           div rrd,addr
15619
     addl rrd,imm32          cp rd,@rs               div rrd,addr(rs)
15620
     addl rrd,rrs            cp rd,addr              div rrd,imm16
15621
     and rd,@rs              cp rd,addr(rs)          div rrd,rs
15622
     and rd,addr             cp rd,imm16             divl rqd,@rs
15623
     and rd,addr(rs)         cp rd,rs                divl rqd,addr
15624
     and rd,imm16            cpb @rd,imm8            divl rqd,addr(rs)
15625
     and rd,rs               cpb addr(rd),imm8       divl rqd,imm32
15626
     andb rbd,@rs            cpb addr,imm8           divl rqd,rrs
15627
     andb rbd,addr           cpb rbd,@rs             djnz rd,disp7
15628
     andb rbd,addr(rs)       cpb rbd,addr            ei i2
15629
     andb rbd,imm8           cpb rbd,addr(rs)        ex rd,@rs
15630
     andb rbd,rbs            cpb rbd,imm8            ex rd,addr
15631
     bit @rd,imm4            cpb rbd,rbs             ex rd,addr(rs)
15632
     bit addr(rd),imm4       cpd rd,@rs,rr,cc        ex rd,rs
15633
     bit addr,imm4           cpdb rbd,@rs,rr,cc      exb rbd,@rs
15634
     bit rd,imm4             cpdr rd,@rs,rr,cc       exb rbd,addr
15635
     bit rd,rs               cpdrb rbd,@rs,rr,cc     exb rbd,addr(rs)
15636
     bitb @rd,imm4           cpi rd,@rs,rr,cc        exb rbd,rbs
15637
     bitb addr(rd),imm4      cpib rbd,@rs,rr,cc      ext0e imm8
15638
     bitb addr,imm4          cpir rd,@rs,rr,cc       ext0f imm8
15639
     bitb rbd,imm4           cpirb rbd,@rs,rr,cc     ext8e imm8
15640
     bitb rbd,rs             cpl rrd,@rs             ext8f imm8
15641
     bpt                     cpl rrd,addr            exts rrd
15642
     call @rd                cpl rrd,addr(rs)        extsb rd
15643
     call addr               cpl rrd,imm32           extsl rqd
15644
     call addr(rd)           cpl rrd,rrs             halt
15645
     calr disp12             cpsd @rd,@rs,rr,cc      in rd,@rs
15646
     clr @rd                 cpsdb @rd,@rs,rr,cc     in rd,imm16
15647
     clr addr                cpsdr @rd,@rs,rr,cc     inb rbd,@rs
15648
     clr addr(rd)            cpsdrb @rd,@rs,rr,cc    inb rbd,imm16
15649
     clr rd                  cpsi @rd,@rs,rr,cc      inc @rd,imm4m1
15650
     clrb @rd                cpsib @rd,@rs,rr,cc     inc addr(rd),imm4m1
15651
     inc addr,imm4m1         ldb rbd,rs(rx)          mult rrd,addr(rs)
15652
     inc rd,imm4m1           ldb rd(imm16),rbs       mult rrd,imm16
15653
     incb @rd,imm4m1         ldb rd(rx),rbs          mult rrd,rs
15654
     incb addr(rd),imm4m1    ldctl ctrl,rs           multl rqd,@rs
15655
     incb addr,imm4m1        ldctl rd,ctrl           multl rqd,addr
15656
     incb rbd,imm4m1         ldd @rs,@rd,rr          multl rqd,addr(rs)
15657
     ind @rd,@rs,ra          lddb @rs,@rd,rr         multl rqd,imm32
15658
     indb @rd,@rs,rba        lddr @rs,@rd,rr         multl rqd,rrs
15659
     inib @rd,@rs,ra         lddrb @rs,@rd,rr        neg @rd
15660
     inibr @rd,@rs,ra        ldi @rd,@rs,rr          neg addr
15661
     iret                    ldib @rd,@rs,rr         neg addr(rd)
15662
     jp cc,@rd               ldir @rd,@rs,rr         neg rd
15663
     jp cc,addr              ldirb @rd,@rs,rr        negb @rd
15664
     jp cc,addr(rd)          ldk rd,imm4             negb addr
15665
     jr cc,disp8             ldl @rd,rrs             negb addr(rd)
15666
     ld @rd,imm16            ldl addr(rd),rrs        negb rbd
15667
     ld @rd,rs               ldl addr,rrs            nop
15668
     ld addr(rd),imm16       ldl rd(imm16),rrs       or rd,@rs
15669
     ld addr(rd),rs          ldl rd(rx),rrs          or rd,addr
15670
     ld addr,imm16           ldl rrd,@rs             or rd,addr(rs)
15671
     ld addr,rs              ldl rrd,addr            or rd,imm16
15672
     ld rd(imm16),rs         ldl rrd,addr(rs)        or rd,rs
15673
     ld rd(rx),rs            ldl rrd,imm32           orb rbd,@rs
15674
     ld rd,@rs               ldl rrd,rrs             orb rbd,addr
15675
     ld rd,addr              ldl rrd,rs(imm16)       orb rbd,addr(rs)
15676
     ld rd,addr(rs)          ldl rrd,rs(rx)          orb rbd,imm8
15677
     ld rd,imm16             ldm @rd,rs,n            orb rbd,rbs
15678
     ld rd,rs                ldm addr(rd),rs,n       out @rd,rs
15679
     ld rd,rs(imm16)         ldm addr,rs,n           out imm16,rs
15680
     ld rd,rs(rx)            ldm rd,@rs,n            outb @rd,rbs
15681
     lda rd,addr             ldm rd,addr(rs),n       outb imm16,rbs
15682
     lda rd,addr(rs)         ldm rd,addr,n           outd @rd,@rs,ra
15683
     lda rd,rs(imm16)        ldps @rs                outdb @rd,@rs,rba
15684
     lda rd,rs(rx)           ldps addr               outib @rd,@rs,ra
15685
     ldar rd,disp16          ldps addr(rs)           outibr @rd,@rs,ra
15686
     ldb @rd,imm8            ldr disp16,rs           pop @rd,@rs
15687
     ldb @rd,rbs             ldr rd,disp16           pop addr(rd),@rs
15688
     ldb addr(rd),imm8       ldrb disp16,rbs         pop addr,@rs
15689
     ldb addr(rd),rbs        ldrb rbd,disp16         pop rd,@rs
15690
     ldb addr,imm8           ldrl disp16,rrs         popl @rd,@rs
15691
     ldb addr,rbs            ldrl rrd,disp16         popl addr(rd),@rs
15692
     ldb rbd,@rs             mbit                    popl addr,@rs
15693
     ldb rbd,addr            mreq rd                 popl rrd,@rs
15694
     ldb rbd,addr(rs)        mres                    push @rd,@rs
15695
     ldb rbd,imm8            mset                    push @rd,addr
15696
     ldb rbd,rbs             mult rrd,@rs            push @rd,addr(rs)
15697
     ldb rbd,rs(imm16)       mult rrd,addr           push @rd,imm16
15698
     push @rd,rs             set addr,imm4           subl rrd,imm32
15699
     pushl @rd,@rs           set rd,imm4             subl rrd,rrs
15700
     pushl @rd,addr          set rd,rs               tcc cc,rd
15701
     pushl @rd,addr(rs)      setb @rd,imm4           tccb cc,rbd
15702
     pushl @rd,rrs           setb addr(rd),imm4      test @rd
15703
     res @rd,imm4            setb addr,imm4          test addr
15704
     res addr(rd),imm4       setb rbd,imm4           test addr(rd)
15705
     res addr,imm4           setb rbd,rs             test rd
15706
     res rd,imm4             setflg imm4             testb @rd
15707
     res rd,rs               sinb rbd,imm16          testb addr
15708
     resb @rd,imm4           sinb rd,imm16           testb addr(rd)
15709
     resb addr(rd),imm4      sind @rd,@rs,ra         testb rbd
15710
     resb addr,imm4          sindb @rd,@rs,rba       testl @rd
15711
     resb rbd,imm4           sinib @rd,@rs,ra        testl addr
15712
     resb rbd,rs             sinibr @rd,@rs,ra       testl addr(rd)
15713
     resflg imm4             sla rd,imm8             testl rrd
15714
     ret cc                  slab rbd,imm8           trdb @rd,@rs,rba
15715
     rl rd,imm1or2           slal rrd,imm8           trdrb @rd,@rs,rba
15716
     rlb rbd,imm1or2         sll rd,imm8             trib @rd,@rs,rbr
15717
     rlc rd,imm1or2          sllb rbd,imm8           trirb @rd,@rs,rbr
15718
     rlcb rbd,imm1or2        slll rrd,imm8           trtdrb @ra,@rb,rbr
15719
     rldb rbb,rba            sout imm16,rs           trtib @ra,@rb,rr
15720
     rr rd,imm1or2           soutb imm16,rbs         trtirb @ra,@rb,rbr
15721
     rrb rbd,imm1or2         soutd @rd,@rs,ra        trtrb @ra,@rb,rbr
15722
     rrc rd,imm1or2          soutdb @rd,@rs,rba      tset @rd
15723
     rrcb rbd,imm1or2        soutib @rd,@rs,ra       tset addr
15724
     rrdb rbb,rba            soutibr @rd,@rs,ra      tset addr(rd)
15725
     rsvd36                  sra rd,imm8             tset rd
15726
     rsvd38                  srab rbd,imm8           tsetb @rd
15727
     rsvd78                  sral rrd,imm8           tsetb addr
15728
     rsvd7e                  srl rd,imm8             tsetb addr(rd)
15729
     rsvd9d                  srlb rbd,imm8           tsetb rbd
15730
     rsvd9f                  srll rrd,imm8           xor rd,@rs
15731
     rsvdb9                  sub rd,@rs              xor rd,addr
15732
     rsvdbf                  sub rd,addr             xor rd,addr(rs)
15733
     sbc rd,rs               sub rd,addr(rs)         xor rd,imm16
15734
     sbcb rbd,rbs            sub rd,imm16            xor rd,rs
15735
     sc imm8                 sub rd,rs               xorb rbd,@rs
15736
     sda rd,rs               subb rbd,@rs            xorb rbd,addr
15737
     sdab rbd,rs             subb rbd,addr           xorb rbd,addr(rs)
15738
     sdal rrd,rs             subb rbd,addr(rs)       xorb rbd,imm8
15739
     sdl rd,rs               subb rbd,imm8           xorb rbd,rbs
15740
     sdlb rbd,rs             subb rbd,rbs            xorb rbd,rbs
15741
     sdll rrd,rs             subl rrd,@rs
15742
     set @rd,imm4            subl rrd,addr
15743
     set addr(rd),imm4       subl rrd,addr(rs)
15744
 
15745

15746
File: as.info,  Node: Vax-Dependent,  Prev: Z8000-Dependent,  Up: Machine Dependencies
15747
 
15748
9.34 VAX Dependent Features
15749
===========================
15750
 
15751
* Menu:
15752
 
15753
* VAX-Opts::                    VAX Command-Line Options
15754
* VAX-float::                   VAX Floating Point
15755
* VAX-directives::              Vax Machine Directives
15756
* VAX-opcodes::                 VAX Opcodes
15757
* VAX-branch::                  VAX Branch Improvement
15758
* VAX-operands::                VAX Operands
15759
* VAX-no::                      Not Supported on VAX
15760
 
15761

15762
File: as.info,  Node: VAX-Opts,  Next: VAX-float,  Up: Vax-Dependent
15763
 
15764
9.34.1 VAX Command-Line Options
15765
-------------------------------
15766
 
15767
The Vax version of `as' accepts any of the following options, gives a
15768
warning message that the option was ignored and proceeds.  These
15769
options are for compatibility with scripts designed for other people's
15770
assemblers.
15771
 
15772
``-D' (Debug)'
15773
``-S' (Symbol Table)'
15774
``-T' (Token Trace)'
15775
     These are obsolete options used to debug old assemblers.
15776
 
15777
``-d' (Displacement size for JUMPs)'
15778
     This option expects a number following the `-d'.  Like options
15779
     that expect filenames, the number may immediately follow the `-d'
15780
     (old standard) or constitute the whole of the command line
15781
     argument that follows `-d' (GNU standard).
15782
 
15783
``-V' (Virtualize Interpass Temporary File)'
15784
     Some other assemblers use a temporary file.  This option commanded
15785
     them to keep the information in active memory rather than in a
15786
     disk file.  `as' always does this, so this option is redundant.
15787
 
15788
``-J' (JUMPify Longer Branches)'
15789
     Many 32-bit computers permit a variety of branch instructions to
15790
     do the same job.  Some of these instructions are short (and fast)
15791
     but have a limited range; others are long (and slow) but can
15792
     branch anywhere in virtual memory.  Often there are 3 flavors of
15793
     branch: short, medium and long.  Some other assemblers would emit
15794
     short and medium branches, unless told by this option to emit
15795
     short and long branches.
15796
 
15797
``-t' (Temporary File Directory)'
15798
     Some other assemblers may use a temporary file, and this option
15799
     takes a filename being the directory to site the temporary file.
15800
     Since `as' does not use a temporary disk file, this option makes
15801
     no difference.  `-t' needs exactly one filename.
15802
 
15803
   The Vax version of the assembler accepts additional options when
15804
compiled for VMS:
15805
 
15806
`-h N'
15807
     External symbol or section (used for global variables) names are
15808
     not case sensitive on VAX/VMS and always mapped to upper case.
15809
     This is contrary to the C language definition which explicitly
15810
     distinguishes upper and lower case.  To implement a standard
15811
     conforming C compiler, names must be changed (mapped) to preserve
15812
     the case information.  The default mapping is to convert all lower
15813
     case characters to uppercase and adding an underscore followed by
15814
     a 6 digit hex value, representing a 24 digit binary value.  The
15815
     one digits in the binary value represent which characters are
15816
     uppercase in the original symbol name.
15817
 
15818
     The `-h N' option determines how we map names.  This takes several
15819
     values.  No `-h' switch at all allows case hacking as described
15820
     above.  A value of zero (`-h0') implies names should be upper
15821
     case, and inhibits the case hack.  A value of 2 (`-h2') implies
15822
     names should be all lower case, with no case hack.  A value of 3
15823
     (`-h3') implies that case should be preserved.  The value 1 is
15824
     unused.  The `-H' option directs `as' to display every mapped
15825
     symbol during assembly.
15826
 
15827
     Symbols whose names include a dollar sign `$' are exceptions to the
15828
     general name mapping.  These symbols are normally only used to
15829
     reference VMS library names.  Such symbols are always mapped to
15830
     upper case.
15831
 
15832
`-+'
15833
     The `-+' option causes `as' to truncate any symbol name larger
15834
     than 31 characters.  The `-+' option also prevents some code
15835
     following the `_main' symbol normally added to make the object
15836
     file compatible with Vax-11 "C".
15837
 
15838
`-1'
15839
     This option is ignored for backward compatibility with `as'
15840
     version 1.x.
15841
 
15842
`-H'
15843
     The `-H' option causes `as' to print every symbol which was
15844
     changed by case mapping.
15845
 
15846

15847
File: as.info,  Node: VAX-float,  Next: VAX-directives,  Prev: VAX-Opts,  Up: Vax-Dependent
15848
 
15849
9.34.2 VAX Floating Point
15850
-------------------------
15851
 
15852
Conversion of flonums to floating point is correct, and compatible with
15853
previous assemblers.  Rounding is towards zero if the remainder is
15854
exactly half the least significant bit.
15855
 
15856
   `D', `F', `G' and `H' floating point formats are understood.
15857
 
15858
   Immediate floating literals (_e.g._ `S`$6.9') are rendered
15859
correctly.  Again, rounding is towards zero in the boundary case.
15860
 
15861
   The `.float' directive produces `f' format numbers.  The `.double'
15862
directive produces `d' format numbers.
15863
 
15864

15865
File: as.info,  Node: VAX-directives,  Next: VAX-opcodes,  Prev: VAX-float,  Up: Vax-Dependent
15866
 
15867
9.34.3 Vax Machine Directives
15868
-----------------------------
15869
 
15870
The Vax version of the assembler supports four directives for
15871
generating Vax floating point constants.  They are described in the
15872
table below.
15873
 
15874
`.dfloat'
15875
     This expects zero or more flonums, separated by commas, and
15876
     assembles Vax `d' format 64-bit floating point constants.
15877
 
15878
`.ffloat'
15879
     This expects zero or more flonums, separated by commas, and
15880
     assembles Vax `f' format 32-bit floating point constants.
15881
 
15882
`.gfloat'
15883
     This expects zero or more flonums, separated by commas, and
15884
     assembles Vax `g' format 64-bit floating point constants.
15885
 
15886
`.hfloat'
15887
     This expects zero or more flonums, separated by commas, and
15888
     assembles Vax `h' format 128-bit floating point constants.
15889
 
15890
 
15891

15892
File: as.info,  Node: VAX-opcodes,  Next: VAX-branch,  Prev: VAX-directives,  Up: Vax-Dependent
15893
 
15894
9.34.4 VAX Opcodes
15895
------------------
15896
 
15897
All DEC mnemonics are supported.  Beware that `case...' instructions
15898
have exactly 3 operands.  The dispatch table that follows the `case...'
15899
instruction should be made with `.word' statements.  This is compatible
15900
with all unix assemblers we know of.
15901
 
15902

15903
File: as.info,  Node: VAX-branch,  Next: VAX-operands,  Prev: VAX-opcodes,  Up: Vax-Dependent
15904
 
15905
9.34.5 VAX Branch Improvement
15906
-----------------------------
15907
 
15908
Certain pseudo opcodes are permitted.  They are for branch
15909
instructions.  They expand to the shortest branch instruction that
15910
reaches the target.  Generally these mnemonics are made by substituting
15911
`j' for `b' at the start of a DEC mnemonic.  This feature is included
15912
both for compatibility and to help compilers.  If you do not need this
15913
feature, avoid these opcodes.  Here are the mnemonics, and the code
15914
they can expand into.
15915
 
15916
`jbsb'
15917
     `Jsb' is already an instruction mnemonic, so we chose `jbsb'.
15918
    (byte displacement)
15919
          `bsbb ...'
15920
 
15921
    (word displacement)
15922
          `bsbw ...'
15923
 
15924
    (long displacement)
15925
          `jsb ...'
15926
 
15927
`jbr'
15928
`jr'
15929
     Unconditional branch.
15930
    (byte displacement)
15931
          `brb ...'
15932
 
15933
    (word displacement)
15934
          `brw ...'
15935
 
15936
    (long displacement)
15937
          `jmp ...'
15938
 
15939
`jCOND'
15940
     COND may be any one of the conditional branches `neq', `nequ',
15941
     `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs',
15942
     `gequ', `cc', `lssu', `cs'.  COND may also be one of the bit tests
15943
     `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs',
15944
     `lbc'.  NOTCOND is the opposite condition to COND.
15945
    (byte displacement)
15946
          `bCOND ...'
15947
 
15948
    (word displacement)
15949
          `bNOTCOND foo ; brw ... ; foo:'
15950
 
15951
    (long displacement)
15952
          `bNOTCOND foo ; jmp ... ; foo:'
15953
 
15954
`jacbX'
15955
     X may be one of `b d f g h l w'.
15956
    (word displacement)
15957
          `OPCODE ...'
15958
 
15959
    (long displacement)
15960
               OPCODE ..., foo ;
15961
               brb bar ;
15962
               foo: jmp ... ;
15963
               bar:
15964
 
15965
`jaobYYY'
15966
     YYY may be one of `lss leq'.
15967
 
15968
`jsobZZZ'
15969
     ZZZ may be one of `geq gtr'.
15970
    (byte displacement)
15971
          `OPCODE ...'
15972
 
15973
    (word displacement)
15974
               OPCODE ..., foo ;
15975
               brb bar ;
15976
               foo: brw DESTINATION ;
15977
               bar:
15978
 
15979
    (long displacement)
15980
               OPCODE ..., foo ;
15981
               brb bar ;
15982
               foo: jmp DESTINATION ;
15983
               bar:
15984
 
15985
`aobleq'
15986
`aoblss'
15987
`sobgeq'
15988
`sobgtr'
15989
 
15990
    (byte displacement)
15991
          `OPCODE ...'
15992
 
15993
    (word displacement)
15994
               OPCODE ..., foo ;
15995
               brb bar ;
15996
               foo: brw DESTINATION ;
15997
               bar:
15998
 
15999
    (long displacement)
16000
               OPCODE ..., foo ;
16001
               brb bar ;
16002
               foo: jmp DESTINATION ;
16003
               bar:
16004
 
16005

16006
File: as.info,  Node: VAX-operands,  Next: VAX-no,  Prev: VAX-branch,  Up: Vax-Dependent
16007
 
16008
9.34.6 VAX Operands
16009
-------------------
16010
 
16011
The immediate character is `$' for Unix compatibility, not `#' as DEC
16012
writes it.
16013
 
16014
   The indirect character is `*' for Unix compatibility, not `@' as DEC
16015
writes it.
16016
 
16017
   The displacement sizing character is ``' (an accent grave) for Unix
16018
compatibility, not `^' as DEC writes it.  The letter preceding ``' may
16019
have either case.  `G' is not understood, but all other letters (`b i l
16020
s w') are understood.
16021
 
16022
   Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'.  Upper
16023
and lower case letters are equivalent.
16024
 
16025
   For instance
16026
     tstb *w`$4(r5)
16027
 
16028
   Any expression is permitted in an operand.  Operands are comma
16029
separated.
16030
 
16031

16032
File: as.info,  Node: VAX-no,  Prev: VAX-operands,  Up: Vax-Dependent
16033
 
16034
9.34.7 Not Supported on VAX
16035
---------------------------
16036
 
16037
Vax bit fields can not be assembled with `as'.  Someone can add the
16038
required code if they really need it.
16039
 
16040

16041
File: as.info,  Node: V850-Dependent,  Next: Xtensa-Dependent,  Prev: TIC54X-Dependent,  Up: Machine Dependencies
16042
 
16043
9.35 v850 Dependent Features
16044
============================
16045
 
16046
* Menu:
16047
 
16048
* V850 Options::              Options
16049
* V850 Syntax::               Syntax
16050
* V850 Floating Point::       Floating Point
16051
* V850 Directives::           V850 Machine Directives
16052
* V850 Opcodes::              Opcodes
16053
 
16054

16055
File: as.info,  Node: V850 Options,  Next: V850 Syntax,  Up: V850-Dependent
16056
 
16057
9.35.1 Options
16058
--------------
16059
 
16060
`as' supports the following additional command-line options for the
16061
V850 processor family:
16062
 
16063
`-wsigned_overflow'
16064
     Causes warnings to be produced when signed immediate values
16065
     overflow the space available for then within their opcodes.  By
16066
     default this option is disabled as it is possible to receive
16067
     spurious warnings due to using exact bit patterns as immediate
16068
     constants.
16069
 
16070
`-wunsigned_overflow'
16071
     Causes warnings to be produced when unsigned immediate values
16072
     overflow the space available for then within their opcodes.  By
16073
     default this option is disabled as it is possible to receive
16074
     spurious warnings due to using exact bit patterns as immediate
16075
     constants.
16076
 
16077
`-mv850'
16078
     Specifies that the assembled code should be marked as being
16079
     targeted at the V850 processor.  This allows the linker to detect
16080
     attempts to link such code with code assembled for other
16081
     processors.
16082
 
16083
`-mv850e'
16084
     Specifies that the assembled code should be marked as being
16085
     targeted at the V850E processor.  This allows the linker to detect
16086
     attempts to link such code with code assembled for other
16087
     processors.
16088
 
16089
`-mv850e1'
16090
     Specifies that the assembled code should be marked as being
16091
     targeted at the V850E1 processor.  This allows the linker to
16092
     detect attempts to link such code with code assembled for other
16093
     processors.
16094
 
16095
`-mv850any'
16096
     Specifies that the assembled code should be marked as being
16097
     targeted at the V850 processor but support instructions that are
16098
     specific to the extended variants of the process.  This allows the
16099
     production of binaries that contain target specific code, but
16100
     which are also intended to be used in a generic fashion.  For
16101
     example libgcc.a contains generic routines used by the code
16102
     produced by GCC for all versions of the v850 architecture,
16103
     together with support routines only used by the V850E architecture.
16104
 
16105
`-mrelax'
16106
     Enables relaxation.  This allows the .longcall and .longjump pseudo
16107
     ops to be used in the assembler source code.  These ops label
16108
     sections of code which are either a long function call or a long
16109
     branch.  The assembler will then flag these sections of code and
16110
     the linker will attempt to relax them.
16111
 
16112
 
16113

16114
File: as.info,  Node: V850 Syntax,  Next: V850 Floating Point,  Prev: V850 Options,  Up: V850-Dependent
16115
 
16116
9.35.2 Syntax
16117
-------------
16118
 
16119
* Menu:
16120
 
16121
* V850-Chars::                Special Characters
16122
* V850-Regs::                 Register Names
16123
 
16124

16125
File: as.info,  Node: V850-Chars,  Next: V850-Regs,  Up: V850 Syntax
16126
 
16127
9.35.2.1 Special Characters
16128
...........................
16129
 
16130
`#' is the line comment character.
16131
 
16132

16133
File: as.info,  Node: V850-Regs,  Prev: V850-Chars,  Up: V850 Syntax
16134
 
16135
9.35.2.2 Register Names
16136
.......................
16137
 
16138
`as' supports the following names for registers:
16139
`general register 0'
16140
     r0, zero
16141
 
16142
`general register 1'
16143
     r1
16144
 
16145
`general register 2'
16146
     r2, hp
16147
 
16148
`general register 3'
16149
     r3, sp
16150
 
16151
`general register 4'
16152
     r4, gp
16153
 
16154
`general register 5'
16155
     r5, tp
16156
 
16157
`general register 6'
16158
     r6
16159
 
16160
`general register 7'
16161
     r7
16162
 
16163
`general register 8'
16164
     r8
16165
 
16166
`general register 9'
16167
     r9
16168
 
16169
`general register 10'
16170
     r10
16171
 
16172
`general register 11'
16173
     r11
16174
 
16175
`general register 12'
16176
     r12
16177
 
16178
`general register 13'
16179
     r13
16180
 
16181
`general register 14'
16182
     r14
16183
 
16184
`general register 15'
16185
     r15
16186
 
16187
`general register 16'
16188
     r16
16189
 
16190
`general register 17'
16191
     r17
16192
 
16193
`general register 18'
16194
     r18
16195
 
16196
`general register 19'
16197
     r19
16198
 
16199
`general register 20'
16200
     r20
16201
 
16202
`general register 21'
16203
     r21
16204
 
16205
`general register 22'
16206
     r22
16207
 
16208
`general register 23'
16209
     r23
16210
 
16211
`general register 24'
16212
     r24
16213
 
16214
`general register 25'
16215
     r25
16216
 
16217
`general register 26'
16218
     r26
16219
 
16220
`general register 27'
16221
     r27
16222
 
16223
`general register 28'
16224
     r28
16225
 
16226
`general register 29'
16227
     r29
16228
 
16229
`general register 30'
16230
     r30, ep
16231
 
16232
`general register 31'
16233
     r31, lp
16234
 
16235
`system register 0'
16236
     eipc
16237
 
16238
`system register 1'
16239
     eipsw
16240
 
16241
`system register 2'
16242
     fepc
16243
 
16244
`system register 3'
16245
     fepsw
16246
 
16247
`system register 4'
16248
     ecr
16249
 
16250
`system register 5'
16251
     psw
16252
 
16253
`system register 16'
16254
     ctpc
16255
 
16256
`system register 17'
16257
     ctpsw
16258
 
16259
`system register 18'
16260
     dbpc
16261
 
16262
`system register 19'
16263
     dbpsw
16264
 
16265
`system register 20'
16266
     ctbp
16267
 
16268

16269
File: as.info,  Node: V850 Floating Point,  Next: V850 Directives,  Prev: V850 Syntax,  Up: V850-Dependent
16270
 
16271
9.35.3 Floating Point
16272
---------------------
16273
 
16274
The V850 family uses IEEE floating-point numbers.
16275
 
16276

16277
File: as.info,  Node: V850 Directives,  Next: V850 Opcodes,  Prev: V850 Floating Point,  Up: V850-Dependent
16278
 
16279
9.35.4 V850 Machine Directives
16280
------------------------------
16281
 
16282
`.offset '
16283
     Moves the offset into the current section to the specified amount.
16284
 
16285
`.section "name", '
16286
     This is an extension to the standard .section directive.  It sets
16287
     the current section to be  and creates an alias for this
16288
     section called "name".
16289
 
16290
`.v850'
16291
     Specifies that the assembled code should be marked as being
16292
     targeted at the V850 processor.  This allows the linker to detect
16293
     attempts to link such code with code assembled for other
16294
     processors.
16295
 
16296
`.v850e'
16297
     Specifies that the assembled code should be marked as being
16298
     targeted at the V850E processor.  This allows the linker to detect
16299
     attempts to link such code with code assembled for other
16300
     processors.
16301
 
16302
`.v850e1'
16303
     Specifies that the assembled code should be marked as being
16304
     targeted at the V850E1 processor.  This allows the linker to
16305
     detect attempts to link such code with code assembled for other
16306
     processors.
16307
 
16308
 
16309

16310
File: as.info,  Node: V850 Opcodes,  Prev: V850 Directives,  Up: V850-Dependent
16311
 
16312
9.35.5 Opcodes
16313
--------------
16314
 
16315
`as' implements all the standard V850 opcodes.
16316
 
16317
   `as' also implements the following pseudo ops:
16318
 
16319
`hi0()'
16320
     Computes the higher 16 bits of the given expression and stores it
16321
     into the immediate operand field of the given instruction.  For
16322
     example:
16323
 
16324
     `mulhi hi0(here - there), r5, r6'
16325
 
16326
     computes the difference between the address of labels 'here' and
16327
     'there', takes the upper 16 bits of this difference, shifts it
16328
     down 16 bits and then multiplies it by the lower 16 bits in
16329
     register 5, putting the result into register 6.
16330
 
16331
`lo()'
16332
     Computes the lower 16 bits of the given expression and stores it
16333
     into the immediate operand field of the given instruction.  For
16334
     example:
16335
 
16336
     `addi lo(here - there), r5, r6'
16337
 
16338
     computes the difference between the address of labels 'here' and
16339
     'there', takes the lower 16 bits of this difference and adds it to
16340
     register 5, putting the result into register 6.
16341
 
16342
`hi()'
16343
     Computes the higher 16 bits of the given expression and then adds
16344
     the value of the most significant bit of the lower 16 bits of the
16345
     expression and stores the result into the immediate operand field
16346
     of the given instruction.  For example the following code can be
16347
     used to compute the address of the label 'here' and store it into
16348
     register 6:
16349
 
16350
     `movhi hi(here), r0, r6'     `movea lo(here), r6, r6'
16351
 
16352
     The reason for this special behaviour is that movea performs a sign
16353
     extension on its immediate operand.  So for example if the address
16354
     of 'here' was 0xFFFFFFFF then without the special behaviour of the
16355
     hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
16356
     then the movea instruction would takes its immediate operand,
16357
     0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it
16358
     into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).
16359
     With the hi() pseudo op adding in the top bit of the lo() pseudo
16360
     op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 =
16361
     0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 -
16362
     the right value.
16363
 
16364
`hilo()'
16365
     Computes the 32 bit value of the given expression and stores it
16366
     into the immediate operand field of the given instruction (which
16367
     must be a mov instruction).  For example:
16368
 
16369
     `mov hilo(here), r6'
16370
 
16371
     computes the absolute address of label 'here' and puts the result
16372
     into register 6.
16373
 
16374
`sdaoff()'
16375
     Computes the offset of the named variable from the start of the
16376
     Small Data Area (whoes address is held in register 4, the GP
16377
     register) and stores the result as a 16 bit signed value in the
16378
     immediate operand field of the given instruction.  For example:
16379
 
16380
     `ld.w sdaoff(_a_variable)[gp],r6'
16381
 
16382
     loads the contents of the location pointed to by the label
16383
     '_a_variable' into register 6, provided that the label is located
16384
     somewhere within +/- 32K of the address held in the GP register.
16385
     [Note the linker assumes that the GP register contains a fixed
16386
     address set to the address of the label called '__gp'.  This can
16387
     either be set up automatically by the linker, or specifically set
16388
     by using the `--defsym __gp=' command line option].
16389
 
16390
`tdaoff()'
16391
     Computes the offset of the named variable from the start of the
16392
     Tiny Data Area (whoes address is held in register 30, the EP
16393
     register) and stores the result as a 4,5, 7 or 8 bit unsigned
16394
     value in the immediate operand field of the given instruction.
16395
     For example:
16396
 
16397
     `sld.w tdaoff(_a_variable)[ep],r6'
16398
 
16399
     loads the contents of the location pointed to by the label
16400
     '_a_variable' into register 6, provided that the label is located
16401
     somewhere within +256 bytes of the address held in the EP
16402
     register.  [Note the linker assumes that the EP register contains
16403
     a fixed address set to the address of the label called '__ep'.
16404
     This can either be set up automatically by the linker, or
16405
     specifically set by using the `--defsym __ep=' command line
16406
     option].
16407
 
16408
`zdaoff()'
16409
     Computes the offset of the named variable from address 0 and
16410
     stores the result as a 16 bit signed value in the immediate
16411
     operand field of the given instruction.  For example:
16412
 
16413
     `movea zdaoff(_a_variable),zero,r6'
16414
 
16415
     puts the address of the label '_a_variable' into register 6,
16416
     assuming that the label is somewhere within the first 32K of
16417
     memory.  (Strictly speaking it also possible to access the last
16418
     32K of memory as well, as the offsets are signed).
16419
 
16420
`ctoff()'
16421
     Computes the offset of the named variable from the start of the
16422
     Call Table Area (whoes address is helg in system register 20, the
16423
     CTBP register) and stores the result a 6 or 16 bit unsigned value
16424
     in the immediate field of then given instruction or piece of data.
16425
     For example:
16426
 
16427
     `callt ctoff(table_func1)'
16428
 
16429
     will put the call the function whoes address is held in the call
16430
     table at the location labeled 'table_func1'.
16431
 
16432
`.longcall `name''
16433
     Indicates that the following sequence of instructions is a long
16434
     call to function `name'.  The linker will attempt to shorten this
16435
     call sequence if `name' is within a 22bit offset of the call.  Only
16436
     valid if the `-mrelax' command line switch has been enabled.
16437
 
16438
`.longjump `name''
16439
     Indicates that the following sequence of instructions is a long
16440
     jump to label `name'.  The linker will attempt to shorten this code
16441
     sequence if `name' is within a 22bit offset of the jump.  Only
16442
     valid if the `-mrelax' command line switch has been enabled.
16443
 
16444
 
16445
   For information on the V850 instruction set, see `V850 Family
16446
32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
16447
Ltd.
16448
 
16449

16450
File: as.info,  Node: Xtensa-Dependent,  Next: Z80-Dependent,  Prev: V850-Dependent,  Up: Machine Dependencies
16451
 
16452
9.36 Xtensa Dependent Features
16453
==============================
16454
 
16455
   This chapter covers features of the GNU assembler that are specific
16456
to the Xtensa architecture.  For details about the Xtensa instruction
16457
set, please consult the `Xtensa Instruction Set Architecture (ISA)
16458
Reference Manual'.
16459
 
16460
* Menu:
16461
 
16462
* Xtensa Options::              Command-line Options.
16463
* Xtensa Syntax::               Assembler Syntax for Xtensa Processors.
16464
* Xtensa Optimizations::        Assembler Optimizations.
16465
* Xtensa Relaxation::           Other Automatic Transformations.
16466
* Xtensa Directives::           Directives for Xtensa Processors.
16467
 
16468

16469
File: as.info,  Node: Xtensa Options,  Next: Xtensa Syntax,  Up: Xtensa-Dependent
16470
 
16471
9.36.1 Command Line Options
16472
---------------------------
16473
 
16474
The Xtensa version of the GNU assembler supports these special options:
16475
 
16476
`--text-section-literals | --no-text-section-literals'
16477
     Control the treatment of literal pools.  The default is
16478
     `--no-text-section-literals', which places literals in separate
16479
     sections in the output file.  This allows the literal pool to be
16480
     placed in a data RAM/ROM.  With `--text-section-literals', the
16481
     literals are interspersed in the text section in order to keep
16482
     them as close as possible to their references.  This may be
16483
     necessary for large assembly files, where the literals would
16484
     otherwise be out of range of the `L32R' instructions in the text
16485
     section.  These options only affect literals referenced via
16486
     PC-relative `L32R' instructions; literals for absolute mode `L32R'
16487
     instructions are handled separately.  *Note literal: Literal
16488
     Directive.
16489
 
16490
`--absolute-literals | --no-absolute-literals'
16491
     Indicate to the assembler whether `L32R' instructions use absolute
16492
     or PC-relative addressing.  If the processor includes the absolute
16493
     addressing option, the default is to use absolute `L32R'
16494
     relocations.  Otherwise, only the PC-relative `L32R' relocations
16495
     can be used.
16496
 
16497
`--target-align | --no-target-align'
16498
     Enable or disable automatic alignment to reduce branch penalties
16499
     at some expense in code size.  *Note Automatic Instruction
16500
     Alignment: Xtensa Automatic Alignment.  This optimization is
16501
     enabled by default.  Note that the assembler will always align
16502
     instructions like `LOOP' that have fixed alignment requirements.
16503
 
16504
`--longcalls | --no-longcalls'
16505
     Enable or disable transformation of call instructions to allow
16506
     calls across a greater range of addresses.  *Note Function Call
16507
     Relaxation: Xtensa Call Relaxation.  This option should be used
16508
     when call targets can potentially be out of range.  It may degrade
16509
     both code size and performance, but the linker can generally
16510
     optimize away the unnecessary overhead when a call ends up within
16511
     range.  The default is `--no-longcalls'.
16512
 
16513
`--transform | --no-transform'
16514
     Enable or disable all assembler transformations of Xtensa
16515
     instructions, including both relaxation and optimization.  The
16516
     default is `--transform'; `--no-transform' should only be used in
16517
     the rare cases when the instructions must be exactly as specified
16518
     in the assembly source.  Using `--no-transform' causes out of range
16519
     instruction operands to be errors.
16520
 
16521
`--rename-section OLDNAME=NEWNAME'
16522
     Rename the OLDNAME section to NEWNAME.  This option can be used
16523
     multiple times to rename multiple sections.
16524
 
16525

16526
File: as.info,  Node: Xtensa Syntax,  Next: Xtensa Optimizations,  Prev: Xtensa Options,  Up: Xtensa-Dependent
16527
 
16528
9.36.2 Assembler Syntax
16529
-----------------------
16530
 
16531
Block comments are delimited by `/*' and `*/'.  End of line comments
16532
may be introduced with either `#' or `//'.
16533
 
16534
   Instructions consist of a leading opcode or macro name followed by
16535
whitespace and an optional comma-separated list of operands:
16536
 
16537
     OPCODE [OPERAND, ...]
16538
 
16539
   Instructions must be separated by a newline or semicolon.
16540
 
16541
   FLIX instructions, which bundle multiple opcodes together in a single
16542
instruction, are specified by enclosing the bundled opcodes inside
16543
braces:
16544
 
16545
     {
16546
     [FORMAT]
16547
     OPCODE0 [OPERANDS]
16548
     OPCODE1 [OPERANDS]
16549
     OPCODE2 [OPERANDS]
16550
     ...
16551
     }
16552
 
16553
   The opcodes in a FLIX instruction are listed in the same order as the
16554
corresponding instruction slots in the TIE format declaration.
16555
Directives and labels are not allowed inside the braces of a FLIX
16556
instruction.  A particular TIE format name can optionally be specified
16557
immediately after the opening brace, but this is usually unnecessary.
16558
The assembler will automatically search for a format that can encode the
16559
specified opcodes, so the format name need only be specified in rare
16560
cases where there is more than one applicable format and where it
16561
matters which of those formats is used.  A FLIX instruction can also be
16562
specified on a single line by separating the opcodes with semicolons:
16563
 
16564
     { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... }
16565
 
16566
   If an opcode can only be encoded in a FLIX instruction but is not
16567
specified as part of a FLIX bundle, the assembler will choose the
16568
smallest format where the opcode can be encoded and will fill unused
16569
instruction slots with no-ops.
16570
 
16571
* Menu:
16572
 
16573
* Xtensa Opcodes::              Opcode Naming Conventions.
16574
* Xtensa Registers::            Register Naming.
16575
 
16576

16577
File: as.info,  Node: Xtensa Opcodes,  Next: Xtensa Registers,  Up: Xtensa Syntax
16578
 
16579
9.36.2.1 Opcode Names
16580
.....................
16581
 
16582
See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
16583
for a complete list of opcodes and descriptions of their semantics.
16584
 
16585
   If an opcode name is prefixed with an underscore character (`_'),
16586
`as' will not transform that instruction in any way.  The underscore
16587
prefix disables both optimization (*note Xtensa Optimizations: Xtensa
16588
Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa
16589
Relaxation.) for that particular instruction.  Only use the underscore
16590
prefix when it is essential to select the exact opcode produced by the
16591
assembler.  Using this feature unnecessarily makes the code less
16592
efficient by disabling assembler optimization and less flexible by
16593
disabling relaxation.
16594
 
16595
   Note that this special handling of underscore prefixes only applies
16596
to Xtensa opcodes, not to either built-in macros or user-defined macros.
16597
When an underscore prefix is used with a macro (e.g., `_MOV'), it
16598
refers to a different macro.  The assembler generally provides built-in
16599
macros both with and without the underscore prefix, where the underscore
16600
versions behave as if the underscore carries through to the instructions
16601
in the macros.  For example, `_MOV' may expand to `_MOV.N'.
16602
 
16603
   The underscore prefix only applies to individual instructions, not to
16604
series of instructions.  For example, if a series of instructions have
16605
underscore prefixes, the assembler will not transform the individual
16606
instructions, but it may insert other instructions between them (e.g.,
16607
to align a `LOOP' instruction).  To prevent the assembler from
16608
modifying a series of instructions as a whole, use the `no-transform'
16609
directive.  *Note transform: Transform Directive.
16610
 
16611

16612
File: as.info,  Node: Xtensa Registers,  Prev: Xtensa Opcodes,  Up: Xtensa Syntax
16613
 
16614
9.36.2.2 Register Names
16615
.......................
16616
 
16617
The assembly syntax for a register file entry is the "short" name for a
16618
TIE register file followed by the index into that register file.  For
16619
example, the general-purpose `AR' register file has a short name of
16620
`a', so these registers are named `a0'...`a15'.  As a special feature,
16621
`sp' is also supported as a synonym for `a1'.  Additional registers may
16622
be added by processor configuration options and by designer-defined TIE
16623
extensions.  An initial `$' character is optional in all register names.
16624
 
16625

16626
File: as.info,  Node: Xtensa Optimizations,  Next: Xtensa Relaxation,  Prev: Xtensa Syntax,  Up: Xtensa-Dependent
16627
 
16628
9.36.3 Xtensa Optimizations
16629
---------------------------
16630
 
16631
The optimizations currently supported by `as' are generation of density
16632
instructions where appropriate and automatic branch target alignment.
16633
 
16634
* Menu:
16635
 
16636
* Density Instructions::        Using Density Instructions.
16637
* Xtensa Automatic Alignment::  Automatic Instruction Alignment.
16638
 
16639

16640
File: as.info,  Node: Density Instructions,  Next: Xtensa Automatic Alignment,  Up: Xtensa Optimizations
16641
 
16642
9.36.3.1 Using Density Instructions
16643
...................................
16644
 
16645
The Xtensa instruction set has a code density option that provides
16646
16-bit versions of some of the most commonly used opcodes.  Use of these
16647
opcodes can significantly reduce code size.  When possible, the
16648
assembler automatically translates instructions from the core Xtensa
16649
instruction set into equivalent instructions from the Xtensa code
16650
density option.  This translation can be disabled by using underscore
16651
prefixes (*note Opcode Names: Xtensa Opcodes.), by using the
16652
`--no-transform' command-line option (*note Command Line Options:
16653
Xtensa Options.), or by using the `no-transform' directive (*note
16654
transform: Transform Directive.).
16655
 
16656
   It is a good idea _not_ to use the density instructions directly.
16657
The assembler will automatically select dense instructions where
16658
possible.  If you later need to use an Xtensa processor without the code
16659
density option, the same assembly code will then work without
16660
modification.
16661
 
16662

16663
File: as.info,  Node: Xtensa Automatic Alignment,  Prev: Density Instructions,  Up: Xtensa Optimizations
16664
 
16665
9.36.3.2 Automatic Instruction Alignment
16666
........................................
16667
 
16668
The Xtensa assembler will automatically align certain instructions, both
16669
to optimize performance and to satisfy architectural requirements.
16670
 
16671
   As an optimization to improve performance, the assembler attempts to
16672
align branch targets so they do not cross instruction fetch boundaries.
16673
(Xtensa processors can be configured with either 32-bit or 64-bit
16674
instruction fetch widths.)  An instruction immediately following a call
16675
is treated as a branch target in this context, because it will be the
16676
target of a return from the call.  This alignment has the potential to
16677
reduce branch penalties at some expense in code size.  This
16678
optimization is enabled by default.  You can disable it with the
16679
`--no-target-align' command-line option (*note Command Line Options:
16680
Xtensa Options.).
16681
 
16682
   The target alignment optimization is done without adding instructions
16683
that could increase the execution time of the program.  If there are
16684
density instructions in the code preceding a target, the assembler can
16685
change the target alignment by widening some of those instructions to
16686
the equivalent 24-bit instructions.  Extra bytes of padding can be
16687
inserted immediately following unconditional jump and return
16688
instructions.  This approach is usually successful in aligning many,
16689
but not all, branch targets.
16690
 
16691
   The `LOOP' family of instructions must be aligned such that the
16692
first instruction in the loop body does not cross an instruction fetch
16693
boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be
16694
on either a 1 or 2 mod 4 byte boundary).  The assembler knows about
16695
this restriction and inserts the minimal number of 2 or 3 byte no-op
16696
instructions to satisfy it.  When no-op instructions are added, any
16697
label immediately preceding the original loop will be moved in order to
16698
refer to the loop instruction, not the newly generated no-op
16699
instruction.  To preserve binary compatibility across processors with
16700
different fetch widths, the assembler conservatively assumes a 32-bit
16701
fetch width when aligning `LOOP' instructions (except if the first
16702
instruction in the loop is a 64-bit instruction).
16703
 
16704
   Previous versions of the assembler automatically aligned `ENTRY'
16705
instructions to 4-byte boundaries, but that alignment is now the
16706
programmer's responsibility.
16707
 
16708

16709
File: as.info,  Node: Xtensa Relaxation,  Next: Xtensa Directives,  Prev: Xtensa Optimizations,  Up: Xtensa-Dependent
16710
 
16711
9.36.4 Xtensa Relaxation
16712
------------------------
16713
 
16714
When an instruction operand is outside the range allowed for that
16715
particular instruction field, `as' can transform the code to use a
16716
functionally-equivalent instruction or sequence of instructions.  This
16717
process is known as "relaxation".  This is typically done for branch
16718
instructions because the distance of the branch targets is not known
16719
until assembly-time.  The Xtensa assembler offers branch relaxation and
16720
also extends this concept to function calls, `MOVI' instructions and
16721
other instructions with immediate fields.
16722
 
16723
* Menu:
16724
 
16725
* Xtensa Branch Relaxation::        Relaxation of Branches.
16726
* Xtensa Call Relaxation::          Relaxation of Function Calls.
16727
* Xtensa Immediate Relaxation::     Relaxation of other Immediate Fields.
16728
 
16729

16730
File: as.info,  Node: Xtensa Branch Relaxation,  Next: Xtensa Call Relaxation,  Up: Xtensa Relaxation
16731
 
16732
9.36.4.1 Conditional Branch Relaxation
16733
......................................
16734
 
16735
When the target of a branch is too far away from the branch itself,
16736
i.e., when the offset from the branch to the target is too large to fit
16737
in the immediate field of the branch instruction, it may be necessary to
16738
replace the branch with a branch around a jump.  For example,
16739
 
16740
         beqz    a2, L
16741
 
16742
   may result in:
16743
 
16744
         bnez.n  a2, M
16745
         j L
16746
     M:
16747
 
16748
   (The `BNEZ.N' instruction would be used in this example only if the
16749
density option is available.  Otherwise, `BNEZ' would be used.)
16750
 
16751
   This relaxation works well because the unconditional jump instruction
16752
has a much larger offset range than the various conditional branches.
16753
However, an error will occur if a branch target is beyond the range of a
16754
jump instruction.  `as' cannot relax unconditional jumps.  Similarly,
16755
an error will occur if the original input contains an unconditional
16756
jump to a target that is out of range.
16757
 
16758
   Branch relaxation is enabled by default.  It can be disabled by using
16759
underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the
16760
`--no-transform' command-line option (*note Command Line Options:
16761
Xtensa Options.), or the `no-transform' directive (*note transform:
16762
Transform Directive.).
16763
 
16764

16765
File: as.info,  Node: Xtensa Call Relaxation,  Next: Xtensa Immediate Relaxation,  Prev: Xtensa Branch Relaxation,  Up: Xtensa Relaxation
16766
 
16767
9.36.4.2 Function Call Relaxation
16768
.................................
16769
 
16770
Function calls may require relaxation because the Xtensa immediate call
16771
instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a
16772
PC-relative offset of only 512 Kbytes in either direction.  For larger
16773
programs, it may be necessary to use indirect calls (`CALLX0',
16774
`CALLX4', `CALLX8' and `CALLX12') where the target address is specified
16775
in a register.  The Xtensa assembler can automatically relax immediate
16776
call instructions into indirect call instructions.  This relaxation is
16777
done by loading the address of the called function into the callee's
16778
return address register and then using a `CALLX' instruction.  So, for
16779
example:
16780
 
16781
         call8 func
16782
 
16783
   might be relaxed to:
16784
 
16785
         .literal .L1, func
16786
         l32r    a8, .L1
16787
         callx8  a8
16788
 
16789
   Because the addresses of targets of function calls are not generally
16790
known until link-time, the assembler must assume the worst and relax all
16791
the calls to functions in other source files, not just those that really
16792
will be out of range.  The linker can recognize calls that were
16793
unnecessarily relaxed, and it will remove the overhead introduced by the
16794
assembler for those cases where direct calls are sufficient.
16795
 
16796
   Call relaxation is disabled by default because it can have a negative
16797
effect on both code size and performance, although the linker can
16798
usually eliminate the unnecessary overhead.  If a program is too large
16799
and some of the calls are out of range, function call relaxation can be
16800
enabled using the `--longcalls' command-line option or the `longcalls'
16801
directive (*note longcalls: Longcalls Directive.).
16802
 
16803

16804
File: as.info,  Node: Xtensa Immediate Relaxation,  Prev: Xtensa Call Relaxation,  Up: Xtensa Relaxation
16805
 
16806
9.36.4.3 Other Immediate Field Relaxation
16807
.........................................
16808
 
16809
The assembler normally performs the following other relaxations.  They
16810
can be disabled by using underscore prefixes (*note Opcode Names:
16811
Xtensa Opcodes.), the `--no-transform' command-line option (*note
16812
Command Line Options: Xtensa Options.), or the `no-transform' directive
16813
(*note transform: Transform Directive.).
16814
 
16815
   The `MOVI' machine instruction can only materialize values in the
16816
range from -2048 to 2047.  Values outside this range are best
16817
materialized with `L32R' instructions.  Thus:
16818
 
16819
         movi a0, 100000
16820
 
16821
   is assembled into the following machine code:
16822
 
16823
         .literal .L1, 100000
16824
         l32r a0, .L1
16825
 
16826
   The `L8UI' machine instruction can only be used with immediate
16827
offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine
16828
instructions can only be used with offsets from 0 to 510.  The `L32I'
16829
machine instruction can only be used with offsets from 0 to 1020.  A
16830
load offset outside these ranges can be materialized with an `L32R'
16831
instruction if the destination register of the load is different than
16832
the source address register.  For example:
16833
 
16834
         l32i a1, a0, 2040
16835
 
16836
   is translated to:
16837
 
16838
         .literal .L1, 2040
16839
         l32r a1, .L1
16840
         add a1, a0, a1
16841
         l32i a1, a1, 0
16842
 
16843
If the load destination and source address register are the same, an
16844
out-of-range offset causes an error.
16845
 
16846
   The Xtensa `ADDI' instruction only allows immediate operands in the
16847
range from -128 to 127.  There are a number of alternate instruction
16848
sequences for the `ADDI' operation.  First, if the immediate is 0, the
16849
`ADDI' will be turned into a `MOV.N' instruction (or the equivalent
16850
`OR' instruction if the code density option is not available).  If the
16851
`ADDI' immediate is outside of the range -128 to 127, but inside the
16852
range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI'
16853
sequence will be used.  Finally, if the immediate is outside of this
16854
range and a free register is available, an `L32R'/`ADD' sequence will
16855
be used with a literal allocated from the literal pool.
16856
 
16857
   For example:
16858
 
16859
         addi    a5, a6, 0
16860
         addi    a5, a6, 512
16861
         addi    a5, a6, 513
16862
         addi    a5, a6, 50000
16863
 
16864
   is assembled into the following:
16865
 
16866
         .literal .L1, 50000
16867
         mov.n   a5, a6
16868
         addmi   a5, a6, 0x200
16869
         addmi   a5, a6, 0x200
16870
         addi    a5, a5, 1
16871
         l32r    a5, .L1
16872
         add     a5, a6, a5
16873
 
16874

16875
File: as.info,  Node: Xtensa Directives,  Prev: Xtensa Relaxation,  Up: Xtensa-Dependent
16876
 
16877
9.36.5 Directives
16878
-----------------
16879
 
16880
The Xtensa assembler supports a region-based directive syntax:
16881
 
16882
         .begin DIRECTIVE [OPTIONS]
16883
         ...
16884
         .end DIRECTIVE
16885
 
16886
   All the Xtensa-specific directives that apply to a region of code use
16887
this syntax.
16888
 
16889
   The directive applies to code between the `.begin' and the `.end'.
16890
The state of the option after the `.end' reverts to what it was before
16891
the `.begin'.  A nested `.begin'/`.end' region can further change the
16892
state of the directive without having to be aware of its outer state.
16893
For example, consider:
16894
 
16895
         .begin no-transform
16896
     L:  add a0, a1, a2
16897
         .begin transform
16898
     M:  add a0, a1, a2
16899
         .end transform
16900
     N:  add a0, a1, a2
16901
         .end no-transform
16902
 
16903
   The `ADD' opcodes at `L' and `N' in the outer `no-transform' region
16904
both result in `ADD' machine instructions, but the assembler selects an
16905
`ADD.N' instruction for the `ADD' at `M' in the inner `transform'
16906
region.
16907
 
16908
   The advantage of this style is that it works well inside macros
16909
which can preserve the context of their callers.
16910
 
16911
   The following directives are available:
16912
 
16913
* Menu:
16914
 
16915
* Schedule Directive::         Enable instruction scheduling.
16916
* Longcalls Directive::        Use Indirect Calls for Greater Range.
16917
* Transform Directive::        Disable All Assembler Transformations.
16918
* Literal Directive::          Intermix Literals with Instructions.
16919
* Literal Position Directive:: Specify Inline Literal Pool Locations.
16920
* Literal Prefix Directive::   Specify Literal Section Name Prefix.
16921
* Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals.
16922
 
16923

16924
File: as.info,  Node: Schedule Directive,  Next: Longcalls Directive,  Up: Xtensa Directives
16925
 
16926
9.36.5.1 schedule
16927
.................
16928
 
16929
The `schedule' directive is recognized only for compatibility with
16930
Tensilica's assembler.
16931
 
16932
         .begin [no-]schedule
16933
         .end [no-]schedule
16934
 
16935
   This directive is ignored and has no effect on `as'.
16936
 
16937

16938
File: as.info,  Node: Longcalls Directive,  Next: Transform Directive,  Prev: Schedule Directive,  Up: Xtensa Directives
16939
 
16940
9.36.5.2 longcalls
16941
..................
16942
 
16943
The `longcalls' directive enables or disables function call relaxation.
16944
*Note Function Call Relaxation: Xtensa Call Relaxation.
16945
 
16946
         .begin [no-]longcalls
16947
         .end [no-]longcalls
16948
 
16949
   Call relaxation is disabled by default unless the `--longcalls'
16950
command-line option is specified.  The `longcalls' directive overrides
16951
the default determined by the command-line options.
16952
 
16953

16954
File: as.info,  Node: Transform Directive,  Next: Literal Directive,  Prev: Longcalls Directive,  Up: Xtensa Directives
16955
 
16956
9.36.5.3 transform
16957
..................
16958
 
16959
This directive enables or disables all assembler transformation,
16960
including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and
16961
optimization (*note Xtensa Optimizations: Xtensa Optimizations.).
16962
 
16963
         .begin [no-]transform
16964
         .end [no-]transform
16965
 
16966
   Transformations are enabled by default unless the `--no-transform'
16967
option is used.  The `transform' directive overrides the default
16968
determined by the command-line options.  An underscore opcode prefix,
16969
disabling transformation of that opcode, always takes precedence over
16970
both directives and command-line flags.
16971
 
16972

16973
File: as.info,  Node: Literal Directive,  Next: Literal Position Directive,  Prev: Transform Directive,  Up: Xtensa Directives
16974
 
16975
9.36.5.4 literal
16976
................
16977
 
16978
The `.literal' directive is used to define literal pool data, i.e.,
16979
read-only 32-bit data accessed via `L32R' instructions.
16980
 
16981
         .literal LABEL, VALUE[, VALUE...]
16982
 
16983
   This directive is similar to the standard `.word' directive, except
16984
that the actual location of the literal data is determined by the
16985
assembler and linker, not by the position of the `.literal' directive.
16986
Using this directive gives the assembler freedom to locate the literal
16987
data in the most appropriate place and possibly to combine identical
16988
literals.  For example, the code:
16989
 
16990
         entry sp, 40
16991
         .literal .L1, sym
16992
         l32r    a4, .L1
16993
 
16994
   can be used to load a pointer to the symbol `sym' into register
16995
`a4'.  The value of `sym' will not be placed between the `ENTRY' and
16996
`L32R' instructions; instead, the assembler puts the data in a literal
16997
pool.
16998
 
16999
   Literal pools are placed by default in separate literal sections;
17000
however, when using the `--text-section-literals' option (*note Command
17001
Line Options: Xtensa Options.), the literal pools for PC-relative mode
17002
`L32R' instructions are placed in the current section.(1) These text
17003
section literal pools are created automatically before `ENTRY'
17004
instructions and manually after `.literal_position' directives (*note
17005
literal_position: Literal Position Directive.).  If there are no
17006
preceding `ENTRY' instructions, explicit `.literal_position' directives
17007
must be used to place the text section literal pools; otherwise, `as'
17008
will report an error.
17009
 
17010
   When literals are placed in separate sections, the literal section
17011
names are derived from the names of the sections where the literals are
17012
defined.  The base literal section names are `.literal' for PC-relative
17013
mode `L32R' instructions and `.lit4' for absolute mode `L32R'
17014
instructions (*note absolute-literals: Absolute Literals Directive.).
17015
These base names are used for literals defined in the default `.text'
17016
section.  For literals defined in other sections or within the scope of
17017
a `literal_prefix' directive (*note literal_prefix: Literal Prefix
17018
Directive.), the following rules determine the literal section name:
17019
 
17020
  1. If the current section is a member of a section group, the literal
17021
     section name includes the group name as a suffix to the base
17022
     `.literal' or `.lit4' name, with a period to separate the base
17023
     name and group name.  The literal section is also made a member of
17024
     the group.
17025
 
17026
  2. If the current section name (or `literal_prefix' value) begins with
17027
     "`.gnu.linkonce.KIND.'", the literal section name is formed by
17028
     replacing "`.KIND'" with the base `.literal' or `.lit4' name.  For
17029
     example, for literals defined in a section named
17030
     `.gnu.linkonce.t.func', the literal section will be
17031
     `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'.
17032
 
17033
  3. If the current section name (or `literal_prefix' value) ends with
17034
     `.text', the literal section name is formed by replacing that
17035
     suffix with the base `.literal' or `.lit4' name.  For example, for
17036
     literals defined in a section named `.iram0.text', the literal
17037
     section will be `.iram0.literal' or `.iram0.lit4'.
17038
 
17039
  4. If none of the preceding conditions apply, the literal section
17040
     name is formed by adding the base `.literal' or `.lit4' name as a
17041
     suffix to the current section name (or `literal_prefix' value).
17042
 
17043
   ---------- Footnotes ----------
17044
 
17045
   (1) Literals for the `.init' and `.fini' sections are always placed
17046
in separate sections, even when `--text-section-literals' is enabled.
17047
 
17048

17049
File: as.info,  Node: Literal Position Directive,  Next: Literal Prefix Directive,  Prev: Literal Directive,  Up: Xtensa Directives
17050
 
17051
9.36.5.5 literal_position
17052
.........................
17053
 
17054
When using `--text-section-literals' to place literals inline in the
17055
section being assembled, the `.literal_position' directive can be used
17056
to mark a potential location for a literal pool.
17057
 
17058
         .literal_position
17059
 
17060
   The `.literal_position' directive is ignored when the
17061
`--text-section-literals' option is not used or when `L32R'
17062
instructions use the absolute addressing mode.
17063
 
17064
   The assembler will automatically place text section literal pools
17065
before `ENTRY' instructions, so the `.literal_position' directive is
17066
only needed to specify some other location for a literal pool.  You may
17067
need to add an explicit jump instruction to skip over an inline literal
17068
pool.
17069
 
17070
   For example, an interrupt vector does not begin with an `ENTRY'
17071
instruction so the assembler will be unable to automatically find a good
17072
place to put a literal pool.  Moreover, the code for the interrupt
17073
vector must be at a specific starting address, so the literal pool
17074
cannot come before the start of the code.  The literal pool for the
17075
vector must be explicitly positioned in the middle of the vector (before
17076
any uses of the literals, due to the negative offsets used by
17077
PC-relative `L32R' instructions).  The `.literal_position' directive
17078
can be used to do this.  In the following code, the literal for `M'
17079
will automatically be aligned correctly and is placed after the
17080
unconditional jump.
17081
 
17082
         .global M
17083
     code_start:
17084
         j continue
17085
         .literal_position
17086
         .align 4
17087
     continue:
17088
         movi    a4, M
17089
 
17090

17091
File: as.info,  Node: Literal Prefix Directive,  Next: Absolute Literals Directive,  Prev: Literal Position Directive,  Up: Xtensa Directives
17092
 
17093
9.36.5.6 literal_prefix
17094
.......................
17095
 
17096
The `literal_prefix' directive allows you to override the default
17097
literal section names, which are derived from the names of the sections
17098
where the literals are defined.
17099
 
17100
         .begin literal_prefix [NAME]
17101
         .end literal_prefix
17102
 
17103
   For literals defined within the delimited region, the literal section
17104
names are derived from the NAME argument instead of the name of the
17105
current section.  The rules used to derive the literal section names do
17106
not change.  *Note literal: Literal Directive.  If the NAME argument is
17107
omitted, the literal sections revert to the defaults.  This directive
17108
has no effect when using the `--text-section-literals' option (*note
17109
Command Line Options: Xtensa Options.).
17110
 
17111

17112
File: as.info,  Node: Absolute Literals Directive,  Prev: Literal Prefix Directive,  Up: Xtensa Directives
17113
 
17114
9.36.5.7 absolute-literals
17115
..........................
17116
 
17117
The `absolute-literals' and `no-absolute-literals' directives control
17118
the absolute vs. PC-relative mode for `L32R' instructions.  These are
17119
relevant only for Xtensa configurations that include the absolute
17120
addressing option for `L32R' instructions.
17121
 
17122
         .begin [no-]absolute-literals
17123
         .end [no-]absolute-literals
17124
 
17125
   These directives do not change the `L32R' mode--they only cause the
17126
assembler to emit the appropriate kind of relocation for `L32R'
17127
instructions and to place the literal values in the appropriate section.
17128
To change the `L32R' mode, the program must write the `LITBASE' special
17129
register.  It is the programmer's responsibility to keep track of the
17130
mode and indicate to the assembler which mode is used in each region of
17131
code.
17132
 
17133
   If the Xtensa configuration includes the absolute `L32R' addressing
17134
option, the default is to assume absolute `L32R' addressing unless the
17135
`--no-absolute-literals' command-line option is specified.  Otherwise,
17136
the default is to assume PC-relative `L32R' addressing.  The
17137
`absolute-literals' directive can then be used to override the default
17138
determined by the command-line options.
17139
 
17140

17141
File: as.info,  Node: Reporting Bugs,  Next: Acknowledgements,  Prev: Machine Dependencies,  Up: Top
17142
 
17143
10 Reporting Bugs
17144
*****************
17145
 
17146
Your bug reports play an essential role in making `as' reliable.
17147
 
17148
   Reporting a bug may help you by bringing a solution to your problem,
17149
or it may not.  But in any case the principal function of a bug report
17150
is to help the entire community by making the next version of `as' work
17151
better.  Bug reports are your contribution to the maintenance of `as'.
17152
 
17153
   In order for a bug report to serve its purpose, you must include the
17154
information that enables us to fix the bug.
17155
 
17156
* Menu:
17157
 
17158
* Bug Criteria::                Have you found a bug?
17159
* Bug Reporting::               How to report bugs
17160
 
17161

17162
File: as.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Reporting Bugs
17163
 
17164
10.1 Have You Found a Bug?
17165
==========================
17166
 
17167
If you are not sure whether you have found a bug, here are some
17168
guidelines:
17169
 
17170
   * If the assembler gets a fatal signal, for any input whatever, that
17171
     is a `as' bug.  Reliable assemblers never crash.
17172
 
17173
   * If `as' produces an error message for valid input, that is a bug.
17174
 
17175
   * If `as' does not produce an error message for invalid input, that
17176
     is a bug.  However, you should note that your idea of "invalid
17177
     input" might be our idea of "an extension" or "support for
17178
     traditional practice".
17179
 
17180
   * If you are an experienced user of assemblers, your suggestions for
17181
     improvement of `as' are welcome in any case.
17182
 
17183

17184
File: as.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Reporting Bugs
17185
 
17186
10.2 How to Report Bugs
17187
=======================
17188
 
17189
A number of companies and individuals offer support for GNU products.
17190
If you obtained `as' from a support organization, we recommend you
17191
contact that organization first.
17192
 
17193
   You can find contact information for many support companies and
17194
individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
17195
 
17196
   In any event, we also recommend that you send bug reports for `as'
17197
to `http://www.sourceware.org/bugzilla/'.
17198
 
17199
   The fundamental principle of reporting bugs usefully is this:
17200
*report all the facts*.  If you are not sure whether to state a fact or
17201
leave it out, state it!
17202
 
17203
   Often people omit facts because they think they know what causes the
17204
problem and assume that some details do not matter.  Thus, you might
17205
assume that the name of a symbol you use in an example does not matter.
17206
Well, probably it does not, but one cannot be sure.  Perhaps the bug
17207
is a stray memory reference which happens to fetch from the location
17208
where that name is stored in memory; perhaps, if the name were
17209
different, the contents of that location would fool the assembler into
17210
doing the right thing despite the bug.  Play it safe and give a
17211
specific, complete example.  That is the easiest thing for you to do,
17212
and the most helpful.
17213
 
17214
   Keep in mind that the purpose of a bug report is to enable us to fix
17215
the bug if it is new to us.  Therefore, always write your bug reports
17216
on the assumption that the bug has not been reported previously.
17217
 
17218
   Sometimes people give a few sketchy facts and ask, "Does this ring a
17219
bell?"  This cannot help us fix a bug, so it is basically useless.  We
17220
respond by asking for enough details to enable us to investigate.  You
17221
might as well expedite matters by sending them to begin with.
17222
 
17223
   To enable us to fix the bug, you should include all these things:
17224
 
17225
   * The version of `as'.  `as' announces it if you start it with the
17226
     `--version' argument.
17227
 
17228
     Without this, we will not know whether there is any point in
17229
     looking for the bug in the current version of `as'.
17230
 
17231
   * Any patches you may have applied to the `as' source.
17232
 
17233
   * The type of machine you are using, and the operating system name
17234
     and version number.
17235
 
17236
   * What compiler (and its version) was used to compile `as'--e.g.
17237
     "`gcc-2.7'".
17238
 
17239
   * The command arguments you gave the assembler to assemble your
17240
     example and observe the bug.  To guarantee you will not omit
17241
     something important, list them all.  A copy of the Makefile (or
17242
     the output from make) is sufficient.
17243
 
17244
     If we were to try to guess the arguments, we would probably guess
17245
     wrong and then we might not encounter the bug.
17246
 
17247
   * A complete input file that will reproduce the bug.  If the bug is
17248
     observed when the assembler is invoked via a compiler, send the
17249
     assembler source, not the high level language source.  Most
17250
     compilers will produce the assembler source when run with the `-S'
17251
     option.  If you are using `gcc', use the options `-v
17252
     --save-temps'; this will save the assembler source in a file with
17253
     an extension of `.s', and also show you exactly how `as' is being
17254
     run.
17255
 
17256
   * A description of what behavior you observe that you believe is
17257
     incorrect.  For example, "It gets a fatal signal."
17258
 
17259
     Of course, if the bug is that `as' gets a fatal signal, then we
17260
     will certainly notice it.  But if the bug is incorrect output, we
17261
     might not notice unless it is glaringly wrong.  You might as well
17262
     not give us a chance to make a mistake.
17263
 
17264
     Even if the problem you experience is a fatal signal, you should
17265
     still say so explicitly.  Suppose something strange is going on,
17266
     such as, your copy of `as' is out of sync, or you have encountered
17267
     a bug in the C library on your system.  (This has happened!)  Your
17268
     copy might crash and ours would not.  If you told us to expect a
17269
     crash, then when ours fails to crash, we would know that the bug
17270
     was not happening for us.  If you had not told us to expect a
17271
     crash, then we would not be able to draw any conclusion from our
17272
     observations.
17273
 
17274
   * If you wish to suggest changes to the `as' source, send us context
17275
     diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
17276
     Always send diffs from the old file to the new file.  If you even
17277
     discuss something in the `as' source, refer to it by context, not
17278
     by line number.
17279
 
17280
     The line numbers in our development sources will not match those
17281
     in your sources.  Your line numbers would convey no useful
17282
     information to us.
17283
 
17284
   Here are some things that are not necessary:
17285
 
17286
   * A description of the envelope of the bug.
17287
 
17288
     Often people who encounter a bug spend a lot of time investigating
17289
     which changes to the input file will make the bug go away and which
17290
     changes will not affect it.
17291
 
17292
     This is often time consuming and not very useful, because the way
17293
     we will find the bug is by running a single example under the
17294
     debugger with breakpoints, not by pure deduction from a series of
17295
     examples.  We recommend that you save your time for something else.
17296
 
17297
     Of course, if you can find a simpler example to report _instead_
17298
     of the original one, that is a convenience for us.  Errors in the
17299
     output will be easier to spot, running under the debugger will take
17300
     less time, and so on.
17301
 
17302
     However, simplification is not vital; if you do not want to do
17303
     this, report the bug anyway and send us the entire test case you
17304
     used.
17305
 
17306
   * A patch for the bug.
17307
 
17308
     A patch for the bug does help us if it is a good one.  But do not
17309
     omit the necessary information, such as the test case, on the
17310
     assumption that a patch is all we need.  We might see problems
17311
     with your patch and decide to fix the problem another way, or we
17312
     might not understand it at all.
17313
 
17314
     Sometimes with a program as complicated as `as' it is very hard to
17315
     construct an example that will make the program follow a certain
17316
     path through the code.  If you do not send us the example, we will
17317
     not be able to construct one, so we will not be able to verify
17318
     that the bug is fixed.
17319
 
17320
     And if we cannot understand what bug you are trying to fix, or why
17321
     your patch should be an improvement, we will not install it.  A
17322
     test case will help us to understand.
17323
 
17324
   * A guess about what the bug is or what it depends on.
17325
 
17326
     Such guesses are usually wrong.  Even we cannot guess right about
17327
     such things without first using the debugger to find the facts.
17328
 
17329

17330
File: as.info,  Node: Acknowledgements,  Next: GNU Free Documentation License,  Prev: Reporting Bugs,  Up: Top
17331
 
17332
11 Acknowledgements
17333
*******************
17334
 
17335
If you have contributed to GAS and your name isn't listed here, it is
17336
not meant as a slight.  We just don't know about it.  Send mail to the
17337
maintainer, and we'll correct the situation.  Currently the maintainer
17338
is Ken Raeburn (email address `raeburn@cygnus.com').
17339
 
17340
   Dean Elsner wrote the original GNU assembler for the VAX.(1)
17341
 
17342
   Jay Fenlason maintained GAS for a while, adding support for
17343
GDB-specific debug information and the 68k series machines, most of the
17344
preprocessing pass, and extensive changes in `messages.c',
17345
`input-file.c', `write.c'.
17346
 
17347
   K. Richard Pixley maintained GAS for a while, adding various
17348
enhancements and many bug fixes, including merging support for several
17349
processors, breaking GAS up to handle multiple object file format back
17350
ends (including heavy rewrite, testing, an integration of the coff and
17351
b.out back ends), adding configuration including heavy testing and
17352
verification of cross assemblers and file splits and renaming,
17353
converted GAS to strictly ANSI C including full prototypes, added
17354
support for m680[34]0 and cpu32, did considerable work on i960
17355
including a COFF port (including considerable amounts of reverse
17356
engineering), a SPARC opcode file rewrite, DECstation, rs6000, and
17357
hp300hpux host ports, updated "know" assertions and made them work,
17358
much other reorganization, cleanup, and lint.
17359
 
17360
   Ken Raeburn wrote the high-level BFD interface code to replace most
17361
of the code in format-specific I/O modules.
17362
 
17363
   The original VMS support was contributed by David L. Kashtan.  Eric
17364
Youngdale has done much work with it since.
17365
 
17366
   The Intel 80386 machine description was written by Eliot Dresselhaus.
17367
 
17368
   Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
17369
 
17370
   The Motorola 88k machine description was contributed by Devon Bowen
17371
of Buffalo University and Torbjorn Granlund of the Swedish Institute of
17372
Computer Science.
17373
 
17374
   Keith Knowles at the Open Software Foundation wrote the original
17375
MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format
17376
support (which hasn't been merged in yet).  Ralph Campbell worked with
17377
the MIPS code to support a.out format.
17378
 
17379
   Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
17380
tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
17381
Steve Chamberlain of Cygnus Support.  Steve also modified the COFF back
17382
end to use BFD for some low-level operations, for use with the H8/300
17383
and AMD 29k targets.
17384
 
17385
   John Gilmore built the AMD 29000 support, added `.include' support,
17386
and simplified the configuration of which versions accept which
17387
directives.  He updated the 68k machine description so that Motorola's
17388
opcodes always produced fixed-size instructions (e.g., `jsr'), while
17389
synthetic instructions remained shrinkable (`jbsr').  John fixed many
17390
bugs, including true tested cross-compilation support, and one bug in
17391
relaxation that took a week and required the proverbial one-bit fix.
17392
 
17393
   Ian Lance Taylor of Cygnus Support merged the Motorola and MIT
17394
syntax for the 68k, completed support for some COFF targets (68k, i386
17395
SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets,
17396
wrote the initial RS/6000 and PowerPC assembler, and made a few other
17397
minor patches.
17398
 
17399
   Steve Chamberlain made GAS able to generate listings.
17400
 
17401
   Hewlett-Packard contributed support for the HP9000/300.
17402
 
17403
   Jeff Law wrote GAS and BFD support for the native HPPA object format
17404
(SOM) along with a fairly extensive HPPA testsuite (for both SOM and
17405
ELF object formats).  This work was supported by both the Center for
17406
Software Science at the University of Utah and Cygnus Support.
17407
 
17408
   Support for ELF format files has been worked on by Mark Eichin of
17409
Cygnus Support (original, incomplete implementation for SPARC), Pete
17410
Hoogenboom and Jeff Law at the University of Utah (HPPA mainly),
17411
Michael Meissner of the Open Software Foundation (i386 mainly), and Ken
17412
Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
17413
 
17414
   Linas Vepstas added GAS support for the ESA/390 "IBM 370"
17415
architecture.
17416
 
17417
   Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote
17418
GAS and BFD support for openVMS/Alpha.
17419
 
17420
   Timothy Wall, Michael Hayes, and Greg Smart contributed to the
17421
various tic* flavors.
17422
 
17423
   David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from
17424
Tensilica, Inc. added support for Xtensa processors.
17425
 
17426
   Several engineers at Cygnus Support have also provided many small
17427
bug fixes and configuration enhancements.
17428
 
17429
   Many others have contributed large or small bugfixes and
17430
enhancements.  If you have contributed significant work and are not
17431
mentioned on this list, and want to be, let us know.  Some of the
17432
history has been lost; we are not intentionally leaving anyone out.
17433
 
17434
   ---------- Footnotes ----------
17435
 
17436
   (1) Any more details?
17437
 
17438

17439
File: as.info,  Node: GNU Free Documentation License,  Next: AS Index,  Prev: Acknowledgements,  Up: Top
17440
 
17441
Appendix A GNU Free Documentation License
17442
*****************************************
17443
 
17444
                        Version 1.1, March 2000
17445
 
17446
     Copyright (C) 2000, 2003 Free Software Foundation, Inc.
17447
     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
17448
 
17449
     Everyone is permitted to copy and distribute verbatim copies
17450
     of this license document, but changing it is not allowed.
17451
 
17452
 
17453
  0. PREAMBLE
17454
 
17455
     The purpose of this License is to make a manual, textbook, or other
17456
     written document "free" in the sense of freedom: to assure everyone
17457
     the effective freedom to copy and redistribute it, with or without
17458
     modifying it, either commercially or noncommercially.  Secondarily,
17459
     this License preserves for the author and publisher a way to get
17460
     credit for their work, while not being considered responsible for
17461
     modifications made by others.
17462
 
17463
     This License is a kind of "copyleft", which means that derivative
17464
     works of the document must themselves be free in the same sense.
17465
     It complements the GNU General Public License, which is a copyleft
17466
     license designed for free software.
17467
 
17468
     We have designed this License in order to use it for manuals for
17469
     free software, because free software needs free documentation: a
17470
     free program should come with manuals providing the same freedoms
17471
     that the software does.  But this License is not limited to
17472
     software manuals; it can be used for any textual work, regardless
17473
     of subject matter or whether it is published as a printed book.
17474
     We recommend this License principally for works whose purpose is
17475
     instruction or reference.
17476
 
17477
 
17478
  1. APPLICABILITY AND DEFINITIONS
17479
 
17480
     This License applies to any manual or other work that contains a
17481
     notice placed by the copyright holder saying it can be distributed
17482
     under the terms of this License.  The "Document", below, refers to
17483
     any such manual or work.  Any member of the public is a licensee,
17484
     and is addressed as "you."
17485
 
17486
     A "Modified Version" of the Document means any work containing the
17487
     Document or a portion of it, either copied verbatim, or with
17488
     modifications and/or translated into another language.
17489
 
17490
     A "Secondary Section" is a named appendix or a front-matter
17491
     section of the Document that deals exclusively with the
17492
     relationship of the publishers or authors of the Document to the
17493
     Document's overall subject (or to related matters) and contains
17494
     nothing that could fall directly within that overall subject.
17495
     (For example, if the Document is in part a textbook of
17496
     mathematics, a Secondary Section may not explain any mathematics.)
17497
     The relationship could be a matter of historical connection with
17498
     the subject or with related matters, or of legal, commercial,
17499
     philosophical, ethical or political position regarding them.
17500
 
17501
     The "Invariant Sections" are certain Secondary Sections whose
17502
     titles are designated, as being those of Invariant Sections, in
17503
     the notice that says that the Document is released under this
17504
     License.
17505
 
17506
     The "Cover Texts" are certain short passages of text that are
17507
     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
17508
     that says that the Document is released under this License.
17509
 
17510
     A "Transparent" copy of the Document means a machine-readable copy,
17511
     represented in a format whose specification is available to the
17512
     general public, whose contents can be viewed and edited directly
17513
     and straightforwardly with generic text editors or (for images
17514
     composed of pixels) generic paint programs or (for drawings) some
17515
     widely available drawing editor, and that is suitable for input to
17516
     text formatters or for automatic translation to a variety of
17517
     formats suitable for input to text formatters.  A copy made in an
17518
     otherwise Transparent file format whose markup has been designed
17519
     to thwart or discourage subsequent modification by readers is not
17520
     Transparent.  A copy that is not "Transparent" is called "Opaque."
17521
 
17522
     Examples of suitable formats for Transparent copies include plain
17523
     ASCII without markup, Texinfo input format, LaTeX input format,
17524
     SGML or XML using a publicly available DTD, and
17525
     standard-conforming simple HTML designed for human modification.
17526
     Opaque formats include PostScript, PDF, proprietary formats that
17527
     can be read and edited only by proprietary word processors, SGML
17528
     or XML for which the DTD and/or processing tools are not generally
17529
     available, and the machine-generated HTML produced by some word
17530
     processors for output purposes only.
17531
 
17532
     The "Title Page" means, for a printed book, the title page itself,
17533
     plus such following pages as are needed to hold, legibly, the
17534
     material this License requires to appear in the title page.  For
17535
     works in formats which do not have any title page as such, "Title
17536
     Page" means the text near the most prominent appearance of the
17537
     work's title, preceding the beginning of the body of the text.
17538
 
17539
  2. VERBATIM COPYING
17540
 
17541
     You may copy and distribute the Document in any medium, either
17542
     commercially or noncommercially, provided that this License, the
17543
     copyright notices, and the license notice saying this License
17544
     applies to the Document are reproduced in all copies, and that you
17545
     add no other conditions whatsoever to those of this License.  You
17546
     may not use technical measures to obstruct or control the reading
17547
     or further copying of the copies you make or distribute.  However,
17548
     you may accept compensation in exchange for copies.  If you
17549
     distribute a large enough number of copies you must also follow
17550
     the conditions in section 3.
17551
 
17552
     You may also lend copies, under the same conditions stated above,
17553
     and you may publicly display copies.
17554
 
17555
  3. COPYING IN QUANTITY
17556
 
17557
     If you publish printed copies of the Document numbering more than
17558
     100, and the Document's license notice requires Cover Texts, you
17559
     must enclose the copies in covers that carry, clearly and legibly,
17560
     all these Cover Texts: Front-Cover Texts on the front cover, and
17561
     Back-Cover Texts on the back cover.  Both covers must also clearly
17562
     and legibly identify you as the publisher of these copies.  The
17563
     front cover must present the full title with all words of the
17564
     title equally prominent and visible.  You may add other material
17565
     on the covers in addition.  Copying with changes limited to the
17566
     covers, as long as they preserve the title of the Document and
17567
     satisfy these conditions, can be treated as verbatim copying in
17568
     other respects.
17569
 
17570
     If the required texts for either cover are too voluminous to fit
17571
     legibly, you should put the first ones listed (as many as fit
17572
     reasonably) on the actual cover, and continue the rest onto
17573
     adjacent pages.
17574
 
17575
     If you publish or distribute Opaque copies of the Document
17576
     numbering more than 100, you must either include a
17577
     machine-readable Transparent copy along with each Opaque copy, or
17578
     state in or with each Opaque copy a publicly-accessible
17579
     computer-network location containing a complete Transparent copy
17580
     of the Document, free of added material, which the general
17581
     network-using public has access to download anonymously at no
17582
     charge using public-standard network protocols.  If you use the
17583
     latter option, you must take reasonably prudent steps, when you
17584
     begin distribution of Opaque copies in quantity, to ensure that
17585
     this Transparent copy will remain thus accessible at the stated
17586
     location until at least one year after the last time you
17587
     distribute an Opaque copy (directly or through your agents or
17588
     retailers) of that edition to the public.
17589
 
17590
     It is requested, but not required, that you contact the authors of
17591
     the Document well before redistributing any large number of
17592
     copies, to give them a chance to provide you with an updated
17593
     version of the Document.
17594
 
17595
  4. MODIFICATIONS
17596
 
17597
     You may copy and distribute a Modified Version of the Document
17598
     under the conditions of sections 2 and 3 above, provided that you
17599
     release the Modified Version under precisely this License, with
17600
     the Modified Version filling the role of the Document, thus
17601
     licensing distribution and modification of the Modified Version to
17602
     whoever possesses a copy of it.  In addition, you must do these
17603
     things in the Modified Version:
17604
 
17605
     A. Use in the Title Page (and on the covers, if any) a title
17606
     distinct    from that of the Document, and from those of previous
17607
     versions    (which should, if there were any, be listed in the
17608
     History section    of the Document).  You may use the same title
17609
     as a previous version    if the original publisher of that version
17610
     gives permission.
17611
     B. List on the Title Page, as authors, one or more persons or
17612
     entities    responsible for authorship of the modifications in the
17613
     Modified    Version, together with at least five of the principal
17614
     authors of the    Document (all of its principal authors, if it
17615
     has less than five).
17616
     C. State on the Title page the name of the publisher of the
17617
     Modified Version, as the publisher.
17618
     D. Preserve all the copyright notices of the Document.
17619
     E. Add an appropriate copyright notice for your modifications
17620
     adjacent to the other copyright notices.
17621
     F. Include, immediately after the copyright notices, a license
17622
     notice    giving the public permission to use the Modified Version
17623
     under the    terms of this License, in the form shown in the
17624
     Addendum below.
17625
     G. Preserve in that license notice the full lists of Invariant
17626
     Sections    and required Cover Texts given in the Document's
17627
     license notice.
17628
     H. Include an unaltered copy of this License.
17629
     I. Preserve the section entitled "History", and its title, and add
17630
     to    it an item stating at least the title, year, new authors, and
17631
       publisher of the Modified Version as given on the Title Page.
17632
     If    there is no section entitled "History" in the Document,
17633
     create one    stating the title, year, authors, and publisher of
17634
     the Document as    given on its Title Page, then add an item
17635
     describing the Modified    Version as stated in the previous
17636
     sentence.
17637
     J. Preserve the network location, if any, given in the Document for
17638
       public access to a Transparent copy of the Document, and
17639
     likewise    the network locations given in the Document for
17640
     previous versions    it was based on.  These may be placed in the
17641
     "History" section.     You may omit a network location for a work
17642
     that was published at    least four years before the Document
17643
     itself, or if the original    publisher of the version it refers
17644
     to gives permission.
17645
     K. In any section entitled "Acknowledgements" or "Dedications",
17646
     preserve the section's title, and preserve in the section all the
17647
      substance and tone of each of the contributor acknowledgements
17648
     and/or dedications given therein.
17649
     L. Preserve all the Invariant Sections of the Document,
17650
     unaltered in their text and in their titles.  Section numbers
17651
     or the equivalent are not considered part of the section titles.
17652
     M. Delete any section entitled "Endorsements."  Such a section
17653
     may not be included in the Modified Version.
17654
     N. Do not retitle any existing section as "Endorsements"    or to
17655
     conflict in title with any Invariant Section.
17656
 
17657
     If the Modified Version includes new front-matter sections or
17658
     appendices that qualify as Secondary Sections and contain no
17659
     material copied from the Document, you may at your option
17660
     designate some or all of these sections as invariant.  To do this,
17661
     add their titles to the list of Invariant Sections in the Modified
17662
     Version's license notice.  These titles must be distinct from any
17663
     other section titles.
17664
 
17665
     You may add a section entitled "Endorsements", provided it contains
17666
     nothing but endorsements of your Modified Version by various
17667
     parties-for example, statements of peer review or that the text has
17668
     been approved by an organization as the authoritative definition
17669
     of a standard.
17670
 
17671
     You may add a passage of up to five words as a Front-Cover Text,
17672
     and a passage of up to 25 words as a Back-Cover Text, to the end
17673
     of the list of Cover Texts in the Modified Version.  Only one
17674
     passage of Front-Cover Text and one of Back-Cover Text may be
17675
     added by (or through arrangements made by) any one entity.  If the
17676
     Document already includes a cover text for the same cover,
17677
     previously added by you or by arrangement made by the same entity
17678
     you are acting on behalf of, you may not add another; but you may
17679
     replace the old one, on explicit permission from the previous
17680
     publisher that added the old one.
17681
 
17682
     The author(s) and publisher(s) of the Document do not by this
17683
     License give permission to use their names for publicity for or to
17684
     assert or imply endorsement of any Modified Version.
17685
 
17686
  5. COMBINING DOCUMENTS
17687
 
17688
     You may combine the Document with other documents released under
17689
     this License, under the terms defined in section 4 above for
17690
     modified versions, provided that you include in the combination
17691
     all of the Invariant Sections of all of the original documents,
17692
     unmodified, and list them all as Invariant Sections of your
17693
     combined work in its license notice.
17694
 
17695
     The combined work need only contain one copy of this License, and
17696
     multiple identical Invariant Sections may be replaced with a single
17697
     copy.  If there are multiple Invariant Sections with the same name
17698
     but different contents, make the title of each such section unique
17699
     by adding at the end of it, in parentheses, the name of the
17700
     original author or publisher of that section if known, or else a
17701
     unique number.  Make the same adjustment to the section titles in
17702
     the list of Invariant Sections in the license notice of the
17703
     combined work.
17704
 
17705
     In the combination, you must combine any sections entitled
17706
     "History" in the various original documents, forming one section
17707
     entitled "History"; likewise combine any sections entitled
17708
     "Acknowledgements", and any sections entitled "Dedications."  You
17709
     must delete all sections entitled "Endorsements."
17710
 
17711
  6. COLLECTIONS OF DOCUMENTS
17712
 
17713
     You may make a collection consisting of the Document and other
17714
     documents released under this License, and replace the individual
17715
     copies of this License in the various documents with a single copy
17716
     that is included in the collection, provided that you follow the
17717
     rules of this License for verbatim copying of each of the
17718
     documents in all other respects.
17719
 
17720
     You may extract a single document from such a collection, and
17721
     distribute it individually under this License, provided you insert
17722
     a copy of this License into the extracted document, and follow
17723
     this License in all other respects regarding verbatim copying of
17724
     that document.
17725
 
17726
  7. AGGREGATION WITH INDEPENDENT WORKS
17727
 
17728
     A compilation of the Document or its derivatives with other
17729
     separate and independent documents or works, in or on a volume of
17730
     a storage or distribution medium, does not as a whole count as a
17731
     Modified Version of the Document, provided no compilation
17732
     copyright is claimed for the compilation.  Such a compilation is
17733
     called an "aggregate", and this License does not apply to the
17734
     other self-contained works thus compiled with the Document, on
17735
     account of their being thus compiled, if they are not themselves
17736
     derivative works of the Document.
17737
 
17738
     If the Cover Text requirement of section 3 is applicable to these
17739
     copies of the Document, then if the Document is less than one
17740
     quarter of the entire aggregate, the Document's Cover Texts may be
17741
     placed on covers that surround only the Document within the
17742
     aggregate.  Otherwise they must appear on covers around the whole
17743
     aggregate.
17744
 
17745
  8. TRANSLATION
17746
 
17747
     Translation is considered a kind of modification, so you may
17748
     distribute translations of the Document under the terms of section
17749
     4.  Replacing Invariant Sections with translations requires special
17750
     permission from their copyright holders, but you may include
17751
     translations of some or all Invariant Sections in addition to the
17752
     original versions of these Invariant Sections.  You may include a
17753
     translation of this License provided that you also include the
17754
     original English version of this License.  In case of a
17755
     disagreement between the translation and the original English
17756
     version of this License, the original English version will prevail.
17757
 
17758
  9. TERMINATION
17759
 
17760
     You may not copy, modify, sublicense, or distribute the Document
17761
     except as expressly provided for under this License.  Any other
17762
     attempt to copy, modify, sublicense or distribute the Document is
17763
     void, and will automatically terminate your rights under this
17764
     License.  However, parties who have received copies, or rights,
17765
     from you under this License will not have their licenses
17766
     terminated so long as such parties remain in full compliance.
17767
 
17768
 10. FUTURE REVISIONS OF THIS LICENSE
17769
 
17770
     The Free Software Foundation may publish new, revised versions of
17771
     the GNU Free Documentation License from time to time.  Such new
17772
     versions will be similar in spirit to the present version, but may
17773
     differ in detail to address new problems or concerns.  See
17774
     http://www.gnu.org/copyleft/.
17775
 
17776
     Each version of the License is given a distinguishing version
17777
     number.  If the Document specifies that a particular numbered
17778
     version of this License "or any later version" applies to it, you
17779
     have the option of following the terms and conditions either of
17780
     that specified version or of any later version that has been
17781
     published (not as a draft) by the Free Software Foundation.  If
17782
     the Document does not specify a version number of this License,
17783
     you may choose any version ever published (not as a draft) by the
17784
     Free Software Foundation.
17785
 
17786
 
17787
ADDENDUM: How to use this License for your documents
17788
====================================================
17789
 
17790
To use this License in a document you have written, include a copy of
17791
the License in the document and put the following copyright and license
17792
notices just after the title page:
17793
 
17794
     Copyright (C)  YEAR  YOUR NAME.
17795
     Permission is granted to copy, distribute and/or modify this document
17796
     under the terms of the GNU Free Documentation License, Version 1.1
17797
     or any later version published by the Free Software Foundation;
17798
     with the Invariant Sections being LIST THEIR TITLES, with the
17799
     Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
17800
     A copy of the license is included in the section entitled "GNU
17801
     Free Documentation License."
17802
 
17803
   If you have no Invariant Sections, write "with no Invariant Sections"
17804
instead of saying which ones are invariant.  If you have no Front-Cover
17805
Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being
17806
LIST"; likewise for Back-Cover Texts.
17807
 
17808
   If your document contains nontrivial examples of program code, we
17809
recommend releasing these examples in parallel under your choice of
17810
free software license, such as the GNU General Public License, to
17811
permit their use in free software.
17812
 
17813

17814
File: as.info,  Node: AS Index,  Prev: GNU Free Documentation License,  Up: Top
17815
 
17816
AS Index
17817
********
17818
 
17819
 
17820
* Menu:
17821
17822
* #:                                     Comments.            (line  38)
17823
* #APP:                                  Preprocessing.       (line  27)
17824
* #NO_APP:                               Preprocessing.       (line  27)
17825
* $ in symbol names <1>:                 SH64-Chars.          (line  10)
17826
* $ in symbol names <2>:                 SH-Chars.            (line  10)
17827
* $ in symbol names <3>:                 D30V-Chars.          (line  63)
17828
* $ in symbol names:                     D10V-Chars.          (line  46)
17829
* $a:                                    ARM Mapping Symbols. (line   9)
17830
* $acos math builtin, TIC54X:            TIC54X-Builtins.     (line  10)
17831
* $asin math builtin, TIC54X:            TIC54X-Builtins.     (line  13)
17832
* $atan math builtin, TIC54X:            TIC54X-Builtins.     (line  16)
17833
* $atan2 math builtin, TIC54X:           TIC54X-Builtins.     (line  19)
17834
* $ceil math builtin, TIC54X:            TIC54X-Builtins.     (line  22)
17835
* $cos math builtin, TIC54X:             TIC54X-Builtins.     (line  28)
17836
* $cosh math builtin, TIC54X:            TIC54X-Builtins.     (line  25)
17837
* $cvf math builtin, TIC54X:             TIC54X-Builtins.     (line  31)
17838
* $cvi math builtin, TIC54X:             TIC54X-Builtins.     (line  34)
17839
* $d:                                    ARM Mapping Symbols. (line  15)
17840
* $exp math builtin, TIC54X:             TIC54X-Builtins.     (line  37)
17841
* $fabs math builtin, TIC54X:            TIC54X-Builtins.     (line  40)
17842
* $firstch subsym builtin, TIC54X:       TIC54X-Macros.       (line  26)
17843
* $floor math builtin, TIC54X:           TIC54X-Builtins.     (line  43)
17844
* $fmod math builtin, TIC54X:            TIC54X-Builtins.     (line  47)
17845
* $int math builtin, TIC54X:             TIC54X-Builtins.     (line  50)
17846
* $iscons subsym builtin, TIC54X:        TIC54X-Macros.       (line  43)
17847
* $isdefed subsym builtin, TIC54X:       TIC54X-Macros.       (line  34)
17848
* $ismember subsym builtin, TIC54X:      TIC54X-Macros.       (line  38)
17849
* $isname subsym builtin, TIC54X:        TIC54X-Macros.       (line  47)
17850
* $isreg subsym builtin, TIC54X:         TIC54X-Macros.       (line  50)
17851
* $lastch subsym builtin, TIC54X:        TIC54X-Macros.       (line  30)
17852
* $ldexp math builtin, TIC54X:           TIC54X-Builtins.     (line  53)
17853
* $log math builtin, TIC54X:             TIC54X-Builtins.     (line  59)
17854
* $log10 math builtin, TIC54X:           TIC54X-Builtins.     (line  56)
17855
* $max math builtin, TIC54X:             TIC54X-Builtins.     (line  62)
17856
* $min math builtin, TIC54X:             TIC54X-Builtins.     (line  65)
17857
* $pow math builtin, TIC54X:             TIC54X-Builtins.     (line  68)
17858
* $round math builtin, TIC54X:           TIC54X-Builtins.     (line  71)
17859
* $sgn math builtin, TIC54X:             TIC54X-Builtins.     (line  74)
17860
* $sin math builtin, TIC54X:             TIC54X-Builtins.     (line  77)
17861
* $sinh math builtin, TIC54X:            TIC54X-Builtins.     (line  80)
17862
* $sqrt math builtin, TIC54X:            TIC54X-Builtins.     (line  83)
17863
* $structacc subsym builtin, TIC54X:     TIC54X-Macros.       (line  57)
17864
* $structsz subsym builtin, TIC54X:      TIC54X-Macros.       (line  54)
17865
* $symcmp subsym builtin, TIC54X:        TIC54X-Macros.       (line  23)
17866
* $symlen subsym builtin, TIC54X:        TIC54X-Macros.       (line  20)
17867
* $t:                                    ARM Mapping Symbols. (line  12)
17868
* $tan math builtin, TIC54X:             TIC54X-Builtins.     (line  86)
17869
* $tanh math builtin, TIC54X:            TIC54X-Builtins.     (line  89)
17870
* $trunc math builtin, TIC54X:           TIC54X-Builtins.     (line  92)
17871
* -+ option, VAX/VMS:                    VAX-Opts.            (line  71)
17872
* --:                                    Command Line.        (line  10)
17873
* --32 option, i386:                     i386-Options.        (line   8)
17874
* --32 option, x86-64:                   i386-Options.        (line   8)
17875
* --64 option, i386:                     i386-Options.        (line   8)
17876
* --64 option, x86-64:                   i386-Options.        (line   8)
17877
* --absolute-literals:                   Xtensa Options.      (line  23)
17878
* --allow-reg-prefix:                    SH Options.          (line   9)
17879
* --alternate:                           alternate.           (line   6)
17880
* --base-size-default-16:                M68K-Opts.           (line  71)
17881
* --base-size-default-32:                M68K-Opts.           (line  71)
17882
* --big:                                 SH Options.          (line   9)
17883
* --bitwise-or option, M680x0:           M68K-Opts.           (line  64)
17884
* --disp-size-default-16:                M68K-Opts.           (line  80)
17885
* --disp-size-default-32:                M68K-Opts.           (line  80)
17886
* --divide option, i386:                 i386-Options.        (line  24)
17887
* --dsp:                                 SH Options.          (line   9)
17888
* --emulation=crisaout command line option, CRIS: CRIS-Opts.  (line   9)
17889
* --emulation=criself command line option, CRIS: CRIS-Opts.   (line   9)
17890
* --enforce-aligned-data:                Sparc-Aligned-Data.  (line  11)
17891
* --fatal-warnings:                      W.                   (line  16)
17892
* --fix-v4bx command line option, ARM:   ARM Options.         (line 126)
17893
* --fixed-special-register-names command line option, MMIX: MMIX-Opts.
17894
                                                              (line   8)
17895
* --force-long-branches:                 M68HC11-Opts.        (line  69)
17896
* --generate-example:                    M68HC11-Opts.        (line  86)
17897
* --globalize-symbols command line option, MMIX: MMIX-Opts.   (line  12)
17898
* --gnu-syntax command line option, MMIX: MMIX-Opts.          (line  16)
17899
* --hash-size=NUMBER:                    Overview.            (line 314)
17900
* --linker-allocated-gregs command line option, MMIX: MMIX-Opts.
17901
                                                              (line  67)
17902
* --listing-cont-lines:                  listing.             (line  34)
17903
* --listing-lhs-width:                   listing.             (line  16)
17904
* --listing-lhs-width2:                  listing.             (line  21)
17905
* --listing-rhs-width:                   listing.             (line  28)
17906
* --little:                              SH Options.          (line   9)
17907
* --longcalls:                           Xtensa Options.      (line  37)
17908
* --march=ARCHITECTURE command line option, CRIS: CRIS-Opts.  (line  33)
17909
* --MD:                                  MD.                  (line   6)
17910
* --mul-bug-abort command line option, CRIS: CRIS-Opts.       (line  61)
17911
* --no-absolute-literals:                Xtensa Options.      (line  23)
17912
* --no-expand command line option, MMIX: MMIX-Opts.           (line  31)
17913
* --no-longcalls:                        Xtensa Options.      (line  37)
17914
* --no-merge-gregs command line option, MMIX: MMIX-Opts.      (line  36)
17915
* --no-mul-bug-abort command line option, CRIS: CRIS-Opts.    (line  61)
17916
* --no-predefined-syms command line option, MMIX: MMIX-Opts.  (line  22)
17917
* --no-pushj-stubs command line option, MMIX: MMIX-Opts.      (line  54)
17918
* --no-stubs command line option, MMIX:  MMIX-Opts.           (line  54)
17919
* --no-target-align:                     Xtensa Options.      (line  30)
17920
* --no-text-section-literals:            Xtensa Options.      (line   9)
17921
* --no-transform:                        Xtensa Options.      (line  46)
17922
* --no-underscore command line option, CRIS: CRIS-Opts.       (line  15)
17923
* --no-warn:                             W.                   (line  11)
17924
* --pcrel:                               M68K-Opts.           (line  92)
17925
* --pic command line option, CRIS:       CRIS-Opts.           (line  27)
17926
* --print-insn-syntax:                   M68HC11-Opts.        (line  75)
17927
* --print-opcodes:                       M68HC11-Opts.        (line  79)
17928
* --register-prefix-optional option, M680x0: M68K-Opts.       (line  51)
17929
* --relax:                               SH Options.          (line   9)
17930
* --relax command line option, MMIX:     MMIX-Opts.           (line  19)
17931
* --rename-section:                      Xtensa Options.      (line  54)
17932
* --renesas:                             SH Options.          (line   9)
17933
* --short-branches:                      M68HC11-Opts.        (line  54)
17934
* --small:                               SH Options.          (line   9)
17935
* --statistics:                          statistics.          (line   6)
17936
* --strict-direct-mode:                  M68HC11-Opts.        (line  44)
17937
* --target-align:                        Xtensa Options.      (line  30)
17938
* --text-section-literals:               Xtensa Options.      (line   9)
17939
* --traditional-format:                  traditional-format.  (line   6)
17940
* --transform:                           Xtensa Options.      (line  46)
17941
* --underscore command line option, CRIS: CRIS-Opts.          (line  15)
17942
* --warn:                                W.                   (line  19)
17943
* -1 option, VAX/VMS:                    VAX-Opts.            (line  77)
17944
* -32addr command line option, Alpha:    Alpha Options.       (line  50)
17945
* -a:                                    a.                   (line   6)
17946
* -A options, i960:                      Options-i960.        (line   6)
17947
* -ac:                                   a.                   (line   6)
17948
* -ad:                                   a.                   (line   6)
17949
* -ag:                                   a.                   (line   6)
17950
* -ah:                                   a.                   (line   6)
17951
* -al:                                   a.                   (line   6)
17952
* -an:                                   a.                   (line   6)
17953
* -as:                                   a.                   (line   6)
17954
* -Asparclet:                            Sparc-Opts.          (line  25)
17955
* -Asparclite:                           Sparc-Opts.          (line  25)
17956
* -Av6:                                  Sparc-Opts.          (line  25)
17957
* -Av8:                                  Sparc-Opts.          (line  25)
17958
* -Av9:                                  Sparc-Opts.          (line  25)
17959
* -Av9a:                                 Sparc-Opts.          (line  25)
17960
* -b option, i960:                       Options-i960.        (line  22)
17961
* -big option, M32R:                     M32R-Opts.           (line  35)
17962
* -D:                                    D.                   (line   6)
17963
* -D, ignored on VAX:                    VAX-Opts.            (line  11)
17964
* -d, VAX option:                        VAX-Opts.            (line  16)
17965
* -eabi= command line option, ARM:       ARM Options.         (line 109)
17966
* -EB command line option, ARC:          ARC Options.         (line  31)
17967
* -EB command line option, ARM:          ARM Options.         (line 114)
17968
* -EB option (MIPS):                     MIPS Opts.           (line  13)
17969
* -EB option, M32R:                      M32R-Opts.           (line  39)
17970
* -EL command line option, ARC:          ARC Options.         (line  35)
17971
* -EL command line option, ARM:          ARM Options.         (line 118)
17972
* -EL option (MIPS):                     MIPS Opts.           (line  13)
17973
* -EL option, M32R:                      M32R-Opts.           (line  32)
17974
* -f:                                    f.                   (line   6)
17975
* -F command line option, Alpha:         Alpha Options.       (line  50)
17976
* -G command line option, Alpha:         Alpha Options.       (line  46)
17977
* -g command line option, Alpha:         Alpha Options.       (line  40)
17978
* -G option (MIPS):                      MIPS Opts.           (line   8)
17979
* -H option, VAX/VMS:                    VAX-Opts.            (line  81)
17980
* -h option, VAX/VMS:                    VAX-Opts.            (line  45)
17981
* -I PATH:                               I.                   (line   6)
17982
* -ignore-parallel-conflicts option, M32RX: M32R-Opts.        (line  87)
17983
* -Ip option, M32RX:                     M32R-Opts.           (line  97)
17984
* -J, ignored on VAX:                    VAX-Opts.            (line  27)
17985
* -K:                                    K.                   (line   6)
17986
* -k command line option, ARM:           ARM Options.         (line 122)
17987
* -KPIC option, M32R:                    M32R-Opts.           (line  42)
17988
* -KPIC option, MIPS:                    MIPS Opts.           (line  21)
17989
* -L:                                    L.                   (line   6)
17990
* -l option, M680x0:                     M68K-Opts.           (line  39)
17991
* -little option, M32R:                  M32R-Opts.           (line  27)
17992
* -M:                                    M.                   (line   6)
17993
* -m11/03:                               PDP-11-Options.      (line 140)
17994
* -m11/04:                               PDP-11-Options.      (line 143)
17995
* -m11/05:                               PDP-11-Options.      (line 146)
17996
* -m11/10:                               PDP-11-Options.      (line 146)
17997
* -m11/15:                               PDP-11-Options.      (line 149)
17998
* -m11/20:                               PDP-11-Options.      (line 149)
17999
* -m11/21:                               PDP-11-Options.      (line 152)
18000
* -m11/23:                               PDP-11-Options.      (line 155)
18001
* -m11/24:                               PDP-11-Options.      (line 155)
18002
* -m11/34:                               PDP-11-Options.      (line 158)
18003
* -m11/34a:                              PDP-11-Options.      (line 161)
18004
* -m11/35:                               PDP-11-Options.      (line 164)
18005
* -m11/40:                               PDP-11-Options.      (line 164)
18006
* -m11/44:                               PDP-11-Options.      (line 167)
18007
* -m11/45:                               PDP-11-Options.      (line 170)
18008
* -m11/50:                               PDP-11-Options.      (line 170)
18009
* -m11/53:                               PDP-11-Options.      (line 173)
18010
* -m11/55:                               PDP-11-Options.      (line 170)
18011
* -m11/60:                               PDP-11-Options.      (line 176)
18012
* -m11/70:                               PDP-11-Options.      (line 170)
18013
* -m11/73:                               PDP-11-Options.      (line 173)
18014
* -m11/83:                               PDP-11-Options.      (line 173)
18015
* -m11/84:                               PDP-11-Options.      (line 173)
18016
* -m11/93:                               PDP-11-Options.      (line 173)
18017
* -m11/94:                               PDP-11-Options.      (line 173)
18018
* -m16c option, M16C:                    M32C-Opts.           (line  12)
18019
* -m32c option, M32C:                    M32C-Opts.           (line   9)
18020
* -m32r option, M32R:                    M32R-Opts.           (line  21)
18021
* -m32rx option, M32R2:                  M32R-Opts.           (line  17)
18022
* -m32rx option, M32RX:                  M32R-Opts.           (line   9)
18023
* -m68000 and related options:           M68K-Opts.           (line 104)
18024
* -m68hc11:                              M68HC11-Opts.        (line   9)
18025
* -m68hc12:                              M68HC11-Opts.        (line  14)
18026
* -m68hcs12:                             M68HC11-Opts.        (line  21)
18027
* -m[no-]68851 command line option, M680x0: M68K-Opts.        (line  21)
18028
* -m[no-]68881 command line option, M680x0: M68K-Opts.        (line  21)
18029
* -m[no-]div command line option, M680x0: M68K-Opts.          (line  21)
18030
* -m[no-]emac command line option, M680x0: M68K-Opts.         (line  21)
18031
* -m[no-]float command line option, M680x0: M68K-Opts.        (line  21)
18032
* -m[no-]mac command line option, M680x0: M68K-Opts.          (line  21)
18033
* -m[no-]usp command line option, M680x0: M68K-Opts.          (line  21)
18034
* -mall:                                 PDP-11-Options.      (line  26)
18035
* -mall-extensions:                      PDP-11-Options.      (line  26)
18036
* -mall-opcodes command line option, AVR: AVR Options.        (line  56)
18037
* -mapcs command line option, ARM:       ARM Options.         (line  82)
18038
* -mapcs-float command line option, ARM: ARM Options.         (line  95)
18039
* -mapcs-reentrant command line option, ARM: ARM Options.     (line 100)
18040
* -marc[5|6|7|8] command line option, ARC: ARC Options.       (line   6)
18041
* -march= command line option, ARM:      ARM Options.         (line  39)
18042
* -march= command line option, M680x0:   M68K-Opts.           (line   8)
18043
* -march= option, i386:                  i386-Options.        (line  31)
18044
* -march= option, x86-64:                i386-Options.        (line  31)
18045
* -matpcs command line option, ARM:      ARM Options.         (line  87)
18046
* -mcis:                                 PDP-11-Options.      (line  32)
18047
* -mconstant-gp command line option, IA-64: IA-64 Options.    (line   6)
18048
* -mCPU command line option, Alpha:      Alpha Options.       (line   6)
18049
* -mcpu option, cpu:                     TIC54X-Opts.         (line  15)
18050
* -mcpu= command line option, ARM:       ARM Options.         (line   6)
18051
* -mcpu= command line option, M680x0:    M68K-Opts.           (line  14)
18052
* -mcsm:                                 PDP-11-Options.      (line  43)
18053
* -mdebug command line option, Alpha:    Alpha Options.       (line  25)
18054
* -me option, stderr redirect:           TIC54X-Opts.         (line  20)
18055
* -meis:                                 PDP-11-Options.      (line  46)
18056
* -merrors-to-file option, stderr redirect: TIC54X-Opts.      (line  20)
18057
* -mf option, far-mode:                  TIC54X-Opts.         (line   8)
18058
* -mf11:                                 PDP-11-Options.      (line 122)
18059
* -mfar-mode option, far-mode:           TIC54X-Opts.         (line   8)
18060
* -mfis:                                 PDP-11-Options.      (line  51)
18061
* -mfloat-abi= command line option, ARM: ARM Options.         (line 104)
18062
* -mfp-11:                               PDP-11-Options.      (line  56)
18063
* -mfpp:                                 PDP-11-Options.      (line  56)
18064
* -mfpu:                                 PDP-11-Options.      (line  56)
18065
* -mfpu= command line option, ARM:       ARM Options.         (line  54)
18066
* -mip2022 option, IP2K:                 IP2K-Opts.           (line  14)
18067
* -mip2022ext option, IP2022:            IP2K-Opts.           (line   9)
18068
* -mj11:                                 PDP-11-Options.      (line 126)
18069
* -mka11:                                PDP-11-Options.      (line  92)
18070
* -mkb11:                                PDP-11-Options.      (line  95)
18071
* -mkd11a:                               PDP-11-Options.      (line  98)
18072
* -mkd11b:                               PDP-11-Options.      (line 101)
18073
* -mkd11d:                               PDP-11-Options.      (line 104)
18074
* -mkd11e:                               PDP-11-Options.      (line 107)
18075
* -mkd11f:                               PDP-11-Options.      (line 110)
18076
* -mkd11h:                               PDP-11-Options.      (line 110)
18077
* -mkd11k:                               PDP-11-Options.      (line 114)
18078
* -mkd11q:                               PDP-11-Options.      (line 110)
18079
* -mkd11z:                               PDP-11-Options.      (line 118)
18080
* -mkev11:                               PDP-11-Options.      (line  51)
18081
* -mlimited-eis:                         PDP-11-Options.      (line  64)
18082
* -mlong:                                M68HC11-Opts.        (line  32)
18083
* -mlong-double:                         M68HC11-Opts.        (line  40)
18084
* -mmcu= command line option, AVR:       AVR Options.         (line   6)
18085
* -mmfpt:                                PDP-11-Options.      (line  70)
18086
* -mmicrocode:                           PDP-11-Options.      (line  83)
18087
* -mmnemonic= option, i386:              i386-Options.        (line  76)
18088
* -mmnemonic= option, x86-64:            i386-Options.        (line  76)
18089
* -mmutiproc:                            PDP-11-Options.      (line  73)
18090
* -mmxps:                                PDP-11-Options.      (line  77)
18091
* -mnaked-reg option, i386:              i386-Options.        (line  90)
18092
* -mnaked-reg option, x86-64:            i386-Options.        (line  90)
18093
* -mno-cis:                              PDP-11-Options.      (line  32)
18094
* -mno-csm:                              PDP-11-Options.      (line  43)
18095
* -mno-eis:                              PDP-11-Options.      (line  46)
18096
* -mno-extensions:                       PDP-11-Options.      (line  29)
18097
* -mno-fis:                              PDP-11-Options.      (line  51)
18098
* -mno-fp-11:                            PDP-11-Options.      (line  56)
18099
* -mno-fpp:                              PDP-11-Options.      (line  56)
18100
* -mno-fpu:                              PDP-11-Options.      (line  56)
18101
* -mno-kev11:                            PDP-11-Options.      (line  51)
18102
* -mno-limited-eis:                      PDP-11-Options.      (line  64)
18103
* -mno-mfpt:                             PDP-11-Options.      (line  70)
18104
* -mno-microcode:                        PDP-11-Options.      (line  83)
18105
* -mno-mutiproc:                         PDP-11-Options.      (line  73)
18106
* -mno-mxps:                             PDP-11-Options.      (line  77)
18107
* -mno-pic:                              PDP-11-Options.      (line  11)
18108
* -mno-skip-bug command line option, AVR: AVR Options.        (line  59)
18109
* -mno-spl:                              PDP-11-Options.      (line  80)
18110
* -mno-sym32:                            MIPS Opts.           (line 184)
18111
* -mno-wrap command line option, AVR:    AVR Options.         (line  62)
18112
* -mpic:                                 PDP-11-Options.      (line  11)
18113
* -mrelax command line option, V850:     V850 Options.        (line  51)
18114
* -mshort:                               M68HC11-Opts.        (line  27)
18115
* -mshort-double:                        M68HC11-Opts.        (line  36)
18116
* -mspl:                                 PDP-11-Options.      (line  80)
18117
* -msse-check= option, i386:             i386-Options.        (line  64)
18118
* -msse-check= option, x86-64:           i386-Options.        (line  64)
18119
* -msse2avx option, i386:                i386-Options.        (line  60)
18120
* -msse2avx option, x86-64:              i386-Options.        (line  60)
18121
* -msym32:                               MIPS Opts.           (line 184)
18122
* -msyntax= option, i386:                i386-Options.        (line  83)
18123
* -msyntax= option, x86-64:              i386-Options.        (line  83)
18124
* -mt11:                                 PDP-11-Options.      (line 130)
18125
* -mthumb command line option, ARM:      ARM Options.         (line  73)
18126
* -mthumb-interwork command line option, ARM: ARM Options.    (line  78)
18127
* -mtune= option, i386:                  i386-Options.        (line  52)
18128
* -mtune= option, x86-64:                i386-Options.        (line  52)
18129
* -mv850 command line option, V850:      V850 Options.        (line  23)
18130
* -mv850any command line option, V850:   V850 Options.        (line  41)
18131
* -mv850e command line option, V850:     V850 Options.        (line  29)
18132
* -mv850e1 command line option, V850:    V850 Options.        (line  35)
18133
* -mvxworks-pic option, MIPS:            MIPS Opts.           (line  26)
18134
* -N command line option, CRIS:          CRIS-Opts.           (line  57)
18135
* -nIp option, M32RX:                    M32R-Opts.           (line 101)
18136
* -no-bitinst, M32R2:                    M32R-Opts.           (line  54)
18137
* -no-ignore-parallel-conflicts option, M32RX: M32R-Opts.     (line  93)
18138
* -no-mdebug command line option, Alpha: Alpha Options.       (line  25)
18139
* -no-parallel option, M32RX:            M32R-Opts.           (line  51)
18140
* -no-relax option, i960:                Options-i960.        (line  66)
18141
* -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts.
18142
                                                              (line  79)
18143
* -no-warn-unmatched-high option, M32R:  M32R-Opts.           (line 111)
18144
* -nocpp ignored (MIPS):                 MIPS Opts.           (line 187)
18145
* -o:                                    o.                   (line   6)
18146
* -O option, M32RX:                      M32R-Opts.           (line  59)
18147
* -parallel option, M32RX:               M32R-Opts.           (line  46)
18148
* -R:                                    R.                   (line   6)
18149
* -r800 command line option, Z80:        Z80 Options.         (line  41)
18150
* -relax command line option, Alpha:     Alpha Options.       (line  32)
18151
* -S, ignored on VAX:                    VAX-Opts.            (line  11)
18152
* -t, ignored on VAX:                    VAX-Opts.            (line  36)
18153
* -T, ignored on VAX:                    VAX-Opts.            (line  11)
18154
* -v:                                    v.                   (line   6)
18155
* -V, redundant on VAX:                  VAX-Opts.            (line  22)
18156
* -version:                              v.                   (line   6)
18157
* -W:                                    W.                   (line  11)
18158
* -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line  65)
18159
* -warn-unmatched-high option, M32R:     M32R-Opts.           (line 105)
18160
* -Wnp option, M32RX:                    M32R-Opts.           (line  83)
18161
* -Wnuh option, M32RX:                   M32R-Opts.           (line 117)
18162
* -Wp option, M32RX:                     M32R-Opts.           (line  75)
18163
* -wsigned_overflow command line option, V850: V850 Options.  (line   9)
18164
* -Wuh option, M32RX:                    M32R-Opts.           (line 114)
18165
* -wunsigned_overflow command line option, V850: V850 Options.
18166
                                                              (line  16)
18167
* -x command line option, MMIX:          MMIX-Opts.           (line  44)
18168
* -z80 command line option, Z80:         Z80 Options.         (line   8)
18169
* -z8001 command line option, Z8000:     Z8000 Options.       (line   6)
18170
* -z8002 command line option, Z8000:     Z8000 Options.       (line   9)
18171
* . (symbol):                            Dot.                 (line   6)
18172
* .arch directive, ARM:                  ARM Directives.      (line 210)
18173
* .big directive, M32RX:                 M32R-Directives.     (line  88)
18174
* .cantunwind directive, ARM:            ARM Directives.      (line 114)
18175
* .cpu directive, ARM:                   ARM Directives.      (line 206)
18176
* .eabi_attribute directive, ARM:        ARM Directives.      (line 224)
18177
* .fnend directive, ARM:                 ARM Directives.      (line 105)
18178
* .fnstart directive, ARM:               ARM Directives.      (line 102)
18179
* .fpu directive, ARM:                   ARM Directives.      (line 220)
18180
* .handlerdata directive, ARM:           ARM Directives.      (line 125)
18181
* .insn:                                 MIPS insn.           (line   6)
18182
* .little directive, M32RX:              M32R-Directives.     (line  82)
18183
* .ltorg directive, ARM:                 ARM Directives.      (line  85)
18184
* .m32r directive, M32R:                 M32R-Directives.     (line  66)
18185
* .m32r2 directive, M32R2:               M32R-Directives.     (line  77)
18186
* .m32rx directive, M32RX:               M32R-Directives.     (line  72)
18187
* .movsp directive, ARM:                 ARM Directives.      (line 180)
18188
* .o:                                    Object.              (line   6)
18189
* .object_arch directive, ARM:           ARM Directives.      (line 214)
18190
* .pad directive, ARM:                   ARM Directives.      (line 175)
18191
* .param on HPPA:                        HPPA Directives.     (line  19)
18192
* .personality directive, ARM:           ARM Directives.      (line 118)
18193
* .personalityindex directive, ARM:      ARM Directives.      (line 121)
18194
* .pool directive, ARM:                  ARM Directives.      (line  99)
18195
* .save directive, ARM:                  ARM Directives.      (line 134)
18196
* .set arch=CPU:                         MIPS ISA.            (line  18)
18197
* .set autoextend:                       MIPS autoextend.     (line   6)
18198
* .set dsp:                              MIPS ASE instruction generation overrides.
18199
                                                              (line  21)
18200
* .set dspr2:                            MIPS ASE instruction generation overrides.
18201
                                                              (line  26)
18202
* .set hardfloat:                        MIPS floating-point. (line   6)
18203
* .set mdmx:                             MIPS ASE instruction generation overrides.
18204
                                                              (line  16)
18205
* .set mips3d:                           MIPS ASE instruction generation overrides.
18206
                                                              (line   6)
18207
* .set mipsN:                            MIPS ISA.            (line   6)
18208
* .set mt:                               MIPS ASE instruction generation overrides.
18209
                                                              (line  32)
18210
* .set noautoextend:                     MIPS autoextend.     (line   6)
18211
* .set nodsp:                            MIPS ASE instruction generation overrides.
18212
                                                              (line  21)
18213
* .set nodspr2:                          MIPS ASE instruction generation overrides.
18214
                                                              (line  26)
18215
* .set nomdmx:                           MIPS ASE instruction generation overrides.
18216
                                                              (line  16)
18217
* .set nomips3d:                         MIPS ASE instruction generation overrides.
18218
                                                              (line   6)
18219
* .set nomt:                             MIPS ASE instruction generation overrides.
18220
                                                              (line  32)
18221
* .set nosmartmips:                      MIPS ASE instruction generation overrides.
18222
                                                              (line  11)
18223
* .set nosym32:                          MIPS symbol sizes.   (line   6)
18224
* .set pop:                              MIPS option stack.   (line   6)
18225
* .set push:                             MIPS option stack.   (line   6)
18226
* .set smartmips:                        MIPS ASE instruction generation overrides.
18227
                                                              (line  11)
18228
* .set softfloat:                        MIPS floating-point. (line   6)
18229
* .set sym32:                            MIPS symbol sizes.   (line   6)
18230
* .setfp directive, ARM:                 ARM Directives.      (line 185)
18231
* .unwind_raw directive, ARM:            ARM Directives.      (line 199)
18232
* .v850 directive, V850:                 V850 Directives.     (line  14)
18233
* .v850e directive, V850:                V850 Directives.     (line  20)
18234
* .v850e1 directive, V850:               V850 Directives.     (line  26)
18235
* .vsave directive, ARM:                 ARM Directives.      (line 158)
18236
* .z8001:                                Z8000 Directives.    (line  11)
18237
* .z8002:                                Z8000 Directives.    (line  15)
18238
* 16-bit code, i386:                     i386-16bit.          (line   6)
18239
* 2byte directive, ARC:                  ARC Directives.      (line   9)
18240
* 3byte directive, ARC:                  ARC Directives.      (line  12)
18241
* 3DNow!, i386:                          i386-SIMD.           (line   6)
18242
* 3DNow!, x86-64:                        i386-SIMD.           (line   6)
18243
* 430 support:                           MSP430-Dependent.    (line   6)
18244
* 4byte directive, ARC:                  ARC Directives.      (line  15)
18245
* : (label):                             Statements.          (line  30)
18246
* @word modifier, D10V:                  D10V-Word.           (line   6)
18247
* \" (doublequote character):            Strings.             (line  43)
18248
* \\ (\ character):                      Strings.             (line  40)
18249
* \b (backspace character):              Strings.             (line  15)
18250
* \DDD (octal character code):           Strings.             (line  30)
18251
* \f (formfeed character):               Strings.             (line  18)
18252
* \n (newline character):                Strings.             (line  21)
18253
* \r (carriage return character):        Strings.             (line  24)
18254
* \t (tab):                              Strings.             (line  27)
18255
* \XD... (hex character code):           Strings.             (line  36)
18256
* _ opcode prefix:                       Xtensa Opcodes.      (line   9)
18257
* a.out:                                 Object.              (line   6)
18258
* a.out symbol attributes:               a.out Symbols.       (line   6)
18259
* A_DIR environment variable, TIC54X:    TIC54X-Env.          (line   6)
18260
* ABI options, SH64:                     SH64 Options.        (line  29)
18261
* ABORT directive:                       ABORT (COFF).        (line   6)
18262
* abort directive:                       Abort.               (line   6)
18263
* absolute section:                      Ld Sections.         (line  29)
18264
* absolute-literals directive:           Absolute Literals Directive.
18265
                                                              (line   6)
18266
* ADDI instructions, relaxation:         Xtensa Immediate Relaxation.
18267
                                                              (line  43)
18268
* addition, permitted arguments:         Infix Ops.           (line  44)
18269
* addresses:                             Expressions.         (line   6)
18270
* addresses, format of:                  Secs Background.     (line  68)
18271
* addressing modes, D10V:                D10V-Addressing.     (line   6)
18272
* addressing modes, D30V:                D30V-Addressing.     (line   6)
18273
* addressing modes, H8/300:              H8/300-Addressing.   (line   6)
18274
* addressing modes, M680x0:              M68K-Syntax.         (line  21)
18275
* addressing modes, M68HC11:             M68HC11-Syntax.      (line  17)
18276
* addressing modes, SH:                  SH-Addressing.       (line   6)
18277
* addressing modes, SH64:                SH64-Addressing.     (line   6)
18278
* addressing modes, Z8000:               Z8000-Addressing.    (line   6)
18279
* ADR reg,
18280
* ADRL reg,
18281
* advancing location counter:            Org.                 (line   6)
18282
* align directive:                       Align.               (line   6)
18283
* align directive, ARM:                  ARM Directives.      (line   6)
18284
* align directive, SPARC:                Sparc-Directives.    (line   9)
18285
* align directive, TIC54X:               TIC54X-Directives.   (line   6)
18286
* alignment of branch targets:           Xtensa Automatic Alignment.
18287
                                                              (line   6)
18288
* alignment of LOOP instructions:        Xtensa Automatic Alignment.
18289
                                                              (line   6)
18290
* Alpha floating point (IEEE):           Alpha Floating Point.
18291
                                                              (line   6)
18292
* Alpha line comment character:          Alpha-Chars.         (line   6)
18293
* Alpha line separator:                  Alpha-Chars.         (line   8)
18294
* Alpha notes:                           Alpha Notes.         (line   6)
18295
* Alpha options:                         Alpha Options.       (line   6)
18296
* Alpha registers:                       Alpha-Regs.          (line   6)
18297
* Alpha relocations:                     Alpha-Relocs.        (line   6)
18298
* Alpha support:                         Alpha-Dependent.     (line   6)
18299
* Alpha Syntax:                          Alpha Options.       (line  54)
18300
* Alpha-only directives:                 Alpha Directives.    (line  10)
18301
* altered difference tables:             Word.                (line  12)
18302
* alternate syntax for the 680x0:        M68K-Moto-Syntax.    (line   6)
18303
* ARC floating point (IEEE):             ARC Floating Point.  (line   6)
18304
* ARC machine directives:                ARC Directives.      (line   6)
18305
* ARC opcodes:                           ARC Opcodes.         (line   6)
18306
* ARC options (none):                    ARC Options.         (line   6)
18307
* ARC register names:                    ARC-Regs.            (line   6)
18308
* ARC special characters:                ARC-Chars.           (line   6)
18309
* ARC support:                           ARC-Dependent.       (line   6)
18310
* arc5 arc5, ARC:                        ARC Options.         (line  10)
18311
* arc6 arc6, ARC:                        ARC Options.         (line  13)
18312
* arc7 arc7, ARC:                        ARC Options.         (line  21)
18313
* arc8 arc8, ARC:                        ARC Options.         (line  24)
18314
* arch directive, i386:                  i386-Arch.           (line   6)
18315
* arch directive, M680x0:                M68K-Directives.     (line  22)
18316
* arch directive, x86-64:                i386-Arch.           (line   6)
18317
* architecture options, i960:            Options-i960.        (line   6)
18318
* architecture options, IP2022:          IP2K-Opts.           (line   9)
18319
* architecture options, IP2K:            IP2K-Opts.           (line  14)
18320
* architecture options, M16C:            M32C-Opts.           (line  12)
18321
* architecture options, M32C:            M32C-Opts.           (line   9)
18322
* architecture options, M32R:            M32R-Opts.           (line  21)
18323
* architecture options, M32R2:           M32R-Opts.           (line  17)
18324
* architecture options, M32RX:           M32R-Opts.           (line   9)
18325
* architecture options, M680x0:          M68K-Opts.           (line 104)
18326
* Architecture variant option, CRIS:     CRIS-Opts.           (line  33)
18327
* architectures, PowerPC:                PowerPC-Opts.        (line   6)
18328
* architectures, SPARC:                  Sparc-Opts.          (line   6)
18329
* arguments for addition:                Infix Ops.           (line  44)
18330
* arguments for subtraction:             Infix Ops.           (line  49)
18331
* arguments in expressions:              Arguments.           (line   6)
18332
* arithmetic functions:                  Operators.           (line   6)
18333
* arithmetic operands:                   Arguments.           (line   6)
18334
* ARM data relocations:                  ARM-Relocations.     (line   6)
18335
* arm directive, ARM:                    ARM Directives.      (line  60)
18336
* ARM floating point (IEEE):             ARM Floating Point.  (line   6)
18337
* ARM identifiers:                       ARM-Chars.           (line  15)
18338
* ARM immediate character:               ARM-Chars.           (line  13)
18339
* ARM line comment character:            ARM-Chars.           (line   6)
18340
* ARM line separator:                    ARM-Chars.           (line  10)
18341
* ARM machine directives:                ARM Directives.      (line   6)
18342
* ARM opcodes:                           ARM Opcodes.         (line   6)
18343
* ARM options (none):                    ARM Options.         (line   6)
18344
* ARM register names:                    ARM-Regs.            (line   6)
18345
* ARM support:                           ARM-Dependent.       (line   6)
18346
* ascii directive:                       Ascii.               (line   6)
18347
* asciz directive:                       Asciz.               (line   6)
18348
* asg directive, TIC54X:                 TIC54X-Directives.   (line  20)
18349
* assembler bugs, reporting:             Bug Reporting.       (line   6)
18350
* assembler crash:                       Bug Criteria.        (line   9)
18351
* assembler directive .arch, CRIS:       CRIS-Pseudos.        (line  45)
18352
* assembler directive .dword, CRIS:      CRIS-Pseudos.        (line  12)
18353
* assembler directive .far, M68HC11:     M68HC11-Directives.  (line  20)
18354
* assembler directive .interrupt, M68HC11: M68HC11-Directives.
18355
                                                              (line  26)
18356
* assembler directive .mode, M68HC11:    M68HC11-Directives.  (line  16)
18357
* assembler directive .relax, M68HC11:   M68HC11-Directives.  (line  10)
18358
* assembler directive .syntax, CRIS:     CRIS-Pseudos.        (line  17)
18359
* assembler directive .xrefb, M68HC11:   M68HC11-Directives.  (line  31)
18360
* assembler directive BSPEC, MMIX:       MMIX-Pseudos.        (line 131)
18361
* assembler directive BYTE, MMIX:        MMIX-Pseudos.        (line  97)
18362
* assembler directive ESPEC, MMIX:       MMIX-Pseudos.        (line 131)
18363
* assembler directive GREG, MMIX:        MMIX-Pseudos.        (line  50)
18364
* assembler directive IS, MMIX:          MMIX-Pseudos.        (line  42)
18365
* assembler directive LOC, MMIX:         MMIX-Pseudos.        (line   7)
18366
* assembler directive LOCAL, MMIX:       MMIX-Pseudos.        (line  28)
18367
* assembler directive OCTA, MMIX:        MMIX-Pseudos.        (line 108)
18368
* assembler directive PREFIX, MMIX:      MMIX-Pseudos.        (line 120)
18369
* assembler directive TETRA, MMIX:       MMIX-Pseudos.        (line 108)
18370
* assembler directive WYDE, MMIX:        MMIX-Pseudos.        (line 108)
18371
* assembler directives, CRIS:            CRIS-Pseudos.        (line   6)
18372
* assembler directives, M68HC11:         M68HC11-Directives.  (line   6)
18373
* assembler directives, M68HC12:         M68HC11-Directives.  (line   6)
18374
* assembler directives, MMIX:            MMIX-Pseudos.        (line   6)
18375
* assembler internal logic error:        As Sections.         (line  13)
18376
* assembler version:                     v.                   (line   6)
18377
* assembler, and linker:                 Secs Background.     (line  10)
18378
* assembly listings, enabling:           a.                   (line   6)
18379
* assigning values to symbols <1>:       Equ.                 (line   6)
18380
* assigning values to symbols:           Setting Symbols.     (line   6)
18381
* atmp directive, i860:                  Directives-i860.     (line  16)
18382
* att_syntax pseudo op, i386:            i386-Syntax.         (line   6)
18383
* att_syntax pseudo op, x86-64:          i386-Syntax.         (line   6)
18384
* attributes, symbol:                    Symbol Attributes.   (line   6)
18385
* auxiliary attributes, COFF symbols:    COFF Symbols.        (line  19)
18386
* auxiliary symbol information, COFF:    Dim.                 (line   6)
18387
* Av7:                                   Sparc-Opts.          (line  25)
18388
* AVR line comment character:            AVR-Chars.           (line   6)
18389
* AVR line separator:                    AVR-Chars.           (line  10)
18390
* AVR modifiers:                         AVR-Modifiers.       (line   6)
18391
* AVR opcode summary:                    AVR Opcodes.         (line   6)
18392
* AVR options (none):                    AVR Options.         (line   6)
18393
* AVR register names:                    AVR-Regs.            (line   6)
18394
* AVR support:                           AVR-Dependent.       (line   6)
18395
* backslash (\\):                        Strings.             (line  40)
18396
* backspace (\b):                        Strings.             (line  15)
18397
* balign directive:                      Balign.              (line   6)
18398
* balignl directive:                     Balign.              (line  27)
18399
* balignw directive:                     Balign.              (line  27)
18400
* bes directive, TIC54X:                 TIC54X-Directives.   (line 197)
18401
* BFIN directives:                       BFIN Directives.     (line   6)
18402
* BFIN syntax:                           BFIN Syntax.         (line   6)
18403
* big endian output, MIPS:               Overview.            (line 629)
18404
* big endian output, PJ:                 Overview.            (line 536)
18405
* big-endian output, MIPS:               MIPS Opts.           (line  13)
18406
* bignums:                               Bignums.             (line   6)
18407
* binary constants, TIC54X:              TIC54X-Constants.    (line   8)
18408
* binary files, including:               Incbin.              (line   6)
18409
* binary integers:                       Integers.            (line   6)
18410
* bit names, IA-64:                      IA-64-Bits.          (line   6)
18411
* bitfields, not supported on VAX:       VAX-no.              (line   6)
18412
* Blackfin support:                      BFIN-Dependent.      (line   6)
18413
* block:                                 Z8000 Directives.    (line  55)
18414
* branch improvement, M680x0:            M68K-Branch.         (line   6)
18415
* branch improvement, M68HC11:           M68HC11-Branch.      (line   6)
18416
* branch improvement, VAX:               VAX-branch.          (line   6)
18417
* branch instructions, relaxation:       Xtensa Branch Relaxation.
18418
                                                              (line   6)
18419
* branch recording, i960:                Options-i960.        (line  22)
18420
* branch statistics table, i960:         Options-i960.        (line  40)
18421
* branch target alignment:               Xtensa Automatic Alignment.
18422
                                                              (line   6)
18423
* break directive, TIC54X:               TIC54X-Directives.   (line 143)
18424
* BSD syntax:                            PDP-11-Syntax.       (line   6)
18425
* bss directive, i960:                   Directives-i960.     (line   6)
18426
* bss directive, TIC54X:                 TIC54X-Directives.   (line  29)
18427
* bss section <1>:                       bss.                 (line   6)
18428
* bss section:                           Ld Sections.         (line  20)
18429
* bug criteria:                          Bug Criteria.        (line   6)
18430
* bug reports:                           Bug Reporting.       (line   6)
18431
* bugs in assembler:                     Reporting Bugs.      (line   6)
18432
* Built-in symbols, CRIS:                CRIS-Symbols.        (line   6)
18433
* builtin math functions, TIC54X:        TIC54X-Builtins.     (line   6)
18434
* builtin subsym functions, TIC54X:      TIC54X-Macros.       (line  16)
18435
* bus lock prefixes, i386:               i386-Prefixes.       (line  36)
18436
* bval:                                  Z8000 Directives.    (line  30)
18437
* byte directive:                        Byte.                (line   6)
18438
* byte directive, TIC54X:                TIC54X-Directives.   (line  36)
18439
* C54XDSP_DIR environment variable, TIC54X: TIC54X-Env.       (line   6)
18440
* c_mode directive, TIC54X:              TIC54X-Directives.   (line  51)
18441
* call instructions, i386:               i386-Mnemonics.      (line  51)
18442
* call instructions, relaxation:         Xtensa Call Relaxation.
18443
                                                              (line   6)
18444
* call instructions, x86-64:             i386-Mnemonics.      (line  51)
18445
* callj, i960 pseudo-opcode:             callj-i960.          (line   6)
18446
* carriage return (\r):                  Strings.             (line  24)
18447
* case sensitivity, Z80:                 Z80-Case.            (line   6)
18448
* cfi_endproc directive:                 CFI directives.      (line  16)
18449
* cfi_startproc directive:               CFI directives.      (line   6)
18450
* char directive, TIC54X:                TIC54X-Directives.   (line  36)
18451
* character constant, Z80:               Z80-Chars.           (line  13)
18452
* character constants:                   Characters.          (line   6)
18453
* character escape codes:                Strings.             (line  15)
18454
* character escapes, Z80:                Z80-Chars.           (line  11)
18455
* character, single:                     Chars.               (line   6)
18456
* characters used in symbols:            Symbol Intro.        (line   6)
18457
* clink directive, TIC54X:               TIC54X-Directives.   (line  45)
18458
* code directive, ARM:                   ARM Directives.      (line  53)
18459
* code16 directive, i386:                i386-16bit.          (line   6)
18460
* code16gcc directive, i386:             i386-16bit.          (line   6)
18461
* code32 directive, i386:                i386-16bit.          (line   6)
18462
* code64 directive, i386:                i386-16bit.          (line   6)
18463
* code64 directive, x86-64:              i386-16bit.          (line   6)
18464
* COFF auxiliary symbol information:     Dim.                 (line   6)
18465
* COFF structure debugging:              Tag.                 (line   6)
18466
* COFF symbol attributes:                COFF Symbols.        (line   6)
18467
* COFF symbol descriptor:                Desc.                (line   6)
18468
* COFF symbol storage class:             Scl.                 (line   6)
18469
* COFF symbol type:                      Type.                (line  11)
18470
* COFF symbols, debugging:               Def.                 (line   6)
18471
* COFF value attribute:                  Val.                 (line   6)
18472
* COMDAT:                                Linkonce.            (line   6)
18473
* comm directive:                        Comm.                (line   6)
18474
* command line conventions:              Command Line.        (line   6)
18475
* command line options, V850:            V850 Options.        (line   9)
18476
* command-line options ignored, VAX:     VAX-Opts.            (line   6)
18477
* comments:                              Comments.            (line   6)
18478
* comments, M680x0:                      M68K-Chars.          (line   6)
18479
* comments, removed by preprocessor:     Preprocessing.       (line  11)
18480
* common directive, SPARC:               Sparc-Directives.    (line  12)
18481
* common sections:                       Linkonce.            (line   6)
18482
* common variable storage:               bss.                 (line   6)
18483
* compare and jump expansions, i960:     Compare-and-branch-i960.
18484
                                                              (line  13)
18485
* compare/branch instructions, i960:     Compare-and-branch-i960.
18486
                                                              (line   6)
18487
* comparison expressions:                Infix Ops.           (line  55)
18488
* conditional assembly:                  If.                  (line   6)
18489
* constant, single character:            Chars.               (line   6)
18490
* constants:                             Constants.           (line   6)
18491
* constants, bignum:                     Bignums.             (line   6)
18492
* constants, character:                  Characters.          (line   6)
18493
* constants, converted by preprocessor:  Preprocessing.       (line  14)
18494
* constants, floating point:             Flonums.             (line   6)
18495
* constants, integer:                    Integers.            (line   6)
18496
* constants, number:                     Numbers.             (line   6)
18497
* constants, Sparc:                      Sparc-Constants.     (line   6)
18498
* constants, string:                     Strings.             (line   6)
18499
* constants, TIC54X:                     TIC54X-Constants.    (line   6)
18500
* conversion instructions, i386:         i386-Mnemonics.      (line  32)
18501
* conversion instructions, x86-64:       i386-Mnemonics.      (line  32)
18502
* coprocessor wait, i386:                i386-Prefixes.       (line  40)
18503
* copy directive, TIC54X:                TIC54X-Directives.   (line  54)
18504
* cpu directive, M680x0:                 M68K-Directives.     (line  30)
18505
* CR16 Operand Qualifiers:               CR16 Operand Qualifiers.
18506
                                                              (line   6)
18507
* CR16 support:                          CR16-Dependent.      (line   6)
18508
* crash of assembler:                    Bug Criteria.        (line   9)
18509
* CRIS --emulation=crisaout command line option: CRIS-Opts.   (line   9)
18510
* CRIS --emulation=criself command line option: CRIS-Opts.    (line   9)
18511
* CRIS --march=ARCHITECTURE command line option: CRIS-Opts.   (line  33)
18512
* CRIS --mul-bug-abort command line option: CRIS-Opts.        (line  61)
18513
* CRIS --no-mul-bug-abort command line option: CRIS-Opts.     (line  61)
18514
* CRIS --no-underscore command line option: CRIS-Opts.        (line  15)
18515
* CRIS --pic command line option:        CRIS-Opts.           (line  27)
18516
* CRIS --underscore command line option: CRIS-Opts.           (line  15)
18517
* CRIS -N command line option:           CRIS-Opts.           (line  57)
18518
* CRIS architecture variant option:      CRIS-Opts.           (line  33)
18519
* CRIS assembler directive .arch:        CRIS-Pseudos.        (line  45)
18520
* CRIS assembler directive .dword:       CRIS-Pseudos.        (line  12)
18521
* CRIS assembler directive .syntax:      CRIS-Pseudos.        (line  17)
18522
* CRIS assembler directives:             CRIS-Pseudos.        (line   6)
18523
* CRIS built-in symbols:                 CRIS-Symbols.        (line   6)
18524
* CRIS instruction expansion:            CRIS-Expand.         (line   6)
18525
* CRIS line comment characters:          CRIS-Chars.          (line   6)
18526
* CRIS options:                          CRIS-Opts.           (line   6)
18527
* CRIS position-independent code:        CRIS-Opts.           (line  27)
18528
* CRIS pseudo-op .arch:                  CRIS-Pseudos.        (line  45)
18529
* CRIS pseudo-op .dword:                 CRIS-Pseudos.        (line  12)
18530
* CRIS pseudo-op .syntax:                CRIS-Pseudos.        (line  17)
18531
* CRIS pseudo-ops:                       CRIS-Pseudos.        (line   6)
18532
* CRIS register names:                   CRIS-Regs.           (line   6)
18533
* CRIS support:                          CRIS-Dependent.      (line   6)
18534
* CRIS symbols in position-independent code: CRIS-Pic.        (line   6)
18535
* ctbp register, V850:                   V850-Regs.           (line 131)
18536
* ctoff pseudo-op, V850:                 V850 Opcodes.        (line 111)
18537
* ctpc register, V850:                   V850-Regs.           (line 119)
18538
* ctpsw register, V850:                  V850-Regs.           (line 122)
18539
* current address:                       Dot.                 (line   6)
18540
* current address, advancing:            Org.                 (line   6)
18541
* D10V @word modifier:                   D10V-Word.           (line   6)
18542
* D10V addressing modes:                 D10V-Addressing.     (line   6)
18543
* D10V floating point:                   D10V-Float.          (line   6)
18544
* D10V line comment character:           D10V-Chars.          (line   6)
18545
* D10V opcode summary:                   D10V-Opcodes.        (line   6)
18546
* D10V optimization:                     Overview.            (line 408)
18547
* D10V options:                          D10V-Opts.           (line   6)
18548
* D10V registers:                        D10V-Regs.           (line   6)
18549
* D10V size modifiers:                   D10V-Size.           (line   6)
18550
* D10V sub-instruction ordering:         D10V-Chars.          (line   6)
18551
* D10V sub-instructions:                 D10V-Subs.           (line   6)
18552
* D10V support:                          D10V-Dependent.      (line   6)
18553
* D10V syntax:                           D10V-Syntax.         (line   6)
18554
* D30V addressing modes:                 D30V-Addressing.     (line   6)
18555
* D30V floating point:                   D30V-Float.          (line   6)
18556
* D30V Guarded Execution:                D30V-Guarded.        (line   6)
18557
* D30V line comment character:           D30V-Chars.          (line   6)
18558
* D30V nops:                             Overview.            (line 416)
18559
* D30V nops after 32-bit multiply:       Overview.            (line 419)
18560
* D30V opcode summary:                   D30V-Opcodes.        (line   6)
18561
* D30V optimization:                     Overview.            (line 413)
18562
* D30V options:                          D30V-Opts.           (line   6)
18563
* D30V registers:                        D30V-Regs.           (line   6)
18564
* D30V size modifiers:                   D30V-Size.           (line   6)
18565
* D30V sub-instruction ordering:         D30V-Chars.          (line   6)
18566
* D30V sub-instructions:                 D30V-Subs.           (line   6)
18567
* D30V support:                          D30V-Dependent.      (line   6)
18568
* D30V syntax:                           D30V-Syntax.         (line   6)
18569
* data alignment on SPARC:               Sparc-Aligned-Data.  (line   6)
18570
* data and text sections, joining:       R.                   (line   6)
18571
* data directive:                        Data.                (line   6)
18572
* data directive, TIC54X:                TIC54X-Directives.   (line  61)
18573
* data relocations, ARM:                 ARM-Relocations.     (line   6)
18574
* data section:                          Ld Sections.         (line   9)
18575
* data1 directive, M680x0:               M68K-Directives.     (line   9)
18576
* data2 directive, M680x0:               M68K-Directives.     (line  12)
18577
* datalabel, SH64:                       SH64-Addressing.     (line  16)
18578
* dbpc register, V850:                   V850-Regs.           (line 125)
18579
* dbpsw register, V850:                  V850-Regs.           (line 128)
18580
* debuggers, and symbol order:           Symbols.             (line  10)
18581
* debugging COFF symbols:                Def.                 (line   6)
18582
* DEC syntax:                            PDP-11-Syntax.       (line   6)
18583
* decimal integers:                      Integers.            (line  12)
18584
* def directive:                         Def.                 (line   6)
18585
* def directive, TIC54X:                 TIC54X-Directives.   (line 103)
18586
* density instructions:                  Density Instructions.
18587
                                                              (line   6)
18588
* dependency tracking:                   MD.                  (line   6)
18589
* deprecated directives:                 Deprecated.          (line   6)
18590
* desc directive:                        Desc.                (line   6)
18591
* descriptor, of a.out symbol:           Symbol Desc.         (line   6)
18592
* dfloat directive, VAX:                 VAX-directives.      (line  10)
18593
* difference tables altered:             Word.                (line  12)
18594
* difference tables, warning:            K.                   (line   6)
18595
* differences, mmixal:                   MMIX-mmixal.         (line   6)
18596
* dim directive:                         Dim.                 (line   6)
18597
* directives and instructions:           Statements.          (line  19)
18598
* directives for PowerPC:                PowerPC-Pseudo.      (line   6)
18599
* directives, BFIN:                      BFIN Directives.     (line   6)
18600
* directives, M32R:                      M32R-Directives.     (line   6)
18601
* directives, M680x0:                    M68K-Directives.     (line   6)
18602
* directives, machine independent:       Pseudo Ops.          (line   6)
18603
* directives, Xtensa:                    Xtensa Directives.   (line   6)
18604
* directives, Z8000:                     Z8000 Directives.    (line   6)
18605
* Disable floating-point instructions:   MIPS floating-point. (line   6)
18606
* Disable single-precision floating-point operations: MIPS floating-point.
18607
                                                              (line  12)
18608
* displacement sizing character, VAX:    VAX-operands.        (line  12)
18609
* dn and qn directives, ARM:             ARM Directives.      (line  29)
18610
* dollar local symbols:                  Symbol Names.        (line 105)
18611
* dot (symbol):                          Dot.                 (line   6)
18612
* double directive:                      Double.              (line   6)
18613
* double directive, i386:                i386-Float.          (line  14)
18614
* double directive, M680x0:              M68K-Float.          (line  14)
18615
* double directive, M68HC11:             M68HC11-Float.       (line  14)
18616
* double directive, TIC54X:              TIC54X-Directives.   (line  64)
18617
* double directive, VAX:                 VAX-float.           (line  15)
18618
* double directive, x86-64:              i386-Float.          (line  14)
18619
* doublequote (\"):                      Strings.             (line  43)
18620
* drlist directive, TIC54X:              TIC54X-Directives.   (line  73)
18621
* drnolist directive, TIC54X:            TIC54X-Directives.   (line  73)
18622
* dual directive, i860:                  Directives-i860.     (line   6)
18623
* ECOFF sections:                        MIPS Object.         (line   6)
18624
* ecr register, V850:                    V850-Regs.           (line 113)
18625
* eight-byte integer:                    Quad.                (line   9)
18626
* eipc register, V850:                   V850-Regs.           (line 101)
18627
* eipsw register, V850:                  V850-Regs.           (line 104)
18628
* eject directive:                       Eject.               (line   6)
18629
* ELF symbol type:                       Type.                (line  22)
18630
* else directive:                        Else.                (line   6)
18631
* elseif directive:                      Elseif.              (line   6)
18632
* empty expressions:                     Empty Exprs.         (line   6)
18633
* emsg directive, TIC54X:                TIC54X-Directives.   (line  77)
18634
* emulation:                             Overview.            (line 732)
18635
* end directive:                         End.                 (line   6)
18636
* enddual directive, i860:               Directives-i860.     (line  11)
18637
* endef directive:                       Endef.               (line   6)
18638
* endfunc directive:                     Endfunc.             (line   6)
18639
* endianness, MIPS:                      Overview.            (line 629)
18640
* endianness, PJ:                        Overview.            (line 536)
18641
* endif directive:                       Endif.               (line   6)
18642
* endloop directive, TIC54X:             TIC54X-Directives.   (line 143)
18643
* endm directive:                        Macro.               (line 138)
18644
* endm directive, TIC54X:                TIC54X-Directives.   (line 153)
18645
* endstruct directive, TIC54X:           TIC54X-Directives.   (line 217)
18646
* endunion directive, TIC54X:            TIC54X-Directives.   (line 251)
18647
* environment settings, TIC54X:          TIC54X-Env.          (line   6)
18648
* EOF, newline must precede:             Statements.          (line  13)
18649
* ep register, V850:                     V850-Regs.           (line  95)
18650
* equ directive:                         Equ.                 (line   6)
18651
* equ directive, TIC54X:                 TIC54X-Directives.   (line 192)
18652
* equiv directive:                       Equiv.               (line   6)
18653
* eqv directive:                         Eqv.                 (line   6)
18654
* err directive:                         Err.                 (line   6)
18655
* error directive:                       Error.               (line   6)
18656
* error messages:                        Errors.              (line   6)
18657
* error on valid input:                  Bug Criteria.        (line  12)
18658
* errors, caused by warnings:            W.                   (line  16)
18659
* errors, continuing after:              Z.                   (line   6)
18660
* ESA/390 floating point (IEEE):         ESA/390 Floating Point.
18661
                                                              (line   6)
18662
* ESA/390 support:                       ESA/390-Dependent.   (line   6)
18663
* ESA/390 Syntax:                        ESA/390 Options.     (line   8)
18664
* ESA/390-only directives:               ESA/390 Directives.  (line  12)
18665
* escape codes, character:               Strings.             (line  15)
18666
* eval directive, TIC54X:                TIC54X-Directives.   (line  24)
18667
* even:                                  Z8000 Directives.    (line  58)
18668
* even directive, M680x0:                M68K-Directives.     (line  15)
18669
* even directive, TIC54X:                TIC54X-Directives.   (line   6)
18670
* exitm directive:                       Macro.               (line 141)
18671
* expr (internal section):               As Sections.         (line  17)
18672
* expression arguments:                  Arguments.           (line   6)
18673
* expressions:                           Expressions.         (line   6)
18674
* expressions, comparison:               Infix Ops.           (line  55)
18675
* expressions, empty:                    Empty Exprs.         (line   6)
18676
* expressions, integer:                  Integer Exprs.       (line   6)
18677
* extAuxRegister directive, ARC:         ARC Directives.      (line  18)
18678
* extCondCode directive, ARC:            ARC Directives.      (line  41)
18679
* extCoreRegister directive, ARC:        ARC Directives.      (line  53)
18680
* extend directive M680x0:               M68K-Float.          (line  17)
18681
* extend directive M68HC11:              M68HC11-Float.       (line  17)
18682
* extended directive, i960:              Directives-i960.     (line  13)
18683
* extern directive:                      Extern.              (line   6)
18684
* extInstruction directive, ARC:         ARC Directives.      (line  78)
18685
* fail directive:                        Fail.                (line   6)
18686
* far_mode directive, TIC54X:            TIC54X-Directives.   (line  82)
18687
* faster processing (-f):                f.                   (line   6)
18688
* fatal signal:                          Bug Criteria.        (line   9)
18689
* fclist directive, TIC54X:              TIC54X-Directives.   (line  87)
18690
* fcnolist directive, TIC54X:            TIC54X-Directives.   (line  87)
18691
* fepc register, V850:                   V850-Regs.           (line 107)
18692
* fepsw register, V850:                  V850-Regs.           (line 110)
18693
* ffloat directive, VAX:                 VAX-directives.      (line  14)
18694
* field directive, TIC54X:               TIC54X-Directives.   (line  91)
18695
* file directive <1>:                    File.                (line   6)
18696
* file directive:                        LNS directives.      (line   6)
18697
* file directive, MSP 430:               MSP430 Directives.   (line   6)
18698
* file name, logical:                    File.                (line   6)
18699
* files, including:                      Include.             (line   6)
18700
* files, input:                          Input Files.         (line   6)
18701
* fill directive:                        Fill.                (line   6)
18702
* filling memory <1>:                    Space.               (line   6)
18703
* filling memory:                        Skip.                (line   6)
18704
* FLIX syntax:                           Xtensa Syntax.       (line   6)
18705
* float directive:                       Float.               (line   6)
18706
* float directive, i386:                 i386-Float.          (line  14)
18707
* float directive, M680x0:               M68K-Float.          (line  11)
18708
* float directive, M68HC11:              M68HC11-Float.       (line  11)
18709
* float directive, TIC54X:               TIC54X-Directives.   (line  64)
18710
* float directive, VAX:                  VAX-float.           (line  15)
18711
* float directive, x86-64:               i386-Float.          (line  14)
18712
* floating point numbers:                Flonums.             (line   6)
18713
* floating point numbers (double):       Double.              (line   6)
18714
* floating point numbers (single) <1>:   Single.              (line   6)
18715
* floating point numbers (single):       Float.               (line   6)
18716
* floating point, Alpha (IEEE):          Alpha Floating Point.
18717
                                                              (line   6)
18718
* floating point, ARC (IEEE):            ARC Floating Point.  (line   6)
18719
* floating point, ARM (IEEE):            ARM Floating Point.  (line   6)
18720
* floating point, D10V:                  D10V-Float.          (line   6)
18721
* floating point, D30V:                  D30V-Float.          (line   6)
18722
* floating point, ESA/390 (IEEE):        ESA/390 Floating Point.
18723
                                                              (line   6)
18724
* floating point, H8/300 (IEEE):         H8/300 Floating Point.
18725
                                                              (line   6)
18726
* floating point, HPPA (IEEE):           HPPA Floating Point. (line   6)
18727
* floating point, i386:                  i386-Float.          (line   6)
18728
* floating point, i960 (IEEE):           Floating Point-i960. (line   6)
18729
* floating point, M680x0:                M68K-Float.          (line   6)
18730
* floating point, M68HC11:               M68HC11-Float.       (line   6)
18731
* floating point, MSP 430 (IEEE):        MSP430 Floating Point.
18732
                                                              (line   6)
18733
* floating point, SH (IEEE):             SH Floating Point.   (line   6)
18734
* floating point, SPARC (IEEE):          Sparc-Float.         (line   6)
18735
* floating point, V850 (IEEE):           V850 Floating Point. (line   6)
18736
* floating point, VAX:                   VAX-float.           (line   6)
18737
* floating point, x86-64:                i386-Float.          (line   6)
18738
* floating point, Z80:                   Z80 Floating Point.  (line   6)
18739
* flonums:                               Flonums.             (line   6)
18740
* force_thumb directive, ARM:            ARM Directives.      (line  63)
18741
* format of error messages:              Errors.              (line  24)
18742
* format of warning messages:            Errors.              (line  12)
18743
* formfeed (\f):                         Strings.             (line  18)
18744
* func directive:                        Func.                (line   6)
18745
* functions, in expressions:             Operators.           (line   6)
18746
* gbr960, i960 postprocessor:            Options-i960.        (line  40)
18747
* gfloat directive, VAX:                 VAX-directives.      (line  18)
18748
* global:                                Z8000 Directives.    (line  21)
18749
* global directive:                      Global.              (line   6)
18750
* global directive, TIC54X:              TIC54X-Directives.   (line 103)
18751
* gp register, MIPS:                     MIPS Object.         (line  11)
18752
* gp register, V850:                     V850-Regs.           (line  17)
18753
* grouping data:                         Sub-Sections.        (line   6)
18754
* H8/300 addressing modes:               H8/300-Addressing.   (line   6)
18755
* H8/300 floating point (IEEE):          H8/300 Floating Point.
18756
                                                              (line   6)
18757
* H8/300 line comment character:         H8/300-Chars.        (line   6)
18758
* H8/300 line separator:                 H8/300-Chars.        (line   8)
18759
* H8/300 machine directives (none):      H8/300 Directives.   (line   6)
18760
* H8/300 opcode summary:                 H8/300 Opcodes.      (line   6)
18761
* H8/300 options:                        H8/300 Options.      (line   6)
18762
* H8/300 registers:                      H8/300-Regs.         (line   6)
18763
* H8/300 size suffixes:                  H8/300 Opcodes.      (line 163)
18764
* H8/300 support:                        H8/300-Dependent.    (line   6)
18765
* H8/300H, assembling for:               H8/300 Directives.   (line   8)
18766
* half directive, ARC:                   ARC Directives.      (line 156)
18767
* half directive, SPARC:                 Sparc-Directives.    (line  17)
18768
* half directive, TIC54X:                TIC54X-Directives.   (line 111)
18769
* hex character code (\XD...):           Strings.             (line  36)
18770
* hexadecimal integers:                  Integers.            (line  15)
18771
* hexadecimal prefix, Z80:               Z80-Chars.           (line   8)
18772
* hfloat directive, VAX:                 VAX-directives.      (line  22)
18773
* hi pseudo-op, V850:                    V850 Opcodes.        (line  33)
18774
* hi0 pseudo-op, V850:                   V850 Opcodes.        (line  10)
18775
* hidden directive:                      Hidden.              (line   6)
18776
* high directive, M32R:                  M32R-Directives.     (line  18)
18777
* hilo pseudo-op, V850:                  V850 Opcodes.        (line  55)
18778
* HPPA directives not supported:         HPPA Directives.     (line  11)
18779
* HPPA floating point (IEEE):            HPPA Floating Point. (line   6)
18780
* HPPA Syntax:                           HPPA Options.        (line   8)
18781
* HPPA-only directives:                  HPPA Directives.     (line  24)
18782
* hword directive:                       hword.               (line   6)
18783
* i370 support:                          ESA/390-Dependent.   (line   6)
18784
* i386 16-bit code:                      i386-16bit.          (line   6)
18785
* i386 arch directive:                   i386-Arch.           (line   6)
18786
* i386 att_syntax pseudo op:             i386-Syntax.         (line   6)
18787
* i386 conversion instructions:          i386-Mnemonics.      (line  32)
18788
* i386 floating point:                   i386-Float.          (line   6)
18789
* i386 immediate operands:               i386-Syntax.         (line  15)
18790
* i386 instruction naming:               i386-Mnemonics.      (line   6)
18791
* i386 instruction prefixes:             i386-Prefixes.       (line   6)
18792
* i386 intel_syntax pseudo op:           i386-Syntax.         (line   6)
18793
* i386 jump optimization:                i386-Jumps.          (line   6)
18794
* i386 jump, call, return:               i386-Syntax.         (line  38)
18795
* i386 jump/call operands:               i386-Syntax.         (line  15)
18796
* i386 memory references:                i386-Memory.         (line   6)
18797
* i386 mnemonic compatibility:           i386-Mnemonics.      (line  57)
18798
* i386 mul, imul instructions:           i386-Notes.          (line   6)
18799
* i386 options:                          i386-Options.        (line   6)
18800
* i386 register operands:                i386-Syntax.         (line  15)
18801
* i386 registers:                        i386-Regs.           (line   6)
18802
* i386 sections:                         i386-Syntax.         (line  44)
18803
* i386 size suffixes:                    i386-Syntax.         (line  29)
18804
* i386 source, destination operands:     i386-Syntax.         (line  22)
18805
* i386 support:                          i386-Dependent.      (line   6)
18806
* i386 syntax compatibility:             i386-Syntax.         (line   6)
18807
* i80306 support:                        i386-Dependent.      (line   6)
18808
* i860 machine directives:               Directives-i860.     (line   6)
18809
* i860 opcodes:                          Opcodes for i860.    (line   6)
18810
* i860 support:                          i860-Dependent.      (line   6)
18811
* i960 architecture options:             Options-i960.        (line   6)
18812
* i960 branch recording:                 Options-i960.        (line  22)
18813
* i960 callj pseudo-opcode:              callj-i960.          (line   6)
18814
* i960 compare and jump expansions:      Compare-and-branch-i960.
18815
                                                              (line  13)
18816
* i960 compare/branch instructions:      Compare-and-branch-i960.
18817
                                                              (line   6)
18818
* i960 floating point (IEEE):            Floating Point-i960. (line   6)
18819
* i960 machine directives:               Directives-i960.     (line   6)
18820
* i960 opcodes:                          Opcodes for i960.    (line   6)
18821
* i960 options:                          Options-i960.        (line   6)
18822
* i960 support:                          i960-Dependent.      (line   6)
18823
* IA-64 line comment character:          IA-64-Chars.         (line   6)
18824
* IA-64 line separator:                  IA-64-Chars.         (line   8)
18825
* IA-64 options:                         IA-64 Options.       (line   6)
18826
* IA-64 Processor-status-Register bit names: IA-64-Bits.      (line   6)
18827
* IA-64 registers:                       IA-64-Regs.          (line   6)
18828
* IA-64 support:                         IA-64-Dependent.     (line   6)
18829
* IA-64 Syntax:                          IA-64 Options.       (line  96)
18830
* ident directive:                       Ident.               (line   6)
18831
* identifiers, ARM:                      ARM-Chars.           (line  15)
18832
* identifiers, MSP 430:                  MSP430-Chars.        (line   8)
18833
* if directive:                          If.                  (line   6)
18834
* ifb directive:                         If.                  (line  21)
18835
* ifc directive:                         If.                  (line  25)
18836
* ifdef directive:                       If.                  (line  16)
18837
* ifeq directive:                        If.                  (line  33)
18838
* ifeqs directive:                       If.                  (line  36)
18839
* ifge directive:                        If.                  (line  40)
18840
* ifgt directive:                        If.                  (line  44)
18841
* ifle directive:                        If.                  (line  48)
18842
* iflt directive:                        If.                  (line  52)
18843
* ifnb directive:                        If.                  (line  56)
18844
* ifnc directive:                        If.                  (line  61)
18845
* ifndef directive:                      If.                  (line  65)
18846
* ifne directive:                        If.                  (line  72)
18847
* ifnes directive:                       If.                  (line  76)
18848
* ifnotdef directive:                    If.                  (line  65)
18849
* immediate character, ARM:              ARM-Chars.           (line  13)
18850
* immediate character, M680x0:           M68K-Chars.          (line   6)
18851
* immediate character, VAX:              VAX-operands.        (line   6)
18852
* immediate fields, relaxation:          Xtensa Immediate Relaxation.
18853
                                                              (line   6)
18854
* immediate operands, i386:              i386-Syntax.         (line  15)
18855
* immediate operands, x86-64:            i386-Syntax.         (line  15)
18856
* imul instruction, i386:                i386-Notes.          (line   6)
18857
* imul instruction, x86-64:              i386-Notes.          (line   6)
18858
* incbin directive:                      Incbin.              (line   6)
18859
* include directive:                     Include.             (line   6)
18860
* include directive search path:         I.                   (line   6)
18861
* indirect character, VAX:               VAX-operands.        (line   9)
18862
* infix operators:                       Infix Ops.           (line   6)
18863
* inhibiting interrupts, i386:           i386-Prefixes.       (line  36)
18864
* input:                                 Input Files.         (line   6)
18865
* input file linenumbers:                Input Files.         (line  35)
18866
* instruction expansion, CRIS:           CRIS-Expand.         (line   6)
18867
* instruction expansion, MMIX:           MMIX-Expand.         (line   6)
18868
* instruction naming, i386:              i386-Mnemonics.      (line   6)
18869
* instruction naming, x86-64:            i386-Mnemonics.      (line   6)
18870
* instruction prefixes, i386:            i386-Prefixes.       (line   6)
18871
* instruction set, M680x0:               M68K-opcodes.        (line   6)
18872
* instruction set, M68HC11:              M68HC11-opcodes.     (line   6)
18873
* instruction summary, AVR:              AVR Opcodes.         (line   6)
18874
* instruction summary, D10V:             D10V-Opcodes.        (line   6)
18875
* instruction summary, D30V:             D30V-Opcodes.        (line   6)
18876
* instruction summary, H8/300:           H8/300 Opcodes.      (line   6)
18877
* instruction summary, SH:               SH Opcodes.          (line   6)
18878
* instruction summary, SH64:             SH64 Opcodes.        (line   6)
18879
* instruction summary, Z8000:            Z8000 Opcodes.       (line   6)
18880
* instructions and directives:           Statements.          (line  19)
18881
* int directive:                         Int.                 (line   6)
18882
* int directive, H8/300:                 H8/300 Directives.   (line   6)
18883
* int directive, i386:                   i386-Float.          (line  21)
18884
* int directive, TIC54X:                 TIC54X-Directives.   (line 111)
18885
* int directive, x86-64:                 i386-Float.          (line  21)
18886
* integer expressions:                   Integer Exprs.       (line   6)
18887
* integer, 16-byte:                      Octa.                (line   6)
18888
* integer, 8-byte:                       Quad.                (line   9)
18889
* integers:                              Integers.            (line   6)
18890
* integers, 16-bit:                      hword.               (line   6)
18891
* integers, 32-bit:                      Int.                 (line   6)
18892
* integers, binary:                      Integers.            (line   6)
18893
* integers, decimal:                     Integers.            (line  12)
18894
* integers, hexadecimal:                 Integers.            (line  15)
18895
* integers, octal:                       Integers.            (line   9)
18896
* integers, one byte:                    Byte.                (line   6)
18897
* intel_syntax pseudo op, i386:          i386-Syntax.         (line   6)
18898
* intel_syntax pseudo op, x86-64:        i386-Syntax.         (line   6)
18899
* internal assembler sections:           As Sections.         (line   6)
18900
* internal directive:                    Internal.            (line   6)
18901
* invalid input:                         Bug Criteria.        (line  14)
18902
* invocation summary:                    Overview.            (line   6)
18903
* IP2K architecture options:             IP2K-Opts.           (line   9)
18904
* IP2K options:                          IP2K-Opts.           (line   6)
18905
* IP2K support:                          IP2K-Dependent.      (line   6)
18906
* irp directive:                         Irp.                 (line   6)
18907
* irpc directive:                        Irpc.                (line   6)
18908
* ISA options, SH64:                     SH64 Options.        (line   6)
18909
* joining text and data sections:        R.                   (line   6)
18910
* jump instructions, i386:               i386-Mnemonics.      (line  51)
18911
* jump instructions, x86-64:             i386-Mnemonics.      (line  51)
18912
* jump optimization, i386:               i386-Jumps.          (line   6)
18913
* jump optimization, x86-64:             i386-Jumps.          (line   6)
18914
* jump/call operands, i386:              i386-Syntax.         (line  15)
18915
* jump/call operands, x86-64:            i386-Syntax.         (line  15)
18916
* L16SI instructions, relaxation:        Xtensa Immediate Relaxation.
18917
                                                              (line  23)
18918
* L16UI instructions, relaxation:        Xtensa Immediate Relaxation.
18919
                                                              (line  23)
18920
* L32I instructions, relaxation:         Xtensa Immediate Relaxation.
18921
                                                              (line  23)
18922
* L8UI instructions, relaxation:         Xtensa Immediate Relaxation.
18923
                                                              (line  23)
18924
* label (:):                             Statements.          (line  30)
18925
* label directive, TIC54X:               TIC54X-Directives.   (line 123)
18926
* labels:                                Labels.              (line   6)
18927
* lcomm directive:                       Lcomm.               (line   6)
18928
* lcomm directive, COFF:                 i386-Directives.     (line   6)
18929
* ld:                                    Object.              (line  15)
18930
* ldouble directive M680x0:              M68K-Float.          (line  17)
18931
* ldouble directive M68HC11:             M68HC11-Float.       (line  17)
18932
* ldouble directive, TIC54X:             TIC54X-Directives.   (line  64)
18933
* LDR reg,=
18934
* leafproc directive, i960:              Directives-i960.     (line  18)
18935
* length directive, TIC54X:              TIC54X-Directives.   (line 127)
18936
* length of symbols:                     Symbol Intro.        (line  14)
18937
* lflags directive (ignored):            Lflags.              (line   6)
18938
* line comment character:                Comments.            (line  19)
18939
* line comment character, Alpha:         Alpha-Chars.         (line   6)
18940
* line comment character, ARM:           ARM-Chars.           (line   6)
18941
* line comment character, AVR:           AVR-Chars.           (line   6)
18942
* line comment character, D10V:          D10V-Chars.          (line   6)
18943
* line comment character, D30V:          D30V-Chars.          (line   6)
18944
* line comment character, H8/300:        H8/300-Chars.        (line   6)
18945
* line comment character, IA-64:         IA-64-Chars.         (line   6)
18946
* line comment character, M680x0:        M68K-Chars.          (line   6)
18947
* line comment character, MSP 430:       MSP430-Chars.        (line   6)
18948
* line comment character, SH:            SH-Chars.            (line   6)
18949
* line comment character, SH64:          SH64-Chars.          (line   6)
18950
* line comment character, Sparc:         Sparc-Chars.         (line   6)
18951
* line comment character, V850:          V850-Chars.          (line   6)
18952
* line comment character, Z80:           Z80-Chars.           (line   6)
18953
* line comment character, Z8000:         Z8000-Chars.         (line   6)
18954
* line comment characters, CRIS:         CRIS-Chars.          (line   6)
18955
* line comment characters, MMIX:         MMIX-Chars.          (line   6)
18956
* line directive:                        Line.                (line   6)
18957
* line directive, MSP 430:               MSP430 Directives.   (line  14)
18958
* line numbers, in input files:          Input Files.         (line  35)
18959
* line numbers, in warnings/errors:      Errors.              (line  16)
18960
* line separator character:              Statements.          (line   6)
18961
* line separator, Alpha:                 Alpha-Chars.         (line   8)
18962
* line separator, ARM:                   ARM-Chars.           (line  10)
18963
* line separator, AVR:                   AVR-Chars.           (line  10)
18964
* line separator, H8/300:                H8/300-Chars.        (line   8)
18965
* line separator, IA-64:                 IA-64-Chars.         (line   8)
18966
* line separator, SH:                    SH-Chars.            (line   8)
18967
* line separator, SH64:                  SH64-Chars.          (line   8)
18968
* line separator, Sparc:                 Sparc-Chars.         (line   8)
18969
* line separator, Z8000:                 Z8000-Chars.         (line   8)
18970
* lines starting with #:                 Comments.            (line  38)
18971
* linker:                                Object.              (line  15)
18972
* linker, and assembler:                 Secs Background.     (line  10)
18973
* linkonce directive:                    Linkonce.            (line   6)
18974
* list directive:                        List.                (line   6)
18975
* list directive, TIC54X:                TIC54X-Directives.   (line 131)
18976
* listing control, turning off:          Nolist.              (line   6)
18977
* listing control, turning on:           List.                (line   6)
18978
* listing control: new page:             Eject.               (line   6)
18979
* listing control: paper size:           Psize.               (line   6)
18980
* listing control: subtitle:             Sbttl.               (line   6)
18981
* listing control: title line:           Title.               (line   6)
18982
* listings, enabling:                    a.                   (line   6)
18983
* literal directive:                     Literal Directive.   (line   6)
18984
* literal_position directive:            Literal Position Directive.
18985
                                                              (line   6)
18986
* literal_prefix directive:              Literal Prefix Directive.
18987
                                                              (line   6)
18988
* little endian output, MIPS:            Overview.            (line 632)
18989
* little endian output, PJ:              Overview.            (line 539)
18990
* little-endian output, MIPS:            MIPS Opts.           (line  13)
18991
* ln directive:                          Ln.                  (line   6)
18992
* lo pseudo-op, V850:                    V850 Opcodes.        (line  22)
18993
* loc directive:                         LNS directives.      (line  19)
18994
* loc_mark_labels directive:             LNS directives.      (line  50)
18995
* local common symbols:                  Lcomm.               (line   6)
18996
* local labels:                          Symbol Names.        (line  35)
18997
* local symbol names:                    Symbol Names.        (line  22)
18998
* local symbols, retaining in output:    L.                   (line   6)
18999
* location counter:                      Dot.                 (line   6)
19000
* location counter, advancing:           Org.                 (line   6)
19001
* location counter, Z80:                 Z80-Chars.           (line   8)
19002
* logical file name:                     File.                (line   6)
19003
* logical line number:                   Line.                (line   6)
19004
* logical line numbers:                  Comments.            (line  38)
19005
* long directive:                        Long.                (line   6)
19006
* long directive, ARC:                   ARC Directives.      (line 159)
19007
* long directive, i386:                  i386-Float.          (line  21)
19008
* long directive, TIC54X:                TIC54X-Directives.   (line 135)
19009
* long directive, x86-64:                i386-Float.          (line  21)
19010
* longcall pseudo-op, V850:              V850 Opcodes.        (line 123)
19011
* longcalls directive:                   Longcalls Directive. (line   6)
19012
* longjump pseudo-op, V850:              V850 Opcodes.        (line 129)
19013
* loop directive, TIC54X:                TIC54X-Directives.   (line 143)
19014
* LOOP instructions, alignment:          Xtensa Automatic Alignment.
19015
                                                              (line   6)
19016
* low directive, M32R:                   M32R-Directives.     (line   9)
19017
* lp register, V850:                     V850-Regs.           (line  98)
19018
* lval:                                  Z8000 Directives.    (line  27)
19019
* M16C architecture option:              M32C-Opts.           (line  12)
19020
* M32C architecture option:              M32C-Opts.           (line   9)
19021
* M32C modifiers:                        M32C-Modifiers.      (line   6)
19022
* M32C options:                          M32C-Opts.           (line   6)
19023
* M32C support:                          M32C-Dependent.      (line   6)
19024
* M32R architecture options:             M32R-Opts.           (line   9)
19025
* M32R directives:                       M32R-Directives.     (line   6)
19026
* M32R options:                          M32R-Opts.           (line   6)
19027
* M32R support:                          M32R-Dependent.      (line   6)
19028
* M32R warnings:                         M32R-Warnings.       (line   6)
19029
* M680x0 addressing modes:               M68K-Syntax.         (line  21)
19030
* M680x0 architecture options:           M68K-Opts.           (line 104)
19031
* M680x0 branch improvement:             M68K-Branch.         (line   6)
19032
* M680x0 directives:                     M68K-Directives.     (line   6)
19033
* M680x0 floating point:                 M68K-Float.          (line   6)
19034
* M680x0 immediate character:            M68K-Chars.          (line   6)
19035
* M680x0 line comment character:         M68K-Chars.          (line   6)
19036
* M680x0 opcodes:                        M68K-opcodes.        (line   6)
19037
* M680x0 options:                        M68K-Opts.           (line   6)
19038
* M680x0 pseudo-opcodes:                 M68K-Branch.         (line   6)
19039
* M680x0 size modifiers:                 M68K-Syntax.         (line   8)
19040
* M680x0 support:                        M68K-Dependent.      (line   6)
19041
* M680x0 syntax:                         M68K-Syntax.         (line   8)
19042
* M68HC11 addressing modes:              M68HC11-Syntax.      (line  17)
19043
* M68HC11 and M68HC12 support:           M68HC11-Dependent.   (line   6)
19044
* M68HC11 assembler directive .far:      M68HC11-Directives.  (line  20)
19045
* M68HC11 assembler directive .interrupt: M68HC11-Directives. (line  26)
19046
* M68HC11 assembler directive .mode:     M68HC11-Directives.  (line  16)
19047
* M68HC11 assembler directive .relax:    M68HC11-Directives.  (line  10)
19048
* M68HC11 assembler directive .xrefb:    M68HC11-Directives.  (line  31)
19049
* M68HC11 assembler directives:          M68HC11-Directives.  (line   6)
19050
* M68HC11 branch improvement:            M68HC11-Branch.      (line   6)
19051
* M68HC11 floating point:                M68HC11-Float.       (line   6)
19052
* M68HC11 modifiers:                     M68HC11-Modifiers.   (line   6)
19053
* M68HC11 opcodes:                       M68HC11-opcodes.     (line   6)
19054
* M68HC11 options:                       M68HC11-Opts.        (line   6)
19055
* M68HC11 pseudo-opcodes:                M68HC11-Branch.      (line   6)
19056
* M68HC11 syntax:                        M68HC11-Syntax.      (line   6)
19057
* M68HC12 assembler directives:          M68HC11-Directives.  (line   6)
19058
* machine dependencies:                  Machine Dependencies.
19059
                                                              (line   6)
19060
* machine directives, ARC:               ARC Directives.      (line   6)
19061
* machine directives, ARM:               ARM Directives.      (line   6)
19062
* machine directives, H8/300 (none):     H8/300 Directives.   (line   6)
19063
* machine directives, i860:              Directives-i860.     (line   6)
19064
* machine directives, i960:              Directives-i960.     (line   6)
19065
* machine directives, MSP 430:           MSP430 Directives.   (line   6)
19066
* machine directives, SH:                SH Directives.       (line   6)
19067
* machine directives, SH64:              SH64 Directives.     (line   9)
19068
* machine directives, SPARC:             Sparc-Directives.    (line   6)
19069
* machine directives, TIC54X:            TIC54X-Directives.   (line   6)
19070
* machine directives, V850:              V850 Directives.     (line   6)
19071
* machine directives, VAX:               VAX-directives.      (line   6)
19072
* machine directives, x86:               i386-Directives.     (line   6)
19073
* machine independent directives:        Pseudo Ops.          (line   6)
19074
* machine instructions (not covered):    Manual.              (line  14)
19075
* machine-independent syntax:            Syntax.              (line   6)
19076
* macro directive:                       Macro.               (line  28)
19077
* macro directive, TIC54X:               TIC54X-Directives.   (line 153)
19078
* macros:                                Macro.               (line   6)
19079
* macros, count executed:                Macro.               (line 143)
19080
* Macros, MSP 430:                       MSP430-Macros.       (line   6)
19081
* macros, TIC54X:                        TIC54X-Macros.       (line   6)
19082
* make rules:                            MD.                  (line   6)
19083
* manual, structure and purpose:         Manual.              (line   6)
19084
* math builtins, TIC54X:                 TIC54X-Builtins.     (line   6)
19085
* Maximum number of continuation lines:  listing.             (line  34)
19086
* memory references, i386:               i386-Memory.         (line   6)
19087
* memory references, x86-64:             i386-Memory.         (line   6)
19088
* memory-mapped registers, TIC54X:       TIC54X-MMRegs.       (line   6)
19089
* merging text and data sections:        R.                   (line   6)
19090
* messages from assembler:               Errors.              (line   6)
19091
* minus, permitted arguments:            Infix Ops.           (line  49)
19092
* MIPS architecture options:             MIPS Opts.           (line  29)
19093
* MIPS big-endian output:                MIPS Opts.           (line  13)
19094
* MIPS CPU override:                     MIPS ISA.            (line  18)
19095
* MIPS debugging directives:             MIPS Stabs.          (line   6)
19096
* MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides.
19097
                                                              (line  21)
19098
* MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides.
19099
                                                              (line  26)
19100
* MIPS ECOFF sections:                   MIPS Object.         (line   6)
19101
* MIPS endianness:                       Overview.            (line 629)
19102
* MIPS ISA:                              Overview.            (line 635)
19103
* MIPS ISA override:                     MIPS ISA.            (line   6)
19104
* MIPS little-endian output:             MIPS Opts.           (line  13)
19105
* MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides.
19106
                                                              (line  16)
19107
* MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides.
19108
                                                              (line   6)
19109
* MIPS MT instruction generation override: MIPS ASE instruction generation overrides.
19110
                                                              (line  32)
19111
* MIPS option stack:                     MIPS option stack.   (line   6)
19112
* MIPS processor:                        MIPS-Dependent.      (line   6)
19113
* MIT:                                   M68K-Syntax.         (line   6)
19114
* mlib directive, TIC54X:                TIC54X-Directives.   (line 159)
19115
* mlist directive, TIC54X:               TIC54X-Directives.   (line 164)
19116
* MMIX assembler directive BSPEC:        MMIX-Pseudos.        (line 131)
19117
* MMIX assembler directive BYTE:         MMIX-Pseudos.        (line  97)
19118
* MMIX assembler directive ESPEC:        MMIX-Pseudos.        (line 131)
19119
* MMIX assembler directive GREG:         MMIX-Pseudos.        (line  50)
19120
* MMIX assembler directive IS:           MMIX-Pseudos.        (line  42)
19121
* MMIX assembler directive LOC:          MMIX-Pseudos.        (line   7)
19122
* MMIX assembler directive LOCAL:        MMIX-Pseudos.        (line  28)
19123
* MMIX assembler directive OCTA:         MMIX-Pseudos.        (line 108)
19124
* MMIX assembler directive PREFIX:       MMIX-Pseudos.        (line 120)
19125
* MMIX assembler directive TETRA:        MMIX-Pseudos.        (line 108)
19126
* MMIX assembler directive WYDE:         MMIX-Pseudos.        (line 108)
19127
* MMIX assembler directives:             MMIX-Pseudos.        (line   6)
19128
* MMIX line comment characters:          MMIX-Chars.          (line   6)
19129
* MMIX options:                          MMIX-Opts.           (line   6)
19130
* MMIX pseudo-op BSPEC:                  MMIX-Pseudos.        (line 131)
19131
* MMIX pseudo-op BYTE:                   MMIX-Pseudos.        (line  97)
19132
* MMIX pseudo-op ESPEC:                  MMIX-Pseudos.        (line 131)
19133
* MMIX pseudo-op GREG:                   MMIX-Pseudos.        (line  50)
19134
* MMIX pseudo-op IS:                     MMIX-Pseudos.        (line  42)
19135
* MMIX pseudo-op LOC:                    MMIX-Pseudos.        (line   7)
19136
* MMIX pseudo-op LOCAL:                  MMIX-Pseudos.        (line  28)
19137
* MMIX pseudo-op OCTA:                   MMIX-Pseudos.        (line 108)
19138
* MMIX pseudo-op PREFIX:                 MMIX-Pseudos.        (line 120)
19139
* MMIX pseudo-op TETRA:                  MMIX-Pseudos.        (line 108)
19140
* MMIX pseudo-op WYDE:                   MMIX-Pseudos.        (line 108)
19141
* MMIX pseudo-ops:                       MMIX-Pseudos.        (line   6)
19142
* MMIX register names:                   MMIX-Regs.           (line   6)
19143
* MMIX support:                          MMIX-Dependent.      (line   6)
19144
* mmixal differences:                    MMIX-mmixal.         (line   6)
19145
* mmregs directive, TIC54X:              TIC54X-Directives.   (line 170)
19146
* mmsg directive, TIC54X:                TIC54X-Directives.   (line  77)
19147
* MMX, i386:                             i386-SIMD.           (line   6)
19148
* MMX, x86-64:                           i386-SIMD.           (line   6)
19149
* mnemonic compatibility, i386:          i386-Mnemonics.      (line  57)
19150
* mnemonic suffixes, i386:               i386-Syntax.         (line  29)
19151
* mnemonic suffixes, x86-64:             i386-Syntax.         (line  29)
19152
* mnemonics for opcodes, VAX:            VAX-opcodes.         (line   6)
19153
* mnemonics, AVR:                        AVR Opcodes.         (line   6)
19154
* mnemonics, D10V:                       D10V-Opcodes.        (line   6)
19155
* mnemonics, D30V:                       D30V-Opcodes.        (line   6)
19156
* mnemonics, H8/300:                     H8/300 Opcodes.      (line   6)
19157
* mnemonics, SH:                         SH Opcodes.          (line   6)
19158
* mnemonics, SH64:                       SH64 Opcodes.        (line   6)
19159
* mnemonics, Z8000:                      Z8000 Opcodes.       (line   6)
19160
* mnolist directive, TIC54X:             TIC54X-Directives.   (line 164)
19161
* Motorola syntax for the 680x0:         M68K-Moto-Syntax.    (line   6)
19162
* MOVI instructions, relaxation:         Xtensa Immediate Relaxation.
19163
                                                              (line  12)
19164
* MOVW and MOVT relocations, ARM:        ARM-Relocations.     (line  20)
19165
* MRI compatibility mode:                M.                   (line   6)
19166
* mri directive:                         MRI.                 (line   6)
19167
* MRI mode, temporarily:                 MRI.                 (line   6)
19168
* MSP 430 floating point (IEEE):         MSP430 Floating Point.
19169
                                                              (line   6)
19170
* MSP 430 identifiers:                   MSP430-Chars.        (line   8)
19171
* MSP 430 line comment character:        MSP430-Chars.        (line   6)
19172
* MSP 430 machine directives:            MSP430 Directives.   (line   6)
19173
* MSP 430 macros:                        MSP430-Macros.       (line   6)
19174
* MSP 430 opcodes:                       MSP430 Opcodes.      (line   6)
19175
* MSP 430 options (none):                MSP430 Options.      (line   6)
19176
* MSP 430 profiling capability:          MSP430 Profiling Capability.
19177
                                                              (line   6)
19178
* MSP 430 register names:                MSP430-Regs.         (line   6)
19179
* MSP 430 support:                       MSP430-Dependent.    (line   6)
19180
* MSP430 Assembler Extensions:           MSP430-Ext.          (line   6)
19181
* mul instruction, i386:                 i386-Notes.          (line   6)
19182
* mul instruction, x86-64:               i386-Notes.          (line   6)
19183
* name:                                  Z8000 Directives.    (line  18)
19184
* named section:                         Section.             (line   6)
19185
* named sections:                        Ld Sections.         (line   8)
19186
* names, symbol:                         Symbol Names.        (line   6)
19187
* naming object file:                    o.                   (line   6)
19188
* new page, in listings:                 Eject.               (line   6)
19189
* newblock directive, TIC54X:            TIC54X-Directives.   (line 176)
19190
* newline (\n):                          Strings.             (line  21)
19191
* newline, required at file end:         Statements.          (line  13)
19192
* no-absolute-literals directive:        Absolute Literals Directive.
19193
                                                              (line   6)
19194
* no-longcalls directive:                Longcalls Directive. (line   6)
19195
* no-schedule directive:                 Schedule Directive.  (line   6)
19196
* no-transform directive:                Transform Directive. (line   6)
19197
* nolist directive:                      Nolist.              (line   6)
19198
* nolist directive, TIC54X:              TIC54X-Directives.   (line 131)
19199
* NOP pseudo op, ARM:                    ARM Opcodes.         (line   9)
19200
* notes for Alpha:                       Alpha Notes.         (line   6)
19201
* null-terminated strings:               Asciz.               (line   6)
19202
* number constants:                      Numbers.             (line   6)
19203
* number of macros executed:             Macro.               (line 143)
19204
* numbered subsections:                  Sub-Sections.        (line   6)
19205
* numbers, 16-bit:                       hword.               (line   6)
19206
* numeric values:                        Expressions.         (line   6)
19207
* nword directive, SPARC:                Sparc-Directives.    (line  20)
19208
* object attributes:                     Object Attributes.   (line   6)
19209
* object file:                           Object.              (line   6)
19210
* object file format:                    Object Formats.      (line   6)
19211
* object file name:                      o.                   (line   6)
19212
* object file, after errors:             Z.                   (line   6)
19213
* obsolescent directives:                Deprecated.          (line   6)
19214
* octa directive:                        Octa.                (line   6)
19215
* octal character code (\DDD):           Strings.             (line  30)
19216
* octal integers:                        Integers.            (line   9)
19217
* offset directive, V850:                V850 Directives.     (line   6)
19218
* opcode mnemonics, VAX:                 VAX-opcodes.         (line   6)
19219
* opcode names, Xtensa:                  Xtensa Opcodes.      (line   6)
19220
* opcode summary, AVR:                   AVR Opcodes.         (line   6)
19221
* opcode summary, D10V:                  D10V-Opcodes.        (line   6)
19222
* opcode summary, D30V:                  D30V-Opcodes.        (line   6)
19223
* opcode summary, H8/300:                H8/300 Opcodes.      (line   6)
19224
* opcode summary, SH:                    SH Opcodes.          (line   6)
19225
* opcode summary, SH64:                  SH64 Opcodes.        (line   6)
19226
* opcode summary, Z8000:                 Z8000 Opcodes.       (line   6)
19227
* opcodes for ARC:                       ARC Opcodes.         (line   6)
19228
* opcodes for ARM:                       ARM Opcodes.         (line   6)
19229
* opcodes for MSP 430:                   MSP430 Opcodes.      (line   6)
19230
* opcodes for V850:                      V850 Opcodes.        (line   6)
19231
* opcodes, i860:                         Opcodes for i860.    (line   6)
19232
* opcodes, i960:                         Opcodes for i960.    (line   6)
19233
* opcodes, M680x0:                       M68K-opcodes.        (line   6)
19234
* opcodes, M68HC11:                      M68HC11-opcodes.     (line   6)
19235
* operand delimiters, i386:              i386-Syntax.         (line  15)
19236
* operand delimiters, x86-64:            i386-Syntax.         (line  15)
19237
* operand notation, VAX:                 VAX-operands.        (line   6)
19238
* operands in expressions:               Arguments.           (line   6)
19239
* operator precedence:                   Infix Ops.           (line  11)
19240
* operators, in expressions:             Operators.           (line   6)
19241
* operators, permitted arguments:        Infix Ops.           (line   6)
19242
* optimization, D10V:                    Overview.            (line 408)
19243
* optimization, D30V:                    Overview.            (line 413)
19244
* optimizations:                         Xtensa Optimizations.
19245
                                                              (line   6)
19246
* option directive, ARC:                 ARC Directives.      (line 162)
19247
* option directive, TIC54X:              TIC54X-Directives.   (line 180)
19248
* option summary:                        Overview.            (line   6)
19249
* options for Alpha:                     Alpha Options.       (line   6)
19250
* options for ARC (none):                ARC Options.         (line   6)
19251
* options for ARM (none):                ARM Options.         (line   6)
19252
* options for AVR (none):                AVR Options.         (line   6)
19253
* options for i386:                      i386-Options.        (line   6)
19254
* options for IA-64:                     IA-64 Options.       (line   6)
19255
* options for MSP430 (none):             MSP430 Options.      (line   6)
19256
* options for PDP-11:                    PDP-11-Options.      (line   6)
19257
* options for PowerPC:                   PowerPC-Opts.        (line   6)
19258
* options for SPARC:                     Sparc-Opts.          (line   6)
19259
* options for V850 (none):               V850 Options.        (line   6)
19260
* options for VAX/VMS:                   VAX-Opts.            (line  42)
19261
* options for x86-64:                    i386-Options.        (line   6)
19262
* options for Z80:                       Z80 Options.         (line   6)
19263
* options, all versions of assembler:    Invoking.            (line   6)
19264
* options, command line:                 Command Line.        (line  13)
19265
* options, CRIS:                         CRIS-Opts.           (line   6)
19266
* options, D10V:                         D10V-Opts.           (line   6)
19267
* options, D30V:                         D30V-Opts.           (line   6)
19268
* options, H8/300:                       H8/300 Options.      (line   6)
19269
* options, i960:                         Options-i960.        (line   6)
19270
* options, IP2K:                         IP2K-Opts.           (line   6)
19271
* options, M32C:                         M32C-Opts.           (line   6)
19272
* options, M32R:                         M32R-Opts.           (line   6)
19273
* options, M680x0:                       M68K-Opts.           (line   6)
19274
* options, M68HC11:                      M68HC11-Opts.        (line   6)
19275
* options, MMIX:                         MMIX-Opts.           (line   6)
19276
* options, PJ:                           PJ Options.          (line   6)
19277
* options, SH:                           SH Options.          (line   6)
19278
* options, SH64:                         SH64 Options.        (line   6)
19279
* options, TIC54X:                       TIC54X-Opts.         (line   6)
19280
* options, Z8000:                        Z8000 Options.       (line   6)
19281
* org directive:                         Org.                 (line   6)
19282
* other attribute, of a.out symbol:      Symbol Other.        (line   6)
19283
* output file:                           Object.              (line   6)
19284
* p2align directive:                     P2align.             (line   6)
19285
* p2alignl directive:                    P2align.             (line  28)
19286
* p2alignw directive:                    P2align.             (line  28)
19287
* padding the location counter:          Align.               (line   6)
19288
* padding the location counter given a power of two: P2align. (line   6)
19289
* padding the location counter given number of bytes: Balign. (line   6)
19290
* page, in listings:                     Eject.               (line   6)
19291
* paper size, for listings:              Psize.               (line   6)
19292
* paths for .include:                    I.                   (line   6)
19293
* patterns, writing in memory:           Fill.                (line   6)
19294
* PDP-11 comments:                       PDP-11-Syntax.       (line  16)
19295
* PDP-11 floating-point register syntax: PDP-11-Syntax.       (line  13)
19296
* PDP-11 general-purpose register syntax: PDP-11-Syntax.      (line  10)
19297
* PDP-11 instruction naming:             PDP-11-Mnemonics.    (line   6)
19298
* PDP-11 support:                        PDP-11-Dependent.    (line   6)
19299
* PDP-11 syntax:                         PDP-11-Syntax.       (line   6)
19300
* PIC code generation for ARM:           ARM Options.         (line 122)
19301
* PIC code generation for M32R:          M32R-Opts.           (line  42)
19302
* PIC selection, MIPS:                   MIPS Opts.           (line  21)
19303
* PJ endianness:                         Overview.            (line 536)
19304
* PJ options:                            PJ Options.          (line   6)
19305
* PJ support:                            PJ-Dependent.        (line   6)
19306
* plus, permitted arguments:             Infix Ops.           (line  44)
19307
* popsection directive:                  PopSection.          (line   6)
19308
* Position-independent code, CRIS:       CRIS-Opts.           (line  27)
19309
* Position-independent code, symbols in, CRIS: CRIS-Pic.      (line   6)
19310
* PowerPC architectures:                 PowerPC-Opts.        (line   6)
19311
* PowerPC directives:                    PowerPC-Pseudo.      (line   6)
19312
* PowerPC options:                       PowerPC-Opts.        (line   6)
19313
* PowerPC support:                       PPC-Dependent.       (line   6)
19314
* precedence of operators:               Infix Ops.           (line  11)
19315
* precision, floating point:             Flonums.             (line   6)
19316
* prefix operators:                      Prefix Ops.          (line   6)
19317
* prefixes, i386:                        i386-Prefixes.       (line   6)
19318
* preprocessing:                         Preprocessing.       (line   6)
19319
* preprocessing, turning on and off:     Preprocessing.       (line  27)
19320
* previous directive:                    Previous.            (line   6)
19321
* primary attributes, COFF symbols:      COFF Symbols.        (line  13)
19322
* print directive:                       Print.               (line   6)
19323
* proc directive, SPARC:                 Sparc-Directives.    (line  25)
19324
* profiler directive, MSP 430:           MSP430 Directives.   (line  22)
19325
* profiling capability for MSP 430:      MSP430 Profiling Capability.
19326
                                                              (line   6)
19327
* protected directive:                   Protected.           (line   6)
19328
* pseudo-op .arch, CRIS:                 CRIS-Pseudos.        (line  45)
19329
* pseudo-op .dword, CRIS:                CRIS-Pseudos.        (line  12)
19330
* pseudo-op .syntax, CRIS:               CRIS-Pseudos.        (line  17)
19331
* pseudo-op BSPEC, MMIX:                 MMIX-Pseudos.        (line 131)
19332
* pseudo-op BYTE, MMIX:                  MMIX-Pseudos.        (line  97)
19333
* pseudo-op ESPEC, MMIX:                 MMIX-Pseudos.        (line 131)
19334
* pseudo-op GREG, MMIX:                  MMIX-Pseudos.        (line  50)
19335
* pseudo-op IS, MMIX:                    MMIX-Pseudos.        (line  42)
19336
* pseudo-op LOC, MMIX:                   MMIX-Pseudos.        (line   7)
19337
* pseudo-op LOCAL, MMIX:                 MMIX-Pseudos.        (line  28)
19338
* pseudo-op OCTA, MMIX:                  MMIX-Pseudos.        (line 108)
19339
* pseudo-op PREFIX, MMIX:                MMIX-Pseudos.        (line 120)
19340
* pseudo-op TETRA, MMIX:                 MMIX-Pseudos.        (line 108)
19341
* pseudo-op WYDE, MMIX:                  MMIX-Pseudos.        (line 108)
19342
* pseudo-opcodes, M680x0:                M68K-Branch.         (line   6)
19343
* pseudo-opcodes, M68HC11:               M68HC11-Branch.      (line   6)
19344
* pseudo-ops for branch, VAX:            VAX-branch.          (line   6)
19345
* pseudo-ops, CRIS:                      CRIS-Pseudos.        (line   6)
19346
* pseudo-ops, machine independent:       Pseudo Ops.          (line   6)
19347
* pseudo-ops, MMIX:                      MMIX-Pseudos.        (line   6)
19348
* psize directive:                       Psize.               (line   6)
19349
* PSR bits:                              IA-64-Bits.          (line   6)
19350
* pstring directive, TIC54X:             TIC54X-Directives.   (line 209)
19351
* psw register, V850:                    V850-Regs.           (line 116)
19352
* purgem directive:                      Purgem.              (line   6)
19353
* purpose of GNU assembler:              GNU Assembler.       (line  12)
19354
* pushsection directive:                 PushSection.         (line   6)
19355
* quad directive:                        Quad.                (line   6)
19356
* quad directive, i386:                  i386-Float.          (line  21)
19357
* quad directive, x86-64:                i386-Float.          (line  21)
19358
* real-mode code, i386:                  i386-16bit.          (line   6)
19359
* ref directive, TIC54X:                 TIC54X-Directives.   (line 103)
19360
* register directive, SPARC:             Sparc-Directives.    (line  29)
19361
* register names, Alpha:                 Alpha-Regs.          (line   6)
19362
* register names, ARC:                   ARC-Regs.            (line   6)
19363
* register names, ARM:                   ARM-Regs.            (line   6)
19364
* register names, AVR:                   AVR-Regs.            (line   6)
19365
* register names, CRIS:                  CRIS-Regs.           (line   6)
19366
* register names, H8/300:                H8/300-Regs.         (line   6)
19367
* register names, IA-64:                 IA-64-Regs.          (line   6)
19368
* register names, MMIX:                  MMIX-Regs.           (line   6)
19369
* register names, MSP 430:               MSP430-Regs.         (line   6)
19370
* register names, Sparc:                 Sparc-Regs.          (line   6)
19371
* register names, V850:                  V850-Regs.           (line   6)
19372
* register names, VAX:                   VAX-operands.        (line  17)
19373
* register names, Xtensa:                Xtensa Registers.    (line   6)
19374
* register names, Z80:                   Z80-Regs.            (line   6)
19375
* register operands, i386:               i386-Syntax.         (line  15)
19376
* register operands, x86-64:             i386-Syntax.         (line  15)
19377
* registers, D10V:                       D10V-Regs.           (line   6)
19378
* registers, D30V:                       D30V-Regs.           (line   6)
19379
* registers, i386:                       i386-Regs.           (line   6)
19380
* registers, SH:                         SH-Regs.             (line   6)
19381
* registers, SH64:                       SH64-Regs.           (line   6)
19382
* registers, TIC54X memory-mapped:       TIC54X-MMRegs.       (line   6)
19383
* registers, x86-64:                     i386-Regs.           (line   6)
19384
* registers, Z8000:                      Z8000-Regs.          (line   6)
19385
* relaxation:                            Xtensa Relaxation.   (line   6)
19386
* relaxation of ADDI instructions:       Xtensa Immediate Relaxation.
19387
                                                              (line  43)
19388
* relaxation of branch instructions:     Xtensa Branch Relaxation.
19389
                                                              (line   6)
19390
* relaxation of call instructions:       Xtensa Call Relaxation.
19391
                                                              (line   6)
19392
* relaxation of immediate fields:        Xtensa Immediate Relaxation.
19393
                                                              (line   6)
19394
* relaxation of L16SI instructions:      Xtensa Immediate Relaxation.
19395
                                                              (line  23)
19396
* relaxation of L16UI instructions:      Xtensa Immediate Relaxation.
19397
                                                              (line  23)
19398
* relaxation of L32I instructions:       Xtensa Immediate Relaxation.
19399
                                                              (line  23)
19400
* relaxation of L8UI instructions:       Xtensa Immediate Relaxation.
19401
                                                              (line  23)
19402
* relaxation of MOVI instructions:       Xtensa Immediate Relaxation.
19403
                                                              (line  12)
19404
* reloc directive:                       Reloc.               (line   6)
19405
* relocation:                            Sections.            (line   6)
19406
* relocation example:                    Ld Sections.         (line  40)
19407
* relocations, Alpha:                    Alpha-Relocs.        (line   6)
19408
* relocations, Sparc:                    Sparc-Relocs.        (line   6)
19409
* repeat prefixes, i386:                 i386-Prefixes.       (line  44)
19410
* reporting bugs in assembler:           Reporting Bugs.      (line   6)
19411
* rept directive:                        Rept.                (line   6)
19412
* req directive, ARM:                    ARM Directives.      (line  13)
19413
* reserve directive, SPARC:              Sparc-Directives.    (line  39)
19414
* return instructions, i386:             i386-Syntax.         (line  38)
19415
* return instructions, x86-64:           i386-Syntax.         (line  38)
19416
* REX prefixes, i386:                    i386-Prefixes.       (line  46)
19417
* rsect:                                 Z8000 Directives.    (line  52)
19418
* sblock directive, TIC54X:              TIC54X-Directives.   (line 183)
19419
* sbttl directive:                       Sbttl.               (line   6)
19420
* schedule directive:                    Schedule Directive.  (line   6)
19421
* scl directive:                         Scl.                 (line   6)
19422
* sdaoff pseudo-op, V850:                V850 Opcodes.        (line  65)
19423
* search path for .include:              I.                   (line   6)
19424
* sect directive, MSP 430:               MSP430 Directives.   (line  18)
19425
* sect directive, TIC54X:                TIC54X-Directives.   (line 189)
19426
* section directive (COFF version):      Section.             (line  16)
19427
* section directive (ELF version):       Section.             (line  67)
19428
* section directive, V850:               V850 Directives.     (line   9)
19429
* section override prefixes, i386:       i386-Prefixes.       (line  23)
19430
* Section Stack <1>:                     SubSection.          (line   6)
19431
* Section Stack <2>:                     Section.             (line  62)
19432
* Section Stack <3>:                     PushSection.         (line   6)
19433
* Section Stack <4>:                     PopSection.          (line   6)
19434
* Section Stack:                         Previous.            (line   6)
19435
* section-relative addressing:           Secs Background.     (line  68)
19436
* sections:                              Sections.            (line   6)
19437
* sections in messages, internal:        As Sections.         (line   6)
19438
* sections, i386:                        i386-Syntax.         (line  44)
19439
* sections, named:                       Ld Sections.         (line   8)
19440
* sections, x86-64:                      i386-Syntax.         (line  44)
19441
* seg directive, SPARC:                  Sparc-Directives.    (line  44)
19442
* segm:                                  Z8000 Directives.    (line  10)
19443
* set directive:                         Set.                 (line   6)
19444
* set directive, TIC54X:                 TIC54X-Directives.   (line 192)
19445
* SH addressing modes:                   SH-Addressing.       (line   6)
19446
* SH floating point (IEEE):              SH Floating Point.   (line   6)
19447
* SH line comment character:             SH-Chars.            (line   6)
19448
* SH line separator:                     SH-Chars.            (line   8)
19449
* SH machine directives:                 SH Directives.       (line   6)
19450
* SH opcode summary:                     SH Opcodes.          (line   6)
19451
* SH options:                            SH Options.          (line   6)
19452
* SH registers:                          SH-Regs.             (line   6)
19453
* SH support:                            SH-Dependent.        (line   6)
19454
* SH64 ABI options:                      SH64 Options.        (line  29)
19455
* SH64 addressing modes:                 SH64-Addressing.     (line   6)
19456
* SH64 ISA options:                      SH64 Options.        (line   6)
19457
* SH64 line comment character:           SH64-Chars.          (line   6)
19458
* SH64 line separator:                   SH64-Chars.          (line   8)
19459
* SH64 machine directives:               SH64 Directives.     (line   9)
19460
* SH64 opcode summary:                   SH64 Opcodes.        (line   6)
19461
* SH64 options:                          SH64 Options.        (line   6)
19462
* SH64 registers:                        SH64-Regs.           (line   6)
19463
* SH64 support:                          SH64-Dependent.      (line   6)
19464
* shigh directive, M32R:                 M32R-Directives.     (line  26)
19465
* short directive:                       Short.               (line   6)
19466
* short directive, ARC:                  ARC Directives.      (line 171)
19467
* short directive, TIC54X:               TIC54X-Directives.   (line 111)
19468
* SIMD, i386:                            i386-SIMD.           (line   6)
19469
* SIMD, x86-64:                          i386-SIMD.           (line   6)
19470
* single character constant:             Chars.               (line   6)
19471
* single directive:                      Single.              (line   6)
19472
* single directive, i386:                i386-Float.          (line  14)
19473
* single directive, x86-64:              i386-Float.          (line  14)
19474
* single quote, Z80:                     Z80-Chars.           (line  13)
19475
* sixteen bit integers:                  hword.               (line   6)
19476
* sixteen byte integer:                  Octa.                (line   6)
19477
* size directive (COFF version):         Size.                (line  11)
19478
* size directive (ELF version):          Size.                (line  19)
19479
* size modifiers, D10V:                  D10V-Size.           (line   6)
19480
* size modifiers, D30V:                  D30V-Size.           (line   6)
19481
* size modifiers, M680x0:                M68K-Syntax.         (line   8)
19482
* size prefixes, i386:                   i386-Prefixes.       (line  27)
19483
* size suffixes, H8/300:                 H8/300 Opcodes.      (line 163)
19484
* size, translations, Sparc:             Sparc-Size-Translations.
19485
                                                              (line   6)
19486
* sizes operands, i386:                  i386-Syntax.         (line  29)
19487
* sizes operands, x86-64:                i386-Syntax.         (line  29)
19488
* skip directive:                        Skip.                (line   6)
19489
* skip directive, M680x0:                M68K-Directives.     (line  19)
19490
* skip directive, SPARC:                 Sparc-Directives.    (line  48)
19491
* sleb128 directive:                     Sleb128.             (line   6)
19492
* small objects, MIPS ECOFF:             MIPS Object.         (line  11)
19493
* SmartMIPS instruction generation override: MIPS ASE instruction generation overrides.
19494
                                                              (line  11)
19495
* SOM symbol attributes:                 SOM Symbols.         (line   6)
19496
* source program:                        Input Files.         (line   6)
19497
* source, destination operands; i386:    i386-Syntax.         (line  22)
19498
* source, destination operands; x86-64:  i386-Syntax.         (line  22)
19499
* sp register:                           Xtensa Registers.    (line   6)
19500
* sp register, V850:                     V850-Regs.           (line  14)
19501
* space directive:                       Space.               (line   6)
19502
* space directive, TIC54X:               TIC54X-Directives.   (line 197)
19503
* space used, maximum for assembly:      statistics.          (line   6)
19504
* SPARC architectures:                   Sparc-Opts.          (line   6)
19505
* Sparc constants:                       Sparc-Constants.     (line   6)
19506
* SPARC data alignment:                  Sparc-Aligned-Data.  (line   6)
19507
* SPARC floating point (IEEE):           Sparc-Float.         (line   6)
19508
* Sparc line comment character:          Sparc-Chars.         (line   6)
19509
* Sparc line separator:                  Sparc-Chars.         (line   8)
19510
* SPARC machine directives:              Sparc-Directives.    (line   6)
19511
* SPARC options:                         Sparc-Opts.          (line   6)
19512
* Sparc registers:                       Sparc-Regs.          (line   6)
19513
* Sparc relocations:                     Sparc-Relocs.        (line   6)
19514
* Sparc size translations:               Sparc-Size-Translations.
19515
                                                              (line   6)
19516
* SPARC support:                         Sparc-Dependent.     (line   6)
19517
* SPARC syntax:                          Sparc-Aligned-Data.  (line  21)
19518
* special characters, ARC:               ARC-Chars.           (line   6)
19519
* special characters, M680x0:            M68K-Chars.          (line   6)
19520
* special purpose registers, MSP 430:    MSP430-Regs.         (line  11)
19521
* sslist directive, TIC54X:              TIC54X-Directives.   (line 204)
19522
* ssnolist directive, TIC54X:            TIC54X-Directives.   (line 204)
19523
* stabd directive:                       Stab.                (line  38)
19524
* stabn directive:                       Stab.                (line  48)
19525
* stabs directive:                       Stab.                (line  51)
19526
* stabX directives:                      Stab.                (line   6)
19527
* standard assembler sections:           Secs Background.     (line  27)
19528
* standard input, as input file:         Command Line.        (line  10)
19529
* statement separator character:         Statements.          (line   6)
19530
* statement separator, Alpha:            Alpha-Chars.         (line   8)
19531
* statement separator, ARM:              ARM-Chars.           (line  10)
19532
* statement separator, AVR:              AVR-Chars.           (line  10)
19533
* statement separator, H8/300:           H8/300-Chars.        (line   8)
19534
* statement separator, IA-64:            IA-64-Chars.         (line   8)
19535
* statement separator, SH:               SH-Chars.            (line   8)
19536
* statement separator, SH64:             SH64-Chars.          (line   8)
19537
* statement separator, Sparc:            Sparc-Chars.         (line   8)
19538
* statement separator, Z8000:            Z8000-Chars.         (line   8)
19539
* statements, structure of:              Statements.          (line   6)
19540
* statistics, about assembly:            statistics.          (line   6)
19541
* stopping the assembly:                 Abort.               (line   6)
19542
* string constants:                      Strings.             (line   6)
19543
* string directive:                      String.              (line   8)
19544
* string directive on HPPA:              HPPA Directives.     (line 137)
19545
* string directive, TIC54X:              TIC54X-Directives.   (line 209)
19546
* string literals:                       Ascii.               (line   6)
19547
* string, copying to object file:        String.              (line   8)
19548
* string16 directive:                    String.              (line   8)
19549
* string16, copying to object file:      String.              (line   8)
19550
* string32 directive:                    String.              (line   8)
19551
* string32, copying to object file:      String.              (line   8)
19552
* string64 directive:                    String.              (line   8)
19553
* string64, copying to object file:      String.              (line   8)
19554
* string8 directive:                     String.              (line   8)
19555
* string8, copying to object file:       String.              (line   8)
19556
* struct directive:                      Struct.              (line   6)
19557
* struct directive, TIC54X:              TIC54X-Directives.   (line 217)
19558
* structure debugging, COFF:             Tag.                 (line   6)
19559
* sub-instruction ordering, D10V:        D10V-Chars.          (line   6)
19560
* sub-instruction ordering, D30V:        D30V-Chars.          (line   6)
19561
* sub-instructions, D10V:                D10V-Subs.           (line   6)
19562
* sub-instructions, D30V:                D30V-Subs.           (line   6)
19563
* subexpressions:                        Arguments.           (line  24)
19564
* subsection directive:                  SubSection.          (line   6)
19565
* subsym builtins, TIC54X:               TIC54X-Macros.       (line  16)
19566
* subtitles for listings:                Sbttl.               (line   6)
19567
* subtraction, permitted arguments:      Infix Ops.           (line  49)
19568
* summary of options:                    Overview.            (line   6)
19569
* support:                               HPPA-Dependent.      (line   6)
19570
* supporting files, including:           Include.             (line   6)
19571
* suppressing warnings:                  W.                   (line  11)
19572
* sval:                                  Z8000 Directives.    (line  33)
19573
* symbol attributes:                     Symbol Attributes.   (line   6)
19574
* symbol attributes, a.out:              a.out Symbols.       (line   6)
19575
* symbol attributes, COFF:               COFF Symbols.        (line   6)
19576
* symbol attributes, SOM:                SOM Symbols.         (line   6)
19577
* symbol descriptor, COFF:               Desc.                (line   6)
19578
* symbol modifiers <1>:                  M68HC11-Modifiers.   (line  12)
19579
* symbol modifiers <2>:                  M32C-Modifiers.      (line  11)
19580
* symbol modifiers:                      AVR-Modifiers.       (line  12)
19581
* symbol names:                          Symbol Names.        (line   6)
19582
* symbol names, $ in <1>:                SH64-Chars.          (line  10)
19583
* symbol names, $ in <2>:                SH-Chars.            (line  10)
19584
* symbol names, $ in <3>:                D30V-Chars.          (line  63)
19585
* symbol names, $ in:                    D10V-Chars.          (line  46)
19586
* symbol names, local:                   Symbol Names.        (line  22)
19587
* symbol names, temporary:               Symbol Names.        (line  35)
19588
* symbol storage class (COFF):           Scl.                 (line   6)
19589
* symbol type:                           Symbol Type.         (line   6)
19590
* symbol type, COFF:                     Type.                (line  11)
19591
* symbol type, ELF:                      Type.                (line  22)
19592
* symbol value:                          Symbol Value.        (line   6)
19593
* symbol value, setting:                 Set.                 (line   6)
19594
* symbol values, assigning:              Setting Symbols.     (line   6)
19595
* symbol versioning:                     Symver.              (line   6)
19596
* symbol, common:                        Comm.                (line   6)
19597
* symbol, making visible to linker:      Global.              (line   6)
19598
* symbolic debuggers, information for:   Stab.                (line   6)
19599
* symbols:                               Symbols.             (line   6)
19600
* Symbols in position-independent code, CRIS: CRIS-Pic.       (line   6)
19601
* symbols with uppercase, VAX/VMS:       VAX-Opts.            (line  42)
19602
* symbols, assigning values to:          Equ.                 (line   6)
19603
* Symbols, built-in, CRIS:               CRIS-Symbols.        (line   6)
19604
* Symbols, CRIS, built-in:               CRIS-Symbols.        (line   6)
19605
* symbols, local common:                 Lcomm.               (line   6)
19606
* symver directive:                      Symver.              (line   6)
19607
* syntax compatibility, i386:            i386-Syntax.         (line   6)
19608
* syntax compatibility, x86-64:          i386-Syntax.         (line   6)
19609
* syntax, AVR:                           AVR-Modifiers.       (line   6)
19610
* syntax, BFIN:                          BFIN Syntax.         (line   6)
19611
* syntax, D10V:                          D10V-Syntax.         (line   6)
19612
* syntax, D30V:                          D30V-Syntax.         (line   6)
19613
* syntax, M32C:                          M32C-Modifiers.      (line   6)
19614
* syntax, M680x0:                        M68K-Syntax.         (line   8)
19615
* syntax, M68HC11 <1>:                   M68HC11-Modifiers.   (line   6)
19616
* syntax, M68HC11:                       M68HC11-Syntax.      (line   6)
19617
* syntax, machine-independent:           Syntax.              (line   6)
19618
* syntax, SPARC:                         Sparc-Aligned-Data.  (line  21)
19619
* syntax, Xtensa assembler:              Xtensa Syntax.       (line   6)
19620
* sysproc directive, i960:               Directives-i960.     (line  37)
19621
* tab (\t):                              Strings.             (line  27)
19622
* tab directive, TIC54X:                 TIC54X-Directives.   (line 248)
19623
* tag directive:                         Tag.                 (line   6)
19624
* tag directive, TIC54X:                 TIC54X-Directives.   (line 217)
19625
* tdaoff pseudo-op, V850:                V850 Opcodes.        (line  81)
19626
* temporary symbol names:                Symbol Names.        (line  35)
19627
* text and data sections, joining:       R.                   (line   6)
19628
* text directive:                        Text.                (line   6)
19629
* text section:                          Ld Sections.         (line   9)
19630
* tfloat directive, i386:                i386-Float.          (line  14)
19631
* tfloat directive, x86-64:              i386-Float.          (line  14)
19632
* thumb directive, ARM:                  ARM Directives.      (line  57)
19633
* Thumb support:                         ARM-Dependent.       (line   6)
19634
* thumb_func directive, ARM:             ARM Directives.      (line  67)
19635
* thumb_set directive, ARM:              ARM Directives.      (line  78)
19636
* TIC54X builtin math functions:         TIC54X-Builtins.     (line   6)
19637
* TIC54X machine directives:             TIC54X-Directives.   (line   6)
19638
* TIC54X memory-mapped registers:        TIC54X-MMRegs.       (line   6)
19639
* TIC54X options:                        TIC54X-Opts.         (line   6)
19640
* TIC54X subsym builtins:                TIC54X-Macros.       (line  16)
19641
* TIC54X support:                        TIC54X-Dependent.    (line   6)
19642
* TIC54X-specific macros:                TIC54X-Macros.       (line   6)
19643
* time, total for assembly:              statistics.          (line   6)
19644
* title directive:                       Title.               (line   6)
19645
* tp register, V850:                     V850-Regs.           (line  20)
19646
* transform directive:                   Transform Directive. (line   6)
19647
* trusted compiler:                      f.                   (line   6)
19648
* turning preprocessing on and off:      Preprocessing.       (line  27)
19649
* type directive (COFF version):         Type.                (line  11)
19650
* type directive (ELF version):          Type.                (line  22)
19651
* type of a symbol:                      Symbol Type.         (line   6)
19652
* ualong directive, SH:                  SH Directives.       (line   6)
19653
* uaword directive, SH:                  SH Directives.       (line   6)
19654
* ubyte directive, TIC54X:               TIC54X-Directives.   (line  36)
19655
* uchar directive, TIC54X:               TIC54X-Directives.   (line  36)
19656
* uhalf directive, TIC54X:               TIC54X-Directives.   (line 111)
19657
* uint directive, TIC54X:                TIC54X-Directives.   (line 111)
19658
* uleb128 directive:                     Uleb128.             (line   6)
19659
* ulong directive, TIC54X:               TIC54X-Directives.   (line 135)
19660
* undefined section:                     Ld Sections.         (line  36)
19661
* union directive, TIC54X:               TIC54X-Directives.   (line 251)
19662
* unreq directive, ARM:                  ARM Directives.      (line  18)
19663
* unsegm:                                Z8000 Directives.    (line  14)
19664
* usect directive, TIC54X:               TIC54X-Directives.   (line 263)
19665
* ushort directive, TIC54X:              TIC54X-Directives.   (line 111)
19666
* uword directive, TIC54X:               TIC54X-Directives.   (line 111)
19667
* V850 command line options:             V850 Options.        (line   9)
19668
* V850 floating point (IEEE):            V850 Floating Point. (line   6)
19669
* V850 line comment character:           V850-Chars.          (line   6)
19670
* V850 machine directives:               V850 Directives.     (line   6)
19671
* V850 opcodes:                          V850 Opcodes.        (line   6)
19672
* V850 options (none):                   V850 Options.        (line   6)
19673
* V850 register names:                   V850-Regs.           (line   6)
19674
* V850 support:                          V850-Dependent.      (line   6)
19675
* val directive:                         Val.                 (line   6)
19676
* value attribute, COFF:                 Val.                 (line   6)
19677
* value of a symbol:                     Symbol Value.        (line   6)
19678
* var directive, TIC54X:                 TIC54X-Directives.   (line 273)
19679
* VAX bitfields not supported:           VAX-no.              (line   6)
19680
* VAX branch improvement:                VAX-branch.          (line   6)
19681
* VAX command-line options ignored:      VAX-Opts.            (line   6)
19682
* VAX displacement sizing character:     VAX-operands.        (line  12)
19683
* VAX floating point:                    VAX-float.           (line   6)
19684
* VAX immediate character:               VAX-operands.        (line   6)
19685
* VAX indirect character:                VAX-operands.        (line   9)
19686
* VAX machine directives:                VAX-directives.      (line   6)
19687
* VAX opcode mnemonics:                  VAX-opcodes.         (line   6)
19688
* VAX operand notation:                  VAX-operands.        (line   6)
19689
* VAX register names:                    VAX-operands.        (line  17)
19690
* VAX support:                           Vax-Dependent.       (line   6)
19691
* Vax-11 C compatibility:                VAX-Opts.            (line  42)
19692
* VAX/VMS options:                       VAX-Opts.            (line  42)
19693
* version directive:                     Version.             (line   6)
19694
* version directive, TIC54X:             TIC54X-Directives.   (line 277)
19695
* version of assembler:                  v.                   (line   6)
19696
* versions of symbols:                   Symver.              (line   6)
19697
* visibility <1>:                        Protected.           (line   6)
19698
* visibility <2>:                        Internal.            (line   6)
19699
* visibility:                            Hidden.              (line   6)
19700
* VMS (VAX) options:                     VAX-Opts.            (line  42)
19701
* vtable_entry directive:                VTableEntry.         (line   6)
19702
* vtable_inherit directive:              VTableInherit.       (line   6)
19703
* warning directive:                     Warning.             (line   6)
19704
* warning for altered difference tables: K.                   (line   6)
19705
* warning messages:                      Errors.              (line   6)
19706
* warnings, causing error:               W.                   (line  16)
19707
* warnings, M32R:                        M32R-Warnings.       (line   6)
19708
* warnings, suppressing:                 W.                   (line  11)
19709
* warnings, switching on:                W.                   (line  19)
19710
* weak directive:                        Weak.                (line   6)
19711
* weakref directive:                     Weakref.             (line   6)
19712
* whitespace:                            Whitespace.          (line   6)
19713
* whitespace, removed by preprocessor:   Preprocessing.       (line   7)
19714
* wide floating point directives, VAX:   VAX-directives.      (line  10)
19715
* width directive, TIC54X:               TIC54X-Directives.   (line 127)
19716
* Width of continuation lines of disassembly output: listing. (line  21)
19717
* Width of first line disassembly output: listing.            (line  16)
19718
* Width of source line output:           listing.             (line  28)
19719
* wmsg directive, TIC54X:                TIC54X-Directives.   (line  77)
19720
* word directive:                        Word.                (line   6)
19721
* word directive, ARC:                   ARC Directives.      (line 174)
19722
* word directive, H8/300:                H8/300 Directives.   (line   6)
19723
* word directive, i386:                  i386-Float.          (line  21)
19724
* word directive, SPARC:                 Sparc-Directives.    (line  51)
19725
* word directive, TIC54X:                TIC54X-Directives.   (line 111)
19726
* word directive, x86-64:                i386-Float.          (line  21)
19727
* writing patterns in memory:            Fill.                (line   6)
19728
* wval:                                  Z8000 Directives.    (line  24)
19729
* x86 machine directives:                i386-Directives.     (line   6)
19730
* x86-64 arch directive:                 i386-Arch.           (line   6)
19731
* x86-64 att_syntax pseudo op:           i386-Syntax.         (line   6)
19732
* x86-64 conversion instructions:        i386-Mnemonics.      (line  32)
19733
* x86-64 floating point:                 i386-Float.          (line   6)
19734
* x86-64 immediate operands:             i386-Syntax.         (line  15)
19735
* x86-64 instruction naming:             i386-Mnemonics.      (line   6)
19736
* x86-64 intel_syntax pseudo op:         i386-Syntax.         (line   6)
19737
* x86-64 jump optimization:              i386-Jumps.          (line   6)
19738
* x86-64 jump, call, return:             i386-Syntax.         (line  38)
19739
* x86-64 jump/call operands:             i386-Syntax.         (line  15)
19740
* x86-64 memory references:              i386-Memory.         (line   6)
19741
* x86-64 options:                        i386-Options.        (line   6)
19742
* x86-64 register operands:              i386-Syntax.         (line  15)
19743
* x86-64 registers:                      i386-Regs.           (line   6)
19744
* x86-64 sections:                       i386-Syntax.         (line  44)
19745
* x86-64 size suffixes:                  i386-Syntax.         (line  29)
19746
* x86-64 source, destination operands:   i386-Syntax.         (line  22)
19747
* x86-64 support:                        i386-Dependent.      (line   6)
19748
* x86-64 syntax compatibility:           i386-Syntax.         (line   6)
19749
* xfloat directive, TIC54X:              TIC54X-Directives.   (line  64)
19750
* xlong directive, TIC54X:               TIC54X-Directives.   (line 135)
19751
* Xtensa architecture:                   Xtensa-Dependent.    (line   6)
19752
* Xtensa assembler syntax:               Xtensa Syntax.       (line   6)
19753
* Xtensa directives:                     Xtensa Directives.   (line   6)
19754
* Xtensa opcode names:                   Xtensa Opcodes.      (line   6)
19755
* Xtensa register names:                 Xtensa Registers.    (line   6)
19756
* xword directive, SPARC:                Sparc-Directives.    (line  55)
19757
* Z80 $:                                 Z80-Chars.           (line   8)
19758
* Z80 ':                                 Z80-Chars.           (line  13)
19759
* Z80 floating point:                    Z80 Floating Point.  (line   6)
19760
* Z80 line comment character:            Z80-Chars.           (line   6)
19761
* Z80 options:                           Z80 Options.         (line   6)
19762
* Z80 registers:                         Z80-Regs.            (line   6)
19763
* Z80 support:                           Z80-Dependent.       (line   6)
19764
* Z80 Syntax:                            Z80 Options.         (line  47)
19765
* Z80, \:                                Z80-Chars.           (line  11)
19766
* Z80, case sensitivity:                 Z80-Case.            (line   6)
19767
* Z80-only directives:                   Z80 Directives.      (line   9)
19768
* Z800 addressing modes:                 Z8000-Addressing.    (line   6)
19769
* Z8000 directives:                      Z8000 Directives.    (line   6)
19770
* Z8000 line comment character:          Z8000-Chars.         (line   6)
19771
* Z8000 line separator:                  Z8000-Chars.         (line   8)
19772
* Z8000 opcode summary:                  Z8000 Opcodes.       (line   6)
19773
* Z8000 options:                         Z8000 Options.       (line   6)
19774
* Z8000 registers:                       Z8000-Regs.          (line   6)
19775
* Z8000 support:                         Z8000-Dependent.     (line   6)
19776
 
19777
 
19778
* zero-terminated strings:               Asciz.               (line   6)
19779
19780
19781

19782
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19783
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20266
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20267
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20268
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20269
Ref: Acknowledgements-Footnote-1628499
20270
Node: GNU Free Documentation License628525

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