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jlechner |
/* ppc-dis.c -- Disassemble PowerPC instructions
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Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
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2008 Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opcode/ppc.h"
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/* This file provides several disassembler functions, all of which use
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the disassembler interface defined in dis-asm.h. Several functions
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are provided because this file handles disassembly for the PowerPC
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in both big and little endian mode and also for the POWER (RS/6000)
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chip. */
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static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
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ppc_cpu_t);
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struct dis_private
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{
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/* Stash the result of parsing disassembler_options here. */
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ppc_cpu_t dialect;
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};
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#define POWERPC_DIALECT(INFO) \
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(((struct dis_private *) ((INFO)->private_data))->dialect)
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/* Determine which set of machines to disassemble for. PPC403/601 or
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BookE. For convenience, also disassemble instructions supported
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by the AltiVec vector unit. */
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static int
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powerpc_init_dialect (struct disassemble_info *info)
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{
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ppc_cpu_t dialect = PPC_OPCODE_PPC;
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struct dis_private *priv = calloc (sizeof (*priv), 1);
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if (priv == NULL)
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return FALSE;
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if (BFD_DEFAULT_TARGET_SIZE == 64)
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dialect |= PPC_OPCODE_64;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "ppcps") != NULL)
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dialect |= PPC_OPCODE_PPCPS;
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else if (info->disassembler_options
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&& strstr (info->disassembler_options, "booke") != NULL)
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dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
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else if ((info->mach == bfd_mach_ppc_e500mc)
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|| (info->disassembler_options
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&& strstr (info->disassembler_options, "e500mc") != NULL))
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dialect |= (PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
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| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
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| PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
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else if ((info->mach == bfd_mach_ppc_e500)
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|| (info->disassembler_options
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&& strstr (info->disassembler_options, "e500") != NULL))
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dialect |= (PPC_OPCODE_BOOKE
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| PPC_OPCODE_SPE | PPC_OPCODE_ISEL
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| PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
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| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
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| PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
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else if (info->disassembler_options
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&& strstr (info->disassembler_options, "efs") != NULL)
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dialect |= PPC_OPCODE_EFS;
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else if (info->disassembler_options
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&& strstr (info->disassembler_options, "e300") != NULL)
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dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
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else if (info->disassembler_options
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&& (strstr (info->disassembler_options, "440") != NULL
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|| strstr (info->disassembler_options, "464") != NULL))
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dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
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| PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
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else
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dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
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| PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "power4") != NULL)
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dialect |= PPC_OPCODE_POWER4;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "power5") != NULL)
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dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "cell") != NULL)
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dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "power6") != NULL)
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dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_ALTIVEC;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "power7") != NULL)
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dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "vsx") != NULL)
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dialect |= PPC_OPCODE_VSX;
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if (info->disassembler_options
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&& strstr (info->disassembler_options, "any") != NULL)
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dialect |= PPC_OPCODE_ANY;
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if (info->disassembler_options)
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{
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if (strstr (info->disassembler_options, "32") != NULL)
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dialect &= ~PPC_OPCODE_64;
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else if (strstr (info->disassembler_options, "64") != NULL)
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dialect |= PPC_OPCODE_64;
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}
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info->private_data = priv;
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POWERPC_DIALECT(info) = dialect;
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return TRUE;
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}
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/* Print a big endian PowerPC instruction. */
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int
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print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
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{
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if (info->private_data == NULL && !powerpc_init_dialect (info))
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return -1;
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return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
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}
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/* Print a little endian PowerPC instruction. */
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int
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print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
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{
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if (info->private_data == NULL && !powerpc_init_dialect (info))
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return -1;
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return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
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}
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/* Print a POWER (RS/6000) instruction. */
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int
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print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
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{
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return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
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}
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/* Extract the operand value from the PowerPC or POWER instruction. */
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static long
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operand_value_powerpc (const struct powerpc_operand *operand,
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unsigned long insn, ppc_cpu_t dialect)
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{
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long value;
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int invalid;
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/* Extract the value from the instruction. */
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if (operand->extract)
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value = (*operand->extract) (insn, dialect, &invalid);
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else
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{
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value = (insn >> operand->shift) & operand->bitm;
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if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
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{
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/* BITM is always some number of zeros followed by some
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number of ones, followed by some numer of zeros. */
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unsigned long top = operand->bitm;
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/* top & -top gives the rightmost 1 bit, so this
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fills in any trailing zeros. */
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top |= (top & -top) - 1;
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top &= ~(top >> 1);
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value = (value ^ top) - top;
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}
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}
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return value;
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}
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/* Determine whether the optional operand(s) should be printed. */
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static int
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skip_optional_operands (const unsigned char *opindex,
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unsigned long insn, ppc_cpu_t dialect)
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{
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const struct powerpc_operand *operand;
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for (; *opindex != 0; opindex++)
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{
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operand = &powerpc_operands[*opindex];
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if ((operand->flags & PPC_OPERAND_NEXT) != 0
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|| ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
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&& operand_value_powerpc (operand, insn, dialect) != 0))
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return 0;
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}
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return 1;
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}
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/* Print a PowerPC or POWER instruction. */
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static int
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print_insn_powerpc (bfd_vma memaddr,
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struct disassemble_info *info,
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int bigendian,
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ppc_cpu_t dialect)
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{
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bfd_byte buffer[4];
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int status;
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unsigned long insn;
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const struct powerpc_opcode *opcode;
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const struct powerpc_opcode *opcode_end;
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unsigned long op;
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status = (*info->read_memory_func) (memaddr, buffer, 4, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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if (bigendian)
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insn = bfd_getb32 (buffer);
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else
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insn = bfd_getl32 (buffer);
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/* Get the major opcode of the instruction. */
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op = PPC_OP (insn);
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/* Find the first match in the opcode table. We could speed this up
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a bit by doing a binary search on the major opcode. */
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| 250 |
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opcode_end = powerpc_opcodes + powerpc_num_opcodes;
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again:
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for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
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| 253 |
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{
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| 254 |
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unsigned long table_op;
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| 255 |
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const unsigned char *opindex;
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| 256 |
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const struct powerpc_operand *operand;
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| 257 |
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int invalid;
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| 258 |
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int need_comma;
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| 259 |
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int need_paren;
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| 260 |
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int skip_optional;
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| 261 |
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| 262 |
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table_op = PPC_OP (opcode->opcode);
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| 263 |
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if (op < table_op)
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| 264 |
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break;
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| 265 |
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if (op > table_op)
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| 266 |
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continue;
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| 267 |
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| 268 |
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if ((insn & opcode->mask) != opcode->opcode
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| 269 |
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|| (opcode->flags & dialect) == 0)
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| 270 |
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continue;
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| 271 |
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| 272 |
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/* Make two passes over the operands. First see if any of them
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| 273 |
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have extraction functions, and, if they do, make sure the
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| 274 |
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instruction is valid. */
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| 275 |
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invalid = 0;
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| 276 |
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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| 277 |
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{
|
| 278 |
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operand = powerpc_operands + *opindex;
|
| 279 |
|
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if (operand->extract)
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| 280 |
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(*operand->extract) (insn, dialect, &invalid);
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| 281 |
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}
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| 282 |
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if (invalid)
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| 283 |
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continue;
|
| 284 |
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|
|
| 285 |
|
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/* The instruction is valid. */
|
| 286 |
|
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if (opcode->operands[0] != 0)
|
| 287 |
|
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(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
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| 288 |
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else
|
| 289 |
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(*info->fprintf_func) (info->stream, "%s", opcode->name);
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| 290 |
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|
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| 291 |
|
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/* Now extract and print the operands. */
|
| 292 |
|
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need_comma = 0;
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| 293 |
|
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need_paren = 0;
|
| 294 |
|
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skip_optional = -1;
|
| 295 |
|
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for (opindex = opcode->operands; *opindex != 0; opindex++)
|
| 296 |
|
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{
|
| 297 |
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long value;
|
| 298 |
|
|
|
| 299 |
|
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operand = powerpc_operands + *opindex;
|
| 300 |
|
|
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| 301 |
|
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/* Operands that are marked FAKE are simply ignored. We
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| 302 |
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already made sure that the extract function considered
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| 303 |
|
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the instruction to be valid. */
|
| 304 |
|
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if ((operand->flags & PPC_OPERAND_FAKE) != 0)
|
| 305 |
|
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continue;
|
| 306 |
|
|
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| 307 |
|
|
/* If all of the optional operands have the value zero,
|
| 308 |
|
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then don't print any of them. */
|
| 309 |
|
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if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
|
| 310 |
|
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{
|
| 311 |
|
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if (skip_optional < 0)
|
| 312 |
|
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skip_optional = skip_optional_operands (opindex, insn,
|
| 313 |
|
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dialect);
|
| 314 |
|
|
if (skip_optional)
|
| 315 |
|
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continue;
|
| 316 |
|
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}
|
| 317 |
|
|
|
| 318 |
|
|
value = operand_value_powerpc (operand, insn, dialect);
|
| 319 |
|
|
|
| 320 |
|
|
if (need_comma)
|
| 321 |
|
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{
|
| 322 |
|
|
(*info->fprintf_func) (info->stream, ",");
|
| 323 |
|
|
need_comma = 0;
|
| 324 |
|
|
}
|
| 325 |
|
|
|
| 326 |
|
|
/* Print the operand as directed by the flags. */
|
| 327 |
|
|
if ((operand->flags & PPC_OPERAND_GPR) != 0
|
| 328 |
|
|
|| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
|
| 329 |
|
|
(*info->fprintf_func) (info->stream, "r%ld", value);
|
| 330 |
|
|
else if ((operand->flags & PPC_OPERAND_FPR) != 0)
|
| 331 |
|
|
(*info->fprintf_func) (info->stream, "f%ld", value);
|
| 332 |
|
|
else if ((operand->flags & PPC_OPERAND_VR) != 0)
|
| 333 |
|
|
(*info->fprintf_func) (info->stream, "v%ld", value);
|
| 334 |
|
|
else if ((operand->flags & PPC_OPERAND_VSR) != 0)
|
| 335 |
|
|
(*info->fprintf_func) (info->stream, "vs%ld", value);
|
| 336 |
|
|
else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
|
| 337 |
|
|
(*info->print_address_func) (memaddr + value, info);
|
| 338 |
|
|
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
|
| 339 |
|
|
(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
|
| 340 |
|
|
else if ((operand->flags & PPC_OPERAND_CR) == 0
|
| 341 |
|
|
|| (dialect & PPC_OPCODE_PPC) == 0)
|
| 342 |
|
|
(*info->fprintf_func) (info->stream, "%ld", value);
|
| 343 |
|
|
else if ((operand->flags & PPC_OPERAND_FSL) != 0)
|
| 344 |
|
|
(*info->fprintf_func) (info->stream, "fsl%ld", value);
|
| 345 |
|
|
else if ((operand->flags & PPC_OPERAND_FCR) != 0)
|
| 346 |
|
|
(*info->fprintf_func) (info->stream, "fcr%ld", value);
|
| 347 |
|
|
else if ((operand->flags & PPC_OPERAND_UDI) != 0)
|
| 348 |
|
|
(*info->fprintf_func) (info->stream, "%ld", value);
|
| 349 |
|
|
else
|
| 350 |
|
|
{
|
| 351 |
|
|
if (operand->bitm == 7)
|
| 352 |
|
|
(*info->fprintf_func) (info->stream, "cr%ld", value);
|
| 353 |
|
|
else
|
| 354 |
|
|
{
|
| 355 |
|
|
static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
|
| 356 |
|
|
int cr;
|
| 357 |
|
|
int cc;
|
| 358 |
|
|
|
| 359 |
|
|
cr = value >> 2;
|
| 360 |
|
|
if (cr != 0)
|
| 361 |
|
|
(*info->fprintf_func) (info->stream, "4*cr%d+", cr);
|
| 362 |
|
|
cc = value & 3;
|
| 363 |
|
|
(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
|
| 364 |
|
|
}
|
| 365 |
|
|
}
|
| 366 |
|
|
|
| 367 |
|
|
if (need_paren)
|
| 368 |
|
|
{
|
| 369 |
|
|
(*info->fprintf_func) (info->stream, ")");
|
| 370 |
|
|
need_paren = 0;
|
| 371 |
|
|
}
|
| 372 |
|
|
|
| 373 |
|
|
if ((operand->flags & PPC_OPERAND_PARENS) == 0)
|
| 374 |
|
|
need_comma = 1;
|
| 375 |
|
|
else
|
| 376 |
|
|
{
|
| 377 |
|
|
(*info->fprintf_func) (info->stream, "(");
|
| 378 |
|
|
need_paren = 1;
|
| 379 |
|
|
}
|
| 380 |
|
|
}
|
| 381 |
|
|
|
| 382 |
|
|
/* We have found and printed an instruction; return. */
|
| 383 |
|
|
return 4;
|
| 384 |
|
|
}
|
| 385 |
|
|
|
| 386 |
|
|
if ((dialect & PPC_OPCODE_ANY) != 0)
|
| 387 |
|
|
{
|
| 388 |
|
|
dialect = ~PPC_OPCODE_ANY;
|
| 389 |
|
|
goto again;
|
| 390 |
|
|
}
|
| 391 |
|
|
|
| 392 |
|
|
/* We could not find a match. */
|
| 393 |
|
|
(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
|
| 394 |
|
|
|
| 395 |
|
|
return 4;
|
| 396 |
|
|
}
|
| 397 |
|
|
|
| 398 |
|
|
void
|
| 399 |
|
|
print_ppc_disassembler_options (FILE *stream)
|
| 400 |
|
|
{
|
| 401 |
|
|
fprintf (stream, "\n\
|
| 402 |
|
|
The following PPC specific disassembler options are supported for use with\n\
|
| 403 |
|
|
the -M switch:\n");
|
| 404 |
|
|
|
| 405 |
|
|
fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
|
| 406 |
|
|
fprintf (stream, " e300 Disassemble the e300 instructions\n");
|
| 407 |
|
|
fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
|
| 408 |
|
|
fprintf (stream, " e500mc Disassemble the e500mc instructions\n");
|
| 409 |
|
|
fprintf (stream, " 440 Disassemble the 440 instructions\n");
|
| 410 |
|
|
fprintf (stream, " 464 Disassemble the 464 instructions\n");
|
| 411 |
|
|
fprintf (stream, " efs Disassemble the EFS instructions\n");
|
| 412 |
|
|
fprintf (stream, " ppcps Disassemble the PowerPC paired singles instructions\n");
|
| 413 |
|
|
fprintf (stream, " power4 Disassemble the Power4 instructions\n");
|
| 414 |
|
|
fprintf (stream, " power5 Disassemble the Power5 instructions\n");
|
| 415 |
|
|
fprintf (stream, " power6 Disassemble the Power6 instructions\n");
|
| 416 |
|
|
fprintf (stream, " power7 Disassemble the Power7 instructions\n");
|
| 417 |
|
|
fprintf (stream, " vsx Disassemble the Vector-Scalar (VSX) instructions\n");
|
| 418 |
|
|
fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
|
| 419 |
|
|
fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
|
| 420 |
|
|
}
|
