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jlechner |
; Options for the DEC Alpha port of the compiler
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;
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; Copyright (C) 2005 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 2, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT
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; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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; License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING. If not, write to the Free
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; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
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; 02110-1301, USA.
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msoft-float
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Target Report Mask(SOFT_FP)
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Do not use hardware fp
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mfp-regs
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Target Report Mask(FPREGS)
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Use fp registers
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mgas
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Target RejectNegative Mask(GAS)
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Assume GAS
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malpha-as
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Target RejectNegative InverseMask(GAS)
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Do not assume GAS
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mieee-conformant
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Target RejectNegative Mask(IEEE_CONFORMANT)
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Request IEEE-conformant math library routines (OSF/1)
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mieee
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Target Report RejectNegative Mask(IEEE)
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Emit IEEE-conformant code, without inexact exceptions
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mieee-with-inexact
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Target Report RejectNegative Mask(IEEE_WITH_INEXACT)
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mbuild-constants
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Target Report Mask(BUILD_CONSTANTS)
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Do not emit complex integer constants to read-only memory
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mfloat-vax
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Target Report RejectNegative Mask(FLOAT_VAX)
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Use VAX fp
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mfloat-ieee
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Target Report RejectNegative InverseMask(FLOAT_VAX)
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Do not use VAX fp
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mbwx
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Target Report Mask(BWX)
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Emit code for the byte/word ISA extension
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mmax
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Target Report Mask(MAX)
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Emit code for the motion video ISA extension
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mfix
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Target Report Mask(FIX)
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Emit code for the fp move and sqrt ISA extension
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mcix
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Target Report Mask(CIX)
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Emit code for the counting ISA extension
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mexplicit-relocs
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Target Report Mask(EXPLICIT_RELOCS)
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Emit code using explicit relocation directives
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msmall-data
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Target Report RejectNegative Mask(SMALL_DATA)
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Emit 16-bit relocations to the small data areas
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mlarge-data
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Target Report RejectNegative InverseMask(SMALL_DATA)
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Emit 32-bit relocations to the small data areas
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msmall-text
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Target Report RejectNegative Mask(SMALL_TEXT)
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Emit direct branches to local functions
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mlarge-text
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Target Report RejectNegative InverseMask(SMALL_TEXT)
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Emit indirect branches to local functions
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mtls-kernel
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Target Report Mask(TLS_KERNEL)
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Emit rdval instead of rduniq for thread pointer
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mlong-double-128
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Target Report RejectNegative Mask(LONG_DOUBLE_128)
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Use 128-bit long double
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mlong-double-64
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Target Report RejectNegative InverseMask(LONG_DOUBLE_128)
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Use 64-bit long double
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mcpu=
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Target RejectNegative Joined Var(alpha_cpu_string)
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Use features of and schedule given CPU
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mtune=
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Target RejectNegative Joined Var(alpha_tune_string)
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Schedule given CPU
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mfp-rounding-mode=
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Target RejectNegative Joined Var(alpha_fprm_string)
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Control the generated fp rounding mode
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mfp-trap-mode=
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Target RejectNegative Joined Var(alpha_fptm_string)
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Control the IEEE trap mode
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mtrap-precision=
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Target RejectNegative Joined Var(alpha_tp_string)
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Control the precision given to fp exceptions
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mmemory-latency=
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Target RejectNegative Joined Var(alpha_mlat_string)
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Tune expected memory latency
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mtls-size=
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Target RejectNegative Joined UInteger Var(alpha_tls_size) Init(32)
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Specify bit size of immediate TLS offsets
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