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;; Machine Descriptions for R8C/M16C/M32C
;; Copyright (C) 2005
;; Free Software Foundation, Inc.
;; Contributed by Red Hat.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published
;; by the Free Software Foundation; either version 2, or (at your
;; option) any later version.
;;
;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
;; License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING.  If not, write to the Free
;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
;; 02110-1301, USA.
 
;; bit shifting
 
; Shifts are unusual for m32c.  We only support shifting in one
; "direction" but the shift count is signed.  Also, immediate shift
; counts have a limited range, and variable shift counts have to be in
; $r1h which GCC normally doesn't even know about.
 
; Other than compensating for the above, the patterns below are pretty
; straightforward.
 
(define_insn "ashlqi3_i"
  [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
        (ashift:QI (match_operand:QI 1 "mra_operand" "0,0")
                   (match_operand:QI 2 "mrai_operand" "In4,R1w")))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   sha.b\t%2,%0
   mov.b\tr1l,r1h\n\tsha.b\tr1h,%0"
  )
 
(define_insn "ashrqi3_i"
  [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
        (ashiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
                     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   sha.b\t%2,%0
   mov.b\tr1l,r1h\n\tsha.b\tr1h,%0"
  )
 
(define_insn "lshlqi3_i"
  [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
        (lshiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
                     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   shl.b\t%2,%0
   mov.b\tr1l,r1h\n\tshl.b\tr1h,%0"
  )
 
 
(define_expand "ashlqi3"
  [(parallel [(set (match_operand:QI 0 "mra_operand" "")
        (ashift:QI (match_operand:QI 1 "mra_operand" "")
                   (match_operand:QI 2 "general_operand" "")))
   (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, 1, 4))
     DONE;"
  )
 
(define_expand "ashrqi3"
  [(parallel [(set (match_operand:QI 0 "mra_operand" "")
        (ashiftrt:QI (match_operand:QI 1 "mra_operand" "")
                     (neg:QI (match_operand:QI 2 "general_operand" ""))))
   (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
(define_expand "lshrqi3"
  [(parallel [(set (match_operand:QI 0 "mra_operand" "")
                   (lshiftrt:QI (match_operand:QI 1 "mra_operand" "")
                                (neg:QI (match_operand:QI 2 "general_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 
(define_insn "ashlhi3_i"
  [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
        (ashift:HI (match_operand:HI 1 "mra_operand" "0,0")
                   (match_operand:QI 2 "mrai_operand" "In4,R1w")))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   sha.w\t%2,%0
   mov.b\tr1l,r1h\n\tsha.w\tr1h,%0"
  )
 
(define_insn "ashrhi3_i"
  [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
        (ashiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
                     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   sha.w\t%2,%0
   mov.b\tr1l,r1h\n\tsha.w\tr1h,%0"
  )
 
(define_insn "lshlhi3_i"
  [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,RhiSd*Rmm")
        (lshiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
                     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   shl.w\t%2,%0
   mov.b\tr1l,r1h\n\tshl.w\tr1h,%0"
  )
 
 
(define_expand "ashlhi3"
  [(parallel [(set (match_operand:HI 0 "mra_operand" "")
                   (ashift:HI (match_operand:HI 1 "mra_operand" "")
                              (match_operand:QI 2 "general_operand" "")))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, 1, 4))
     DONE;"
  )
 
(define_expand "ashrhi3"
  [(parallel [(set (match_operand:HI 0 "mra_operand" "")
                   (ashiftrt:HI (match_operand:HI 1 "mra_operand" "")
                                (neg:QI (match_operand:QI 2 "general_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
(define_expand "lshrhi3"
  [(parallel [(set (match_operand:HI 0 "mra_operand" "")
                   (lshiftrt:HI (match_operand:HI 1 "mra_operand" "")
                                (neg:QI (match_operand:QI 2 "general_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
 
 
 
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 
 
(define_insn "ashlpsi3_i"
  [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
        (ashift:PSI (match_operand:PSI 1 "mra_operand" "0,0")
                    (match_operand:QI 2 "mrai_operand" "In4,R1w")))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  "TARGET_A24"
  "@
   sha.l\t%2,%0
   mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"
  )
 
(define_insn "ashrpsi3_i"
  [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
        (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  "TARGET_A24"
  "@
   sha.l\t%2,%0
   mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"
  )
 
(define_insn "lshlpsi3_i"
  [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd,??Rmm")
        (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
                      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  "TARGET_A24"
  "@
   shl.l\t%2,%0
   mov.b\tr1l,r1h\n\tshl.l\tr1h,%0"
  )
 
 
(define_expand "ashlpsi3"
  [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
                   (ashift:PSI (match_operand:PSI 1 "mra_operand" "")
                               (match_operand:QI 2 "mrai_operand" "")))
              (clobber (match_scratch:HI 3 ""))])]
  "TARGET_A24"
  "if (m32c_prepare_shift (operands, 1, 4))
     DONE;"
  )
 
(define_expand "ashrpsi3"
  [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
                   (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
                                 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  "TARGET_A24"
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
(define_expand "lshrpsi3"
  [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
                   (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
                                 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  "TARGET_A24"
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 
 
 
(define_insn "ashlsi3_i"
  [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
        (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
                   (match_operand:QI 2 "mrai_operand" "In4,R1w")))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   sha.l\t%2,%0
   mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"
  )
 
(define_insn "ashrsi3_i"
  [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
        (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
                     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   sha.l\t%2,%0
   mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"
  )
 
(define_insn "lshlsi3_i"
  [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
        (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
                     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))
   (clobber (match_scratch:HI 3 "=X,R1w"))]
  ""
  "@
   shl.l\t%2,%0
   mov.b\tr1l,r1h\n\tshl.l\tr1h,%0"
  )
 
 
(define_expand "ashlsi3"
  [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
        (ashift:SI (match_operand:SI 1 "r0123_operand" "")
                   (match_operand:QI 2 "mrai_operand" "")))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, 1, 4))
     DONE;"
  )
 
(define_expand "ashrsi3"
  [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
                   (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "")
                                (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, -1, 4))
     DONE;"
  )
 
(define_expand "lshrsi3"
  [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
                   (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "")
                                (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
              (clobber (match_scratch:HI 3 ""))])]
  ""
  "if (m32c_prepare_shift (operands, -1, 5))
     DONE;"
  )

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[/] [scarts/] [trunk/] [toolchain/] [scarts-gcc/] [gcc-4.1.1/] [gcc/] [config/] [m32c/] [shift.md] - Blame information for rev 12

Line No.	Rev	Author	Line
1	12	jlechner	`;; Machine Descriptions for R8C/M16C/M32C`
2			`;; Copyright (C) 2005`
3			`;; Free Software Foundation, Inc.`
4			`;; Contributed by Red Hat.`
5			`;;`
6			`;; This file is part of GCC.`
7			`;;`
8			`;; GCC is free software; you can redistribute it and/or modify it`
9			`;; under the terms of the GNU General Public License as published`
10			`;; by the Free Software Foundation; either version 2, or (at your`
11			`;; option) any later version.`
12			`;;`
13			`;; GCC is distributed in the hope that it will be useful, but WITHOUT`
14			`;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
15			`;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public`
16			`;; License for more details.`
17			`;;`
18			`;; You should have received a copy of the GNU General Public License`
19			`;; along with GCC; see the file COPYING. If not, write to the Free`
20			`;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA`
21			`;; 02110-1301, USA.`
22
23			`;; bit shifting`
24
25			`; Shifts are unusual for m32c. We only support shifting in one`
26			`; "direction" but the shift count is signed. Also, immediate shift`
27			`; counts have a limited range, and variable shift counts have to be in`
28			`; $r1h which GCC normally doesn't even know about.`
29
30			`; Other than compensating for the above, the patterns below are pretty`
31			`; straightforward.`
32
33			`(define_insn "ashlqi3_i"`
34			`[(set (match_operand:QI 0 "mra_operand" "=RqiSdRmm,RqiSdRmm")`
35			`(ashift:QI (match_operand:QI 1 "mra_operand" "0,0")`
36			`(match_operand:QI 2 "mrai_operand" "In4,R1w")))`
37			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
38			`""`
39			`"@`
40			`sha.b\t%2,%0`
41			`mov.b\tr1l,r1h\n\tsha.b\tr1h,%0"`
42			`)`
43
44			`(define_insn "ashrqi3_i"`
45			`[(set (match_operand:QI 0 "mra_operand" "=RqiSdRmm,RqiSdRmm")`
46			`(ashiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")`
47			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
48			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
49			`""`
50			`"@`
51			`sha.b\t%2,%0`
52			`mov.b\tr1l,r1h\n\tsha.b\tr1h,%0"`
53			`)`
54
55			`(define_insn "lshlqi3_i"`
56			`[(set (match_operand:QI 0 "mra_operand" "=RqiSdRmm,RqiSdRmm")`
57			`(lshiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")`
58			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
59			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
60			`""`
61			`"@`
62			`shl.b\t%2,%0`
63			`mov.b\tr1l,r1h\n\tshl.b\tr1h,%0"`
64			`)`
65
66
67			`(define_expand "ashlqi3"`
68			`[(parallel [(set (match_operand:QI 0 "mra_operand" "")`
69			`(ashift:QI (match_operand:QI 1 "mra_operand" "")`
70			`(match_operand:QI 2 "general_operand" "")))`
71			`(clobber (match_scratch:HI 3 ""))])]`
72			`""`
73			`"if (m32c_prepare_shift (operands, 1, 4))`
74			`DONE;"`
75			`)`
76
77			`(define_expand "ashrqi3"`
78			`[(parallel [(set (match_operand:QI 0 "mra_operand" "")`
79			`(ashiftrt:QI (match_operand:QI 1 "mra_operand" "")`
80			`(neg:QI (match_operand:QI 2 "general_operand" ""))))`
81			`(clobber (match_scratch:HI 3 ""))])]`
82			`""`
83			`"if (m32c_prepare_shift (operands, -1, 4))`
84			`DONE;"`
85			`)`
86
87			`(define_expand "lshrqi3"`
88			`[(parallel [(set (match_operand:QI 0 "mra_operand" "")`
89			`(lshiftrt:QI (match_operand:QI 1 "mra_operand" "")`
90			`(neg:QI (match_operand:QI 2 "general_operand" ""))))`
91			`(clobber (match_scratch:HI 3 ""))])]`
92			`""`
93			`"if (m32c_prepare_shift (operands, -1, 4))`
94			`DONE;"`
95			`)`
96
97			`; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -`
98
99			`(define_insn "ashlhi3_i"`
100			`[(set (match_operand:HI 0 "mra_operand" "=SdRhiRmm,SdRhiRmm")`
101			`(ashift:HI (match_operand:HI 1 "mra_operand" "0,0")`
102			`(match_operand:QI 2 "mrai_operand" "In4,R1w")))`
103			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
104			`""`
105			`"@`
106			`sha.w\t%2,%0`
107			`mov.b\tr1l,r1h\n\tsha.w\tr1h,%0"`
108			`)`
109
110			`(define_insn "ashrhi3_i"`
111			`[(set (match_operand:HI 0 "mra_operand" "=SdRhiRmm,SdRhiRmm")`
112			`(ashiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")`
113			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
114			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
115			`""`
116			`"@`
117			`sha.w\t%2,%0`
118			`mov.b\tr1l,r1h\n\tsha.w\tr1h,%0"`
119			`)`
120
121			`(define_insn "lshlhi3_i"`
122			`[(set (match_operand:HI 0 "mra_operand" "=RhiSdRmm,RhiSdRmm")`
123			`(lshiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")`
124			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
125			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
126			`""`
127			`"@`
128			`shl.w\t%2,%0`
129			`mov.b\tr1l,r1h\n\tshl.w\tr1h,%0"`
130			`)`
131
132
133			`(define_expand "ashlhi3"`
134			`[(parallel [(set (match_operand:HI 0 "mra_operand" "")`
135			`(ashift:HI (match_operand:HI 1 "mra_operand" "")`
136			`(match_operand:QI 2 "general_operand" "")))`
137			`(clobber (match_scratch:HI 3 ""))])]`
138			`""`
139			`"if (m32c_prepare_shift (operands, 1, 4))`
140			`DONE;"`
141			`)`
142
143			`(define_expand "ashrhi3"`
144			`[(parallel [(set (match_operand:HI 0 "mra_operand" "")`
145			`(ashiftrt:HI (match_operand:HI 1 "mra_operand" "")`
146			`(neg:QI (match_operand:QI 2 "general_operand" ""))))`
147			`(clobber (match_scratch:HI 3 ""))])]`
148			`""`
149			`"if (m32c_prepare_shift (operands, -1, 4))`
150			`DONE;"`
151			`)`
152
153			`(define_expand "lshrhi3"`
154			`[(parallel [(set (match_operand:HI 0 "mra_operand" "")`
155			`(lshiftrt:HI (match_operand:HI 1 "mra_operand" "")`
156			`(neg:QI (match_operand:QI 2 "general_operand" ""))))`
157			`(clobber (match_scratch:HI 3 ""))])]`
158			`""`
159			`"if (m32c_prepare_shift (operands, -1, 4))`
160			`DONE;"`
161			`)`
162
163
164
165
166			`; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -`
167
168
169			`(define_insn "ashlpsi3_i"`
170			`[(set (match_operand:PSI 0 "mra_operand" "=R02RaaSdRmm,R02RaaSdRmm")`
171			`(ashift:PSI (match_operand:PSI 1 "mra_operand" "0,0")`
172			`(match_operand:QI 2 "mrai_operand" "In4,R1w")))`
173			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
174			`"TARGET_A24"`
175			`"@`
176			`sha.l\t%2,%0`
177			`mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"`
178			`)`
179
180			`(define_insn "ashrpsi3_i"`
181			`[(set (match_operand:PSI 0 "mra_operand" "=R02RaaSdRmm,R02RaaSdRmm")`
182			`(ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")`
183			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
184			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
185			`"TARGET_A24"`
186			`"@`
187			`sha.l\t%2,%0`
188			`mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"`
189			`)`
190
191			`(define_insn "lshlpsi3_i"`
192			`[(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd,??Rmm")`
193			`(lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")`
194			`(neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,R1w"))))`
195			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
196			`"TARGET_A24"`
197			`"@`
198			`shl.l\t%2,%0`
199			`mov.b\tr1l,r1h\n\tshl.l\tr1h,%0"`
200			`)`
201
202
203			`(define_expand "ashlpsi3"`
204			`[(parallel [(set (match_operand:PSI 0 "mra_operand" "")`
205			`(ashift:PSI (match_operand:PSI 1 "mra_operand" "")`
206			`(match_operand:QI 2 "mrai_operand" "")))`
207			`(clobber (match_scratch:HI 3 ""))])]`
208			`"TARGET_A24"`
209			`"if (m32c_prepare_shift (operands, 1, 4))`
210			`DONE;"`
211			`)`
212
213			`(define_expand "ashrpsi3"`
214			`[(parallel [(set (match_operand:PSI 0 "mra_operand" "")`
215			`(ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "")`
216			`(neg:QI (match_operand:QI 2 "mrai_operand" ""))))`
217			`(clobber (match_scratch:HI 3 ""))])]`
218			`"TARGET_A24"`
219			`"if (m32c_prepare_shift (operands, -1, 4))`
220			`DONE;"`
221			`)`
222
223			`(define_expand "lshrpsi3"`
224			`[(parallel [(set (match_operand:PSI 0 "mra_operand" "")`
225			`(lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "")`
226			`(neg:QI (match_operand:QI 2 "mrai_operand" ""))))`
227			`(clobber (match_scratch:HI 3 ""))])]`
228			`"TARGET_A24"`
229			`"if (m32c_prepare_shift (operands, -1, 4))`
230			`DONE;"`
231			`)`
232
233			`; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -`
234
235
236
237			`(define_insn "ashlsi3_i"`
238			`[(set (match_operand:SI 0 "r0123_operand" "=R03,R03")`
239			`(ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")`
240			`(match_operand:QI 2 "mrai_operand" "In4,R1w")))`
241			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
242			`""`
243			`"@`
244			`sha.l\t%2,%0`
245			`mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"`
246			`)`
247
248			`(define_insn "ashrsi3_i"`
249			`[(set (match_operand:SI 0 "r0123_operand" "=R03,R03")`
250			`(ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")`
251			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
252			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
253			`""`
254			`"@`
255			`sha.l\t%2,%0`
256			`mov.b\tr1l,r1h\n\tsha.l\tr1h,%0"`
257			`)`
258
259			`(define_insn "lshlsi3_i"`
260			`[(set (match_operand:SI 0 "r0123_operand" "=R03,R03")`
261			`(lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")`
262			`(neg:QI (match_operand:QI 2 "mrai_operand" "In4,R1w"))))`
263			`(clobber (match_scratch:HI 3 "=X,R1w"))]`
264			`""`
265			`"@`
266			`shl.l\t%2,%0`
267			`mov.b\tr1l,r1h\n\tshl.l\tr1h,%0"`
268			`)`
269
270
271			`(define_expand "ashlsi3"`
272			`[(parallel [(set (match_operand:SI 0 "r0123_operand" "")`
273			`(ashift:SI (match_operand:SI 1 "r0123_operand" "")`
274			`(match_operand:QI 2 "mrai_operand" "")))`
275			`(clobber (match_scratch:HI 3 ""))])]`
276			`""`
277			`"if (m32c_prepare_shift (operands, 1, 4))`
278			`DONE;"`
279			`)`
280
281			`(define_expand "ashrsi3"`
282			`[(parallel [(set (match_operand:SI 0 "r0123_operand" "")`
283			`(ashiftrt:SI (match_operand:SI 1 "r0123_operand" "")`
284			`(neg:QI (match_operand:QI 2 "mrai_operand" ""))))`
285			`(clobber (match_scratch:HI 3 ""))])]`
286			`""`
287			`"if (m32c_prepare_shift (operands, -1, 4))`
288			`DONE;"`
289			`)`
290
291			`(define_expand "lshrsi3"`
292			`[(parallel [(set (match_operand:SI 0 "r0123_operand" "")`
293			`(lshiftrt:SI (match_operand:SI 1 "r0123_operand" "")`
294			`(neg:QI (match_operand:QI 2 "mrai_operand" ""))))`
295			`(clobber (match_scratch:HI 3 ""))])]`
296			`""`
297			`"if (m32c_prepare_shift (operands, -1, 5))`
298			`DONE;"`
299			`)`