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[/] [scarts/] [trunk/] [toolchain/] [scarts-gcc/] [gcc-4.1.1/] [gcc/] [config/] [mips/] [9000.md] - Blame information for rev 12

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1 12 jlechner 
;; DFA-based pipeline description for the RM9000.
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;;   Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 2, or (at your
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;; option) any later version.
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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;; License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING.  If not, write to the
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;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
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;; MA 02110-1301, USA.
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(define_automaton "rm9k_main, rm9k_imul, rm9k_fdiv")
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;; These units are for insns that can issue in either pipe.  We don't
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;; want to use constructs like "rm9k_m | rm9k_f_int" since that would
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;; needlessly make an insn prefer the M pipe.
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(define_cpu_unit "rm9k_any1" "rm9k_main")
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(define_cpu_unit "rm9k_any2" "rm9k_main")
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;; F and M pipe units, for instructions that must be issued by a
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;; particular pipe.  Split the F pipe into two units so that integer
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;; instructions can issue while the FPU is busy.  We don't need to
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;; split M because it is only ever reserved for a single cycle.
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(define_cpu_unit "rm9k_m" "rm9k_main")
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(define_cpu_unit "rm9k_f_int" "rm9k_main")
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(define_cpu_unit "rm9k_f_float" "rm9k_main")
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(exclusion_set "rm9k_f_int" "rm9k_f_float")
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;; Multiply/divide units.
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(define_cpu_unit "rm9k_imul" "rm9k_imul")
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(define_cpu_unit "rm9k_fdiv" "rm9k_fdiv")
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(define_insn_reservation "rm9k_load" 3
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "load,fpload,fpidxload"))
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  "rm9k_m")
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(define_insn_reservation "rm9k_store" 1
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "store,fpstore,fpidxstore"))
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  "rm9k_m")
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(define_insn_reservation "rm9k_int" 1
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "arith,shift,slt,clz,const,nop,trap"))
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  "rm9k_any1 | rm9k_any2")
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(define_insn_reservation "rm9k_int_cmove" 2
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "condmove")
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            (eq_attr "mode" "SI,DI")))
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  "rm9k_any1 | rm9k_any2")
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;; This applies to both 'mul' and 'mult'.
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(define_insn_reservation "rm9k_mulsi" 3
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "imul,imul3,imadd")
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            (eq_attr "mode" "!DI")))
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  "rm9k_f_int")
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(define_insn_reservation "rm9k_muldi" 7
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "imul,imul3,imadd")
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            (eq_attr "mode" "DI")))
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  "rm9k_f_int + rm9k_imul * 7")
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(define_insn_reservation "rm9k_divsi" 38
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "idiv")
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            (eq_attr "mode" "!DI")))
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  "rm9k_f_int + rm9k_imul * 38")
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(define_insn_reservation "rm9k_divdi" 70
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "idiv")
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            (eq_attr "mode" "DI")))
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  "rm9k_f_int + rm9k_imul * 70")
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(define_insn_reservation "rm9k_mfhilo" 1
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "mfhilo"))
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  "rm9k_f_int")
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(define_insn_reservation "rm9k_mthilo" 5
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "mthilo"))
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  "rm9k_f_int")
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(define_insn_reservation "rm9k_xfer" 2
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "xfer"))
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  "rm9k_m")
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(define_insn_reservation "rm9k_fquick" 2
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "fabs,fneg,fcmp,fmove"))
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  "rm9k_f_float")
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(define_insn_reservation "rm9k_fcmove" 2
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "condmove")
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            (eq_attr "mode" "SF,DF")))
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  "rm9k_m")
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(define_insn_reservation "rm9k_fadd" 6
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "fadd,fcvt"))
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  "rm9k_f_float")
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(define_insn_reservation "rm9k_fmuls" 6
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "fmul,fmadd")
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            (eq_attr "mode" "SF")))
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  "rm9k_f_float")
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(define_insn_reservation "rm9k_fmuld" 9
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "fmul,fmadd")
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            (eq_attr "mode" "DF")))
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  "rm9k_f_float * 3")
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(define_insn_reservation "rm9k_fdivs" 22
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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            (eq_attr "mode" "SF")))
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  "rm9k_f_float + rm9k_fdiv * 22")
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(define_insn_reservation "rm9k_fdivd" 37
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  (and (eq_attr "cpu" "r9000")
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       (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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            (eq_attr "mode" "DF")))
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  "rm9k_f_float + rm9k_fdiv * 37")
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(define_insn_reservation "rm9k_branch" 2
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "branch,jump,call"))
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  "rm9k_any1 | rm9k_any2")
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(define_insn_reservation "rm9k_unknown" 1
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  (and (eq_attr "cpu" "r9000")
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       (eq_attr "type" "unknown,multi"))
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  "rm9k_m + rm9k_f_int + rm9k_any1 + rm9k_any2")

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