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jlechner |
/* Copyright (C) 1999, 2003, 2004 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#undef EXTRA_SECTIONS
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#define EXTRA_SECTIONS in_sdata, in_sbss
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#undef EXTRA_SECTION_FUNCTIONS
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#define EXTRA_SECTION_FUNCTIONS \
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SECTION_FUNCTION_TEMPLATE(sdata_section, in_sdata, SDATA_SECTION_ASM_OP) \
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SECTION_FUNCTION_TEMPLATE(sbss_section, in_sbss, SBSS_SECTION_ASM_OP)
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#undef TARGET_VERSION
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#define TARGET_VERSION fprintf (stderr, " (MIPS, VxWorks syntax)");
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/* Combination of mips.h and svr4.h. */
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#undef SWITCH_TAKES_ARG
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#define SWITCH_TAKES_ARG(CHAR) \
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(DEFAULT_SWITCH_TAKES_ARG (CHAR) \
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|| (CHAR) == 'G' \
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|| (CHAR) == 'h' \
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|| (CHAR) == 'x' \
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|| (CHAR) == 'z')
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#undef ASM_SPEC
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#define ASM_SPEC "\
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%{!G:-G 0} %{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \
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%{mips32} %{mips32r2} %{mips64} \
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%{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \
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%(subtarget_asm_optimizing_spec) \
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%(subtarget_asm_debugging_spec) \
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%{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
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%{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
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%{mtune=*} %{v} \
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%(subtarget_asm_spec)"
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#undef LINK_SPEC
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/* LINK_SPEC is clobbered in svr4.h. ugh! */
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#define LINK_SPEC "\
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%(endian_spec) \
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%{!G:-G 0} %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} \
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%{bestGnum}"
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#define TARGET_OS_CPP_BUILTINS() \
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do \
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{ \
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builtin_define ("__vxworks"); \
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builtin_assert ("system=unix"); \
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} \
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while (0)
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#undef SUBTARGET_CPP_SPEC
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#define SUBTARGET_CPP_SPEC \
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"%{!DCPU=*: %{mips3|mips4|mips64:-DCPU=MIPS64;:-DCPU=MIPS32}} \
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%{EL|mel:-DMIPSEL;:-DMIPSEB} \
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%{msoft-float:-DSOFT_FLOAT} \
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%{mips1:-D_WRS_R3K_EXC_SUPPORT}"
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/* No sdata. */
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#undef MIPS_DEFAULT_GVALUE
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#define MIPS_DEFAULT_GVALUE 0
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