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jlechner |
/* Definitions of target machine for GNU compiler, for the HP Spectrum.
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Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
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2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
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Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
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and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
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Software Science at the University of Utah.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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enum cmp_type /* comparison type */
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{
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CMP_SI, /* compare integers */
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CMP_SF, /* compare single precision floats */
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CMP_DF, /* compare double precision floats */
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CMP_MAX /* max comparison type */
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};
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/* For long call handling. */
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extern unsigned long total_code_bytes;
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/* Which processor to schedule for. */
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enum processor_type
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{
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PROCESSOR_700,
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PROCESSOR_7100,
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PROCESSOR_7100LC,
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PROCESSOR_7200,
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PROCESSOR_7300,
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PROCESSOR_8000
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};
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/* For -mschedule= option. */
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extern enum processor_type pa_cpu;
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/* For -munix= option. */
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extern int flag_pa_unix;
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#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
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/* Print subsidiary information on the compiler version in use. */
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#define TARGET_VERSION fputs (" (hppa)", stderr);
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#define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
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/* Generate code for the HPPA 2.0 architecture in 64bit mode. */
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#ifndef TARGET_64BIT
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#define TARGET_64BIT 0
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#endif
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/* Generate code for ELF32 ABI. */
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#ifndef TARGET_ELF32
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#define TARGET_ELF32 0
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#endif
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/* Generate code for SOM 32bit ABI. */
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#ifndef TARGET_SOM
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#define TARGET_SOM 0
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#endif
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/* HP-UX UNIX features. */
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#ifndef TARGET_HPUX
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#define TARGET_HPUX 0
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#endif
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/* HP-UX 10.10 UNIX 95 features. */
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#ifndef TARGET_HPUX_10_10
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#define TARGET_HPUX_10_10 0
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#endif
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/* HP-UX 11i multibyte and UNIX 98 extensions. */
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#ifndef TARGET_HPUX_11_11
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#define TARGET_HPUX_11_11 0
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#endif
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/* The following three defines are potential target switches. The current
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defines are optimal given the current capabilities of GAS and GNU ld. */
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/* Define to a C expression evaluating to true to use long absolute calls.
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Currently, only the HP assembler and SOM linker support long absolute
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calls. They are used only in non-pic code. */
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#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
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/* Define to a C expression evaluating to true to use long pic symbol
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difference calls. This is a call variant similar to the long pic
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pc-relative call. Long pic symbol difference calls are only used with
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the HP SOM linker. Currently, only the HP assembler supports these
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calls. GAS doesn't allow an arbitrary difference of two symbols. */
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#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS)
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/* Define to a C expression evaluating to true to use long pic
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pc-relative calls. Long pic pc-relative calls are only used with
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GAS. Currently, they are usable for calls within a module but
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not for external calls. */
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#define TARGET_LONG_PIC_PCREL_CALL 0
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/* Define to a C expression evaluating to true to use SOM secondary
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definition symbols for weak support. Linker support for secondary
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definition symbols is buggy prior to HP-UX 11.X. */
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#define TARGET_SOM_SDEF 0
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/* Define to a C expression evaluating to true to save the entry value
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of SP in the current frame marker. This is normally unnecessary.
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However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
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HP compilers don't use this flag but it is supported by the assembler.
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We set this flag to indicate that register %r3 has been saved at the
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start of the frame. Thus, when the HP unwind library is used, we
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need to generate additional code to save SP into the frame marker. */
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#define TARGET_HPUX_UNWIND_LIBRARY 0
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#ifndef TARGET_DEFAULT
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#define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
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#endif
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#ifndef TARGET_CPU_DEFAULT
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#define TARGET_CPU_DEFAULT 0
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#endif
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#ifndef TARGET_SCHED_DEFAULT
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#define TARGET_SCHED_DEFAULT PROCESSOR_8000
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#endif
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/* Support for a compile-time default CPU, et cetera. The rules are:
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--with-schedule is ignored if -mschedule is specified.
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--with-arch is ignored if -march is specified. */
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#define OPTION_DEFAULT_SPECS \
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{"arch", "%{!march=*:-march=%(VALUE)}" }, \
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{"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
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/* Specify the dialect of assembler to use. New mnemonics is dialect one
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and the old mnemonics are dialect zero. */
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#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
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#define OVERRIDE_OPTIONS override_options ()
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/* Override some settings from dbxelf.h. */
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/* We do not have to be compatible with dbx, so we enable gdb extensions
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by default. */
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#define DEFAULT_GDB_EXTENSIONS 1
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/* This used to be zero (no max length), but big enums and such can
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cause huge strings which killed gas.
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We also have to avoid lossage in dbxout.c -- it does not compute the
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string size accurately, so we are real conservative here. */
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#undef DBX_CONTIN_LENGTH
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#define DBX_CONTIN_LENGTH 3000
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/* GDB always assumes the current function's frame begins at the value
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of the stack pointer upon entry to the current function. Accessing
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local variables and parameters passed on the stack is done using the
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base of the frame + an offset provided by GCC.
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For functions which have frame pointers this method works fine;
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the (frame pointer) == (stack pointer at function entry) and GCC provides
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an offset relative to the frame pointer.
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This loses for functions without a frame pointer; GCC provides an offset
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which is relative to the stack pointer after adjusting for the function's
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frame size. GDB would prefer the offset to be relative to the value of
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the stack pointer at the function's entry. Yuk! */
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#define DEBUGGER_AUTO_OFFSET(X) \
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((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
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+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
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#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
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((GET_CODE (X) == PLUS ? OFFSET : 0) \
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+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
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#define TARGET_CPU_CPP_BUILTINS() \
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do { \
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builtin_assert("cpu=hppa"); \
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builtin_assert("machine=hppa"); \
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builtin_define("__hppa"); \
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builtin_define("__hppa__"); \
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if (TARGET_PA_20) \
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builtin_define("_PA_RISC2_0"); \
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else if (TARGET_PA_11) \
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builtin_define("_PA_RISC1_1"); \
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else \
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builtin_define("_PA_RISC1_0"); \
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} while (0)
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/* An old set of OS defines for various BSD-like systems. */
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#define TARGET_OS_CPP_BUILTINS() \
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do \
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{ \
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builtin_define_std ("REVARGV"); \
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builtin_define_std ("hp800"); \
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builtin_define_std ("hp9000"); \
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builtin_define_std ("hp9k8"); \
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if (!c_dialect_cxx () && !flag_iso) \
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builtin_define ("hppa"); \
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builtin_define_std ("spectrum"); \
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builtin_define_std ("unix"); \
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builtin_assert ("system=bsd"); \
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builtin_assert ("system=unix"); \
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} \
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while (0)
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#define CC1_SPEC "%{pg:} %{p:}"
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#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
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/* We don't want -lg. */
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#ifndef LIB_SPEC
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#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
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#endif
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/* This macro defines command-line switches that modify the default
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target name.
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The definition is be an initializer for an array of structures. Each
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array element has have three elements: the switch name, one of the
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enumeration codes ADD or DELETE to indicate whether the string should be
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inserted or deleted, and the string to be inserted or deleted. */
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#define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
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/* Make gcc agree with <machine/ansi.h> */
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#define SIZE_TYPE "unsigned int"
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#define PTRDIFF_TYPE "int"
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#define WCHAR_TYPE "unsigned int"
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#define WCHAR_TYPE_SIZE 32
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/* Show we can debug even without a frame pointer. */
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#define CAN_DEBUG_WITHOUT_FP
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/* target machine storage layout */
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typedef struct machine_function GTY(())
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{
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/* Flag indicating that a .NSUBSPA directive has been output for
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this function. */
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int in_nsubspa;
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} machine_function;
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254 |
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/* Define this macro if it is advisable to hold scalars in registers
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in a wider mode than that declared by the program. In such cases,
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the value is constrained to be within the bounds of the declared
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type, but kept valid in the wider mode. The signedness of the
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extension may differ from that of the type. */
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260 |
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#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
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if (GET_MODE_CLASS (MODE) == MODE_INT \
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&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
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(MODE) = word_mode;
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265 |
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/* Define this if most significant bit is lowest numbered
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in instructions that operate on numbered bit-fields. */
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#define BITS_BIG_ENDIAN 1
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269 |
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/* Define this if most significant byte of a word is the lowest numbered. */
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/* That is true on the HP-PA. */
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#define BYTES_BIG_ENDIAN 1
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273 |
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/* Define this if most significant word of a multiword number is lowest
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numbered. */
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#define WORDS_BIG_ENDIAN 1
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277 |
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#define MAX_BITS_PER_WORD 64
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278 |
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279 |
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/* Width of a word, in units (bytes). */
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280 |
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#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
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281 |
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282 |
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/* Minimum number of units in a word. If this is undefined, the default
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is UNITS_PER_WORD. Otherwise, it is the constant value that is the
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284 |
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smallest value that UNITS_PER_WORD can have at run-time.
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285 |
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286 |
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FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
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287 |
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building of various TImode routines in libgcc. The HP runtime
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288 |
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specification doesn't provide the alignment requirements and calling
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289 |
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conventions for TImode variables. */
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290 |
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#define MIN_UNITS_PER_WORD 4
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291 |
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292 |
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/* The widest floating point format supported by the hardware. Note that
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293 |
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setting this influences some Ada floating point type sizes, currently
|
294 |
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required for GNAT to operate properly. */
|
295 |
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#define WIDEST_HARDWARE_FP_SIZE 64
|
296 |
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297 |
|
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
|
298 |
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#define PARM_BOUNDARY BITS_PER_WORD
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299 |
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300 |
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/* Largest alignment required for any stack parameter, in bits.
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301 |
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Don't define this if it is equal to PARM_BOUNDARY */
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302 |
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#define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
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303 |
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304 |
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/* Boundary (in *bits*) on which stack pointer is always aligned;
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305 |
|
|
certain optimizations in combine depend on this.
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306 |
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|
|
307 |
|
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The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
|
308 |
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the stack on the 32 and 64-bit ports, respectively. However, we
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309 |
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are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
|
310 |
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in main. Thus, we treat the former as the preferred alignment. */
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311 |
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#define STACK_BOUNDARY BIGGEST_ALIGNMENT
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312 |
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#define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
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313 |
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|
314 |
|
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/* Allocation boundary (in *bits*) for the code of a function. */
|
315 |
|
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#define FUNCTION_BOUNDARY BITS_PER_WORD
|
316 |
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|
317 |
|
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/* Alignment of field after `int : 0' in a structure. */
|
318 |
|
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#define EMPTY_FIELD_BOUNDARY 32
|
319 |
|
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320 |
|
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/* Every structure's size must be a multiple of this. */
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#define STRUCTURE_SIZE_BOUNDARY 8
|
322 |
|
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|
323 |
|
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/* A bit-field declared as `int' forces `int' alignment for the struct. */
|
324 |
|
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#define PCC_BITFIELD_TYPE_MATTERS 1
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325 |
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326 |
|
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/* No data type wants to be aligned rounder than this. */
|
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|
|
#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
|
328 |
|
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|
329 |
|
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/* Get around hp-ux assembler bug, and make strcpy of constants fast. */
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330 |
|
|
#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
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|
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((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
|
332 |
|
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|
333 |
|
|
/* Make arrays of chars word-aligned for the same reasons. */
|
334 |
|
|
#define DATA_ALIGNMENT(TYPE, ALIGN) \
|
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|
|
(TREE_CODE (TYPE) == ARRAY_TYPE \
|
336 |
|
|
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
|
337 |
|
|
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
338 |
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339 |
|
|
/* Set this nonzero if move instructions will actually fail to work
|
340 |
|
|
when given unaligned data. */
|
341 |
|
|
#define STRICT_ALIGNMENT 1
|
342 |
|
|
|
343 |
|
|
/* Value is 1 if it is a good idea to tie two pseudo registers
|
344 |
|
|
when one has mode MODE1 and one has mode MODE2.
|
345 |
|
|
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
|
346 |
|
|
for any hard reg, then this must be 0 for correct output. */
|
347 |
|
|
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
348 |
|
|
(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
|
349 |
|
|
|
350 |
|
|
/* Specify the registers used for certain standard purposes.
|
351 |
|
|
The values of these macros are register numbers. */
|
352 |
|
|
|
353 |
|
|
/* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
|
354 |
|
|
/* #define PC_REGNUM */
|
355 |
|
|
|
356 |
|
|
/* Register to use for pushing function arguments. */
|
357 |
|
|
#define STACK_POINTER_REGNUM 30
|
358 |
|
|
|
359 |
|
|
/* Base register for access to local variables of the function. */
|
360 |
|
|
#define FRAME_POINTER_REGNUM 3
|
361 |
|
|
|
362 |
|
|
/* Value should be nonzero if functions must have frame pointers. */
|
363 |
|
|
#define FRAME_POINTER_REQUIRED \
|
364 |
|
|
(current_function_calls_alloca)
|
365 |
|
|
|
366 |
|
|
/* Don't allow hard registers to be renamed into r2 unless r2
|
367 |
|
|
is already live or already being saved (due to eh). */
|
368 |
|
|
|
369 |
|
|
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
|
370 |
|
|
((NEW_REG) != 2 || regs_ever_live[2] || current_function_calls_eh_return)
|
371 |
|
|
|
372 |
|
|
/* C statement to store the difference between the frame pointer
|
373 |
|
|
and the stack pointer values immediately after the function prologue.
|
374 |
|
|
|
375 |
|
|
Note, we always pretend that this is a leaf function because if
|
376 |
|
|
it's not, there's no point in trying to eliminate the
|
377 |
|
|
frame pointer. If it is a leaf function, we guessed right! */
|
378 |
|
|
#define INITIAL_FRAME_POINTER_OFFSET(VAR) \
|
379 |
|
|
do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
|
380 |
|
|
|
381 |
|
|
/* Base register for access to arguments of the function. */
|
382 |
|
|
#define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
|
383 |
|
|
|
384 |
|
|
/* Register in which static-chain is passed to a function. */
|
385 |
|
|
#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
|
386 |
|
|
|
387 |
|
|
/* Register used to address the offset table for position-independent
|
388 |
|
|
data references. */
|
389 |
|
|
#define PIC_OFFSET_TABLE_REGNUM \
|
390 |
|
|
(flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
|
391 |
|
|
|
392 |
|
|
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
|
393 |
|
|
|
394 |
|
|
/* Function to return the rtx used to save the pic offset table register
|
395 |
|
|
across function calls. */
|
396 |
|
|
extern struct rtx_def *hppa_pic_save_rtx (void);
|
397 |
|
|
|
398 |
|
|
#define DEFAULT_PCC_STRUCT_RETURN 0
|
399 |
|
|
|
400 |
|
|
/* Register in which address to store a structure value
|
401 |
|
|
is passed to a function. */
|
402 |
|
|
#define PA_STRUCT_VALUE_REGNUM 28
|
403 |
|
|
|
404 |
|
|
/* Describe how we implement __builtin_eh_return. */
|
405 |
|
|
#define EH_RETURN_DATA_REGNO(N) \
|
406 |
|
|
((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
|
407 |
|
|
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
|
408 |
|
|
#define EH_RETURN_HANDLER_RTX \
|
409 |
|
|
gen_rtx_MEM (word_mode, \
|
410 |
|
|
gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
|
411 |
|
|
TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
|
412 |
|
|
|
413 |
|
|
/* Offset from the frame pointer register value to the top of stack. */
|
414 |
|
|
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
|
415 |
|
|
|
416 |
|
|
/* A C expression whose value is RTL representing the location of the
|
417 |
|
|
incoming return address at the beginning of any function, before the
|
418 |
|
|
prologue. You only need to define this macro if you want to support
|
419 |
|
|
call frame debugging information like that provided by DWARF 2. */
|
420 |
|
|
#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
|
421 |
|
|
#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
|
422 |
|
|
|
423 |
|
|
/* A C expression whose value is an integer giving a DWARF 2 column
|
424 |
|
|
number that may be used as an alternate return column. This should
|
425 |
|
|
be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
|
426 |
|
|
register, but an alternate column needs to be used for signal frames.
|
427 |
|
|
|
428 |
|
|
Column 0 is not used but unfortunately its register size is set to
|
429 |
|
|
4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */
|
430 |
|
|
#define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
|
431 |
|
|
|
432 |
|
|
/* This macro chooses the encoding of pointers embedded in the exception
|
433 |
|
|
handling sections. If at all possible, this should be defined such
|
434 |
|
|
that the exception handling section will not require dynamic relocations,
|
435 |
|
|
and so may be read-only.
|
436 |
|
|
|
437 |
|
|
Because the HP assembler auto aligns, it is necessary to use
|
438 |
|
|
DW_EH_PE_aligned. It's not possible to make the data read-only
|
439 |
|
|
on the HP-UX SOM port since the linker requires fixups for label
|
440 |
|
|
differences in different sections to be word aligned. However,
|
441 |
|
|
the SOM linker can do unaligned fixups for absolute pointers.
|
442 |
|
|
We also need aligned pointers for global and function pointers.
|
443 |
|
|
|
444 |
|
|
Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
|
445 |
|
|
fixups, the runtime doesn't have a consistent relationship between
|
446 |
|
|
text and data for dynamically loaded objects. Thus, it's not possible
|
447 |
|
|
to use pc-relative encoding for pointers on this target. It may be
|
448 |
|
|
possible to use segment relative encodings but GAS doesn't currently
|
449 |
|
|
have a mechanism to generate these encodings. For other targets, we
|
450 |
|
|
use pc-relative encoding for pointers. If the pointer might require
|
451 |
|
|
dynamic relocation, we make it indirect. */
|
452 |
|
|
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
|
453 |
|
|
(TARGET_GAS && !TARGET_HPUX \
|
454 |
|
|
? (DW_EH_PE_pcrel \
|
455 |
|
|
| ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \
|
456 |
|
|
| (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \
|
457 |
|
|
: (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \
|
458 |
|
|
? DW_EH_PE_aligned : DW_EH_PE_absptr))
|
459 |
|
|
|
460 |
|
|
/* Handle special EH pointer encodings. Absolute, pc-relative, and
|
461 |
|
|
indirect are handled automatically. We output pc-relative, and
|
462 |
|
|
indirect pc-relative ourself since we need some special magic to
|
463 |
|
|
generate pc-relative relocations, and to handle indirect function
|
464 |
|
|
pointers. */
|
465 |
|
|
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
|
466 |
|
|
do { \
|
467 |
|
|
if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \
|
468 |
|
|
{ \
|
469 |
|
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
470 |
|
|
if ((ENCODING) & DW_EH_PE_indirect) \
|
471 |
|
|
output_addr_const (FILE, get_deferred_plabel (ADDR)); \
|
472 |
|
|
else \
|
473 |
|
|
assemble_name (FILE, XSTR ((ADDR), 0)); \
|
474 |
|
|
fputs ("+8-$PIC_pcrel$0", FILE); \
|
475 |
|
|
goto DONE; \
|
476 |
|
|
} \
|
477 |
|
|
} while (0)
|
478 |
|
|
|
479 |
|
|
/* The letters I, J, K, L and M in a register constraint string
|
480 |
|
|
can be used to stand for particular ranges of immediate operands.
|
481 |
|
|
This macro defines what the ranges are.
|
482 |
|
|
C is the letter, and VALUE is a constant value.
|
483 |
|
|
Return 1 if VALUE is in the range specified by C.
|
484 |
|
|
|
485 |
|
|
`I' is used for the 11 bit constants.
|
486 |
|
|
`J' is used for the 14 bit constants.
|
487 |
|
|
`K' is used for values that can be moved with a zdepi insn.
|
488 |
|
|
`L' is used for the 5 bit constants.
|
489 |
|
|
`M' is used for 0.
|
490 |
|
|
`N' is used for values with the least significant 11 bits equal to zero
|
491 |
|
|
and when sign extended from 32 to 64 bits the
|
492 |
|
|
value does not change.
|
493 |
|
|
`O' is used for numbers n such that n+1 is a power of 2.
|
494 |
|
|
*/
|
495 |
|
|
|
496 |
|
|
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
|
497 |
|
|
((C) == 'I' ? VAL_11_BITS_P (VALUE) \
|
498 |
|
|
: (C) == 'J' ? VAL_14_BITS_P (VALUE) \
|
499 |
|
|
: (C) == 'K' ? zdepi_cint_p (VALUE) \
|
500 |
|
|
: (C) == 'L' ? VAL_5_BITS_P (VALUE) \
|
501 |
|
|
: (C) == 'M' ? (VALUE) == 0 \
|
502 |
|
|
: (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
|
503 |
|
|
|| (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
|
504 |
|
|
== (HOST_WIDE_INT) -1 << 31)) \
|
505 |
|
|
: (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
|
506 |
|
|
: (C) == 'P' ? and_mask_p (VALUE) \
|
507 |
|
|
: 0)
|
508 |
|
|
|
509 |
|
|
/* Similar, but for floating or large integer constants, and defining letters
|
510 |
|
|
G and H. Here VALUE is the CONST_DOUBLE rtx itself.
|
511 |
|
|
|
512 |
|
|
For PA, `G' is the floating-point constant zero. `H' is undefined. */
|
513 |
|
|
|
514 |
|
|
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
|
515 |
|
|
((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
|
516 |
|
|
&& (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
|
517 |
|
|
: 0)
|
518 |
|
|
|
519 |
|
|
/* The class value for index registers, and the one for base regs. */
|
520 |
|
|
#define INDEX_REG_CLASS GENERAL_REGS
|
521 |
|
|
#define BASE_REG_CLASS GENERAL_REGS
|
522 |
|
|
|
523 |
|
|
#define FP_REG_CLASS_P(CLASS) \
|
524 |
|
|
((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
|
525 |
|
|
|
526 |
|
|
/* True if register is floating-point. */
|
527 |
|
|
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
|
528 |
|
|
|
529 |
|
|
/* Given an rtx X being reloaded into a reg required to be
|
530 |
|
|
in class CLASS, return the class of reg to actually use.
|
531 |
|
|
In general this is just CLASS; but on some machines
|
532 |
|
|
in some cases it is preferable to use a more restrictive class. */
|
533 |
|
|
#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
|
534 |
|
|
|
535 |
|
|
/* Return the register class of a scratch register needed to copy
|
536 |
|
|
IN into a register in CLASS in MODE, or a register in CLASS in MODE
|
537 |
|
|
to IN. If it can be done directly NO_REGS is returned.
|
538 |
|
|
|
539 |
|
|
Avoid doing any work for the common case calls. */
|
540 |
|
|
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
|
541 |
|
|
((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
|
542 |
|
|
&& REGNO (IN) < FIRST_PSEUDO_REGISTER) \
|
543 |
|
|
? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
|
544 |
|
|
|
545 |
|
|
#define MAYBE_FP_REG_CLASS_P(CLASS) \
|
546 |
|
|
reg_classes_intersect_p ((CLASS), FP_REGS)
|
547 |
|
|
|
548 |
|
|
/* On the PA it is not possible to directly move data between
|
549 |
|
|
GENERAL_REGS and FP_REGS. On the 32-bit port, we use the
|
550 |
|
|
location at SP-16. We don't expose this location in the RTL to
|
551 |
|
|
avoid scheduling related problems. For example, the store and
|
552 |
|
|
load could be separated by a call to a pure or const function
|
553 |
|
|
which has no frame and uses SP-16. */
|
554 |
|
|
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
|
555 |
|
|
(TARGET_64BIT \
|
556 |
|
|
&& (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2) \
|
557 |
|
|
|| MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1)))
|
558 |
|
|
|
559 |
|
|
|
560 |
|
|
/* Stack layout; function entry, exit and calling. */
|
561 |
|
|
|
562 |
|
|
/* Define this if pushing a word on the stack
|
563 |
|
|
makes the stack pointer a smaller address. */
|
564 |
|
|
/* #define STACK_GROWS_DOWNWARD */
|
565 |
|
|
|
566 |
|
|
/* Believe it or not. */
|
567 |
|
|
#define ARGS_GROW_DOWNWARD
|
568 |
|
|
|
569 |
|
|
/* Define this to nonzero if the nominal address of the stack frame
|
570 |
|
|
is at the high-address end of the local variables;
|
571 |
|
|
that is, each additional local variable allocated
|
572 |
|
|
goes at a more negative offset in the frame. */
|
573 |
|
|
#define FRAME_GROWS_DOWNWARD 0
|
574 |
|
|
|
575 |
|
|
/* Offset within stack frame to start allocating local variables at.
|
576 |
|
|
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
|
577 |
|
|
first local allocated. Otherwise, it is the offset to the BEGINNING
|
578 |
|
|
of the first local allocated.
|
579 |
|
|
|
580 |
|
|
On the 32-bit ports, we reserve one slot for the previous frame
|
581 |
|
|
pointer and one fill slot. The fill slot is for compatibility
|
582 |
|
|
with HP compiled programs. On the 64-bit ports, we reserve one
|
583 |
|
|
slot for the previous frame pointer. */
|
584 |
|
|
#define STARTING_FRAME_OFFSET 8
|
585 |
|
|
|
586 |
|
|
/* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
|
587 |
|
|
of the stack. The default is to align it to STACK_BOUNDARY. */
|
588 |
|
|
#define STACK_ALIGNMENT_NEEDED 0
|
589 |
|
|
|
590 |
|
|
/* If we generate an insn to push BYTES bytes,
|
591 |
|
|
this says how many the stack pointer really advances by.
|
592 |
|
|
On the HP-PA, don't define this because there are no push insns. */
|
593 |
|
|
/* #define PUSH_ROUNDING(BYTES) */
|
594 |
|
|
|
595 |
|
|
/* Offset of first parameter from the argument pointer register value.
|
596 |
|
|
This value will be negated because the arguments grow down.
|
597 |
|
|
Also note that on STACK_GROWS_UPWARD machines (such as this one)
|
598 |
|
|
this is the distance from the frame pointer to the end of the first
|
599 |
|
|
argument, not it's beginning. To get the real offset of the first
|
600 |
|
|
argument, the size of the argument must be added. */
|
601 |
|
|
|
602 |
|
|
#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
|
603 |
|
|
|
604 |
|
|
/* When a parameter is passed in a register, stack space is still
|
605 |
|
|
allocated for it. */
|
606 |
|
|
#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
|
607 |
|
|
|
608 |
|
|
/* Define this if the above stack space is to be considered part of the
|
609 |
|
|
space allocated by the caller. */
|
610 |
|
|
#define OUTGOING_REG_PARM_STACK_SPACE
|
611 |
|
|
|
612 |
|
|
/* Keep the stack pointer constant throughout the function.
|
613 |
|
|
This is both an optimization and a necessity: longjmp
|
614 |
|
|
doesn't behave itself when the stack pointer moves within
|
615 |
|
|
the function! */
|
616 |
|
|
#define ACCUMULATE_OUTGOING_ARGS 1
|
617 |
|
|
|
618 |
|
|
/* The weird HPPA calling conventions require a minimum of 48 bytes on
|
619 |
|
|
the stack: 16 bytes for register saves, and 32 bytes for magic.
|
620 |
|
|
This is the difference between the logical top of stack and the
|
621 |
|
|
actual sp.
|
622 |
|
|
|
623 |
|
|
On the 64-bit port, the HP C compiler allocates a 48-byte frame
|
624 |
|
|
marker, although the runtime documentation only describes a 16
|
625 |
|
|
byte marker. For compatibility, we allocate 48 bytes. */
|
626 |
|
|
#define STACK_POINTER_OFFSET \
|
627 |
|
|
(TARGET_64BIT ? -(current_function_outgoing_args_size + 48): -32)
|
628 |
|
|
|
629 |
|
|
#define STACK_DYNAMIC_OFFSET(FNDECL) \
|
630 |
|
|
(TARGET_64BIT \
|
631 |
|
|
? (STACK_POINTER_OFFSET) \
|
632 |
|
|
: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
|
633 |
|
|
|
634 |
|
|
/* Value is 1 if returning from a function call automatically
|
635 |
|
|
pops the arguments described by the number-of-args field in the call.
|
636 |
|
|
FUNDECL is the declaration node of the function (as a tree),
|
637 |
|
|
FUNTYPE is the data type of the function (as a tree),
|
638 |
|
|
or for a library call it is an identifier node for the subroutine name. */
|
639 |
|
|
|
640 |
|
|
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
641 |
|
|
|
642 |
|
|
/* Define how to find the value returned by a function.
|
643 |
|
|
VALTYPE is the data type of the value (as a tree).
|
644 |
|
|
If the precise function being called is known, FUNC is its FUNCTION_DECL;
|
645 |
|
|
otherwise, FUNC is 0. */
|
646 |
|
|
|
647 |
|
|
#define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
|
648 |
|
|
|
649 |
|
|
/* Define how to find the value returned by a library function
|
650 |
|
|
assuming the value has mode MODE. */
|
651 |
|
|
|
652 |
|
|
#define LIBCALL_VALUE(MODE) \
|
653 |
|
|
gen_rtx_REG (MODE, \
|
654 |
|
|
(! TARGET_SOFT_FLOAT \
|
655 |
|
|
&& ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
|
656 |
|
|
|
657 |
|
|
/* 1 if N is a possible register number for a function value
|
658 |
|
|
as seen by the caller. */
|
659 |
|
|
|
660 |
|
|
#define FUNCTION_VALUE_REGNO_P(N) \
|
661 |
|
|
((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
|
662 |
|
|
|
663 |
|
|
|
664 |
|
|
/* Define a data type for recording info about an argument list
|
665 |
|
|
during the scan of that argument list. This data type should
|
666 |
|
|
hold all necessary information about the function itself
|
667 |
|
|
and about the args processed so far, enough to enable macros
|
668 |
|
|
such as FUNCTION_ARG to determine where the next arg should go.
|
669 |
|
|
|
670 |
|
|
On the HP-PA, the WORDS field holds the number of words
|
671 |
|
|
of arguments scanned so far (including the invisible argument,
|
672 |
|
|
if any, which holds the structure-value-address). Thus, 4 or
|
673 |
|
|
more means all following args should go on the stack.
|
674 |
|
|
|
675 |
|
|
The INCOMING field tracks whether this is an "incoming" or
|
676 |
|
|
"outgoing" argument.
|
677 |
|
|
|
678 |
|
|
The INDIRECT field indicates whether this is is an indirect
|
679 |
|
|
call or not.
|
680 |
|
|
|
681 |
|
|
The NARGS_PROTOTYPE field indicates that an argument does not
|
682 |
|
|
have a prototype when it less than or equal to 0. */
|
683 |
|
|
|
684 |
|
|
struct hppa_args {int words, nargs_prototype, incoming, indirect; };
|
685 |
|
|
|
686 |
|
|
#define CUMULATIVE_ARGS struct hppa_args
|
687 |
|
|
|
688 |
|
|
/* Initialize a variable CUM of type CUMULATIVE_ARGS
|
689 |
|
|
for a call to a function whose data type is FNTYPE.
|
690 |
|
|
For a library call, FNTYPE is 0. */
|
691 |
|
|
|
692 |
|
|
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
|
693 |
|
|
(CUM).words = 0, \
|
694 |
|
|
(CUM).incoming = 0, \
|
695 |
|
|
(CUM).indirect = (FNTYPE) && !(FNDECL), \
|
696 |
|
|
(CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
|
697 |
|
|
? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
|
698 |
|
|
+ (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
|
699 |
|
|
|| pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
|
700 |
|
|
: 0)
|
701 |
|
|
|
702 |
|
|
|
703 |
|
|
|
704 |
|
|
/* Similar, but when scanning the definition of a procedure. We always
|
705 |
|
|
set NARGS_PROTOTYPE large so we never return a PARALLEL. */
|
706 |
|
|
|
707 |
|
|
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
|
708 |
|
|
(CUM).words = 0, \
|
709 |
|
|
(CUM).incoming = 1, \
|
710 |
|
|
(CUM).indirect = 0, \
|
711 |
|
|
(CUM).nargs_prototype = 1000
|
712 |
|
|
|
713 |
|
|
/* Figure out the size in words of the function argument. The size
|
714 |
|
|
returned by this macro should always be greater than zero because
|
715 |
|
|
we pass variable and zero sized objects by reference. */
|
716 |
|
|
|
717 |
|
|
#define FUNCTION_ARG_SIZE(MODE, TYPE) \
|
718 |
|
|
((((MODE) != BLKmode \
|
719 |
|
|
? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
|
720 |
|
|
: int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
721 |
|
|
|
722 |
|
|
/* Update the data in CUM to advance over an argument
|
723 |
|
|
of mode MODE and data type TYPE.
|
724 |
|
|
(TYPE is null for libcalls where that information may not be available.) */
|
725 |
|
|
|
726 |
|
|
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
727 |
|
|
{ (CUM).nargs_prototype--; \
|
728 |
|
|
(CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
|
729 |
|
|
+ (((CUM).words & 01) && (TYPE) != 0 \
|
730 |
|
|
&& FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
|
731 |
|
|
}
|
732 |
|
|
|
733 |
|
|
/* Determine where to put an argument to a function.
|
734 |
|
|
Value is zero to push the argument on the stack,
|
735 |
|
|
or a hard register in which to store the argument.
|
736 |
|
|
|
737 |
|
|
MODE is the argument's machine mode.
|
738 |
|
|
TYPE is the data type of the argument (as a tree).
|
739 |
|
|
This is null for libcalls where that information may
|
740 |
|
|
not be available.
|
741 |
|
|
CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
742 |
|
|
the preceding args and about the function being called.
|
743 |
|
|
NAMED is nonzero if this argument is a named parameter
|
744 |
|
|
(otherwise it is an extra parameter matching an ellipsis).
|
745 |
|
|
|
746 |
|
|
On the HP-PA the first four words of args are normally in registers
|
747 |
|
|
and the rest are pushed. But any arg that won't entirely fit in regs
|
748 |
|
|
is pushed.
|
749 |
|
|
|
750 |
|
|
Arguments passed in registers are either 1 or 2 words long.
|
751 |
|
|
|
752 |
|
|
The caller must make a distinction between calls to explicitly named
|
753 |
|
|
functions and calls through pointers to functions -- the conventions
|
754 |
|
|
are different! Calls through pointers to functions only use general
|
755 |
|
|
registers for the first four argument words.
|
756 |
|
|
|
757 |
|
|
Of course all this is different for the portable runtime model
|
758 |
|
|
HP wants everyone to use for ELF. Ugh. Here's a quick description
|
759 |
|
|
of how it's supposed to work.
|
760 |
|
|
|
761 |
|
|
1) callee side remains unchanged. It expects integer args to be
|
762 |
|
|
in the integer registers, float args in the float registers and
|
763 |
|
|
unnamed args in integer registers.
|
764 |
|
|
|
765 |
|
|
2) caller side now depends on if the function being called has
|
766 |
|
|
a prototype in scope (rather than if it's being called indirectly).
|
767 |
|
|
|
768 |
|
|
2a) If there is a prototype in scope, then arguments are passed
|
769 |
|
|
according to their type (ints in integer registers, floats in float
|
770 |
|
|
registers, unnamed args in integer registers.
|
771 |
|
|
|
772 |
|
|
2b) If there is no prototype in scope, then floating point arguments
|
773 |
|
|
are passed in both integer and float registers. egad.
|
774 |
|
|
|
775 |
|
|
FYI: The portable parameter passing conventions are almost exactly like
|
776 |
|
|
the standard parameter passing conventions on the RS6000. That's why
|
777 |
|
|
you'll see lots of similar code in rs6000.h. */
|
778 |
|
|
|
779 |
|
|
/* If defined, a C expression which determines whether, and in which
|
780 |
|
|
direction, to pad out an argument with extra space. */
|
781 |
|
|
#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
|
782 |
|
|
|
783 |
|
|
/* Specify padding for the last element of a block move between registers
|
784 |
|
|
and memory.
|
785 |
|
|
|
786 |
|
|
The 64-bit runtime specifies that objects need to be left justified
|
787 |
|
|
(i.e., the normal justification for a big endian target). The 32-bit
|
788 |
|
|
runtime specifies right justification for objects smaller than 64 bits.
|
789 |
|
|
We use a DImode register in the parallel for 5 to 7 byte structures
|
790 |
|
|
so that there is only one element. This allows the object to be
|
791 |
|
|
correctly padded. */
|
792 |
|
|
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
|
793 |
|
|
function_arg_padding ((MODE), (TYPE))
|
794 |
|
|
|
795 |
|
|
/* Do not expect to understand this without reading it several times. I'm
|
796 |
|
|
tempted to try and simply it, but I worry about breaking something. */
|
797 |
|
|
|
798 |
|
|
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
799 |
|
|
function_arg (&CUM, MODE, TYPE, NAMED)
|
800 |
|
|
|
801 |
|
|
/* If defined, a C expression that gives the alignment boundary, in
|
802 |
|
|
bits, of an argument with the specified mode and type. If it is
|
803 |
|
|
not defined, `PARM_BOUNDARY' is used for all arguments. */
|
804 |
|
|
|
805 |
|
|
/* Arguments larger than one word are double word aligned. */
|
806 |
|
|
|
807 |
|
|
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
|
808 |
|
|
(((TYPE) \
|
809 |
|
|
? (integer_zerop (TYPE_SIZE (TYPE)) \
|
810 |
|
|
|| !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
|
811 |
|
|
|| int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
|
812 |
|
|
: GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
|
813 |
|
|
? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
|
814 |
|
|
|
815 |
|
|
|
816 |
|
|
extern GTY(()) rtx hppa_compare_op0;
|
817 |
|
|
extern GTY(()) rtx hppa_compare_op1;
|
818 |
|
|
extern enum cmp_type hppa_branch_type;
|
819 |
|
|
|
820 |
|
|
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
|
821 |
|
|
as assembly via FUNCTION_PROFILER. Just output a local label.
|
822 |
|
|
We can't use the function label because the GAS SOM target can't
|
823 |
|
|
handle the difference of a global symbol and a local symbol. */
|
824 |
|
|
|
825 |
|
|
#ifndef FUNC_BEGIN_PROLOG_LABEL
|
826 |
|
|
#define FUNC_BEGIN_PROLOG_LABEL "LFBP"
|
827 |
|
|
#endif
|
828 |
|
|
|
829 |
|
|
#define FUNCTION_PROFILER(FILE, LABEL) \
|
830 |
|
|
(*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
|
831 |
|
|
|
832 |
|
|
#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
|
833 |
|
|
void hppa_profile_hook (int label_no);
|
834 |
|
|
|
835 |
|
|
/* The profile counter if emitted must come before the prologue. */
|
836 |
|
|
#define PROFILE_BEFORE_PROLOGUE 1
|
837 |
|
|
|
838 |
|
|
/* We never want final.c to emit profile counters. When profile
|
839 |
|
|
counters are required, we have to defer emitting them to the end
|
840 |
|
|
of the current file. */
|
841 |
|
|
#define NO_PROFILE_COUNTERS 1
|
842 |
|
|
|
843 |
|
|
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
844 |
|
|
the stack pointer does not matter. The value is tested only in
|
845 |
|
|
functions that have frame pointers.
|
846 |
|
|
No definition is equivalent to always zero. */
|
847 |
|
|
|
848 |
|
|
extern int may_call_alloca;
|
849 |
|
|
|
850 |
|
|
#define EXIT_IGNORE_STACK \
|
851 |
|
|
(get_frame_size () != 0 \
|
852 |
|
|
|| current_function_calls_alloca || current_function_outgoing_args_size)
|
853 |
|
|
|
854 |
|
|
/* Output assembler code for a block containing the constant parts
|
855 |
|
|
of a trampoline, leaving space for the variable parts.\
|
856 |
|
|
|
857 |
|
|
The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
|
858 |
|
|
and then branches to the specified routine.
|
859 |
|
|
|
860 |
|
|
This code template is copied from text segment to stack location
|
861 |
|
|
and then patched with INITIALIZE_TRAMPOLINE to contain
|
862 |
|
|
valid values, and then entered as a subroutine.
|
863 |
|
|
|
864 |
|
|
It is best to keep this as small as possible to avoid having to
|
865 |
|
|
flush multiple lines in the cache. */
|
866 |
|
|
|
867 |
|
|
#define TRAMPOLINE_TEMPLATE(FILE) \
|
868 |
|
|
{ \
|
869 |
|
|
if (!TARGET_64BIT) \
|
870 |
|
|
{ \
|
871 |
|
|
fputs ("\tldw 36(%r22),%r21\n", FILE); \
|
872 |
|
|
fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
|
873 |
|
|
if (ASSEMBLER_DIALECT == 0) \
|
874 |
|
|
fputs ("\tdepi 0,31,2,%r21\n", FILE); \
|
875 |
|
|
else \
|
876 |
|
|
fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
|
877 |
|
|
fputs ("\tldw 4(%r21),%r19\n", FILE); \
|
878 |
|
|
fputs ("\tldw 0(%r21),%r21\n", FILE); \
|
879 |
|
|
if (TARGET_PA_20) \
|
880 |
|
|
{ \
|
881 |
|
|
fputs ("\tbve (%r21)\n", FILE); \
|
882 |
|
|
fputs ("\tldw 40(%r22),%r29\n", FILE); \
|
883 |
|
|
fputs ("\t.word 0\n", FILE); \
|
884 |
|
|
fputs ("\t.word 0\n", FILE); \
|
885 |
|
|
} \
|
886 |
|
|
else \
|
887 |
|
|
{ \
|
888 |
|
|
fputs ("\tldsid (%r21),%r1\n", FILE); \
|
889 |
|
|
fputs ("\tmtsp %r1,%sr0\n", FILE); \
|
890 |
|
|
fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
|
891 |
|
|
fputs ("\tldw 40(%r22),%r29\n", FILE); \
|
892 |
|
|
} \
|
893 |
|
|
fputs ("\t.word 0\n", FILE); \
|
894 |
|
|
fputs ("\t.word 0\n", FILE); \
|
895 |
|
|
fputs ("\t.word 0\n", FILE); \
|
896 |
|
|
fputs ("\t.word 0\n", FILE); \
|
897 |
|
|
} \
|
898 |
|
|
else \
|
899 |
|
|
{ \
|
900 |
|
|
fputs ("\t.dword 0\n", FILE); \
|
901 |
|
|
fputs ("\t.dword 0\n", FILE); \
|
902 |
|
|
fputs ("\t.dword 0\n", FILE); \
|
903 |
|
|
fputs ("\t.dword 0\n", FILE); \
|
904 |
|
|
fputs ("\tmfia %r31\n", FILE); \
|
905 |
|
|
fputs ("\tldd 24(%r31),%r1\n", FILE); \
|
906 |
|
|
fputs ("\tldd 24(%r1),%r27\n", FILE); \
|
907 |
|
|
fputs ("\tldd 16(%r1),%r1\n", FILE); \
|
908 |
|
|
fputs ("\tbve (%r1)\n", FILE); \
|
909 |
|
|
fputs ("\tldd 32(%r31),%r31\n", FILE); \
|
910 |
|
|
fputs ("\t.dword 0 ; fptr\n", FILE); \
|
911 |
|
|
fputs ("\t.dword 0 ; static link\n", FILE); \
|
912 |
|
|
} \
|
913 |
|
|
}
|
914 |
|
|
|
915 |
|
|
/* Length in units of the trampoline for entering a nested function. */
|
916 |
|
|
|
917 |
|
|
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
|
918 |
|
|
|
919 |
|
|
/* Length in units of the trampoline instruction code. */
|
920 |
|
|
|
921 |
|
|
#define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40))
|
922 |
|
|
|
923 |
|
|
/* Minimum length of a cache line. A length of 16 will work on all
|
924 |
|
|
PA-RISC processors. All PA 1.1 processors have a cache line of
|
925 |
|
|
32 bytes. Most but not all PA 2.0 processors have a cache line
|
926 |
|
|
of 64 bytes. As cache flushes are expensive and we don't support
|
927 |
|
|
PA 1.0, we use a minimum length of 32. */
|
928 |
|
|
|
929 |
|
|
#define MIN_CACHELINE_SIZE 32
|
930 |
|
|
|
931 |
|
|
/* Emit RTL insns to initialize the variable parts of a trampoline.
|
932 |
|
|
FNADDR is an RTX for the address of the function's pure code.
|
933 |
|
|
CXT is an RTX for the static chain value for the function.
|
934 |
|
|
|
935 |
|
|
Move the function address to the trampoline template at offset 36.
|
936 |
|
|
Move the static chain value to trampoline template at offset 40.
|
937 |
|
|
Move the trampoline address to trampoline template at offset 44.
|
938 |
|
|
Move r19 to trampoline template at offset 48. The latter two
|
939 |
|
|
words create a plabel for the indirect call to the trampoline.
|
940 |
|
|
|
941 |
|
|
A similar sequence is used for the 64-bit port but the plabel is
|
942 |
|
|
at the beginning of the trampoline.
|
943 |
|
|
|
944 |
|
|
Finally, the cache entries for the trampoline code are flushed.
|
945 |
|
|
This is necessary to ensure that the trampoline instruction sequence
|
946 |
|
|
is written to memory prior to any attempts at prefetching the code
|
947 |
|
|
sequence. */
|
948 |
|
|
|
949 |
|
|
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
|
950 |
|
|
{ \
|
951 |
|
|
rtx start_addr = gen_reg_rtx (Pmode); \
|
952 |
|
|
rtx end_addr = gen_reg_rtx (Pmode); \
|
953 |
|
|
rtx line_length = gen_reg_rtx (Pmode); \
|
954 |
|
|
rtx tmp; \
|
955 |
|
|
\
|
956 |
|
|
if (!TARGET_64BIT) \
|
957 |
|
|
{ \
|
958 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
|
959 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
|
960 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
|
961 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
|
962 |
|
|
\
|
963 |
|
|
/* Create a fat pointer for the trampoline. */ \
|
964 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
|
965 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP)); \
|
966 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
|
967 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
|
968 |
|
|
gen_rtx_REG (Pmode, 19)); \
|
969 |
|
|
\
|
970 |
|
|
/* fdc and fic only use registers for the address to flush, \
|
971 |
|
|
they do not accept integer displacements. We align the \
|
972 |
|
|
start and end addresses to the beginning of their respective \
|
973 |
|
|
cache lines to minimize the number of lines flushed. */ \
|
974 |
|
|
tmp = force_reg (Pmode, (TRAMP)); \
|
975 |
|
|
emit_insn (gen_andsi3 (start_addr, tmp, \
|
976 |
|
|
GEN_INT (-MIN_CACHELINE_SIZE))); \
|
977 |
|
|
tmp = force_reg (Pmode, \
|
978 |
|
|
plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
|
979 |
|
|
emit_insn (gen_andsi3 (end_addr, tmp, \
|
980 |
|
|
GEN_INT (-MIN_CACHELINE_SIZE))); \
|
981 |
|
|
emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
|
982 |
|
|
emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \
|
983 |
|
|
emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \
|
984 |
|
|
gen_reg_rtx (Pmode), \
|
985 |
|
|
gen_reg_rtx (Pmode))); \
|
986 |
|
|
} \
|
987 |
|
|
else \
|
988 |
|
|
{ \
|
989 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
|
990 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
|
991 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
|
992 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
|
993 |
|
|
\
|
994 |
|
|
/* Create a fat pointer for the trampoline. */ \
|
995 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
|
996 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
|
997 |
|
|
force_reg (Pmode, plus_constant ((TRAMP), 32))); \
|
998 |
|
|
tmp = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
|
999 |
|
|
emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
|
1000 |
|
|
gen_rtx_REG (Pmode, 27)); \
|
1001 |
|
|
\
|
1002 |
|
|
/* fdc and fic only use registers for the address to flush, \
|
1003 |
|
|
they do not accept integer displacements. We align the \
|
1004 |
|
|
start and end addresses to the beginning of their respective \
|
1005 |
|
|
cache lines to minimize the number of lines flushed. */ \
|
1006 |
|
|
tmp = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
|
1007 |
|
|
emit_insn (gen_anddi3 (start_addr, tmp, \
|
1008 |
|
|
GEN_INT (-MIN_CACHELINE_SIZE))); \
|
1009 |
|
|
tmp = force_reg (Pmode, \
|
1010 |
|
|
plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
|
1011 |
|
|
emit_insn (gen_anddi3 (end_addr, tmp, \
|
1012 |
|
|
GEN_INT (-MIN_CACHELINE_SIZE))); \
|
1013 |
|
|
emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
|
1014 |
|
|
emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \
|
1015 |
|
|
emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \
|
1016 |
|
|
gen_reg_rtx (Pmode), \
|
1017 |
|
|
gen_reg_rtx (Pmode))); \
|
1018 |
|
|
} \
|
1019 |
|
|
}
|
1020 |
|
|
|
1021 |
|
|
/* Perform any machine-specific adjustment in the address of the trampoline.
|
1022 |
|
|
ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
|
1023 |
|
|
Adjust the trampoline address to point to the plabel at offset 44. */
|
1024 |
|
|
|
1025 |
|
|
#define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
|
1026 |
|
|
if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
|
1027 |
|
|
|
1028 |
|
|
/* Implement `va_start' for varargs and stdarg. */
|
1029 |
|
|
|
1030 |
|
|
#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
|
1031 |
|
|
hppa_va_start (valist, nextarg)
|
1032 |
|
|
|
1033 |
|
|
/* Addressing modes, and classification of registers for them.
|
1034 |
|
|
|
1035 |
|
|
Using autoincrement addressing modes on PA8000 class machines is
|
1036 |
|
|
not profitable. */
|
1037 |
|
|
|
1038 |
|
|
#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
|
1039 |
|
|
#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
|
1040 |
|
|
|
1041 |
|
|
#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
|
1042 |
|
|
#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
|
1043 |
|
|
|
1044 |
|
|
/* Macros to check register numbers against specific register classes. */
|
1045 |
|
|
|
1046 |
|
|
/* The following macros assume that X is a hard or pseudo reg number.
|
1047 |
|
|
They give nonzero only if X is a hard reg of the suitable class
|
1048 |
|
|
or a pseudo reg currently allocated to a suitable hard reg.
|
1049 |
|
|
Since they use reg_renumber, they are safe only once reg_renumber
|
1050 |
|
|
has been allocated, which happens in local-alloc.c. */
|
1051 |
|
|
|
1052 |
|
|
#define REGNO_OK_FOR_INDEX_P(X) \
|
1053 |
|
|
((X) && ((X) < 32 \
|
1054 |
|
|
|| (X >= FIRST_PSEUDO_REGISTER \
|
1055 |
|
|
&& reg_renumber \
|
1056 |
|
|
&& (unsigned) reg_renumber[X] < 32)))
|
1057 |
|
|
#define REGNO_OK_FOR_BASE_P(X) \
|
1058 |
|
|
((X) && ((X) < 32 \
|
1059 |
|
|
|| (X >= FIRST_PSEUDO_REGISTER \
|
1060 |
|
|
&& reg_renumber \
|
1061 |
|
|
&& (unsigned) reg_renumber[X] < 32)))
|
1062 |
|
|
#define REGNO_OK_FOR_FP_P(X) \
|
1063 |
|
|
(FP_REGNO_P (X) \
|
1064 |
|
|
|| (X >= FIRST_PSEUDO_REGISTER \
|
1065 |
|
|
&& reg_renumber \
|
1066 |
|
|
&& FP_REGNO_P (reg_renumber[X])))
|
1067 |
|
|
|
1068 |
|
|
/* Now macros that check whether X is a register and also,
|
1069 |
|
|
strictly, whether it is in a specified class.
|
1070 |
|
|
|
1071 |
|
|
These macros are specific to the HP-PA, and may be used only
|
1072 |
|
|
in code for printing assembler insns and in conditions for
|
1073 |
|
|
define_optimization. */
|
1074 |
|
|
|
1075 |
|
|
/* 1 if X is an fp register. */
|
1076 |
|
|
|
1077 |
|
|
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
|
1078 |
|
|
|
1079 |
|
|
/* Maximum number of registers that can appear in a valid memory address. */
|
1080 |
|
|
|
1081 |
|
|
#define MAX_REGS_PER_ADDRESS 2
|
1082 |
|
|
|
1083 |
|
|
/* Non-TLS symbolic references. */
|
1084 |
|
|
#define PA_SYMBOL_REF_TLS_P(RTX) \
|
1085 |
|
|
(GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
|
1086 |
|
|
|
1087 |
|
|
/* Recognize any constant value that is a valid address except
|
1088 |
|
|
for symbolic addresses. We get better CSE by rejecting them
|
1089 |
|
|
here and allowing hppa_legitimize_address to break them up. We
|
1090 |
|
|
use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
|
1091 |
|
|
|
1092 |
|
|
#define CONSTANT_ADDRESS_P(X) \
|
1093 |
|
|
((GET_CODE (X) == LABEL_REF \
|
1094 |
|
|
|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
|
1095 |
|
|
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|
1096 |
|
|
|| GET_CODE (X) == HIGH) \
|
1097 |
|
|
&& (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
|
1098 |
|
|
|
1099 |
|
|
/* A C expression that is nonzero if we are using the new HP assembler. */
|
1100 |
|
|
|
1101 |
|
|
#ifndef NEW_HP_ASSEMBLER
|
1102 |
|
|
#define NEW_HP_ASSEMBLER 0
|
1103 |
|
|
#endif
|
1104 |
|
|
|
1105 |
|
|
/* The macros below define the immediate range for CONST_INTS on
|
1106 |
|
|
the 64-bit port. Constants in this range can be loaded in three
|
1107 |
|
|
instructions using a ldil/ldo/depdi sequence. Constants outside
|
1108 |
|
|
this range are forced to the constant pool prior to reload. */
|
1109 |
|
|
|
1110 |
|
|
#define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
|
1111 |
|
|
#define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
|
1112 |
|
|
#define LEGITIMATE_64BIT_CONST_INT_P(X) \
|
1113 |
|
|
((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
|
1114 |
|
|
|
1115 |
|
|
/* A C expression that is nonzero if X is a legitimate constant for an
|
1116 |
|
|
immediate operand.
|
1117 |
|
|
|
1118 |
|
|
We include all constant integers and constant doubles, but not
|
1119 |
|
|
floating-point, except for floating-point zero. We reject LABEL_REFs
|
1120 |
|
|
if we're not using gas or the new HP assembler.
|
1121 |
|
|
|
1122 |
|
|
In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS
|
1123 |
|
|
that need more than three instructions to load prior to reload. This
|
1124 |
|
|
limit is somewhat arbitrary. It takes three instructions to load a
|
1125 |
|
|
CONST_INT from memory but two are memory accesses. It may be better
|
1126 |
|
|
to increase the allowed range for CONST_INTS. We may also be able
|
1127 |
|
|
to handle CONST_DOUBLES. */
|
1128 |
|
|
|
1129 |
|
|
#define LEGITIMATE_CONSTANT_P(X) \
|
1130 |
|
|
((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
|
1131 |
|
|
|| (X) == CONST0_RTX (GET_MODE (X))) \
|
1132 |
|
|
&& (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
|
1133 |
|
|
&& !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
|
1134 |
|
|
&& !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
|
1135 |
|
|
&& !(HOST_BITS_PER_WIDE_INT <= 32 \
|
1136 |
|
|
|| (reload_in_progress || reload_completed) \
|
1137 |
|
|
|| LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \
|
1138 |
|
|
|| cint_ok_for_move (INTVAL (X)))) \
|
1139 |
|
|
&& !function_label_operand (X, VOIDmode))
|
1140 |
|
|
|
1141 |
|
|
/* Target flags set on a symbol_ref. */
|
1142 |
|
|
|
1143 |
|
|
/* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */
|
1144 |
|
|
#define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
|
1145 |
|
|
#define SYMBOL_REF_REFERENCED_P(RTX) \
|
1146 |
|
|
((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
|
1147 |
|
|
|
1148 |
|
|
/* Subroutines for EXTRA_CONSTRAINT.
|
1149 |
|
|
|
1150 |
|
|
Return 1 iff OP is a pseudo which did not get a hard register and
|
1151 |
|
|
we are running the reload pass. */
|
1152 |
|
|
#define IS_RELOADING_PSEUDO_P(OP) \
|
1153 |
|
|
((reload_in_progress \
|
1154 |
|
|
&& GET_CODE (OP) == REG \
|
1155 |
|
|
&& REGNO (OP) >= FIRST_PSEUDO_REGISTER \
|
1156 |
|
|
&& reg_renumber [REGNO (OP)] < 0))
|
1157 |
|
|
|
1158 |
|
|
/* Return 1 iff OP is a scaled or unscaled index address. */
|
1159 |
|
|
#define IS_INDEX_ADDR_P(OP) \
|
1160 |
|
|
(GET_CODE (OP) == PLUS \
|
1161 |
|
|
&& GET_MODE (OP) == Pmode \
|
1162 |
|
|
&& (GET_CODE (XEXP (OP, 0)) == MULT \
|
1163 |
|
|
|| GET_CODE (XEXP (OP, 1)) == MULT \
|
1164 |
|
|
|| (REG_P (XEXP (OP, 0)) \
|
1165 |
|
|
&& REG_P (XEXP (OP, 1)))))
|
1166 |
|
|
|
1167 |
|
|
/* Return 1 iff OP is a LO_SUM DLT address. */
|
1168 |
|
|
#define IS_LO_SUM_DLT_ADDR_P(OP) \
|
1169 |
|
|
(GET_CODE (OP) == LO_SUM \
|
1170 |
|
|
&& GET_MODE (OP) == Pmode \
|
1171 |
|
|
&& REG_P (XEXP (OP, 0)) \
|
1172 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
|
1173 |
|
|
&& GET_CODE (XEXP (OP, 1)) == UNSPEC)
|
1174 |
|
|
|
1175 |
|
|
/* Optional extra constraints for this machine. Borrowed from sparc.h.
|
1176 |
|
|
|
1177 |
|
|
`A' is a LO_SUM DLT memory operand.
|
1178 |
|
|
|
1179 |
|
|
`Q' is any memory operand that isn't a symbolic, indexed or lo_sum
|
1180 |
|
|
memory operand. Note that an unassigned pseudo register is such a
|
1181 |
|
|
memory operand. Needed because reload will generate these things
|
1182 |
|
|
and then not re-recognize the insn, causing constrain_operands to
|
1183 |
|
|
fail.
|
1184 |
|
|
|
1185 |
|
|
`R' is a scaled/unscaled indexed memory operand.
|
1186 |
|
|
|
1187 |
|
|
`S' is the constant 31.
|
1188 |
|
|
|
1189 |
|
|
`T' is for floating-point loads and stores.
|
1190 |
|
|
|
1191 |
|
|
`U' is the constant 63.
|
1192 |
|
|
|
1193 |
|
|
`W' is a register indirect memory operand. We could allow short
|
1194 |
|
|
displacements but GO_IF_LEGITIMATE_ADDRESS can't tell when a
|
1195 |
|
|
long displacement is valid. This is only used for prefetch
|
1196 |
|
|
instructions with the `sl' completer. */
|
1197 |
|
|
|
1198 |
|
|
#define EXTRA_CONSTRAINT(OP, C) \
|
1199 |
|
|
((C) == 'Q' ? \
|
1200 |
|
|
(IS_RELOADING_PSEUDO_P (OP) \
|
1201 |
|
|
|| (GET_CODE (OP) == MEM \
|
1202 |
|
|
&& (reload_in_progress \
|
1203 |
|
|
|| memory_address_p (GET_MODE (OP), XEXP (OP, 0))) \
|
1204 |
|
|
&& !symbolic_memory_operand (OP, VOIDmode) \
|
1205 |
|
|
&& !IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0)) \
|
1206 |
|
|
&& !IS_INDEX_ADDR_P (XEXP (OP, 0)))) \
|
1207 |
|
|
: ((C) == 'W' ? \
|
1208 |
|
|
(GET_CODE (OP) == MEM \
|
1209 |
|
|
&& REG_P (XEXP (OP, 0)) \
|
1210 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
|
1211 |
|
|
: ((C) == 'A' ? \
|
1212 |
|
|
(GET_CODE (OP) == MEM \
|
1213 |
|
|
&& IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0))) \
|
1214 |
|
|
: ((C) == 'R' ? \
|
1215 |
|
|
(GET_CODE (OP) == MEM \
|
1216 |
|
|
&& IS_INDEX_ADDR_P (XEXP (OP, 0))) \
|
1217 |
|
|
: ((C) == 'T' ? \
|
1218 |
|
|
(GET_CODE (OP) == MEM \
|
1219 |
|
|
&& !IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0)) \
|
1220 |
|
|
&& !IS_INDEX_ADDR_P (XEXP (OP, 0)) \
|
1221 |
|
|
/* Floating-point loads and stores are used to load \
|
1222 |
|
|
integer values as well as floating-point values. \
|
1223 |
|
|
They don't have the same set of REG+D address modes \
|
1224 |
|
|
as integer loads and stores. PA 1.x supports only \
|
1225 |
|
|
short displacements. PA 2.0 supports long displacements \
|
1226 |
|
|
but the base register needs to be aligned. \
|
1227 |
|
|
\
|
1228 |
|
|
The checks in GO_IF_LEGITIMATE_ADDRESS for SFmode and \
|
1229 |
|
|
DFmode test the validity of an address for use in a \
|
1230 |
|
|
floating point load or store. So, we use SFmode/DFmode \
|
1231 |
|
|
to see if the address is valid for a floating-point \
|
1232 |
|
|
load/store operation. */ \
|
1233 |
|
|
&& memory_address_p ((GET_MODE_SIZE (GET_MODE (OP)) == 4 \
|
1234 |
|
|
? SFmode \
|
1235 |
|
|
: DFmode), \
|
1236 |
|
|
XEXP (OP, 0))) \
|
1237 |
|
|
: ((C) == 'S' ? \
|
1238 |
|
|
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) \
|
1239 |
|
|
: ((C) == 'U' ? \
|
1240 |
|
|
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) : 0)))))))
|
1241 |
|
|
|
1242 |
|
|
|
1243 |
|
|
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
1244 |
|
|
and check its validity for a certain class.
|
1245 |
|
|
We have two alternate definitions for each of them.
|
1246 |
|
|
The usual definition accepts all pseudo regs; the other rejects
|
1247 |
|
|
them unless they have been allocated suitable hard regs.
|
1248 |
|
|
The symbol REG_OK_STRICT causes the latter definition to be used.
|
1249 |
|
|
|
1250 |
|
|
Most source files want to accept pseudo regs in the hope that
|
1251 |
|
|
they will get allocated to the class that the insn wants them to be in.
|
1252 |
|
|
Source files for reload pass need to be strict.
|
1253 |
|
|
After reload, it makes no difference, since pseudo regs have
|
1254 |
|
|
been eliminated by then. */
|
1255 |
|
|
|
1256 |
|
|
#ifndef REG_OK_STRICT
|
1257 |
|
|
|
1258 |
|
|
/* Nonzero if X is a hard reg that can be used as an index
|
1259 |
|
|
or if it is a pseudo reg. */
|
1260 |
|
|
#define REG_OK_FOR_INDEX_P(X) \
|
1261 |
|
|
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
1262 |
|
|
/* Nonzero if X is a hard reg that can be used as a base reg
|
1263 |
|
|
or if it is a pseudo reg. */
|
1264 |
|
|
#define REG_OK_FOR_BASE_P(X) \
|
1265 |
|
|
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
1266 |
|
|
|
1267 |
|
|
#else
|
1268 |
|
|
|
1269 |
|
|
/* Nonzero if X is a hard reg that can be used as an index. */
|
1270 |
|
|
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
|
1271 |
|
|
/* Nonzero if X is a hard reg that can be used as a base reg. */
|
1272 |
|
|
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
1273 |
|
|
|
1274 |
|
|
#endif
|
1275 |
|
|
|
1276 |
|
|
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
1277 |
|
|
valid memory address for an instruction. The MODE argument is the
|
1278 |
|
|
machine mode for the MEM expression that wants to use this address.
|
1279 |
|
|
|
1280 |
|
|
On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
|
1281 |
|
|
REG+REG, and REG+(REG*SCALE). The indexed address forms are only
|
1282 |
|
|
available with floating point loads and stores, and integer loads.
|
1283 |
|
|
We get better code by allowing indexed addresses in the initial
|
1284 |
|
|
RTL generation.
|
1285 |
|
|
|
1286 |
|
|
The acceptance of indexed addresses as legitimate implies that we
|
1287 |
|
|
must provide patterns for doing indexed integer stores, or the move
|
1288 |
|
|
expanders must force the address of an indexed store to a register.
|
1289 |
|
|
We have adopted the latter approach.
|
1290 |
|
|
|
1291 |
|
|
Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
|
1292 |
|
|
the base register is a valid pointer for indexed instructions.
|
1293 |
|
|
On targets that have non-equivalent space registers, we have to
|
1294 |
|
|
know at the time of assembler output which register in a REG+REG
|
1295 |
|
|
pair is the base register. The REG_POINTER flag is sometimes lost
|
1296 |
|
|
in reload and the following passes, so it can't be relied on during
|
1297 |
|
|
code generation. Thus, we either have to canonicalize the order
|
1298 |
|
|
of the registers in REG+REG indexed addresses, or treat REG+REG
|
1299 |
|
|
addresses separately and provide patterns for both permutations.
|
1300 |
|
|
|
1301 |
|
|
The latter approach requires several hundred additional lines of
|
1302 |
|
|
code in pa.md. The downside to canonicalizing is that a PLUS
|
1303 |
|
|
in the wrong order can't combine to form to make a scaled indexed
|
1304 |
|
|
memory operand. As we won't need to canonicalize the operands if
|
1305 |
|
|
the REG_POINTER lossage can be fixed, it seems better canonicalize.
|
1306 |
|
|
|
1307 |
|
|
We initially break out scaled indexed addresses in canonical order
|
1308 |
|
|
in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes
|
1309 |
|
|
scaled indexed addresses during RTL generation. However, fold_rtx
|
1310 |
|
|
has its own opinion on how the operands of a PLUS should be ordered.
|
1311 |
|
|
If one of the operands is equivalent to a constant, it will make
|
1312 |
|
|
that operand the second operand. As the base register is likely to
|
1313 |
|
|
be equivalent to a SYMBOL_REF, we have made it the second operand.
|
1314 |
|
|
|
1315 |
|
|
GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
|
1316 |
|
|
operands are in the order INDEX+BASE on targets with non-equivalent
|
1317 |
|
|
space registers, and in any order on targets with equivalent space
|
1318 |
|
|
registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing.
|
1319 |
|
|
|
1320 |
|
|
We treat a SYMBOL_REF as legitimate if it is part of the current
|
1321 |
|
|
function's constant-pool, because such addresses can actually be
|
1322 |
|
|
output as REG+SMALLINT.
|
1323 |
|
|
|
1324 |
|
|
Note we only allow 5 bit immediates for access to a constant address;
|
1325 |
|
|
doing so avoids losing for loading/storing a FP register at an address
|
1326 |
|
|
which will not fit in 5 bits. */
|
1327 |
|
|
|
1328 |
|
|
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
|
1329 |
|
|
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
|
1330 |
|
|
|
1331 |
|
|
#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
|
1332 |
|
|
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
|
1333 |
|
|
|
1334 |
|
|
#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
|
1335 |
|
|
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
|
1336 |
|
|
|
1337 |
|
|
#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
|
1338 |
|
|
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
|
1339 |
|
|
|
1340 |
|
|
#if HOST_BITS_PER_WIDE_INT > 32
|
1341 |
|
|
#define VAL_32_BITS_P(X) \
|
1342 |
|
|
((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \
|
1343 |
|
|
< (unsigned HOST_WIDE_INT) 2 << 31)
|
1344 |
|
|
#else
|
1345 |
|
|
#define VAL_32_BITS_P(X) 1
|
1346 |
|
|
#endif
|
1347 |
|
|
#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
|
1348 |
|
|
|
1349 |
|
|
/* These are the modes that we allow for scaled indexing. */
|
1350 |
|
|
#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
|
1351 |
|
|
((TARGET_64BIT && (MODE) == DImode) \
|
1352 |
|
|
|| (MODE) == SImode \
|
1353 |
|
|
|| (MODE) == HImode \
|
1354 |
|
|
|| (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
|
1355 |
|
|
|
1356 |
|
|
/* These are the modes that we allow for unscaled indexing. */
|
1357 |
|
|
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
|
1358 |
|
|
((TARGET_64BIT && (MODE) == DImode) \
|
1359 |
|
|
|| (MODE) == SImode \
|
1360 |
|
|
|| (MODE) == HImode \
|
1361 |
|
|
|| (MODE) == QImode \
|
1362 |
|
|
|| (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
|
1363 |
|
|
|
1364 |
|
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
1365 |
|
|
{ \
|
1366 |
|
|
if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
|
1367 |
|
|
|| ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
|
1368 |
|
|
|| GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
|
1369 |
|
|
&& REG_P (XEXP (X, 0)) \
|
1370 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
|
1371 |
|
|
goto ADDR; \
|
1372 |
|
|
else if (GET_CODE (X) == PLUS) \
|
1373 |
|
|
{ \
|
1374 |
|
|
rtx base = 0, index = 0; \
|
1375 |
|
|
if (REG_P (XEXP (X, 1)) \
|
1376 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 1))) \
|
1377 |
|
|
base = XEXP (X, 1), index = XEXP (X, 0); \
|
1378 |
|
|
else if (REG_P (XEXP (X, 0)) \
|
1379 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0))) \
|
1380 |
|
|
base = XEXP (X, 0), index = XEXP (X, 1); \
|
1381 |
|
|
if (base \
|
1382 |
|
|
&& GET_CODE (index) == CONST_INT \
|
1383 |
|
|
&& ((INT_14_BITS (index) \
|
1384 |
|
|
&& (((MODE) != DImode \
|
1385 |
|
|
&& (MODE) != SFmode \
|
1386 |
|
|
&& (MODE) != DFmode) \
|
1387 |
|
|
/* The base register for DImode loads and stores \
|
1388 |
|
|
with long displacements must be aligned because \
|
1389 |
|
|
the lower three bits in the displacement are \
|
1390 |
|
|
assumed to be zero. */ \
|
1391 |
|
|
|| ((MODE) == DImode \
|
1392 |
|
|
&& (!TARGET_64BIT \
|
1393 |
|
|
|| (INTVAL (index) % 8) == 0)) \
|
1394 |
|
|
/* Similarly, the base register for SFmode/DFmode \
|
1395 |
|
|
loads and stores with long displacements must \
|
1396 |
|
|
be aligned. \
|
1397 |
|
|
\
|
1398 |
|
|
FIXME: the ELF32 linker clobbers the LSB of \
|
1399 |
|
|
the FP register number in PA 2.0 floating-point \
|
1400 |
|
|
insns with long displacements. This is because \
|
1401 |
|
|
R_PARISC_DPREL14WR and other relocations like \
|
1402 |
|
|
it are not supported. For now, we reject long \
|
1403 |
|
|
displacements on this target. */ \
|
1404 |
|
|
|| (((MODE) == SFmode || (MODE) == DFmode) \
|
1405 |
|
|
&& (TARGET_SOFT_FLOAT \
|
1406 |
|
|
|| (TARGET_PA_20 \
|
1407 |
|
|
&& !TARGET_ELF32 \
|
1408 |
|
|
&& (INTVAL (index) \
|
1409 |
|
|
% GET_MODE_SIZE (MODE)) == 0))))) \
|
1410 |
|
|
|| INT_5_BITS (index))) \
|
1411 |
|
|
goto ADDR; \
|
1412 |
|
|
if (!TARGET_DISABLE_INDEXING \
|
1413 |
|
|
/* Only accept the "canonical" INDEX+BASE operand order \
|
1414 |
|
|
on targets with non-equivalent space registers. */ \
|
1415 |
|
|
&& (TARGET_NO_SPACE_REGS \
|
1416 |
|
|
? (base && REG_P (index)) \
|
1417 |
|
|
: (base == XEXP (X, 1) && REG_P (index) \
|
1418 |
|
|
&& (reload_completed \
|
1419 |
|
|
|| (reload_in_progress && HARD_REGISTER_P (base)) \
|
1420 |
|
|
|| REG_POINTER (base)) \
|
1421 |
|
|
&& (reload_completed \
|
1422 |
|
|
|| (reload_in_progress && HARD_REGISTER_P (index)) \
|
1423 |
|
|
|| !REG_POINTER (index)))) \
|
1424 |
|
|
&& MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \
|
1425 |
|
|
&& REG_OK_FOR_INDEX_P (index) \
|
1426 |
|
|
&& borx_reg_operand (base, Pmode) \
|
1427 |
|
|
&& borx_reg_operand (index, Pmode)) \
|
1428 |
|
|
goto ADDR; \
|
1429 |
|
|
if (!TARGET_DISABLE_INDEXING \
|
1430 |
|
|
&& base \
|
1431 |
|
|
&& GET_CODE (index) == MULT \
|
1432 |
|
|
&& MODE_OK_FOR_SCALED_INDEXING_P (MODE) \
|
1433 |
|
|
&& REG_P (XEXP (index, 0)) \
|
1434 |
|
|
&& GET_MODE (XEXP (index, 0)) == Pmode \
|
1435 |
|
|
&& REG_OK_FOR_INDEX_P (XEXP (index, 0)) \
|
1436 |
|
|
&& GET_CODE (XEXP (index, 1)) == CONST_INT \
|
1437 |
|
|
&& INTVAL (XEXP (index, 1)) \
|
1438 |
|
|
== (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
|
1439 |
|
|
&& borx_reg_operand (base, Pmode)) \
|
1440 |
|
|
goto ADDR; \
|
1441 |
|
|
} \
|
1442 |
|
|
else if (GET_CODE (X) == LO_SUM \
|
1443 |
|
|
&& GET_CODE (XEXP (X, 0)) == REG \
|
1444 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
1445 |
|
|
&& CONSTANT_P (XEXP (X, 1)) \
|
1446 |
|
|
&& (TARGET_SOFT_FLOAT \
|
1447 |
|
|
/* We can allow symbolic LO_SUM addresses for PA2.0. */ \
|
1448 |
|
|
|| (TARGET_PA_20 \
|
1449 |
|
|
&& !TARGET_ELF32 \
|
1450 |
|
|
&& GET_CODE (XEXP (X, 1)) != CONST_INT) \
|
1451 |
|
|
|| ((MODE) != SFmode \
|
1452 |
|
|
&& (MODE) != DFmode))) \
|
1453 |
|
|
goto ADDR; \
|
1454 |
|
|
else if (GET_CODE (X) == LO_SUM \
|
1455 |
|
|
&& GET_CODE (XEXP (X, 0)) == SUBREG \
|
1456 |
|
|
&& GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \
|
1457 |
|
|
&& REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \
|
1458 |
|
|
&& CONSTANT_P (XEXP (X, 1)) \
|
1459 |
|
|
&& (TARGET_SOFT_FLOAT \
|
1460 |
|
|
/* We can allow symbolic LO_SUM addresses for PA2.0. */ \
|
1461 |
|
|
|| (TARGET_PA_20 \
|
1462 |
|
|
&& !TARGET_ELF32 \
|
1463 |
|
|
&& GET_CODE (XEXP (X, 1)) != CONST_INT) \
|
1464 |
|
|
|| ((MODE) != SFmode \
|
1465 |
|
|
&& (MODE) != DFmode))) \
|
1466 |
|
|
goto ADDR; \
|
1467 |
|
|
else if (GET_CODE (X) == LABEL_REF \
|
1468 |
|
|
|| (GET_CODE (X) == CONST_INT \
|
1469 |
|
|
&& INT_5_BITS (X))) \
|
1470 |
|
|
goto ADDR; \
|
1471 |
|
|
/* Needed for -fPIC */ \
|
1472 |
|
|
else if (GET_CODE (X) == LO_SUM \
|
1473 |
|
|
&& GET_CODE (XEXP (X, 0)) == REG \
|
1474 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
1475 |
|
|
&& GET_CODE (XEXP (X, 1)) == UNSPEC \
|
1476 |
|
|
&& (TARGET_SOFT_FLOAT \
|
1477 |
|
|
|| (TARGET_PA_20 && !TARGET_ELF32) \
|
1478 |
|
|
|| ((MODE) != SFmode \
|
1479 |
|
|
&& (MODE) != DFmode))) \
|
1480 |
|
|
goto ADDR; \
|
1481 |
|
|
}
|
1482 |
|
|
|
1483 |
|
|
/* Look for machine dependent ways to make the invalid address AD a
|
1484 |
|
|
valid address.
|
1485 |
|
|
|
1486 |
|
|
For the PA, transform:
|
1487 |
|
|
|
1488 |
|
|
memory(X + <large int>)
|
1489 |
|
|
|
1490 |
|
|
into:
|
1491 |
|
|
|
1492 |
|
|
if (<large int> & mask) >= 16
|
1493 |
|
|
Y = (<large int> & ~mask) + mask + 1 Round up.
|
1494 |
|
|
else
|
1495 |
|
|
Y = (<large int> & ~mask) Round down.
|
1496 |
|
|
Z = X + Y
|
1497 |
|
|
memory (Z + (<large int> - Y));
|
1498 |
|
|
|
1499 |
|
|
This makes reload inheritance and reload_cse work better since Z
|
1500 |
|
|
can be reused.
|
1501 |
|
|
|
1502 |
|
|
There may be more opportunities to improve code with this hook. */
|
1503 |
|
|
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
|
1504 |
|
|
do { \
|
1505 |
|
|
long offset, newoffset, mask; \
|
1506 |
|
|
rtx new, temp = NULL_RTX; \
|
1507 |
|
|
\
|
1508 |
|
|
mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
1509 |
|
|
? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \
|
1510 |
|
|
\
|
1511 |
|
|
if (optimize && GET_CODE (AD) == PLUS) \
|
1512 |
|
|
temp = simplify_binary_operation (PLUS, Pmode, \
|
1513 |
|
|
XEXP (AD, 0), XEXP (AD, 1)); \
|
1514 |
|
|
\
|
1515 |
|
|
new = temp ? temp : AD; \
|
1516 |
|
|
\
|
1517 |
|
|
if (optimize \
|
1518 |
|
|
&& GET_CODE (new) == PLUS \
|
1519 |
|
|
&& GET_CODE (XEXP (new, 0)) == REG \
|
1520 |
|
|
&& GET_CODE (XEXP (new, 1)) == CONST_INT) \
|
1521 |
|
|
{ \
|
1522 |
|
|
offset = INTVAL (XEXP ((new), 1)); \
|
1523 |
|
|
\
|
1524 |
|
|
/* Choose rounding direction. Round up if we are >= halfway. */ \
|
1525 |
|
|
if ((offset & mask) >= ((mask + 1) / 2)) \
|
1526 |
|
|
newoffset = (offset & ~mask) + mask + 1; \
|
1527 |
|
|
else \
|
1528 |
|
|
newoffset = offset & ~mask; \
|
1529 |
|
|
\
|
1530 |
|
|
/* Ensure that long displacements are aligned. */ \
|
1531 |
|
|
if (!VAL_5_BITS_P (newoffset) \
|
1532 |
|
|
&& GET_MODE_CLASS (MODE) == MODE_FLOAT) \
|
1533 |
|
|
newoffset &= ~(GET_MODE_SIZE (MODE) -1); \
|
1534 |
|
|
\
|
1535 |
|
|
if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \
|
1536 |
|
|
{ \
|
1537 |
|
|
temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
|
1538 |
|
|
GEN_INT (newoffset)); \
|
1539 |
|
|
AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
|
1540 |
|
|
push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
|
1541 |
|
|
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
|
1542 |
|
|
(OPNUM), (TYPE)); \
|
1543 |
|
|
goto WIN; \
|
1544 |
|
|
} \
|
1545 |
|
|
} \
|
1546 |
|
|
} while (0)
|
1547 |
|
|
|
1548 |
|
|
|
1549 |
|
|
|
1550 |
|
|
|
1551 |
|
|
/* Try machine-dependent ways of modifying an illegitimate address
|
1552 |
|
|
to be legitimate. If we find one, return the new, valid address.
|
1553 |
|
|
This macro is used in only one place: `memory_address' in explow.c.
|
1554 |
|
|
|
1555 |
|
|
OLDX is the address as it was before break_out_memory_refs was called.
|
1556 |
|
|
In some cases it is useful to look at this to decide what needs to be done.
|
1557 |
|
|
|
1558 |
|
|
MODE and WIN are passed so that this macro can use
|
1559 |
|
|
GO_IF_LEGITIMATE_ADDRESS.
|
1560 |
|
|
|
1561 |
|
|
It is always safe for this macro to do nothing. It exists to recognize
|
1562 |
|
|
opportunities to optimize the output. */
|
1563 |
|
|
|
1564 |
|
|
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
|
1565 |
|
|
{ rtx orig_x = (X); \
|
1566 |
|
|
(X) = hppa_legitimize_address (X, OLDX, MODE); \
|
1567 |
|
|
if ((X) != orig_x && memory_address_p (MODE, X)) \
|
1568 |
|
|
goto WIN; }
|
1569 |
|
|
|
1570 |
|
|
/* Go to LABEL if ADDR (a legitimate address expression)
|
1571 |
|
|
has an effect that depends on the machine mode it is used for. */
|
1572 |
|
|
|
1573 |
|
|
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
|
1574 |
|
|
if (GET_CODE (ADDR) == PRE_DEC \
|
1575 |
|
|
|| GET_CODE (ADDR) == POST_DEC \
|
1576 |
|
|
|| GET_CODE (ADDR) == PRE_INC \
|
1577 |
|
|
|| GET_CODE (ADDR) == POST_INC) \
|
1578 |
|
|
goto LABEL
|
1579 |
|
|
|
1580 |
|
|
#define TARGET_ASM_SELECT_SECTION pa_select_section
|
1581 |
|
|
|
1582 |
|
|
/* Return a nonzero value if DECL has a section attribute. */
|
1583 |
|
|
#define IN_NAMED_SECTION_P(DECL) \
|
1584 |
|
|
((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
|
1585 |
|
|
&& DECL_SECTION_NAME (DECL) != NULL_TREE)
|
1586 |
|
|
|
1587 |
|
|
/* The following extra sections and extra section functions are only used
|
1588 |
|
|
for SOM, but they must be provided unconditionally because pa.c's calls
|
1589 |
|
|
to the functions might not get optimized out when other object formats
|
1590 |
|
|
are in use. */
|
1591 |
|
|
|
1592 |
|
|
#define EXTRA_SECTIONS \
|
1593 |
|
|
in_som_readonly_data, \
|
1594 |
|
|
in_som_one_only_readonly_data, \
|
1595 |
|
|
in_som_one_only_data
|
1596 |
|
|
|
1597 |
|
|
#define EXTRA_SECTION_FUNCTIONS \
|
1598 |
|
|
SOM_READONLY_DATA_SECTION_FUNCTION \
|
1599 |
|
|
SOM_ONE_ONLY_READONLY_DATA_SECTION_FUNCTION \
|
1600 |
|
|
SOM_ONE_ONLY_DATA_SECTION_FUNCTION \
|
1601 |
|
|
FORGET_SECTION_FUNCTION
|
1602 |
|
|
|
1603 |
|
|
/* SOM puts readonly data in the default $LIT$ subspace when PIC code
|
1604 |
|
|
is not being generated. */
|
1605 |
|
|
#define SOM_READONLY_DATA_SECTION_FUNCTION \
|
1606 |
|
|
void \
|
1607 |
|
|
som_readonly_data_section (void) \
|
1608 |
|
|
{ \
|
1609 |
|
|
if (!TARGET_SOM) \
|
1610 |
|
|
return; \
|
1611 |
|
|
if (in_section != in_som_readonly_data) \
|
1612 |
|
|
{ \
|
1613 |
|
|
in_section = in_som_readonly_data; \
|
1614 |
|
|
fputs ("\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n", asm_out_file); \
|
1615 |
|
|
} \
|
1616 |
|
|
}
|
1617 |
|
|
|
1618 |
|
|
/* When secondary definitions are not supported, SOM makes readonly data one
|
1619 |
|
|
only by creating a new $LIT$ subspace in $TEXT$ with the comdat flag. */
|
1620 |
|
|
#define SOM_ONE_ONLY_READONLY_DATA_SECTION_FUNCTION \
|
1621 |
|
|
void \
|
1622 |
|
|
som_one_only_readonly_data_section (void) \
|
1623 |
|
|
{ \
|
1624 |
|
|
if (!TARGET_SOM) \
|
1625 |
|
|
return; \
|
1626 |
|
|
in_section = in_som_one_only_readonly_data; \
|
1627 |
|
|
fputs ("\t.SPACE $TEXT$\n" \
|
1628 |
|
|
"\t.NSUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=16,COMDAT\n",\
|
1629 |
|
|
asm_out_file); \
|
1630 |
|
|
}
|
1631 |
|
|
|
1632 |
|
|
/* When secondary definitions are not supported, SOM makes data one only by
|
1633 |
|
|
creating a new $DATA$ subspace in $PRIVATE$ with the comdat flag. */
|
1634 |
|
|
#define SOM_ONE_ONLY_DATA_SECTION_FUNCTION \
|
1635 |
|
|
void \
|
1636 |
|
|
som_one_only_data_section (void) \
|
1637 |
|
|
{ \
|
1638 |
|
|
if (!TARGET_SOM) \
|
1639 |
|
|
return; \
|
1640 |
|
|
in_section = in_som_one_only_data; \
|
1641 |
|
|
fputs ("\t.SPACE $PRIVATE$\n" \
|
1642 |
|
|
"\t.NSUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=24,COMDAT\n", \
|
1643 |
|
|
asm_out_file); \
|
1644 |
|
|
}
|
1645 |
|
|
|
1646 |
|
|
#define FORGET_SECTION_FUNCTION \
|
1647 |
|
|
void \
|
1648 |
|
|
forget_section (void) \
|
1649 |
|
|
{ \
|
1650 |
|
|
in_section = no_section; \
|
1651 |
|
|
}
|
1652 |
|
|
|
1653 |
|
|
/* Define this macro if references to a symbol must be treated
|
1654 |
|
|
differently depending on something about the variable or
|
1655 |
|
|
function named by the symbol (such as what section it is in).
|
1656 |
|
|
|
1657 |
|
|
The macro definition, if any, is executed immediately after the
|
1658 |
|
|
rtl for DECL or other node is created.
|
1659 |
|
|
The value of the rtl will be a `mem' whose address is a
|
1660 |
|
|
`symbol_ref'.
|
1661 |
|
|
|
1662 |
|
|
The usual thing for this macro to do is to a flag in the
|
1663 |
|
|
`symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
|
1664 |
|
|
name string in the `symbol_ref' (if one bit is not enough
|
1665 |
|
|
information).
|
1666 |
|
|
|
1667 |
|
|
On the HP-PA we use this to indicate if a symbol is in text or
|
1668 |
|
|
data space. Also, function labels need special treatment. */
|
1669 |
|
|
|
1670 |
|
|
#define TEXT_SPACE_P(DECL)\
|
1671 |
|
|
(TREE_CODE (DECL) == FUNCTION_DECL \
|
1672 |
|
|
|| (TREE_CODE (DECL) == VAR_DECL \
|
1673 |
|
|
&& TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
|
1674 |
|
|
&& (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
|
1675 |
|
|
&& !flag_pic) \
|
1676 |
|
|
|| CONSTANT_CLASS_P (DECL))
|
1677 |
|
|
|
1678 |
|
|
#define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
|
1679 |
|
|
|
1680 |
|
|
/* Specify the machine mode that this machine uses for the index in the
|
1681 |
|
|
tablejump instruction. For small tables, an element consists of a
|
1682 |
|
|
ia-relative branch and its delay slot. When -mbig-switch is specified,
|
1683 |
|
|
we use a 32-bit absolute address for non-pic code, and a 32-bit offset
|
1684 |
|
|
for both 32 and 64-bit pic code. */
|
1685 |
|
|
#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
|
1686 |
|
|
|
1687 |
|
|
/* Jump tables must be 32-bit aligned, no matter the size of the element. */
|
1688 |
|
|
#define ADDR_VEC_ALIGN(ADDR_VEC) 2
|
1689 |
|
|
|
1690 |
|
|
/* Define this as 1 if `char' should by default be signed; else as 0. */
|
1691 |
|
|
#define DEFAULT_SIGNED_CHAR 1
|
1692 |
|
|
|
1693 |
|
|
/* Max number of bytes we can move from memory to memory
|
1694 |
|
|
in one reasonably fast instruction. */
|
1695 |
|
|
#define MOVE_MAX 8
|
1696 |
|
|
|
1697 |
|
|
/* Higher than the default as we prefer to use simple move insns
|
1698 |
|
|
(better scheduling and delay slot filling) and because our
|
1699 |
|
|
built-in block move is really a 2X unrolled loop.
|
1700 |
|
|
|
1701 |
|
|
Believe it or not, this has to be big enough to allow for copying all
|
1702 |
|
|
arguments passed in registers to avoid infinite recursion during argument
|
1703 |
|
|
setup for a function call. Why? Consider how we copy the stack slots
|
1704 |
|
|
reserved for parameters when they may be trashed by a call. */
|
1705 |
|
|
#define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
|
1706 |
|
|
|
1707 |
|
|
/* Define if operations between registers always perform the operation
|
1708 |
|
|
on the full register even if a narrower mode is specified. */
|
1709 |
|
|
#define WORD_REGISTER_OPERATIONS
|
1710 |
|
|
|
1711 |
|
|
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
|
1712 |
|
|
will either zero-extend or sign-extend. The value of this macro should
|
1713 |
|
|
be the code that says which one of the two operations is implicitly
|
1714 |
|
|
done, UNKNOWN if none. */
|
1715 |
|
|
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
1716 |
|
|
|
1717 |
|
|
/* Nonzero if access to memory by bytes is slow and undesirable. */
|
1718 |
|
|
#define SLOW_BYTE_ACCESS 1
|
1719 |
|
|
|
1720 |
|
|
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
1721 |
|
|
is done just by pretending it is already truncated. */
|
1722 |
|
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
1723 |
|
|
|
1724 |
|
|
/* Specify the machine mode that pointers have.
|
1725 |
|
|
After generation of rtl, the compiler makes no further distinction
|
1726 |
|
|
between pointers and any other objects of this machine mode. */
|
1727 |
|
|
#define Pmode word_mode
|
1728 |
|
|
|
1729 |
|
|
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
1730 |
|
|
return the mode to be used for the comparison. For floating-point, CCFPmode
|
1731 |
|
|
should be used. CC_NOOVmode should be used when the first operand is a
|
1732 |
|
|
PLUS, MINUS, or NEG. CCmode should be used when no special processing is
|
1733 |
|
|
needed. */
|
1734 |
|
|
#define SELECT_CC_MODE(OP,X,Y) \
|
1735 |
|
|
(GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
|
1736 |
|
|
|
1737 |
|
|
/* A function address in a call instruction
|
1738 |
|
|
is a byte address (for indexing purposes)
|
1739 |
|
|
so give the MEM rtx a byte's mode. */
|
1740 |
|
|
#define FUNCTION_MODE SImode
|
1741 |
|
|
|
1742 |
|
|
/* Define this if addresses of constant functions
|
1743 |
|
|
shouldn't be put through pseudo regs where they can be cse'd.
|
1744 |
|
|
Desirable on machines where ordinary constants are expensive
|
1745 |
|
|
but a CALL with constant address is cheap. */
|
1746 |
|
|
#define NO_FUNCTION_CSE
|
1747 |
|
|
|
1748 |
|
|
/* Define this to be nonzero if shift instructions ignore all but the low-order
|
1749 |
|
|
few bits. */
|
1750 |
|
|
#define SHIFT_COUNT_TRUNCATED 1
|
1751 |
|
|
|
1752 |
|
|
/* Compute extra cost of moving data between one register class
|
1753 |
|
|
and another.
|
1754 |
|
|
|
1755 |
|
|
Make moves from SAR so expensive they should never happen. We used to
|
1756 |
|
|
have 0xffff here, but that generates overflow in rare cases.
|
1757 |
|
|
|
1758 |
|
|
Copies involving a FP register and a non-FP register are relatively
|
1759 |
|
|
expensive because they must go through memory.
|
1760 |
|
|
|
1761 |
|
|
Other copies are reasonably cheap. */
|
1762 |
|
|
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
1763 |
|
|
(CLASS1 == SHIFT_REGS ? 0x100 \
|
1764 |
|
|
: FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
|
1765 |
|
|
: FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
|
1766 |
|
|
: 2)
|
1767 |
|
|
|
1768 |
|
|
/* Adjust the cost of branches. */
|
1769 |
|
|
#define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
|
1770 |
|
|
|
1771 |
|
|
/* Handling the special cases is going to get too complicated for a macro,
|
1772 |
|
|
just call `pa_adjust_insn_length' to do the real work. */
|
1773 |
|
|
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
|
1774 |
|
|
LENGTH += pa_adjust_insn_length (INSN, LENGTH);
|
1775 |
|
|
|
1776 |
|
|
/* Millicode insns are actually function calls with some special
|
1777 |
|
|
constraints on arguments and register usage.
|
1778 |
|
|
|
1779 |
|
|
Millicode calls always expect their arguments in the integer argument
|
1780 |
|
|
registers, and always return their result in %r29 (ret1). They
|
1781 |
|
|
are expected to clobber their arguments, %r1, %r29, and the return
|
1782 |
|
|
pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
|
1783 |
|
|
|
1784 |
|
|
This macro tells reorg that the references to arguments and
|
1785 |
|
|
millicode calls do not appear to happen until after the millicode call.
|
1786 |
|
|
This allows reorg to put insns which set the argument registers into the
|
1787 |
|
|
delay slot of the millicode call -- thus they act more like traditional
|
1788 |
|
|
CALL_INSNs.
|
1789 |
|
|
|
1790 |
|
|
Note we cannot consider side effects of the insn to be delayed because
|
1791 |
|
|
the branch and link insn will clobber the return pointer. If we happened
|
1792 |
|
|
to use the return pointer in the delay slot of the call, then we lose.
|
1793 |
|
|
|
1794 |
|
|
get_attr_type will try to recognize the given insn, so make sure to
|
1795 |
|
|
filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
|
1796 |
|
|
in particular. */
|
1797 |
|
|
#define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
|
1798 |
|
|
|
1799 |
|
|
|
1800 |
|
|
/* Control the assembler format that we output. */
|
1801 |
|
|
|
1802 |
|
|
/* A C string constant describing how to begin a comment in the target
|
1803 |
|
|
assembler language. The compiler assumes that the comment will end at
|
1804 |
|
|
the end of the line. */
|
1805 |
|
|
|
1806 |
|
|
#define ASM_COMMENT_START ";"
|
1807 |
|
|
|
1808 |
|
|
/* Output to assembler file text saying following lines
|
1809 |
|
|
may contain character constants, extra white space, comments, etc. */
|
1810 |
|
|
|
1811 |
|
|
#define ASM_APP_ON ""
|
1812 |
|
|
|
1813 |
|
|
/* Output to assembler file text saying following lines
|
1814 |
|
|
no longer contain unusual constructs. */
|
1815 |
|
|
|
1816 |
|
|
#define ASM_APP_OFF ""
|
1817 |
|
|
|
1818 |
|
|
/* This is how to output the definition of a user-level label named NAME,
|
1819 |
|
|
such as the label on a static function or variable NAME. */
|
1820 |
|
|
|
1821 |
|
|
#define ASM_OUTPUT_LABEL(FILE, NAME) \
|
1822 |
|
|
do { assemble_name (FILE, NAME); \
|
1823 |
|
|
fputc ('\n', FILE); } while (0)
|
1824 |
|
|
|
1825 |
|
|
/* This is how to output a reference to a user-level label named NAME.
|
1826 |
|
|
`assemble_name' uses this. */
|
1827 |
|
|
|
1828 |
|
|
#define ASM_OUTPUT_LABELREF(FILE,NAME) \
|
1829 |
|
|
do { \
|
1830 |
|
|
const char *xname = (NAME); \
|
1831 |
|
|
if (FUNCTION_NAME_P (NAME)) \
|
1832 |
|
|
xname += 1; \
|
1833 |
|
|
if (xname[0] == '*') \
|
1834 |
|
|
xname += 1; \
|
1835 |
|
|
else \
|
1836 |
|
|
fputs (user_label_prefix, FILE); \
|
1837 |
|
|
fputs (xname, FILE); \
|
1838 |
|
|
} while (0)
|
1839 |
|
|
|
1840 |
|
|
/* This how we output the symbol_ref X. */
|
1841 |
|
|
|
1842 |
|
|
#define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
|
1843 |
|
|
do { \
|
1844 |
|
|
SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \
|
1845 |
|
|
assemble_name (FILE, XSTR (X, 0)); \
|
1846 |
|
|
} while (0)
|
1847 |
|
|
|
1848 |
|
|
/* This is how to store into the string LABEL
|
1849 |
|
|
the symbol_ref name of an internal numbered label where
|
1850 |
|
|
PREFIX is the class of label and NUM is the number within the class.
|
1851 |
|
|
This is suitable for output with `assemble_name'. */
|
1852 |
|
|
|
1853 |
|
|
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
|
1854 |
|
|
sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
|
1855 |
|
|
|
1856 |
|
|
#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
|
1857 |
|
|
|
1858 |
|
|
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
|
1859 |
|
|
output_ascii ((FILE), (P), (SIZE))
|
1860 |
|
|
|
1861 |
|
|
/* Jump tables are always placed in the text section. Technically, it
|
1862 |
|
|
is possible to put them in the readonly data section when -mbig-switch
|
1863 |
|
|
is specified. This has the benefit of getting the table out of .text
|
1864 |
|
|
and reducing branch lengths as a result. The downside is that an
|
1865 |
|
|
additional insn (addil) is needed to access the table when generating
|
1866 |
|
|
PIC code. The address difference table also has to use 32-bit
|
1867 |
|
|
pc-relative relocations. Currently, GAS does not support these
|
1868 |
|
|
relocations, although it is easily modified to do this operation.
|
1869 |
|
|
The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
|
1870 |
|
|
when using ELF GAS. A simple difference can be used when using
|
1871 |
|
|
SOM GAS or the HP assembler. The final downside is GDB complains
|
1872 |
|
|
about the nesting of the label for the table when debugging. */
|
1873 |
|
|
|
1874 |
|
|
#define JUMP_TABLES_IN_TEXT_SECTION 1
|
1875 |
|
|
|
1876 |
|
|
/* This is how to output an element of a case-vector that is absolute. */
|
1877 |
|
|
|
1878 |
|
|
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
1879 |
|
|
if (TARGET_BIG_SWITCH) \
|
1880 |
|
|
fprintf (FILE, "\t.word L$%04d\n", VALUE); \
|
1881 |
|
|
else \
|
1882 |
|
|
fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
|
1883 |
|
|
|
1884 |
|
|
/* This is how to output an element of a case-vector that is relative.
|
1885 |
|
|
Since we always place jump tables in the text section, the difference
|
1886 |
|
|
is absolute and requires no relocation. */
|
1887 |
|
|
|
1888 |
|
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
1889 |
|
|
if (TARGET_BIG_SWITCH) \
|
1890 |
|
|
fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \
|
1891 |
|
|
else \
|
1892 |
|
|
fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
|
1893 |
|
|
|
1894 |
|
|
/* This is how to output an assembler line that says to advance the
|
1895 |
|
|
location counter to a multiple of 2**LOG bytes. */
|
1896 |
|
|
|
1897 |
|
|
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
1898 |
|
|
fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
|
1899 |
|
|
|
1900 |
|
|
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
1901 |
|
|
fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \
|
1902 |
|
|
(unsigned HOST_WIDE_INT)(SIZE))
|
1903 |
|
|
|
1904 |
|
|
/* This says how to output an assembler line to define an uninitialized
|
1905 |
|
|
global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
|
1906 |
|
|
This macro exists to properly support languages like C++ which do not
|
1907 |
|
|
have common data. */
|
1908 |
|
|
|
1909 |
|
|
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
|
1910 |
|
|
pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
|
1911 |
|
|
|
1912 |
|
|
/* This says how to output an assembler line to define a global common symbol
|
1913 |
|
|
with size SIZE (in bytes) and alignment ALIGN (in bits). */
|
1914 |
|
|
|
1915 |
|
|
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
|
1916 |
|
|
pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
|
1917 |
|
|
|
1918 |
|
|
/* This says how to output an assembler line to define a local common symbol
|
1919 |
|
|
with size SIZE (in bytes) and alignment ALIGN (in bits). This macro
|
1920 |
|
|
controls how the assembler definitions of uninitialized static variables
|
1921 |
|
|
are output. */
|
1922 |
|
|
|
1923 |
|
|
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
|
1924 |
|
|
pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
|
1925 |
|
|
|
1926 |
|
|
|
1927 |
|
|
#define ASM_PN_FORMAT "%s___%lu"
|
1928 |
|
|
|
1929 |
|
|
/* All HP assemblers use "!" to separate logical lines. */
|
1930 |
|
|
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
|
1931 |
|
|
|
1932 |
|
|
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
|
1933 |
|
|
((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
|
1934 |
|
|
|
1935 |
|
|
/* Print operand X (an rtx) in assembler syntax to file FILE.
|
1936 |
|
|
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
1937 |
|
|
For `%' followed by punctuation, CODE is the punctuation and X is null.
|
1938 |
|
|
|
1939 |
|
|
On the HP-PA, the CODE can be `r', meaning this is a register-only operand
|
1940 |
|
|
and an immediate zero should be represented as `r0'.
|
1941 |
|
|
|
1942 |
|
|
Several % codes are defined:
|
1943 |
|
|
O an operation
|
1944 |
|
|
C compare conditions
|
1945 |
|
|
N extract conditions
|
1946 |
|
|
M modifier to handle preincrement addressing for memory refs.
|
1947 |
|
|
F modifier to handle preincrement addressing for fp memory refs */
|
1948 |
|
|
|
1949 |
|
|
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
|
1950 |
|
|
|
1951 |
|
|
|
1952 |
|
|
/* Print a memory address as an operand to reference that memory location. */
|
1953 |
|
|
|
1954 |
|
|
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
1955 |
|
|
{ rtx addr = ADDR; \
|
1956 |
|
|
switch (GET_CODE (addr)) \
|
1957 |
|
|
{ \
|
1958 |
|
|
case REG: \
|
1959 |
|
|
fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
|
1960 |
|
|
break; \
|
1961 |
|
|
case PLUS: \
|
1962 |
|
|
gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \
|
1963 |
|
|
fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \
|
1964 |
|
|
reg_names [REGNO (XEXP (addr, 0))]); \
|
1965 |
|
|
break; \
|
1966 |
|
|
case LO_SUM: \
|
1967 |
|
|
if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
|
1968 |
|
|
fputs ("R'", FILE); \
|
1969 |
|
|
else if (flag_pic == 0) \
|
1970 |
|
|
fputs ("RR'", FILE); \
|
1971 |
|
|
else \
|
1972 |
|
|
fputs ("RT'", FILE); \
|
1973 |
|
|
output_global_address (FILE, XEXP (addr, 1), 0); \
|
1974 |
|
|
fputs ("(", FILE); \
|
1975 |
|
|
output_operand (XEXP (addr, 0), 0); \
|
1976 |
|
|
fputs (")", FILE); \
|
1977 |
|
|
break; \
|
1978 |
|
|
case CONST_INT: \
|
1979 |
|
|
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \
|
1980 |
|
|
break; \
|
1981 |
|
|
default: \
|
1982 |
|
|
output_addr_const (FILE, addr); \
|
1983 |
|
|
}}
|
1984 |
|
|
|
1985 |
|
|
|
1986 |
|
|
/* Find the return address associated with the frame given by
|
1987 |
|
|
FRAMEADDR. */
|
1988 |
|
|
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
|
1989 |
|
|
(return_addr_rtx (COUNT, FRAMEADDR))
|
1990 |
|
|
|
1991 |
|
|
/* Used to mask out junk bits from the return address, such as
|
1992 |
|
|
processor state, interrupt status, condition codes and the like. */
|
1993 |
|
|
#define MASK_RETURN_ADDR \
|
1994 |
|
|
/* The privilege level is in the two low order bits, mask em out \
|
1995 |
|
|
of the return address. */ \
|
1996 |
|
|
(GEN_INT (-4))
|
1997 |
|
|
|
1998 |
|
|
/* The number of Pmode words for the setjmp buffer. */
|
1999 |
|
|
#define JMP_BUF_SIZE 50
|
2000 |
|
|
|
2001 |
|
|
/* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
|
2002 |
|
|
#define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
|
2003 |
|
|
"__canonicalize_funcptr_for_compare"
|
2004 |
|
|
|
2005 |
|
|
#ifdef HAVE_AS_TLS
|
2006 |
|
|
#undef TARGET_HAVE_TLS
|
2007 |
|
|
#define TARGET_HAVE_TLS true
|
2008 |
|
|
#endif
|