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jlechner |
;; Predicate definitions for S/390 and zSeries.
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;; Copyright (C) 2005 Free Software Foundation, Inc.
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;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and
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;; Ulrich Weigand (uweigand@de.ibm.com).
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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;; Boston, MA 02110-1301, USA.
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;; OP is the current operation.
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;; MODE is the current operation mode.
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;; operands --------------------------------------------------------------
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;; Return true if OP a (const_int 0) operand.
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(define_predicate "const0_operand"
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(and (match_code "const_int, const_double")
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(match_test "op == CONST0_RTX (mode)")))
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;; Return true if OP is constant.
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(define_special_predicate "consttable_operand"
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(and (match_code "symbol_ref, label_ref, const, const_int, const_double")
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(match_test "CONSTANT_P (op)")))
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;; Return true if OP is a valid S-type operand.
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(define_predicate "s_operand"
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(and (match_code "subreg, mem")
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(match_operand 0 "general_operand"))
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{
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/* Just like memory_operand, allow (subreg (mem ...))
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after reload. */
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if (reload_completed
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&& GET_CODE (op) == SUBREG
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&& GET_CODE (SUBREG_REG (op)) == MEM)
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op = SUBREG_REG (op);
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if (GET_CODE (op) != MEM)
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return false;
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if (!s390_legitimate_address_without_index_p (op))
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return false;
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return true;
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})
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;; Return true if OP is a valid operand for the BRAS instruction.
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;; Allow SYMBOL_REFs and @PLT stubs.
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(define_special_predicate "bras_sym_operand"
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(ior (match_code "symbol_ref")
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(and (match_code "const")
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(and (match_test "GET_CODE (XEXP (op, 0)) == UNSPEC")
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(match_test "XINT (XEXP (op, 0), 1) == UNSPEC_PLT")))))
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;; Return true if OP is a PLUS that is not a legitimate
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;; operand for the LA instruction.
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(define_predicate "s390_plus_operand"
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(and (match_code "plus")
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(and (match_test "mode == Pmode")
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(match_test "!legitimate_la_operand_p (op)"))))
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;; Return true if OP is a valid operand as shift count or setmem.
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(define_predicate "shift_count_or_setmem_operand"
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(match_code "reg, subreg, plus, const_int")
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{
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HOST_WIDE_INT offset;
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rtx base;
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/* Extract base register and offset. */
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if (!s390_decompose_shift_count (op, &base, &offset))
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return false;
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/* Don't allow any non-base hard registers. Doing so without
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confusing reload and/or regrename would be tricky, and doesn't
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buy us much anyway. */
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if (base && REGNO (base) < FIRST_PSEUDO_REGISTER && !ADDR_REG_P (base))
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return false;
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/* Unfortunately we have to reject constants that are invalid
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for an address, or else reload will get confused. */
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if (!DISP_IN_RANGE (offset))
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return false;
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return true;
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})
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;; Return true if OP a valid operand for the LARL instruction.
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(define_predicate "larl_operand"
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(match_code "label_ref, symbol_ref, const, const_int, const_double")
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{
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/* Allow labels and local symbols. */
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if (GET_CODE (op) == LABEL_REF)
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return true;
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if (GET_CODE (op) == SYMBOL_REF)
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return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
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&& SYMBOL_REF_TLS_MODEL (op) == 0
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&& (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
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/* Everything else must have a CONST, so strip it. */
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if (GET_CODE (op) != CONST)
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return false;
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op = XEXP (op, 0);
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/* Allow adding *even* in-range constants. */
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if (GET_CODE (op) == PLUS)
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{
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if (GET_CODE (XEXP (op, 1)) != CONST_INT
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|| (INTVAL (XEXP (op, 1)) & 1) != 0)
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return false;
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if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
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|| INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
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return false;
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op = XEXP (op, 0);
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}
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/* Labels and local symbols allowed here as well. */
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if (GET_CODE (op) == LABEL_REF)
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return true;
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if (GET_CODE (op) == SYMBOL_REF)
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return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
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&& SYMBOL_REF_TLS_MODEL (op) == 0
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&& (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
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/* Now we must have a @GOTENT offset or @PLT stub
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or an @INDNTPOFF TLS offset. */
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if (GET_CODE (op) == UNSPEC
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&& XINT (op, 1) == UNSPEC_GOTENT)
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return true;
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if (GET_CODE (op) == UNSPEC
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&& XINT (op, 1) == UNSPEC_PLT)
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return true;
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if (GET_CODE (op) == UNSPEC
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&& XINT (op, 1) == UNSPEC_INDNTPOFF)
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return true;
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return false;
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})
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;; operators --------------------------------------------------------------
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;; Return nonzero if OP is a valid comparison operator
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;; for a branch condition.
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(define_predicate "s390_comparison"
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(match_code "eq, ne, lt, gt, le, ge, ltu, gtu, leu, geu,
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uneq, unlt, ungt, unle, unge, ltgt,
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unordered, ordered")
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{
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if (GET_CODE (XEXP (op, 0)) != REG
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|| REGNO (XEXP (op, 0)) != CC_REGNUM
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|| XEXP (op, 1) != const0_rtx)
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return false;
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return (s390_branch_condition_mask (op) >= 0);
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})
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;; Return nonzero if OP is a valid comparison operator
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;; for an ALC condition.
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(define_predicate "s390_alc_comparison"
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(match_code "zero_extend, sign_extend, ltu, gtu, leu, geu")
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{
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while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
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op = XEXP (op, 0);
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if (!COMPARISON_P (op))
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return false;
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if (GET_CODE (XEXP (op, 0)) != REG
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|| REGNO (XEXP (op, 0)) != CC_REGNUM
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|| XEXP (op, 1) != const0_rtx)
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return false;
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switch (GET_MODE (XEXP (op, 0)))
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{
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case CCL1mode:
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return GET_CODE (op) == LTU;
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case CCL2mode:
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return GET_CODE (op) == LEU;
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case CCL3mode:
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return GET_CODE (op) == GEU;
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case CCUmode:
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return GET_CODE (op) == GTU;
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case CCURmode:
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return GET_CODE (op) == LTU;
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case CCSmode:
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return GET_CODE (op) == UNGT;
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case CCSRmode:
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return GET_CODE (op) == UNLT;
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default:
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return false;
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}
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})
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;; Return nonzero if OP is a valid comparison operator
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;; for an SLB condition.
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(define_predicate "s390_slb_comparison"
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(match_code "zero_extend, sign_extend, ltu, gtu, leu, geu")
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{
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while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
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op = XEXP (op, 0);
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if (!COMPARISON_P (op))
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return false;
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if (GET_CODE (XEXP (op, 0)) != REG
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|| REGNO (XEXP (op, 0)) != CC_REGNUM
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|| XEXP (op, 1) != const0_rtx)
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return false;
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switch (GET_MODE (XEXP (op, 0)))
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{
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case CCL1mode:
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return GET_CODE (op) == GEU;
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case CCL2mode:
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return GET_CODE (op) == GTU;
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case CCL3mode:
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return GET_CODE (op) == LTU;
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case CCUmode:
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return GET_CODE (op) == LEU;
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case CCURmode:
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return GET_CODE (op) == GEU;
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case CCSmode:
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return GET_CODE (op) == LE;
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case CCSRmode:
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return GET_CODE (op) == GE;
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default:
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return false;
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}
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})
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;; Return true if OP is a load multiple operation. It is known to be a
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;; PARALLEL and the first section will be tested.
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(define_special_predicate "load_multiple_operation"
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(match_code "parallel")
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{
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enum machine_mode elt_mode;
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int count = XVECLEN (op, 0);
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unsigned int dest_regno;
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rtx src_addr;
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int i, off;
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/* Perform a quick check so we don't blow up below. */
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if (count <= 1
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|| GET_CODE (XVECEXP (op, 0, 0)) != SET
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|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
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|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
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return false;
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283 |
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284 |
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dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
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src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
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elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
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287 |
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288 |
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/* Check, is base, or base + displacement. */
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289 |
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if (GET_CODE (src_addr) == REG)
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off = 0;
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else if (GET_CODE (src_addr) == PLUS
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293 |
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&& GET_CODE (XEXP (src_addr, 0)) == REG
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&& GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
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295 |
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{
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off = INTVAL (XEXP (src_addr, 1));
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src_addr = XEXP (src_addr, 0);
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298 |
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}
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299 |
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else
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return false;
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301 |
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302 |
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for (i = 1; i < count; i++)
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303 |
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{
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304 |
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rtx elt = XVECEXP (op, 0, i);
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305 |
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306 |
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if (GET_CODE (elt) != SET
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307 |
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|| GET_CODE (SET_DEST (elt)) != REG
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308 |
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|| GET_MODE (SET_DEST (elt)) != elt_mode
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309 |
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|| REGNO (SET_DEST (elt)) != dest_regno + i
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310 |
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|| GET_CODE (SET_SRC (elt)) != MEM
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311 |
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|| GET_MODE (SET_SRC (elt)) != elt_mode
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312 |
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|| GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
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313 |
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|| ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
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314 |
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|| GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
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315 |
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|| INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
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!= off + i * GET_MODE_SIZE (elt_mode))
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317 |
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return false;
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318 |
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}
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319 |
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320 |
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return true;
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321 |
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})
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322 |
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323 |
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;; Return true if OP is a store multiple operation. It is known to be a
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324 |
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;; PARALLEL and the first section will be tested.
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325 |
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326 |
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(define_special_predicate "store_multiple_operation"
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327 |
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(match_code "parallel")
|
328 |
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{
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329 |
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enum machine_mode elt_mode;
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330 |
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int count = XVECLEN (op, 0);
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331 |
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unsigned int src_regno;
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332 |
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rtx dest_addr;
|
333 |
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int i, off;
|
334 |
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|
335 |
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/* Perform a quick check so we don't blow up below. */
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336 |
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if (count <= 1
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337 |
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|| GET_CODE (XVECEXP (op, 0, 0)) != SET
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338 |
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|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
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339 |
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|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
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340 |
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return false;
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341 |
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342 |
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src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
|
343 |
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dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
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344 |
|
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elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
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345 |
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346 |
|
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/* Check, is base, or base + displacement. */
|
347 |
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|
348 |
|
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if (GET_CODE (dest_addr) == REG)
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349 |
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off = 0;
|
350 |
|
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else if (GET_CODE (dest_addr) == PLUS
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351 |
|
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&& GET_CODE (XEXP (dest_addr, 0)) == REG
|
352 |
|
|
&& GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
|
353 |
|
|
{
|
354 |
|
|
off = INTVAL (XEXP (dest_addr, 1));
|
355 |
|
|
dest_addr = XEXP (dest_addr, 0);
|
356 |
|
|
}
|
357 |
|
|
else
|
358 |
|
|
return false;
|
359 |
|
|
|
360 |
|
|
for (i = 1; i < count; i++)
|
361 |
|
|
{
|
362 |
|
|
rtx elt = XVECEXP (op, 0, i);
|
363 |
|
|
|
364 |
|
|
if (GET_CODE (elt) != SET
|
365 |
|
|
|| GET_CODE (SET_SRC (elt)) != REG
|
366 |
|
|
|| GET_MODE (SET_SRC (elt)) != elt_mode
|
367 |
|
|
|| REGNO (SET_SRC (elt)) != src_regno + i
|
368 |
|
|
|| GET_CODE (SET_DEST (elt)) != MEM
|
369 |
|
|
|| GET_MODE (SET_DEST (elt)) != elt_mode
|
370 |
|
|
|| GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
|
371 |
|
|
|| ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
|
372 |
|
|
|| GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
|
373 |
|
|
|| INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
|
374 |
|
|
!= off + i * GET_MODE_SIZE (elt_mode))
|
375 |
|
|
return false;
|
376 |
|
|
}
|
377 |
|
|
return true;
|
378 |
|
|
})
|