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jlechner |
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.\" ========================================================================
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.\"
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.IX Title "GCC 1"
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.TH GCC 1 "2006-05-24" "gcc-4.1.1" "GNU"
|
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.SH "NAME"
|
| 134 |
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gcc \- GNU project C and C++ compiler
|
| 135 |
|
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.SH "SYNOPSIS"
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| 136 |
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.IX Header "SYNOPSIS"
|
| 137 |
|
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gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
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|
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[\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
|
| 139 |
|
|
[\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
|
| 140 |
|
|
[\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
|
| 141 |
|
|
[\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
|
| 142 |
|
|
[\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
|
| 143 |
|
|
[\fB\-o\fR \fIoutfile\fR] \fIinfile\fR...
|
| 144 |
|
|
.PP
|
| 145 |
|
|
Only the most useful options are listed here; see below for the
|
| 146 |
|
|
remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
|
| 147 |
|
|
.SH "DESCRIPTION"
|
| 148 |
|
|
.IX Header "DESCRIPTION"
|
| 149 |
|
|
When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
|
| 150 |
|
|
assembly and linking. The \*(L"overall options\*(R" allow you to stop this
|
| 151 |
|
|
process at an intermediate stage. For example, the \fB\-c\fR option
|
| 152 |
|
|
says not to run the linker. Then the output consists of object files
|
| 153 |
|
|
output by the assembler.
|
| 154 |
|
|
.PP
|
| 155 |
|
|
Other options are passed on to one stage of processing. Some options
|
| 156 |
|
|
control the preprocessor and others the compiler itself. Yet other
|
| 157 |
|
|
options control the assembler and linker; most of these are not
|
| 158 |
|
|
documented here, since you rarely need to use any of them.
|
| 159 |
|
|
.PP
|
| 160 |
|
|
Most of the command line options that you can use with \s-1GCC\s0 are useful
|
| 161 |
|
|
for C programs; when an option is only useful with another language
|
| 162 |
|
|
(usually \*(C+), the explanation says so explicitly. If the description
|
| 163 |
|
|
for a particular option does not mention a source language, you can use
|
| 164 |
|
|
that option with all supported languages.
|
| 165 |
|
|
.PP
|
| 166 |
|
|
The \fBgcc\fR program accepts options and file names as operands. Many
|
| 167 |
|
|
options have multi-letter names; therefore multiple single-letter options
|
| 168 |
|
|
may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR.
|
| 169 |
|
|
.PP
|
| 170 |
|
|
You can mix options and other arguments. For the most part, the order
|
| 171 |
|
|
you use doesn't matter. Order does matter when you use several options
|
| 172 |
|
|
of the same kind; for example, if you specify \fB\-L\fR more than once,
|
| 173 |
|
|
the directories are searched in the order specified.
|
| 174 |
|
|
.PP
|
| 175 |
|
|
Many options have long names starting with \fB\-f\fR or with
|
| 176 |
|
|
\&\fB\-W\fR\-\-\-for example,
|
| 177 |
|
|
\&\fB\-fstrength\-reduce\fR, \fB\-Wformat\fR and so on. Most of
|
| 178 |
|
|
these have both positive and negative forms; the negative form of
|
| 179 |
|
|
\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
|
| 180 |
|
|
only one of these two forms, whichever one is not the default.
|
| 181 |
|
|
.SH "OPTIONS"
|
| 182 |
|
|
.IX Header "OPTIONS"
|
| 183 |
|
|
.Sh "Option Summary"
|
| 184 |
|
|
.IX Subsection "Option Summary"
|
| 185 |
|
|
Here is a summary of all the options, grouped by type. Explanations are
|
| 186 |
|
|
in the following sections.
|
| 187 |
|
|
.IP "\fIOverall Options\fR" 4
|
| 188 |
|
|
.IX Item "Overall Options"
|
| 189 |
|
|
\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-pipe \-pass\-exit\-codes
|
| 190 |
|
|
\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help \-\-target\-help \-\-version\fR
|
| 191 |
|
|
.IP "\fIC Language Options\fR" 4
|
| 192 |
|
|
.IX Item "C Language Options"
|
| 193 |
|
|
\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-aux\-info\fR \fIfilename\fR
|
| 194 |
|
|
\&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
|
| 195 |
|
|
\&\fB\-fhosted \-ffreestanding \-fms\-extensions
|
| 196 |
|
|
\&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
|
| 197 |
|
|
\&\-fallow\-single\-precision \-fcond\-mismatch
|
| 198 |
|
|
\&\-fsigned\-bitfields \-fsigned\-char
|
| 199 |
|
|
\&\-funsigned\-bitfields \-funsigned\-char\fR
|
| 200 |
|
|
.IP "\fI\*(C+ Language Options\fR" 4
|
| 201 |
|
|
.IX Item " Language Options"
|
| 202 |
|
|
\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
|
| 203 |
|
|
\&\-fconserve\-space \-ffriend\-injection \-fno\-const\-strings
|
| 204 |
|
|
\&\-fno\-elide\-constructors
|
| 205 |
|
|
\&\-fno\-enforce\-eh\-specs
|
| 206 |
|
|
\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
|
| 207 |
|
|
\&\-fno\-implicit\-templates
|
| 208 |
|
|
\&\-fno\-implicit\-inline\-templates
|
| 209 |
|
|
\&\-fno\-implement\-inlines \-fms\-extensions
|
| 210 |
|
|
\&\-fno\-nonansi\-builtins \-fno\-operator\-names
|
| 211 |
|
|
\&\-fno\-optional\-diags \-fpermissive
|
| 212 |
|
|
\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
|
| 213 |
|
|
\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
|
| 214 |
|
|
\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
|
| 215 |
|
|
\&\-Wabi \-Wctor\-dtor\-privacy
|
| 216 |
|
|
\&\-Wnon\-virtual\-dtor \-Wreorder
|
| 217 |
|
|
\&\-Weffc++ \-Wno\-deprecated \-Wstrict\-null\-sentinel
|
| 218 |
|
|
\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
|
| 219 |
|
|
\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
|
| 220 |
|
|
\&\-Wsign\-promo\fR
|
| 221 |
|
|
.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
|
| 222 |
|
|
.IX Item "Objective-C and Objective- Language Options"
|
| 223 |
|
|
\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
|
| 224 |
|
|
\&\fB\-fgnu\-runtime \-fnext\-runtime
|
| 225 |
|
|
\&\-fno\-nil\-receivers
|
| 226 |
|
|
\&\-fobjc\-call\-cxx\-cdtors
|
| 227 |
|
|
\&\-fobjc\-direct\-dispatch
|
| 228 |
|
|
\&\-fobjc\-exceptions
|
| 229 |
|
|
\&\-fobjc\-gc
|
| 230 |
|
|
\&\-freplace\-objc\-classes
|
| 231 |
|
|
\&\-fzero\-link
|
| 232 |
|
|
\&\-gen\-decls
|
| 233 |
|
|
\&\-Wassign\-intercept
|
| 234 |
|
|
\&\-Wno\-protocol \-Wselector
|
| 235 |
|
|
\&\-Wstrict\-selector\-match
|
| 236 |
|
|
\&\-Wundeclared\-selector\fR
|
| 237 |
|
|
.IP "\fILanguage Independent Options\fR" 4
|
| 238 |
|
|
.IX Item "Language Independent Options"
|
| 239 |
|
|
\&\fB\-fmessage\-length=\fR\fIn\fR
|
| 240 |
|
|
\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
|
| 241 |
|
|
\&\-fdiagnostics\-show\-options
|
| 242 |
|
|
.IP "\fIWarning Options\fR" 4
|
| 243 |
|
|
.IX Item "Warning Options"
|
| 244 |
|
|
\&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
|
| 245 |
|
|
\&\-w \-Wextra \-Wall \-Waggregate\-return \-Wno\-attributes
|
| 246 |
|
|
\&\-Wc++\-compat \-Wcast\-align \-Wcast\-qual \-Wchar\-subscripts \-Wcomment
|
| 247 |
|
|
\&\-Wconversion \-Wno\-deprecated\-declarations
|
| 248 |
|
|
\&\-Wdisabled\-optimization \-Wno\-div\-by\-zero \-Wno\-endif\-labels
|
| 249 |
|
|
\&\-Werror \-Werror\-implicit\-function\-declaration
|
| 250 |
|
|
\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
|
| 251 |
|
|
\&\-Wno\-format\-extra\-args \-Wformat\-nonliteral
|
| 252 |
|
|
\&\-Wformat\-security \-Wformat\-y2k
|
| 253 |
|
|
\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
|
| 254 |
|
|
\&\-Wimport \-Wno\-import \-Winit\-self \-Winline
|
| 255 |
|
|
\&\-Wno\-int\-to\-pointer\-cast
|
| 256 |
|
|
\&\-Wno\-invalid\-offsetof \-Winvalid\-pch
|
| 257 |
|
|
\&\-Wlarger\-than\-\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations \-Wlong\-long
|
| 258 |
|
|
\&\-Wmain \-Wmissing\-braces \-Wmissing\-field\-initializers
|
| 259 |
|
|
\&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
|
| 260 |
|
|
\&\-Wmissing\-noreturn
|
| 261 |
|
|
\&\-Wno\-multichar \-Wnonnull \-Wpacked \-Wpadded
|
| 262 |
|
|
\&\-Wparentheses \-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
|
| 263 |
|
|
\&\-Wredundant\-decls
|
| 264 |
|
|
\&\-Wreturn\-type \-Wsequence\-point \-Wshadow
|
| 265 |
|
|
\&\-Wsign\-compare \-Wstack\-protector
|
| 266 |
|
|
\&\-Wstrict\-aliasing \-Wstrict\-aliasing=2
|
| 267 |
|
|
\&\-Wswitch \-Wswitch\-default \-Wswitch\-enum
|
| 268 |
|
|
\&\-Wsystem\-headers \-Wtrigraphs \-Wundef \-Wuninitialized
|
| 269 |
|
|
\&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
|
| 270 |
|
|
\&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
|
| 271 |
|
|
\&\-Wunused\-value \-Wunused\-variable \-Wvariadic\-macros
|
| 272 |
|
|
\&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
|
| 273 |
|
|
.IP "\fIC\-only Warning Options\fR" 4
|
| 274 |
|
|
.IX Item "C-only Warning Options"
|
| 275 |
|
|
\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
|
| 276 |
|
|
\&\-Wmissing\-prototypes \-Wnested\-externs \-Wold\-style\-definition
|
| 277 |
|
|
\&\-Wstrict\-prototypes \-Wtraditional
|
| 278 |
|
|
\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
|
| 279 |
|
|
.IP "\fIDebugging Options\fR" 4
|
| 280 |
|
|
.IX Item "Debugging Options"
|
| 281 |
|
|
\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
|
| 282 |
|
|
\&\-fdump\-unnumbered \-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
|
| 283 |
|
|
\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
|
| 284 |
|
|
\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph
|
| 285 |
|
|
\&\-fdump\-tree\-all
|
| 286 |
|
|
\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
|
| 287 |
|
|
\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
|
| 288 |
|
|
\&\fB\-fdump\-tree\-inlined\fR[\fB\-\fR\fIn\fR]
|
| 289 |
|
|
\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
|
| 290 |
|
|
\&\-fdump\-tree\-ch
|
| 291 |
|
|
\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
|
| 292 |
|
|
\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
|
| 293 |
|
|
\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
|
| 294 |
|
|
\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
|
| 295 |
|
|
\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
|
| 296 |
|
|
\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
|
| 297 |
|
|
\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
|
| 298 |
|
|
\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
|
| 299 |
|
|
\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
|
| 300 |
|
|
\&\-fdump\-tree\-sink
|
| 301 |
|
|
\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
|
| 302 |
|
|
\&\fB\-fdump\-tree\-salias
|
| 303 |
|
|
\&\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
|
| 304 |
|
|
\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
|
| 305 |
|
|
\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
|
| 306 |
|
|
\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
|
| 307 |
|
|
\&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
|
| 308 |
|
|
\&\-feliminate\-unused\-debug\-symbols \-fmem\-report \-fprofile\-arcs
|
| 309 |
|
|
\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
|
| 310 |
|
|
\&\fB\-ftest\-coverage \-ftime\-report \-fvar\-tracking
|
| 311 |
|
|
\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
|
| 312 |
|
|
\&\-ggdb \-gstabs \-gstabs+ \-gvms \-gxcoff \-gxcoff+
|
| 313 |
|
|
\&\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
|
| 314 |
|
|
\&\-print\-multi\-directory \-print\-multi\-lib
|
| 315 |
|
|
\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
|
| 316 |
|
|
\&\-save\-temps \-time\fR
|
| 317 |
|
|
.IP "\fIOptimization Options\fR" 4
|
| 318 |
|
|
.IX Item "Optimization Options"
|
| 319 |
|
|
\&\fB\-falign\-functions=\fR\fIn\fR \fB\-falign\-jumps=\fR\fIn\fR
|
| 320 |
|
|
\&\fB\-falign\-labels=\fR\fIn\fR \fB\-falign\-loops=\fR\fIn\fR
|
| 321 |
|
|
\&\fB\-fbounds\-check \-fmudflap \-fmudflapth \-fmudflapir
|
| 322 |
|
|
\&\-fbranch\-probabilities \-fprofile\-values \-fvpt \-fbranch\-target\-load\-optimize
|
| 323 |
|
|
\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive
|
| 324 |
|
|
\&\-fcaller\-saves \-fcprop\-registers \-fcse\-follow\-jumps
|
| 325 |
|
|
\&\-fcse\-skip\-blocks \-fcx\-limited\-range \-fdata\-sections
|
| 326 |
|
|
\&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fearly\-inlining
|
| 327 |
|
|
\&\-fexpensive\-optimizations \-ffast\-math \-ffloat\-store
|
| 328 |
|
|
\&\-fforce\-addr \-ffunction\-sections
|
| 329 |
|
|
\&\-fgcse \-fgcse\-lm \-fgcse\-sm \-fgcse\-las \-fgcse\-after\-reload
|
| 330 |
|
|
\&\-floop\-optimize \-fcrossjumping \-fif\-conversion \-fif\-conversion2
|
| 331 |
|
|
\&\-finline\-functions \-finline\-functions\-called\-once
|
| 332 |
|
|
\&\-finline\-limit=\fR\fIn\fR \fB\-fkeep\-inline\-functions
|
| 333 |
|
|
\&\-fkeep\-static\-consts \-fmerge\-constants \-fmerge\-all\-constants
|
| 334 |
|
|
\&\-fmodulo\-sched \-fno\-branch\-count\-reg
|
| 335 |
|
|
\&\-fno\-default\-inline \-fno\-defer\-pop \-floop\-optimize2 \-fmove\-loop\-invariants
|
| 336 |
|
|
\&\-fno\-function\-cse \-fno\-guess\-branch\-probability
|
| 337 |
|
|
\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
|
| 338 |
|
|
\&\-funsafe\-math\-optimizations \-funsafe\-loop\-optimizations \-ffinite\-math\-only
|
| 339 |
|
|
\&\-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
|
| 340 |
|
|
\&\-fomit\-frame\-pointer \-foptimize\-register\-move
|
| 341 |
|
|
\&\-foptimize\-sibling\-calls \-fprefetch\-loop\-arrays
|
| 342 |
|
|
\&\-fprofile\-generate \-fprofile\-use
|
| 343 |
|
|
\&\-fregmove \-frename\-registers
|
| 344 |
|
|
\&\-freorder\-blocks \-freorder\-blocks\-and\-partition \-freorder\-functions
|
| 345 |
|
|
\&\-frerun\-cse\-after\-loop \-frerun\-loop\-opt
|
| 346 |
|
|
\&\-frounding\-math \-fschedule\-insns \-fschedule\-insns2
|
| 347 |
|
|
\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fsched\-spec\-load
|
| 348 |
|
|
\&\-fsched\-spec\-load\-dangerous
|
| 349 |
|
|
\&\-fsched\-stalled\-insns=\fR\fIn\fR \fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR
|
| 350 |
|
|
\&\fB\-fsched2\-use\-superblocks
|
| 351 |
|
|
\&\-fsched2\-use\-traces \-freschedule\-modulo\-scheduled\-loops
|
| 352 |
|
|
\&\-fsignaling\-nans \-fsingle\-precision\-constant
|
| 353 |
|
|
\&\-fstack\-protector \-fstack\-protector\-all
|
| 354 |
|
|
\&\-fstrength\-reduce \-fstrict\-aliasing \-ftracer \-fthread\-jumps
|
| 355 |
|
|
\&\-funroll\-all\-loops \-funroll\-loops \-fpeel\-loops
|
| 356 |
|
|
\&\-fsplit\-ivs\-in\-unroller \-funswitch\-loops
|
| 357 |
|
|
\&\-fvariable\-expansion\-in\-unroller
|
| 358 |
|
|
\&\-ftree\-pre \-ftree\-ccp \-ftree\-dce \-ftree\-loop\-optimize
|
| 359 |
|
|
\&\-ftree\-loop\-linear \-ftree\-loop\-im \-ftree\-loop\-ivcanon \-fivopts
|
| 360 |
|
|
\&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-copyrename \-ftree\-sink
|
| 361 |
|
|
\&\-ftree\-ch \-ftree\-sra \-ftree\-ter \-ftree\-lrs \-ftree\-fre \-ftree\-vectorize
|
| 362 |
|
|
\&\-ftree\-vect\-loop\-version \-ftree\-salias \-fweb
|
| 363 |
|
|
\&\-ftree\-copy\-prop \-ftree\-store\-ccp \-ftree\-store\-copy\-prop \-fwhole\-program
|
| 364 |
|
|
\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
|
| 365 |
|
|
\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
|
| 366 |
|
|
.IP "\fIPreprocessor Options\fR" 4
|
| 367 |
|
|
.IX Item "Preprocessor Options"
|
| 368 |
|
|
\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
|
| 369 |
|
|
\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
|
| 370 |
|
|
\&\fB\-C \-dD \-dI \-dM \-dN
|
| 371 |
|
|
\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
|
| 372 |
|
|
\&\-idirafter\fR \fIdir\fR
|
| 373 |
|
|
\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
|
| 374 |
|
|
\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
|
| 375 |
|
|
\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
|
| 376 |
|
|
\&\fB\-isysroot\fR \fIdir\fR
|
| 377 |
|
|
\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
|
| 378 |
|
|
\&\-P \-fworking\-directory \-remap
|
| 379 |
|
|
\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
|
| 380 |
|
|
\&\fB\-Xpreprocessor\fR \fIoption\fR
|
| 381 |
|
|
.IP "\fIAssembler Option\fR" 4
|
| 382 |
|
|
.IX Item "Assembler Option"
|
| 383 |
|
|
\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
|
| 384 |
|
|
.IP "\fILinker Options\fR" 4
|
| 385 |
|
|
.IX Item "Linker Options"
|
| 386 |
|
|
\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
|
| 387 |
|
|
\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
|
| 388 |
|
|
\&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
|
| 389 |
|
|
\&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
|
| 390 |
|
|
\&\fB\-u\fR \fIsymbol\fR
|
| 391 |
|
|
.IP "\fIDirectory Options\fR" 4
|
| 392 |
|
|
.IX Item "Directory Options"
|
| 393 |
|
|
\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
|
| 394 |
|
|
\&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
|
| 395 |
|
|
.IP "\fITarget Options\fR" 4
|
| 396 |
|
|
.IX Item "Target Options"
|
| 397 |
|
|
\&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
|
| 398 |
|
|
.IP "\fIMachine Dependent Options\fR" 4
|
| 399 |
|
|
.IX Item "Machine Dependent Options"
|
| 400 |
|
|
\&\fI\s-1ARC\s0 Options\fR
|
| 401 |
|
|
\&\fB\-EB \-EL
|
| 402 |
|
|
\&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
|
| 403 |
|
|
\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
|
| 404 |
|
|
.Sp
|
| 405 |
|
|
\&\fI\s-1ARM\s0 Options\fR
|
| 406 |
|
|
\&\fB\-mapcs\-frame \-mno\-apcs\-frame
|
| 407 |
|
|
\&\-mabi=\fR\fIname\fR
|
| 408 |
|
|
\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
|
| 409 |
|
|
\&\-mapcs\-float \-mno\-apcs\-float
|
| 410 |
|
|
\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
|
| 411 |
|
|
\&\-msched\-prolog \-mno\-sched\-prolog
|
| 412 |
|
|
\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
|
| 413 |
|
|
\&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
|
| 414 |
|
|
\&\-mthumb\-interwork \-mno\-thumb\-interwork
|
| 415 |
|
|
\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
|
| 416 |
|
|
\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
|
| 417 |
|
|
\&\fB\-mabort\-on\-noreturn
|
| 418 |
|
|
\&\-mlong\-calls \-mno\-long\-calls
|
| 419 |
|
|
\&\-msingle\-pic\-base \-mno\-single\-pic\-base
|
| 420 |
|
|
\&\-mpic\-register=\fR\fIreg\fR
|
| 421 |
|
|
\&\fB\-mnop\-fun\-dllimport
|
| 422 |
|
|
\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
|
| 423 |
|
|
\&\-mpoke\-function\-name
|
| 424 |
|
|
\&\-mthumb \-marm
|
| 425 |
|
|
\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
|
| 426 |
|
|
\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
|
| 427 |
|
|
\&\-mtp=\fR\fIname\fR
|
| 428 |
|
|
.Sp
|
| 429 |
|
|
\&\fI\s-1AVR\s0 Options\fR
|
| 430 |
|
|
\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit\-stack=\fR\fIn\fR \fB\-mno\-interrupts
|
| 431 |
|
|
\&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
|
| 432 |
|
|
.Sp
|
| 433 |
|
|
\&\fIBlackfin Options\fR
|
| 434 |
|
|
\&\fB\-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
|
| 435 |
|
|
\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
|
| 436 |
|
|
\&\-mlow\-64k \-mno\-low64k \-mid\-shared\-library
|
| 437 |
|
|
\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
|
| 438 |
|
|
\&\fB\-mlong\-calls \-mno\-long\-calls\fR
|
| 439 |
|
|
.Sp
|
| 440 |
|
|
\&\fI\s-1CRIS\s0 Options\fR
|
| 441 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
|
| 442 |
|
|
\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
|
| 443 |
|
|
\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
|
| 444 |
|
|
\&\-mstack\-align \-mdata\-align \-mconst\-align
|
| 445 |
|
|
\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
|
| 446 |
|
|
\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
|
| 447 |
|
|
\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
|
| 448 |
|
|
.Sp
|
| 449 |
|
|
\&\fI\s-1CRX\s0 Options\fR
|
| 450 |
|
|
\&\fB\-mmac \-mpush\-args\fR
|
| 451 |
|
|
.Sp
|
| 452 |
|
|
\&\fIDarwin Options\fR
|
| 453 |
|
|
\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
|
| 454 |
|
|
\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
|
| 455 |
|
|
\&\-client_name \-compatibility_version \-current_version
|
| 456 |
|
|
\&\-dead_strip
|
| 457 |
|
|
\&\-dependency\-file \-dylib_file \-dylinker_install_name
|
| 458 |
|
|
\&\-dynamic \-dynamiclib \-exported_symbols_list
|
| 459 |
|
|
\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
|
| 460 |
|
|
\&\-force_flat_namespace \-headerpad_max_install_names
|
| 461 |
|
|
\&\-image_base \-init \-install_name \-keep_private_externs
|
| 462 |
|
|
\&\-multi_module \-multiply_defined \-multiply_defined_unused
|
| 463 |
|
|
\&\-noall_load \-no_dead_strip_inits_and_terms
|
| 464 |
|
|
\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
|
| 465 |
|
|
\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
|
| 466 |
|
|
\&\-private_bundle \-read_only_relocs \-sectalign
|
| 467 |
|
|
\&\-sectobjectsymbols \-whyload \-seg1addr
|
| 468 |
|
|
\&\-sectcreate \-sectobjectsymbols \-sectorder
|
| 469 |
|
|
\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
|
| 470 |
|
|
\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
|
| 471 |
|
|
\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
|
| 472 |
|
|
\&\-single_module \-static \-sub_library \-sub_umbrella
|
| 473 |
|
|
\&\-twolevel_namespace \-umbrella \-undefined
|
| 474 |
|
|
\&\-unexported_symbols_list \-weak_reference_mismatches
|
| 475 |
|
|
\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
|
| 476 |
|
|
\&\fB\-mone\-byte\-bool\fR
|
| 477 |
|
|
.Sp
|
| 478 |
|
|
\&\fI\s-1DEC\s0 Alpha Options\fR
|
| 479 |
|
|
\&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
|
| 480 |
|
|
\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
|
| 481 |
|
|
\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
|
| 482 |
|
|
\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
|
| 483 |
|
|
\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
|
| 484 |
|
|
\&\fB\-mbwx \-mmax \-mfix \-mcix
|
| 485 |
|
|
\&\-mfloat\-vax \-mfloat\-ieee
|
| 486 |
|
|
\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
|
| 487 |
|
|
\&\-msmall\-text \-mlarge\-text
|
| 488 |
|
|
\&\-mmemory\-latency=\fR\fItime\fR
|
| 489 |
|
|
.Sp
|
| 490 |
|
|
\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
|
| 491 |
|
|
\&\fB\-mvms\-return\-codes\fR
|
| 492 |
|
|
.Sp
|
| 493 |
|
|
\&\fI\s-1FRV\s0 Options\fR
|
| 494 |
|
|
\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
|
| 495 |
|
|
\&\-mhard\-float \-msoft\-float
|
| 496 |
|
|
\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
|
| 497 |
|
|
\&\-mdouble \-mno\-double
|
| 498 |
|
|
\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
|
| 499 |
|
|
\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
|
| 500 |
|
|
\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
|
| 501 |
|
|
\&\-mlibrary\-pic \-macc\-4 \-macc\-8
|
| 502 |
|
|
\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
|
| 503 |
|
|
\&\-moptimize\-membar \-mno\-optimize\-membar
|
| 504 |
|
|
\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
|
| 505 |
|
|
\&\-mvliw\-branch \-mno\-vliw\-branch
|
| 506 |
|
|
\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
|
| 507 |
|
|
\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
|
| 508 |
|
|
\&\-mTLS \-mtls
|
| 509 |
|
|
\&\-mcpu=\fR\fIcpu\fR
|
| 510 |
|
|
.Sp
|
| 511 |
|
|
\&\fIH8/300 Options\fR
|
| 512 |
|
|
\&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
|
| 513 |
|
|
.Sp
|
| 514 |
|
|
\&\fI\s-1HPPA\s0 Options\fR
|
| 515 |
|
|
\&\fB\-march=\fR\fIarchitecture-type\fR
|
| 516 |
|
|
\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
|
| 517 |
|
|
\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
|
| 518 |
|
|
\&\-mfixed\-range=\fR\fIregister-range\fR
|
| 519 |
|
|
\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
|
| 520 |
|
|
\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
|
| 521 |
|
|
\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
|
| 522 |
|
|
\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
|
| 523 |
|
|
\&\-mno\-portable\-runtime \-mno\-soft\-float
|
| 524 |
|
|
\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
|
| 525 |
|
|
\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
|
| 526 |
|
|
\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
|
| 527 |
|
|
\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
|
| 528 |
|
|
.Sp
|
| 529 |
|
|
\&\fIi386 and x86\-64 Options\fR
|
| 530 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
|
| 531 |
|
|
\&\fB\-mfpmath=\fR\fIunit\fR
|
| 532 |
|
|
\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
|
| 533 |
|
|
\&\-mno\-fp\-ret\-in\-387 \-msoft\-float \-msvr3\-shlib
|
| 534 |
|
|
\&\-mno\-wide\-multiply \-mrtd \-malign\-double
|
| 535 |
|
|
\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
|
| 536 |
|
|
\&\fB\-mmmx \-msse \-msse2 \-msse3 \-m3dnow
|
| 537 |
|
|
\&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
|
| 538 |
|
|
\&\-mpush\-args \-maccumulate\-outgoing\-args \-m128bit\-long\-double
|
| 539 |
|
|
\&\-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
|
| 540 |
|
|
\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
|
| 541 |
|
|
\&\-mcmodel=\fR\fIcode-model\fR
|
| 542 |
|
|
\&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
|
| 543 |
|
|
.Sp
|
| 544 |
|
|
\&\fI\s-1IA\-64\s0 Options\fR
|
| 545 |
|
|
\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
|
| 546 |
|
|
\&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
|
| 547 |
|
|
\&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
|
| 548 |
|
|
\&\-minline\-float\-divide\-max\-throughput
|
| 549 |
|
|
\&\-minline\-int\-divide\-min\-latency
|
| 550 |
|
|
\&\-minline\-int\-divide\-max\-throughput
|
| 551 |
|
|
\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
|
| 552 |
|
|
\&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
|
| 553 |
|
|
\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
|
| 554 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64\fR
|
| 555 |
|
|
.Sp
|
| 556 |
|
|
\&\fIM32R/D Options\fR
|
| 557 |
|
|
\&\fB\-m32r2 \-m32rx \-m32r
|
| 558 |
|
|
\&\-mdebug
|
| 559 |
|
|
\&\-malign\-loops \-mno\-align\-loops
|
| 560 |
|
|
\&\-missue\-rate=\fR\fInumber\fR
|
| 561 |
|
|
\&\fB\-mbranch\-cost=\fR\fInumber\fR
|
| 562 |
|
|
\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
|
| 563 |
|
|
\&\fB\-msdata=\fR\fIsdata-type\fR
|
| 564 |
|
|
\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
|
| 565 |
|
|
\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
|
| 566 |
|
|
\&\fB\-G\fR \fInum\fR
|
| 567 |
|
|
.Sp
|
| 568 |
|
|
\&\fIM32C Options\fR
|
| 569 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
|
| 570 |
|
|
.Sp
|
| 571 |
|
|
\&\fIM680x0 Options\fR
|
| 572 |
|
|
\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
|
| 573 |
|
|
\&\-m68060 \-mcpu32 \-m5200 \-m68881 \-mbitfield \-mc68000 \-mc68020
|
| 574 |
|
|
\&\-mnobitfield \-mrtd \-mshort \-msoft\-float \-mpcrel
|
| 575 |
|
|
\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
|
| 576 |
|
|
\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library\fR
|
| 577 |
|
|
.Sp
|
| 578 |
|
|
\&\fIM68hc1x Options\fR
|
| 579 |
|
|
\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
|
| 580 |
|
|
\&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
|
| 581 |
|
|
\&\-msoft\-reg\-count=\fR\fIcount\fR
|
| 582 |
|
|
.Sp
|
| 583 |
|
|
\&\fIMCore Options\fR
|
| 584 |
|
|
\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
|
| 585 |
|
|
\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
|
| 586 |
|
|
\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
|
| 587 |
|
|
\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
|
| 588 |
|
|
\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
|
| 589 |
|
|
.Sp
|
| 590 |
|
|
\&\fI\s-1MIPS\s0 Options\fR
|
| 591 |
|
|
\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
|
| 592 |
|
|
\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2 \-mips64
|
| 593 |
|
|
\&\-mips16 \-mno\-mips16 \-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
|
| 594 |
|
|
\&\-mxgot \-mno\-xgot \-mgp32 \-mgp64 \-mfp32 \-mfp64
|
| 595 |
|
|
\&\-mhard\-float \-msoft\-float \-msingle\-float \-mdouble\-float
|
| 596 |
|
|
\&\-mdsp \-mpaired\-single \-mips3d
|
| 597 |
|
|
\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
|
| 598 |
|
|
\&\-G\fR\fInum\fR \fB\-membedded\-data \-mno\-embedded\-data
|
| 599 |
|
|
\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
|
| 600 |
|
|
\&\-msplit\-addresses \-mno\-split\-addresses
|
| 601 |
|
|
\&\-mexplicit\-relocs \-mno\-explicit\-relocs
|
| 602 |
|
|
\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
|
| 603 |
|
|
\&\-mdivide\-traps \-mdivide\-breaks
|
| 604 |
|
|
\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
|
| 605 |
|
|
\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
|
| 606 |
|
|
\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
|
| 607 |
|
|
\&\-mfix\-vr4120 \-mno\-fix\-vr4120 \-mfix\-vr4130
|
| 608 |
|
|
\&\-mfix\-sb1 \-mno\-fix\-sb1
|
| 609 |
|
|
\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
|
| 610 |
|
|
\&\-mbranch\-likely \-mno\-branch\-likely
|
| 611 |
|
|
\&\-mfp\-exceptions \-mno\-fp\-exceptions
|
| 612 |
|
|
\&\-mvr4130\-align \-mno\-vr4130\-align\fR
|
| 613 |
|
|
.Sp
|
| 614 |
|
|
\&\fI\s-1MMIX\s0 Options\fR
|
| 615 |
|
|
\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
|
| 616 |
|
|
\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
|
| 617 |
|
|
\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
|
| 618 |
|
|
\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
|
| 619 |
|
|
.Sp
|
| 620 |
|
|
\&\fI\s-1MN10300\s0 Options\fR
|
| 621 |
|
|
\&\fB\-mmult\-bug \-mno\-mult\-bug
|
| 622 |
|
|
\&\-mam33 \-mno\-am33
|
| 623 |
|
|
\&\-mam33\-2 \-mno\-am33\-2
|
| 624 |
|
|
\&\-mreturn\-pointer\-on\-d0
|
| 625 |
|
|
\&\-mno\-crt0 \-mrelax\fR
|
| 626 |
|
|
.Sp
|
| 627 |
|
|
\&\fI\s-1MT\s0 Options\fR
|
| 628 |
|
|
\&\fB\-mno\-crt0 \-mbacc \-msim
|
| 629 |
|
|
\&\-march=\fR\fIcpu-type\fR\fB \fR
|
| 630 |
|
|
.Sp
|
| 631 |
|
|
\&\fI\s-1PDP\-11\s0 Options\fR
|
| 632 |
|
|
\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
|
| 633 |
|
|
\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
|
| 634 |
|
|
\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
|
| 635 |
|
|
\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
|
| 636 |
|
|
\&\-mbranch\-expensive \-mbranch\-cheap
|
| 637 |
|
|
\&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
|
| 638 |
|
|
.Sp
|
| 639 |
|
|
\&\fIPowerPC Options\fR
|
| 640 |
|
|
See \s-1RS/6000\s0 and PowerPC Options.
|
| 641 |
|
|
.Sp
|
| 642 |
|
|
\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
|
| 643 |
|
|
\&\fB\-mcpu=\fR\fIcpu-type\fR
|
| 644 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR
|
| 645 |
|
|
\&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
|
| 646 |
|
|
\&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
|
| 647 |
|
|
\&\-maltivec \-mno\-altivec
|
| 648 |
|
|
\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
|
| 649 |
|
|
\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
|
| 650 |
|
|
\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
|
| 651 |
|
|
\&\-mnew\-mnemonics \-mold\-mnemonics
|
| 652 |
|
|
\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
|
| 653 |
|
|
\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
|
| 654 |
|
|
\&\-malign\-power \-malign\-natural
|
| 655 |
|
|
\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
|
| 656 |
|
|
\&\-mstring \-mno\-string \-mupdate \-mno\-update
|
| 657 |
|
|
\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
|
| 658 |
|
|
\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
|
| 659 |
|
|
\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
|
| 660 |
|
|
\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
|
| 661 |
|
|
\&\-mdynamic\-no\-pic \-maltivec \-mswdiv
|
| 662 |
|
|
\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
|
| 663 |
|
|
\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
|
| 664 |
|
|
\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
|
| 665 |
|
|
\&\fB\-mcall\-sysv \-mcall\-netbsd
|
| 666 |
|
|
\&\-maix\-struct\-return \-msvr4\-struct\-return
|
| 667 |
|
|
\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
|
| 668 |
|
|
\&\-misel \-mno\-isel
|
| 669 |
|
|
\&\-misel=yes \-misel=no
|
| 670 |
|
|
\&\-mspe \-mno\-spe
|
| 671 |
|
|
\&\-mspe=yes \-mspe=no
|
| 672 |
|
|
\&\-mvrsave \-mno\-vrsave
|
| 673 |
|
|
\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
|
| 674 |
|
|
\&\-mprototype \-mno\-prototype
|
| 675 |
|
|
\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
|
| 676 |
|
|
\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-mwindiss \-G\fR \fInum\fR \fB\-pthread\fR
|
| 677 |
|
|
.Sp
|
| 678 |
|
|
\&\fIS/390 and zSeries Options\fR
|
| 679 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
|
| 680 |
|
|
\&\fB\-mhard\-float \-msoft\-float \-mlong\-double\-64 \-mlong\-double\-128
|
| 681 |
|
|
\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
|
| 682 |
|
|
\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
|
| 683 |
|
|
\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
|
| 684 |
|
|
\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
|
| 685 |
|
|
\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
|
| 686 |
|
|
.Sp
|
| 687 |
|
|
\&\fI\s-1SH\s0 Options\fR
|
| 688 |
|
|
\&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
|
| 689 |
|
|
\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
|
| 690 |
|
|
\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
|
| 691 |
|
|
\&\-m5\-64media \-m5\-64media\-nofpu
|
| 692 |
|
|
\&\-m5\-32media \-m5\-32media\-nofpu
|
| 693 |
|
|
\&\-m5\-compact \-m5\-compact\-nofpu
|
| 694 |
|
|
\&\-mb \-ml \-mdalign \-mrelax
|
| 695 |
|
|
\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
|
| 696 |
|
|
\&\-mieee \-misize \-mpadstruct \-mspace
|
| 697 |
|
|
\&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
|
| 698 |
|
|
\&\fB\-mdivsi3_libfunc=\fR\fIname\fR
|
| 699 |
|
|
\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
|
| 700 |
|
|
\-minvalid\-symbols\fR
|
| 701 |
|
|
.Sp
|
| 702 |
|
|
\&\fI\s-1SPARC\s0 Options\fR
|
| 703 |
|
|
\&\fB\-mcpu=\fR\fIcpu-type\fR
|
| 704 |
|
|
\&\fB\-mtune=\fR\fIcpu-type\fR
|
| 705 |
|
|
\&\fB\-mcmodel=\fR\fIcode-model\fR
|
| 706 |
|
|
\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
|
| 707 |
|
|
\&\-mfaster\-structs \-mno\-faster\-structs
|
| 708 |
|
|
\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
|
| 709 |
|
|
\&\-mhard\-quad\-float \-msoft\-quad\-float
|
| 710 |
|
|
\&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
|
| 711 |
|
|
\&\-mstack\-bias \-mno\-stack\-bias
|
| 712 |
|
|
\&\-munaligned\-doubles \-mno\-unaligned\-doubles
|
| 713 |
|
|
\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
|
| 714 |
|
|
\&\-threads \-pthreads \-pthread\fR
|
| 715 |
|
|
.Sp
|
| 716 |
|
|
\&\fISystem V Options\fR
|
| 717 |
|
|
\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
|
| 718 |
|
|
.Sp
|
| 719 |
|
|
\&\fITMS320C3x/C4x Options\fR
|
| 720 |
|
|
\&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm
|
| 721 |
|
|
\&\-mfast\-fix \-mmpyi \-mbk \-mti \-mdp\-isr\-reload
|
| 722 |
|
|
\&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop\-unsigned
|
| 723 |
|
|
\&\-mparallel\-insns \-mparallel\-mpy \-mpreserve\-float\fR
|
| 724 |
|
|
.Sp
|
| 725 |
|
|
\&\fIV850 Options\fR
|
| 726 |
|
|
\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
|
| 727 |
|
|
\&\-mprolog\-function \-mno\-prolog\-function \-mspace
|
| 728 |
|
|
\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
|
| 729 |
|
|
\&\fB\-mapp\-regs \-mno\-app\-regs
|
| 730 |
|
|
\&\-mdisable\-callt \-mno\-disable\-callt
|
| 731 |
|
|
\&\-mv850e1
|
| 732 |
|
|
\&\-mv850e
|
| 733 |
|
|
\&\-mv850 \-mbig\-switch\fR
|
| 734 |
|
|
.Sp
|
| 735 |
|
|
\&\fI\s-1VAX\s0 Options\fR
|
| 736 |
|
|
\&\fB\-mg \-mgnu \-munix\fR
|
| 737 |
|
|
.Sp
|
| 738 |
|
|
\&\fIx86\-64 Options\fR
|
| 739 |
|
|
See i386 and x86\-64 Options.
|
| 740 |
|
|
.Sp
|
| 741 |
|
|
\&\fIXstormy16 Options\fR
|
| 742 |
|
|
\&\fB\-msim\fR
|
| 743 |
|
|
.Sp
|
| 744 |
|
|
\&\fIXtensa Options\fR
|
| 745 |
|
|
\&\fB\-mconst16 \-mno\-const16
|
| 746 |
|
|
\&\-mfused\-madd \-mno\-fused\-madd
|
| 747 |
|
|
\&\-mtext\-section\-literals \-mno\-text\-section\-literals
|
| 748 |
|
|
\&\-mtarget\-align \-mno\-target\-align
|
| 749 |
|
|
\&\-mlongcalls \-mno\-longcalls\fR
|
| 750 |
|
|
.Sp
|
| 751 |
|
|
\&\fIzSeries Options\fR
|
| 752 |
|
|
See S/390 and zSeries Options.
|
| 753 |
|
|
.IP "\fICode Generation Options\fR" 4
|
| 754 |
|
|
.IX Item "Code Generation Options"
|
| 755 |
|
|
\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
|
| 756 |
|
|
\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
|
| 757 |
|
|
\&\-fnon\-call\-exceptions \-funwind\-tables
|
| 758 |
|
|
\&\-fasynchronous\-unwind\-tables
|
| 759 |
|
|
\&\-finhibit\-size\-directive \-finstrument\-functions
|
| 760 |
|
|
\&\-fno\-common \-fno\-ident
|
| 761 |
|
|
\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
|
| 762 |
|
|
\&\-fno\-jump\-tables
|
| 763 |
|
|
\&\-freg\-struct\-return \-fshared\-data \-fshort\-enums
|
| 764 |
|
|
\&\-fshort\-double \-fshort\-wchar
|
| 765 |
|
|
\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
|
| 766 |
|
|
\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
|
| 767 |
|
|
\&\fB\-fargument\-alias \-fargument\-noalias
|
| 768 |
|
|
\&\-fargument\-noalias\-global \-fleading\-underscore
|
| 769 |
|
|
\&\-ftls\-model=\fR\fImodel\fR
|
| 770 |
|
|
\&\fB\-ftrapv \-fwrapv \-fbounds\-check
|
| 771 |
|
|
\&\-fvisibility\fR
|
| 772 |
|
|
.Sh "Options Controlling the Kind of Output"
|
| 773 |
|
|
.IX Subsection "Options Controlling the Kind of Output"
|
| 774 |
|
|
Compilation can involve up to four stages: preprocessing, compilation
|
| 775 |
|
|
proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
|
| 776 |
|
|
preprocessing and compiling several files either into several
|
| 777 |
|
|
assembler input files, or into one assembler input file; then each
|
| 778 |
|
|
assembler input file produces an object file, and linking combines all
|
| 779 |
|
|
the object files (those newly compiled, and those specified as input)
|
| 780 |
|
|
into an executable file.
|
| 781 |
|
|
.PP
|
| 782 |
|
|
For any given input file, the file name suffix determines what kind of
|
| 783 |
|
|
compilation is done:
|
| 784 |
|
|
.IP "\fIfile\fR\fB.c\fR" 4
|
| 785 |
|
|
.IX Item "file.c"
|
| 786 |
|
|
C source code which must be preprocessed.
|
| 787 |
|
|
.IP "\fIfile\fR\fB.i\fR" 4
|
| 788 |
|
|
.IX Item "file.i"
|
| 789 |
|
|
C source code which should not be preprocessed.
|
| 790 |
|
|
.IP "\fIfile\fR\fB.ii\fR" 4
|
| 791 |
|
|
.IX Item "file.ii"
|
| 792 |
|
|
\&\*(C+ source code which should not be preprocessed.
|
| 793 |
|
|
.IP "\fIfile\fR\fB.m\fR" 4
|
| 794 |
|
|
.IX Item "file.m"
|
| 795 |
|
|
Objective-C source code. Note that you must link with the \fIlibobjc\fR
|
| 796 |
|
|
library to make an Objective-C program work.
|
| 797 |
|
|
.IP "\fIfile\fR\fB.mi\fR" 4
|
| 798 |
|
|
.IX Item "file.mi"
|
| 799 |
|
|
Objective-C source code which should not be preprocessed.
|
| 800 |
|
|
.IP "\fIfile\fR\fB.mm\fR" 4
|
| 801 |
|
|
.IX Item "file.mm"
|
| 802 |
|
|
.PD 0
|
| 803 |
|
|
.IP "\fIfile\fR\fB.M\fR" 4
|
| 804 |
|
|
.IX Item "file.M"
|
| 805 |
|
|
.PD
|
| 806 |
|
|
Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
|
| 807 |
|
|
library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
|
| 808 |
|
|
to a literal capital M.
|
| 809 |
|
|
.IP "\fIfile\fR\fB.mii\fR" 4
|
| 810 |
|
|
.IX Item "file.mii"
|
| 811 |
|
|
Objective\-\*(C+ source code which should not be preprocessed.
|
| 812 |
|
|
.IP "\fIfile\fR\fB.h\fR" 4
|
| 813 |
|
|
.IX Item "file.h"
|
| 814 |
|
|
C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
|
| 815 |
|
|
precompiled header.
|
| 816 |
|
|
.IP "\fIfile\fR\fB.cc\fR" 4
|
| 817 |
|
|
.IX Item "file.cc"
|
| 818 |
|
|
.PD 0
|
| 819 |
|
|
.IP "\fIfile\fR\fB.cp\fR" 4
|
| 820 |
|
|
.IX Item "file.cp"
|
| 821 |
|
|
.IP "\fIfile\fR\fB.cxx\fR" 4
|
| 822 |
|
|
.IX Item "file.cxx"
|
| 823 |
|
|
.IP "\fIfile\fR\fB.cpp\fR" 4
|
| 824 |
|
|
.IX Item "file.cpp"
|
| 825 |
|
|
.IP "\fIfile\fR\fB.CPP\fR" 4
|
| 826 |
|
|
.IX Item "file.CPP"
|
| 827 |
|
|
.IP "\fIfile\fR\fB.c++\fR" 4
|
| 828 |
|
|
.IX Item "file.c++"
|
| 829 |
|
|
.IP "\fIfile\fR\fB.C\fR" 4
|
| 830 |
|
|
.IX Item "file.C"
|
| 831 |
|
|
.PD
|
| 832 |
|
|
\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
|
| 833 |
|
|
the last two letters must both be literally \fBx\fR. Likewise,
|
| 834 |
|
|
\&\fB.C\fR refers to a literal capital C.
|
| 835 |
|
|
.IP "\fIfile\fR\fB.mm\fR" 4
|
| 836 |
|
|
.IX Item "file.mm"
|
| 837 |
|
|
.PD 0
|
| 838 |
|
|
.IP "\fIfile\fR\fB.M\fR" 4
|
| 839 |
|
|
.IX Item "file.M"
|
| 840 |
|
|
.PD
|
| 841 |
|
|
Objective\-\*(C+ source code which must be preprocessed.
|
| 842 |
|
|
.IP "\fIfile\fR\fB.mii\fR" 4
|
| 843 |
|
|
.IX Item "file.mii"
|
| 844 |
|
|
Objective\-\*(C+ source code which should not be preprocessed.
|
| 845 |
|
|
.IP "\fIfile\fR\fB.hh\fR" 4
|
| 846 |
|
|
.IX Item "file.hh"
|
| 847 |
|
|
.PD 0
|
| 848 |
|
|
.IP "\fIfile\fR\fB.H\fR" 4
|
| 849 |
|
|
.IX Item "file.H"
|
| 850 |
|
|
.PD
|
| 851 |
|
|
\&\*(C+ header file to be turned into a precompiled header.
|
| 852 |
|
|
.IP "\fIfile\fR\fB.f\fR" 4
|
| 853 |
|
|
.IX Item "file.f"
|
| 854 |
|
|
.PD 0
|
| 855 |
|
|
.IP "\fIfile\fR\fB.for\fR" 4
|
| 856 |
|
|
.IX Item "file.for"
|
| 857 |
|
|
.IP "\fIfile\fR\fB.FOR\fR" 4
|
| 858 |
|
|
.IX Item "file.FOR"
|
| 859 |
|
|
.PD
|
| 860 |
|
|
Fixed form Fortran source code which should not be preprocessed.
|
| 861 |
|
|
.IP "\fIfile\fR\fB.F\fR" 4
|
| 862 |
|
|
.IX Item "file.F"
|
| 863 |
|
|
.PD 0
|
| 864 |
|
|
.IP "\fIfile\fR\fB.fpp\fR" 4
|
| 865 |
|
|
.IX Item "file.fpp"
|
| 866 |
|
|
.IP "\fIfile\fR\fB.FPP\fR" 4
|
| 867 |
|
|
.IX Item "file.FPP"
|
| 868 |
|
|
.PD
|
| 869 |
|
|
Fixed form Fortran source code which must be preprocessed (with the traditional
|
| 870 |
|
|
preprocessor).
|
| 871 |
|
|
.IP "\fIfile\fR\fB.f90\fR" 4
|
| 872 |
|
|
.IX Item "file.f90"
|
| 873 |
|
|
.PD 0
|
| 874 |
|
|
.IP "\fIfile\fR\fB.f95\fR" 4
|
| 875 |
|
|
.IX Item "file.f95"
|
| 876 |
|
|
.PD
|
| 877 |
|
|
Free form Fortran source code which should not be preprocessed.
|
| 878 |
|
|
.IP "\fIfile\fR\fB.F90\fR" 4
|
| 879 |
|
|
.IX Item "file.F90"
|
| 880 |
|
|
.PD 0
|
| 881 |
|
|
.IP "\fIfile\fR\fB.F95\fR" 4
|
| 882 |
|
|
.IX Item "file.F95"
|
| 883 |
|
|
.PD
|
| 884 |
|
|
Free form Fortran source code which must be preprocessed (with the
|
| 885 |
|
|
traditional preprocessor).
|
| 886 |
|
|
.IP "\fIfile\fR\fB.ads\fR" 4
|
| 887 |
|
|
.IX Item "file.ads"
|
| 888 |
|
|
Ada source code file which contains a library unit declaration (a
|
| 889 |
|
|
declaration of a package, subprogram, or generic, or a generic
|
| 890 |
|
|
instantiation), or a library unit renaming declaration (a package,
|
| 891 |
|
|
generic, or subprogram renaming declaration). Such files are also
|
| 892 |
|
|
called \fIspecs\fR.
|
| 893 |
|
|
.IP "\fIfile\fR\fB.adb\fR" 4
|
| 894 |
|
|
.IX Item "file.adb"
|
| 895 |
|
|
Ada source code file containing a library unit body (a subprogram or
|
| 896 |
|
|
package body). Such files are also called \fIbodies\fR.
|
| 897 |
|
|
.IP "\fIfile\fR\fB.s\fR" 4
|
| 898 |
|
|
.IX Item "file.s"
|
| 899 |
|
|
Assembler code.
|
| 900 |
|
|
.IP "\fIfile\fR\fB.S\fR" 4
|
| 901 |
|
|
.IX Item "file.S"
|
| 902 |
|
|
Assembler code which must be preprocessed.
|
| 903 |
|
|
.IP "\fIother\fR" 4
|
| 904 |
|
|
.IX Item "other"
|
| 905 |
|
|
An object file to be fed straight into linking.
|
| 906 |
|
|
Any file name with no recognized suffix is treated this way.
|
| 907 |
|
|
.PP
|
| 908 |
|
|
You can specify the input language explicitly with the \fB\-x\fR option:
|
| 909 |
|
|
.IP "\fB\-x\fR \fIlanguage\fR" 4
|
| 910 |
|
|
.IX Item "-x language"
|
| 911 |
|
|
Specify explicitly the \fIlanguage\fR for the following input files
|
| 912 |
|
|
(rather than letting the compiler choose a default based on the file
|
| 913 |
|
|
name suffix). This option applies to all following input files until
|
| 914 |
|
|
the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
|
| 915 |
|
|
.Sp
|
| 916 |
|
|
.Vb 10
|
| 917 |
|
|
\& c c-header c-cpp-output
|
| 918 |
|
|
\& c++ c++-header c++-cpp-output
|
| 919 |
|
|
\& objective-c objective-c-header objective-c-cpp-output
|
| 920 |
|
|
\& objective-c++ objective-c++-header objective-c++-cpp-output
|
| 921 |
|
|
\& assembler assembler-with-cpp
|
| 922 |
|
|
\& ada
|
| 923 |
|
|
\& f77 f77-cpp-input
|
| 924 |
|
|
\& f95 f95-cpp-input
|
| 925 |
|
|
\& java
|
| 926 |
|
|
\& treelang
|
| 927 |
|
|
.Ve
|
| 928 |
|
|
.IP "\fB\-x none\fR" 4
|
| 929 |
|
|
.IX Item "-x none"
|
| 930 |
|
|
Turn off any specification of a language, so that subsequent files are
|
| 931 |
|
|
handled according to their file name suffixes (as they are if \fB\-x\fR
|
| 932 |
|
|
has not been used at all).
|
| 933 |
|
|
.IP "\fB\-pass\-exit\-codes\fR" 4
|
| 934 |
|
|
.IX Item "-pass-exit-codes"
|
| 935 |
|
|
Normally the \fBgcc\fR program will exit with the code of 1 if any
|
| 936 |
|
|
phase of the compiler returns a non-success return code. If you specify
|
| 937 |
|
|
\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
|
| 938 |
|
|
numerically highest error produced by any phase that returned an error
|
| 939 |
|
|
indication.
|
| 940 |
|
|
.PP
|
| 941 |
|
|
If you only want some of the stages of compilation, you can use
|
| 942 |
|
|
\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
|
| 943 |
|
|
one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
|
| 944 |
|
|
\&\fBgcc\fR is to stop. Note that some combinations (for example,
|
| 945 |
|
|
\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
|
| 946 |
|
|
.IP "\fB\-c\fR" 4
|
| 947 |
|
|
.IX Item "-c"
|
| 948 |
|
|
Compile or assemble the source files, but do not link. The linking
|
| 949 |
|
|
stage simply is not done. The ultimate output is in the form of an
|
| 950 |
|
|
object file for each source file.
|
| 951 |
|
|
.Sp
|
| 952 |
|
|
By default, the object file name for a source file is made by replacing
|
| 953 |
|
|
the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
|
| 954 |
|
|
.Sp
|
| 955 |
|
|
Unrecognized input files, not requiring compilation or assembly, are
|
| 956 |
|
|
ignored.
|
| 957 |
|
|
.IP "\fB\-S\fR" 4
|
| 958 |
|
|
.IX Item "-S"
|
| 959 |
|
|
Stop after the stage of compilation proper; do not assemble. The output
|
| 960 |
|
|
is in the form of an assembler code file for each non-assembler input
|
| 961 |
|
|
file specified.
|
| 962 |
|
|
.Sp
|
| 963 |
|
|
By default, the assembler file name for a source file is made by
|
| 964 |
|
|
replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
|
| 965 |
|
|
.Sp
|
| 966 |
|
|
Input files that don't require compilation are ignored.
|
| 967 |
|
|
.IP "\fB\-E\fR" 4
|
| 968 |
|
|
.IX Item "-E"
|
| 969 |
|
|
Stop after the preprocessing stage; do not run the compiler proper. The
|
| 970 |
|
|
output is in the form of preprocessed source code, which is sent to the
|
| 971 |
|
|
standard output.
|
| 972 |
|
|
.Sp
|
| 973 |
|
|
Input files which don't require preprocessing are ignored.
|
| 974 |
|
|
.IP "\fB\-o\fR \fIfile\fR" 4
|
| 975 |
|
|
.IX Item "-o file"
|
| 976 |
|
|
Place output in file \fIfile\fR. This applies regardless to whatever
|
| 977 |
|
|
sort of output is being produced, whether it be an executable file,
|
| 978 |
|
|
an object file, an assembler file or preprocessed C code.
|
| 979 |
|
|
.Sp
|
| 980 |
|
|
If \fB\-o\fR is not specified, the default is to put an executable
|
| 981 |
|
|
file in \fIa.out\fR, the object file for
|
| 982 |
|
|
\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
|
| 983 |
|
|
assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
|
| 984 |
|
|
\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
|
| 985 |
|
|
standard output.
|
| 986 |
|
|
.IP "\fB\-v\fR" 4
|
| 987 |
|
|
.IX Item "-v"
|
| 988 |
|
|
Print (on standard error output) the commands executed to run the stages
|
| 989 |
|
|
of compilation. Also print the version number of the compiler driver
|
| 990 |
|
|
program and of the preprocessor and the compiler proper.
|
| 991 |
|
|
.IP "\fB\-###\fR" 4
|
| 992 |
|
|
.IX Item "-###"
|
| 993 |
|
|
Like \fB\-v\fR except the commands are not executed and all command
|
| 994 |
|
|
arguments are quoted. This is useful for shell scripts to capture the
|
| 995 |
|
|
driver-generated command lines.
|
| 996 |
|
|
.IP "\fB\-pipe\fR" 4
|
| 997 |
|
|
.IX Item "-pipe"
|
| 998 |
|
|
Use pipes rather than temporary files for communication between the
|
| 999 |
|
|
various stages of compilation. This fails to work on some systems where
|
| 1000 |
|
|
the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
|
| 1001 |
|
|
no trouble.
|
| 1002 |
|
|
.IP "\fB\-combine\fR" 4
|
| 1003 |
|
|
.IX Item "-combine"
|
| 1004 |
|
|
If you are compiling multiple source files, this option tells the driver
|
| 1005 |
|
|
to pass all the source files to the compiler at once (for those
|
| 1006 |
|
|
languages for which the compiler can handle this). This will allow
|
| 1007 |
|
|
intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
|
| 1008 |
|
|
language for which this is supported is C. If you pass source files for
|
| 1009 |
|
|
multiple languages to the driver, using this option, the driver will invoke
|
| 1010 |
|
|
the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
|
| 1011 |
|
|
source files appropriate for it. For those languages that do not support
|
| 1012 |
|
|
\&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
|
| 1013 |
|
|
each source file in that language. If you use this option in conjunction
|
| 1014 |
|
|
with \fB\-save\-temps\fR, the compiler will generate multiple
|
| 1015 |
|
|
pre-processed files
|
| 1016 |
|
|
(one for each source file), but only one (combined) \fI.o\fR or
|
| 1017 |
|
|
\&\fI.s\fR file.
|
| 1018 |
|
|
.IP "\fB\-\-help\fR" 4
|
| 1019 |
|
|
.IX Item "--help"
|
| 1020 |
|
|
Print (on the standard output) a description of the command line options
|
| 1021 |
|
|
understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
|
| 1022 |
|
|
then \fB\-\-help\fR will also be passed on to the various processes
|
| 1023 |
|
|
invoked by \fBgcc\fR, so that they can display the command line options
|
| 1024 |
|
|
they accept. If the \fB\-Wextra\fR option is also specified then command
|
| 1025 |
|
|
line options which have no documentation associated with them will also
|
| 1026 |
|
|
be displayed.
|
| 1027 |
|
|
.IP "\fB\-\-target\-help\fR" 4
|
| 1028 |
|
|
.IX Item "--target-help"
|
| 1029 |
|
|
Print (on the standard output) a description of target specific command
|
| 1030 |
|
|
line options for each tool.
|
| 1031 |
|
|
.IP "\fB\-\-version\fR" 4
|
| 1032 |
|
|
.IX Item "--version"
|
| 1033 |
|
|
Display the version number and copyrights of the invoked \s-1GCC\s0.
|
| 1034 |
|
|
.Sh "Compiling \*(C+ Programs"
|
| 1035 |
|
|
.IX Subsection "Compiling Programs"
|
| 1036 |
|
|
\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
|
| 1037 |
|
|
\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
|
| 1038 |
|
|
\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR or \fB.H\fR; and
|
| 1039 |
|
|
preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
|
| 1040 |
|
|
files with these names and compiles them as \*(C+ programs even if you
|
| 1041 |
|
|
call the compiler the same way as for compiling C programs (usually
|
| 1042 |
|
|
with the name \fBgcc\fR).
|
| 1043 |
|
|
.PP
|
| 1044 |
|
|
However, \*(C+ programs often require class libraries as well as a
|
| 1045 |
|
|
compiler that understands the \*(C+ language\-\-\-and under some
|
| 1046 |
|
|
circumstances, you might want to compile programs or header files from
|
| 1047 |
|
|
standard input, or otherwise without a suffix that flags them as \*(C+
|
| 1048 |
|
|
programs. You might also like to precompile a C header file with a
|
| 1049 |
|
|
\&\fB.h\fR extension to be used in \*(C+ compilations. \fBg++\fR is a
|
| 1050 |
|
|
program that calls \s-1GCC\s0 with the default language set to \*(C+, and
|
| 1051 |
|
|
automatically specifies linking against the \*(C+ library. On many
|
| 1052 |
|
|
systems, \fBg++\fR is also installed with the name \fBc++\fR.
|
| 1053 |
|
|
.PP
|
| 1054 |
|
|
When you compile \*(C+ programs, you may specify many of the same
|
| 1055 |
|
|
command-line options that you use for compiling programs in any
|
| 1056 |
|
|
language; or command-line options meaningful for C and related
|
| 1057 |
|
|
languages; or options that are meaningful only for \*(C+ programs.
|
| 1058 |
|
|
.Sh "Options Controlling C Dialect"
|
| 1059 |
|
|
.IX Subsection "Options Controlling C Dialect"
|
| 1060 |
|
|
The following options control the dialect of C (or languages derived
|
| 1061 |
|
|
from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
|
| 1062 |
|
|
accepts:
|
| 1063 |
|
|
.IP "\fB\-ansi\fR" 4
|
| 1064 |
|
|
.IX Item "-ansi"
|
| 1065 |
|
|
In C mode, support all \s-1ISO\s0 C90 programs. In \*(C+ mode,
|
| 1066 |
|
|
remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+.
|
| 1067 |
|
|
.Sp
|
| 1068 |
|
|
This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
|
| 1069 |
|
|
C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
|
| 1070 |
|
|
such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
|
| 1071 |
|
|
predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
|
| 1072 |
|
|
type of system you are using. It also enables the undesirable and
|
| 1073 |
|
|
rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
|
| 1074 |
|
|
it disables recognition of \*(C+ style \fB//\fR comments as well as
|
| 1075 |
|
|
the \f(CW\*(C`inline\*(C'\fR keyword.
|
| 1076 |
|
|
.Sp
|
| 1077 |
|
|
The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
|
| 1078 |
|
|
\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
|
| 1079 |
|
|
\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
|
| 1080 |
|
|
course, but it is useful to put them in header files that might be included
|
| 1081 |
|
|
in compilations done with \fB\-ansi\fR. Alternate predefined macros
|
| 1082 |
|
|
such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
|
| 1083 |
|
|
without \fB\-ansi\fR.
|
| 1084 |
|
|
.Sp
|
| 1085 |
|
|
The \fB\-ansi\fR option does not cause non-ISO programs to be
|
| 1086 |
|
|
rejected gratuitously. For that, \fB\-pedantic\fR is required in
|
| 1087 |
|
|
addition to \fB\-ansi\fR.
|
| 1088 |
|
|
.Sp
|
| 1089 |
|
|
The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
|
| 1090 |
|
|
option is used. Some header files may notice this macro and refrain
|
| 1091 |
|
|
from declaring certain functions or defining certain macros that the
|
| 1092 |
|
|
\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
|
| 1093 |
|
|
programs that might use these names for other things.
|
| 1094 |
|
|
.Sp
|
| 1095 |
|
|
Functions which would normally be built in but do not have semantics
|
| 1096 |
|
|
defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
|
| 1097 |
|
|
functions with \fB\-ansi\fR is used.
|
| 1098 |
|
|
.IP "\fB\-std=\fR" 4
|
| 1099 |
|
|
.IX Item "-std="
|
| 1100 |
|
|
Determine the language standard. This option is currently only
|
| 1101 |
|
|
supported when compiling C or \*(C+. A value for this option must be
|
| 1102 |
|
|
provided; possible values are
|
| 1103 |
|
|
.RS 4
|
| 1104 |
|
|
.IP "\fBc89\fR" 4
|
| 1105 |
|
|
.IX Item "c89"
|
| 1106 |
|
|
.PD 0
|
| 1107 |
|
|
.IP "\fBiso9899:1990\fR" 4
|
| 1108 |
|
|
.IX Item "iso9899:1990"
|
| 1109 |
|
|
.PD
|
| 1110 |
|
|
\&\s-1ISO\s0 C90 (same as \fB\-ansi\fR).
|
| 1111 |
|
|
.IP "\fBiso9899:199409\fR" 4
|
| 1112 |
|
|
.IX Item "iso9899:199409"
|
| 1113 |
|
|
\&\s-1ISO\s0 C90 as modified in amendment 1.
|
| 1114 |
|
|
.IP "\fBc99\fR" 4
|
| 1115 |
|
|
.IX Item "c99"
|
| 1116 |
|
|
.PD 0
|
| 1117 |
|
|
.IP "\fBc9x\fR" 4
|
| 1118 |
|
|
.IX Item "c9x"
|
| 1119 |
|
|
.IP "\fBiso9899:1999\fR" 4
|
| 1120 |
|
|
.IX Item "iso9899:1999"
|
| 1121 |
|
|
.IP "\fBiso9899:199x\fR" 4
|
| 1122 |
|
|
.IX Item "iso9899:199x"
|
| 1123 |
|
|
.PD
|
| 1124 |
|
|
\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
|
| 1125 |
|
|
<\fBhttp://gcc.gnu.org/gcc\-4.1/c99status.html\fR> for more information. The
|
| 1126 |
|
|
names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
|
| 1127 |
|
|
.IP "\fBgnu89\fR" 4
|
| 1128 |
|
|
.IX Item "gnu89"
|
| 1129 |
|
|
Default, \s-1ISO\s0 C90 plus \s-1GNU\s0 extensions (including some C99 features).
|
| 1130 |
|
|
.IP "\fBgnu99\fR" 4
|
| 1131 |
|
|
.IX Item "gnu99"
|
| 1132 |
|
|
.PD 0
|
| 1133 |
|
|
.IP "\fBgnu9x\fR" 4
|
| 1134 |
|
|
.IX Item "gnu9x"
|
| 1135 |
|
|
.PD
|
| 1136 |
|
|
\&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
|
| 1137 |
|
|
this will become the default. The name \fBgnu9x\fR is deprecated.
|
| 1138 |
|
|
.IP "\fBc++98\fR" 4
|
| 1139 |
|
|
.IX Item "c++98"
|
| 1140 |
|
|
The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
|
| 1141 |
|
|
.IP "\fBgnu++98\fR" 4
|
| 1142 |
|
|
.IX Item "gnu++98"
|
| 1143 |
|
|
The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
|
| 1144 |
|
|
default for \*(C+ code.
|
| 1145 |
|
|
.RE
|
| 1146 |
|
|
.RS 4
|
| 1147 |
|
|
.Sp
|
| 1148 |
|
|
Even when this option is not specified, you can still use some of the
|
| 1149 |
|
|
features of newer standards in so far as they do not conflict with
|
| 1150 |
|
|
previous C standards. For example, you may use \f(CW\*(C`_\|_restrict_\|_\*(C'\fR even
|
| 1151 |
|
|
when \fB\-std=c99\fR is not specified.
|
| 1152 |
|
|
.Sp
|
| 1153 |
|
|
The \fB\-std\fR options specifying some version of \s-1ISO\s0 C have the same
|
| 1154 |
|
|
effects as \fB\-ansi\fR, except that features that were not in \s-1ISO\s0 C90
|
| 1155 |
|
|
but are in the specified version (for example, \fB//\fR comments and
|
| 1156 |
|
|
the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled.
|
| 1157 |
|
|
.RE
|
| 1158 |
|
|
.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
|
| 1159 |
|
|
.IX Item "-aux-info filename"
|
| 1160 |
|
|
Output to the given filename prototyped declarations for all functions
|
| 1161 |
|
|
declared and/or defined in a translation unit, including those in header
|
| 1162 |
|
|
files. This option is silently ignored in any language other than C.
|
| 1163 |
|
|
.Sp
|
| 1164 |
|
|
Besides declarations, the file indicates, in comments, the origin of
|
| 1165 |
|
|
each declaration (source file and line), whether the declaration was
|
| 1166 |
|
|
implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
|
| 1167 |
|
|
\&\fBO\fR for old, respectively, in the first character after the line
|
| 1168 |
|
|
number and the colon), and whether it came from a declaration or a
|
| 1169 |
|
|
definition (\fBC\fR or \fBF\fR, respectively, in the following
|
| 1170 |
|
|
character). In the case of function definitions, a K&R\-style list of
|
| 1171 |
|
|
arguments followed by their declarations is also provided, inside
|
| 1172 |
|
|
comments, after the declaration.
|
| 1173 |
|
|
.IP "\fB\-fno\-asm\fR" 4
|
| 1174 |
|
|
.IX Item "-fno-asm"
|
| 1175 |
|
|
Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
|
| 1176 |
|
|
keyword, so that code can use these words as identifiers. You can use
|
| 1177 |
|
|
the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
|
| 1178 |
|
|
instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
|
| 1179 |
|
|
.Sp
|
| 1180 |
|
|
In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
|
| 1181 |
|
|
\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
|
| 1182 |
|
|
use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
|
| 1183 |
|
|
effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
|
| 1184 |
|
|
switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
|
| 1185 |
|
|
\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
|
| 1186 |
|
|
.IP "\fB\-fno\-builtin\fR" 4
|
| 1187 |
|
|
.IX Item "-fno-builtin"
|
| 1188 |
|
|
.PD 0
|
| 1189 |
|
|
.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
|
| 1190 |
|
|
.IX Item "-fno-builtin-function"
|
| 1191 |
|
|
.PD
|
| 1192 |
|
|
Don't recognize built-in functions that do not begin with
|
| 1193 |
|
|
\&\fB_\|_builtin_\fR as prefix.
|
| 1194 |
|
|
.Sp
|
| 1195 |
|
|
\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
|
| 1196 |
|
|
more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
|
| 1197 |
|
|
instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
|
| 1198 |
|
|
may become inline copy loops. The resulting code is often both smaller
|
| 1199 |
|
|
and faster, but since the function calls no longer appear as such, you
|
| 1200 |
|
|
cannot set a breakpoint on those calls, nor can you change the behavior
|
| 1201 |
|
|
of the functions by linking with a different library. In addition,
|
| 1202 |
|
|
when a function is recognized as a built-in function, \s-1GCC\s0 may use
|
| 1203 |
|
|
information about that function to warn about problems with calls to
|
| 1204 |
|
|
that function, or to generate more efficient code, even if the
|
| 1205 |
|
|
resulting code still contains calls to that function. For example,
|
| 1206 |
|
|
warnings are given with \fB\-Wformat\fR for bad calls to
|
| 1207 |
|
|
\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
|
| 1208 |
|
|
known not to modify global memory.
|
| 1209 |
|
|
.Sp
|
| 1210 |
|
|
With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
|
| 1211 |
|
|
only the built-in function \fIfunction\fR is
|
| 1212 |
|
|
disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
|
| 1213 |
|
|
function is named this is not built-in in this version of \s-1GCC\s0, this
|
| 1214 |
|
|
option is ignored. There is no corresponding
|
| 1215 |
|
|
\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
|
| 1216 |
|
|
built-in functions selectively when using \fB\-fno\-builtin\fR or
|
| 1217 |
|
|
\&\fB\-ffreestanding\fR, you may define macros such as:
|
| 1218 |
|
|
.Sp
|
| 1219 |
|
|
.Vb 2
|
| 1220 |
|
|
\& #define abs(n) __builtin_abs ((n))
|
| 1221 |
|
|
\& #define strcpy(d, s) __builtin_strcpy ((d), (s))
|
| 1222 |
|
|
.Ve
|
| 1223 |
|
|
.IP "\fB\-fhosted\fR" 4
|
| 1224 |
|
|
.IX Item "-fhosted"
|
| 1225 |
|
|
Assert that compilation takes place in a hosted environment. This implies
|
| 1226 |
|
|
\&\fB\-fbuiltin\fR. A hosted environment is one in which the
|
| 1227 |
|
|
entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
|
| 1228 |
|
|
type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
|
| 1229 |
|
|
This is equivalent to \fB\-fno\-freestanding\fR.
|
| 1230 |
|
|
.IP "\fB\-ffreestanding\fR" 4
|
| 1231 |
|
|
.IX Item "-ffreestanding"
|
| 1232 |
|
|
Assert that compilation takes place in a freestanding environment. This
|
| 1233 |
|
|
implies \fB\-fno\-builtin\fR. A freestanding environment
|
| 1234 |
|
|
is one in which the standard library may not exist, and program startup may
|
| 1235 |
|
|
not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
|
| 1236 |
|
|
This is equivalent to \fB\-fno\-hosted\fR.
|
| 1237 |
|
|
.IP "\fB\-fms\-extensions\fR" 4
|
| 1238 |
|
|
.IX Item "-fms-extensions"
|
| 1239 |
|
|
Accept some non-standard constructs used in Microsoft header files.
|
| 1240 |
|
|
.Sp
|
| 1241 |
|
|
Some cases of unnamed fields in structures and unions are only
|
| 1242 |
|
|
accepted with this option.
|
| 1243 |
|
|
.IP "\fB\-trigraphs\fR" 4
|
| 1244 |
|
|
.IX Item "-trigraphs"
|
| 1245 |
|
|
Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
|
| 1246 |
|
|
options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
|
| 1247 |
|
|
.IP "\fB\-no\-integrated\-cpp\fR" 4
|
| 1248 |
|
|
.IX Item "-no-integrated-cpp"
|
| 1249 |
|
|
Performs a compilation in two passes: preprocessing and compiling. This
|
| 1250 |
|
|
option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
|
| 1251 |
|
|
\&\fB\-B\fR option. The user supplied compilation step can then add in
|
| 1252 |
|
|
an additional preprocessing step after normal preprocessing but before
|
| 1253 |
|
|
compiling. The default is to use the integrated cpp (internal cpp)
|
| 1254 |
|
|
.Sp
|
| 1255 |
|
|
The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
|
| 1256 |
|
|
\&\*(L"cc1obj\*(R" are merged.
|
| 1257 |
|
|
.IP "\fB\-traditional\fR" 4
|
| 1258 |
|
|
.IX Item "-traditional"
|
| 1259 |
|
|
.PD 0
|
| 1260 |
|
|
.IP "\fB\-traditional\-cpp\fR" 4
|
| 1261 |
|
|
.IX Item "-traditional-cpp"
|
| 1262 |
|
|
.PD
|
| 1263 |
|
|
Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
|
| 1264 |
|
|
C compiler. They are now only supported with the \fB\-E\fR switch.
|
| 1265 |
|
|
The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
|
| 1266 |
|
|
\&\s-1CPP\s0 manual for details.
|
| 1267 |
|
|
.IP "\fB\-fcond\-mismatch\fR" 4
|
| 1268 |
|
|
.IX Item "-fcond-mismatch"
|
| 1269 |
|
|
Allow conditional expressions with mismatched types in the second and
|
| 1270 |
|
|
third arguments. The value of such an expression is void. This option
|
| 1271 |
|
|
is not supported for \*(C+.
|
| 1272 |
|
|
.IP "\fB\-funsigned\-char\fR" 4
|
| 1273 |
|
|
.IX Item "-funsigned-char"
|
| 1274 |
|
|
Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
|
| 1275 |
|
|
.Sp
|
| 1276 |
|
|
Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
|
| 1277 |
|
|
be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
|
| 1278 |
|
|
\&\f(CW\*(C`signed char\*(C'\fR by default.
|
| 1279 |
|
|
.Sp
|
| 1280 |
|
|
Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
|
| 1281 |
|
|
\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
|
| 1282 |
|
|
But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
|
| 1283 |
|
|
expect it to be signed, or expect it to be unsigned, depending on the
|
| 1284 |
|
|
machines they were written for. This option, and its inverse, let you
|
| 1285 |
|
|
make such a program work with the opposite default.
|
| 1286 |
|
|
.Sp
|
| 1287 |
|
|
The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
|
| 1288 |
|
|
\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
|
| 1289 |
|
|
is always just like one of those two.
|
| 1290 |
|
|
.IP "\fB\-fsigned\-char\fR" 4
|
| 1291 |
|
|
.IX Item "-fsigned-char"
|
| 1292 |
|
|
Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
|
| 1293 |
|
|
.Sp
|
| 1294 |
|
|
Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
|
| 1295 |
|
|
the negative form of \fB\-funsigned\-char\fR. Likewise, the option
|
| 1296 |
|
|
\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
|
| 1297 |
|
|
.IP "\fB\-fsigned\-bitfields\fR" 4
|
| 1298 |
|
|
.IX Item "-fsigned-bitfields"
|
| 1299 |
|
|
.PD 0
|
| 1300 |
|
|
.IP "\fB\-funsigned\-bitfields\fR" 4
|
| 1301 |
|
|
.IX Item "-funsigned-bitfields"
|
| 1302 |
|
|
.IP "\fB\-fno\-signed\-bitfields\fR" 4
|
| 1303 |
|
|
.IX Item "-fno-signed-bitfields"
|
| 1304 |
|
|
.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
|
| 1305 |
|
|
.IX Item "-fno-unsigned-bitfields"
|
| 1306 |
|
|
.PD
|
| 1307 |
|
|
These options control whether a bit-field is signed or unsigned, when the
|
| 1308 |
|
|
declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
|
| 1309 |
|
|
default, such a bit-field is signed, because this is consistent: the
|
| 1310 |
|
|
basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
|
| 1311 |
|
|
.Sh "Options Controlling \*(C+ Dialect"
|
| 1312 |
|
|
.IX Subsection "Options Controlling Dialect"
|
| 1313 |
|
|
This section describes the command-line options that are only meaningful
|
| 1314 |
|
|
for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
|
| 1315 |
|
|
regardless of what language your program is in. For example, you
|
| 1316 |
|
|
might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
|
| 1317 |
|
|
.PP
|
| 1318 |
|
|
.Vb 1
|
| 1319 |
|
|
\& g++ -g -frepo -O -c firstClass.C
|
| 1320 |
|
|
.Ve
|
| 1321 |
|
|
.PP
|
| 1322 |
|
|
In this example, only \fB\-frepo\fR is an option meant
|
| 1323 |
|
|
only for \*(C+ programs; you can use the other options with any
|
| 1324 |
|
|
language supported by \s-1GCC\s0.
|
| 1325 |
|
|
.PP
|
| 1326 |
|
|
Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
|
| 1327 |
|
|
.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
|
| 1328 |
|
|
.IX Item "-fabi-version=n"
|
| 1329 |
|
|
Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
|
| 1330 |
|
|
\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
|
| 1331 |
|
|
the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
|
| 1332 |
|
|
the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
|
| 1333 |
|
|
Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
|
| 1334 |
|
|
are fixed.
|
| 1335 |
|
|
.Sp
|
| 1336 |
|
|
The default is version 2.
|
| 1337 |
|
|
.IP "\fB\-fno\-access\-control\fR" 4
|
| 1338 |
|
|
.IX Item "-fno-access-control"
|
| 1339 |
|
|
Turn off all access checking. This switch is mainly useful for working
|
| 1340 |
|
|
around bugs in the access control code.
|
| 1341 |
|
|
.IP "\fB\-fcheck\-new\fR" 4
|
| 1342 |
|
|
.IX Item "-fcheck-new"
|
| 1343 |
|
|
Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
|
| 1344 |
|
|
before attempting to modify the storage allocated. This check is
|
| 1345 |
|
|
normally unnecessary because the \*(C+ standard specifies that
|
| 1346 |
|
|
\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
|
| 1347 |
|
|
\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
|
| 1348 |
|
|
return value even without this option. In all other cases, when
|
| 1349 |
|
|
\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
|
| 1350 |
|
|
exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
|
| 1351 |
|
|
\&\fBnew (nothrow)\fR.
|
| 1352 |
|
|
.IP "\fB\-fconserve\-space\fR" 4
|
| 1353 |
|
|
.IX Item "-fconserve-space"
|
| 1354 |
|
|
Put uninitialized or runtime-initialized global variables into the
|
| 1355 |
|
|
common segment, as C does. This saves space in the executable at the
|
| 1356 |
|
|
cost of not diagnosing duplicate definitions. If you compile with this
|
| 1357 |
|
|
flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
|
| 1358 |
|
|
completed, you may have an object that is being destroyed twice because
|
| 1359 |
|
|
two definitions were merged.
|
| 1360 |
|
|
.Sp
|
| 1361 |
|
|
This option is no longer useful on most targets, now that support has
|
| 1362 |
|
|
been added for putting variables into \s-1BSS\s0 without making them common.
|
| 1363 |
|
|
.IP "\fB\-ffriend\-injection\fR" 4
|
| 1364 |
|
|
.IX Item "-ffriend-injection"
|
| 1365 |
|
|
Inject friend functions into the enclosing namespace, so that they are
|
| 1366 |
|
|
visible outside the scope of the class in which they are declared.
|
| 1367 |
|
|
Friend functions were documented to work this way in the old Annotated
|
| 1368 |
|
|
\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
|
| 1369 |
|
|
that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
|
| 1370 |
|
|
in an enclosing scope can only be found using argument dependent
|
| 1371 |
|
|
lookup. This option causes friends to be injected as they were in
|
| 1372 |
|
|
earlier releases.
|
| 1373 |
|
|
.Sp
|
| 1374 |
|
|
This option is for compatibility, and may be removed in a future
|
| 1375 |
|
|
release of G++.
|
| 1376 |
|
|
.IP "\fB\-fno\-const\-strings\fR" 4
|
| 1377 |
|
|
.IX Item "-fno-const-strings"
|
| 1378 |
|
|
Give string constants type \f(CW\*(C`char *\*(C'\fR instead of type \f(CW\*(C`const
|
| 1379 |
|
|
char *\*(C'\fR. By default, G++ uses type \f(CW\*(C`const char *\*(C'\fR as required by
|
| 1380 |
|
|
the standard. Even if you use \fB\-fno\-const\-strings\fR, you cannot
|
| 1381 |
|
|
actually modify the value of a string constant.
|
| 1382 |
|
|
.Sp
|
| 1383 |
|
|
This option might be removed in a future release of G++. For maximum
|
| 1384 |
|
|
portability, you should structure your code so that it works with
|
| 1385 |
|
|
string constants that have type \f(CW\*(C`const char *\*(C'\fR.
|
| 1386 |
|
|
.IP "\fB\-fno\-elide\-constructors\fR" 4
|
| 1387 |
|
|
.IX Item "-fno-elide-constructors"
|
| 1388 |
|
|
The \*(C+ standard allows an implementation to omit creating a temporary
|
| 1389 |
|
|
which is only used to initialize another object of the same type.
|
| 1390 |
|
|
Specifying this option disables that optimization, and forces G++ to
|
| 1391 |
|
|
call the copy constructor in all cases.
|
| 1392 |
|
|
.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
|
| 1393 |
|
|
.IX Item "-fno-enforce-eh-specs"
|
| 1394 |
|
|
Don't generate code to check for violation of exception specifications
|
| 1395 |
|
|
at runtime. This option violates the \*(C+ standard, but may be useful
|
| 1396 |
|
|
for reducing code size in production builds, much like defining
|
| 1397 |
|
|
\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
|
| 1398 |
|
|
exceptions in violation of the exception specifications; the compiler
|
| 1399 |
|
|
will still optimize based on the specifications, so throwing an
|
| 1400 |
|
|
unexpected exception will result in undefined behavior.
|
| 1401 |
|
|
.IP "\fB\-ffor\-scope\fR" 4
|
| 1402 |
|
|
.IX Item "-ffor-scope"
|
| 1403 |
|
|
.PD 0
|
| 1404 |
|
|
.IP "\fB\-fno\-for\-scope\fR" 4
|
| 1405 |
|
|
.IX Item "-fno-for-scope"
|
| 1406 |
|
|
.PD
|
| 1407 |
|
|
If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
|
| 1408 |
|
|
a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
|
| 1409 |
|
|
as specified by the \*(C+ standard.
|
| 1410 |
|
|
If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
|
| 1411 |
|
|
a \fIfor-init-statement\fR extends to the end of the enclosing scope,
|
| 1412 |
|
|
as was the case in old versions of G++, and other (traditional)
|
| 1413 |
|
|
implementations of \*(C+.
|
| 1414 |
|
|
.Sp
|
| 1415 |
|
|
The default if neither flag is given to follow the standard,
|
| 1416 |
|
|
but to allow and give a warning for old-style code that would
|
| 1417 |
|
|
otherwise be invalid, or have different behavior.
|
| 1418 |
|
|
.IP "\fB\-fno\-gnu\-keywords\fR" 4
|
| 1419 |
|
|
.IX Item "-fno-gnu-keywords"
|
| 1420 |
|
|
Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
|
| 1421 |
|
|
word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
|
| 1422 |
|
|
\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
|
| 1423 |
|
|
.IP "\fB\-fno\-implicit\-templates\fR" 4
|
| 1424 |
|
|
.IX Item "-fno-implicit-templates"
|
| 1425 |
|
|
Never emit code for non-inline templates which are instantiated
|
| 1426 |
|
|
implicitly (i.e. by use); only emit code for explicit instantiations.
|
| 1427 |
|
|
.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
|
| 1428 |
|
|
.IX Item "-fno-implicit-inline-templates"
|
| 1429 |
|
|
Don't emit code for implicit instantiations of inline templates, either.
|
| 1430 |
|
|
The default is to handle inlines differently so that compiles with and
|
| 1431 |
|
|
without optimization will need the same set of explicit instantiations.
|
| 1432 |
|
|
.IP "\fB\-fno\-implement\-inlines\fR" 4
|
| 1433 |
|
|
.IX Item "-fno-implement-inlines"
|
| 1434 |
|
|
To save space, do not emit out-of-line copies of inline functions
|
| 1435 |
|
|
controlled by \fB#pragma implementation\fR. This will cause linker
|
| 1436 |
|
|
errors if these functions are not inlined everywhere they are called.
|
| 1437 |
|
|
.IP "\fB\-fms\-extensions\fR" 4
|
| 1438 |
|
|
.IX Item "-fms-extensions"
|
| 1439 |
|
|
Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
|
| 1440 |
|
|
int and getting a pointer to member function via non-standard syntax.
|
| 1441 |
|
|
.IP "\fB\-fno\-nonansi\-builtins\fR" 4
|
| 1442 |
|
|
.IX Item "-fno-nonansi-builtins"
|
| 1443 |
|
|
Disable built-in declarations of functions that are not mandated by
|
| 1444 |
|
|
\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
|
| 1445 |
|
|
\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
|
| 1446 |
|
|
.IP "\fB\-fno\-operator\-names\fR" 4
|
| 1447 |
|
|
.IX Item "-fno-operator-names"
|
| 1448 |
|
|
Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
|
| 1449 |
|
|
\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
|
| 1450 |
|
|
synonyms as keywords.
|
| 1451 |
|
|
.IP "\fB\-fno\-optional\-diags\fR" 4
|
| 1452 |
|
|
.IX Item "-fno-optional-diags"
|
| 1453 |
|
|
Disable diagnostics that the standard says a compiler does not need to
|
| 1454 |
|
|
issue. Currently, the only such diagnostic issued by G++ is the one for
|
| 1455 |
|
|
a name having multiple meanings within a class.
|
| 1456 |
|
|
.IP "\fB\-fpermissive\fR" 4
|
| 1457 |
|
|
.IX Item "-fpermissive"
|
| 1458 |
|
|
Downgrade some diagnostics about nonconformant code from errors to
|
| 1459 |
|
|
warnings. Thus, using \fB\-fpermissive\fR will allow some
|
| 1460 |
|
|
nonconforming code to compile.
|
| 1461 |
|
|
.IP "\fB\-frepo\fR" 4
|
| 1462 |
|
|
.IX Item "-frepo"
|
| 1463 |
|
|
Enable automatic template instantiation at link time. This option also
|
| 1464 |
|
|
implies \fB\-fno\-implicit\-templates\fR.
|
| 1465 |
|
|
.IP "\fB\-fno\-rtti\fR" 4
|
| 1466 |
|
|
.IX Item "-fno-rtti"
|
| 1467 |
|
|
Disable generation of information about every class with virtual
|
| 1468 |
|
|
functions for use by the \*(C+ runtime type identification features
|
| 1469 |
|
|
(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
|
| 1470 |
|
|
of the language, you can save some space by using this flag. Note that
|
| 1471 |
|
|
exception handling uses the same information, but it will generate it as
|
| 1472 |
|
|
needed.
|
| 1473 |
|
|
.IP "\fB\-fstats\fR" 4
|
| 1474 |
|
|
.IX Item "-fstats"
|
| 1475 |
|
|
Emit statistics about front-end processing at the end of the compilation.
|
| 1476 |
|
|
This information is generally only useful to the G++ development team.
|
| 1477 |
|
|
.IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
|
| 1478 |
|
|
.IX Item "-ftemplate-depth-n"
|
| 1479 |
|
|
Set the maximum instantiation depth for template classes to \fIn\fR.
|
| 1480 |
|
|
A limit on the template instantiation depth is needed to detect
|
| 1481 |
|
|
endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
|
| 1482 |
|
|
conforming programs must not rely on a maximum depth greater than 17.
|
| 1483 |
|
|
.IP "\fB\-fno\-threadsafe\-statics\fR" 4
|
| 1484 |
|
|
.IX Item "-fno-threadsafe-statics"
|
| 1485 |
|
|
Do not emit the extra code to use the routines specified in the \*(C+
|
| 1486 |
|
|
\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
|
| 1487 |
|
|
option to reduce code size slightly in code that doesn't need to be
|
| 1488 |
|
|
thread\-safe.
|
| 1489 |
|
|
.IP "\fB\-fuse\-cxa\-atexit\fR" 4
|
| 1490 |
|
|
.IX Item "-fuse-cxa-atexit"
|
| 1491 |
|
|
Register destructors for objects with static storage duration with the
|
| 1492 |
|
|
\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
|
| 1493 |
|
|
This option is required for fully standards-compliant handling of static
|
| 1494 |
|
|
destructors, but will only work if your C library supports
|
| 1495 |
|
|
\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
|
| 1496 |
|
|
.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
|
| 1497 |
|
|
.IX Item "-fvisibility-inlines-hidden"
|
| 1498 |
|
|
Causes all inlined methods to be marked with
|
| 1499 |
|
|
\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
|
| 1500 |
|
|
appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
|
| 1501 |
|
|
when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
|
| 1502 |
|
|
on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
|
| 1503 |
|
|
dynamic export table when the library makes heavy use of templates. While
|
| 1504 |
|
|
it can cause bloating through duplication of code within each \s-1DSO\s0 where
|
| 1505 |
|
|
it is used, often the wastage is less than the considerable space occupied
|
| 1506 |
|
|
by a long symbol name in the export table which is typical when using
|
| 1507 |
|
|
templates and namespaces. For even more savings, combine with the
|
| 1508 |
|
|
\&\fB\-fvisibility=hidden\fR switch.
|
| 1509 |
|
|
.IP "\fB\-fno\-weak\fR" 4
|
| 1510 |
|
|
.IX Item "-fno-weak"
|
| 1511 |
|
|
Do not use weak symbol support, even if it is provided by the linker.
|
| 1512 |
|
|
By default, G++ will use weak symbols if they are available. This
|
| 1513 |
|
|
option exists only for testing, and should not be used by end\-users;
|
| 1514 |
|
|
it will result in inferior code and has no benefits. This option may
|
| 1515 |
|
|
be removed in a future release of G++.
|
| 1516 |
|
|
.IP "\fB\-nostdinc++\fR" 4
|
| 1517 |
|
|
.IX Item "-nostdinc++"
|
| 1518 |
|
|
Do not search for header files in the standard directories specific to
|
| 1519 |
|
|
\&\*(C+, but do still search the other standard directories. (This option
|
| 1520 |
|
|
is used when building the \*(C+ library.)
|
| 1521 |
|
|
.PP
|
| 1522 |
|
|
In addition, these optimization, warning, and code generation options
|
| 1523 |
|
|
have meanings only for \*(C+ programs:
|
| 1524 |
|
|
.IP "\fB\-fno\-default\-inline\fR" 4
|
| 1525 |
|
|
.IX Item "-fno-default-inline"
|
| 1526 |
|
|
Do not assume \fBinline\fR for functions defined inside a class scope.
|
| 1527 |
|
|
Note that these
|
| 1528 |
|
|
functions will have linkage like inline functions; they just won't be
|
| 1529 |
|
|
inlined by default.
|
| 1530 |
|
|
.IP "\fB\-Wabi\fR (\*(C+ only)" 4
|
| 1531 |
|
|
.IX Item "-Wabi ( only)"
|
| 1532 |
|
|
Warn when G++ generates code that is probably not compatible with the
|
| 1533 |
|
|
vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
|
| 1534 |
|
|
all such cases, there are probably some cases that are not warned about,
|
| 1535 |
|
|
even though G++ is generating incompatible code. There may also be
|
| 1536 |
|
|
cases where warnings are emitted even though the code that is generated
|
| 1537 |
|
|
will be compatible.
|
| 1538 |
|
|
.Sp
|
| 1539 |
|
|
You should rewrite your code to avoid these warnings if you are
|
| 1540 |
|
|
concerned about the fact that code generated by G++ may not be binary
|
| 1541 |
|
|
compatible with code generated by other compilers.
|
| 1542 |
|
|
.Sp
|
| 1543 |
|
|
The known incompatibilities at this point include:
|
| 1544 |
|
|
.RS 4
|
| 1545 |
|
|
.IP "*" 4
|
| 1546 |
|
|
Incorrect handling of tail-padding for bit\-fields. G++ may attempt to
|
| 1547 |
|
|
pack data into the same byte as a base class. For example:
|
| 1548 |
|
|
.Sp
|
| 1549 |
|
|
.Vb 2
|
| 1550 |
|
|
\& struct A { virtual void f(); int f1 : 1; };
|
| 1551 |
|
|
\& struct B : public A { int f2 : 1; };
|
| 1552 |
|
|
.Ve
|
| 1553 |
|
|
.Sp
|
| 1554 |
|
|
In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
|
| 1555 |
|
|
as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
|
| 1556 |
|
|
by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
|
| 1557 |
|
|
byte size on your platform; that will cause G++ and other compilers to
|
| 1558 |
|
|
layout \f(CW\*(C`B\*(C'\fR identically.
|
| 1559 |
|
|
.IP "*" 4
|
| 1560 |
|
|
Incorrect handling of tail-padding for virtual bases. G++ does not use
|
| 1561 |
|
|
tail padding when laying out virtual bases. For example:
|
| 1562 |
|
|
.Sp
|
| 1563 |
|
|
.Vb 3
|
| 1564 |
|
|
\& struct A { virtual void f(); char c1; };
|
| 1565 |
|
|
\& struct B { B(); char c2; };
|
| 1566 |
|
|
\& struct C : public A, public virtual B {};
|
| 1567 |
|
|
.Ve
|
| 1568 |
|
|
.Sp
|
| 1569 |
|
|
In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
|
| 1570 |
|
|
\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
|
| 1571 |
|
|
explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
|
| 1572 |
|
|
alignment (ignoring virtual base classes); that will cause G++ and other
|
| 1573 |
|
|
compilers to layout \f(CW\*(C`C\*(C'\fR identically.
|
| 1574 |
|
|
.IP "*" 4
|
| 1575 |
|
|
Incorrect handling of bit-fields with declared widths greater than that
|
| 1576 |
|
|
of their underlying types, when the bit-fields appear in a union. For
|
| 1577 |
|
|
example:
|
| 1578 |
|
|
.Sp
|
| 1579 |
|
|
.Vb 1
|
| 1580 |
|
|
\& union U { int i : 4096; };
|
| 1581 |
|
|
.Ve
|
| 1582 |
|
|
.Sp
|
| 1583 |
|
|
Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
|
| 1584 |
|
|
union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
|
| 1585 |
|
|
.IP "*" 4
|
| 1586 |
|
|
Empty classes can be placed at incorrect offsets. For example:
|
| 1587 |
|
|
.Sp
|
| 1588 |
|
|
.Vb 1
|
| 1589 |
|
|
\& struct A {};
|
| 1590 |
|
|
.Ve
|
| 1591 |
|
|
.Sp
|
| 1592 |
|
|
.Vb 4
|
| 1593 |
|
|
\& struct B {
|
| 1594 |
|
|
\& A a;
|
| 1595 |
|
|
\& virtual void f ();
|
| 1596 |
|
|
\& };
|
| 1597 |
|
|
.Ve
|
| 1598 |
|
|
.Sp
|
| 1599 |
|
|
.Vb 1
|
| 1600 |
|
|
\& struct C : public B, public A {};
|
| 1601 |
|
|
.Ve
|
| 1602 |
|
|
.Sp
|
| 1603 |
|
|
G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
|
| 1604 |
|
|
it should be placed at offset zero. G++ mistakenly believes that the
|
| 1605 |
|
|
\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
|
| 1606 |
|
|
.IP "*" 4
|
| 1607 |
|
|
Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
|
| 1608 |
|
|
template template parameters can be mangled incorrectly.
|
| 1609 |
|
|
.Sp
|
| 1610 |
|
|
.Vb 2
|
| 1611 |
|
|
\& template
|
| 1612 |
|
|
\& void f(typename Q::X) {}
|
| 1613 |
|
|
.Ve
|
| 1614 |
|
|
.Sp
|
| 1615 |
|
|
.Vb 2
|
| 1616 |
|
|
\& template class Q>
|
| 1617 |
|
|
\& void f(typename Q::X) {}
|
| 1618 |
|
|
.Ve
|
| 1619 |
|
|
.Sp
|
| 1620 |
|
|
Instantiations of these templates may be mangled incorrectly.
|
| 1621 |
|
|
.RE
|
| 1622 |
|
|
.RS 4
|
| 1623 |
|
|
.RE
|
| 1624 |
|
|
.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ only)" 4
|
| 1625 |
|
|
.IX Item "-Wctor-dtor-privacy ( only)"
|
| 1626 |
|
|
Warn when a class seems unusable because all the constructors or
|
| 1627 |
|
|
destructors in that class are private, and it has neither friends nor
|
| 1628 |
|
|
public static member functions.
|
| 1629 |
|
|
.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ only)" 4
|
| 1630 |
|
|
.IX Item "-Wnon-virtual-dtor ( only)"
|
| 1631 |
|
|
Warn when a class appears to be polymorphic, thereby requiring a virtual
|
| 1632 |
|
|
destructor, yet it declares a non-virtual one.
|
| 1633 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 1634 |
|
|
.IP "\fB\-Wreorder\fR (\*(C+ only)" 4
|
| 1635 |
|
|
.IX Item "-Wreorder ( only)"
|
| 1636 |
|
|
Warn when the order of member initializers given in the code does not
|
| 1637 |
|
|
match the order in which they must be executed. For instance:
|
| 1638 |
|
|
.Sp
|
| 1639 |
|
|
.Vb 5
|
| 1640 |
|
|
\& struct A {
|
| 1641 |
|
|
\& int i;
|
| 1642 |
|
|
\& int j;
|
| 1643 |
|
|
\& A(): j (0), i (1) { }
|
| 1644 |
|
|
\& };
|
| 1645 |
|
|
.Ve
|
| 1646 |
|
|
.Sp
|
| 1647 |
|
|
The compiler will rearrange the member initializers for \fBi\fR
|
| 1648 |
|
|
and \fBj\fR to match the declaration order of the members, emitting
|
| 1649 |
|
|
a warning to that effect. This warning is enabled by \fB\-Wall\fR.
|
| 1650 |
|
|
.PP
|
| 1651 |
|
|
The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
|
| 1652 |
|
|
.IP "\fB\-Weffc++\fR (\*(C+ only)" 4
|
| 1653 |
|
|
.IX Item "-Weffc++ ( only)"
|
| 1654 |
|
|
Warn about violations of the following style guidelines from Scott Meyers'
|
| 1655 |
|
|
\&\fIEffective \*(C+\fR book:
|
| 1656 |
|
|
.RS 4
|
| 1657 |
|
|
.IP "*" 4
|
| 1658 |
|
|
Item 11: Define a copy constructor and an assignment operator for classes
|
| 1659 |
|
|
with dynamically allocated memory.
|
| 1660 |
|
|
.IP "*" 4
|
| 1661 |
|
|
Item 12: Prefer initialization to assignment in constructors.
|
| 1662 |
|
|
.IP "*" 4
|
| 1663 |
|
|
Item 14: Make destructors virtual in base classes.
|
| 1664 |
|
|
.IP "*" 4
|
| 1665 |
|
|
Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
|
| 1666 |
|
|
.IP "*" 4
|
| 1667 |
|
|
Item 23: Don't try to return a reference when you must return an object.
|
| 1668 |
|
|
.RE
|
| 1669 |
|
|
.RS 4
|
| 1670 |
|
|
.Sp
|
| 1671 |
|
|
Also warn about violations of the following style guidelines from
|
| 1672 |
|
|
Scott Meyers' \fIMore Effective \*(C+\fR book:
|
| 1673 |
|
|
.IP "*" 4
|
| 1674 |
|
|
Item 6: Distinguish between prefix and postfix forms of increment and
|
| 1675 |
|
|
decrement operators.
|
| 1676 |
|
|
.IP "*" 4
|
| 1677 |
|
|
Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
|
| 1678 |
|
|
.RE
|
| 1679 |
|
|
.RS 4
|
| 1680 |
|
|
.Sp
|
| 1681 |
|
|
When selecting this option, be aware that the standard library
|
| 1682 |
|
|
headers do not obey all of these guidelines; use \fBgrep \-v\fR
|
| 1683 |
|
|
to filter out those warnings.
|
| 1684 |
|
|
.RE
|
| 1685 |
|
|
.IP "\fB\-Wno\-deprecated\fR (\*(C+ only)" 4
|
| 1686 |
|
|
.IX Item "-Wno-deprecated ( only)"
|
| 1687 |
|
|
Do not warn about usage of deprecated features.
|
| 1688 |
|
|
.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ only)" 4
|
| 1689 |
|
|
.IX Item "-Wstrict-null-sentinel ( only)"
|
| 1690 |
|
|
Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
|
| 1691 |
|
|
compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
|
| 1692 |
|
|
to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
|
| 1693 |
|
|
it is guaranteed to of the same size as a pointer. But this use is
|
| 1694 |
|
|
not portable across different compilers.
|
| 1695 |
|
|
.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ only)" 4
|
| 1696 |
|
|
.IX Item "-Wno-non-template-friend ( only)"
|
| 1697 |
|
|
Disable warnings when non-templatized friend functions are declared
|
| 1698 |
|
|
within a template. Since the advent of explicit template specification
|
| 1699 |
|
|
support in G++, if the name of the friend is an unqualified-id (i.e.,
|
| 1700 |
|
|
\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
|
| 1701 |
|
|
friend declare or define an ordinary, nontemplate function. (Section
|
| 1702 |
|
|
14.5.3). Before G++ implemented explicit specification, unqualified-ids
|
| 1703 |
|
|
could be interpreted as a particular specialization of a templatized
|
| 1704 |
|
|
function. Because this non-conforming behavior is no longer the default
|
| 1705 |
|
|
behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
|
| 1706 |
|
|
check existing code for potential trouble spots and is on by default.
|
| 1707 |
|
|
This new compiler behavior can be turned off with
|
| 1708 |
|
|
\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
|
| 1709 |
|
|
but disables the helpful warning.
|
| 1710 |
|
|
.IP "\fB\-Wold\-style\-cast\fR (\*(C+ only)" 4
|
| 1711 |
|
|
.IX Item "-Wold-style-cast ( only)"
|
| 1712 |
|
|
Warn if an old-style (C\-style) cast to a non-void type is used within
|
| 1713 |
|
|
a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
|
| 1714 |
|
|
\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
|
| 1715 |
|
|
less vulnerable to unintended effects and much easier to search for.
|
| 1716 |
|
|
.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ only)" 4
|
| 1717 |
|
|
.IX Item "-Woverloaded-virtual ( only)"
|
| 1718 |
|
|
Warn when a function declaration hides virtual functions from a
|
| 1719 |
|
|
base class. For example, in:
|
| 1720 |
|
|
.Sp
|
| 1721 |
|
|
.Vb 3
|
| 1722 |
|
|
\& struct A {
|
| 1723 |
|
|
\& virtual void f();
|
| 1724 |
|
|
\& };
|
| 1725 |
|
|
.Ve
|
| 1726 |
|
|
.Sp
|
| 1727 |
|
|
.Vb 3
|
| 1728 |
|
|
\& struct B: public A {
|
| 1729 |
|
|
\& void f(int);
|
| 1730 |
|
|
\& };
|
| 1731 |
|
|
.Ve
|
| 1732 |
|
|
.Sp
|
| 1733 |
|
|
the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
|
| 1734 |
|
|
like:
|
| 1735 |
|
|
.Sp
|
| 1736 |
|
|
.Vb 2
|
| 1737 |
|
|
\& B* b;
|
| 1738 |
|
|
\& b->f();
|
| 1739 |
|
|
.Ve
|
| 1740 |
|
|
.Sp
|
| 1741 |
|
|
will fail to compile.
|
| 1742 |
|
|
.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ only)" 4
|
| 1743 |
|
|
.IX Item "-Wno-pmf-conversions ( only)"
|
| 1744 |
|
|
Disable the diagnostic for converting a bound pointer to member function
|
| 1745 |
|
|
to a plain pointer.
|
| 1746 |
|
|
.IP "\fB\-Wsign\-promo\fR (\*(C+ only)" 4
|
| 1747 |
|
|
.IX Item "-Wsign-promo ( only)"
|
| 1748 |
|
|
Warn when overload resolution chooses a promotion from unsigned or
|
| 1749 |
|
|
enumerated type to a signed type, over a conversion to an unsigned type of
|
| 1750 |
|
|
the same size. Previous versions of G++ would try to preserve
|
| 1751 |
|
|
unsignedness, but the standard mandates the current behavior.
|
| 1752 |
|
|
.Sp
|
| 1753 |
|
|
.Vb 4
|
| 1754 |
|
|
\& struct A {
|
| 1755 |
|
|
\& operator int ();
|
| 1756 |
|
|
\& A& operator = (int);
|
| 1757 |
|
|
\& };
|
| 1758 |
|
|
.Ve
|
| 1759 |
|
|
.Sp
|
| 1760 |
|
|
.Vb 5
|
| 1761 |
|
|
\& main ()
|
| 1762 |
|
|
\& {
|
| 1763 |
|
|
\& A a,b;
|
| 1764 |
|
|
\& a = b;
|
| 1765 |
|
|
\& }
|
| 1766 |
|
|
.Ve
|
| 1767 |
|
|
.Sp
|
| 1768 |
|
|
In this example, G++ will synthesize a default \fBA& operator =
|
| 1769 |
|
|
(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
|
| 1770 |
|
|
.Sh "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
|
| 1771 |
|
|
.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
|
| 1772 |
|
|
(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
|
| 1773 |
|
|
languages themselves. See
|
| 1774 |
|
|
.PP
|
| 1775 |
|
|
This section describes the command-line options that are only meaningful
|
| 1776 |
|
|
for Objective-C and Objective\-\*(C+ programs, but you can also use most of
|
| 1777 |
|
|
the language-independent \s-1GNU\s0 compiler options.
|
| 1778 |
|
|
For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
|
| 1779 |
|
|
.PP
|
| 1780 |
|
|
.Vb 1
|
| 1781 |
|
|
\& gcc -g -fgnu-runtime -O -c some_class.m
|
| 1782 |
|
|
.Ve
|
| 1783 |
|
|
.PP
|
| 1784 |
|
|
In this example, \fB\-fgnu\-runtime\fR is an option meant only for
|
| 1785 |
|
|
Objective-C and Objective\-\*(C+ programs; you can use the other options with
|
| 1786 |
|
|
any language supported by \s-1GCC\s0.
|
| 1787 |
|
|
.PP
|
| 1788 |
|
|
Note that since Objective-C is an extension of the C language, Objective-C
|
| 1789 |
|
|
compilations may also use options specific to the C front-end (e.g.,
|
| 1790 |
|
|
\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
|
| 1791 |
|
|
\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
|
| 1792 |
|
|
.PP
|
| 1793 |
|
|
Here is a list of options that are \fIonly\fR for compiling Objective-C
|
| 1794 |
|
|
and Objective\-\*(C+ programs:
|
| 1795 |
|
|
.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
|
| 1796 |
|
|
.IX Item "-fconstant-string-class=class-name"
|
| 1797 |
|
|
Use \fIclass-name\fR as the name of the class to instantiate for each
|
| 1798 |
|
|
literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
|
| 1799 |
|
|
class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
|
| 1800 |
|
|
\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
|
| 1801 |
|
|
\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
|
| 1802 |
|
|
\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
|
| 1803 |
|
|
to be laid out as constant CoreFoundation strings.
|
| 1804 |
|
|
.IP "\fB\-fgnu\-runtime\fR" 4
|
| 1805 |
|
|
.IX Item "-fgnu-runtime"
|
| 1806 |
|
|
Generate object code compatible with the standard \s-1GNU\s0 Objective-C
|
| 1807 |
|
|
runtime. This is the default for most types of systems.
|
| 1808 |
|
|
.IP "\fB\-fnext\-runtime\fR" 4
|
| 1809 |
|
|
.IX Item "-fnext-runtime"
|
| 1810 |
|
|
Generate output compatible with the NeXT runtime. This is the default
|
| 1811 |
|
|
for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
|
| 1812 |
|
|
\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
|
| 1813 |
|
|
used.
|
| 1814 |
|
|
.IP "\fB\-fno\-nil\-receivers\fR" 4
|
| 1815 |
|
|
.IX Item "-fno-nil-receivers"
|
| 1816 |
|
|
Assume that all Objective-C message dispatches (e.g.,
|
| 1817 |
|
|
\&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
|
| 1818 |
|
|
is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
|
| 1819 |
|
|
to be used. Currently, this option is only available in conjunction with
|
| 1820 |
|
|
the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
|
| 1821 |
|
|
.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
|
| 1822 |
|
|
.IX Item "-fobjc-call-cxx-cdtors"
|
| 1823 |
|
|
For each Objective-C class, check if any of its instance variables is a
|
| 1824 |
|
|
\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
|
| 1825 |
|
|
special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
|
| 1826 |
|
|
non-trivial default constructors on any such instance variables, in order,
|
| 1827 |
|
|
and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
|
| 1828 |
|
|
is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
|
| 1829 |
|
|
special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
|
| 1830 |
|
|
all such default destructors, in reverse order.
|
| 1831 |
|
|
.Sp
|
| 1832 |
|
|
The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
|
| 1833 |
|
|
thusly generated will only operate on instance variables declared in the
|
| 1834 |
|
|
current Objective-C class, and not those inherited from superclasses. It
|
| 1835 |
|
|
is the responsibility of the Objective-C runtime to invoke all such methods
|
| 1836 |
|
|
in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
|
| 1837 |
|
|
will be invoked by the runtime immediately after a new object
|
| 1838 |
|
|
instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
|
| 1839 |
|
|
be invoked immediately before the runtime deallocates an object instance.
|
| 1840 |
|
|
.Sp
|
| 1841 |
|
|
As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
|
| 1842 |
|
|
support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
|
| 1843 |
|
|
\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
|
| 1844 |
|
|
.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
|
| 1845 |
|
|
.IX Item "-fobjc-direct-dispatch"
|
| 1846 |
|
|
Allow fast jumps to the message dispatcher. On Darwin this is
|
| 1847 |
|
|
accomplished via the comm page.
|
| 1848 |
|
|
.IP "\fB\-fobjc\-exceptions\fR" 4
|
| 1849 |
|
|
.IX Item "-fobjc-exceptions"
|
| 1850 |
|
|
Enable syntactic support for structured exception handling in Objective\-C,
|
| 1851 |
|
|
similar to what is offered by \*(C+ and Java. Currently, this option is only
|
| 1852 |
|
|
available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
|
| 1853 |
|
|
.Sp
|
| 1854 |
|
|
.Vb 23
|
| 1855 |
|
|
\& @try {
|
| 1856 |
|
|
\& ...
|
| 1857 |
|
|
\& @throw expr;
|
| 1858 |
|
|
\& ...
|
| 1859 |
|
|
\& }
|
| 1860 |
|
|
\& @catch (AnObjCClass *exc) {
|
| 1861 |
|
|
\& ...
|
| 1862 |
|
|
\& @throw expr;
|
| 1863 |
|
|
\& ...
|
| 1864 |
|
|
\& @throw;
|
| 1865 |
|
|
\& ...
|
| 1866 |
|
|
\& }
|
| 1867 |
|
|
\& @catch (AnotherClass *exc) {
|
| 1868 |
|
|
\& ...
|
| 1869 |
|
|
\& }
|
| 1870 |
|
|
\& @catch (id allOthers) {
|
| 1871 |
|
|
\& ...
|
| 1872 |
|
|
\& }
|
| 1873 |
|
|
\& @finally {
|
| 1874 |
|
|
\& ...
|
| 1875 |
|
|
\& @throw expr;
|
| 1876 |
|
|
\& ...
|
| 1877 |
|
|
\& }
|
| 1878 |
|
|
.Ve
|
| 1879 |
|
|
.Sp
|
| 1880 |
|
|
The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
|
| 1881 |
|
|
Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
|
| 1882 |
|
|
\&\f(CW@throw\fR may appear without an argument (as shown above), in which case
|
| 1883 |
|
|
the object caught by the \f(CW@catch\fR will be rethrown.
|
| 1884 |
|
|
.Sp
|
| 1885 |
|
|
Note that only (pointers to) Objective-C objects may be thrown and
|
| 1886 |
|
|
caught using this scheme. When an object is thrown, it will be caught
|
| 1887 |
|
|
by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
|
| 1888 |
|
|
analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
|
| 1889 |
|
|
\&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
|
| 1890 |
|
|
any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
|
| 1891 |
|
|
clauses (if any).
|
| 1892 |
|
|
.Sp
|
| 1893 |
|
|
The \f(CW@finally\fR clause, if present, will be executed upon exit from the
|
| 1894 |
|
|
immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
|
| 1895 |
|
|
regardless of whether any exceptions are thrown, caught or rethrown
|
| 1896 |
|
|
inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
|
| 1897 |
|
|
of the \f(CW\*(C`finally\*(C'\fR clause in Java.
|
| 1898 |
|
|
.Sp
|
| 1899 |
|
|
There are several caveats to using the new exception mechanism:
|
| 1900 |
|
|
.RS 4
|
| 1901 |
|
|
.IP "*" 4
|
| 1902 |
|
|
Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
|
| 1903 |
|
|
idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
|
| 1904 |
|
|
exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
|
| 1905 |
|
|
systems, due to additional functionality needed in the (NeXT) Objective-C
|
| 1906 |
|
|
runtime.
|
| 1907 |
|
|
.IP "*" 4
|
| 1908 |
|
|
As mentioned above, the new exceptions do not support handling
|
| 1909 |
|
|
types other than Objective-C objects. Furthermore, when used from
|
| 1910 |
|
|
Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
|
| 1911 |
|
|
exceptions at this time. This means you cannot \f(CW@throw\fR an exception
|
| 1912 |
|
|
from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
|
| 1913 |
|
|
(i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
|
| 1914 |
|
|
.RE
|
| 1915 |
|
|
.RS 4
|
| 1916 |
|
|
.Sp
|
| 1917 |
|
|
The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
|
| 1918 |
|
|
blocks for thread-safe execution:
|
| 1919 |
|
|
.Sp
|
| 1920 |
|
|
.Vb 3
|
| 1921 |
|
|
\& @synchronized (ObjCClass *guard) {
|
| 1922 |
|
|
\& ...
|
| 1923 |
|
|
\& }
|
| 1924 |
|
|
.Ve
|
| 1925 |
|
|
.Sp
|
| 1926 |
|
|
Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
|
| 1927 |
|
|
first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
|
| 1928 |
|
|
object by another thread. If it has, the current thread shall wait until
|
| 1929 |
|
|
the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
|
| 1930 |
|
|
the current thread will place its own lock on it, execute the code contained in
|
| 1931 |
|
|
the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
|
| 1932 |
|
|
making \f(CW\*(C`guard\*(C'\fR available to other threads).
|
| 1933 |
|
|
.Sp
|
| 1934 |
|
|
Unlike Java, Objective-C does not allow for entire methods to be marked
|
| 1935 |
|
|
\&\f(CW@synchronized\fR. Note that throwing exceptions out of
|
| 1936 |
|
|
\&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
|
| 1937 |
|
|
to be unlocked properly.
|
| 1938 |
|
|
.RE
|
| 1939 |
|
|
.IP "\fB\-fobjc\-gc\fR" 4
|
| 1940 |
|
|
.IX Item "-fobjc-gc"
|
| 1941 |
|
|
Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
|
| 1942 |
|
|
.IP "\fB\-freplace\-objc\-classes\fR" 4
|
| 1943 |
|
|
.IX Item "-freplace-objc-classes"
|
| 1944 |
|
|
Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
|
| 1945 |
|
|
the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
|
| 1946 |
|
|
run time instead. This is used in conjunction with the Fix-and-Continue
|
| 1947 |
|
|
debugging mode, where the object file in question may be recompiled and
|
| 1948 |
|
|
dynamically reloaded in the course of program execution, without the need
|
| 1949 |
|
|
to restart the program itself. Currently, Fix-and-Continue functionality
|
| 1950 |
|
|
is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
|
| 1951 |
|
|
and later.
|
| 1952 |
|
|
.IP "\fB\-fzero\-link\fR" 4
|
| 1953 |
|
|
.IX Item "-fzero-link"
|
| 1954 |
|
|
When compiling for the NeXT runtime, the compiler ordinarily replaces calls
|
| 1955 |
|
|
to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
|
| 1956 |
|
|
compile time) with static class references that get initialized at load time,
|
| 1957 |
|
|
which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
|
| 1958 |
|
|
suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
|
| 1959 |
|
|
to be retained. This is useful in Zero-Link debugging mode, since it allows
|
| 1960 |
|
|
for individual class implementations to be modified during program execution.
|
| 1961 |
|
|
.IP "\fB\-gen\-decls\fR" 4
|
| 1962 |
|
|
.IX Item "-gen-decls"
|
| 1963 |
|
|
Dump interface declarations for all classes seen in the source file to a
|
| 1964 |
|
|
file named \fI\fIsourcename\fI.decl\fR.
|
| 1965 |
|
|
.IP "\fB\-Wassign\-intercept\fR" 4
|
| 1966 |
|
|
.IX Item "-Wassign-intercept"
|
| 1967 |
|
|
Warn whenever an Objective-C assignment is being intercepted by the
|
| 1968 |
|
|
garbage collector.
|
| 1969 |
|
|
.IP "\fB\-Wno\-protocol\fR" 4
|
| 1970 |
|
|
.IX Item "-Wno-protocol"
|
| 1971 |
|
|
If a class is declared to implement a protocol, a warning is issued for
|
| 1972 |
|
|
every method in the protocol that is not implemented by the class. The
|
| 1973 |
|
|
default behavior is to issue a warning for every method not explicitly
|
| 1974 |
|
|
implemented in the class, even if a method implementation is inherited
|
| 1975 |
|
|
from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
|
| 1976 |
|
|
methods inherited from the superclass are considered to be implemented,
|
| 1977 |
|
|
and no warning is issued for them.
|
| 1978 |
|
|
.IP "\fB\-Wselector\fR" 4
|
| 1979 |
|
|
.IX Item "-Wselector"
|
| 1980 |
|
|
Warn if multiple methods of different types for the same selector are
|
| 1981 |
|
|
found during compilation. The check is performed on the list of methods
|
| 1982 |
|
|
in the final stage of compilation. Additionally, a check is performed
|
| 1983 |
|
|
for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
|
| 1984 |
|
|
expression, and a corresponding method for that selector has been found
|
| 1985 |
|
|
during compilation. Because these checks scan the method table only at
|
| 1986 |
|
|
the end of compilation, these warnings are not produced if the final
|
| 1987 |
|
|
stage of compilation is not reached, for example because an error is
|
| 1988 |
|
|
found during compilation, or because the \fB\-fsyntax\-only\fR option is
|
| 1989 |
|
|
being used.
|
| 1990 |
|
|
.IP "\fB\-Wstrict\-selector\-match\fR" 4
|
| 1991 |
|
|
.IX Item "-Wstrict-selector-match"
|
| 1992 |
|
|
Warn if multiple methods with differing argument and/or return types are
|
| 1993 |
|
|
found for a given selector when attempting to send a message using this
|
| 1994 |
|
|
selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
|
| 1995 |
|
|
is off (which is the default behavior), the compiler will omit such warnings
|
| 1996 |
|
|
if any differences found are confined to types which share the same size
|
| 1997 |
|
|
and alignment.
|
| 1998 |
|
|
.IP "\fB\-Wundeclared\-selector\fR" 4
|
| 1999 |
|
|
.IX Item "-Wundeclared-selector"
|
| 2000 |
|
|
Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
|
| 2001 |
|
|
undeclared selector is found. A selector is considered undeclared if no
|
| 2002 |
|
|
method with that name has been declared before the
|
| 2003 |
|
|
\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
|
| 2004 |
|
|
\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
|
| 2005 |
|
|
an \f(CW@implementation\fR section. This option always performs its
|
| 2006 |
|
|
checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
|
| 2007 |
|
|
while \fB\-Wselector\fR only performs its checks in the final stage of
|
| 2008 |
|
|
compilation. This also enforces the coding style convention
|
| 2009 |
|
|
that methods and selectors must be declared before being used.
|
| 2010 |
|
|
.IP "\fB\-print\-objc\-runtime\-info\fR" 4
|
| 2011 |
|
|
.IX Item "-print-objc-runtime-info"
|
| 2012 |
|
|
Generate C header describing the largest structure that is passed by
|
| 2013 |
|
|
value, if any.
|
| 2014 |
|
|
.Sh "Options to Control Diagnostic Messages Formatting"
|
| 2015 |
|
|
.IX Subsection "Options to Control Diagnostic Messages Formatting"
|
| 2016 |
|
|
Traditionally, diagnostic messages have been formatted irrespective of
|
| 2017 |
|
|
the output device's aspect (e.g. its width, ...). The options described
|
| 2018 |
|
|
below can be used to control the diagnostic messages formatting
|
| 2019 |
|
|
algorithm, e.g. how many characters per line, how often source location
|
| 2020 |
|
|
information should be reported. Right now, only the \*(C+ front end can
|
| 2021 |
|
|
honor these options. However it is expected, in the near future, that
|
| 2022 |
|
|
the remaining front ends would be able to digest them correctly.
|
| 2023 |
|
|
.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
|
| 2024 |
|
|
.IX Item "-fmessage-length=n"
|
| 2025 |
|
|
Try to format error messages so that they fit on lines of about \fIn\fR
|
| 2026 |
|
|
characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
|
| 2027 |
|
|
the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
|
| 2028 |
|
|
line-wrapping will be done; each error message will appear on a single
|
| 2029 |
|
|
line.
|
| 2030 |
|
|
.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
|
| 2031 |
|
|
.IX Item "-fdiagnostics-show-location=once"
|
| 2032 |
|
|
Only meaningful in line-wrapping mode. Instructs the diagnostic messages
|
| 2033 |
|
|
reporter to emit \fIonce\fR source location information; that is, in
|
| 2034 |
|
|
case the message is too long to fit on a single physical line and has to
|
| 2035 |
|
|
be wrapped, the source location won't be emitted (as prefix) again,
|
| 2036 |
|
|
over and over, in subsequent continuation lines. This is the default
|
| 2037 |
|
|
behavior.
|
| 2038 |
|
|
.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
|
| 2039 |
|
|
.IX Item "-fdiagnostics-show-location=every-line"
|
| 2040 |
|
|
Only meaningful in line-wrapping mode. Instructs the diagnostic
|
| 2041 |
|
|
messages reporter to emit the same source location information (as
|
| 2042 |
|
|
prefix) for physical lines that result from the process of breaking
|
| 2043 |
|
|
a message which is too long to fit on a single line.
|
| 2044 |
|
|
.IP "\fB\-fdiagnostics\-show\-options\fR" 4
|
| 2045 |
|
|
.IX Item "-fdiagnostics-show-options"
|
| 2046 |
|
|
This option instructs the diagnostic machinery to add text to each
|
| 2047 |
|
|
diagnostic emitted, which indicates which command line option directly
|
| 2048 |
|
|
controls that diagnostic, when such an option is known to the
|
| 2049 |
|
|
diagnostic machinery.
|
| 2050 |
|
|
.Sh "Options to Request or Suppress Warnings"
|
| 2051 |
|
|
.IX Subsection "Options to Request or Suppress Warnings"
|
| 2052 |
|
|
Warnings are diagnostic messages that report constructions which
|
| 2053 |
|
|
are not inherently erroneous but which are risky or suggest there
|
| 2054 |
|
|
may have been an error.
|
| 2055 |
|
|
.PP
|
| 2056 |
|
|
You can request many specific warnings with options beginning \fB\-W\fR,
|
| 2057 |
|
|
for example \fB\-Wimplicit\fR to request warnings on implicit
|
| 2058 |
|
|
declarations. Each of these specific warning options also has a
|
| 2059 |
|
|
negative form beginning \fB\-Wno\-\fR to turn off warnings;
|
| 2060 |
|
|
for example, \fB\-Wno\-implicit\fR. This manual lists only one of the
|
| 2061 |
|
|
two forms, whichever is not the default.
|
| 2062 |
|
|
.PP
|
| 2063 |
|
|
The following options control the amount and kinds of warnings produced
|
| 2064 |
|
|
by \s-1GCC\s0; for further, language-specific options also refer to
|
| 2065 |
|
|
\&\fB\*(C+ Dialect Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect
|
| 2066 |
|
|
Options\fR.
|
| 2067 |
|
|
.IP "\fB\-fsyntax\-only\fR" 4
|
| 2068 |
|
|
.IX Item "-fsyntax-only"
|
| 2069 |
|
|
Check the code for syntax errors, but don't do anything beyond that.
|
| 2070 |
|
|
.IP "\fB\-pedantic\fR" 4
|
| 2071 |
|
|
.IX Item "-pedantic"
|
| 2072 |
|
|
Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
|
| 2073 |
|
|
reject all programs that use forbidden extensions, and some other
|
| 2074 |
|
|
programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
|
| 2075 |
|
|
version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
|
| 2076 |
|
|
.Sp
|
| 2077 |
|
|
Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
|
| 2078 |
|
|
this option (though a rare few will require \fB\-ansi\fR or a
|
| 2079 |
|
|
\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
|
| 2080 |
|
|
without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
|
| 2081 |
|
|
features are supported as well. With this option, they are rejected.
|
| 2082 |
|
|
.Sp
|
| 2083 |
|
|
\&\fB\-pedantic\fR does not cause warning messages for use of the
|
| 2084 |
|
|
alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
|
| 2085 |
|
|
warnings are also disabled in the expression that follows
|
| 2086 |
|
|
\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
|
| 2087 |
|
|
these escape routes; application programs should avoid them.
|
| 2088 |
|
|
.Sp
|
| 2089 |
|
|
Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
|
| 2090 |
|
|
C conformance. They soon find that it does not do quite what they want:
|
| 2091 |
|
|
it finds some non-ISO practices, but not all\-\-\-only those for which
|
| 2092 |
|
|
\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
|
| 2093 |
|
|
diagnostics have been added.
|
| 2094 |
|
|
.Sp
|
| 2095 |
|
|
A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
|
| 2096 |
|
|
some instances, but would require considerable additional work and would
|
| 2097 |
|
|
be quite different from \fB\-pedantic\fR. We don't have plans to
|
| 2098 |
|
|
support such a feature in the near future.
|
| 2099 |
|
|
.Sp
|
| 2100 |
|
|
Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
|
| 2101 |
|
|
extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
|
| 2102 |
|
|
corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
|
| 2103 |
|
|
extended dialect is based. Warnings from \fB\-pedantic\fR are given
|
| 2104 |
|
|
where they are required by the base standard. (It would not make sense
|
| 2105 |
|
|
for such warnings to be given only for features not in the specified \s-1GNU\s0
|
| 2106 |
|
|
C dialect, since by definition the \s-1GNU\s0 dialects of C include all
|
| 2107 |
|
|
features the compiler supports with the given option, and there would be
|
| 2108 |
|
|
nothing to warn about.)
|
| 2109 |
|
|
.IP "\fB\-pedantic\-errors\fR" 4
|
| 2110 |
|
|
.IX Item "-pedantic-errors"
|
| 2111 |
|
|
Like \fB\-pedantic\fR, except that errors are produced rather than
|
| 2112 |
|
|
warnings.
|
| 2113 |
|
|
.IP "\fB\-w\fR" 4
|
| 2114 |
|
|
.IX Item "-w"
|
| 2115 |
|
|
Inhibit all warning messages.
|
| 2116 |
|
|
.IP "\fB\-Wno\-import\fR" 4
|
| 2117 |
|
|
.IX Item "-Wno-import"
|
| 2118 |
|
|
Inhibit warning messages about the use of \fB#import\fR.
|
| 2119 |
|
|
.IP "\fB\-Wchar\-subscripts\fR" 4
|
| 2120 |
|
|
.IX Item "-Wchar-subscripts"
|
| 2121 |
|
|
Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
|
| 2122 |
|
|
of error, as programmers often forget that this type is signed on some
|
| 2123 |
|
|
machines.
|
| 2124 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2125 |
|
|
.IP "\fB\-Wcomment\fR" 4
|
| 2126 |
|
|
.IX Item "-Wcomment"
|
| 2127 |
|
|
Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
|
| 2128 |
|
|
comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
|
| 2129 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2130 |
|
|
.IP "\fB\-Wfatal\-errors\fR" 4
|
| 2131 |
|
|
.IX Item "-Wfatal-errors"
|
| 2132 |
|
|
This option causes the compiler to abort compilation on the first error
|
| 2133 |
|
|
occurred rather than trying to keep going and printing further error
|
| 2134 |
|
|
messages.
|
| 2135 |
|
|
.IP "\fB\-Wformat\fR" 4
|
| 2136 |
|
|
.IX Item "-Wformat"
|
| 2137 |
|
|
Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
|
| 2138 |
|
|
the arguments supplied have types appropriate to the format string
|
| 2139 |
|
|
specified, and that the conversions specified in the format string make
|
| 2140 |
|
|
sense. This includes standard functions, and others specified by format
|
| 2141 |
|
|
attributes, in the \f(CW\*(C`printf\*(C'\fR,
|
| 2142 |
|
|
\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
|
| 2143 |
|
|
not in the C standard) families (or other target-specific families).
|
| 2144 |
|
|
Which functions are checked without format attributes having been
|
| 2145 |
|
|
specified depends on the standard version selected, and such checks of
|
| 2146 |
|
|
functions without the attribute specified are disabled by
|
| 2147 |
|
|
\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
|
| 2148 |
|
|
.Sp
|
| 2149 |
|
|
The formats are checked against the format features supported by \s-1GNU\s0
|
| 2150 |
|
|
libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
|
| 2151 |
|
|
as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
|
| 2152 |
|
|
extensions. Other library implementations may not support all these
|
| 2153 |
|
|
features; \s-1GCC\s0 does not support warning about features that go beyond a
|
| 2154 |
|
|
particular library's limitations. However, if \fB\-pedantic\fR is used
|
| 2155 |
|
|
with \fB\-Wformat\fR, warnings will be given about format features not
|
| 2156 |
|
|
in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
|
| 2157 |
|
|
since those are not in any version of the C standard).
|
| 2158 |
|
|
.Sp
|
| 2159 |
|
|
Since \fB\-Wformat\fR also checks for null format arguments for
|
| 2160 |
|
|
several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
|
| 2161 |
|
|
.Sp
|
| 2162 |
|
|
\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
|
| 2163 |
|
|
aspects of format checking, the options \fB\-Wformat\-y2k\fR,
|
| 2164 |
|
|
\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
|
| 2165 |
|
|
\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
|
| 2166 |
|
|
\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
|
| 2167 |
|
|
.IP "\fB\-Wformat\-y2k\fR" 4
|
| 2168 |
|
|
.IX Item "-Wformat-y2k"
|
| 2169 |
|
|
If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
|
| 2170 |
|
|
formats which may yield only a two-digit year.
|
| 2171 |
|
|
.IP "\fB\-Wno\-format\-extra\-args\fR" 4
|
| 2172 |
|
|
.IX Item "-Wno-format-extra-args"
|
| 2173 |
|
|
If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
|
| 2174 |
|
|
\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
|
| 2175 |
|
|
that such arguments are ignored.
|
| 2176 |
|
|
.Sp
|
| 2177 |
|
|
Where the unused arguments lie between used arguments that are
|
| 2178 |
|
|
specified with \fB$\fR operand number specifications, normally
|
| 2179 |
|
|
warnings are still given, since the implementation could not know what
|
| 2180 |
|
|
type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
|
| 2181 |
|
|
in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
|
| 2182 |
|
|
warning if the unused arguments are all pointers, since the Single
|
| 2183 |
|
|
Unix Specification says that such unused arguments are allowed.
|
| 2184 |
|
|
.IP "\fB\-Wno\-format\-zero\-length\fR" 4
|
| 2185 |
|
|
.IX Item "-Wno-format-zero-length"
|
| 2186 |
|
|
If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
|
| 2187 |
|
|
The C standard specifies that zero-length formats are allowed.
|
| 2188 |
|
|
.IP "\fB\-Wformat\-nonliteral\fR" 4
|
| 2189 |
|
|
.IX Item "-Wformat-nonliteral"
|
| 2190 |
|
|
If \fB\-Wformat\fR is specified, also warn if the format string is not a
|
| 2191 |
|
|
string literal and so cannot be checked, unless the format function
|
| 2192 |
|
|
takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
|
| 2193 |
|
|
.IP "\fB\-Wformat\-security\fR" 4
|
| 2194 |
|
|
.IX Item "-Wformat-security"
|
| 2195 |
|
|
If \fB\-Wformat\fR is specified, also warn about uses of format
|
| 2196 |
|
|
functions that represent possible security problems. At present, this
|
| 2197 |
|
|
warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
|
| 2198 |
|
|
format string is not a string literal and there are no format arguments,
|
| 2199 |
|
|
as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
|
| 2200 |
|
|
string came from untrusted input and contains \fB%n\fR. (This is
|
| 2201 |
|
|
currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
|
| 2202 |
|
|
in future warnings may be added to \fB\-Wformat\-security\fR that are not
|
| 2203 |
|
|
included in \fB\-Wformat\-nonliteral\fR.)
|
| 2204 |
|
|
.IP "\fB\-Wformat=2\fR" 4
|
| 2205 |
|
|
.IX Item "-Wformat=2"
|
| 2206 |
|
|
Enable \fB\-Wformat\fR plus format checks not included in
|
| 2207 |
|
|
\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
|
| 2208 |
|
|
\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
|
| 2209 |
|
|
.IP "\fB\-Wnonnull\fR" 4
|
| 2210 |
|
|
.IX Item "-Wnonnull"
|
| 2211 |
|
|
Warn about passing a null pointer for arguments marked as
|
| 2212 |
|
|
requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
|
| 2213 |
|
|
.Sp
|
| 2214 |
|
|
\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
|
| 2215 |
|
|
can be disabled with the \fB\-Wno\-nonnull\fR option.
|
| 2216 |
|
|
.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
|
| 2217 |
|
|
.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
|
| 2218 |
|
|
Warn about uninitialized variables which are initialized with themselves.
|
| 2219 |
|
|
Note this option can only be used with the \fB\-Wuninitialized\fR option,
|
| 2220 |
|
|
which in turn only works with \fB\-O1\fR and above.
|
| 2221 |
|
|
.Sp
|
| 2222 |
|
|
For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
|
| 2223 |
|
|
following snippet only when \fB\-Winit\-self\fR has been specified:
|
| 2224 |
|
|
.Sp
|
| 2225 |
|
|
.Vb 5
|
| 2226 |
|
|
\& int f()
|
| 2227 |
|
|
\& {
|
| 2228 |
|
|
\& int i = i;
|
| 2229 |
|
|
\& return i;
|
| 2230 |
|
|
\& }
|
| 2231 |
|
|
.Ve
|
| 2232 |
|
|
.IP "\fB\-Wimplicit\-int\fR" 4
|
| 2233 |
|
|
.IX Item "-Wimplicit-int"
|
| 2234 |
|
|
Warn when a declaration does not specify a type.
|
| 2235 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2236 |
|
|
.IP "\fB\-Wimplicit\-function\-declaration\fR" 4
|
| 2237 |
|
|
.IX Item "-Wimplicit-function-declaration"
|
| 2238 |
|
|
.PD 0
|
| 2239 |
|
|
.IP "\fB\-Werror\-implicit\-function\-declaration\fR" 4
|
| 2240 |
|
|
.IX Item "-Werror-implicit-function-declaration"
|
| 2241 |
|
|
.PD
|
| 2242 |
|
|
Give a warning (or error) whenever a function is used before being
|
| 2243 |
|
|
declared. The form \fB\-Wno\-error\-implicit\-function\-declaration\fR
|
| 2244 |
|
|
is not supported.
|
| 2245 |
|
|
This warning is enabled by \fB\-Wall\fR (as a warning, not an error).
|
| 2246 |
|
|
.IP "\fB\-Wimplicit\fR" 4
|
| 2247 |
|
|
.IX Item "-Wimplicit"
|
| 2248 |
|
|
Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
|
| 2249 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2250 |
|
|
.IP "\fB\-Wmain\fR" 4
|
| 2251 |
|
|
.IX Item "-Wmain"
|
| 2252 |
|
|
Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a
|
| 2253 |
|
|
function with external linkage, returning int, taking either zero
|
| 2254 |
|
|
arguments, two, or three arguments of appropriate types.
|
| 2255 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2256 |
|
|
.IP "\fB\-Wmissing\-braces\fR" 4
|
| 2257 |
|
|
.IX Item "-Wmissing-braces"
|
| 2258 |
|
|
Warn if an aggregate or union initializer is not fully bracketed. In
|
| 2259 |
|
|
the following example, the initializer for \fBa\fR is not fully
|
| 2260 |
|
|
bracketed, but that for \fBb\fR is fully bracketed.
|
| 2261 |
|
|
.Sp
|
| 2262 |
|
|
.Vb 2
|
| 2263 |
|
|
\& int a[2][2] = { 0, 1, 2, 3 };
|
| 2264 |
|
|
\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
|
| 2265 |
|
|
.Ve
|
| 2266 |
|
|
.Sp
|
| 2267 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2268 |
|
|
.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
|
| 2269 |
|
|
.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
|
| 2270 |
|
|
Warn if a user-supplied include directory does not exist.
|
| 2271 |
|
|
.IP "\fB\-Wparentheses\fR" 4
|
| 2272 |
|
|
.IX Item "-Wparentheses"
|
| 2273 |
|
|
Warn if parentheses are omitted in certain contexts, such
|
| 2274 |
|
|
as when there is an assignment in a context where a truth value
|
| 2275 |
|
|
is expected, or when operators are nested whose precedence people
|
| 2276 |
|
|
often get confused about. Only the warning for an assignment used as
|
| 2277 |
|
|
a truth value is supported when compiling \*(C+; the other warnings are
|
| 2278 |
|
|
only supported when compiling C.
|
| 2279 |
|
|
.Sp
|
| 2280 |
|
|
Also warn if a comparison like \fBx<=y<=z\fR appears; this is
|
| 2281 |
|
|
equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
|
| 2282 |
|
|
interpretation from that of ordinary mathematical notation.
|
| 2283 |
|
|
.Sp
|
| 2284 |
|
|
Also warn about constructions where there may be confusion to which
|
| 2285 |
|
|
\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
|
| 2286 |
|
|
such a case:
|
| 2287 |
|
|
.Sp
|
| 2288 |
|
|
.Vb 7
|
| 2289 |
|
|
\& {
|
| 2290 |
|
|
\& if (a)
|
| 2291 |
|
|
\& if (b)
|
| 2292 |
|
|
\& foo ();
|
| 2293 |
|
|
\& else
|
| 2294 |
|
|
\& bar ();
|
| 2295 |
|
|
\& }
|
| 2296 |
|
|
.Ve
|
| 2297 |
|
|
.Sp
|
| 2298 |
|
|
In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR
|
| 2299 |
|
|
statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is often not
|
| 2300 |
|
|
what the programmer expected, as illustrated in the above example by
|
| 2301 |
|
|
indentation the programmer chose. When there is the potential for this
|
| 2302 |
|
|
confusion, \s-1GCC\s0 will issue a warning when this flag is specified.
|
| 2303 |
|
|
To eliminate the warning, add explicit braces around the innermost
|
| 2304 |
|
|
\&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to
|
| 2305 |
|
|
the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would look like this:
|
| 2306 |
|
|
.Sp
|
| 2307 |
|
|
.Vb 9
|
| 2308 |
|
|
\& {
|
| 2309 |
|
|
\& if (a)
|
| 2310 |
|
|
\& {
|
| 2311 |
|
|
\& if (b)
|
| 2312 |
|
|
\& foo ();
|
| 2313 |
|
|
\& else
|
| 2314 |
|
|
\& bar ();
|
| 2315 |
|
|
\& }
|
| 2316 |
|
|
\& }
|
| 2317 |
|
|
.Ve
|
| 2318 |
|
|
.Sp
|
| 2319 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2320 |
|
|
.IP "\fB\-Wsequence\-point\fR" 4
|
| 2321 |
|
|
.IX Item "-Wsequence-point"
|
| 2322 |
|
|
Warn about code that may have undefined semantics because of violations
|
| 2323 |
|
|
of sequence point rules in the C standard.
|
| 2324 |
|
|
.Sp
|
| 2325 |
|
|
The C standard defines the order in which expressions in a C program are
|
| 2326 |
|
|
evaluated in terms of \fIsequence points\fR, which represent a partial
|
| 2327 |
|
|
ordering between the execution of parts of the program: those executed
|
| 2328 |
|
|
before the sequence point, and those executed after it. These occur
|
| 2329 |
|
|
after the evaluation of a full expression (one which is not part of a
|
| 2330 |
|
|
larger expression), after the evaluation of the first operand of a
|
| 2331 |
|
|
\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
|
| 2332 |
|
|
function is called (but after the evaluation of its arguments and the
|
| 2333 |
|
|
expression denoting the called function), and in certain other places.
|
| 2334 |
|
|
Other than as expressed by the sequence point rules, the order of
|
| 2335 |
|
|
evaluation of subexpressions of an expression is not specified. All
|
| 2336 |
|
|
these rules describe only a partial order rather than a total order,
|
| 2337 |
|
|
since, for example, if two functions are called within one expression
|
| 2338 |
|
|
with no sequence point between them, the order in which the functions
|
| 2339 |
|
|
are called is not specified. However, the standards committee have
|
| 2340 |
|
|
ruled that function calls do not overlap.
|
| 2341 |
|
|
.Sp
|
| 2342 |
|
|
It is not specified when between sequence points modifications to the
|
| 2343 |
|
|
values of objects take effect. Programs whose behavior depends on this
|
| 2344 |
|
|
have undefined behavior; the C standard specifies that \*(L"Between the
|
| 2345 |
|
|
previous and next sequence point an object shall have its stored value
|
| 2346 |
|
|
modified at most once by the evaluation of an expression. Furthermore,
|
| 2347 |
|
|
the prior value shall be read only to determine the value to be
|
| 2348 |
|
|
stored.\*(R". If a program breaks these rules, the results on any
|
| 2349 |
|
|
particular implementation are entirely unpredictable.
|
| 2350 |
|
|
.Sp
|
| 2351 |
|
|
Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
|
| 2352 |
|
|
= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
|
| 2353 |
|
|
diagnosed by this option, and it may give an occasional false positive
|
| 2354 |
|
|
result, but in general it has been found fairly effective at detecting
|
| 2355 |
|
|
this sort of problem in programs.
|
| 2356 |
|
|
.Sp
|
| 2357 |
|
|
The present implementation of this option only works for C programs. A
|
| 2358 |
|
|
future implementation may also work for \*(C+ programs.
|
| 2359 |
|
|
.Sp
|
| 2360 |
|
|
The C standard is worded confusingly, therefore there is some debate
|
| 2361 |
|
|
over the precise meaning of the sequence point rules in subtle cases.
|
| 2362 |
|
|
Links to discussions of the problem, including proposed formal
|
| 2363 |
|
|
definitions, may be found on the \s-1GCC\s0 readings page, at
|
| 2364 |
|
|
<\fBhttp://gcc.gnu.org/readings.html\fR>.
|
| 2365 |
|
|
.Sp
|
| 2366 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2367 |
|
|
.IP "\fB\-Wreturn\-type\fR" 4
|
| 2368 |
|
|
.IX Item "-Wreturn-type"
|
| 2369 |
|
|
Warn whenever a function is defined with a return-type that defaults to
|
| 2370 |
|
|
\&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
|
| 2371 |
|
|
return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR.
|
| 2372 |
|
|
.Sp
|
| 2373 |
|
|
For C, also warn if the return type of a function has a type qualifier
|
| 2374 |
|
|
such as \f(CW\*(C`const\*(C'\fR. Such a type qualifier has no effect, since the
|
| 2375 |
|
|
value returned by a function is not an lvalue. \s-1ISO\s0 C prohibits
|
| 2376 |
|
|
qualified \f(CW\*(C`void\*(C'\fR return types on function definitions, so such
|
| 2377 |
|
|
return types always receive a warning even without this option.
|
| 2378 |
|
|
.Sp
|
| 2379 |
|
|
For \*(C+, a function without return type always produces a diagnostic
|
| 2380 |
|
|
message, even when \fB\-Wno\-return\-type\fR is specified. The only
|
| 2381 |
|
|
exceptions are \fBmain\fR and functions defined in system headers.
|
| 2382 |
|
|
.Sp
|
| 2383 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2384 |
|
|
.IP "\fB\-Wswitch\fR" 4
|
| 2385 |
|
|
.IX Item "-Wswitch"
|
| 2386 |
|
|
Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
|
| 2387 |
|
|
and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
|
| 2388 |
|
|
enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
|
| 2389 |
|
|
warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
|
| 2390 |
|
|
provoke warnings when this option is used.
|
| 2391 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2392 |
|
|
.IP "\fB\-Wswitch\-default\fR" 4
|
| 2393 |
|
|
.IX Item "-Wswitch-default"
|
| 2394 |
|
|
Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
|
| 2395 |
|
|
case.
|
| 2396 |
|
|
.IP "\fB\-Wswitch\-enum\fR" 4
|
| 2397 |
|
|
.IX Item "-Wswitch-enum"
|
| 2398 |
|
|
Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
|
| 2399 |
|
|
and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
|
| 2400 |
|
|
enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
|
| 2401 |
|
|
provoke warnings when this option is used.
|
| 2402 |
|
|
.IP "\fB\-Wtrigraphs\fR" 4
|
| 2403 |
|
|
.IX Item "-Wtrigraphs"
|
| 2404 |
|
|
Warn if any trigraphs are encountered that might change the meaning of
|
| 2405 |
|
|
the program (trigraphs within comments are not warned about).
|
| 2406 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2407 |
|
|
.IP "\fB\-Wunused\-function\fR" 4
|
| 2408 |
|
|
.IX Item "-Wunused-function"
|
| 2409 |
|
|
Warn whenever a static function is declared but not defined or a
|
| 2410 |
|
|
non-inline static function is unused.
|
| 2411 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2412 |
|
|
.IP "\fB\-Wunused\-label\fR" 4
|
| 2413 |
|
|
.IX Item "-Wunused-label"
|
| 2414 |
|
|
Warn whenever a label is declared but not used.
|
| 2415 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2416 |
|
|
.Sp
|
| 2417 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
| 2418 |
|
|
.IP "\fB\-Wunused\-parameter\fR" 4
|
| 2419 |
|
|
.IX Item "-Wunused-parameter"
|
| 2420 |
|
|
Warn whenever a function parameter is unused aside from its declaration.
|
| 2421 |
|
|
.Sp
|
| 2422 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
| 2423 |
|
|
.IP "\fB\-Wunused\-variable\fR" 4
|
| 2424 |
|
|
.IX Item "-Wunused-variable"
|
| 2425 |
|
|
Warn whenever a local variable or non-constant static variable is unused
|
| 2426 |
|
|
aside from its declaration
|
| 2427 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2428 |
|
|
.Sp
|
| 2429 |
|
|
To suppress this warning use the \fBunused\fR attribute.
|
| 2430 |
|
|
.IP "\fB\-Wunused\-value\fR" 4
|
| 2431 |
|
|
.IX Item "-Wunused-value"
|
| 2432 |
|
|
Warn whenever a statement computes a result that is explicitly not used.
|
| 2433 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2434 |
|
|
.Sp
|
| 2435 |
|
|
To suppress this warning cast the expression to \fBvoid\fR.
|
| 2436 |
|
|
.IP "\fB\-Wunused\fR" 4
|
| 2437 |
|
|
.IX Item "-Wunused"
|
| 2438 |
|
|
All the above \fB\-Wunused\fR options combined.
|
| 2439 |
|
|
.Sp
|
| 2440 |
|
|
In order to get a warning about an unused function parameter, you must
|
| 2441 |
|
|
either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
|
| 2442 |
|
|
\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
|
| 2443 |
|
|
.IP "\fB\-Wuninitialized\fR" 4
|
| 2444 |
|
|
.IX Item "-Wuninitialized"
|
| 2445 |
|
|
Warn if an automatic variable is used without first being initialized or
|
| 2446 |
|
|
if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call.
|
| 2447 |
|
|
.Sp
|
| 2448 |
|
|
These warnings are possible only in optimizing compilation,
|
| 2449 |
|
|
because they require data flow information that is computed only
|
| 2450 |
|
|
when optimizing. If you don't specify \fB\-O\fR, you simply won't
|
| 2451 |
|
|
get these warnings.
|
| 2452 |
|
|
.Sp
|
| 2453 |
|
|
If you want to warn about code which uses the uninitialized value of the
|
| 2454 |
|
|
variable in its own initializer, use the \fB\-Winit\-self\fR option.
|
| 2455 |
|
|
.Sp
|
| 2456 |
|
|
These warnings occur for individual uninitialized or clobbered
|
| 2457 |
|
|
elements of structure, union or array variables as well as for
|
| 2458 |
|
|
variables which are uninitialized or clobbered as a whole. They do
|
| 2459 |
|
|
not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
|
| 2460 |
|
|
these warnings depend on optimization, the exact variables or elements
|
| 2461 |
|
|
for which there are warnings will depend on the precise optimization
|
| 2462 |
|
|
options and version of \s-1GCC\s0 used.
|
| 2463 |
|
|
.Sp
|
| 2464 |
|
|
Note that there may be no warning about a variable that is used only
|
| 2465 |
|
|
to compute a value that itself is never used, because such
|
| 2466 |
|
|
computations may be deleted by data flow analysis before the warnings
|
| 2467 |
|
|
are printed.
|
| 2468 |
|
|
.Sp
|
| 2469 |
|
|
These warnings are made optional because \s-1GCC\s0 is not smart
|
| 2470 |
|
|
enough to see all the reasons why the code might be correct
|
| 2471 |
|
|
despite appearing to have an error. Here is one example of how
|
| 2472 |
|
|
this can happen:
|
| 2473 |
|
|
.Sp
|
| 2474 |
|
|
.Vb 12
|
| 2475 |
|
|
\& {
|
| 2476 |
|
|
\& int x;
|
| 2477 |
|
|
\& switch (y)
|
| 2478 |
|
|
\& {
|
| 2479 |
|
|
\& case 1: x = 1;
|
| 2480 |
|
|
\& break;
|
| 2481 |
|
|
\& case 2: x = 4;
|
| 2482 |
|
|
\& break;
|
| 2483 |
|
|
\& case 3: x = 5;
|
| 2484 |
|
|
\& }
|
| 2485 |
|
|
\& foo (x);
|
| 2486 |
|
|
\& }
|
| 2487 |
|
|
.Ve
|
| 2488 |
|
|
.Sp
|
| 2489 |
|
|
If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
|
| 2490 |
|
|
always initialized, but \s-1GCC\s0 doesn't know this. Here is
|
| 2491 |
|
|
another common case:
|
| 2492 |
|
|
.Sp
|
| 2493 |
|
|
.Vb 6
|
| 2494 |
|
|
\& {
|
| 2495 |
|
|
\& int save_y;
|
| 2496 |
|
|
\& if (change_y) save_y = y, y = new_y;
|
| 2497 |
|
|
\& ...
|
| 2498 |
|
|
\& if (change_y) y = save_y;
|
| 2499 |
|
|
\& }
|
| 2500 |
|
|
.Ve
|
| 2501 |
|
|
.Sp
|
| 2502 |
|
|
This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set.
|
| 2503 |
|
|
.Sp
|
| 2504 |
|
|
This option also warns when a non-volatile automatic variable might be
|
| 2505 |
|
|
changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
|
| 2506 |
|
|
only in optimizing compilation.
|
| 2507 |
|
|
.Sp
|
| 2508 |
|
|
The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
|
| 2509 |
|
|
where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
|
| 2510 |
|
|
call it at any point in the code. As a result, you may get a warning
|
| 2511 |
|
|
even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
|
| 2512 |
|
|
in fact be called at the place which would cause a problem.
|
| 2513 |
|
|
.Sp
|
| 2514 |
|
|
Some spurious warnings can be avoided if you declare all the functions
|
| 2515 |
|
|
you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
|
| 2516 |
|
|
.Sp
|
| 2517 |
|
|
This warning is enabled by \fB\-Wall\fR.
|
| 2518 |
|
|
.IP "\fB\-Wunknown\-pragmas\fR" 4
|
| 2519 |
|
|
.IX Item "-Wunknown-pragmas"
|
| 2520 |
|
|
Warn when a #pragma directive is encountered which is not understood by
|
| 2521 |
|
|
\&\s-1GCC\s0. If this command line option is used, warnings will even be issued
|
| 2522 |
|
|
for unknown pragmas in system header files. This is not the case if
|
| 2523 |
|
|
the warnings were only enabled by the \fB\-Wall\fR command line option.
|
| 2524 |
|
|
.IP "\fB\-Wno\-pragmas\fR" 4
|
| 2525 |
|
|
.IX Item "-Wno-pragmas"
|
| 2526 |
|
|
Do not warn about misuses of pragmas, such as incorrect parameters,
|
| 2527 |
|
|
invalid syntax, or conflicts between pragmas. See also
|
| 2528 |
|
|
\&\fB\-Wunknown\-pragmas\fR.
|
| 2529 |
|
|
.IP "\fB\-Wstrict\-aliasing\fR" 4
|
| 2530 |
|
|
.IX Item "-Wstrict-aliasing"
|
| 2531 |
|
|
This option is only active when \fB\-fstrict\-aliasing\fR is active.
|
| 2532 |
|
|
It warns about code which might break the strict aliasing rules that the
|
| 2533 |
|
|
compiler is using for optimization. The warning does not catch all
|
| 2534 |
|
|
cases, but does attempt to catch the more common pitfalls. It is
|
| 2535 |
|
|
included in \fB\-Wall\fR.
|
| 2536 |
|
|
.IP "\fB\-Wstrict\-aliasing=2\fR" 4
|
| 2537 |
|
|
.IX Item "-Wstrict-aliasing=2"
|
| 2538 |
|
|
This option is only active when \fB\-fstrict\-aliasing\fR is active.
|
| 2539 |
|
|
It warns about code which might break the strict aliasing rules that the
|
| 2540 |
|
|
compiler is using for optimization. This warning catches more cases than
|
| 2541 |
|
|
\&\fB\-Wstrict\-aliasing\fR, but it will also give a warning for some ambiguous
|
| 2542 |
|
|
cases that are safe.
|
| 2543 |
|
|
.IP "\fB\-Wall\fR" 4
|
| 2544 |
|
|
.IX Item "-Wall"
|
| 2545 |
|
|
All of the above \fB\-W\fR options combined. This enables all the
|
| 2546 |
|
|
warnings about constructions that some users consider questionable, and
|
| 2547 |
|
|
that are easy to avoid (or modify to prevent the warning), even in
|
| 2548 |
|
|
conjunction with macros. This also enables some language-specific
|
| 2549 |
|
|
warnings described in \fB\*(C+ Dialect Options\fR and
|
| 2550 |
|
|
\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
|
| 2551 |
|
|
.PP
|
| 2552 |
|
|
The following \fB\-W...\fR options are not implied by \fB\-Wall\fR.
|
| 2553 |
|
|
Some of them warn about constructions that users generally do not
|
| 2554 |
|
|
consider questionable, but which occasionally you might wish to check
|
| 2555 |
|
|
for; others warn about constructions that are necessary or hard to avoid
|
| 2556 |
|
|
in some cases, and there is no simple way to modify the code to suppress
|
| 2557 |
|
|
the warning.
|
| 2558 |
|
|
.IP "\fB\-Wextra\fR" 4
|
| 2559 |
|
|
.IX Item "-Wextra"
|
| 2560 |
|
|
(This option used to be called \fB\-W\fR. The older name is still
|
| 2561 |
|
|
supported, but the newer name is more descriptive.) Print extra warning
|
| 2562 |
|
|
messages for these events:
|
| 2563 |
|
|
.RS 4
|
| 2564 |
|
|
.IP "*" 4
|
| 2565 |
|
|
A function can return either with or without a value. (Falling
|
| 2566 |
|
|
off the end of the function body is considered returning without
|
| 2567 |
|
|
a value.) For example, this function would evoke such a
|
| 2568 |
|
|
warning:
|
| 2569 |
|
|
.Sp
|
| 2570 |
|
|
.Vb 5
|
| 2571 |
|
|
\& foo (a)
|
| 2572 |
|
|
\& {
|
| 2573 |
|
|
\& if (a > 0)
|
| 2574 |
|
|
\& return a;
|
| 2575 |
|
|
\& }
|
| 2576 |
|
|
.Ve
|
| 2577 |
|
|
.IP "*" 4
|
| 2578 |
|
|
An expression-statement or the left-hand side of a comma expression
|
| 2579 |
|
|
contains no side effects.
|
| 2580 |
|
|
To suppress the warning, cast the unused expression to void.
|
| 2581 |
|
|
For example, an expression such as \fBx[i,j]\fR will cause a warning,
|
| 2582 |
|
|
but \fBx[(void)i,j]\fR will not.
|
| 2583 |
|
|
.IP "*" 4
|
| 2584 |
|
|
An unsigned value is compared against zero with \fB<\fR or \fB>=\fR.
|
| 2585 |
|
|
.IP "*" 4
|
| 2586 |
|
|
Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in
|
| 2587 |
|
|
a declaration. According to the C Standard, this usage is obsolescent.
|
| 2588 |
|
|
.IP "*" 4
|
| 2589 |
|
|
If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused
|
| 2590 |
|
|
arguments.
|
| 2591 |
|
|
.IP "*" 4
|
| 2592 |
|
|
A comparison between signed and unsigned values could produce an
|
| 2593 |
|
|
incorrect result when the signed value is converted to unsigned.
|
| 2594 |
|
|
(But don't warn if \fB\-Wno\-sign\-compare\fR is also specified.)
|
| 2595 |
|
|
.IP "*" 4
|
| 2596 |
|
|
An aggregate has an initializer which does not initialize all members.
|
| 2597 |
|
|
This warning can be independently controlled by
|
| 2598 |
|
|
\&\fB\-Wmissing\-field\-initializers\fR.
|
| 2599 |
|
|
.IP "*" 4
|
| 2600 |
|
|
A function parameter is declared without a type specifier in K&R\-style
|
| 2601 |
|
|
functions:
|
| 2602 |
|
|
.Sp
|
| 2603 |
|
|
.Vb 1
|
| 2604 |
|
|
\& void foo(bar) { }
|
| 2605 |
|
|
.Ve
|
| 2606 |
|
|
.IP "*" 4
|
| 2607 |
|
|
An empty body occurs in an \fBif\fR or \fBelse\fR statement.
|
| 2608 |
|
|
.IP "*" 4
|
| 2609 |
|
|
A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
|
| 2610 |
|
|
\&\fB>\fR, or \fB>=\fR.
|
| 2611 |
|
|
.IP "*" 4
|
| 2612 |
|
|
A variable might be changed by \fBlongjmp\fR or \fBvfork\fR.
|
| 2613 |
|
|
.IP "*" 4
|
| 2614 |
|
|
Any of several floating-point events that often indicate errors, such as
|
| 2615 |
|
|
overflow, underflow, loss of precision, etc.
|
| 2616 |
|
|
.IP "*<(\*(C+ only)>" 4
|
| 2617 |
|
|
.IX Item "*<( only)>"
|
| 2618 |
|
|
An enumerator and a non-enumerator both appear in a conditional expression.
|
| 2619 |
|
|
.IP "*<(\*(C+ only)>" 4
|
| 2620 |
|
|
.IX Item "*<( only)>"
|
| 2621 |
|
|
A non-static reference or non-static \fBconst\fR member appears in a
|
| 2622 |
|
|
class without constructors.
|
| 2623 |
|
|
.IP "*<(\*(C+ only)>" 4
|
| 2624 |
|
|
.IX Item "*<( only)>"
|
| 2625 |
|
|
Ambiguous virtual bases.
|
| 2626 |
|
|
.IP "*<(\*(C+ only)>" 4
|
| 2627 |
|
|
.IX Item "*<( only)>"
|
| 2628 |
|
|
Subscripting an array which has been declared \fBregister\fR.
|
| 2629 |
|
|
.IP "*<(\*(C+ only)>" 4
|
| 2630 |
|
|
.IX Item "*<( only)>"
|
| 2631 |
|
|
Taking the address of a variable which has been declared \fBregister\fR.
|
| 2632 |
|
|
.IP "*<(\*(C+ only)>" 4
|
| 2633 |
|
|
.IX Item "*<( only)>"
|
| 2634 |
|
|
A base class is not initialized in a derived class' copy constructor.
|
| 2635 |
|
|
.RE
|
| 2636 |
|
|
.RS 4
|
| 2637 |
|
|
.RE
|
| 2638 |
|
|
.IP "\fB\-Wno\-div\-by\-zero\fR" 4
|
| 2639 |
|
|
.IX Item "-Wno-div-by-zero"
|
| 2640 |
|
|
Do not warn about compile-time integer division by zero. Floating point
|
| 2641 |
|
|
division by zero is not warned about, as it can be a legitimate way of
|
| 2642 |
|
|
obtaining infinities and NaNs.
|
| 2643 |
|
|
.IP "\fB\-Wsystem\-headers\fR" 4
|
| 2644 |
|
|
.IX Item "-Wsystem-headers"
|
| 2645 |
|
|
Print warning messages for constructs found in system header files.
|
| 2646 |
|
|
Warnings from system headers are normally suppressed, on the assumption
|
| 2647 |
|
|
that they usually do not indicate real problems and would only make the
|
| 2648 |
|
|
compiler output harder to read. Using this command line option tells
|
| 2649 |
|
|
\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
|
| 2650 |
|
|
code. However, note that using \fB\-Wall\fR in conjunction with this
|
| 2651 |
|
|
option will \fInot\fR warn about unknown pragmas in system
|
| 2652 |
|
|
headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
|
| 2653 |
|
|
.IP "\fB\-Wfloat\-equal\fR" 4
|
| 2654 |
|
|
.IX Item "-Wfloat-equal"
|
| 2655 |
|
|
Warn if floating point values are used in equality comparisons.
|
| 2656 |
|
|
.Sp
|
| 2657 |
|
|
The idea behind this is that sometimes it is convenient (for the
|
| 2658 |
|
|
programmer) to consider floating-point values as approximations to
|
| 2659 |
|
|
infinitely precise real numbers. If you are doing this, then you need
|
| 2660 |
|
|
to compute (by analyzing the code, or in some other way) the maximum or
|
| 2661 |
|
|
likely maximum error that the computation introduces, and allow for it
|
| 2662 |
|
|
when performing comparisons (and when producing output, but that's a
|
| 2663 |
|
|
different problem). In particular, instead of testing for equality, you
|
| 2664 |
|
|
would check to see whether the two values have ranges that overlap; and
|
| 2665 |
|
|
this is done with the relational operators, so equality comparisons are
|
| 2666 |
|
|
probably mistaken.
|
| 2667 |
|
|
.IP "\fB\-Wtraditional\fR (C only)" 4
|
| 2668 |
|
|
.IX Item "-Wtraditional (C only)"
|
| 2669 |
|
|
Warn about certain constructs that behave differently in traditional and
|
| 2670 |
|
|
\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
|
| 2671 |
|
|
equivalent, and/or problematic constructs which should be avoided.
|
| 2672 |
|
|
.RS 4
|
| 2673 |
|
|
.IP "*" 4
|
| 2674 |
|
|
Macro parameters that appear within string literals in the macro body.
|
| 2675 |
|
|
In traditional C macro replacement takes place within string literals,
|
| 2676 |
|
|
but does not in \s-1ISO\s0 C.
|
| 2677 |
|
|
.IP "*" 4
|
| 2678 |
|
|
In traditional C, some preprocessor directives did not exist.
|
| 2679 |
|
|
Traditional preprocessors would only consider a line to be a directive
|
| 2680 |
|
|
if the \fB#\fR appeared in column 1 on the line. Therefore
|
| 2681 |
|
|
\&\fB\-Wtraditional\fR warns about directives that traditional C
|
| 2682 |
|
|
understands but would ignore because the \fB#\fR does not appear as the
|
| 2683 |
|
|
first character on the line. It also suggests you hide directives like
|
| 2684 |
|
|
\&\fB#pragma\fR not understood by traditional C by indenting them. Some
|
| 2685 |
|
|
traditional implementations would not recognize \fB#elif\fR, so it
|
| 2686 |
|
|
suggests avoiding it altogether.
|
| 2687 |
|
|
.IP "*" 4
|
| 2688 |
|
|
A function-like macro that appears without arguments.
|
| 2689 |
|
|
.IP "*" 4
|
| 2690 |
|
|
The unary plus operator.
|
| 2691 |
|
|
.IP "*" 4
|
| 2692 |
|
|
The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
|
| 2693 |
|
|
constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
|
| 2694 |
|
|
constants.) Note, these suffixes appear in macros defined in the system
|
| 2695 |
|
|
headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`\*(C'\fR.
|
| 2696 |
|
|
Use of these macros in user code might normally lead to spurious
|
| 2697 |
|
|
warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
|
| 2698 |
|
|
avoid warning in these cases.
|
| 2699 |
|
|
.IP "*" 4
|
| 2700 |
|
|
A function declared external in one block and then used after the end of
|
| 2701 |
|
|
the block.
|
| 2702 |
|
|
.IP "*" 4
|
| 2703 |
|
|
A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
|
| 2704 |
|
|
.IP "*" 4
|
| 2705 |
|
|
A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
|
| 2706 |
|
|
This construct is not accepted by some traditional C compilers.
|
| 2707 |
|
|
.IP "*" 4
|
| 2708 |
|
|
The \s-1ISO\s0 type of an integer constant has a different width or
|
| 2709 |
|
|
signedness from its traditional type. This warning is only issued if
|
| 2710 |
|
|
the base of the constant is ten. I.e. hexadecimal or octal values, which
|
| 2711 |
|
|
typically represent bit patterns, are not warned about.
|
| 2712 |
|
|
.IP "*" 4
|
| 2713 |
|
|
Usage of \s-1ISO\s0 string concatenation is detected.
|
| 2714 |
|
|
.IP "*" 4
|
| 2715 |
|
|
Initialization of automatic aggregates.
|
| 2716 |
|
|
.IP "*" 4
|
| 2717 |
|
|
Identifier conflicts with labels. Traditional C lacks a separate
|
| 2718 |
|
|
namespace for labels.
|
| 2719 |
|
|
.IP "*" 4
|
| 2720 |
|
|
Initialization of unions. If the initializer is zero, the warning is
|
| 2721 |
|
|
omitted. This is done under the assumption that the zero initializer in
|
| 2722 |
|
|
user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
|
| 2723 |
|
|
initializer warnings and relies on default initialization to zero in the
|
| 2724 |
|
|
traditional C case.
|
| 2725 |
|
|
.IP "*" 4
|
| 2726 |
|
|
Conversions by prototypes between fixed/floating point values and vice
|
| 2727 |
|
|
versa. The absence of these prototypes when compiling with traditional
|
| 2728 |
|
|
C would cause serious problems. This is a subset of the possible
|
| 2729 |
|
|
conversion warnings, for the full set use \fB\-Wconversion\fR.
|
| 2730 |
|
|
.IP "*" 4
|
| 2731 |
|
|
Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
|
| 2732 |
|
|
\&\fInot\fR issued for prototype declarations or variadic functions
|
| 2733 |
|
|
because these \s-1ISO\s0 C features will appear in your code when using
|
| 2734 |
|
|
libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
|
| 2735 |
|
|
\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
|
| 2736 |
|
|
because that feature is already a \s-1GCC\s0 extension and thus not relevant to
|
| 2737 |
|
|
traditional C compatibility.
|
| 2738 |
|
|
.RE
|
| 2739 |
|
|
.RS 4
|
| 2740 |
|
|
.RE
|
| 2741 |
|
|
.IP "\fB\-Wdeclaration\-after\-statement\fR (C only)" 4
|
| 2742 |
|
|
.IX Item "-Wdeclaration-after-statement (C only)"
|
| 2743 |
|
|
Warn when a declaration is found after a statement in a block. This
|
| 2744 |
|
|
construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
|
| 2745 |
|
|
allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
|
| 2746 |
|
|
\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
|
| 2747 |
|
|
.IP "\fB\-Wundef\fR" 4
|
| 2748 |
|
|
.IX Item "-Wundef"
|
| 2749 |
|
|
Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
|
| 2750 |
|
|
.IP "\fB\-Wno\-endif\-labels\fR" 4
|
| 2751 |
|
|
.IX Item "-Wno-endif-labels"
|
| 2752 |
|
|
Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
|
| 2753 |
|
|
.IP "\fB\-Wshadow\fR" 4
|
| 2754 |
|
|
.IX Item "-Wshadow"
|
| 2755 |
|
|
Warn whenever a local variable shadows another local variable, parameter or
|
| 2756 |
|
|
global variable or whenever a built-in function is shadowed.
|
| 2757 |
|
|
.IP "\fB\-Wlarger\-than\-\fR\fIlen\fR" 4
|
| 2758 |
|
|
.IX Item "-Wlarger-than-len"
|
| 2759 |
|
|
Warn whenever an object of larger than \fIlen\fR bytes is defined.
|
| 2760 |
|
|
.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
|
| 2761 |
|
|
.IX Item "-Wunsafe-loop-optimizations"
|
| 2762 |
|
|
Warn if the loop cannot be optimized because the compiler could not
|
| 2763 |
|
|
assume anything on the bounds of the loop indices. With
|
| 2764 |
|
|
\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
|
| 2765 |
|
|
such assumptions.
|
| 2766 |
|
|
.IP "\fB\-Wpointer\-arith\fR" 4
|
| 2767 |
|
|
.IX Item "-Wpointer-arith"
|
| 2768 |
|
|
Warn about anything that depends on the \*(L"size of\*(R" a function type or
|
| 2769 |
|
|
of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
|
| 2770 |
|
|
convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
|
| 2771 |
|
|
to functions.
|
| 2772 |
|
|
.IP "\fB\-Wbad\-function\-cast\fR (C only)" 4
|
| 2773 |
|
|
.IX Item "-Wbad-function-cast (C only)"
|
| 2774 |
|
|
Warn whenever a function call is cast to a non-matching type.
|
| 2775 |
|
|
For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
|
| 2776 |
|
|
.IP "\fB\-Wc++\-compat\fR" 4
|
| 2777 |
|
|
.IX Item "-Wc++-compat"
|
| 2778 |
|
|
Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
|
| 2779 |
|
|
\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
|
| 2780 |
|
|
\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
|
| 2781 |
|
|
.IP "\fB\-Wcast\-qual\fR" 4
|
| 2782 |
|
|
.IX Item "-Wcast-qual"
|
| 2783 |
|
|
Warn whenever a pointer is cast so as to remove a type qualifier from
|
| 2784 |
|
|
the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
|
| 2785 |
|
|
to an ordinary \f(CW\*(C`char *\*(C'\fR.
|
| 2786 |
|
|
.IP "\fB\-Wcast\-align\fR" 4
|
| 2787 |
|
|
.IX Item "-Wcast-align"
|
| 2788 |
|
|
Warn whenever a pointer is cast such that the required alignment of the
|
| 2789 |
|
|
target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
|
| 2790 |
|
|
an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
|
| 2791 |
|
|
two\- or four-byte boundaries.
|
| 2792 |
|
|
.IP "\fB\-Wwrite\-strings\fR" 4
|
| 2793 |
|
|
.IX Item "-Wwrite-strings"
|
| 2794 |
|
|
When compiling C, give string constants the type \f(CW\*(C`const
|
| 2795 |
|
|
char[\f(CIlength\f(CW]\*(C'\fR so that
|
| 2796 |
|
|
copying the address of one into a non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR
|
| 2797 |
|
|
pointer will get a warning; when compiling \*(C+, warn about the
|
| 2798 |
|
|
deprecated conversion from string constants to \f(CW\*(C`char *\*(C'\fR.
|
| 2799 |
|
|
These warnings will help you find at
|
| 2800 |
|
|
compile time code that can try to write into a string constant, but
|
| 2801 |
|
|
only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in
|
| 2802 |
|
|
declarations and prototypes. Otherwise, it will just be a nuisance;
|
| 2803 |
|
|
this is why we did not make \fB\-Wall\fR request these warnings.
|
| 2804 |
|
|
.IP "\fB\-Wconversion\fR" 4
|
| 2805 |
|
|
.IX Item "-Wconversion"
|
| 2806 |
|
|
Warn if a prototype causes a type conversion that is different from what
|
| 2807 |
|
|
would happen to the same argument in the absence of a prototype. This
|
| 2808 |
|
|
includes conversions of fixed point to floating and vice versa, and
|
| 2809 |
|
|
conversions changing the width or signedness of a fixed point argument
|
| 2810 |
|
|
except when the same as the default promotion.
|
| 2811 |
|
|
.Sp
|
| 2812 |
|
|
Also, warn if a negative integer constant expression is implicitly
|
| 2813 |
|
|
converted to an unsigned type. For example, warn about the assignment
|
| 2814 |
|
|
\&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit
|
| 2815 |
|
|
casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR.
|
| 2816 |
|
|
.IP "\fB\-Wsign\-compare\fR" 4
|
| 2817 |
|
|
.IX Item "-Wsign-compare"
|
| 2818 |
|
|
Warn when a comparison between signed and unsigned values could produce
|
| 2819 |
|
|
an incorrect result when the signed value is converted to unsigned.
|
| 2820 |
|
|
This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
|
| 2821 |
|
|
of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
|
| 2822 |
|
|
.IP "\fB\-Waggregate\-return\fR" 4
|
| 2823 |
|
|
.IX Item "-Waggregate-return"
|
| 2824 |
|
|
Warn if any functions that return structures or unions are defined or
|
| 2825 |
|
|
called. (In languages where you can return an array, this also elicits
|
| 2826 |
|
|
a warning.)
|
| 2827 |
|
|
.IP "\fB\-Wno\-attributes\fR" 4
|
| 2828 |
|
|
.IX Item "-Wno-attributes"
|
| 2829 |
|
|
Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
|
| 2830 |
|
|
unrecognized attributes, function attributes applied to variables,
|
| 2831 |
|
|
etc. This will not stop errors for incorrect use of supported
|
| 2832 |
|
|
attributes.
|
| 2833 |
|
|
.IP "\fB\-Wstrict\-prototypes\fR (C only)" 4
|
| 2834 |
|
|
.IX Item "-Wstrict-prototypes (C only)"
|
| 2835 |
|
|
Warn if a function is declared or defined without specifying the
|
| 2836 |
|
|
argument types. (An old-style function definition is permitted without
|
| 2837 |
|
|
a warning if preceded by a declaration which specifies the argument
|
| 2838 |
|
|
types.)
|
| 2839 |
|
|
.IP "\fB\-Wold\-style\-definition\fR (C only)" 4
|
| 2840 |
|
|
.IX Item "-Wold-style-definition (C only)"
|
| 2841 |
|
|
Warn if an old-style function definition is used. A warning is given
|
| 2842 |
|
|
even if there is a previous prototype.
|
| 2843 |
|
|
.IP "\fB\-Wmissing\-prototypes\fR (C only)" 4
|
| 2844 |
|
|
.IX Item "-Wmissing-prototypes (C only)"
|
| 2845 |
|
|
Warn if a global function is defined without a previous prototype
|
| 2846 |
|
|
declaration. This warning is issued even if the definition itself
|
| 2847 |
|
|
provides a prototype. The aim is to detect global functions that fail
|
| 2848 |
|
|
to be declared in header files.
|
| 2849 |
|
|
.IP "\fB\-Wmissing\-declarations\fR (C only)" 4
|
| 2850 |
|
|
.IX Item "-Wmissing-declarations (C only)"
|
| 2851 |
|
|
Warn if a global function is defined without a previous declaration.
|
| 2852 |
|
|
Do so even if the definition itself provides a prototype.
|
| 2853 |
|
|
Use this option to detect global functions that are not declared in
|
| 2854 |
|
|
header files.
|
| 2855 |
|
|
.IP "\fB\-Wmissing\-field\-initializers\fR" 4
|
| 2856 |
|
|
.IX Item "-Wmissing-field-initializers"
|
| 2857 |
|
|
Warn if a structure's initializer has some fields missing. For
|
| 2858 |
|
|
example, the following code would cause such a warning, because
|
| 2859 |
|
|
\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
|
| 2860 |
|
|
.Sp
|
| 2861 |
|
|
.Vb 2
|
| 2862 |
|
|
\& struct s { int f, g, h; };
|
| 2863 |
|
|
\& struct s x = { 3, 4 };
|
| 2864 |
|
|
.Ve
|
| 2865 |
|
|
.Sp
|
| 2866 |
|
|
This option does not warn about designated initializers, so the following
|
| 2867 |
|
|
modification would not trigger a warning:
|
| 2868 |
|
|
.Sp
|
| 2869 |
|
|
.Vb 2
|
| 2870 |
|
|
\& struct s { int f, g, h; };
|
| 2871 |
|
|
\& struct s x = { .f = 3, .g = 4 };
|
| 2872 |
|
|
.Ve
|
| 2873 |
|
|
.Sp
|
| 2874 |
|
|
This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
|
| 2875 |
|
|
warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
|
| 2876 |
|
|
.IP "\fB\-Wmissing\-noreturn\fR" 4
|
| 2877 |
|
|
.IX Item "-Wmissing-noreturn"
|
| 2878 |
|
|
Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
|
| 2879 |
|
|
Note these are only possible candidates, not absolute ones. Care should
|
| 2880 |
|
|
be taken to manually verify functions actually do not ever return before
|
| 2881 |
|
|
adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
|
| 2882 |
|
|
bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
|
| 2883 |
|
|
hosted C environments.
|
| 2884 |
|
|
.IP "\fB\-Wmissing\-format\-attribute\fR" 4
|
| 2885 |
|
|
.IX Item "-Wmissing-format-attribute"
|
| 2886 |
|
|
Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
|
| 2887 |
|
|
attributes. Note these are only possible candidates, not absolute ones.
|
| 2888 |
|
|
\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
|
| 2889 |
|
|
are used in assignment, initialization, parameter passing or return
|
| 2890 |
|
|
statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
|
| 2891 |
|
|
resulting type. I.e. the left-hand side of the assignment or
|
| 2892 |
|
|
initialization, the type of the parameter variable, or the return type
|
| 2893 |
|
|
of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
|
| 2894 |
|
|
attribute to avoid the warning.
|
| 2895 |
|
|
.Sp
|
| 2896 |
|
|
\&\s-1GCC\s0 will also warn about function definitions which might be
|
| 2897 |
|
|
candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
|
| 2898 |
|
|
possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
|
| 2899 |
|
|
might be appropriate for any function that calls a function like
|
| 2900 |
|
|
\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
|
| 2901 |
|
|
case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
|
| 2902 |
|
|
appropriate may not be detected.
|
| 2903 |
|
|
.IP "\fB\-Wno\-multichar\fR" 4
|
| 2904 |
|
|
.IX Item "-Wno-multichar"
|
| 2905 |
|
|
Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
|
| 2906 |
|
|
Usually they indicate a typo in the user's code, as they have
|
| 2907 |
|
|
implementation-defined values, and should not be used in portable code.
|
| 2908 |
|
|
.IP "\fB\-Wnormalized=\fR" 4
|
| 2909 |
|
|
.IX Item "-Wnormalized="
|
| 2910 |
|
|
In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
|
| 2911 |
|
|
different sequences of characters. However, sometimes when characters
|
| 2912 |
|
|
outside the basic \s-1ASCII\s0 character set are used, you can have two
|
| 2913 |
|
|
different character sequences that look the same. To avoid confusion,
|
| 2914 |
|
|
the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
|
| 2915 |
|
|
when applied ensure that two sequences that look the same are turned into
|
| 2916 |
|
|
the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
|
| 2917 |
|
|
have not been normalized; this option controls that warning.
|
| 2918 |
|
|
.Sp
|
| 2919 |
|
|
There are four levels of warning that \s-1GCC\s0 supports. The default is
|
| 2920 |
|
|
\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
|
| 2921 |
|
|
not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
|
| 2922 |
|
|
recommended form for most uses.
|
| 2923 |
|
|
.Sp
|
| 2924 |
|
|
Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
|
| 2925 |
|
|
in identifiers that when turned into \s-1NFC\s0 aren't allowable as
|
| 2926 |
|
|
identifiers. That is, there's no way to use these symbols in portable
|
| 2927 |
|
|
\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
|
| 2928 |
|
|
\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
|
| 2929 |
|
|
It is hoped that future versions of the standards involved will correct
|
| 2930 |
|
|
this, which is why this option is not the default.
|
| 2931 |
|
|
.Sp
|
| 2932 |
|
|
You can switch the warning off for all characters by writing
|
| 2933 |
|
|
\&\fB\-Wnormalized=none\fR. You would only want to do this if you
|
| 2934 |
|
|
were using some other normalization scheme (like \*(L"D\*(R"), because
|
| 2935 |
|
|
otherwise you can easily create bugs that are literally impossible to see.
|
| 2936 |
|
|
.Sp
|
| 2937 |
|
|
Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
|
| 2938 |
|
|
in some fonts or display methodologies, especially once formatting has
|
| 2939 |
|
|
been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
|
| 2940 |
|
|
\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
|
| 2941 |
|
|
placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
|
| 2942 |
|
|
normalisation scheme to convert all these into a standard form as
|
| 2943 |
|
|
well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
|
| 2944 |
|
|
\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
|
| 2945 |
|
|
about every identifier that contains the letter O because it might be
|
| 2946 |
|
|
confused with the digit 0, and so is not the default, but may be
|
| 2947 |
|
|
useful as a local coding convention if the programming environment is
|
| 2948 |
|
|
unable to be fixed to display these characters distinctly.
|
| 2949 |
|
|
.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
|
| 2950 |
|
|
.IX Item "-Wno-deprecated-declarations"
|
| 2951 |
|
|
Do not warn about uses of functions, variables, and types marked as
|
| 2952 |
|
|
deprecated by using the \f(CW\*(C`deprecated\*(C'\fR attribute.
|
| 2953 |
|
|
(@pxref{Function Attributes}, \f(CW@pxref\fR{Variable Attributes},
|
| 2954 |
|
|
\&\f(CW@pxref\fR{Type Attributes}.)
|
| 2955 |
|
|
.IP "\fB\-Wpacked\fR" 4
|
| 2956 |
|
|
.IX Item "-Wpacked"
|
| 2957 |
|
|
Warn if a structure is given the packed attribute, but the packed
|
| 2958 |
|
|
attribute has no effect on the layout or size of the structure.
|
| 2959 |
|
|
Such structures may be mis-aligned for little benefit. For
|
| 2960 |
|
|
instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
|
| 2961 |
|
|
will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
|
| 2962 |
|
|
have the packed attribute:
|
| 2963 |
|
|
.Sp
|
| 2964 |
|
|
.Vb 8
|
| 2965 |
|
|
\& struct foo {
|
| 2966 |
|
|
\& int x;
|
| 2967 |
|
|
\& char a, b, c, d;
|
| 2968 |
|
|
\& } __attribute__((packed));
|
| 2969 |
|
|
\& struct bar {
|
| 2970 |
|
|
\& char z;
|
| 2971 |
|
|
\& struct foo f;
|
| 2972 |
|
|
\& };
|
| 2973 |
|
|
.Ve
|
| 2974 |
|
|
.IP "\fB\-Wpadded\fR" 4
|
| 2975 |
|
|
.IX Item "-Wpadded"
|
| 2976 |
|
|
Warn if padding is included in a structure, either to align an element
|
| 2977 |
|
|
of the structure or to align the whole structure. Sometimes when this
|
| 2978 |
|
|
happens it is possible to rearrange the fields of the structure to
|
| 2979 |
|
|
reduce the padding and so make the structure smaller.
|
| 2980 |
|
|
.IP "\fB\-Wredundant\-decls\fR" 4
|
| 2981 |
|
|
.IX Item "-Wredundant-decls"
|
| 2982 |
|
|
Warn if anything is declared more than once in the same scope, even in
|
| 2983 |
|
|
cases where multiple declaration is valid and changes nothing.
|
| 2984 |
|
|
.IP "\fB\-Wnested\-externs\fR (C only)" 4
|
| 2985 |
|
|
.IX Item "-Wnested-externs (C only)"
|
| 2986 |
|
|
Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
|
| 2987 |
|
|
.IP "\fB\-Wunreachable\-code\fR" 4
|
| 2988 |
|
|
.IX Item "-Wunreachable-code"
|
| 2989 |
|
|
Warn if the compiler detects that code will never be executed.
|
| 2990 |
|
|
.Sp
|
| 2991 |
|
|
This option is intended to warn when the compiler detects that at
|
| 2992 |
|
|
least a whole line of source code will never be executed, because
|
| 2993 |
|
|
some condition is never satisfied or because it is after a
|
| 2994 |
|
|
procedure that never returns.
|
| 2995 |
|
|
.Sp
|
| 2996 |
|
|
It is possible for this option to produce a warning even though there
|
| 2997 |
|
|
are circumstances under which part of the affected line can be executed,
|
| 2998 |
|
|
so care should be taken when removing apparently-unreachable code.
|
| 2999 |
|
|
.Sp
|
| 3000 |
|
|
For instance, when a function is inlined, a warning may mean that the
|
| 3001 |
|
|
line is unreachable in only one inlined copy of the function.
|
| 3002 |
|
|
.Sp
|
| 3003 |
|
|
This option is not made part of \fB\-Wall\fR because in a debugging
|
| 3004 |
|
|
version of a program there is often substantial code which checks
|
| 3005 |
|
|
correct functioning of the program and is, hopefully, unreachable
|
| 3006 |
|
|
because the program does work. Another common use of unreachable
|
| 3007 |
|
|
code is to provide behavior which is selectable at compile\-time.
|
| 3008 |
|
|
.IP "\fB\-Winline\fR" 4
|
| 3009 |
|
|
.IX Item "-Winline"
|
| 3010 |
|
|
Warn if a function can not be inlined and it was declared as inline.
|
| 3011 |
|
|
Even with this option, the compiler will not warn about failures to
|
| 3012 |
|
|
inline functions declared in system headers.
|
| 3013 |
|
|
.Sp
|
| 3014 |
|
|
The compiler uses a variety of heuristics to determine whether or not
|
| 3015 |
|
|
to inline a function. For example, the compiler takes into account
|
| 3016 |
|
|
the size of the function being inlined and the amount of inlining
|
| 3017 |
|
|
that has already been done in the current function. Therefore,
|
| 3018 |
|
|
seemingly insignificant changes in the source program can cause the
|
| 3019 |
|
|
warnings produced by \fB\-Winline\fR to appear or disappear.
|
| 3020 |
|
|
.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ only)" 4
|
| 3021 |
|
|
.IX Item "-Wno-invalid-offsetof ( only)"
|
| 3022 |
|
|
Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
|
| 3023 |
|
|
type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
|
| 3024 |
|
|
to a non-POD type is undefined. In existing \*(C+ implementations,
|
| 3025 |
|
|
however, \fBoffsetof\fR typically gives meaningful results even when
|
| 3026 |
|
|
applied to certain kinds of non-POD types. (Such as a simple
|
| 3027 |
|
|
\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
|
| 3028 |
|
|
constructor.) This flag is for users who are aware that they are
|
| 3029 |
|
|
writing nonportable code and who have deliberately chosen to ignore the
|
| 3030 |
|
|
warning about it.
|
| 3031 |
|
|
.Sp
|
| 3032 |
|
|
The restrictions on \fBoffsetof\fR may be relaxed in a future version
|
| 3033 |
|
|
of the \*(C+ standard.
|
| 3034 |
|
|
.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C only)" 4
|
| 3035 |
|
|
.IX Item "-Wno-int-to-pointer-cast (C only)"
|
| 3036 |
|
|
Suppress warnings from casts to pointer type of an integer of a
|
| 3037 |
|
|
different size.
|
| 3038 |
|
|
.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C only)" 4
|
| 3039 |
|
|
.IX Item "-Wno-pointer-to-int-cast (C only)"
|
| 3040 |
|
|
Suppress warnings from casts from a pointer to an integer type of a
|
| 3041 |
|
|
different size.
|
| 3042 |
|
|
.IP "\fB\-Winvalid\-pch\fR" 4
|
| 3043 |
|
|
.IX Item "-Winvalid-pch"
|
| 3044 |
|
|
Warn if a precompiled header is found in
|
| 3045 |
|
|
the search path but can't be used.
|
| 3046 |
|
|
.IP "\fB\-Wlong\-long\fR" 4
|
| 3047 |
|
|
.IX Item "-Wlong-long"
|
| 3048 |
|
|
Warn if \fBlong long\fR type is used. This is default. To inhibit
|
| 3049 |
|
|
the warning messages, use \fB\-Wno\-long\-long\fR. Flags
|
| 3050 |
|
|
\&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
|
| 3051 |
|
|
only when \fB\-pedantic\fR flag is used.
|
| 3052 |
|
|
.IP "\fB\-Wvariadic\-macros\fR" 4
|
| 3053 |
|
|
.IX Item "-Wvariadic-macros"
|
| 3054 |
|
|
Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
|
| 3055 |
|
|
alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
|
| 3056 |
|
|
To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
|
| 3057 |
|
|
.IP "\fB\-Wvolatile\-register\-var\fR" 4
|
| 3058 |
|
|
.IX Item "-Wvolatile-register-var"
|
| 3059 |
|
|
Warn if a register variable is declared volatile. The volatile
|
| 3060 |
|
|
modifier does not inhibit all optimizations that may eliminate reads
|
| 3061 |
|
|
and/or writes to register variables.
|
| 3062 |
|
|
.IP "\fB\-Wdisabled\-optimization\fR" 4
|
| 3063 |
|
|
.IX Item "-Wdisabled-optimization"
|
| 3064 |
|
|
Warn if a requested optimization pass is disabled. This warning does
|
| 3065 |
|
|
not generally indicate that there is anything wrong with your code; it
|
| 3066 |
|
|
merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
|
| 3067 |
|
|
effectively. Often, the problem is that your code is too big or too
|
| 3068 |
|
|
complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
|
| 3069 |
|
|
itself is likely to take inordinate amounts of time.
|
| 3070 |
|
|
.IP "\fB\-Wpointer\-sign\fR" 4
|
| 3071 |
|
|
.IX Item "-Wpointer-sign"
|
| 3072 |
|
|
Warn for pointer argument passing or assignment with different signedness.
|
| 3073 |
|
|
This option is only supported for C and Objective\-C. It is implied by
|
| 3074 |
|
|
\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
|
| 3075 |
|
|
\&\fB\-Wno\-pointer\-sign\fR.
|
| 3076 |
|
|
.IP "\fB\-Werror\fR" 4
|
| 3077 |
|
|
.IX Item "-Werror"
|
| 3078 |
|
|
Make all warnings into errors.
|
| 3079 |
|
|
.IP "\fB\-Wstack\-protector\fR" 4
|
| 3080 |
|
|
.IX Item "-Wstack-protector"
|
| 3081 |
|
|
This option is only active when \fB\-fstack\-protector\fR is active. It
|
| 3082 |
|
|
warns about functions that will not be protected against stack smashing.
|
| 3083 |
|
|
.Sh "Options for Debugging Your Program or \s-1GCC\s0"
|
| 3084 |
|
|
.IX Subsection "Options for Debugging Your Program or GCC"
|
| 3085 |
|
|
\&\s-1GCC\s0 has various special options that are used for debugging
|
| 3086 |
|
|
either your program or \s-1GCC:\s0
|
| 3087 |
|
|
.IP "\fB\-g\fR" 4
|
| 3088 |
|
|
.IX Item "-g"
|
| 3089 |
|
|
Produce debugging information in the operating system's native format
|
| 3090 |
|
|
(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
|
| 3091 |
|
|
information.
|
| 3092 |
|
|
.Sp
|
| 3093 |
|
|
On most systems that use stabs format, \fB\-g\fR enables use of extra
|
| 3094 |
|
|
debugging information that only \s-1GDB\s0 can use; this extra information
|
| 3095 |
|
|
makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
|
| 3096 |
|
|
crash or
|
| 3097 |
|
|
refuse to read the program. If you want to control for certain whether
|
| 3098 |
|
|
to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
|
| 3099 |
|
|
\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
|
| 3100 |
|
|
.Sp
|
| 3101 |
|
|
\&\s-1GCC\s0 allows you to use \fB\-g\fR with
|
| 3102 |
|
|
\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
|
| 3103 |
|
|
produce surprising results: some variables you declared may not exist
|
| 3104 |
|
|
at all; flow of control may briefly move where you did not expect it;
|
| 3105 |
|
|
some statements may not be executed because they compute constant
|
| 3106 |
|
|
results or their values were already at hand; some statements may
|
| 3107 |
|
|
execute in different places because they were moved out of loops.
|
| 3108 |
|
|
.Sp
|
| 3109 |
|
|
Nevertheless it proves possible to debug optimized output. This makes
|
| 3110 |
|
|
it reasonable to use the optimizer for programs that might have bugs.
|
| 3111 |
|
|
.Sp
|
| 3112 |
|
|
The following options are useful when \s-1GCC\s0 is generated with the
|
| 3113 |
|
|
capability for more than one debugging format.
|
| 3114 |
|
|
.IP "\fB\-ggdb\fR" 4
|
| 3115 |
|
|
.IX Item "-ggdb"
|
| 3116 |
|
|
Produce debugging information for use by \s-1GDB\s0. This means to use the
|
| 3117 |
|
|
most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
|
| 3118 |
|
|
if neither of those are supported), including \s-1GDB\s0 extensions if at all
|
| 3119 |
|
|
possible.
|
| 3120 |
|
|
.IP "\fB\-gstabs\fR" 4
|
| 3121 |
|
|
.IX Item "-gstabs"
|
| 3122 |
|
|
Produce debugging information in stabs format (if that is supported),
|
| 3123 |
|
|
without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
|
| 3124 |
|
|
systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
|
| 3125 |
|
|
produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
|
| 3126 |
|
|
On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
|
| 3127 |
|
|
.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
|
| 3128 |
|
|
.IX Item "-feliminate-unused-debug-symbols"
|
| 3129 |
|
|
Produce debugging information in stabs format (if that is supported),
|
| 3130 |
|
|
for only symbols that are actually used.
|
| 3131 |
|
|
.IP "\fB\-gstabs+\fR" 4
|
| 3132 |
|
|
.IX Item "-gstabs+"
|
| 3133 |
|
|
Produce debugging information in stabs format (if that is supported),
|
| 3134 |
|
|
using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
|
| 3135 |
|
|
use of these extensions is likely to make other debuggers crash or
|
| 3136 |
|
|
refuse to read the program.
|
| 3137 |
|
|
.IP "\fB\-gcoff\fR" 4
|
| 3138 |
|
|
.IX Item "-gcoff"
|
| 3139 |
|
|
Produce debugging information in \s-1COFF\s0 format (if that is supported).
|
| 3140 |
|
|
This is the format used by \s-1SDB\s0 on most System V systems prior to
|
| 3141 |
|
|
System V Release 4.
|
| 3142 |
|
|
.IP "\fB\-gxcoff\fR" 4
|
| 3143 |
|
|
.IX Item "-gxcoff"
|
| 3144 |
|
|
Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
|
| 3145 |
|
|
This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
|
| 3146 |
|
|
.IP "\fB\-gxcoff+\fR" 4
|
| 3147 |
|
|
.IX Item "-gxcoff+"
|
| 3148 |
|
|
Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
|
| 3149 |
|
|
using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
|
| 3150 |
|
|
use of these extensions is likely to make other debuggers crash or
|
| 3151 |
|
|
refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
|
| 3152 |
|
|
assembler (\s-1GAS\s0) to fail with an error.
|
| 3153 |
|
|
.IP "\fB\-gdwarf\-2\fR" 4
|
| 3154 |
|
|
.IX Item "-gdwarf-2"
|
| 3155 |
|
|
Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
|
| 3156 |
|
|
supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
|
| 3157 |
|
|
option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
|
| 3158 |
|
|
version 3 is upward compatible with version 2, but may still cause
|
| 3159 |
|
|
problems for older debuggers.
|
| 3160 |
|
|
.IP "\fB\-gvms\fR" 4
|
| 3161 |
|
|
.IX Item "-gvms"
|
| 3162 |
|
|
Produce debugging information in \s-1VMS\s0 debug format (if that is
|
| 3163 |
|
|
supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
|
| 3164 |
|
|
.IP "\fB\-g\fR\fIlevel\fR" 4
|
| 3165 |
|
|
.IX Item "-glevel"
|
| 3166 |
|
|
.PD 0
|
| 3167 |
|
|
.IP "\fB\-ggdb\fR\fIlevel\fR" 4
|
| 3168 |
|
|
.IX Item "-ggdblevel"
|
| 3169 |
|
|
.IP "\fB\-gstabs\fR\fIlevel\fR" 4
|
| 3170 |
|
|
.IX Item "-gstabslevel"
|
| 3171 |
|
|
.IP "\fB\-gcoff\fR\fIlevel\fR" 4
|
| 3172 |
|
|
.IX Item "-gcofflevel"
|
| 3173 |
|
|
.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
|
| 3174 |
|
|
.IX Item "-gxcofflevel"
|
| 3175 |
|
|
.IP "\fB\-gvms\fR\fIlevel\fR" 4
|
| 3176 |
|
|
.IX Item "-gvmslevel"
|
| 3177 |
|
|
.PD
|
| 3178 |
|
|
Request debugging information and also use \fIlevel\fR to specify how
|
| 3179 |
|
|
much information. The default level is 2.
|
| 3180 |
|
|
.Sp
|
| 3181 |
|
|
Level 1 produces minimal information, enough for making backtraces in
|
| 3182 |
|
|
parts of the program that you don't plan to debug. This includes
|
| 3183 |
|
|
descriptions of functions and external variables, but no information
|
| 3184 |
|
|
about local variables and no line numbers.
|
| 3185 |
|
|
.Sp
|
| 3186 |
|
|
Level 3 includes extra information, such as all the macro definitions
|
| 3187 |
|
|
present in the program. Some debuggers support macro expansion when
|
| 3188 |
|
|
you use \fB\-g3\fR.
|
| 3189 |
|
|
.Sp
|
| 3190 |
|
|
\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
|
| 3191 |
|
|
\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
|
| 3192 |
|
|
debug information in version 1 of the \s-1DWARF\s0 format (which is very
|
| 3193 |
|
|
different from version 2), and it would have been too confusing. That
|
| 3194 |
|
|
debug format is long obsolete, but the option cannot be changed now.
|
| 3195 |
|
|
Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
|
| 3196 |
|
|
debug level for \s-1DWARF2\s0.
|
| 3197 |
|
|
.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
|
| 3198 |
|
|
.IX Item "-feliminate-dwarf2-dups"
|
| 3199 |
|
|
Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
|
| 3200 |
|
|
information about each symbol. This option only makes sense when
|
| 3201 |
|
|
generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
|
| 3202 |
|
|
.IP "\fB\-p\fR" 4
|
| 3203 |
|
|
.IX Item "-p"
|
| 3204 |
|
|
Generate extra code to write profile information suitable for the
|
| 3205 |
|
|
analysis program \fBprof\fR. You must use this option when compiling
|
| 3206 |
|
|
the source files you want data about, and you must also use it when
|
| 3207 |
|
|
linking.
|
| 3208 |
|
|
.IP "\fB\-pg\fR" 4
|
| 3209 |
|
|
.IX Item "-pg"
|
| 3210 |
|
|
Generate extra code to write profile information suitable for the
|
| 3211 |
|
|
analysis program \fBgprof\fR. You must use this option when compiling
|
| 3212 |
|
|
the source files you want data about, and you must also use it when
|
| 3213 |
|
|
linking.
|
| 3214 |
|
|
.IP "\fB\-Q\fR" 4
|
| 3215 |
|
|
.IX Item "-Q"
|
| 3216 |
|
|
Makes the compiler print out each function name as it is compiled, and
|
| 3217 |
|
|
print some statistics about each pass when it finishes.
|
| 3218 |
|
|
.IP "\fB\-ftime\-report\fR" 4
|
| 3219 |
|
|
.IX Item "-ftime-report"
|
| 3220 |
|
|
Makes the compiler print some statistics about the time consumed by each
|
| 3221 |
|
|
pass when it finishes.
|
| 3222 |
|
|
.IP "\fB\-fmem\-report\fR" 4
|
| 3223 |
|
|
.IX Item "-fmem-report"
|
| 3224 |
|
|
Makes the compiler print some statistics about permanent memory
|
| 3225 |
|
|
allocation when it finishes.
|
| 3226 |
|
|
.IP "\fB\-fprofile\-arcs\fR" 4
|
| 3227 |
|
|
.IX Item "-fprofile-arcs"
|
| 3228 |
|
|
Add code so that program flow \fIarcs\fR are instrumented. During
|
| 3229 |
|
|
execution the program records how many times each branch and call is
|
| 3230 |
|
|
executed and how many times it is taken or returns. When the compiled
|
| 3231 |
|
|
program exits it saves this data to a file called
|
| 3232 |
|
|
\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
|
| 3233 |
|
|
profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
|
| 3234 |
|
|
test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
|
| 3235 |
|
|
\&\fIauxname\fR is generated from the name of the output file, if
|
| 3236 |
|
|
explicitly specified and it is not the final executable, otherwise it is
|
| 3237 |
|
|
the basename of the source file. In both cases any suffix is removed
|
| 3238 |
|
|
(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
|
| 3239 |
|
|
\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
|
| 3240 |
|
|
.IP "\fB\-\-coverage\fR" 4
|
| 3241 |
|
|
.IX Item "--coverage"
|
| 3242 |
|
|
This option is used to compile and link code instrumented for coverage
|
| 3243 |
|
|
analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
|
| 3244 |
|
|
\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
|
| 3245 |
|
|
linking). See the documentation for those options for more details.
|
| 3246 |
|
|
.RS 4
|
| 3247 |
|
|
.IP "@bullet" 4
|
| 3248 |
|
|
.IX Item "@bullet"
|
| 3249 |
|
|
Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
|
| 3250 |
|
|
and code generation options. For test coverage analysis, use the
|
| 3251 |
|
|
additional \fB\-ftest\-coverage\fR option. You do not need to profile
|
| 3252 |
|
|
every source file in a program.
|
| 3253 |
|
|
.IP "@cvmmfu" 4
|
| 3254 |
|
|
.IX Item "@cvmmfu"
|
| 3255 |
|
|
Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
|
| 3256 |
|
|
(the latter implies the former).
|
| 3257 |
|
|
.IP "@dwnngv" 4
|
| 3258 |
|
|
.IX Item "@dwnngv"
|
| 3259 |
|
|
Run the program on a representative workload to generate the arc profile
|
| 3260 |
|
|
information. This may be repeated any number of times. You can run
|
| 3261 |
|
|
concurrent instances of your program, and provided that the file system
|
| 3262 |
|
|
supports locking, the data files will be correctly updated. Also
|
| 3263 |
|
|
\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
|
| 3264 |
|
|
will not happen).
|
| 3265 |
|
|
.IP "@exoohw" 4
|
| 3266 |
|
|
.IX Item "@exoohw"
|
| 3267 |
|
|
For profile-directed optimizations, compile the source files again with
|
| 3268 |
|
|
the same optimization and code generation options plus
|
| 3269 |
|
|
\&\fB\-fbranch\-probabilities\fR.
|
| 3270 |
|
|
.IP "@fyppix" 4
|
| 3271 |
|
|
.IX Item "@fyppix"
|
| 3272 |
|
|
For test coverage analysis, use \fBgcov\fR to produce human readable
|
| 3273 |
|
|
information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
|
| 3274 |
|
|
\&\fBgcov\fR documentation for further information.
|
| 3275 |
|
|
.RE
|
| 3276 |
|
|
.RS 4
|
| 3277 |
|
|
.Sp
|
| 3278 |
|
|
With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
|
| 3279 |
|
|
creates a program flow graph, then finds a spanning tree for the graph.
|
| 3280 |
|
|
Only arcs that are not on the spanning tree have to be instrumented: the
|
| 3281 |
|
|
compiler adds code to count the number of times that these arcs are
|
| 3282 |
|
|
executed. When an arc is the only exit or only entrance to a block, the
|
| 3283 |
|
|
instrumentation code can be added to the block; otherwise, a new basic
|
| 3284 |
|
|
block must be created to hold the instrumentation code.
|
| 3285 |
|
|
.RE
|
| 3286 |
|
|
.IP "\fB\-ftest\-coverage\fR" 4
|
| 3287 |
|
|
.IX Item "-ftest-coverage"
|
| 3288 |
|
|
Produce a notes file that the \fBgcov\fR code-coverage utility can use to
|
| 3289 |
|
|
show program coverage. Each source file's note file is called
|
| 3290 |
|
|
\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
|
| 3291 |
|
|
above for a description of \fIauxname\fR and instructions on how to
|
| 3292 |
|
|
generate test coverage data. Coverage data will match the source files
|
| 3293 |
|
|
more closely, if you do not optimize.
|
| 3294 |
|
|
.IP "\fB\-d\fR\fIletters\fR" 4
|
| 3295 |
|
|
.IX Item "-dletters"
|
| 3296 |
|
|
.PD 0
|
| 3297 |
|
|
.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
|
| 3298 |
|
|
.IX Item "-fdump-rtl-pass"
|
| 3299 |
|
|
.PD
|
| 3300 |
|
|
Says to make debugging dumps during compilation at times specified by
|
| 3301 |
|
|
\&\fIletters\fR. This is used for debugging the RTL-based passes of the
|
| 3302 |
|
|
compiler. The file names for most of the dumps are made by appending a
|
| 3303 |
|
|
pass number and a word to the \fIdumpname\fR. \fIdumpname\fR is generated
|
| 3304 |
|
|
from the name of the output file, if explicitly specified and it is not
|
| 3305 |
|
|
an executable, otherwise it is the basename of the source file.
|
| 3306 |
|
|
.Sp
|
| 3307 |
|
|
Most debug dumps can be enabled either passing a letter to the \fB\-d\fR
|
| 3308 |
|
|
option, or with a long \fB\-fdump\-rtl\fR switch; here are the possible
|
| 3309 |
|
|
letters for use in \fIletters\fR and \fIpass\fR, and their meanings:
|
| 3310 |
|
|
.RS 4
|
| 3311 |
|
|
.IP "\fB\-dA\fR" 4
|
| 3312 |
|
|
.IX Item "-dA"
|
| 3313 |
|
|
Annotate the assembler output with miscellaneous debugging information.
|
| 3314 |
|
|
.IP "\fB\-db\fR" 4
|
| 3315 |
|
|
.IX Item "-db"
|
| 3316 |
|
|
.PD 0
|
| 3317 |
|
|
.IP "\fB\-fdump\-rtl\-bp\fR" 4
|
| 3318 |
|
|
.IX Item "-fdump-rtl-bp"
|
| 3319 |
|
|
.PD
|
| 3320 |
|
|
Dump after computing branch probabilities, to \fI\fIfile\fI.09.bp\fR.
|
| 3321 |
|
|
.IP "\fB\-dB\fR" 4
|
| 3322 |
|
|
.IX Item "-dB"
|
| 3323 |
|
|
.PD 0
|
| 3324 |
|
|
.IP "\fB\-fdump\-rtl\-bbro\fR" 4
|
| 3325 |
|
|
.IX Item "-fdump-rtl-bbro"
|
| 3326 |
|
|
.PD
|
| 3327 |
|
|
Dump after block reordering, to \fI\fIfile\fI.30.bbro\fR.
|
| 3328 |
|
|
.IP "\fB\-dc\fR" 4
|
| 3329 |
|
|
.IX Item "-dc"
|
| 3330 |
|
|
.PD 0
|
| 3331 |
|
|
.IP "\fB\-fdump\-rtl\-combine\fR" 4
|
| 3332 |
|
|
.IX Item "-fdump-rtl-combine"
|
| 3333 |
|
|
.PD
|
| 3334 |
|
|
Dump after instruction combination, to the file \fI\fIfile\fI.17.combine\fR.
|
| 3335 |
|
|
.IP "\fB\-dC\fR" 4
|
| 3336 |
|
|
.IX Item "-dC"
|
| 3337 |
|
|
.PD 0
|
| 3338 |
|
|
.IP "\fB\-fdump\-rtl\-ce1\fR" 4
|
| 3339 |
|
|
.IX Item "-fdump-rtl-ce1"
|
| 3340 |
|
|
.IP "\fB\-fdump\-rtl\-ce2\fR" 4
|
| 3341 |
|
|
.IX Item "-fdump-rtl-ce2"
|
| 3342 |
|
|
.PD
|
| 3343 |
|
|
\&\fB\-dC\fR and \fB\-fdump\-rtl\-ce1\fR enable dumping after the
|
| 3344 |
|
|
first if conversion, to the file \fI\fIfile\fI.11.ce1\fR. \fB\-dC\fR
|
| 3345 |
|
|
and \fB\-fdump\-rtl\-ce2\fR enable dumping after the second if
|
| 3346 |
|
|
conversion, to the file \fI\fIfile\fI.18.ce2\fR.
|
| 3347 |
|
|
.IP "\fB\-dd\fR" 4
|
| 3348 |
|
|
.IX Item "-dd"
|
| 3349 |
|
|
.PD 0
|
| 3350 |
|
|
.IP "\fB\-fdump\-rtl\-btl\fR" 4
|
| 3351 |
|
|
.IX Item "-fdump-rtl-btl"
|
| 3352 |
|
|
.IP "\fB\-fdump\-rtl\-dbr\fR" 4
|
| 3353 |
|
|
.IX Item "-fdump-rtl-dbr"
|
| 3354 |
|
|
.PD
|
| 3355 |
|
|
\&\fB\-dd\fR and \fB\-fdump\-rtl\-btl\fR enable dumping after branch
|
| 3356 |
|
|
target load optimization, to \fI\fIfile\fI.31.btl\fR. \fB\-dd\fR
|
| 3357 |
|
|
and \fB\-fdump\-rtl\-dbr\fR enable dumping after delayed branch
|
| 3358 |
|
|
scheduling, to \fI\fIfile\fI.36.dbr\fR.
|
| 3359 |
|
|
.IP "\fB\-dD\fR" 4
|
| 3360 |
|
|
.IX Item "-dD"
|
| 3361 |
|
|
Dump all macro definitions, at the end of preprocessing, in addition to
|
| 3362 |
|
|
normal output.
|
| 3363 |
|
|
.IP "\fB\-dE\fR" 4
|
| 3364 |
|
|
.IX Item "-dE"
|
| 3365 |
|
|
.PD 0
|
| 3366 |
|
|
.IP "\fB\-fdump\-rtl\-ce3\fR" 4
|
| 3367 |
|
|
.IX Item "-fdump-rtl-ce3"
|
| 3368 |
|
|
.PD
|
| 3369 |
|
|
Dump after the third if conversion, to \fI\fIfile\fI.28.ce3\fR.
|
| 3370 |
|
|
.IP "\fB\-df\fR" 4
|
| 3371 |
|
|
.IX Item "-df"
|
| 3372 |
|
|
.PD 0
|
| 3373 |
|
|
.IP "\fB\-fdump\-rtl\-cfg\fR" 4
|
| 3374 |
|
|
.IX Item "-fdump-rtl-cfg"
|
| 3375 |
|
|
.IP "\fB\-fdump\-rtl\-life\fR" 4
|
| 3376 |
|
|
.IX Item "-fdump-rtl-life"
|
| 3377 |
|
|
.PD
|
| 3378 |
|
|
\&\fB\-df\fR and \fB\-fdump\-rtl\-cfg\fR enable dumping after control
|
| 3379 |
|
|
and data flow analysis, to \fI\fIfile\fI.08.cfg\fR. \fB\-df\fR
|
| 3380 |
|
|
and \fB\-fdump\-rtl\-cfg\fR enable dumping dump after life analysis,
|
| 3381 |
|
|
to \fI\fIfile\fI.16.life\fR.
|
| 3382 |
|
|
.IP "\fB\-dg\fR" 4
|
| 3383 |
|
|
.IX Item "-dg"
|
| 3384 |
|
|
.PD 0
|
| 3385 |
|
|
.IP "\fB\-fdump\-rtl\-greg\fR" 4
|
| 3386 |
|
|
.IX Item "-fdump-rtl-greg"
|
| 3387 |
|
|
.PD
|
| 3388 |
|
|
Dump after global register allocation, to \fI\fIfile\fI.23.greg\fR.
|
| 3389 |
|
|
.IP "\fB\-dG\fR" 4
|
| 3390 |
|
|
.IX Item "-dG"
|
| 3391 |
|
|
.PD 0
|
| 3392 |
|
|
.IP "\fB\-fdump\-rtl\-gcse\fR" 4
|
| 3393 |
|
|
.IX Item "-fdump-rtl-gcse"
|
| 3394 |
|
|
.IP "\fB\-fdump\-rtl\-bypass\fR" 4
|
| 3395 |
|
|
.IX Item "-fdump-rtl-bypass"
|
| 3396 |
|
|
.PD
|
| 3397 |
|
|
\&\fB\-dG\fR and \fB\-fdump\-rtl\-gcse\fR enable dumping after \s-1GCSE\s0, to
|
| 3398 |
|
|
\&\fI\fIfile\fI.05.gcse\fR. \fB\-dG\fR and \fB\-fdump\-rtl\-bypass\fR
|
| 3399 |
|
|
enable dumping after jump bypassing and control flow optimizations, to
|
| 3400 |
|
|
\&\fI\fIfile\fI.07.bypass\fR.
|
| 3401 |
|
|
.IP "\fB\-dh\fR" 4
|
| 3402 |
|
|
.IX Item "-dh"
|
| 3403 |
|
|
.PD 0
|
| 3404 |
|
|
.IP "\fB\-fdump\-rtl\-eh\fR" 4
|
| 3405 |
|
|
.IX Item "-fdump-rtl-eh"
|
| 3406 |
|
|
.PD
|
| 3407 |
|
|
Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.02.eh\fR.
|
| 3408 |
|
|
.IP "\fB\-di\fR" 4
|
| 3409 |
|
|
.IX Item "-di"
|
| 3410 |
|
|
.PD 0
|
| 3411 |
|
|
.IP "\fB\-fdump\-rtl\-sibling\fR" 4
|
| 3412 |
|
|
.IX Item "-fdump-rtl-sibling"
|
| 3413 |
|
|
.PD
|
| 3414 |
|
|
Dump after sibling call optimizations, to \fI\fIfile\fI.01.sibling\fR.
|
| 3415 |
|
|
.IP "\fB\-dj\fR" 4
|
| 3416 |
|
|
.IX Item "-dj"
|
| 3417 |
|
|
.PD 0
|
| 3418 |
|
|
.IP "\fB\-fdump\-rtl\-jump\fR" 4
|
| 3419 |
|
|
.IX Item "-fdump-rtl-jump"
|
| 3420 |
|
|
.PD
|
| 3421 |
|
|
Dump after the first jump optimization, to \fI\fIfile\fI.03.jump\fR.
|
| 3422 |
|
|
.IP "\fB\-dk\fR" 4
|
| 3423 |
|
|
.IX Item "-dk"
|
| 3424 |
|
|
.PD 0
|
| 3425 |
|
|
.IP "\fB\-fdump\-rtl\-stack\fR" 4
|
| 3426 |
|
|
.IX Item "-fdump-rtl-stack"
|
| 3427 |
|
|
.PD
|
| 3428 |
|
|
Dump after conversion from registers to stack, to \fI\fIfile\fI.33.stack\fR.
|
| 3429 |
|
|
.IP "\fB\-dl\fR" 4
|
| 3430 |
|
|
.IX Item "-dl"
|
| 3431 |
|
|
.PD 0
|
| 3432 |
|
|
.IP "\fB\-fdump\-rtl\-lreg\fR" 4
|
| 3433 |
|
|
.IX Item "-fdump-rtl-lreg"
|
| 3434 |
|
|
.PD
|
| 3435 |
|
|
Dump after local register allocation, to \fI\fIfile\fI.22.lreg\fR.
|
| 3436 |
|
|
.IP "\fB\-dL\fR" 4
|
| 3437 |
|
|
.IX Item "-dL"
|
| 3438 |
|
|
.PD 0
|
| 3439 |
|
|
.IP "\fB\-fdump\-rtl\-loop\fR" 4
|
| 3440 |
|
|
.IX Item "-fdump-rtl-loop"
|
| 3441 |
|
|
.IP "\fB\-fdump\-rtl\-loop2\fR" 4
|
| 3442 |
|
|
.IX Item "-fdump-rtl-loop2"
|
| 3443 |
|
|
.PD
|
| 3444 |
|
|
\&\fB\-dL\fR and \fB\-fdump\-rtl\-loop\fR enable dumping after the first
|
| 3445 |
|
|
loop optimization pass, to \fI\fIfile\fI.06.loop\fR. \fB\-dL\fR and
|
| 3446 |
|
|
\&\fB\-fdump\-rtl\-loop2\fR enable dumping after the second pass, to
|
| 3447 |
|
|
\&\fI\fIfile\fI.13.loop2\fR.
|
| 3448 |
|
|
.IP "\fB\-dm\fR" 4
|
| 3449 |
|
|
.IX Item "-dm"
|
| 3450 |
|
|
.PD 0
|
| 3451 |
|
|
.IP "\fB\-fdump\-rtl\-sms\fR" 4
|
| 3452 |
|
|
.IX Item "-fdump-rtl-sms"
|
| 3453 |
|
|
.PD
|
| 3454 |
|
|
Dump after modulo scheduling, to \fI\fIfile\fI.20.sms\fR.
|
| 3455 |
|
|
.IP "\fB\-dM\fR" 4
|
| 3456 |
|
|
.IX Item "-dM"
|
| 3457 |
|
|
.PD 0
|
| 3458 |
|
|
.IP "\fB\-fdump\-rtl\-mach\fR" 4
|
| 3459 |
|
|
.IX Item "-fdump-rtl-mach"
|
| 3460 |
|
|
.PD
|
| 3461 |
|
|
Dump after performing the machine dependent reorganization pass, to
|
| 3462 |
|
|
\&\fI\fIfile\fI.35.mach\fR.
|
| 3463 |
|
|
.IP "\fB\-dn\fR" 4
|
| 3464 |
|
|
.IX Item "-dn"
|
| 3465 |
|
|
.PD 0
|
| 3466 |
|
|
.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
|
| 3467 |
|
|
.IX Item "-fdump-rtl-rnreg"
|
| 3468 |
|
|
.PD
|
| 3469 |
|
|
Dump after register renumbering, to \fI\fIfile\fI.29.rnreg\fR.
|
| 3470 |
|
|
.IP "\fB\-dN\fR" 4
|
| 3471 |
|
|
.IX Item "-dN"
|
| 3472 |
|
|
.PD 0
|
| 3473 |
|
|
.IP "\fB\-fdump\-rtl\-regmove\fR" 4
|
| 3474 |
|
|
.IX Item "-fdump-rtl-regmove"
|
| 3475 |
|
|
.PD
|
| 3476 |
|
|
Dump after the register move pass, to \fI\fIfile\fI.19.regmove\fR.
|
| 3477 |
|
|
.IP "\fB\-do\fR" 4
|
| 3478 |
|
|
.IX Item "-do"
|
| 3479 |
|
|
.PD 0
|
| 3480 |
|
|
.IP "\fB\-fdump\-rtl\-postreload\fR" 4
|
| 3481 |
|
|
.IX Item "-fdump-rtl-postreload"
|
| 3482 |
|
|
.PD
|
| 3483 |
|
|
Dump after post-reload optimizations, to \fI\fIfile\fI.24.postreload\fR.
|
| 3484 |
|
|
.IP "\fB\-dr\fR" 4
|
| 3485 |
|
|
.IX Item "-dr"
|
| 3486 |
|
|
.PD 0
|
| 3487 |
|
|
.IP "\fB\-fdump\-rtl\-expand\fR" 4
|
| 3488 |
|
|
.IX Item "-fdump-rtl-expand"
|
| 3489 |
|
|
.PD
|
| 3490 |
|
|
Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.00.expand\fR.
|
| 3491 |
|
|
.IP "\fB\-dR\fR" 4
|
| 3492 |
|
|
.IX Item "-dR"
|
| 3493 |
|
|
.PD 0
|
| 3494 |
|
|
.IP "\fB\-fdump\-rtl\-sched2\fR" 4
|
| 3495 |
|
|
.IX Item "-fdump-rtl-sched2"
|
| 3496 |
|
|
.PD
|
| 3497 |
|
|
Dump after the second scheduling pass, to \fI\fIfile\fI.32.sched2\fR.
|
| 3498 |
|
|
.IP "\fB\-ds\fR" 4
|
| 3499 |
|
|
.IX Item "-ds"
|
| 3500 |
|
|
.PD 0
|
| 3501 |
|
|
.IP "\fB\-fdump\-rtl\-cse\fR" 4
|
| 3502 |
|
|
.IX Item "-fdump-rtl-cse"
|
| 3503 |
|
|
.PD
|
| 3504 |
|
|
Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows
|
| 3505 |
|
|
\&\s-1CSE\s0), to \fI\fIfile\fI.04.cse\fR.
|
| 3506 |
|
|
.IP "\fB\-dS\fR" 4
|
| 3507 |
|
|
.IX Item "-dS"
|
| 3508 |
|
|
.PD 0
|
| 3509 |
|
|
.IP "\fB\-fdump\-rtl\-sched\fR" 4
|
| 3510 |
|
|
.IX Item "-fdump-rtl-sched"
|
| 3511 |
|
|
.PD
|
| 3512 |
|
|
Dump after the first scheduling pass, to \fI\fIfile\fI.21.sched\fR.
|
| 3513 |
|
|
.IP "\fB\-dt\fR" 4
|
| 3514 |
|
|
.IX Item "-dt"
|
| 3515 |
|
|
.PD 0
|
| 3516 |
|
|
.IP "\fB\-fdump\-rtl\-cse2\fR" 4
|
| 3517 |
|
|
.IX Item "-fdump-rtl-cse2"
|
| 3518 |
|
|
.PD
|
| 3519 |
|
|
Dump after the second \s-1CSE\s0 pass (including the jump optimization that
|
| 3520 |
|
|
sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.15.cse2\fR.
|
| 3521 |
|
|
.IP "\fB\-dT\fR" 4
|
| 3522 |
|
|
.IX Item "-dT"
|
| 3523 |
|
|
.PD 0
|
| 3524 |
|
|
.IP "\fB\-fdump\-rtl\-tracer\fR" 4
|
| 3525 |
|
|
.IX Item "-fdump-rtl-tracer"
|
| 3526 |
|
|
.PD
|
| 3527 |
|
|
Dump after running tracer, to \fI\fIfile\fI.12.tracer\fR.
|
| 3528 |
|
|
.IP "\fB\-dV\fR" 4
|
| 3529 |
|
|
.IX Item "-dV"
|
| 3530 |
|
|
.PD 0
|
| 3531 |
|
|
.IP "\fB\-fdump\-rtl\-vpt\fR" 4
|
| 3532 |
|
|
.IX Item "-fdump-rtl-vpt"
|
| 3533 |
|
|
.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
|
| 3534 |
|
|
.IX Item "-fdump-rtl-vartrack"
|
| 3535 |
|
|
.PD
|
| 3536 |
|
|
\&\fB\-dV\fR and \fB\-fdump\-rtl\-vpt\fR enable dumping after the value
|
| 3537 |
|
|
profile transformations, to \fI\fIfile\fI.10.vpt\fR. \fB\-dV\fR
|
| 3538 |
|
|
and \fB\-fdump\-rtl\-vartrack\fR enable dumping after variable tracking,
|
| 3539 |
|
|
to \fI\fIfile\fI.34.vartrack\fR.
|
| 3540 |
|
|
.IP "\fB\-dw\fR" 4
|
| 3541 |
|
|
.IX Item "-dw"
|
| 3542 |
|
|
.PD 0
|
| 3543 |
|
|
.IP "\fB\-fdump\-rtl\-flow2\fR" 4
|
| 3544 |
|
|
.IX Item "-fdump-rtl-flow2"
|
| 3545 |
|
|
.PD
|
| 3546 |
|
|
Dump after the second flow pass, to \fI\fIfile\fI.26.flow2\fR.
|
| 3547 |
|
|
.IP "\fB\-dz\fR" 4
|
| 3548 |
|
|
.IX Item "-dz"
|
| 3549 |
|
|
.PD 0
|
| 3550 |
|
|
.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
|
| 3551 |
|
|
.IX Item "-fdump-rtl-peephole2"
|
| 3552 |
|
|
.PD
|
| 3553 |
|
|
Dump after the peephole pass, to \fI\fIfile\fI.27.peephole2\fR.
|
| 3554 |
|
|
.IP "\fB\-dZ\fR" 4
|
| 3555 |
|
|
.IX Item "-dZ"
|
| 3556 |
|
|
.PD 0
|
| 3557 |
|
|
.IP "\fB\-fdump\-rtl\-web\fR" 4
|
| 3558 |
|
|
.IX Item "-fdump-rtl-web"
|
| 3559 |
|
|
.PD
|
| 3560 |
|
|
Dump after live range splitting, to \fI\fIfile\fI.14.web\fR.
|
| 3561 |
|
|
.IP "\fB\-da\fR" 4
|
| 3562 |
|
|
.IX Item "-da"
|
| 3563 |
|
|
.PD 0
|
| 3564 |
|
|
.IP "\fB\-fdump\-rtl\-all\fR" 4
|
| 3565 |
|
|
.IX Item "-fdump-rtl-all"
|
| 3566 |
|
|
.PD
|
| 3567 |
|
|
Produce all the dumps listed above.
|
| 3568 |
|
|
.IP "\fB\-dH\fR" 4
|
| 3569 |
|
|
.IX Item "-dH"
|
| 3570 |
|
|
Produce a core dump whenever an error occurs.
|
| 3571 |
|
|
.IP "\fB\-dm\fR" 4
|
| 3572 |
|
|
.IX Item "-dm"
|
| 3573 |
|
|
Print statistics on memory usage, at the end of the run, to
|
| 3574 |
|
|
standard error.
|
| 3575 |
|
|
.IP "\fB\-dp\fR" 4
|
| 3576 |
|
|
.IX Item "-dp"
|
| 3577 |
|
|
Annotate the assembler output with a comment indicating which
|
| 3578 |
|
|
pattern and alternative was used. The length of each instruction is
|
| 3579 |
|
|
also printed.
|
| 3580 |
|
|
.IP "\fB\-dP\fR" 4
|
| 3581 |
|
|
.IX Item "-dP"
|
| 3582 |
|
|
Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
|
| 3583 |
|
|
Also turns on \fB\-dp\fR annotation.
|
| 3584 |
|
|
.IP "\fB\-dv\fR" 4
|
| 3585 |
|
|
.IX Item "-dv"
|
| 3586 |
|
|
For each of the other indicated dump files (either with \fB\-d\fR or
|
| 3587 |
|
|
\&\fB\-fdump\-rtl\-\fR\fIpass\fR), dump a representation of the control flow
|
| 3588 |
|
|
graph suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
|
| 3589 |
|
|
.IP "\fB\-dx\fR" 4
|
| 3590 |
|
|
.IX Item "-dx"
|
| 3591 |
|
|
Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
|
| 3592 |
|
|
with \fBr\fR (\fB\-fdump\-rtl\-expand\fR).
|
| 3593 |
|
|
.IP "\fB\-dy\fR" 4
|
| 3594 |
|
|
.IX Item "-dy"
|
| 3595 |
|
|
Dump debugging information during parsing, to standard error.
|
| 3596 |
|
|
.RE
|
| 3597 |
|
|
.RS 4
|
| 3598 |
|
|
.RE
|
| 3599 |
|
|
.IP "\fB\-fdump\-unnumbered\fR" 4
|
| 3600 |
|
|
.IX Item "-fdump-unnumbered"
|
| 3601 |
|
|
When doing debugging dumps (see \fB\-d\fR option above), suppress instruction
|
| 3602 |
|
|
numbers and line number note output. This makes it more feasible to
|
| 3603 |
|
|
use diff on debugging dumps for compiler invocations with different
|
| 3604 |
|
|
options, in particular with and without \fB\-g\fR.
|
| 3605 |
|
|
.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
|
| 3606 |
|
|
.IX Item "-fdump-translation-unit ( only)"
|
| 3607 |
|
|
.PD 0
|
| 3608 |
|
|
.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
|
| 3609 |
|
|
.IX Item "-fdump-translation-unit-options ( only)"
|
| 3610 |
|
|
.PD
|
| 3611 |
|
|
Dump a representation of the tree structure for the entire translation
|
| 3612 |
|
|
unit to a file. The file name is made by appending \fI.tu\fR to the
|
| 3613 |
|
|
source file name. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
|
| 3614 |
|
|
controls the details of the dump as described for the
|
| 3615 |
|
|
\&\fB\-fdump\-tree\fR options.
|
| 3616 |
|
|
.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
|
| 3617 |
|
|
.IX Item "-fdump-class-hierarchy ( only)"
|
| 3618 |
|
|
.PD 0
|
| 3619 |
|
|
.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
|
| 3620 |
|
|
.IX Item "-fdump-class-hierarchy-options ( only)"
|
| 3621 |
|
|
.PD
|
| 3622 |
|
|
Dump a representation of each class's hierarchy and virtual function
|
| 3623 |
|
|
table layout to a file. The file name is made by appending \fI.class\fR
|
| 3624 |
|
|
to the source file name. If the \fB\-\fR\fIoptions\fR form is used,
|
| 3625 |
|
|
\&\fIoptions\fR controls the details of the dump as described for the
|
| 3626 |
|
|
\&\fB\-fdump\-tree\fR options.
|
| 3627 |
|
|
.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
|
| 3628 |
|
|
.IX Item "-fdump-ipa-switch"
|
| 3629 |
|
|
Control the dumping at various stages of inter-procedural analysis
|
| 3630 |
|
|
language tree to a file. The file name is generated by appending a switch
|
| 3631 |
|
|
specific suffix to the source file name. The following dumps are possible:
|
| 3632 |
|
|
.RS 4
|
| 3633 |
|
|
.IP "\fBall\fR" 4
|
| 3634 |
|
|
.IX Item "all"
|
| 3635 |
|
|
Enables all inter-procedural analysis dumps; currently the only produced
|
| 3636 |
|
|
dump is the \fBcgraph\fR dump.
|
| 3637 |
|
|
.IP "\fBcgraph\fR" 4
|
| 3638 |
|
|
.IX Item "cgraph"
|
| 3639 |
|
|
Dumps information about call-graph optimization, unused function removal,
|
| 3640 |
|
|
and inlining decisions.
|
| 3641 |
|
|
.RE
|
| 3642 |
|
|
.RS 4
|
| 3643 |
|
|
.RE
|
| 3644 |
|
|
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
|
| 3645 |
|
|
.IX Item "-fdump-tree-switch"
|
| 3646 |
|
|
.PD 0
|
| 3647 |
|
|
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
|
| 3648 |
|
|
.IX Item "-fdump-tree-switch-options"
|
| 3649 |
|
|
.PD
|
| 3650 |
|
|
Control the dumping at various stages of processing the intermediate
|
| 3651 |
|
|
language tree to a file. The file name is generated by appending a switch
|
| 3652 |
|
|
specific suffix to the source file name. If the \fB\-\fR\fIoptions\fR
|
| 3653 |
|
|
form is used, \fIoptions\fR is a list of \fB\-\fR separated options that
|
| 3654 |
|
|
control the details of the dump. Not all options are applicable to all
|
| 3655 |
|
|
dumps, those which are not meaningful will be ignored. The following
|
| 3656 |
|
|
options are available
|
| 3657 |
|
|
.RS 4
|
| 3658 |
|
|
.IP "\fBaddress\fR" 4
|
| 3659 |
|
|
.IX Item "address"
|
| 3660 |
|
|
Print the address of each node. Usually this is not meaningful as it
|
| 3661 |
|
|
changes according to the environment and source file. Its primary use
|
| 3662 |
|
|
is for tying up a dump file with a debug environment.
|
| 3663 |
|
|
.IP "\fBslim\fR" 4
|
| 3664 |
|
|
.IX Item "slim"
|
| 3665 |
|
|
Inhibit dumping of members of a scope or body of a function merely
|
| 3666 |
|
|
because that scope has been reached. Only dump such items when they
|
| 3667 |
|
|
are directly reachable by some other path. When dumping pretty-printed
|
| 3668 |
|
|
trees, this option inhibits dumping the bodies of control structures.
|
| 3669 |
|
|
.IP "\fBraw\fR" 4
|
| 3670 |
|
|
.IX Item "raw"
|
| 3671 |
|
|
Print a raw representation of the tree. By default, trees are
|
| 3672 |
|
|
pretty-printed into a C\-like representation.
|
| 3673 |
|
|
.IP "\fBdetails\fR" 4
|
| 3674 |
|
|
.IX Item "details"
|
| 3675 |
|
|
Enable more detailed dumps (not honored by every dump option).
|
| 3676 |
|
|
.IP "\fBstats\fR" 4
|
| 3677 |
|
|
.IX Item "stats"
|
| 3678 |
|
|
Enable dumping various statistics about the pass (not honored by every dump
|
| 3679 |
|
|
option).
|
| 3680 |
|
|
.IP "\fBblocks\fR" 4
|
| 3681 |
|
|
.IX Item "blocks"
|
| 3682 |
|
|
Enable showing basic block boundaries (disabled in raw dumps).
|
| 3683 |
|
|
.IP "\fBvops\fR" 4
|
| 3684 |
|
|
.IX Item "vops"
|
| 3685 |
|
|
Enable showing virtual operands for every statement.
|
| 3686 |
|
|
.IP "\fBlineno\fR" 4
|
| 3687 |
|
|
.IX Item "lineno"
|
| 3688 |
|
|
Enable showing line numbers for statements.
|
| 3689 |
|
|
.IP "\fBuid\fR" 4
|
| 3690 |
|
|
.IX Item "uid"
|
| 3691 |
|
|
Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
|
| 3692 |
|
|
.IP "\fBall\fR" 4
|
| 3693 |
|
|
.IX Item "all"
|
| 3694 |
|
|
Turn on all options, except \fBraw\fR, \fBslim\fR and \fBlineno\fR.
|
| 3695 |
|
|
.RE
|
| 3696 |
|
|
.RS 4
|
| 3697 |
|
|
.Sp
|
| 3698 |
|
|
The following tree dumps are possible:
|
| 3699 |
|
|
.IP "\fBoriginal\fR" 4
|
| 3700 |
|
|
.IX Item "original"
|
| 3701 |
|
|
Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
|
| 3702 |
|
|
.IP "\fBoptimized\fR" 4
|
| 3703 |
|
|
.IX Item "optimized"
|
| 3704 |
|
|
Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
|
| 3705 |
|
|
.IP "\fBinlined\fR" 4
|
| 3706 |
|
|
.IX Item "inlined"
|
| 3707 |
|
|
Dump after function inlining, to \fI\fIfile\fI.inlined\fR.
|
| 3708 |
|
|
.IP "\fBgimple\fR" 4
|
| 3709 |
|
|
.IX Item "gimple"
|
| 3710 |
|
|
Dump each function before and after the gimplification pass to a file. The
|
| 3711 |
|
|
file name is made by appending \fI.gimple\fR to the source file name.
|
| 3712 |
|
|
.IP "\fBcfg\fR" 4
|
| 3713 |
|
|
.IX Item "cfg"
|
| 3714 |
|
|
Dump the control flow graph of each function to a file. The file name is
|
| 3715 |
|
|
made by appending \fI.cfg\fR to the source file name.
|
| 3716 |
|
|
.IP "\fBvcg\fR" 4
|
| 3717 |
|
|
.IX Item "vcg"
|
| 3718 |
|
|
Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
|
| 3719 |
|
|
file name is made by appending \fI.vcg\fR to the source file name. Note
|
| 3720 |
|
|
that if the file contains more than one function, the generated file cannot
|
| 3721 |
|
|
be used directly by \s-1VCG\s0. You will need to cut and paste each function's
|
| 3722 |
|
|
graph into its own separate file first.
|
| 3723 |
|
|
.IP "\fBch\fR" 4
|
| 3724 |
|
|
.IX Item "ch"
|
| 3725 |
|
|
Dump each function after copying loop headers. The file name is made by
|
| 3726 |
|
|
appending \fI.ch\fR to the source file name.
|
| 3727 |
|
|
.IP "\fBssa\fR" 4
|
| 3728 |
|
|
.IX Item "ssa"
|
| 3729 |
|
|
Dump \s-1SSA\s0 related information to a file. The file name is made by appending
|
| 3730 |
|
|
\&\fI.ssa\fR to the source file name.
|
| 3731 |
|
|
.IP "\fBsalias\fR" 4
|
| 3732 |
|
|
.IX Item "salias"
|
| 3733 |
|
|
Dump structure aliasing variable information to a file. This file name
|
| 3734 |
|
|
is made by appending \fI.salias\fR to the source file name.
|
| 3735 |
|
|
.IP "\fBalias\fR" 4
|
| 3736 |
|
|
.IX Item "alias"
|
| 3737 |
|
|
Dump aliasing information for each function. The file name is made by
|
| 3738 |
|
|
appending \fI.alias\fR to the source file name.
|
| 3739 |
|
|
.IP "\fBccp\fR" 4
|
| 3740 |
|
|
.IX Item "ccp"
|
| 3741 |
|
|
Dump each function after \s-1CCP\s0. The file name is made by appending
|
| 3742 |
|
|
\&\fI.ccp\fR to the source file name.
|
| 3743 |
|
|
.IP "\fBstoreccp\fR" 4
|
| 3744 |
|
|
.IX Item "storeccp"
|
| 3745 |
|
|
Dump each function after \s-1STORE\-CCP\s0. The file name is made by appending
|
| 3746 |
|
|
\&\fI.storeccp\fR to the source file name.
|
| 3747 |
|
|
.IP "\fBpre\fR" 4
|
| 3748 |
|
|
.IX Item "pre"
|
| 3749 |
|
|
Dump trees after partial redundancy elimination. The file name is made
|
| 3750 |
|
|
by appending \fI.pre\fR to the source file name.
|
| 3751 |
|
|
.IP "\fBfre\fR" 4
|
| 3752 |
|
|
.IX Item "fre"
|
| 3753 |
|
|
Dump trees after full redundancy elimination. The file name is made
|
| 3754 |
|
|
by appending \fI.fre\fR to the source file name.
|
| 3755 |
|
|
.IP "\fBcopyprop\fR" 4
|
| 3756 |
|
|
.IX Item "copyprop"
|
| 3757 |
|
|
Dump trees after copy propagation. The file name is made
|
| 3758 |
|
|
by appending \fI.copyprop\fR to the source file name.
|
| 3759 |
|
|
.IP "\fBstore_copyprop\fR" 4
|
| 3760 |
|
|
.IX Item "store_copyprop"
|
| 3761 |
|
|
Dump trees after store copy\-propagation. The file name is made
|
| 3762 |
|
|
by appending \fI.store_copyprop\fR to the source file name.
|
| 3763 |
|
|
.IP "\fBdce\fR" 4
|
| 3764 |
|
|
.IX Item "dce"
|
| 3765 |
|
|
Dump each function after dead code elimination. The file name is made by
|
| 3766 |
|
|
appending \fI.dce\fR to the source file name.
|
| 3767 |
|
|
.IP "\fBmudflap\fR" 4
|
| 3768 |
|
|
.IX Item "mudflap"
|
| 3769 |
|
|
Dump each function after adding mudflap instrumentation. The file name is
|
| 3770 |
|
|
made by appending \fI.mudflap\fR to the source file name.
|
| 3771 |
|
|
.IP "\fBsra\fR" 4
|
| 3772 |
|
|
.IX Item "sra"
|
| 3773 |
|
|
Dump each function after performing scalar replacement of aggregates. The
|
| 3774 |
|
|
file name is made by appending \fI.sra\fR to the source file name.
|
| 3775 |
|
|
.IP "\fBsink\fR" 4
|
| 3776 |
|
|
.IX Item "sink"
|
| 3777 |
|
|
Dump each function after performing code sinking. The file name is made
|
| 3778 |
|
|
by appending \fI.sink\fR to the source file name.
|
| 3779 |
|
|
.IP "\fBdom\fR" 4
|
| 3780 |
|
|
.IX Item "dom"
|
| 3781 |
|
|
Dump each function after applying dominator tree optimizations. The file
|
| 3782 |
|
|
name is made by appending \fI.dom\fR to the source file name.
|
| 3783 |
|
|
.IP "\fBdse\fR" 4
|
| 3784 |
|
|
.IX Item "dse"
|
| 3785 |
|
|
Dump each function after applying dead store elimination. The file
|
| 3786 |
|
|
name is made by appending \fI.dse\fR to the source file name.
|
| 3787 |
|
|
.IP "\fBphiopt\fR" 4
|
| 3788 |
|
|
.IX Item "phiopt"
|
| 3789 |
|
|
Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
|
| 3790 |
|
|
name is made by appending \fI.phiopt\fR to the source file name.
|
| 3791 |
|
|
.IP "\fBforwprop\fR" 4
|
| 3792 |
|
|
.IX Item "forwprop"
|
| 3793 |
|
|
Dump each function after forward propagating single use variables. The file
|
| 3794 |
|
|
name is made by appending \fI.forwprop\fR to the source file name.
|
| 3795 |
|
|
.IP "\fBcopyrename\fR" 4
|
| 3796 |
|
|
.IX Item "copyrename"
|
| 3797 |
|
|
Dump each function after applying the copy rename optimization. The file
|
| 3798 |
|
|
name is made by appending \fI.copyrename\fR to the source file name.
|
| 3799 |
|
|
.IP "\fBnrv\fR" 4
|
| 3800 |
|
|
.IX Item "nrv"
|
| 3801 |
|
|
Dump each function after applying the named return value optimization on
|
| 3802 |
|
|
generic trees. The file name is made by appending \fI.nrv\fR to the source
|
| 3803 |
|
|
file name.
|
| 3804 |
|
|
.IP "\fBvect\fR" 4
|
| 3805 |
|
|
.IX Item "vect"
|
| 3806 |
|
|
Dump each function after applying vectorization of loops. The file name is
|
| 3807 |
|
|
made by appending \fI.vect\fR to the source file name.
|
| 3808 |
|
|
.IP "\fBvrp\fR" 4
|
| 3809 |
|
|
.IX Item "vrp"
|
| 3810 |
|
|
Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
|
| 3811 |
|
|
is made by appending \fI.vrp\fR to the source file name.
|
| 3812 |
|
|
.IP "\fBall\fR" 4
|
| 3813 |
|
|
.IX Item "all"
|
| 3814 |
|
|
Enable all the available tree dumps with the flags provided in this option.
|
| 3815 |
|
|
.RE
|
| 3816 |
|
|
.RS 4
|
| 3817 |
|
|
.RE
|
| 3818 |
|
|
.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
|
| 3819 |
|
|
.IX Item "-ftree-vectorizer-verbose=n"
|
| 3820 |
|
|
This option controls the amount of debugging output the vectorizer prints.
|
| 3821 |
|
|
This information is written to standard error, unless \fB\-fdump\-tree\-all\fR
|
| 3822 |
|
|
or \fB\-fdump\-tree\-vect\fR is specified, in which case it is output to the
|
| 3823 |
|
|
usual dump listing file, \fI.vect\fR.
|
| 3824 |
|
|
.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
|
| 3825 |
|
|
.IX Item "-frandom-seed=string"
|
| 3826 |
|
|
This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
|
| 3827 |
|
|
random numbers. It is used to generate certain symbol names
|
| 3828 |
|
|
that have to be different in every compiled file. It is also used to
|
| 3829 |
|
|
place unique stamps in coverage data files and the object files that
|
| 3830 |
|
|
produce them. You can use the \fB\-frandom\-seed\fR option to produce
|
| 3831 |
|
|
reproducibly identical object files.
|
| 3832 |
|
|
.Sp
|
| 3833 |
|
|
The \fIstring\fR should be different for every file you compile.
|
| 3834 |
|
|
.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
|
| 3835 |
|
|
.IX Item "-fsched-verbose=n"
|
| 3836 |
|
|
On targets that use instruction scheduling, this option controls the
|
| 3837 |
|
|
amount of debugging output the scheduler prints. This information is
|
| 3838 |
|
|
written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is
|
| 3839 |
|
|
specified, in which case it is output to the usual dump
|
| 3840 |
|
|
listing file, \fI.sched\fR or \fI.sched2\fR respectively. However
|
| 3841 |
|
|
for \fIn\fR greater than nine, the output is always printed to standard
|
| 3842 |
|
|
error.
|
| 3843 |
|
|
.Sp
|
| 3844 |
|
|
For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
|
| 3845 |
|
|
same information as \fB\-dRS\fR. For \fIn\fR greater than one, it
|
| 3846 |
|
|
also output basic block probabilities, detailed ready list information
|
| 3847 |
|
|
and unit/insn info. For \fIn\fR greater than two, it includes \s-1RTL\s0
|
| 3848 |
|
|
at abort point, control-flow and regions info. And for \fIn\fR over
|
| 3849 |
|
|
four, \fB\-fsched\-verbose\fR also includes dependence info.
|
| 3850 |
|
|
.IP "\fB\-save\-temps\fR" 4
|
| 3851 |
|
|
.IX Item "-save-temps"
|
| 3852 |
|
|
Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
|
| 3853 |
|
|
in the current directory and name them based on the source file. Thus,
|
| 3854 |
|
|
compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
|
| 3855 |
|
|
\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
|
| 3856 |
|
|
preprocessed \fIfoo.i\fR output file even though the compiler now
|
| 3857 |
|
|
normally uses an integrated preprocessor.
|
| 3858 |
|
|
.Sp
|
| 3859 |
|
|
When used in combination with the \fB\-x\fR command line option,
|
| 3860 |
|
|
\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
|
| 3861 |
|
|
input source file with the same extension as an intermediate file.
|
| 3862 |
|
|
The corresponding intermediate file may be obtained by renaming the
|
| 3863 |
|
|
source file before using \fB\-save\-temps\fR.
|
| 3864 |
|
|
.IP "\fB\-time\fR" 4
|
| 3865 |
|
|
.IX Item "-time"
|
| 3866 |
|
|
Report the \s-1CPU\s0 time taken by each subprocess in the compilation
|
| 3867 |
|
|
sequence. For C source files, this is the compiler proper and assembler
|
| 3868 |
|
|
(plus the linker if linking is done). The output looks like this:
|
| 3869 |
|
|
.Sp
|
| 3870 |
|
|
.Vb 2
|
| 3871 |
|
|
\& # cc1 0.12 0.01
|
| 3872 |
|
|
\& # as 0.00 0.01
|
| 3873 |
|
|
.Ve
|
| 3874 |
|
|
.Sp
|
| 3875 |
|
|
The first number on each line is the \*(L"user time\*(R", that is time spent
|
| 3876 |
|
|
executing the program itself. The second number is \*(L"system time\*(R",
|
| 3877 |
|
|
time spent executing operating system routines on behalf of the program.
|
| 3878 |
|
|
Both numbers are in seconds.
|
| 3879 |
|
|
.IP "\fB\-fvar\-tracking\fR" 4
|
| 3880 |
|
|
.IX Item "-fvar-tracking"
|
| 3881 |
|
|
Run variable tracking pass. It computes where variables are stored at each
|
| 3882 |
|
|
position in code. Better debugging information is then generated
|
| 3883 |
|
|
(if the debugging information format supports this information).
|
| 3884 |
|
|
.Sp
|
| 3885 |
|
|
It is enabled by default when compiling with optimization (\fB\-Os\fR,
|
| 3886 |
|
|
\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
|
| 3887 |
|
|
the debug info format supports it.
|
| 3888 |
|
|
.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
|
| 3889 |
|
|
.IX Item "-print-file-name=library"
|
| 3890 |
|
|
Print the full absolute name of the library file \fIlibrary\fR that
|
| 3891 |
|
|
would be used when linking\-\-\-and don't do anything else. With this
|
| 3892 |
|
|
option, \s-1GCC\s0 does not compile or link anything; it just prints the
|
| 3893 |
|
|
file name.
|
| 3894 |
|
|
.IP "\fB\-print\-multi\-directory\fR" 4
|
| 3895 |
|
|
.IX Item "-print-multi-directory"
|
| 3896 |
|
|
Print the directory name corresponding to the multilib selected by any
|
| 3897 |
|
|
other switches present in the command line. This directory is supposed
|
| 3898 |
|
|
to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
|
| 3899 |
|
|
.IP "\fB\-print\-multi\-lib\fR" 4
|
| 3900 |
|
|
.IX Item "-print-multi-lib"
|
| 3901 |
|
|
Print the mapping from multilib directory names to compiler switches
|
| 3902 |
|
|
that enable them. The directory name is separated from the switches by
|
| 3903 |
|
|
\&\fB;\fR, and each switch starts with an \fB@} instead of the
|
| 3904 |
|
|
\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
|
| 3905 |
|
|
ease shell\-processing.
|
| 3906 |
|
|
.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
|
| 3907 |
|
|
.IX Item "-print-prog-name=program"
|
| 3908 |
|
|
Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
|
| 3909 |
|
|
.IP "\fB\-print\-libgcc\-file\-name\fR" 4
|
| 3910 |
|
|
.IX Item "-print-libgcc-file-name"
|
| 3911 |
|
|
Same as \fB\-print\-file\-name=libgcc.a\fR.
|
| 3912 |
|
|
.Sp
|
| 3913 |
|
|
This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
|
| 3914 |
|
|
but you do want to link with \fIlibgcc.a\fR. You can do
|
| 3915 |
|
|
.Sp
|
| 3916 |
|
|
.Vb 1
|
| 3917 |
|
|
\& gcc -nostdlib ... `gcc -print-libgcc-file-name`
|
| 3918 |
|
|
.Ve
|
| 3919 |
|
|
.IP "\fB\-print\-search\-dirs\fR" 4
|
| 3920 |
|
|
.IX Item "-print-search-dirs"
|
| 3921 |
|
|
Print the name of the configured installation directory and a list of
|
| 3922 |
|
|
program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
|
| 3923 |
|
|
.Sp
|
| 3924 |
|
|
This is useful when \fBgcc\fR prints the error message
|
| 3925 |
|
|
\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
|
| 3926 |
|
|
To resolve this you either need to put \fIcpp0\fR and the other compiler
|
| 3927 |
|
|
components where \fBgcc\fR expects to find them, or you can set the environment
|
| 3928 |
|
|
variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
|
| 3929 |
|
|
Don't forget the trailing \fB/\fR.
|
| 3930 |
|
|
.IP "\fB\-dumpmachine\fR" 4
|
| 3931 |
|
|
.IX Item "-dumpmachine"
|
| 3932 |
|
|
Print the compiler's target machine (for example,
|
| 3933 |
|
|
\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
|
| 3934 |
|
|
.IP "\fB\-dumpversion\fR" 4
|
| 3935 |
|
|
.IX Item "-dumpversion"
|
| 3936 |
|
|
Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
|
| 3937 |
|
|
anything else.
|
| 3938 |
|
|
.IP "\fB\-dumpspecs\fR" 4
|
| 3939 |
|
|
.IX Item "-dumpspecs"
|
| 3940 |
|
|
Print the compiler's built-in specs\-\-\-and don't do anything else. (This
|
| 3941 |
|
|
is used when \s-1GCC\s0 itself is being built.)
|
| 3942 |
|
|
.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
|
| 3943 |
|
|
.IX Item "-feliminate-unused-debug-types"
|
| 3944 |
|
|
Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
|
| 3945 |
|
|
information for all types declared in a compilation
|
| 3946 |
|
|
unit, regardless of whether or not they are actually used
|
| 3947 |
|
|
in that compilation unit. Sometimes this is useful, such as
|
| 3948 |
|
|
if, in the debugger, you want to cast a value to a type that is
|
| 3949 |
|
|
not actually used in your program (but is declared). More often,
|
| 3950 |
|
|
however, this results in a significant amount of wasted space.
|
| 3951 |
|
|
With this option, \s-1GCC\s0 will avoid producing debug symbol output
|
| 3952 |
|
|
for types that are nowhere used in the source file being compiled.
|
| 3953 |
|
|
.Sh "Options That Control Optimization"
|
| 3954 |
|
|
.IX Subsection "Options That Control Optimization"
|
| 3955 |
|
|
These options control various sorts of optimizations.
|
| 3956 |
|
|
.PP
|
| 3957 |
|
|
Without any optimization option, the compiler's goal is to reduce the
|
| 3958 |
|
|
cost of compilation and to make debugging produce the expected
|
| 3959 |
|
|
results. Statements are independent: if you stop the program with a
|
| 3960 |
|
|
breakpoint between statements, you can then assign a new value to any
|
| 3961 |
|
|
variable or change the program counter to any other statement in the
|
| 3962 |
|
|
function and get exactly the results you would expect from the source
|
| 3963 |
|
|
code.
|
| 3964 |
|
|
.PP
|
| 3965 |
|
|
Turning on optimization flags makes the compiler attempt to improve
|
| 3966 |
|
|
the performance and/or code size at the expense of compilation time
|
| 3967 |
|
|
and possibly the ability to debug the program.
|
| 3968 |
|
|
.PP
|
| 3969 |
|
|
The compiler performs optimization based on the knowledge it has of
|
| 3970 |
|
|
the program. Optimization levels \fB\-O2\fR and above, in
|
| 3971 |
|
|
particular, enable \fIunit-at-a-time\fR mode, which allows the
|
| 3972 |
|
|
compiler to consider information gained from later functions in
|
| 3973 |
|
|
the file when compiling a function. Compiling multiple files at
|
| 3974 |
|
|
once to a single output file in \fIunit-at-a-time\fR mode allows
|
| 3975 |
|
|
the compiler to use information gained from all of the files when
|
| 3976 |
|
|
compiling each of them.
|
| 3977 |
|
|
.PP
|
| 3978 |
|
|
Not all optimizations are controlled directly by a flag. Only
|
| 3979 |
|
|
optimizations that have a flag are listed.
|
| 3980 |
|
|
.IP "\fB\-O\fR" 4
|
| 3981 |
|
|
.IX Item "-O"
|
| 3982 |
|
|
.PD 0
|
| 3983 |
|
|
.IP "\fB\-O1\fR" 4
|
| 3984 |
|
|
.IX Item "-O1"
|
| 3985 |
|
|
.PD
|
| 3986 |
|
|
Optimize. Optimizing compilation takes somewhat more time, and a lot
|
| 3987 |
|
|
more memory for a large function.
|
| 3988 |
|
|
.Sp
|
| 3989 |
|
|
With \fB\-O\fR, the compiler tries to reduce code size and execution
|
| 3990 |
|
|
time, without performing any optimizations that take a great deal of
|
| 3991 |
|
|
compilation time.
|
| 3992 |
|
|
.Sp
|
| 3993 |
|
|
\&\fB\-O\fR turns on the following optimization flags:
|
| 3994 |
|
|
\&\fB\-fdefer\-pop
|
| 3995 |
|
|
\&\-fdelayed\-branch
|
| 3996 |
|
|
\&\-fguess\-branch\-probability
|
| 3997 |
|
|
\&\-fcprop\-registers
|
| 3998 |
|
|
\&\-floop\-optimize
|
| 3999 |
|
|
\&\-fif\-conversion
|
| 4000 |
|
|
\&\-fif\-conversion2
|
| 4001 |
|
|
\&\-ftree\-ccp
|
| 4002 |
|
|
\&\-ftree\-dce
|
| 4003 |
|
|
\&\-ftree\-dominator\-opts
|
| 4004 |
|
|
\&\-ftree\-dse
|
| 4005 |
|
|
\&\-ftree\-ter
|
| 4006 |
|
|
\&\-ftree\-lrs
|
| 4007 |
|
|
\&\-ftree\-sra
|
| 4008 |
|
|
\&\-ftree\-copyrename
|
| 4009 |
|
|
\&\-ftree\-fre
|
| 4010 |
|
|
\&\-ftree\-ch
|
| 4011 |
|
|
\&\-fmerge\-constants\fR
|
| 4012 |
|
|
.Sp
|
| 4013 |
|
|
\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
|
| 4014 |
|
|
where doing so does not interfere with debugging.
|
| 4015 |
|
|
.Sp
|
| 4016 |
|
|
\&\fB\-O\fR doesn't turn on \fB\-ftree\-sra\fR for the Ada compiler.
|
| 4017 |
|
|
This option must be explicitly specified on the command line to be
|
| 4018 |
|
|
enabled for the Ada compiler.
|
| 4019 |
|
|
.IP "\fB\-O2\fR" 4
|
| 4020 |
|
|
.IX Item "-O2"
|
| 4021 |
|
|
Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
|
| 4022 |
|
|
that do not involve a space-speed tradeoff. The compiler does not
|
| 4023 |
|
|
perform loop unrolling or function inlining when you specify \fB\-O2\fR.
|
| 4024 |
|
|
As compared to \fB\-O\fR, this option increases both compilation time
|
| 4025 |
|
|
and the performance of the generated code.
|
| 4026 |
|
|
.Sp
|
| 4027 |
|
|
\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
|
| 4028 |
|
|
also turns on the following optimization flags:
|
| 4029 |
|
|
\&\fB\-fthread\-jumps
|
| 4030 |
|
|
\&\-fcrossjumping
|
| 4031 |
|
|
\&\-foptimize\-sibling\-calls
|
| 4032 |
|
|
\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
|
| 4033 |
|
|
\&\-fgcse \-fgcse\-lm
|
| 4034 |
|
|
\&\-fexpensive\-optimizations
|
| 4035 |
|
|
\&\-fstrength\-reduce
|
| 4036 |
|
|
\&\-frerun\-cse\-after\-loop \-frerun\-loop\-opt
|
| 4037 |
|
|
\&\-fcaller\-saves
|
| 4038 |
|
|
\&\-fpeephole2
|
| 4039 |
|
|
\&\-fschedule\-insns \-fschedule\-insns2
|
| 4040 |
|
|
\&\-fsched\-interblock \-fsched\-spec
|
| 4041 |
|
|
\&\-fregmove
|
| 4042 |
|
|
\&\-fstrict\-aliasing
|
| 4043 |
|
|
\&\-fdelete\-null\-pointer\-checks
|
| 4044 |
|
|
\&\-freorder\-blocks \-freorder\-functions
|
| 4045 |
|
|
\&\-funit\-at\-a\-time
|
| 4046 |
|
|
\&\-falign\-functions \-falign\-jumps
|
| 4047 |
|
|
\&\-falign\-loops \-falign\-labels
|
| 4048 |
|
|
\&\-ftree\-vrp
|
| 4049 |
|
|
\&\-ftree\-pre\fR
|
| 4050 |
|
|
.Sp
|
| 4051 |
|
|
Please note the warning under \fB\-fgcse\fR about
|
| 4052 |
|
|
invoking \fB\-O2\fR on programs that use computed gotos.
|
| 4053 |
|
|
.IP "\fB\-O3\fR" 4
|
| 4054 |
|
|
.IX Item "-O3"
|
| 4055 |
|
|
Optimize yet more. \fB\-O3\fR turns on all optimizations specified by
|
| 4056 |
|
|
\&\fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
|
| 4057 |
|
|
\&\fB\-funswitch\-loops\fR and \fB\-fgcse\-after\-reload\fR options.
|
| 4058 |
|
|
.IP "\fB\-O0\fR" 4
|
| 4059 |
|
|
.IX Item "-O0"
|
| 4060 |
|
|
Do not optimize. This is the default.
|
| 4061 |
|
|
.IP "\fB\-Os\fR" 4
|
| 4062 |
|
|
.IX Item "-Os"
|
| 4063 |
|
|
Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
|
| 4064 |
|
|
do not typically increase code size. It also performs further
|
| 4065 |
|
|
optimizations designed to reduce code size.
|
| 4066 |
|
|
.Sp
|
| 4067 |
|
|
\&\fB\-Os\fR disables the following optimization flags:
|
| 4068 |
|
|
\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
|
| 4069 |
|
|
\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
|
| 4070 |
|
|
\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
|
| 4071 |
|
|
.Sp
|
| 4072 |
|
|
If you use multiple \fB\-O\fR options, with or without level numbers,
|
| 4073 |
|
|
the last such option is the one that is effective.
|
| 4074 |
|
|
.PP
|
| 4075 |
|
|
Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
|
| 4076 |
|
|
flags. Most flags have both positive and negative forms; the negative
|
| 4077 |
|
|
form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
|
| 4078 |
|
|
below, only one of the forms is listed\-\-\-the one you typically will
|
| 4079 |
|
|
use. You can figure out the other form by either removing \fBno\-\fR
|
| 4080 |
|
|
or adding it.
|
| 4081 |
|
|
.PP
|
| 4082 |
|
|
The following options control specific optimizations. They are either
|
| 4083 |
|
|
activated by \fB\-O\fR options or are related to ones that are. You
|
| 4084 |
|
|
can use the following flags in the rare cases when \*(L"fine\-tuning\*(R" of
|
| 4085 |
|
|
optimizations to be performed is desired.
|
| 4086 |
|
|
.IP "\fB\-fno\-default\-inline\fR" 4
|
| 4087 |
|
|
.IX Item "-fno-default-inline"
|
| 4088 |
|
|
Do not make member functions inline by default merely because they are
|
| 4089 |
|
|
defined inside the class scope (\*(C+ only). Otherwise, when you specify
|
| 4090 |
|
|
\&\fB\-O\fR, member functions defined inside class scope are compiled
|
| 4091 |
|
|
inline by default; i.e., you don't need to add \fBinline\fR in front of
|
| 4092 |
|
|
the member function name.
|
| 4093 |
|
|
.IP "\fB\-fno\-defer\-pop\fR" 4
|
| 4094 |
|
|
.IX Item "-fno-defer-pop"
|
| 4095 |
|
|
Always pop the arguments to each function call as soon as that function
|
| 4096 |
|
|
returns. For machines which must pop arguments after a function call,
|
| 4097 |
|
|
the compiler normally lets arguments accumulate on the stack for several
|
| 4098 |
|
|
function calls and pops them all at once.
|
| 4099 |
|
|
.Sp
|
| 4100 |
|
|
Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4101 |
|
|
.IP "\fB\-fforce\-mem\fR" 4
|
| 4102 |
|
|
.IX Item "-fforce-mem"
|
| 4103 |
|
|
Force memory operands to be copied into registers before doing
|
| 4104 |
|
|
arithmetic on them. This produces better code by making all memory
|
| 4105 |
|
|
references potential common subexpressions. When they are not common
|
| 4106 |
|
|
subexpressions, instruction combination should eliminate the separate
|
| 4107 |
|
|
register\-load. This option is now a nop and will be removed in 4.2.
|
| 4108 |
|
|
.IP "\fB\-fforce\-addr\fR" 4
|
| 4109 |
|
|
.IX Item "-fforce-addr"
|
| 4110 |
|
|
Force memory address constants to be copied into registers before
|
| 4111 |
|
|
doing arithmetic on them.
|
| 4112 |
|
|
.IP "\fB\-fomit\-frame\-pointer\fR" 4
|
| 4113 |
|
|
.IX Item "-fomit-frame-pointer"
|
| 4114 |
|
|
Don't keep the frame pointer in a register for functions that
|
| 4115 |
|
|
don't need one. This avoids the instructions to save, set up and
|
| 4116 |
|
|
restore frame pointers; it also makes an extra register available
|
| 4117 |
|
|
in many functions. \fBIt also makes debugging impossible on
|
| 4118 |
|
|
some machines.\fR
|
| 4119 |
|
|
.Sp
|
| 4120 |
|
|
On some machines, such as the \s-1VAX\s0, this flag has no effect, because
|
| 4121 |
|
|
the standard calling sequence automatically handles the frame pointer
|
| 4122 |
|
|
and nothing is saved by pretending it doesn't exist. The
|
| 4123 |
|
|
machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
|
| 4124 |
|
|
whether a target machine supports this flag.
|
| 4125 |
|
|
.Sp
|
| 4126 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4127 |
|
|
.IP "\fB\-foptimize\-sibling\-calls\fR" 4
|
| 4128 |
|
|
.IX Item "-foptimize-sibling-calls"
|
| 4129 |
|
|
Optimize sibling and tail recursive calls.
|
| 4130 |
|
|
.Sp
|
| 4131 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4132 |
|
|
.IP "\fB\-fno\-inline\fR" 4
|
| 4133 |
|
|
.IX Item "-fno-inline"
|
| 4134 |
|
|
Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
|
| 4135 |
|
|
is used to keep the compiler from expanding any functions inline.
|
| 4136 |
|
|
Note that if you are not optimizing, no functions can be expanded inline.
|
| 4137 |
|
|
.IP "\fB\-finline\-functions\fR" 4
|
| 4138 |
|
|
.IX Item "-finline-functions"
|
| 4139 |
|
|
Integrate all simple functions into their callers. The compiler
|
| 4140 |
|
|
heuristically decides which functions are simple enough to be worth
|
| 4141 |
|
|
integrating in this way.
|
| 4142 |
|
|
.Sp
|
| 4143 |
|
|
If all calls to a given function are integrated, and the function is
|
| 4144 |
|
|
declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
|
| 4145 |
|
|
assembler code in its own right.
|
| 4146 |
|
|
.Sp
|
| 4147 |
|
|
Enabled at level \fB\-O3\fR.
|
| 4148 |
|
|
.IP "\fB\-finline\-functions\-called\-once\fR" 4
|
| 4149 |
|
|
.IX Item "-finline-functions-called-once"
|
| 4150 |
|
|
Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
|
| 4151 |
|
|
caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
|
| 4152 |
|
|
function is integrated, then the function is not output as assembler code
|
| 4153 |
|
|
in its own right.
|
| 4154 |
|
|
.Sp
|
| 4155 |
|
|
Enabled if \fB\-funit\-at\-a\-time\fR is enabled.
|
| 4156 |
|
|
.IP "\fB\-fearly\-inlining\fR" 4
|
| 4157 |
|
|
.IX Item "-fearly-inlining"
|
| 4158 |
|
|
Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
|
| 4159 |
|
|
smaller than the function call overhead early before doing
|
| 4160 |
|
|
\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
|
| 4161 |
|
|
makes profiling significantly cheaper and usually inlining faster on programs
|
| 4162 |
|
|
having large chains of nested wrapper functions.
|
| 4163 |
|
|
.Sp
|
| 4164 |
|
|
Enabled by default.
|
| 4165 |
|
|
.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
|
| 4166 |
|
|
.IX Item "-finline-limit=n"
|
| 4167 |
|
|
By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
|
| 4168 |
|
|
allows the control of this limit for functions that are explicitly marked as
|
| 4169 |
|
|
inline (i.e., marked with the inline keyword or defined within the class
|
| 4170 |
|
|
definition in c++). \fIn\fR is the size of functions that can be inlined in
|
| 4171 |
|
|
number of pseudo instructions (not counting parameter handling). The default
|
| 4172 |
|
|
value of \fIn\fR is 600.
|
| 4173 |
|
|
Increasing this value can result in more inlined code at
|
| 4174 |
|
|
the cost of compilation time and memory consumption. Decreasing usually makes
|
| 4175 |
|
|
the compilation faster and less code will be inlined (which presumably
|
| 4176 |
|
|
means slower programs). This option is particularly useful for programs that
|
| 4177 |
|
|
use inlining heavily such as those based on recursive templates with \*(C+.
|
| 4178 |
|
|
.Sp
|
| 4179 |
|
|
Inlining is actually controlled by a number of parameters, which may be
|
| 4180 |
|
|
specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
|
| 4181 |
|
|
The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
|
| 4182 |
|
|
as follows:
|
| 4183 |
|
|
.RS 4
|
| 4184 |
|
|
.Sp
|
| 4185 |
|
|
.Vb 8
|
| 4186 |
|
|
\& @item max-inline-insns-single
|
| 4187 |
|
|
\& is set to I/2.
|
| 4188 |
|
|
\& @item max-inline-insns-auto
|
| 4189 |
|
|
\& is set to I/2.
|
| 4190 |
|
|
\& @item min-inline-insns
|
| 4191 |
|
|
\& is set to 130 or I/4, whichever is smaller.
|
| 4192 |
|
|
\& @item max-inline-insns-rtl
|
| 4193 |
|
|
\& is set to I.
|
| 4194 |
|
|
.Ve
|
| 4195 |
|
|
.RE
|
| 4196 |
|
|
.RS 4
|
| 4197 |
|
|
.Sp
|
| 4198 |
|
|
See below for a documentation of the individual
|
| 4199 |
|
|
parameters controlling inlining.
|
| 4200 |
|
|
.Sp
|
| 4201 |
|
|
\&\fINote:\fR pseudo instruction represents, in this particular context, an
|
| 4202 |
|
|
abstract measurement of function's size. In no way does it represent a count
|
| 4203 |
|
|
of assembly instructions and as such its exact meaning might change from one
|
| 4204 |
|
|
release to an another.
|
| 4205 |
|
|
.RE
|
| 4206 |
|
|
.IP "\fB\-fkeep\-inline\-functions\fR" 4
|
| 4207 |
|
|
.IX Item "-fkeep-inline-functions"
|
| 4208 |
|
|
In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
|
| 4209 |
|
|
into the object file, even if the function has been inlined into all
|
| 4210 |
|
|
of its callers. This switch does not affect functions using the
|
| 4211 |
|
|
\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C. In \*(C+, emit any and all
|
| 4212 |
|
|
inline functions into the object file.
|
| 4213 |
|
|
.IP "\fB\-fkeep\-static\-consts\fR" 4
|
| 4214 |
|
|
.IX Item "-fkeep-static-consts"
|
| 4215 |
|
|
Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
|
| 4216 |
|
|
on, even if the variables aren't referenced.
|
| 4217 |
|
|
.Sp
|
| 4218 |
|
|
\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
|
| 4219 |
|
|
check if the variable was referenced, regardless of whether or not
|
| 4220 |
|
|
optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
|
| 4221 |
|
|
.IP "\fB\-fmerge\-constants\fR" 4
|
| 4222 |
|
|
.IX Item "-fmerge-constants"
|
| 4223 |
|
|
Attempt to merge identical constants (string constants and floating point
|
| 4224 |
|
|
constants) across compilation units.
|
| 4225 |
|
|
.Sp
|
| 4226 |
|
|
This option is the default for optimized compilation if the assembler and
|
| 4227 |
|
|
linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
|
| 4228 |
|
|
behavior.
|
| 4229 |
|
|
.Sp
|
| 4230 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4231 |
|
|
.IP "\fB\-fmerge\-all\-constants\fR" 4
|
| 4232 |
|
|
.IX Item "-fmerge-all-constants"
|
| 4233 |
|
|
Attempt to merge identical constants and identical variables.
|
| 4234 |
|
|
.Sp
|
| 4235 |
|
|
This option implies \fB\-fmerge\-constants\fR. In addition to
|
| 4236 |
|
|
\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
|
| 4237 |
|
|
arrays or initialized constant variables with integral or floating point
|
| 4238 |
|
|
types. Languages like C or \*(C+ require each non-automatic variable to
|
| 4239 |
|
|
have distinct location, so using this option will result in non-conforming
|
| 4240 |
|
|
behavior.
|
| 4241 |
|
|
.IP "\fB\-fmodulo\-sched\fR" 4
|
| 4242 |
|
|
.IX Item "-fmodulo-sched"
|
| 4243 |
|
|
Perform swing modulo scheduling immediately before the first scheduling
|
| 4244 |
|
|
pass. This pass looks at innermost loops and reorders their
|
| 4245 |
|
|
instructions by overlapping different iterations.
|
| 4246 |
|
|
.IP "\fB\-fno\-branch\-count\-reg\fR" 4
|
| 4247 |
|
|
.IX Item "-fno-branch-count-reg"
|
| 4248 |
|
|
Do not use \*(L"decrement and branch\*(R" instructions on a count register,
|
| 4249 |
|
|
but instead generate a sequence of instructions that decrement a
|
| 4250 |
|
|
register, compare it against zero, then branch based upon the result.
|
| 4251 |
|
|
This option is only meaningful on architectures that support such
|
| 4252 |
|
|
instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
|
| 4253 |
|
|
.Sp
|
| 4254 |
|
|
The default is \fB\-fbranch\-count\-reg\fR, enabled when
|
| 4255 |
|
|
\&\fB\-fstrength\-reduce\fR is enabled.
|
| 4256 |
|
|
.IP "\fB\-fno\-function\-cse\fR" 4
|
| 4257 |
|
|
.IX Item "-fno-function-cse"
|
| 4258 |
|
|
Do not put function addresses in registers; make each instruction that
|
| 4259 |
|
|
calls a constant function contain the function's address explicitly.
|
| 4260 |
|
|
.Sp
|
| 4261 |
|
|
This option results in less efficient code, but some strange hacks
|
| 4262 |
|
|
that alter the assembler output may be confused by the optimizations
|
| 4263 |
|
|
performed when this option is not used.
|
| 4264 |
|
|
.Sp
|
| 4265 |
|
|
The default is \fB\-ffunction\-cse\fR
|
| 4266 |
|
|
.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
|
| 4267 |
|
|
.IX Item "-fno-zero-initialized-in-bss"
|
| 4268 |
|
|
If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
|
| 4269 |
|
|
are initialized to zero into \s-1BSS\s0. This can save space in the resulting
|
| 4270 |
|
|
code.
|
| 4271 |
|
|
.Sp
|
| 4272 |
|
|
This option turns off this behavior because some programs explicitly
|
| 4273 |
|
|
rely on variables going to the data section. E.g., so that the
|
| 4274 |
|
|
resulting executable can find the beginning of that section and/or make
|
| 4275 |
|
|
assumptions based on that.
|
| 4276 |
|
|
.Sp
|
| 4277 |
|
|
The default is \fB\-fzero\-initialized\-in\-bss\fR.
|
| 4278 |
|
|
.IP "\fB\-fbounds\-check\fR" 4
|
| 4279 |
|
|
.IX Item "-fbounds-check"
|
| 4280 |
|
|
For front-ends that support it, generate additional code to check that
|
| 4281 |
|
|
indices used to access arrays are within the declared range. This is
|
| 4282 |
|
|
currently only supported by the Java and Fortran front\-ends, where
|
| 4283 |
|
|
this option defaults to true and false respectively.
|
| 4284 |
|
|
.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
|
| 4285 |
|
|
.IX Item "-fmudflap -fmudflapth -fmudflapir"
|
| 4286 |
|
|
For front-ends that support it (C and \*(C+), instrument all risky
|
| 4287 |
|
|
pointer/array dereferencing operations, some standard library
|
| 4288 |
|
|
string/heap functions, and some other associated constructs with
|
| 4289 |
|
|
range/validity tests. Modules so instrumented should be immune to
|
| 4290 |
|
|
buffer overflows, invalid heap use, and some other classes of C/\*(C+
|
| 4291 |
|
|
programming errors. The instrumentation relies on a separate runtime
|
| 4292 |
|
|
library (\fIlibmudflap\fR), which will be linked into a program if
|
| 4293 |
|
|
\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
|
| 4294 |
|
|
instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
|
| 4295 |
|
|
environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
|
| 4296 |
|
|
for its options.
|
| 4297 |
|
|
.Sp
|
| 4298 |
|
|
Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
|
| 4299 |
|
|
link if your program is multi\-threaded. Use \fB\-fmudflapir\fR, in
|
| 4300 |
|
|
addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
|
| 4301 |
|
|
instrumentation should ignore pointer reads. This produces less
|
| 4302 |
|
|
instrumentation (and therefore faster execution) and still provides
|
| 4303 |
|
|
some protection against outright memory corrupting writes, but allows
|
| 4304 |
|
|
erroneously read data to propagate within a program.
|
| 4305 |
|
|
.IP "\fB\-fstrength\-reduce\fR" 4
|
| 4306 |
|
|
.IX Item "-fstrength-reduce"
|
| 4307 |
|
|
Perform the optimizations of loop strength reduction and
|
| 4308 |
|
|
elimination of iteration variables.
|
| 4309 |
|
|
.Sp
|
| 4310 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4311 |
|
|
.IP "\fB\-fthread\-jumps\fR" 4
|
| 4312 |
|
|
.IX Item "-fthread-jumps"
|
| 4313 |
|
|
Perform optimizations where we check to see if a jump branches to a
|
| 4314 |
|
|
location where another comparison subsumed by the first is found. If
|
| 4315 |
|
|
so, the first branch is redirected to either the destination of the
|
| 4316 |
|
|
second branch or a point immediately following it, depending on whether
|
| 4317 |
|
|
the condition is known to be true or false.
|
| 4318 |
|
|
.Sp
|
| 4319 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4320 |
|
|
.IP "\fB\-fcse\-follow\-jumps\fR" 4
|
| 4321 |
|
|
.IX Item "-fcse-follow-jumps"
|
| 4322 |
|
|
In common subexpression elimination, scan through jump instructions
|
| 4323 |
|
|
when the target of the jump is not reached by any other path. For
|
| 4324 |
|
|
example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
|
| 4325 |
|
|
\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
|
| 4326 |
|
|
tested is false.
|
| 4327 |
|
|
.Sp
|
| 4328 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4329 |
|
|
.IP "\fB\-fcse\-skip\-blocks\fR" 4
|
| 4330 |
|
|
.IX Item "-fcse-skip-blocks"
|
| 4331 |
|
|
This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
|
| 4332 |
|
|
follow jumps which conditionally skip over blocks. When \s-1CSE\s0
|
| 4333 |
|
|
encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
|
| 4334 |
|
|
\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
|
| 4335 |
|
|
body of the \f(CW\*(C`if\*(C'\fR.
|
| 4336 |
|
|
.Sp
|
| 4337 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4338 |
|
|
.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
|
| 4339 |
|
|
.IX Item "-frerun-cse-after-loop"
|
| 4340 |
|
|
Re-run common subexpression elimination after loop optimizations has been
|
| 4341 |
|
|
performed.
|
| 4342 |
|
|
.Sp
|
| 4343 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4344 |
|
|
.IP "\fB\-frerun\-loop\-opt\fR" 4
|
| 4345 |
|
|
.IX Item "-frerun-loop-opt"
|
| 4346 |
|
|
Run the loop optimizer twice.
|
| 4347 |
|
|
.Sp
|
| 4348 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4349 |
|
|
.IP "\fB\-fgcse\fR" 4
|
| 4350 |
|
|
.IX Item "-fgcse"
|
| 4351 |
|
|
Perform a global common subexpression elimination pass.
|
| 4352 |
|
|
This pass also performs global constant and copy propagation.
|
| 4353 |
|
|
.Sp
|
| 4354 |
|
|
\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
|
| 4355 |
|
|
extension, you may get better runtime performance if you disable
|
| 4356 |
|
|
the global common subexpression elimination pass by adding
|
| 4357 |
|
|
\&\fB\-fno\-gcse\fR to the command line.
|
| 4358 |
|
|
.Sp
|
| 4359 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4360 |
|
|
.IP "\fB\-fgcse\-lm\fR" 4
|
| 4361 |
|
|
.IX Item "-fgcse-lm"
|
| 4362 |
|
|
When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
|
| 4363 |
|
|
attempt to move loads which are only killed by stores into themselves. This
|
| 4364 |
|
|
allows a loop containing a load/store sequence to be changed to a load outside
|
| 4365 |
|
|
the loop, and a copy/store within the loop.
|
| 4366 |
|
|
.Sp
|
| 4367 |
|
|
Enabled by default when gcse is enabled.
|
| 4368 |
|
|
.IP "\fB\-fgcse\-sm\fR" 4
|
| 4369 |
|
|
.IX Item "-fgcse-sm"
|
| 4370 |
|
|
When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
|
| 4371 |
|
|
global common subexpression elimination. This pass will attempt to move
|
| 4372 |
|
|
stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
|
| 4373 |
|
|
loops containing a load/store sequence can be changed to a load before
|
| 4374 |
|
|
the loop and a store after the loop.
|
| 4375 |
|
|
.Sp
|
| 4376 |
|
|
Not enabled at any optimization level.
|
| 4377 |
|
|
.IP "\fB\-fgcse\-las\fR" 4
|
| 4378 |
|
|
.IX Item "-fgcse-las"
|
| 4379 |
|
|
When \fB\-fgcse\-las\fR is enabled, the global common subexpression
|
| 4380 |
|
|
elimination pass eliminates redundant loads that come after stores to the
|
| 4381 |
|
|
same memory location (both partial and full redundancies).
|
| 4382 |
|
|
.Sp
|
| 4383 |
|
|
Not enabled at any optimization level.
|
| 4384 |
|
|
.IP "\fB\-fgcse\-after\-reload\fR" 4
|
| 4385 |
|
|
.IX Item "-fgcse-after-reload"
|
| 4386 |
|
|
When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
|
| 4387 |
|
|
pass is performed after reload. The purpose of this pass is to cleanup
|
| 4388 |
|
|
redundant spilling.
|
| 4389 |
|
|
.IP "\fB\-floop\-optimize\fR" 4
|
| 4390 |
|
|
.IX Item "-floop-optimize"
|
| 4391 |
|
|
Perform loop optimizations: move constant expressions out of loops, simplify
|
| 4392 |
|
|
exit test conditions and optionally do strength-reduction as well.
|
| 4393 |
|
|
.Sp
|
| 4394 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4395 |
|
|
.IP "\fB\-floop\-optimize2\fR" 4
|
| 4396 |
|
|
.IX Item "-floop-optimize2"
|
| 4397 |
|
|
Perform loop optimizations using the new loop optimizer. The optimizations
|
| 4398 |
|
|
(loop unrolling, peeling and unswitching, loop invariant motion) are enabled
|
| 4399 |
|
|
by separate flags.
|
| 4400 |
|
|
.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
|
| 4401 |
|
|
.IX Item "-funsafe-loop-optimizations"
|
| 4402 |
|
|
If given, the loop optimizer will assume that loop indices do not
|
| 4403 |
|
|
overflow, and that the loops with nontrivial exit condition are not
|
| 4404 |
|
|
infinite. This enables a wider range of loop optimizations even if
|
| 4405 |
|
|
the loop optimizer itself cannot prove that these assumptions are valid.
|
| 4406 |
|
|
Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
|
| 4407 |
|
|
if it finds this kind of loop.
|
| 4408 |
|
|
.IP "\fB\-fcrossjumping\fR" 4
|
| 4409 |
|
|
.IX Item "-fcrossjumping"
|
| 4410 |
|
|
Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
|
| 4411 |
|
|
resulting code may or may not perform better than without cross\-jumping.
|
| 4412 |
|
|
.Sp
|
| 4413 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4414 |
|
|
.IP "\fB\-fif\-conversion\fR" 4
|
| 4415 |
|
|
.IX Item "-fif-conversion"
|
| 4416 |
|
|
Attempt to transform conditional jumps into branch-less equivalents. This
|
| 4417 |
|
|
include use of conditional moves, min, max, set flags and abs instructions, and
|
| 4418 |
|
|
some tricks doable by standard arithmetics. The use of conditional execution
|
| 4419 |
|
|
on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
|
| 4420 |
|
|
.Sp
|
| 4421 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4422 |
|
|
.IP "\fB\-fif\-conversion2\fR" 4
|
| 4423 |
|
|
.IX Item "-fif-conversion2"
|
| 4424 |
|
|
Use conditional execution (where available) to transform conditional jumps into
|
| 4425 |
|
|
branch-less equivalents.
|
| 4426 |
|
|
.Sp
|
| 4427 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4428 |
|
|
.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
|
| 4429 |
|
|
.IX Item "-fdelete-null-pointer-checks"
|
| 4430 |
|
|
Use global dataflow analysis to identify and eliminate useless checks
|
| 4431 |
|
|
for null pointers. The compiler assumes that dereferencing a null
|
| 4432 |
|
|
pointer would have halted the program. If a pointer is checked after
|
| 4433 |
|
|
it has already been dereferenced, it cannot be null.
|
| 4434 |
|
|
.Sp
|
| 4435 |
|
|
In some environments, this assumption is not true, and programs can
|
| 4436 |
|
|
safely dereference null pointers. Use
|
| 4437 |
|
|
\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
|
| 4438 |
|
|
for programs which depend on that behavior.
|
| 4439 |
|
|
.Sp
|
| 4440 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4441 |
|
|
.IP "\fB\-fexpensive\-optimizations\fR" 4
|
| 4442 |
|
|
.IX Item "-fexpensive-optimizations"
|
| 4443 |
|
|
Perform a number of minor optimizations that are relatively expensive.
|
| 4444 |
|
|
.Sp
|
| 4445 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4446 |
|
|
.IP "\fB\-foptimize\-register\-move\fR" 4
|
| 4447 |
|
|
.IX Item "-foptimize-register-move"
|
| 4448 |
|
|
.PD 0
|
| 4449 |
|
|
.IP "\fB\-fregmove\fR" 4
|
| 4450 |
|
|
.IX Item "-fregmove"
|
| 4451 |
|
|
.PD
|
| 4452 |
|
|
Attempt to reassign register numbers in move instructions and as
|
| 4453 |
|
|
operands of other simple instructions in order to maximize the amount of
|
| 4454 |
|
|
register tying. This is especially helpful on machines with two-operand
|
| 4455 |
|
|
instructions.
|
| 4456 |
|
|
.Sp
|
| 4457 |
|
|
Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
|
| 4458 |
|
|
optimization.
|
| 4459 |
|
|
.Sp
|
| 4460 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4461 |
|
|
.IP "\fB\-fdelayed\-branch\fR" 4
|
| 4462 |
|
|
.IX Item "-fdelayed-branch"
|
| 4463 |
|
|
If supported for the target machine, attempt to reorder instructions
|
| 4464 |
|
|
to exploit instruction slots available after delayed branch
|
| 4465 |
|
|
instructions.
|
| 4466 |
|
|
.Sp
|
| 4467 |
|
|
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4468 |
|
|
.IP "\fB\-fschedule\-insns\fR" 4
|
| 4469 |
|
|
.IX Item "-fschedule-insns"
|
| 4470 |
|
|
If supported for the target machine, attempt to reorder instructions to
|
| 4471 |
|
|
eliminate execution stalls due to required data being unavailable. This
|
| 4472 |
|
|
helps machines that have slow floating point or memory load instructions
|
| 4473 |
|
|
by allowing other instructions to be issued until the result of the load
|
| 4474 |
|
|
or floating point instruction is required.
|
| 4475 |
|
|
.Sp
|
| 4476 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4477 |
|
|
.IP "\fB\-fschedule\-insns2\fR" 4
|
| 4478 |
|
|
.IX Item "-fschedule-insns2"
|
| 4479 |
|
|
Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
|
| 4480 |
|
|
instruction scheduling after register allocation has been done. This is
|
| 4481 |
|
|
especially useful on machines with a relatively small number of
|
| 4482 |
|
|
registers and where memory load instructions take more than one cycle.
|
| 4483 |
|
|
.Sp
|
| 4484 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4485 |
|
|
.IP "\fB\-fno\-sched\-interblock\fR" 4
|
| 4486 |
|
|
.IX Item "-fno-sched-interblock"
|
| 4487 |
|
|
Don't schedule instructions across basic blocks. This is normally
|
| 4488 |
|
|
enabled by default when scheduling before register allocation, i.e.
|
| 4489 |
|
|
with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
| 4490 |
|
|
.IP "\fB\-fno\-sched\-spec\fR" 4
|
| 4491 |
|
|
.IX Item "-fno-sched-spec"
|
| 4492 |
|
|
Don't allow speculative motion of non-load instructions. This is normally
|
| 4493 |
|
|
enabled by default when scheduling before register allocation, i.e.
|
| 4494 |
|
|
with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
| 4495 |
|
|
.IP "\fB\-fsched\-spec\-load\fR" 4
|
| 4496 |
|
|
.IX Item "-fsched-spec-load"
|
| 4497 |
|
|
Allow speculative motion of some load instructions. This only makes
|
| 4498 |
|
|
sense when scheduling before register allocation, i.e. with
|
| 4499 |
|
|
\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
| 4500 |
|
|
.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
|
| 4501 |
|
|
.IX Item "-fsched-spec-load-dangerous"
|
| 4502 |
|
|
Allow speculative motion of more load instructions. This only makes
|
| 4503 |
|
|
sense when scheduling before register allocation, i.e. with
|
| 4504 |
|
|
\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
|
| 4505 |
|
|
.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
|
| 4506 |
|
|
.IX Item "-fsched-stalled-insns=n"
|
| 4507 |
|
|
Define how many insns (if any) can be moved prematurely from the queue
|
| 4508 |
|
|
of stalled insns into the ready list, during the second scheduling pass.
|
| 4509 |
|
|
.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
|
| 4510 |
|
|
.IX Item "-fsched-stalled-insns-dep=n"
|
| 4511 |
|
|
Define how many insn groups (cycles) will be examined for a dependency
|
| 4512 |
|
|
on a stalled insn that is candidate for premature removal from the queue
|
| 4513 |
|
|
of stalled insns. Has an effect only during the second scheduling pass,
|
| 4514 |
|
|
and only if \fB\-fsched\-stalled\-insns\fR is used and its value is not zero.
|
| 4515 |
|
|
.IP "\fB\-fsched2\-use\-superblocks\fR" 4
|
| 4516 |
|
|
.IX Item "-fsched2-use-superblocks"
|
| 4517 |
|
|
When scheduling after register allocation, do use superblock scheduling
|
| 4518 |
|
|
algorithm. Superblock scheduling allows motion across basic block boundaries
|
| 4519 |
|
|
resulting on faster schedules. This option is experimental, as not all machine
|
| 4520 |
|
|
descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
|
| 4521 |
|
|
results from the algorithm.
|
| 4522 |
|
|
.Sp
|
| 4523 |
|
|
This only makes sense when scheduling after register allocation, i.e. with
|
| 4524 |
|
|
\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
|
| 4525 |
|
|
.IP "\fB\-fsched2\-use\-traces\fR" 4
|
| 4526 |
|
|
.IX Item "-fsched2-use-traces"
|
| 4527 |
|
|
Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
|
| 4528 |
|
|
allocation and additionally perform code duplication in order to increase the
|
| 4529 |
|
|
size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
|
| 4530 |
|
|
trace formation.
|
| 4531 |
|
|
.Sp
|
| 4532 |
|
|
This mode should produce faster but significantly longer programs. Also
|
| 4533 |
|
|
without \fB\-fbranch\-probabilities\fR the traces constructed may not
|
| 4534 |
|
|
match the reality and hurt the performance. This only makes
|
| 4535 |
|
|
sense when scheduling after register allocation, i.e. with
|
| 4536 |
|
|
\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
|
| 4537 |
|
|
.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
|
| 4538 |
|
|
.IX Item "-freschedule-modulo-scheduled-loops"
|
| 4539 |
|
|
The modulo scheduling comes before the traditional scheduling, if a loop was modulo scheduled
|
| 4540 |
|
|
we may want to prevent the later scheduling passes from changing its schedule, we use this
|
| 4541 |
|
|
option to control that.
|
| 4542 |
|
|
.IP "\fB\-fcaller\-saves\fR" 4
|
| 4543 |
|
|
.IX Item "-fcaller-saves"
|
| 4544 |
|
|
Enable values to be allocated in registers that will be clobbered by
|
| 4545 |
|
|
function calls, by emitting extra instructions to save and restore the
|
| 4546 |
|
|
registers around such calls. Such allocation is done only when it
|
| 4547 |
|
|
seems to result in better code than would otherwise be produced.
|
| 4548 |
|
|
.Sp
|
| 4549 |
|
|
This option is always enabled by default on certain machines, usually
|
| 4550 |
|
|
those which have no call-preserved registers to use instead.
|
| 4551 |
|
|
.Sp
|
| 4552 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4553 |
|
|
.IP "\fB\-ftree\-pre\fR" 4
|
| 4554 |
|
|
.IX Item "-ftree-pre"
|
| 4555 |
|
|
Perform Partial Redundancy Elimination (\s-1PRE\s0) on trees. This flag is
|
| 4556 |
|
|
enabled by default at \fB\-O2\fR and \fB\-O3\fR.
|
| 4557 |
|
|
.IP "\fB\-ftree\-fre\fR" 4
|
| 4558 |
|
|
.IX Item "-ftree-fre"
|
| 4559 |
|
|
Perform Full Redundancy Elimination (\s-1FRE\s0) on trees. The difference
|
| 4560 |
|
|
between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
|
| 4561 |
|
|
that are computed on all paths leading to the redundant computation.
|
| 4562 |
|
|
This analysis faster than \s-1PRE\s0, though it exposes fewer redundancies.
|
| 4563 |
|
|
This flag is enabled by default at \fB\-O\fR and higher.
|
| 4564 |
|
|
.IP "\fB\-ftree\-copy\-prop\fR" 4
|
| 4565 |
|
|
.IX Item "-ftree-copy-prop"
|
| 4566 |
|
|
Perform copy propagation on trees. This pass eliminates unnecessary
|
| 4567 |
|
|
copy operations. This flag is enabled by default at \fB\-O\fR and
|
| 4568 |
|
|
higher.
|
| 4569 |
|
|
.IP "\fB\-ftree\-store\-copy\-prop\fR" 4
|
| 4570 |
|
|
.IX Item "-ftree-store-copy-prop"
|
| 4571 |
|
|
Perform copy propagation of memory loads and stores. This pass
|
| 4572 |
|
|
eliminates unnecessary copy operations in memory references
|
| 4573 |
|
|
(structures, global variables, arrays, etc). This flag is enabled by
|
| 4574 |
|
|
default at \fB\-O2\fR and higher.
|
| 4575 |
|
|
.IP "\fB\-ftree\-salias\fR" 4
|
| 4576 |
|
|
.IX Item "-ftree-salias"
|
| 4577 |
|
|
Perform structural alias analysis on trees. This flag
|
| 4578 |
|
|
is enabled by default at \fB\-O\fR and higher.
|
| 4579 |
|
|
.IP "\fB\-ftree\-sink\fR" 4
|
| 4580 |
|
|
.IX Item "-ftree-sink"
|
| 4581 |
|
|
Perform forward store motion on trees. This flag is
|
| 4582 |
|
|
enabled by default at \fB\-O\fR and higher.
|
| 4583 |
|
|
.IP "\fB\-ftree\-ccp\fR" 4
|
| 4584 |
|
|
.IX Item "-ftree-ccp"
|
| 4585 |
|
|
Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
|
| 4586 |
|
|
pass only operates on local scalar variables and is enabled by default
|
| 4587 |
|
|
at \fB\-O\fR and higher.
|
| 4588 |
|
|
.IP "\fB\-ftree\-store\-ccp\fR" 4
|
| 4589 |
|
|
.IX Item "-ftree-store-ccp"
|
| 4590 |
|
|
Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
|
| 4591 |
|
|
pass operates on both local scalar variables and memory stores and
|
| 4592 |
|
|
loads (global variables, structures, arrays, etc). This flag is
|
| 4593 |
|
|
enabled by default at \fB\-O2\fR and higher.
|
| 4594 |
|
|
.IP "\fB\-ftree\-dce\fR" 4
|
| 4595 |
|
|
.IX Item "-ftree-dce"
|
| 4596 |
|
|
Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
|
| 4597 |
|
|
default at \fB\-O\fR and higher.
|
| 4598 |
|
|
.IP "\fB\-ftree\-dominator\-opts\fR" 4
|
| 4599 |
|
|
.IX Item "-ftree-dominator-opts"
|
| 4600 |
|
|
Perform a variety of simple scalar cleanups (constant/copy
|
| 4601 |
|
|
propagation, redundancy elimination, range propagation and expression
|
| 4602 |
|
|
simplification) based on a dominator tree traversal. This also
|
| 4603 |
|
|
performs jump threading (to reduce jumps to jumps). This flag is
|
| 4604 |
|
|
enabled by default at \fB\-O\fR and higher.
|
| 4605 |
|
|
.IP "\fB\-ftree\-ch\fR" 4
|
| 4606 |
|
|
.IX Item "-ftree-ch"
|
| 4607 |
|
|
Perform loop header copying on trees. This is beneficial since it increases
|
| 4608 |
|
|
effectiveness of code motion optimizations. It also saves one jump. This flag
|
| 4609 |
|
|
is enabled by default at \fB\-O\fR and higher. It is not enabled
|
| 4610 |
|
|
for \fB\-Os\fR, since it usually increases code size.
|
| 4611 |
|
|
.IP "\fB\-ftree\-loop\-optimize\fR" 4
|
| 4612 |
|
|
.IX Item "-ftree-loop-optimize"
|
| 4613 |
|
|
Perform loop optimizations on trees. This flag is enabled by default
|
| 4614 |
|
|
at \fB\-O\fR and higher.
|
| 4615 |
|
|
.IP "\fB\-ftree\-loop\-linear\fR" 4
|
| 4616 |
|
|
.IX Item "-ftree-loop-linear"
|
| 4617 |
|
|
Perform linear loop transformations on tree. This flag can improve cache
|
| 4618 |
|
|
performance and allow further loop optimizations to take place.
|
| 4619 |
|
|
.IP "\fB\-ftree\-loop\-im\fR" 4
|
| 4620 |
|
|
.IX Item "-ftree-loop-im"
|
| 4621 |
|
|
Perform loop invariant motion on trees. This pass moves only invariants that
|
| 4622 |
|
|
would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
|
| 4623 |
|
|
nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
|
| 4624 |
|
|
operands of conditions that are invariant out of the loop, so that we can use
|
| 4625 |
|
|
just trivial invariantness analysis in loop unswitching. The pass also includes
|
| 4626 |
|
|
store motion.
|
| 4627 |
|
|
.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
|
| 4628 |
|
|
.IX Item "-ftree-loop-ivcanon"
|
| 4629 |
|
|
Create a canonical counter for number of iterations in the loop for that
|
| 4630 |
|
|
determining number of iterations requires complicated analysis. Later
|
| 4631 |
|
|
optimizations then may determine the number easily. Useful especially
|
| 4632 |
|
|
in connection with unrolling.
|
| 4633 |
|
|
.IP "\fB\-fivopts\fR" 4
|
| 4634 |
|
|
.IX Item "-fivopts"
|
| 4635 |
|
|
Perform induction variable optimizations (strength reduction, induction
|
| 4636 |
|
|
variable merging and induction variable elimination) on trees.
|
| 4637 |
|
|
.IP "\fB\-ftree\-sra\fR" 4
|
| 4638 |
|
|
.IX Item "-ftree-sra"
|
| 4639 |
|
|
Perform scalar replacement of aggregates. This pass replaces structure
|
| 4640 |
|
|
references with scalars to prevent committing structures to memory too
|
| 4641 |
|
|
early. This flag is enabled by default at \fB\-O\fR and higher.
|
| 4642 |
|
|
.IP "\fB\-ftree\-copyrename\fR" 4
|
| 4643 |
|
|
.IX Item "-ftree-copyrename"
|
| 4644 |
|
|
Perform copy renaming on trees. This pass attempts to rename compiler
|
| 4645 |
|
|
temporaries to other variables at copy locations, usually resulting in
|
| 4646 |
|
|
variable names which more closely resemble the original variables. This flag
|
| 4647 |
|
|
is enabled by default at \fB\-O\fR and higher.
|
| 4648 |
|
|
.IP "\fB\-ftree\-ter\fR" 4
|
| 4649 |
|
|
.IX Item "-ftree-ter"
|
| 4650 |
|
|
Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
|
| 4651 |
|
|
use/single def temporaries are replaced at their use location with their
|
| 4652 |
|
|
defining expression. This results in non-GIMPLE code, but gives the expanders
|
| 4653 |
|
|
much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
|
| 4654 |
|
|
enabled by default at \fB\-O\fR and higher.
|
| 4655 |
|
|
.IP "\fB\-ftree\-lrs\fR" 4
|
| 4656 |
|
|
.IX Item "-ftree-lrs"
|
| 4657 |
|
|
Perform live range splitting during the \s-1SSA\-\s0>normal phase. Distinct live
|
| 4658 |
|
|
ranges of a variable are split into unique variables, allowing for better
|
| 4659 |
|
|
optimization later. This is enabled by default at \fB\-O\fR and higher.
|
| 4660 |
|
|
.IP "\fB\-ftree\-vectorize\fR" 4
|
| 4661 |
|
|
.IX Item "-ftree-vectorize"
|
| 4662 |
|
|
Perform loop vectorization on trees.
|
| 4663 |
|
|
.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
|
| 4664 |
|
|
.IX Item "-ftree-vect-loop-version"
|
| 4665 |
|
|
Perform loop versioning when doing loop vectorization on trees. When a loop
|
| 4666 |
|
|
appears to be vectorizable except that data alignment or data dependence cannot
|
| 4667 |
|
|
be determined at compile time then vectorized and non-vectorized versions of
|
| 4668 |
|
|
the loop are generated along with runtime checks for alignment or dependence
|
| 4669 |
|
|
to control which version is executed. This option is enabled by default
|
| 4670 |
|
|
except at level \fB\-Os\fR where it is disabled.
|
| 4671 |
|
|
.IP "\fB\-ftree\-vrp\fR" 4
|
| 4672 |
|
|
.IX Item "-ftree-vrp"
|
| 4673 |
|
|
Perform Value Range Propagation on trees. This is similar to the
|
| 4674 |
|
|
constant propagation pass, but instead of values, ranges of values are
|
| 4675 |
|
|
propagated. This allows the optimizers to remove unnecessary range
|
| 4676 |
|
|
checks like array bound checks and null pointer checks. This is
|
| 4677 |
|
|
enabled by default at \fB\-O2\fR and higher. Null pointer check
|
| 4678 |
|
|
elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
|
| 4679 |
|
|
enabled.
|
| 4680 |
|
|
.IP "\fB\-ftracer\fR" 4
|
| 4681 |
|
|
.IX Item "-ftracer"
|
| 4682 |
|
|
Perform tail duplication to enlarge superblock size. This transformation
|
| 4683 |
|
|
simplifies the control flow of the function allowing other optimizations to do
|
| 4684 |
|
|
better job.
|
| 4685 |
|
|
.IP "\fB\-funroll\-loops\fR" 4
|
| 4686 |
|
|
.IX Item "-funroll-loops"
|
| 4687 |
|
|
Unroll loops whose number of iterations can be determined at compile
|
| 4688 |
|
|
time or upon entry to the loop. \fB\-funroll\-loops\fR implies both
|
| 4689 |
|
|
\&\fB\-fstrength\-reduce\fR and \fB\-frerun\-cse\-after\-loop\fR. This
|
| 4690 |
|
|
option makes code larger, and may or may not make it run faster.
|
| 4691 |
|
|
.IP "\fB\-funroll\-all\-loops\fR" 4
|
| 4692 |
|
|
.IX Item "-funroll-all-loops"
|
| 4693 |
|
|
Unroll all loops, even if their number of iterations is uncertain when
|
| 4694 |
|
|
the loop is entered. This usually makes programs run more slowly.
|
| 4695 |
|
|
\&\fB\-funroll\-all\-loops\fR implies the same options as
|
| 4696 |
|
|
\&\fB\-funroll\-loops\fR,
|
| 4697 |
|
|
.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
|
| 4698 |
|
|
.IX Item "-fsplit-ivs-in-unroller"
|
| 4699 |
|
|
Enables expressing of values of induction variables in later iterations
|
| 4700 |
|
|
of the unrolled loop using the value in the first iteration. This breaks
|
| 4701 |
|
|
long dependency chains, thus improving efficiency of the scheduling passes.
|
| 4702 |
|
|
.Sp
|
| 4703 |
|
|
Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
|
| 4704 |
|
|
same effect. However in cases the loop body is more complicated than
|
| 4705 |
|
|
a single basic block, this is not reliable. It also does not work at all
|
| 4706 |
|
|
on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
|
| 4707 |
|
|
.Sp
|
| 4708 |
|
|
This optimization is enabled by default.
|
| 4709 |
|
|
.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
|
| 4710 |
|
|
.IX Item "-fvariable-expansion-in-unroller"
|
| 4711 |
|
|
With this option, the compiler will create multiple copies of some
|
| 4712 |
|
|
local variables when unrolling a loop which can result in superior code.
|
| 4713 |
|
|
.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
|
| 4714 |
|
|
.IX Item "-fprefetch-loop-arrays"
|
| 4715 |
|
|
If supported by the target machine, generate instructions to prefetch
|
| 4716 |
|
|
memory to improve the performance of loops that access large arrays.
|
| 4717 |
|
|
.Sp
|
| 4718 |
|
|
These options may generate better or worse code; results are highly
|
| 4719 |
|
|
dependent on the structure of loops within the source code.
|
| 4720 |
|
|
.IP "\fB\-fno\-peephole\fR" 4
|
| 4721 |
|
|
.IX Item "-fno-peephole"
|
| 4722 |
|
|
.PD 0
|
| 4723 |
|
|
.IP "\fB\-fno\-peephole2\fR" 4
|
| 4724 |
|
|
.IX Item "-fno-peephole2"
|
| 4725 |
|
|
.PD
|
| 4726 |
|
|
Disable any machine-specific peephole optimizations. The difference
|
| 4727 |
|
|
between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
|
| 4728 |
|
|
are implemented in the compiler; some targets use one, some use the
|
| 4729 |
|
|
other, a few use both.
|
| 4730 |
|
|
.Sp
|
| 4731 |
|
|
\&\fB\-fpeephole\fR is enabled by default.
|
| 4732 |
|
|
\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4733 |
|
|
.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
|
| 4734 |
|
|
.IX Item "-fno-guess-branch-probability"
|
| 4735 |
|
|
Do not guess branch probabilities using heuristics.
|
| 4736 |
|
|
.Sp
|
| 4737 |
|
|
\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
|
| 4738 |
|
|
not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
|
| 4739 |
|
|
heuristics are based on the control flow graph. If some branch probabilities
|
| 4740 |
|
|
are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
|
| 4741 |
|
|
used to guess branch probabilities for the rest of the control flow graph,
|
| 4742 |
|
|
taking the \fB_\|_builtin_expect\fR info into account. The interactions
|
| 4743 |
|
|
between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
|
| 4744 |
|
|
some cases, it may be useful to disable the heuristics so that the effects
|
| 4745 |
|
|
of \fB_\|_builtin_expect\fR are easier to understand.
|
| 4746 |
|
|
.Sp
|
| 4747 |
|
|
The default is \fB\-fguess\-branch\-probability\fR at levels
|
| 4748 |
|
|
\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4749 |
|
|
.IP "\fB\-freorder\-blocks\fR" 4
|
| 4750 |
|
|
.IX Item "-freorder-blocks"
|
| 4751 |
|
|
Reorder basic blocks in the compiled function in order to reduce number of
|
| 4752 |
|
|
taken branches and improve code locality.
|
| 4753 |
|
|
.Sp
|
| 4754 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
| 4755 |
|
|
.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
|
| 4756 |
|
|
.IX Item "-freorder-blocks-and-partition"
|
| 4757 |
|
|
In addition to reordering basic blocks in the compiled function, in order
|
| 4758 |
|
|
to reduce number of taken branches, partitions hot and cold basic blocks
|
| 4759 |
|
|
into separate sections of the assembly and .o files, to improve
|
| 4760 |
|
|
paging and cache locality performance.
|
| 4761 |
|
|
.Sp
|
| 4762 |
|
|
This optimization is automatically turned off in the presence of
|
| 4763 |
|
|
exception handling, for linkonce sections, for functions with a user-defined
|
| 4764 |
|
|
section attribute and on any architecture that does not support named
|
| 4765 |
|
|
sections.
|
| 4766 |
|
|
.IP "\fB\-freorder\-functions\fR" 4
|
| 4767 |
|
|
.IX Item "-freorder-functions"
|
| 4768 |
|
|
Reorder functions in the object file in order to
|
| 4769 |
|
|
improve code locality. This is implemented by using special
|
| 4770 |
|
|
subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
|
| 4771 |
|
|
\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
|
| 4772 |
|
|
the linker so object file format must support named sections and linker must
|
| 4773 |
|
|
place them in a reasonable way.
|
| 4774 |
|
|
.Sp
|
| 4775 |
|
|
Also profile feedback must be available in to make this option effective. See
|
| 4776 |
|
|
\&\fB\-fprofile\-arcs\fR for details.
|
| 4777 |
|
|
.Sp
|
| 4778 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4779 |
|
|
.IP "\fB\-fstrict\-aliasing\fR" 4
|
| 4780 |
|
|
.IX Item "-fstrict-aliasing"
|
| 4781 |
|
|
Allows the compiler to assume the strictest aliasing rules applicable to
|
| 4782 |
|
|
the language being compiled. For C (and \*(C+), this activates
|
| 4783 |
|
|
optimizations based on the type of expressions. In particular, an
|
| 4784 |
|
|
object of one type is assumed never to reside at the same address as an
|
| 4785 |
|
|
object of a different type, unless the types are almost the same. For
|
| 4786 |
|
|
example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
|
| 4787 |
|
|
\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
|
| 4788 |
|
|
type.
|
| 4789 |
|
|
.Sp
|
| 4790 |
|
|
Pay special attention to code like this:
|
| 4791 |
|
|
.Sp
|
| 4792 |
|
|
.Vb 4
|
| 4793 |
|
|
\& union a_union {
|
| 4794 |
|
|
\& int i;
|
| 4795 |
|
|
\& double d;
|
| 4796 |
|
|
\& };
|
| 4797 |
|
|
.Ve
|
| 4798 |
|
|
.Sp
|
| 4799 |
|
|
.Vb 5
|
| 4800 |
|
|
\& int f() {
|
| 4801 |
|
|
\& a_union t;
|
| 4802 |
|
|
\& t.d = 3.0;
|
| 4803 |
|
|
\& return t.i;
|
| 4804 |
|
|
\& }
|
| 4805 |
|
|
.Ve
|
| 4806 |
|
|
.Sp
|
| 4807 |
|
|
The practice of reading from a different union member than the one most
|
| 4808 |
|
|
recently written to (called \*(L"type\-punning\*(R") is common. Even with
|
| 4809 |
|
|
\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
|
| 4810 |
|
|
is accessed through the union type. So, the code above will work as
|
| 4811 |
|
|
expected. However, this code might not:
|
| 4812 |
|
|
.Sp
|
| 4813 |
|
|
.Vb 7
|
| 4814 |
|
|
\& int f() {
|
| 4815 |
|
|
\& a_union t;
|
| 4816 |
|
|
\& int* ip;
|
| 4817 |
|
|
\& t.d = 3.0;
|
| 4818 |
|
|
\& ip = &t.i;
|
| 4819 |
|
|
\& return *ip;
|
| 4820 |
|
|
\& }
|
| 4821 |
|
|
.Ve
|
| 4822 |
|
|
.Sp
|
| 4823 |
|
|
Every language that wishes to perform language-specific alias analysis
|
| 4824 |
|
|
should define a function that computes, given an \f(CW\*(C`tree\*(C'\fR
|
| 4825 |
|
|
node, an alias set for the node. Nodes in different alias sets are not
|
| 4826 |
|
|
allowed to alias. For an example, see the C front-end function
|
| 4827 |
|
|
\&\f(CW\*(C`c_get_alias_set\*(C'\fR.
|
| 4828 |
|
|
.Sp
|
| 4829 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4830 |
|
|
.IP "\fB\-falign\-functions\fR" 4
|
| 4831 |
|
|
.IX Item "-falign-functions"
|
| 4832 |
|
|
.PD 0
|
| 4833 |
|
|
.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
|
| 4834 |
|
|
.IX Item "-falign-functions=n"
|
| 4835 |
|
|
.PD
|
| 4836 |
|
|
Align the start of functions to the next power-of-two greater than
|
| 4837 |
|
|
\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
|
| 4838 |
|
|
\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
|
| 4839 |
|
|
boundary, but \fB\-falign\-functions=24\fR would align to the next
|
| 4840 |
|
|
32\-byte boundary only if this can be done by skipping 23 bytes or less.
|
| 4841 |
|
|
.Sp
|
| 4842 |
|
|
\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
|
| 4843 |
|
|
equivalent and mean that functions will not be aligned.
|
| 4844 |
|
|
.Sp
|
| 4845 |
|
|
Some assemblers only support this flag when \fIn\fR is a power of two;
|
| 4846 |
|
|
in that case, it is rounded up.
|
| 4847 |
|
|
.Sp
|
| 4848 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default.
|
| 4849 |
|
|
.Sp
|
| 4850 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
| 4851 |
|
|
.IP "\fB\-falign\-labels\fR" 4
|
| 4852 |
|
|
.IX Item "-falign-labels"
|
| 4853 |
|
|
.PD 0
|
| 4854 |
|
|
.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
|
| 4855 |
|
|
.IX Item "-falign-labels=n"
|
| 4856 |
|
|
.PD
|
| 4857 |
|
|
Align all branch targets to a power-of-two boundary, skipping up to
|
| 4858 |
|
|
\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
|
| 4859 |
|
|
make code slower, because it must insert dummy operations for when the
|
| 4860 |
|
|
branch target is reached in the usual flow of the code.
|
| 4861 |
|
|
.Sp
|
| 4862 |
|
|
\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
|
| 4863 |
|
|
equivalent and mean that labels will not be aligned.
|
| 4864 |
|
|
.Sp
|
| 4865 |
|
|
If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
|
| 4866 |
|
|
are greater than this value, then their values are used instead.
|
| 4867 |
|
|
.Sp
|
| 4868 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default
|
| 4869 |
|
|
which is very likely to be \fB1\fR, meaning no alignment.
|
| 4870 |
|
|
.Sp
|
| 4871 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
| 4872 |
|
|
.IP "\fB\-falign\-loops\fR" 4
|
| 4873 |
|
|
.IX Item "-falign-loops"
|
| 4874 |
|
|
.PD 0
|
| 4875 |
|
|
.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
|
| 4876 |
|
|
.IX Item "-falign-loops=n"
|
| 4877 |
|
|
.PD
|
| 4878 |
|
|
Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
|
| 4879 |
|
|
like \fB\-falign\-functions\fR. The hope is that the loop will be
|
| 4880 |
|
|
executed many times, which will make up for any execution of the dummy
|
| 4881 |
|
|
operations.
|
| 4882 |
|
|
.Sp
|
| 4883 |
|
|
\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
|
| 4884 |
|
|
equivalent and mean that loops will not be aligned.
|
| 4885 |
|
|
.Sp
|
| 4886 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default.
|
| 4887 |
|
|
.Sp
|
| 4888 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
| 4889 |
|
|
.IP "\fB\-falign\-jumps\fR" 4
|
| 4890 |
|
|
.IX Item "-falign-jumps"
|
| 4891 |
|
|
.PD 0
|
| 4892 |
|
|
.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
|
| 4893 |
|
|
.IX Item "-falign-jumps=n"
|
| 4894 |
|
|
.PD
|
| 4895 |
|
|
Align branch targets to a power-of-two boundary, for branch targets
|
| 4896 |
|
|
where the targets can only be reached by jumping, skipping up to \fIn\fR
|
| 4897 |
|
|
bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
|
| 4898 |
|
|
need be executed.
|
| 4899 |
|
|
.Sp
|
| 4900 |
|
|
\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
|
| 4901 |
|
|
equivalent and mean that loops will not be aligned.
|
| 4902 |
|
|
.Sp
|
| 4903 |
|
|
If \fIn\fR is not specified or is zero, use a machine-dependent default.
|
| 4904 |
|
|
.Sp
|
| 4905 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
| 4906 |
|
|
.IP "\fB\-funit\-at\-a\-time\fR" 4
|
| 4907 |
|
|
.IX Item "-funit-at-a-time"
|
| 4908 |
|
|
Parse the whole compilation unit before starting to produce code.
|
| 4909 |
|
|
This allows some extra optimizations to take place but consumes
|
| 4910 |
|
|
more memory (in general). There are some compatibility issues
|
| 4911 |
|
|
with \fIunit-at-at-time\fR mode:
|
| 4912 |
|
|
.RS 4
|
| 4913 |
|
|
.IP "*" 4
|
| 4914 |
|
|
enabling \fIunit-at-a-time\fR mode may change the order
|
| 4915 |
|
|
in which functions, variables, and top-level \f(CW\*(C`asm\*(C'\fR statements
|
| 4916 |
|
|
are emitted, and will likely break code relying on some particular
|
| 4917 |
|
|
ordering. The majority of such top-level \f(CW\*(C`asm\*(C'\fR statements,
|
| 4918 |
|
|
though, can be replaced by \f(CW\*(C`section\*(C'\fR attributes.
|
| 4919 |
|
|
.IP "*" 4
|
| 4920 |
|
|
\&\fIunit-at-a-time\fR mode removes unreferenced static variables
|
| 4921 |
|
|
and functions. This may result in undefined references
|
| 4922 |
|
|
when an \f(CW\*(C`asm\*(C'\fR statement refers directly to variables or functions
|
| 4923 |
|
|
that are otherwise unused. In that case either the variable/function
|
| 4924 |
|
|
shall be listed as an operand of the \f(CW\*(C`asm\*(C'\fR statement operand or,
|
| 4925 |
|
|
in the case of top-level \f(CW\*(C`asm\*(C'\fR statements the attribute \f(CW\*(C`used\*(C'\fR
|
| 4926 |
|
|
shall be used on the declaration.
|
| 4927 |
|
|
.IP "*" 4
|
| 4928 |
|
|
Static functions now can use non-standard passing conventions that
|
| 4929 |
|
|
may break \f(CW\*(C`asm\*(C'\fR statements calling functions directly. Again,
|
| 4930 |
|
|
attribute \f(CW\*(C`used\*(C'\fR will prevent this behavior.
|
| 4931 |
|
|
.RE
|
| 4932 |
|
|
.RS 4
|
| 4933 |
|
|
.Sp
|
| 4934 |
|
|
As a temporary workaround, \fB\-fno\-unit\-at\-a\-time\fR can be used,
|
| 4935 |
|
|
but this scheme may not be supported by future releases of \s-1GCC\s0.
|
| 4936 |
|
|
.Sp
|
| 4937 |
|
|
Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
|
| 4938 |
|
|
.RE
|
| 4939 |
|
|
.IP "\fB\-fweb\fR" 4
|
| 4940 |
|
|
.IX Item "-fweb"
|
| 4941 |
|
|
Constructs webs as commonly used for register allocation purposes and assign
|
| 4942 |
|
|
each web individual pseudo register. This allows the register allocation pass
|
| 4943 |
|
|
to operate on pseudos directly, but also strengthens several other optimization
|
| 4944 |
|
|
passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
|
| 4945 |
|
|
however, make debugging impossible, since variables will no longer stay in a
|
| 4946 |
|
|
\&\*(L"home register\*(R".
|
| 4947 |
|
|
.Sp
|
| 4948 |
|
|
Enabled by default with \fB\-funroll\-loops\fR.
|
| 4949 |
|
|
.IP "\fB\-fwhole\-program\fR" 4
|
| 4950 |
|
|
.IX Item "-fwhole-program"
|
| 4951 |
|
|
Assume that the current compilation unit represents whole program being
|
| 4952 |
|
|
compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
|
| 4953 |
|
|
and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
|
| 4954 |
|
|
and in a affect gets more aggressively optimized by interprocedural optimizers.
|
| 4955 |
|
|
While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
|
| 4956 |
|
|
programs consisting of single file, in combination with option
|
| 4957 |
|
|
\&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
|
| 4958 |
|
|
programs since the functions and variables become local for the whole combined
|
| 4959 |
|
|
compilation unit, not for the single source file itself.
|
| 4960 |
|
|
.IP "\fB\-fno\-cprop\-registers\fR" 4
|
| 4961 |
|
|
.IX Item "-fno-cprop-registers"
|
| 4962 |
|
|
After register allocation and post-register allocation instruction splitting,
|
| 4963 |
|
|
we perform a copy-propagation pass to try to reduce scheduling dependencies
|
| 4964 |
|
|
and occasionally eliminate the copy.
|
| 4965 |
|
|
.Sp
|
| 4966 |
|
|
Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
|
| 4967 |
|
|
.IP "\fB\-fprofile\-generate\fR" 4
|
| 4968 |
|
|
.IX Item "-fprofile-generate"
|
| 4969 |
|
|
Enable options usually used for instrumenting application to produce
|
| 4970 |
|
|
profile useful for later recompilation with profile feedback based
|
| 4971 |
|
|
optimization. You must use \fB\-fprofile\-generate\fR both when
|
| 4972 |
|
|
compiling and when linking your program.
|
| 4973 |
|
|
.Sp
|
| 4974 |
|
|
The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
|
| 4975 |
|
|
.IP "\fB\-fprofile\-use\fR" 4
|
| 4976 |
|
|
.IX Item "-fprofile-use"
|
| 4977 |
|
|
Enable profile feedback directed optimizations, and optimizations
|
| 4978 |
|
|
generally profitable only with profile feedback available.
|
| 4979 |
|
|
.Sp
|
| 4980 |
|
|
The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
|
| 4981 |
|
|
\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR,
|
| 4982 |
|
|
\&\f(CW\*(C`\-fno\-loop\-optimize\*(C'\fR.
|
| 4983 |
|
|
.PP
|
| 4984 |
|
|
The following options control compiler behavior regarding floating
|
| 4985 |
|
|
point arithmetic. These options trade off between speed and
|
| 4986 |
|
|
correctness. All must be specifically enabled.
|
| 4987 |
|
|
.IP "\fB\-ffloat\-store\fR" 4
|
| 4988 |
|
|
.IX Item "-ffloat-store"
|
| 4989 |
|
|
Do not store floating point variables in registers, and inhibit other
|
| 4990 |
|
|
options that might change whether a floating point value is taken from a
|
| 4991 |
|
|
register or memory.
|
| 4992 |
|
|
.Sp
|
| 4993 |
|
|
This option prevents undesirable excess precision on machines such as
|
| 4994 |
|
|
the 68000 where the floating registers (of the 68881) keep more
|
| 4995 |
|
|
precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
|
| 4996 |
|
|
x86 architecture. For most programs, the excess precision does only
|
| 4997 |
|
|
good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
|
| 4998 |
|
|
point. Use \fB\-ffloat\-store\fR for such programs, after modifying
|
| 4999 |
|
|
them to store all pertinent intermediate computations into variables.
|
| 5000 |
|
|
.IP "\fB\-ffast\-math\fR" 4
|
| 5001 |
|
|
.IX Item "-ffast-math"
|
| 5002 |
|
|
Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR, \fB\-fno\-trapping\-math\fR, \fB\-ffinite\-math\-only\fR,
|
| 5003 |
|
|
\&\fB\-fno\-rounding\-math\fR, \fB\-fno\-signaling\-nans\fR
|
| 5004 |
|
|
and \fBfcx-limited-range\fR.
|
| 5005 |
|
|
.Sp
|
| 5006 |
|
|
This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
|
| 5007 |
|
|
.Sp
|
| 5008 |
|
|
This option should never be turned on by any \fB\-O\fR option since
|
| 5009 |
|
|
it can result in incorrect output for programs which depend on
|
| 5010 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
| 5011 |
|
|
math functions.
|
| 5012 |
|
|
.IP "\fB\-fno\-math\-errno\fR" 4
|
| 5013 |
|
|
.IX Item "-fno-math-errno"
|
| 5014 |
|
|
Do not set \s-1ERRNO\s0 after calling math functions that are executed
|
| 5015 |
|
|
with a single instruction, e.g., sqrt. A program that relies on
|
| 5016 |
|
|
\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
|
| 5017 |
|
|
for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
|
| 5018 |
|
|
.Sp
|
| 5019 |
|
|
This option should never be turned on by any \fB\-O\fR option since
|
| 5020 |
|
|
it can result in incorrect output for programs which depend on
|
| 5021 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
| 5022 |
|
|
math functions.
|
| 5023 |
|
|
.Sp
|
| 5024 |
|
|
The default is \fB\-fmath\-errno\fR.
|
| 5025 |
|
|
.Sp
|
| 5026 |
|
|
On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is therefore
|
| 5027 |
|
|
no reason for the compiler to consider the possibility that it might,
|
| 5028 |
|
|
and \fB\-fno\-math\-errno\fR is the default.
|
| 5029 |
|
|
.IP "\fB\-funsafe\-math\-optimizations\fR" 4
|
| 5030 |
|
|
.IX Item "-funsafe-math-optimizations"
|
| 5031 |
|
|
Allow optimizations for floating-point arithmetic that (a) assume
|
| 5032 |
|
|
that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
|
| 5033 |
|
|
\&\s-1ANSI\s0 standards. When used at link\-time, it may include libraries
|
| 5034 |
|
|
or startup files that change the default \s-1FPU\s0 control word or other
|
| 5035 |
|
|
similar optimizations.
|
| 5036 |
|
|
.Sp
|
| 5037 |
|
|
This option should never be turned on by any \fB\-O\fR option since
|
| 5038 |
|
|
it can result in incorrect output for programs which depend on
|
| 5039 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
| 5040 |
|
|
math functions.
|
| 5041 |
|
|
.Sp
|
| 5042 |
|
|
The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
|
| 5043 |
|
|
.IP "\fB\-ffinite\-math\-only\fR" 4
|
| 5044 |
|
|
.IX Item "-ffinite-math-only"
|
| 5045 |
|
|
Allow optimizations for floating-point arithmetic that assume
|
| 5046 |
|
|
that arguments and results are not NaNs or +\-Infs.
|
| 5047 |
|
|
.Sp
|
| 5048 |
|
|
This option should never be turned on by any \fB\-O\fR option since
|
| 5049 |
|
|
it can result in incorrect output for programs which depend on
|
| 5050 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications.
|
| 5051 |
|
|
.Sp
|
| 5052 |
|
|
The default is \fB\-fno\-finite\-math\-only\fR.
|
| 5053 |
|
|
.IP "\fB\-fno\-trapping\-math\fR" 4
|
| 5054 |
|
|
.IX Item "-fno-trapping-math"
|
| 5055 |
|
|
Compile code assuming that floating-point operations cannot generate
|
| 5056 |
|
|
user-visible traps. These traps include division by zero, overflow,
|
| 5057 |
|
|
underflow, inexact result and invalid operation. This option implies
|
| 5058 |
|
|
\&\fB\-fno\-signaling\-nans\fR. Setting this option may allow faster
|
| 5059 |
|
|
code if one relies on \*(L"non\-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
|
| 5060 |
|
|
.Sp
|
| 5061 |
|
|
This option should never be turned on by any \fB\-O\fR option since
|
| 5062 |
|
|
it can result in incorrect output for programs which depend on
|
| 5063 |
|
|
an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
|
| 5064 |
|
|
math functions.
|
| 5065 |
|
|
.Sp
|
| 5066 |
|
|
The default is \fB\-ftrapping\-math\fR.
|
| 5067 |
|
|
.IP "\fB\-frounding\-math\fR" 4
|
| 5068 |
|
|
.IX Item "-frounding-math"
|
| 5069 |
|
|
Disable transformations and optimizations that assume default floating
|
| 5070 |
|
|
point rounding behavior. This is round-to-zero for all floating point
|
| 5071 |
|
|
to integer conversions, and round-to-nearest for all other arithmetic
|
| 5072 |
|
|
truncations. This option should be specified for programs that change
|
| 5073 |
|
|
the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
|
| 5074 |
|
|
non-default rounding mode. This option disables constant folding of
|
| 5075 |
|
|
floating point expressions at compile-time (which may be affected by
|
| 5076 |
|
|
rounding mode) and arithmetic transformations that are unsafe in the
|
| 5077 |
|
|
presence of sign-dependent rounding modes.
|
| 5078 |
|
|
.Sp
|
| 5079 |
|
|
The default is \fB\-fno\-rounding\-math\fR.
|
| 5080 |
|
|
.Sp
|
| 5081 |
|
|
This option is experimental and does not currently guarantee to
|
| 5082 |
|
|
disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
|
| 5083 |
|
|
Future versions of \s-1GCC\s0 may provide finer control of this setting
|
| 5084 |
|
|
using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
|
| 5085 |
|
|
will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
|
| 5086 |
|
|
.IP "\fB\-fsignaling\-nans\fR" 4
|
| 5087 |
|
|
.IX Item "-fsignaling-nans"
|
| 5088 |
|
|
Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
|
| 5089 |
|
|
traps during floating-point operations. Setting this option disables
|
| 5090 |
|
|
optimizations that may change the number of exceptions visible with
|
| 5091 |
|
|
signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
|
| 5092 |
|
|
.Sp
|
| 5093 |
|
|
This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
|
| 5094 |
|
|
be defined.
|
| 5095 |
|
|
.Sp
|
| 5096 |
|
|
The default is \fB\-fno\-signaling\-nans\fR.
|
| 5097 |
|
|
.Sp
|
| 5098 |
|
|
This option is experimental and does not currently guarantee to
|
| 5099 |
|
|
disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
|
| 5100 |
|
|
.IP "\fB\-fsingle\-precision\-constant\fR" 4
|
| 5101 |
|
|
.IX Item "-fsingle-precision-constant"
|
| 5102 |
|
|
Treat floating point constant as single precision constant instead of
|
| 5103 |
|
|
implicitly converting it to double precision constant.
|
| 5104 |
|
|
.IP "\fB\-fcx\-limited\-range\fR" 4
|
| 5105 |
|
|
.IX Item "-fcx-limited-range"
|
| 5106 |
|
|
.PD 0
|
| 5107 |
|
|
.IP "\fB\-fno\-cx\-limited\-range\fR" 4
|
| 5108 |
|
|
.IX Item "-fno-cx-limited-range"
|
| 5109 |
|
|
.PD
|
| 5110 |
|
|
When enabled, this option states that a range reduction step is not
|
| 5111 |
|
|
needed when performing complex division. The default is
|
| 5112 |
|
|
\&\fB\-fno\-cx\-limited\-range\fR, but is enabled by \fB\-ffast\-math\fR.
|
| 5113 |
|
|
.Sp
|
| 5114 |
|
|
This option controls the default setting of the \s-1ISO\s0 C99
|
| 5115 |
|
|
\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
|
| 5116 |
|
|
all languages.
|
| 5117 |
|
|
.PP
|
| 5118 |
|
|
The following options control optimizations that may improve
|
| 5119 |
|
|
performance, but are not enabled by any \fB\-O\fR options. This
|
| 5120 |
|
|
section includes experimental options that may produce broken code.
|
| 5121 |
|
|
.IP "\fB\-fbranch\-probabilities\fR" 4
|
| 5122 |
|
|
.IX Item "-fbranch-probabilities"
|
| 5123 |
|
|
After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
|
| 5124 |
|
|
\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
|
| 5125 |
|
|
the number of times each branch was taken. When the program
|
| 5126 |
|
|
compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
|
| 5127 |
|
|
counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
|
| 5128 |
|
|
file The information in this data file is very dependent on the
|
| 5129 |
|
|
structure of the generated code, so you must use the same source code
|
| 5130 |
|
|
and the same optimization options for both compilations.
|
| 5131 |
|
|
.Sp
|
| 5132 |
|
|
With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
|
| 5133 |
|
|
\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
|
| 5134 |
|
|
These can be used to improve optimization. Currently, they are only
|
| 5135 |
|
|
used in one place: in \fIreorg.c\fR, instead of guessing which path a
|
| 5136 |
|
|
branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
|
| 5137 |
|
|
exactly determine which path is taken more often.
|
| 5138 |
|
|
.IP "\fB\-fprofile\-values\fR" 4
|
| 5139 |
|
|
.IX Item "-fprofile-values"
|
| 5140 |
|
|
If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
|
| 5141 |
|
|
data about values of expressions in the program is gathered.
|
| 5142 |
|
|
.Sp
|
| 5143 |
|
|
With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
|
| 5144 |
|
|
from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
|
| 5145 |
|
|
notes to instructions for their later usage in optimizations.
|
| 5146 |
|
|
.Sp
|
| 5147 |
|
|
Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
|
| 5148 |
|
|
.IP "\fB\-fvpt\fR" 4
|
| 5149 |
|
|
.IX Item "-fvpt"
|
| 5150 |
|
|
If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
|
| 5151 |
|
|
a code to gather information about values of expressions.
|
| 5152 |
|
|
.Sp
|
| 5153 |
|
|
With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
|
| 5154 |
|
|
and actually performs the optimizations based on them.
|
| 5155 |
|
|
Currently the optimizations include specialization of division operation
|
| 5156 |
|
|
using the knowledge about the value of the denominator.
|
| 5157 |
|
|
.IP "\fB\-frename\-registers\fR" 4
|
| 5158 |
|
|
.IX Item "-frename-registers"
|
| 5159 |
|
|
Attempt to avoid false dependencies in scheduled code by making use
|
| 5160 |
|
|
of registers left over after register allocation. This optimization
|
| 5161 |
|
|
will most benefit processors with lots of registers. Depending on the
|
| 5162 |
|
|
debug information format adopted by the target, however, it can
|
| 5163 |
|
|
make debugging impossible, since variables will no longer stay in
|
| 5164 |
|
|
a \*(L"home register\*(R".
|
| 5165 |
|
|
.Sp
|
| 5166 |
|
|
Enabled by default with \fB\-funroll\-loops\fR.
|
| 5167 |
|
|
.IP "\fB\-ftracer\fR" 4
|
| 5168 |
|
|
.IX Item "-ftracer"
|
| 5169 |
|
|
Perform tail duplication to enlarge superblock size. This transformation
|
| 5170 |
|
|
simplifies the control flow of the function allowing other optimizations to do
|
| 5171 |
|
|
better job.
|
| 5172 |
|
|
.Sp
|
| 5173 |
|
|
Enabled with \fB\-fprofile\-use\fR.
|
| 5174 |
|
|
.IP "\fB\-funroll\-loops\fR" 4
|
| 5175 |
|
|
.IX Item "-funroll-loops"
|
| 5176 |
|
|
Unroll loops whose number of iterations can be determined at compile time or
|
| 5177 |
|
|
upon entry to the loop. \fB\-funroll\-loops\fR implies
|
| 5178 |
|
|
\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
|
| 5179 |
|
|
It also turns on complete loop peeling (i.e. complete removal of loops with
|
| 5180 |
|
|
small constant number of iterations). This option makes code larger, and may
|
| 5181 |
|
|
or may not make it run faster.
|
| 5182 |
|
|
.Sp
|
| 5183 |
|
|
Enabled with \fB\-fprofile\-use\fR.
|
| 5184 |
|
|
.IP "\fB\-funroll\-all\-loops\fR" 4
|
| 5185 |
|
|
.IX Item "-funroll-all-loops"
|
| 5186 |
|
|
Unroll all loops, even if their number of iterations is uncertain when
|
| 5187 |
|
|
the loop is entered. This usually makes programs run more slowly.
|
| 5188 |
|
|
\&\fB\-funroll\-all\-loops\fR implies the same options as
|
| 5189 |
|
|
\&\fB\-funroll\-loops\fR.
|
| 5190 |
|
|
.IP "\fB\-fpeel\-loops\fR" 4
|
| 5191 |
|
|
.IX Item "-fpeel-loops"
|
| 5192 |
|
|
Peels the loops for that there is enough information that they do not
|
| 5193 |
|
|
roll much (from profile feedback). It also turns on complete loop peeling
|
| 5194 |
|
|
(i.e. complete removal of loops with small constant number of iterations).
|
| 5195 |
|
|
.Sp
|
| 5196 |
|
|
Enabled with \fB\-fprofile\-use\fR.
|
| 5197 |
|
|
.IP "\fB\-fmove\-loop\-invariants\fR" 4
|
| 5198 |
|
|
.IX Item "-fmove-loop-invariants"
|
| 5199 |
|
|
Enables the loop invariant motion pass in the new loop optimizer. Enabled
|
| 5200 |
|
|
at level \fB\-O1\fR
|
| 5201 |
|
|
.IP "\fB\-funswitch\-loops\fR" 4
|
| 5202 |
|
|
.IX Item "-funswitch-loops"
|
| 5203 |
|
|
Move branches with loop invariant conditions out of the loop, with duplicates
|
| 5204 |
|
|
of the loop on both branches (modified according to result of the condition).
|
| 5205 |
|
|
.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
|
| 5206 |
|
|
.IX Item "-fprefetch-loop-arrays"
|
| 5207 |
|
|
If supported by the target machine, generate instructions to prefetch
|
| 5208 |
|
|
memory to improve the performance of loops that access large arrays.
|
| 5209 |
|
|
.Sp
|
| 5210 |
|
|
Disabled at level \fB\-Os\fR.
|
| 5211 |
|
|
.IP "\fB\-ffunction\-sections\fR" 4
|
| 5212 |
|
|
.IX Item "-ffunction-sections"
|
| 5213 |
|
|
.PD 0
|
| 5214 |
|
|
.IP "\fB\-fdata\-sections\fR" 4
|
| 5215 |
|
|
.IX Item "-fdata-sections"
|
| 5216 |
|
|
.PD
|
| 5217 |
|
|
Place each function or data item into its own section in the output
|
| 5218 |
|
|
file if the target supports arbitrary sections. The name of the
|
| 5219 |
|
|
function or the name of the data item determines the section's name
|
| 5220 |
|
|
in the output file.
|
| 5221 |
|
|
.Sp
|
| 5222 |
|
|
Use these options on systems where the linker can perform optimizations
|
| 5223 |
|
|
to improve locality of reference in the instruction space. Most systems
|
| 5224 |
|
|
using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
|
| 5225 |
|
|
linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
|
| 5226 |
|
|
the future.
|
| 5227 |
|
|
.Sp
|
| 5228 |
|
|
Only use these options when there are significant benefits from doing
|
| 5229 |
|
|
so. When you specify these options, the assembler and linker will
|
| 5230 |
|
|
create larger object and executable files and will also be slower.
|
| 5231 |
|
|
You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
|
| 5232 |
|
|
specify this option and you may have problems with debugging if
|
| 5233 |
|
|
you specify both this option and \fB\-g\fR.
|
| 5234 |
|
|
.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
|
| 5235 |
|
|
.IX Item "-fbranch-target-load-optimize"
|
| 5236 |
|
|
Perform branch target register load optimization before prologue / epilogue
|
| 5237 |
|
|
threading.
|
| 5238 |
|
|
The use of target registers can typically be exposed only during reload,
|
| 5239 |
|
|
thus hoisting loads out of loops and doing inter-block scheduling needs
|
| 5240 |
|
|
a separate optimization pass.
|
| 5241 |
|
|
.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
|
| 5242 |
|
|
.IX Item "-fbranch-target-load-optimize2"
|
| 5243 |
|
|
Perform branch target register load optimization after prologue / epilogue
|
| 5244 |
|
|
threading.
|
| 5245 |
|
|
.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
|
| 5246 |
|
|
.IX Item "-fbtr-bb-exclusive"
|
| 5247 |
|
|
When performing branch target register load optimization, don't reuse
|
| 5248 |
|
|
branch target registers in within any basic block.
|
| 5249 |
|
|
.IP "\fB\-fstack\-protector\fR" 4
|
| 5250 |
|
|
.IX Item "-fstack-protector"
|
| 5251 |
|
|
Emit extra code to check for buffer overflows, such as stack smashing
|
| 5252 |
|
|
attacks. This is done by adding a guard variable to functions with
|
| 5253 |
|
|
vulnerable objects. This includes functions that call alloca, and
|
| 5254 |
|
|
functions with buffers larger than 8 bytes. The guards are initialized
|
| 5255 |
|
|
when a function is entered and then checked when the function exits.
|
| 5256 |
|
|
If a guard check fails, an error message is printed and the program exits.
|
| 5257 |
|
|
.IP "\fB\-fstack\-protector\-all\fR" 4
|
| 5258 |
|
|
.IX Item "-fstack-protector-all"
|
| 5259 |
|
|
Like \fB\-fstack\-protector\fR except that all functions are protected.
|
| 5260 |
|
|
.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
|
| 5261 |
|
|
.IX Item "--param name=value"
|
| 5262 |
|
|
In some places, \s-1GCC\s0 uses various constants to control the amount of
|
| 5263 |
|
|
optimization that is done. For example, \s-1GCC\s0 will not inline functions
|
| 5264 |
|
|
that contain more that a certain number of instructions. You can
|
| 5265 |
|
|
control some of these constants on the command-line using the
|
| 5266 |
|
|
\&\fB\-\-param\fR option.
|
| 5267 |
|
|
.Sp
|
| 5268 |
|
|
The names of specific parameters, and the meaning of the values, are
|
| 5269 |
|
|
tied to the internals of the compiler, and are subject to change
|
| 5270 |
|
|
without notice in future releases.
|
| 5271 |
|
|
.Sp
|
| 5272 |
|
|
In each case, the \fIvalue\fR is an integer. The allowable choices for
|
| 5273 |
|
|
\&\fIname\fR are given in the following table:
|
| 5274 |
|
|
.RS 4
|
| 5275 |
|
|
.IP "\fBsalias-max-implicit-fields\fR" 4
|
| 5276 |
|
|
.IX Item "salias-max-implicit-fields"
|
| 5277 |
|
|
The maximum number of fields in a variable without direct
|
| 5278 |
|
|
structure accesses for which structure aliasing will consider trying
|
| 5279 |
|
|
to track each field. The default is 5
|
| 5280 |
|
|
.IP "\fBsra-max-structure-size\fR" 4
|
| 5281 |
|
|
.IX Item "sra-max-structure-size"
|
| 5282 |
|
|
The maximum structure size, in bytes, at which the scalar replacement
|
| 5283 |
|
|
of aggregates (\s-1SRA\s0) optimization will perform block copies. The
|
| 5284 |
|
|
default value, 0, implies that \s-1GCC\s0 will select the most appropriate
|
| 5285 |
|
|
size itself.
|
| 5286 |
|
|
.IP "\fBsra-field-structure-ratio\fR" 4
|
| 5287 |
|
|
.IX Item "sra-field-structure-ratio"
|
| 5288 |
|
|
The threshold ratio (as a percentage) between instantiated fields and
|
| 5289 |
|
|
the complete structure size. We say that if the ratio of the number
|
| 5290 |
|
|
of bytes in instantiated fields to the number of bytes in the complete
|
| 5291 |
|
|
structure exceeds this parameter, then block copies are not used. The
|
| 5292 |
|
|
default is 75.
|
| 5293 |
|
|
.IP "\fBmax-crossjump-edges\fR" 4
|
| 5294 |
|
|
.IX Item "max-crossjump-edges"
|
| 5295 |
|
|
The maximum number of incoming edges to consider for crossjumping.
|
| 5296 |
|
|
The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
|
| 5297 |
|
|
the number of edges incoming to each block. Increasing values mean
|
| 5298 |
|
|
more aggressive optimization, making the compile time increase with
|
| 5299 |
|
|
probably small improvement in executable size.
|
| 5300 |
|
|
.IP "\fBmin-crossjump-insns\fR" 4
|
| 5301 |
|
|
.IX Item "min-crossjump-insns"
|
| 5302 |
|
|
The minimum number of instructions which must be matched at the end
|
| 5303 |
|
|
of two blocks before crossjumping will be performed on them. This
|
| 5304 |
|
|
value is ignored in the case where all instructions in the block being
|
| 5305 |
|
|
crossjumped from are matched. The default value is 5.
|
| 5306 |
|
|
.IP "\fBmax-grow-copy-bb-insns\fR" 4
|
| 5307 |
|
|
.IX Item "max-grow-copy-bb-insns"
|
| 5308 |
|
|
The maximum code size expansion factor when copying basic blocks
|
| 5309 |
|
|
instead of jumping. The expansion is relative to a jump instruction.
|
| 5310 |
|
|
The default value is 8.
|
| 5311 |
|
|
.IP "\fBmax-goto-duplication-insns\fR" 4
|
| 5312 |
|
|
.IX Item "max-goto-duplication-insns"
|
| 5313 |
|
|
The maximum number of instructions to duplicate to a block that jumps
|
| 5314 |
|
|
to a computed goto. To avoid O(N^2) behavior in a number of
|
| 5315 |
|
|
passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
|
| 5316 |
|
|
and unfactors them as late as possible. Only computed jumps at the
|
| 5317 |
|
|
end of a basic blocks with no more than max-goto-duplication-insns are
|
| 5318 |
|
|
unfactored. The default value is 8.
|
| 5319 |
|
|
.IP "\fBmax-delay-slot-insn-search\fR" 4
|
| 5320 |
|
|
.IX Item "max-delay-slot-insn-search"
|
| 5321 |
|
|
The maximum number of instructions to consider when looking for an
|
| 5322 |
|
|
instruction to fill a delay slot. If more than this arbitrary number of
|
| 5323 |
|
|
instructions is searched, the time savings from filling the delay slot
|
| 5324 |
|
|
will be minimal so stop searching. Increasing values mean more
|
| 5325 |
|
|
aggressive optimization, making the compile time increase with probably
|
| 5326 |
|
|
small improvement in executable run time.
|
| 5327 |
|
|
.IP "\fBmax-delay-slot-live-search\fR" 4
|
| 5328 |
|
|
.IX Item "max-delay-slot-live-search"
|
| 5329 |
|
|
When trying to fill delay slots, the maximum number of instructions to
|
| 5330 |
|
|
consider when searching for a block with valid live register
|
| 5331 |
|
|
information. Increasing this arbitrarily chosen value means more
|
| 5332 |
|
|
aggressive optimization, increasing the compile time. This parameter
|
| 5333 |
|
|
should be removed when the delay slot code is rewritten to maintain the
|
| 5334 |
|
|
control-flow graph.
|
| 5335 |
|
|
.IP "\fBmax-gcse-memory\fR" 4
|
| 5336 |
|
|
.IX Item "max-gcse-memory"
|
| 5337 |
|
|
The approximate maximum amount of memory that will be allocated in
|
| 5338 |
|
|
order to perform the global common subexpression elimination
|
| 5339 |
|
|
optimization. If more memory than specified is required, the
|
| 5340 |
|
|
optimization will not be done.
|
| 5341 |
|
|
.IP "\fBmax-gcse-passes\fR" 4
|
| 5342 |
|
|
.IX Item "max-gcse-passes"
|
| 5343 |
|
|
The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
|
| 5344 |
|
|
.IP "\fBmax-pending-list-length\fR" 4
|
| 5345 |
|
|
.IX Item "max-pending-list-length"
|
| 5346 |
|
|
The maximum number of pending dependencies scheduling will allow
|
| 5347 |
|
|
before flushing the current state and starting over. Large functions
|
| 5348 |
|
|
with few branches or calls can create excessively large lists which
|
| 5349 |
|
|
needlessly consume memory and resources.
|
| 5350 |
|
|
.IP "\fBmax-inline-insns-single\fR" 4
|
| 5351 |
|
|
.IX Item "max-inline-insns-single"
|
| 5352 |
|
|
Several parameters control the tree inliner used in gcc.
|
| 5353 |
|
|
This number sets the maximum number of instructions (counted in \s-1GCC\s0's
|
| 5354 |
|
|
internal representation) in a single function that the tree inliner
|
| 5355 |
|
|
will consider for inlining. This only affects functions declared
|
| 5356 |
|
|
inline and methods implemented in a class declaration (\*(C+).
|
| 5357 |
|
|
The default value is 450.
|
| 5358 |
|
|
.IP "\fBmax-inline-insns-auto\fR" 4
|
| 5359 |
|
|
.IX Item "max-inline-insns-auto"
|
| 5360 |
|
|
When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
|
| 5361 |
|
|
a lot of functions that would otherwise not be considered for inlining
|
| 5362 |
|
|
by the compiler will be investigated. To those functions, a different
|
| 5363 |
|
|
(more restrictive) limit compared to functions declared inline can
|
| 5364 |
|
|
be applied.
|
| 5365 |
|
|
The default value is 90.
|
| 5366 |
|
|
.IP "\fBlarge-function-insns\fR" 4
|
| 5367 |
|
|
.IX Item "large-function-insns"
|
| 5368 |
|
|
The limit specifying really large functions. For functions larger than this
|
| 5369 |
|
|
limit after inlining inlining is constrained by
|
| 5370 |
|
|
\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
|
| 5371 |
|
|
to avoid extreme compilation time caused by non-linear algorithms used by the
|
| 5372 |
|
|
backend.
|
| 5373 |
|
|
This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
|
| 5374 |
|
|
The default value is 2700.
|
| 5375 |
|
|
.IP "\fBlarge-function-growth\fR" 4
|
| 5376 |
|
|
.IX Item "large-function-growth"
|
| 5377 |
|
|
Specifies maximal growth of large function caused by inlining in percents.
|
| 5378 |
|
|
This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
|
| 5379 |
|
|
The default value is 100 which limits large function growth to 2.0 times
|
| 5380 |
|
|
the original size.
|
| 5381 |
|
|
.IP "\fBlarge-unit-insns\fR" 4
|
| 5382 |
|
|
.IX Item "large-unit-insns"
|
| 5383 |
|
|
The limit specifying large translation unit. Growth caused by inlining of
|
| 5384 |
|
|
units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
|
| 5385 |
|
|
For small units this might be too tight (consider unit consisting of function A
|
| 5386 |
|
|
that is inline and B that just calls A three time. If B is small relative to
|
| 5387 |
|
|
A, the growth of unit is 300\e% and yet such inlining is very sane. For very
|
| 5388 |
|
|
large units consisting of small inlininable functions however the overall unit
|
| 5389 |
|
|
growth limit is needed to avoid exponential explosion of code size. Thus for
|
| 5390 |
|
|
smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
|
| 5391 |
|
|
before aplying \fB\-\-param inline-unit-growth\fR. The default is 10000
|
| 5392 |
|
|
.IP "\fBinline-unit-growth\fR" 4
|
| 5393 |
|
|
.IX Item "inline-unit-growth"
|
| 5394 |
|
|
Specifies maximal overall growth of the compilation unit caused by inlining.
|
| 5395 |
|
|
This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
|
| 5396 |
|
|
The default value is 50 which limits unit growth to 1.5 times the original
|
| 5397 |
|
|
size.
|
| 5398 |
|
|
.IP "\fBmax-inline-insns-recursive\fR" 4
|
| 5399 |
|
|
.IX Item "max-inline-insns-recursive"
|
| 5400 |
|
|
.PD 0
|
| 5401 |
|
|
.IP "\fBmax-inline-insns-recursive-auto\fR" 4
|
| 5402 |
|
|
.IX Item "max-inline-insns-recursive-auto"
|
| 5403 |
|
|
.PD
|
| 5404 |
|
|
Specifies maximum number of instructions out-of-line copy of self recursive inline
|
| 5405 |
|
|
function can grow into by performing recursive inlining.
|
| 5406 |
|
|
.Sp
|
| 5407 |
|
|
For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
|
| 5408 |
|
|
taken into acount. For function not declared inline, recursive inlining
|
| 5409 |
|
|
happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
|
| 5410 |
|
|
enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
|
| 5411 |
|
|
default value is 450.
|
| 5412 |
|
|
.IP "\fBmax-inline-recursive-depth\fR" 4
|
| 5413 |
|
|
.IX Item "max-inline-recursive-depth"
|
| 5414 |
|
|
.PD 0
|
| 5415 |
|
|
.IP "\fBmax-inline-recursive-depth-auto\fR" 4
|
| 5416 |
|
|
.IX Item "max-inline-recursive-depth-auto"
|
| 5417 |
|
|
.PD
|
| 5418 |
|
|
Specifies maximum recursion depth used by the recursive inlining.
|
| 5419 |
|
|
.Sp
|
| 5420 |
|
|
For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
|
| 5421 |
|
|
taken into acount. For function not declared inline, recursive inlining
|
| 5422 |
|
|
happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
|
| 5423 |
|
|
enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
|
| 5424 |
|
|
default value is 450.
|
| 5425 |
|
|
.IP "\fBmin-inline-recursive-probability\fR" 4
|
| 5426 |
|
|
.IX Item "min-inline-recursive-probability"
|
| 5427 |
|
|
Recursive inlining is profitable only for function having deep recursion
|
| 5428 |
|
|
in average and can hurt for function having little recursion depth by
|
| 5429 |
|
|
increasing the prologue size or complexity of function body to other
|
| 5430 |
|
|
optimizers.
|
| 5431 |
|
|
.Sp
|
| 5432 |
|
|
When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
|
| 5433 |
|
|
recursion depth can be guessed from probability that function will recurse via
|
| 5434 |
|
|
given call expression. This parameter limits inlining only to call expression
|
| 5435 |
|
|
whose probability exceeds given threshold (in percents). The default value is
|
| 5436 |
|
|
10.
|
| 5437 |
|
|
.IP "\fBinline-call-cost\fR" 4
|
| 5438 |
|
|
.IX Item "inline-call-cost"
|
| 5439 |
|
|
Specify cost of call instruction relative to simple arithmetics operations
|
| 5440 |
|
|
(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
|
| 5441 |
|
|
functions and at the same time increases size of leaf function that is believed to
|
| 5442 |
|
|
reduce function size by being inlined. In effect it increases amount of
|
| 5443 |
|
|
inlining for code having large abstraction penalty (many functions that just
|
| 5444 |
|
|
pass the arguments to other functions) and decrease inlining for code with low
|
| 5445 |
|
|
abstraction penalty. The default value is 16.
|
| 5446 |
|
|
.IP "\fBmax-unrolled-insns\fR" 4
|
| 5447 |
|
|
.IX Item "max-unrolled-insns"
|
| 5448 |
|
|
The maximum number of instructions that a loop should have if that loop
|
| 5449 |
|
|
is unrolled, and if the loop is unrolled, it determines how many times
|
| 5450 |
|
|
the loop code is unrolled.
|
| 5451 |
|
|
.IP "\fBmax-average-unrolled-insns\fR" 4
|
| 5452 |
|
|
.IX Item "max-average-unrolled-insns"
|
| 5453 |
|
|
The maximum number of instructions biased by probabilities of their execution
|
| 5454 |
|
|
that a loop should have if that loop is unrolled, and if the loop is unrolled,
|
| 5455 |
|
|
it determines how many times the loop code is unrolled.
|
| 5456 |
|
|
.IP "\fBmax-unroll-times\fR" 4
|
| 5457 |
|
|
.IX Item "max-unroll-times"
|
| 5458 |
|
|
The maximum number of unrollings of a single loop.
|
| 5459 |
|
|
.IP "\fBmax-peeled-insns\fR" 4
|
| 5460 |
|
|
.IX Item "max-peeled-insns"
|
| 5461 |
|
|
The maximum number of instructions that a loop should have if that loop
|
| 5462 |
|
|
is peeled, and if the loop is peeled, it determines how many times
|
| 5463 |
|
|
the loop code is peeled.
|
| 5464 |
|
|
.IP "\fBmax-peel-times\fR" 4
|
| 5465 |
|
|
.IX Item "max-peel-times"
|
| 5466 |
|
|
The maximum number of peelings of a single loop.
|
| 5467 |
|
|
.IP "\fBmax-completely-peeled-insns\fR" 4
|
| 5468 |
|
|
.IX Item "max-completely-peeled-insns"
|
| 5469 |
|
|
The maximum number of insns of a completely peeled loop.
|
| 5470 |
|
|
.IP "\fBmax-completely-peel-times\fR" 4
|
| 5471 |
|
|
.IX Item "max-completely-peel-times"
|
| 5472 |
|
|
The maximum number of iterations of a loop to be suitable for complete peeling.
|
| 5473 |
|
|
.IP "\fBmax-unswitch-insns\fR" 4
|
| 5474 |
|
|
.IX Item "max-unswitch-insns"
|
| 5475 |
|
|
The maximum number of insns of an unswitched loop.
|
| 5476 |
|
|
.IP "\fBmax-unswitch-level\fR" 4
|
| 5477 |
|
|
.IX Item "max-unswitch-level"
|
| 5478 |
|
|
The maximum number of branches unswitched in a single loop.
|
| 5479 |
|
|
.IP "\fBlim-expensive\fR" 4
|
| 5480 |
|
|
.IX Item "lim-expensive"
|
| 5481 |
|
|
The minimum cost of an expensive expression in the loop invariant motion.
|
| 5482 |
|
|
.IP "\fBiv-consider-all-candidates-bound\fR" 4
|
| 5483 |
|
|
.IX Item "iv-consider-all-candidates-bound"
|
| 5484 |
|
|
Bound on number of candidates for induction variables below that
|
| 5485 |
|
|
all candidates are considered for each use in induction variable
|
| 5486 |
|
|
optimizations. Only the most relevant candidates are considered
|
| 5487 |
|
|
if there are more candidates, to avoid quadratic time complexity.
|
| 5488 |
|
|
.IP "\fBiv-max-considered-uses\fR" 4
|
| 5489 |
|
|
.IX Item "iv-max-considered-uses"
|
| 5490 |
|
|
The induction variable optimizations give up on loops that contain more
|
| 5491 |
|
|
induction variable uses.
|
| 5492 |
|
|
.IP "\fBiv-always-prune-cand-set-bound\fR" 4
|
| 5493 |
|
|
.IX Item "iv-always-prune-cand-set-bound"
|
| 5494 |
|
|
If number of candidates in the set is smaller than this value,
|
| 5495 |
|
|
we always try to remove unnecessary ivs from the set during its
|
| 5496 |
|
|
optimization when a new iv is added to the set.
|
| 5497 |
|
|
.IP "\fBscev-max-expr-size\fR" 4
|
| 5498 |
|
|
.IX Item "scev-max-expr-size"
|
| 5499 |
|
|
Bound on size of expressions used in the scalar evolutions analyzer.
|
| 5500 |
|
|
Large expressions slow the analyzer.
|
| 5501 |
|
|
.IP "\fBvect-max-version-checks\fR" 4
|
| 5502 |
|
|
.IX Item "vect-max-version-checks"
|
| 5503 |
|
|
The maximum number of runtime checks that can be performed when doing
|
| 5504 |
|
|
loop versioning in the vectorizer. See option ftree-vect-loop-version
|
| 5505 |
|
|
for more information.
|
| 5506 |
|
|
.IP "\fBmax-iterations-to-track\fR" 4
|
| 5507 |
|
|
.IX Item "max-iterations-to-track"
|
| 5508 |
|
|
The maximum number of iterations of a loop the brute force algorithm
|
| 5509 |
|
|
for analysis of # of iterations of the loop tries to evaluate.
|
| 5510 |
|
|
.IP "\fBhot-bb-count-fraction\fR" 4
|
| 5511 |
|
|
.IX Item "hot-bb-count-fraction"
|
| 5512 |
|
|
Select fraction of the maximal count of repetitions of basic block in program
|
| 5513 |
|
|
given basic block needs to have to be considered hot.
|
| 5514 |
|
|
.IP "\fBhot-bb-frequency-fraction\fR" 4
|
| 5515 |
|
|
.IX Item "hot-bb-frequency-fraction"
|
| 5516 |
|
|
Select fraction of the maximal frequency of executions of basic block in
|
| 5517 |
|
|
function given basic block needs to have to be considered hot
|
| 5518 |
|
|
.IP "\fBmax-predicted-iterations\fR" 4
|
| 5519 |
|
|
.IX Item "max-predicted-iterations"
|
| 5520 |
|
|
The maximum number of loop iterations we predict statically. This is useful
|
| 5521 |
|
|
in cases where function contain single loop with known bound and other loop
|
| 5522 |
|
|
with unknown. We predict the known number of iterations correctly, while
|
| 5523 |
|
|
the unknown number of iterations average to roughly 10. This means that the
|
| 5524 |
|
|
loop without bounds would appear artificially cold relative to the other one.
|
| 5525 |
|
|
.IP "\fBtracer-dynamic-coverage\fR" 4
|
| 5526 |
|
|
.IX Item "tracer-dynamic-coverage"
|
| 5527 |
|
|
.PD 0
|
| 5528 |
|
|
.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
|
| 5529 |
|
|
.IX Item "tracer-dynamic-coverage-feedback"
|
| 5530 |
|
|
.PD
|
| 5531 |
|
|
This value is used to limit superblock formation once the given percentage of
|
| 5532 |
|
|
executed instructions is covered. This limits unnecessary code size
|
| 5533 |
|
|
expansion.
|
| 5534 |
|
|
.Sp
|
| 5535 |
|
|
The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
|
| 5536 |
|
|
feedback is available. The real profiles (as opposed to statically estimated
|
| 5537 |
|
|
ones) are much less balanced allowing the threshold to be larger value.
|
| 5538 |
|
|
.IP "\fBtracer-max-code-growth\fR" 4
|
| 5539 |
|
|
.IX Item "tracer-max-code-growth"
|
| 5540 |
|
|
Stop tail duplication once code growth has reached given percentage. This is
|
| 5541 |
|
|
rather hokey argument, as most of the duplicates will be eliminated later in
|
| 5542 |
|
|
cross jumping, so it may be set to much higher values than is the desired code
|
| 5543 |
|
|
growth.
|
| 5544 |
|
|
.IP "\fBtracer-min-branch-ratio\fR" 4
|
| 5545 |
|
|
.IX Item "tracer-min-branch-ratio"
|
| 5546 |
|
|
Stop reverse growth when the reverse probability of best edge is less than this
|
| 5547 |
|
|
threshold (in percent).
|
| 5548 |
|
|
.IP "\fBtracer-min-branch-ratio\fR" 4
|
| 5549 |
|
|
.IX Item "tracer-min-branch-ratio"
|
| 5550 |
|
|
.PD 0
|
| 5551 |
|
|
.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
|
| 5552 |
|
|
.IX Item "tracer-min-branch-ratio-feedback"
|
| 5553 |
|
|
.PD
|
| 5554 |
|
|
Stop forward growth if the best edge do have probability lower than this
|
| 5555 |
|
|
threshold.
|
| 5556 |
|
|
.Sp
|
| 5557 |
|
|
Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
|
| 5558 |
|
|
compilation for profile feedback and one for compilation without. The value
|
| 5559 |
|
|
for compilation with profile feedback needs to be more conservative (higher) in
|
| 5560 |
|
|
order to make tracer effective.
|
| 5561 |
|
|
.IP "\fBmax-cse-path-length\fR" 4
|
| 5562 |
|
|
.IX Item "max-cse-path-length"
|
| 5563 |
|
|
Maximum number of basic blocks on path that cse considers. The default is 10.
|
| 5564 |
|
|
.IP "\fBmax-cse-insns\fR" 4
|
| 5565 |
|
|
.IX Item "max-cse-insns"
|
| 5566 |
|
|
The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
|
| 5567 |
|
|
.IP "\fBglobal-var-threshold\fR" 4
|
| 5568 |
|
|
.IX Item "global-var-threshold"
|
| 5569 |
|
|
Counts the number of function calls (\fIn\fR) and the number of
|
| 5570 |
|
|
call-clobbered variables (\fIv\fR). If \fIn\fRx\fIv\fR is larger than this limit, a
|
| 5571 |
|
|
single artificial variable will be created to represent all the
|
| 5572 |
|
|
call-clobbered variables at function call sites. This artificial
|
| 5573 |
|
|
variable will then be made to alias every call-clobbered variable.
|
| 5574 |
|
|
(done as \f(CW\*(C`int * size_t\*(C'\fR on the host machine; beware overflow).
|
| 5575 |
|
|
.IP "\fBmax-aliased-vops\fR" 4
|
| 5576 |
|
|
.IX Item "max-aliased-vops"
|
| 5577 |
|
|
Maximum number of virtual operands allowed to represent aliases
|
| 5578 |
|
|
before triggering the alias grouping heuristic. Alias grouping
|
| 5579 |
|
|
reduces compile times and memory consumption needed for aliasing at
|
| 5580 |
|
|
the expense of precision loss in alias information.
|
| 5581 |
|
|
.IP "\fBggc-min-expand\fR" 4
|
| 5582 |
|
|
.IX Item "ggc-min-expand"
|
| 5583 |
|
|
\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
|
| 5584 |
|
|
parameter specifies the minimum percentage by which the garbage
|
| 5585 |
|
|
collector's heap should be allowed to expand between collections.
|
| 5586 |
|
|
Tuning this may improve compilation speed; it has no effect on code
|
| 5587 |
|
|
generation.
|
| 5588 |
|
|
.Sp
|
| 5589 |
|
|
The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
|
| 5590 |
|
|
\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
|
| 5591 |
|
|
the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
|
| 5592 |
|
|
\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
|
| 5593 |
|
|
bound of 30% is used. Setting this parameter and
|
| 5594 |
|
|
\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
|
| 5595 |
|
|
every opportunity. This is extremely slow, but can be useful for
|
| 5596 |
|
|
debugging.
|
| 5597 |
|
|
.IP "\fBggc-min-heapsize\fR" 4
|
| 5598 |
|
|
.IX Item "ggc-min-heapsize"
|
| 5599 |
|
|
Minimum size of the garbage collector's heap before it begins bothering
|
| 5600 |
|
|
to collect garbage. The first collection occurs after the heap expands
|
| 5601 |
|
|
by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
|
| 5602 |
|
|
tuning this may improve compilation speed, and has no effect on code
|
| 5603 |
|
|
generation.
|
| 5604 |
|
|
.Sp
|
| 5605 |
|
|
The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
|
| 5606 |
|
|
tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
|
| 5607 |
|
|
with a lower bound of 4096 (four megabytes) and an upper bound of
|
| 5608 |
|
|
131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
|
| 5609 |
|
|
particular platform, the lower bound is used. Setting this parameter
|
| 5610 |
|
|
very large effectively disables garbage collection. Setting this
|
| 5611 |
|
|
parameter and \fBggc-min-expand\fR to zero causes a full collection
|
| 5612 |
|
|
to occur at every opportunity.
|
| 5613 |
|
|
.IP "\fBmax-reload-search-insns\fR" 4
|
| 5614 |
|
|
.IX Item "max-reload-search-insns"
|
| 5615 |
|
|
The maximum number of instruction reload should look backward for equivalent
|
| 5616 |
|
|
register. Increasing values mean more aggressive optimization, making the
|
| 5617 |
|
|
compile time increase with probably slightly better performance. The default
|
| 5618 |
|
|
value is 100.
|
| 5619 |
|
|
.IP "\fBmax-cselib-memory-location\fR" 4
|
| 5620 |
|
|
.IX Item "max-cselib-memory-location"
|
| 5621 |
|
|
The maximum number of memory locations cselib should take into acount.
|
| 5622 |
|
|
Increasing values mean more aggressive optimization, making the compile time
|
| 5623 |
|
|
increase with probably slightly better performance. The default value is 500.
|
| 5624 |
|
|
.IP "\fBmax-flow-memory-location\fR" 4
|
| 5625 |
|
|
.IX Item "max-flow-memory-location"
|
| 5626 |
|
|
Similar as \fBmax-cselib-memory-location\fR but for dataflow liveness.
|
| 5627 |
|
|
The default value is 100.
|
| 5628 |
|
|
.IP "\fBreorder-blocks-duplicate\fR" 4
|
| 5629 |
|
|
.IX Item "reorder-blocks-duplicate"
|
| 5630 |
|
|
.PD 0
|
| 5631 |
|
|
.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
|
| 5632 |
|
|
.IX Item "reorder-blocks-duplicate-feedback"
|
| 5633 |
|
|
.PD
|
| 5634 |
|
|
Used by basic block reordering pass to decide whether to use unconditional
|
| 5635 |
|
|
branch or duplicate the code on its destination. Code is duplicated when its
|
| 5636 |
|
|
estimated size is smaller than this value multiplied by the estimated size of
|
| 5637 |
|
|
unconditional jump in the hot spots of the program.
|
| 5638 |
|
|
.Sp
|
| 5639 |
|
|
The \fBreorder-block-duplicate-feedback\fR is used only when profile
|
| 5640 |
|
|
feedback is available and may be set to higher values than
|
| 5641 |
|
|
\&\fBreorder-block-duplicate\fR since information about the hot spots is more
|
| 5642 |
|
|
accurate.
|
| 5643 |
|
|
.IP "\fBmax-sched-region-blocks\fR" 4
|
| 5644 |
|
|
.IX Item "max-sched-region-blocks"
|
| 5645 |
|
|
The maximum number of blocks in a region to be considered for
|
| 5646 |
|
|
interblock scheduling. The default value is 10.
|
| 5647 |
|
|
.IP "\fBmax-sched-region-insns\fR" 4
|
| 5648 |
|
|
.IX Item "max-sched-region-insns"
|
| 5649 |
|
|
The maximum number of insns in a region to be considered for
|
| 5650 |
|
|
interblock scheduling. The default value is 100.
|
| 5651 |
|
|
.IP "\fBmin-sched-prob\fR" 4
|
| 5652 |
|
|
.IX Item "min-sched-prob"
|
| 5653 |
|
|
The minimum probability of reaching a source block for interblock
|
| 5654 |
|
|
speculative scheduling. The default value is 40.
|
| 5655 |
|
|
.IP "\fBmax-last-value-rtl\fR" 4
|
| 5656 |
|
|
.IX Item "max-last-value-rtl"
|
| 5657 |
|
|
The maximum size measured as number of RTLs that can be recorded in an expression
|
| 5658 |
|
|
in combiner for a pseudo register as last known value of that register. The default
|
| 5659 |
|
|
is 10000.
|
| 5660 |
|
|
.IP "\fBinteger-share-limit\fR" 4
|
| 5661 |
|
|
.IX Item "integer-share-limit"
|
| 5662 |
|
|
Small integer constants can use a shared data structure, reducing the
|
| 5663 |
|
|
compiler's memory usage and increasing its speed. This sets the maximum
|
| 5664 |
|
|
value of a shared integer constant's. The default value is 256.
|
| 5665 |
|
|
.IP "\fBmin-virtual-mappings\fR" 4
|
| 5666 |
|
|
.IX Item "min-virtual-mappings"
|
| 5667 |
|
|
Specifies the minimum number of virtual mappings in the incremental
|
| 5668 |
|
|
\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
|
| 5669 |
|
|
heuristic defined by virtual\-mappings\-ratio. The default value is
|
| 5670 |
|
|
100.
|
| 5671 |
|
|
.IP "\fBvirtual-mappings-ratio\fR" 4
|
| 5672 |
|
|
.IX Item "virtual-mappings-ratio"
|
| 5673 |
|
|
If the number of virtual mappings is virtual-mappings-ratio bigger
|
| 5674 |
|
|
than the number of virtual symbols to be updated, then the incremental
|
| 5675 |
|
|
\&\s-1SSA\s0 updater switches to a full update for those symbols. The default
|
| 5676 |
|
|
ratio is 3.
|
| 5677 |
|
|
.IP "\fBssp-buffer-size\fR" 4
|
| 5678 |
|
|
.IX Item "ssp-buffer-size"
|
| 5679 |
|
|
The minimum size of buffers (i.e. arrays) that will receive stack smashing
|
| 5680 |
|
|
protection when \fB\-fstack\-protection\fR is used.
|
| 5681 |
|
|
.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
|
| 5682 |
|
|
.IX Item "max-jump-thread-duplication-stmts"
|
| 5683 |
|
|
Maximum number of statements allowed in a block that needs to be
|
| 5684 |
|
|
duplicated when threading jumps.
|
| 5685 |
|
|
.IP "\fBmax-fields-for-field-sensitive\fR" 4
|
| 5686 |
|
|
.IX Item "max-fields-for-field-sensitive"
|
| 5687 |
|
|
Maximum number of fields in a structure we will treat in
|
| 5688 |
|
|
a field sensitive manner during pointer analysis.
|
| 5689 |
|
|
.RE
|
| 5690 |
|
|
.RS 4
|
| 5691 |
|
|
.RE
|
| 5692 |
|
|
.Sh "Options Controlling the Preprocessor"
|
| 5693 |
|
|
.IX Subsection "Options Controlling the Preprocessor"
|
| 5694 |
|
|
These options control the C preprocessor, which is run on each C source
|
| 5695 |
|
|
file before actual compilation.
|
| 5696 |
|
|
.PP
|
| 5697 |
|
|
If you use the \fB\-E\fR option, nothing is done except preprocessing.
|
| 5698 |
|
|
Some of these options make sense only together with \fB\-E\fR because
|
| 5699 |
|
|
they cause the preprocessor output to be unsuitable for actual
|
| 5700 |
|
|
compilation.
|
| 5701 |
|
|
.Sp
|
| 5702 |
|
|
.RS 4
|
| 5703 |
|
|
You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
|
| 5704 |
|
|
and pass \fIoption\fR directly through to the preprocessor. If
|
| 5705 |
|
|
\&\fIoption\fR contains commas, it is split into multiple options at the
|
| 5706 |
|
|
commas. However, many options are modified, translated or interpreted
|
| 5707 |
|
|
by the compiler driver before being passed to the preprocessor, and
|
| 5708 |
|
|
\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
|
| 5709 |
|
|
interface is undocumented and subject to change, so whenever possible
|
| 5710 |
|
|
you should avoid using \fB\-Wp\fR and let the driver handle the
|
| 5711 |
|
|
options instead.
|
| 5712 |
|
|
.RE
|
| 5713 |
|
|
.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
|
| 5714 |
|
|
.IX Item "-Xpreprocessor option"
|
| 5715 |
|
|
Pass \fIoption\fR as an option to the preprocessor. You can use this to
|
| 5716 |
|
|
supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
|
| 5717 |
|
|
recognize.
|
| 5718 |
|
|
.Sp
|
| 5719 |
|
|
If you want to pass an option that takes an argument, you must use
|
| 5720 |
|
|
\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
|
| 5721 |
|
|
.IP "\fB\-D\fR \fIname\fR" 4
|
| 5722 |
|
|
.IX Item "-D name"
|
| 5723 |
|
|
Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
|
| 5724 |
|
|
.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
|
| 5725 |
|
|
.IX Item "-D name=definition"
|
| 5726 |
|
|
The contents of \fIdefinition\fR are tokenized and processed as if
|
| 5727 |
|
|
they appeared during translation phase three in a \fB#define\fR
|
| 5728 |
|
|
directive. In particular, the definition will be truncated by
|
| 5729 |
|
|
embedded newline characters.
|
| 5730 |
|
|
.Sp
|
| 5731 |
|
|
If you are invoking the preprocessor from a shell or shell-like
|
| 5732 |
|
|
program you may need to use the shell's quoting syntax to protect
|
| 5733 |
|
|
characters such as spaces that have a meaning in the shell syntax.
|
| 5734 |
|
|
.Sp
|
| 5735 |
|
|
If you wish to define a function-like macro on the command line, write
|
| 5736 |
|
|
its argument list with surrounding parentheses before the equals sign
|
| 5737 |
|
|
(if any). Parentheses are meaningful to most shells, so you will need
|
| 5738 |
|
|
to quote the option. With \fBsh\fR and \fBcsh\fR,
|
| 5739 |
|
|
\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
|
| 5740 |
|
|
.Sp
|
| 5741 |
|
|
\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
|
| 5742 |
|
|
are given on the command line. All \fB\-imacros\fR \fIfile\fR and
|
| 5743 |
|
|
\&\fB\-include\fR \fIfile\fR options are processed after all
|
| 5744 |
|
|
\&\fB\-D\fR and \fB\-U\fR options.
|
| 5745 |
|
|
.IP "\fB\-U\fR \fIname\fR" 4
|
| 5746 |
|
|
.IX Item "-U name"
|
| 5747 |
|
|
Cancel any previous definition of \fIname\fR, either built in or
|
| 5748 |
|
|
provided with a \fB\-D\fR option.
|
| 5749 |
|
|
.IP "\fB\-undef\fR" 4
|
| 5750 |
|
|
.IX Item "-undef"
|
| 5751 |
|
|
Do not predefine any system-specific or GCC-specific macros. The
|
| 5752 |
|
|
standard predefined macros remain defined.
|
| 5753 |
|
|
.IP "\fB\-I\fR \fIdir\fR" 4
|
| 5754 |
|
|
.IX Item "-I dir"
|
| 5755 |
|
|
Add the directory \fIdir\fR to the list of directories to be searched
|
| 5756 |
|
|
for header files.
|
| 5757 |
|
|
Directories named by \fB\-I\fR are searched before the standard
|
| 5758 |
|
|
system include directories. If the directory \fIdir\fR is a standard
|
| 5759 |
|
|
system include directory, the option is ignored to ensure that the
|
| 5760 |
|
|
default search order for system directories and the special treatment
|
| 5761 |
|
|
of system headers are not defeated
|
| 5762 |
|
|
\&.
|
| 5763 |
|
|
.IP "\fB\-o\fR \fIfile\fR" 4
|
| 5764 |
|
|
.IX Item "-o file"
|
| 5765 |
|
|
Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
|
| 5766 |
|
|
as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
|
| 5767 |
|
|
different interpretation of a second non-option argument, so you must
|
| 5768 |
|
|
use \fB\-o\fR to specify the output file.
|
| 5769 |
|
|
.IP "\fB\-Wall\fR" 4
|
| 5770 |
|
|
.IX Item "-Wall"
|
| 5771 |
|
|
Turns on all optional warnings which are desirable for normal code.
|
| 5772 |
|
|
At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
|
| 5773 |
|
|
\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
|
| 5774 |
|
|
change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
|
| 5775 |
|
|
preprocessor's warnings are on by default and have no options to
|
| 5776 |
|
|
control them.
|
| 5777 |
|
|
.IP "\fB\-Wcomment\fR" 4
|
| 5778 |
|
|
.IX Item "-Wcomment"
|
| 5779 |
|
|
.PD 0
|
| 5780 |
|
|
.IP "\fB\-Wcomments\fR" 4
|
| 5781 |
|
|
.IX Item "-Wcomments"
|
| 5782 |
|
|
.PD
|
| 5783 |
|
|
Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
|
| 5784 |
|
|
comment, or whenever a backslash-newline appears in a \fB//\fR comment.
|
| 5785 |
|
|
(Both forms have the same effect.)
|
| 5786 |
|
|
.IP "\fB\-Wtrigraphs\fR" 4
|
| 5787 |
|
|
.IX Item "-Wtrigraphs"
|
| 5788 |
|
|
@anchor{Wtrigraphs}
|
| 5789 |
|
|
Most trigraphs in comments cannot affect the meaning of the program.
|
| 5790 |
|
|
However, a trigraph that would form an escaped newline (\fB??/\fR at
|
| 5791 |
|
|
the end of a line) can, by changing where the comment begins or ends.
|
| 5792 |
|
|
Therefore, only trigraphs that would form escaped newlines produce
|
| 5793 |
|
|
warnings inside a comment.
|
| 5794 |
|
|
.Sp
|
| 5795 |
|
|
This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
|
| 5796 |
|
|
given, this option is still enabled unless trigraphs are enabled. To
|
| 5797 |
|
|
get trigraph conversion without warnings, but get the other
|
| 5798 |
|
|
\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
|
| 5799 |
|
|
.IP "\fB\-Wtraditional\fR" 4
|
| 5800 |
|
|
.IX Item "-Wtraditional"
|
| 5801 |
|
|
Warn about certain constructs that behave differently in traditional and
|
| 5802 |
|
|
\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
|
| 5803 |
|
|
equivalent, and problematic constructs which should be avoided.
|
| 5804 |
|
|
.IP "\fB\-Wimport\fR" 4
|
| 5805 |
|
|
.IX Item "-Wimport"
|
| 5806 |
|
|
Warn the first time \fB#import\fR is used.
|
| 5807 |
|
|
.IP "\fB\-Wundef\fR" 4
|
| 5808 |
|
|
.IX Item "-Wundef"
|
| 5809 |
|
|
Warn whenever an identifier which is not a macro is encountered in an
|
| 5810 |
|
|
\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
|
| 5811 |
|
|
replaced with zero.
|
| 5812 |
|
|
.IP "\fB\-Wunused\-macros\fR" 4
|
| 5813 |
|
|
.IX Item "-Wunused-macros"
|
| 5814 |
|
|
Warn about macros defined in the main file that are unused. A macro
|
| 5815 |
|
|
is \fIused\fR if it is expanded or tested for existence at least once.
|
| 5816 |
|
|
The preprocessor will also warn if the macro has not been used at the
|
| 5817 |
|
|
time it is redefined or undefined.
|
| 5818 |
|
|
.Sp
|
| 5819 |
|
|
Built-in macros, macros defined on the command line, and macros
|
| 5820 |
|
|
defined in include files are not warned about.
|
| 5821 |
|
|
.Sp
|
| 5822 |
|
|
\&\fINote:\fR If a macro is actually used, but only used in skipped
|
| 5823 |
|
|
conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
|
| 5824 |
|
|
warning in such a case, you might improve the scope of the macro's
|
| 5825 |
|
|
definition by, for example, moving it into the first skipped block.
|
| 5826 |
|
|
Alternatively, you could provide a dummy use with something like:
|
| 5827 |
|
|
.Sp
|
| 5828 |
|
|
.Vb 2
|
| 5829 |
|
|
\& #if defined the_macro_causing_the_warning
|
| 5830 |
|
|
\& #endif
|
| 5831 |
|
|
.Ve
|
| 5832 |
|
|
.IP "\fB\-Wendif\-labels\fR" 4
|
| 5833 |
|
|
.IX Item "-Wendif-labels"
|
| 5834 |
|
|
Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
|
| 5835 |
|
|
This usually happens in code of the form
|
| 5836 |
|
|
.Sp
|
| 5837 |
|
|
.Vb 5
|
| 5838 |
|
|
\& #if FOO
|
| 5839 |
|
|
\& ...
|
| 5840 |
|
|
\& #else FOO
|
| 5841 |
|
|
\& ...
|
| 5842 |
|
|
\& #endif FOO
|
| 5843 |
|
|
.Ve
|
| 5844 |
|
|
.Sp
|
| 5845 |
|
|
The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
|
| 5846 |
|
|
in older programs. This warning is on by default.
|
| 5847 |
|
|
.IP "\fB\-Werror\fR" 4
|
| 5848 |
|
|
.IX Item "-Werror"
|
| 5849 |
|
|
Make all warnings into hard errors. Source code which triggers warnings
|
| 5850 |
|
|
will be rejected.
|
| 5851 |
|
|
.IP "\fB\-Wsystem\-headers\fR" 4
|
| 5852 |
|
|
.IX Item "-Wsystem-headers"
|
| 5853 |
|
|
Issue warnings for code in system headers. These are normally unhelpful
|
| 5854 |
|
|
in finding bugs in your own code, therefore suppressed. If you are
|
| 5855 |
|
|
responsible for the system library, you may want to see them.
|
| 5856 |
|
|
.IP "\fB\-w\fR" 4
|
| 5857 |
|
|
.IX Item "-w"
|
| 5858 |
|
|
Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
|
| 5859 |
|
|
.IP "\fB\-pedantic\fR" 4
|
| 5860 |
|
|
.IX Item "-pedantic"
|
| 5861 |
|
|
Issue all the mandatory diagnostics listed in the C standard. Some of
|
| 5862 |
|
|
them are left out by default, since they trigger frequently on harmless
|
| 5863 |
|
|
code.
|
| 5864 |
|
|
.IP "\fB\-pedantic\-errors\fR" 4
|
| 5865 |
|
|
.IX Item "-pedantic-errors"
|
| 5866 |
|
|
Issue all the mandatory diagnostics, and make all mandatory diagnostics
|
| 5867 |
|
|
into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
|
| 5868 |
|
|
without \fB\-pedantic\fR but treats as warnings.
|
| 5869 |
|
|
.IP "\fB\-M\fR" 4
|
| 5870 |
|
|
.IX Item "-M"
|
| 5871 |
|
|
Instead of outputting the result of preprocessing, output a rule
|
| 5872 |
|
|
suitable for \fBmake\fR describing the dependencies of the main
|
| 5873 |
|
|
source file. The preprocessor outputs one \fBmake\fR rule containing
|
| 5874 |
|
|
the object file name for that source file, a colon, and the names of all
|
| 5875 |
|
|
the included files, including those coming from \fB\-include\fR or
|
| 5876 |
|
|
\&\fB\-imacros\fR command line options.
|
| 5877 |
|
|
.Sp
|
| 5878 |
|
|
Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
|
| 5879 |
|
|
object file name consists of the basename of the source file with any
|
| 5880 |
|
|
suffix replaced with object file suffix. If there are many included
|
| 5881 |
|
|
files then the rule is split into several lines using \fB\e\fR\-newline.
|
| 5882 |
|
|
The rule has no commands.
|
| 5883 |
|
|
.Sp
|
| 5884 |
|
|
This option does not suppress the preprocessor's debug output, such as
|
| 5885 |
|
|
\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
|
| 5886 |
|
|
rules you should explicitly specify the dependency output file with
|
| 5887 |
|
|
\&\fB\-MF\fR, or use an environment variable like
|
| 5888 |
|
|
\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
|
| 5889 |
|
|
will still be sent to the regular output stream as normal.
|
| 5890 |
|
|
.Sp
|
| 5891 |
|
|
Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
|
| 5892 |
|
|
warnings with an implicit \fB\-w\fR.
|
| 5893 |
|
|
.IP "\fB\-MM\fR" 4
|
| 5894 |
|
|
.IX Item "-MM"
|
| 5895 |
|
|
Like \fB\-M\fR but do not mention header files that are found in
|
| 5896 |
|
|
system header directories, nor header files that are included,
|
| 5897 |
|
|
directly or indirectly, from such a header.
|
| 5898 |
|
|
.Sp
|
| 5899 |
|
|
This implies that the choice of angle brackets or double quotes in an
|
| 5900 |
|
|
\&\fB#include\fR directive does not in itself determine whether that
|
| 5901 |
|
|
header will appear in \fB\-MM\fR dependency output. This is a
|
| 5902 |
|
|
slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
|
| 5903 |
|
|
.Sp
|
| 5904 |
|
|
@anchor{dashMF}
|
| 5905 |
|
|
.IP "\fB\-MF\fR \fIfile\fR" 4
|
| 5906 |
|
|
.IX Item "-MF file"
|
| 5907 |
|
|
When used with \fB\-M\fR or \fB\-MM\fR, specifies a
|
| 5908 |
|
|
file to write the dependencies to. If no \fB\-MF\fR switch is given
|
| 5909 |
|
|
the preprocessor sends the rules to the same place it would have sent
|
| 5910 |
|
|
preprocessed output.
|
| 5911 |
|
|
.Sp
|
| 5912 |
|
|
When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
|
| 5913 |
|
|
\&\fB\-MF\fR overrides the default dependency output file.
|
| 5914 |
|
|
.IP "\fB\-MG\fR" 4
|
| 5915 |
|
|
.IX Item "-MG"
|
| 5916 |
|
|
In conjunction with an option such as \fB\-M\fR requesting
|
| 5917 |
|
|
dependency generation, \fB\-MG\fR assumes missing header files are
|
| 5918 |
|
|
generated files and adds them to the dependency list without raising
|
| 5919 |
|
|
an error. The dependency filename is taken directly from the
|
| 5920 |
|
|
\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
|
| 5921 |
|
|
also suppresses preprocessed output, as a missing header file renders
|
| 5922 |
|
|
this useless.
|
| 5923 |
|
|
.Sp
|
| 5924 |
|
|
This feature is used in automatic updating of makefiles.
|
| 5925 |
|
|
.IP "\fB\-MP\fR" 4
|
| 5926 |
|
|
.IX Item "-MP"
|
| 5927 |
|
|
This option instructs \s-1CPP\s0 to add a phony target for each dependency
|
| 5928 |
|
|
other than the main file, causing each to depend on nothing. These
|
| 5929 |
|
|
dummy rules work around errors \fBmake\fR gives if you remove header
|
| 5930 |
|
|
files without updating the \fIMakefile\fR to match.
|
| 5931 |
|
|
.Sp
|
| 5932 |
|
|
This is typical output:
|
| 5933 |
|
|
.Sp
|
| 5934 |
|
|
.Vb 1
|
| 5935 |
|
|
\& test.o: test.c test.h
|
| 5936 |
|
|
.Ve
|
| 5937 |
|
|
.Sp
|
| 5938 |
|
|
.Vb 1
|
| 5939 |
|
|
\& test.h:
|
| 5940 |
|
|
.Ve
|
| 5941 |
|
|
.IP "\fB\-MT\fR \fItarget\fR" 4
|
| 5942 |
|
|
.IX Item "-MT target"
|
| 5943 |
|
|
Change the target of the rule emitted by dependency generation. By
|
| 5944 |
|
|
default \s-1CPP\s0 takes the name of the main input file, including any path,
|
| 5945 |
|
|
deletes any file suffix such as \fB.c\fR, and appends the platform's
|
| 5946 |
|
|
usual object suffix. The result is the target.
|
| 5947 |
|
|
.Sp
|
| 5948 |
|
|
An \fB\-MT\fR option will set the target to be exactly the string you
|
| 5949 |
|
|
specify. If you want multiple targets, you can specify them as a single
|
| 5950 |
|
|
argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
|
| 5951 |
|
|
.Sp
|
| 5952 |
|
|
For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
|
| 5953 |
|
|
.Sp
|
| 5954 |
|
|
.Vb 1
|
| 5955 |
|
|
\& $(objpfx)foo.o: foo.c
|
| 5956 |
|
|
.Ve
|
| 5957 |
|
|
.IP "\fB\-MQ\fR \fItarget\fR" 4
|
| 5958 |
|
|
.IX Item "-MQ target"
|
| 5959 |
|
|
Same as \fB\-MT\fR, but it quotes any characters which are special to
|
| 5960 |
|
|
Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
|
| 5961 |
|
|
.Sp
|
| 5962 |
|
|
.Vb 1
|
| 5963 |
|
|
\& $$(objpfx)foo.o: foo.c
|
| 5964 |
|
|
.Ve
|
| 5965 |
|
|
.Sp
|
| 5966 |
|
|
The default target is automatically quoted, as if it were given with
|
| 5967 |
|
|
\&\fB\-MQ\fR.
|
| 5968 |
|
|
.IP "\fB\-MD\fR" 4
|
| 5969 |
|
|
.IX Item "-MD"
|
| 5970 |
|
|
\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
|
| 5971 |
|
|
\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
|
| 5972 |
|
|
whether an \fB\-o\fR option is given. If it is, the driver uses its
|
| 5973 |
|
|
argument but with a suffix of \fI.d\fR, otherwise it take the
|
| 5974 |
|
|
basename of the input file and applies a \fI.d\fR suffix.
|
| 5975 |
|
|
.Sp
|
| 5976 |
|
|
If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
|
| 5977 |
|
|
\&\fB\-o\fR switch is understood to specify the dependency output file
|
| 5978 |
|
|
(but \f(CW@pxref\fR{dashMF,,\-MF}), but if used without \fB\-E\fR, each \fB\-o\fR
|
| 5979 |
|
|
is understood to specify a target object file.
|
| 5980 |
|
|
.Sp
|
| 5981 |
|
|
Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
|
| 5982 |
|
|
a dependency output file as a side-effect of the compilation process.
|
| 5983 |
|
|
.IP "\fB\-MMD\fR" 4
|
| 5984 |
|
|
.IX Item "-MMD"
|
| 5985 |
|
|
Like \fB\-MD\fR except mention only user header files, not system
|
| 5986 |
|
|
header files.
|
| 5987 |
|
|
.IP "\fB\-fpch\-deps\fR" 4
|
| 5988 |
|
|
.IX Item "-fpch-deps"
|
| 5989 |
|
|
When using precompiled headers, this flag
|
| 5990 |
|
|
will cause the dependency-output flags to also list the files from the
|
| 5991 |
|
|
precompiled header's dependencies. If not specified only the
|
| 5992 |
|
|
precompiled header would be listed and not the files that were used to
|
| 5993 |
|
|
create it because those files are not consulted when a precompiled
|
| 5994 |
|
|
header is used.
|
| 5995 |
|
|
.IP "\fB\-fpch\-preprocess\fR" 4
|
| 5996 |
|
|
.IX Item "-fpch-preprocess"
|
| 5997 |
|
|
This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
|
| 5998 |
|
|
\&\f(CW\*(C`#pragma GCC pch_preprocess ""\*(C'\fR in the output to mark
|
| 5999 |
|
|
the place where the precompiled header was found, and its filename. When
|
| 6000 |
|
|
\&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
|
| 6001 |
|
|
loads the \s-1PCH\s0.
|
| 6002 |
|
|
.Sp
|
| 6003 |
|
|
This option is off by default, because the resulting preprocessed output
|
| 6004 |
|
|
is only really suitable as input to \s-1GCC\s0. It is switched on by
|
| 6005 |
|
|
\&\fB\-save\-temps\fR.
|
| 6006 |
|
|
.Sp
|
| 6007 |
|
|
You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
|
| 6008 |
|
|
safe to edit the filename if the \s-1PCH\s0 file is available in a different
|
| 6009 |
|
|
location. The filename may be absolute or it may be relative to \s-1GCC\s0's
|
| 6010 |
|
|
current directory.
|
| 6011 |
|
|
.IP "\fB\-x c\fR" 4
|
| 6012 |
|
|
.IX Item "-x c"
|
| 6013 |
|
|
.PD 0
|
| 6014 |
|
|
.IP "\fB\-x c++\fR" 4
|
| 6015 |
|
|
.IX Item "-x c++"
|
| 6016 |
|
|
.IP "\fB\-x objective-c\fR" 4
|
| 6017 |
|
|
.IX Item "-x objective-c"
|
| 6018 |
|
|
.IP "\fB\-x assembler-with-cpp\fR" 4
|
| 6019 |
|
|
.IX Item "-x assembler-with-cpp"
|
| 6020 |
|
|
.PD
|
| 6021 |
|
|
Specify the source language: C, \*(C+, Objective\-C, or assembly. This has
|
| 6022 |
|
|
nothing to do with standards conformance or extensions; it merely
|
| 6023 |
|
|
selects which base syntax to expect. If you give none of these options,
|
| 6024 |
|
|
cpp will deduce the language from the extension of the source file:
|
| 6025 |
|
|
\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
|
| 6026 |
|
|
extensions for \*(C+ and assembly are also recognized. If cpp does not
|
| 6027 |
|
|
recognize the extension, it will treat the file as C; this is the most
|
| 6028 |
|
|
generic mode.
|
| 6029 |
|
|
.Sp
|
| 6030 |
|
|
\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
|
| 6031 |
|
|
which selected both the language and the standards conformance level.
|
| 6032 |
|
|
This option has been removed, because it conflicts with the \fB\-l\fR
|
| 6033 |
|
|
option.
|
| 6034 |
|
|
.IP "\fB\-std=\fR\fIstandard\fR" 4
|
| 6035 |
|
|
.IX Item "-std=standard"
|
| 6036 |
|
|
.PD 0
|
| 6037 |
|
|
.IP "\fB\-ansi\fR" 4
|
| 6038 |
|
|
.IX Item "-ansi"
|
| 6039 |
|
|
.PD
|
| 6040 |
|
|
Specify the standard to which the code should conform. Currently \s-1CPP\s0
|
| 6041 |
|
|
knows about C and \*(C+ standards; others may be added in the future.
|
| 6042 |
|
|
.Sp
|
| 6043 |
|
|
\&\fIstandard\fR
|
| 6044 |
|
|
may be one of:
|
| 6045 |
|
|
.RS 4
|
| 6046 |
|
|
.ie n .IP """iso9899:1990""" 4
|
| 6047 |
|
|
.el .IP "\f(CWiso9899:1990\fR" 4
|
| 6048 |
|
|
.IX Item "iso9899:1990"
|
| 6049 |
|
|
.PD 0
|
| 6050 |
|
|
.ie n .IP """c89""" 4
|
| 6051 |
|
|
.el .IP "\f(CWc89\fR" 4
|
| 6052 |
|
|
.IX Item "c89"
|
| 6053 |
|
|
.PD
|
| 6054 |
|
|
The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
|
| 6055 |
|
|
this version of the standard.
|
| 6056 |
|
|
.Sp
|
| 6057 |
|
|
The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
|
| 6058 |
|
|
.ie n .IP """iso9899:199409""" 4
|
| 6059 |
|
|
.el .IP "\f(CWiso9899:199409\fR" 4
|
| 6060 |
|
|
.IX Item "iso9899:199409"
|
| 6061 |
|
|
The 1990 C standard, as amended in 1994.
|
| 6062 |
|
|
.ie n .IP """iso9899:1999""" 4
|
| 6063 |
|
|
.el .IP "\f(CWiso9899:1999\fR" 4
|
| 6064 |
|
|
.IX Item "iso9899:1999"
|
| 6065 |
|
|
.PD 0
|
| 6066 |
|
|
.ie n .IP """c99""" 4
|
| 6067 |
|
|
.el .IP "\f(CWc99\fR" 4
|
| 6068 |
|
|
.IX Item "c99"
|
| 6069 |
|
|
.ie n .IP """iso9899:199x""" 4
|
| 6070 |
|
|
.el .IP "\f(CWiso9899:199x\fR" 4
|
| 6071 |
|
|
.IX Item "iso9899:199x"
|
| 6072 |
|
|
.ie n .IP """c9x""" 4
|
| 6073 |
|
|
.el .IP "\f(CWc9x\fR" 4
|
| 6074 |
|
|
.IX Item "c9x"
|
| 6075 |
|
|
.PD
|
| 6076 |
|
|
The revised \s-1ISO\s0 C standard, published in December 1999. Before
|
| 6077 |
|
|
publication, this was known as C9X.
|
| 6078 |
|
|
.ie n .IP """gnu89""" 4
|
| 6079 |
|
|
.el .IP "\f(CWgnu89\fR" 4
|
| 6080 |
|
|
.IX Item "gnu89"
|
| 6081 |
|
|
The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
|
| 6082 |
|
|
.ie n .IP """gnu99""" 4
|
| 6083 |
|
|
.el .IP "\f(CWgnu99\fR" 4
|
| 6084 |
|
|
.IX Item "gnu99"
|
| 6085 |
|
|
.PD 0
|
| 6086 |
|
|
.ie n .IP """gnu9x""" 4
|
| 6087 |
|
|
.el .IP "\f(CWgnu9x\fR" 4
|
| 6088 |
|
|
.IX Item "gnu9x"
|
| 6089 |
|
|
.PD
|
| 6090 |
|
|
The 1999 C standard plus \s-1GNU\s0 extensions.
|
| 6091 |
|
|
.ie n .IP """c++98""" 4
|
| 6092 |
|
|
.el .IP "\f(CWc++98\fR" 4
|
| 6093 |
|
|
.IX Item "c++98"
|
| 6094 |
|
|
The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
|
| 6095 |
|
|
.ie n .IP """gnu++98""" 4
|
| 6096 |
|
|
.el .IP "\f(CWgnu++98\fR" 4
|
| 6097 |
|
|
.IX Item "gnu++98"
|
| 6098 |
|
|
The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
|
| 6099 |
|
|
default for \*(C+ code.
|
| 6100 |
|
|
.RE
|
| 6101 |
|
|
.RS 4
|
| 6102 |
|
|
.RE
|
| 6103 |
|
|
.IP "\fB\-I\-\fR" 4
|
| 6104 |
|
|
.IX Item "-I-"
|
| 6105 |
|
|
Split the include path. Any directories specified with \fB\-I\fR
|
| 6106 |
|
|
options before \fB\-I\-\fR are searched only for headers requested with
|
| 6107 |
|
|
\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
|
| 6108 |
|
|
\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
|
| 6109 |
|
|
specified with \fB\-I\fR options after the \fB\-I\-\fR, those
|
| 6110 |
|
|
directories are searched for all \fB#include\fR directives.
|
| 6111 |
|
|
.Sp
|
| 6112 |
|
|
In addition, \fB\-I\-\fR inhibits the use of the directory of the current
|
| 6113 |
|
|
file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
|
| 6114 |
|
|
This option has been deprecated.
|
| 6115 |
|
|
.IP "\fB\-nostdinc\fR" 4
|
| 6116 |
|
|
.IX Item "-nostdinc"
|
| 6117 |
|
|
Do not search the standard system directories for header files.
|
| 6118 |
|
|
Only the directories you have specified with \fB\-I\fR options
|
| 6119 |
|
|
(and the directory of the current file, if appropriate) are searched.
|
| 6120 |
|
|
.IP "\fB\-nostdinc++\fR" 4
|
| 6121 |
|
|
.IX Item "-nostdinc++"
|
| 6122 |
|
|
Do not search for header files in the \*(C+\-specific standard directories,
|
| 6123 |
|
|
but do still search the other standard directories. (This option is
|
| 6124 |
|
|
used when building the \*(C+ library.)
|
| 6125 |
|
|
.IP "\fB\-include\fR \fIfile\fR" 4
|
| 6126 |
|
|
.IX Item "-include file"
|
| 6127 |
|
|
Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
|
| 6128 |
|
|
line of the primary source file. However, the first directory searched
|
| 6129 |
|
|
for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
|
| 6130 |
|
|
the directory containing the main source file. If not found there, it
|
| 6131 |
|
|
is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
|
| 6132 |
|
|
chain as normal.
|
| 6133 |
|
|
.Sp
|
| 6134 |
|
|
If multiple \fB\-include\fR options are given, the files are included
|
| 6135 |
|
|
in the order they appear on the command line.
|
| 6136 |
|
|
.IP "\fB\-imacros\fR \fIfile\fR" 4
|
| 6137 |
|
|
.IX Item "-imacros file"
|
| 6138 |
|
|
Exactly like \fB\-include\fR, except that any output produced by
|
| 6139 |
|
|
scanning \fIfile\fR is thrown away. Macros it defines remain defined.
|
| 6140 |
|
|
This allows you to acquire all the macros from a header without also
|
| 6141 |
|
|
processing its declarations.
|
| 6142 |
|
|
.Sp
|
| 6143 |
|
|
All files specified by \fB\-imacros\fR are processed before all files
|
| 6144 |
|
|
specified by \fB\-include\fR.
|
| 6145 |
|
|
.IP "\fB\-idirafter\fR \fIdir\fR" 4
|
| 6146 |
|
|
.IX Item "-idirafter dir"
|
| 6147 |
|
|
Search \fIdir\fR for header files, but do it \fIafter\fR all
|
| 6148 |
|
|
directories specified with \fB\-I\fR and the standard system directories
|
| 6149 |
|
|
have been exhausted. \fIdir\fR is treated as a system include directory.
|
| 6150 |
|
|
.IP "\fB\-iprefix\fR \fIprefix\fR" 4
|
| 6151 |
|
|
.IX Item "-iprefix prefix"
|
| 6152 |
|
|
Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
|
| 6153 |
|
|
options. If the prefix represents a directory, you should include the
|
| 6154 |
|
|
final \fB/\fR.
|
| 6155 |
|
|
.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
|
| 6156 |
|
|
.IX Item "-iwithprefix dir"
|
| 6157 |
|
|
.PD 0
|
| 6158 |
|
|
.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
|
| 6159 |
|
|
.IX Item "-iwithprefixbefore dir"
|
| 6160 |
|
|
.PD
|
| 6161 |
|
|
Append \fIdir\fR to the prefix specified previously with
|
| 6162 |
|
|
\&\fB\-iprefix\fR, and add the resulting directory to the include search
|
| 6163 |
|
|
path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
|
| 6164 |
|
|
would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
|
| 6165 |
|
|
.IP "\fB\-isysroot\fR \fIdir\fR" 4
|
| 6166 |
|
|
.IX Item "-isysroot dir"
|
| 6167 |
|
|
This option is like the \fB\-\-sysroot\fR option, but applies only to
|
| 6168 |
|
|
header files. See the \fB\-\-sysroot\fR option for more information.
|
| 6169 |
|
|
.IP "\fB\-isystem\fR \fIdir\fR" 4
|
| 6170 |
|
|
.IX Item "-isystem dir"
|
| 6171 |
|
|
Search \fIdir\fR for header files, after all directories specified by
|
| 6172 |
|
|
\&\fB\-I\fR but before the standard system directories. Mark it
|
| 6173 |
|
|
as a system directory, so that it gets the same special treatment as
|
| 6174 |
|
|
is applied to the standard system directories.
|
| 6175 |
|
|
.IP "\fB\-iquote\fR \fIdir\fR" 4
|
| 6176 |
|
|
.IX Item "-iquote dir"
|
| 6177 |
|
|
Search \fIdir\fR only for header files requested with
|
| 6178 |
|
|
\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
|
| 6179 |
|
|
\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
|
| 6180 |
|
|
\&\fB\-I\fR and before the standard system directories.
|
| 6181 |
|
|
.IP "\fB\-fdollars\-in\-identifiers\fR" 4
|
| 6182 |
|
|
.IX Item "-fdollars-in-identifiers"
|
| 6183 |
|
|
@anchor{fdollars\-in\-identifiers}
|
| 6184 |
|
|
Accept \fB$\fR in identifiers.
|
| 6185 |
|
|
.IP "\fB\-fextended\-identifiers\fR" 4
|
| 6186 |
|
|
.IX Item "-fextended-identifiers"
|
| 6187 |
|
|
Accept universal character names in identifiers. This option is
|
| 6188 |
|
|
experimental; in a future version of \s-1GCC\s0, it will be enabled by
|
| 6189 |
|
|
default for C99 and \*(C+.
|
| 6190 |
|
|
.IP "\fB\-fpreprocessed\fR" 4
|
| 6191 |
|
|
.IX Item "-fpreprocessed"
|
| 6192 |
|
|
Indicate to the preprocessor that the input file has already been
|
| 6193 |
|
|
preprocessed. This suppresses things like macro expansion, trigraph
|
| 6194 |
|
|
conversion, escaped newline splicing, and processing of most directives.
|
| 6195 |
|
|
The preprocessor still recognizes and removes comments, so that you can
|
| 6196 |
|
|
pass a file preprocessed with \fB\-C\fR to the compiler without
|
| 6197 |
|
|
problems. In this mode the integrated preprocessor is little more than
|
| 6198 |
|
|
a tokenizer for the front ends.
|
| 6199 |
|
|
.Sp
|
| 6200 |
|
|
\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
|
| 6201 |
|
|
extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
|
| 6202 |
|
|
extensions that \s-1GCC\s0 uses for preprocessed files created by
|
| 6203 |
|
|
\&\fB\-save\-temps\fR.
|
| 6204 |
|
|
.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
|
| 6205 |
|
|
.IX Item "-ftabstop=width"
|
| 6206 |
|
|
Set the distance between tab stops. This helps the preprocessor report
|
| 6207 |
|
|
correct column numbers in warnings or errors, even if tabs appear on the
|
| 6208 |
|
|
line. If the value is less than 1 or greater than 100, the option is
|
| 6209 |
|
|
ignored. The default is 8.
|
| 6210 |
|
|
.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
|
| 6211 |
|
|
.IX Item "-fexec-charset=charset"
|
| 6212 |
|
|
Set the execution character set, used for string and character
|
| 6213 |
|
|
constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
|
| 6214 |
|
|
supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
|
| 6215 |
|
|
.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
|
| 6216 |
|
|
.IX Item "-fwide-exec-charset=charset"
|
| 6217 |
|
|
Set the wide execution character set, used for wide string and
|
| 6218 |
|
|
character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
|
| 6219 |
|
|
corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
|
| 6220 |
|
|
\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
|
| 6221 |
|
|
by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
|
| 6222 |
|
|
problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
|
| 6223 |
|
|
.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
|
| 6224 |
|
|
.IX Item "-finput-charset=charset"
|
| 6225 |
|
|
Set the input character set, used for translation from the character
|
| 6226 |
|
|
set of the input file to the source character set used by \s-1GCC\s0. If the
|
| 6227 |
|
|
locale does not specify, or \s-1GCC\s0 cannot get this information from the
|
| 6228 |
|
|
locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
|
| 6229 |
|
|
or this command line option. Currently the command line option takes
|
| 6230 |
|
|
precedence if there's a conflict. \fIcharset\fR can be any encoding
|
| 6231 |
|
|
supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
|
| 6232 |
|
|
.IP "\fB\-fworking\-directory\fR" 4
|
| 6233 |
|
|
.IX Item "-fworking-directory"
|
| 6234 |
|
|
Enable generation of linemarkers in the preprocessor output that will
|
| 6235 |
|
|
let the compiler know the current working directory at the time of
|
| 6236 |
|
|
preprocessing. When this option is enabled, the preprocessor will
|
| 6237 |
|
|
emit, after the initial linemarker, a second linemarker with the
|
| 6238 |
|
|
current working directory followed by two slashes. \s-1GCC\s0 will use this
|
| 6239 |
|
|
directory, when it's present in the preprocessed input, as the
|
| 6240 |
|
|
directory emitted as the current working directory in some debugging
|
| 6241 |
|
|
information formats. This option is implicitly enabled if debugging
|
| 6242 |
|
|
information is enabled, but this can be inhibited with the negated
|
| 6243 |
|
|
form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
|
| 6244 |
|
|
present in the command line, this option has no effect, since no
|
| 6245 |
|
|
\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
|
| 6246 |
|
|
.IP "\fB\-fno\-show\-column\fR" 4
|
| 6247 |
|
|
.IX Item "-fno-show-column"
|
| 6248 |
|
|
Do not print column numbers in diagnostics. This may be necessary if
|
| 6249 |
|
|
diagnostics are being scanned by a program that does not understand the
|
| 6250 |
|
|
column numbers, such as \fBdejagnu\fR.
|
| 6251 |
|
|
.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
|
| 6252 |
|
|
.IX Item "-A predicate=answer"
|
| 6253 |
|
|
Make an assertion with the predicate \fIpredicate\fR and answer
|
| 6254 |
|
|
\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
|
| 6255 |
|
|
\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
|
| 6256 |
|
|
it does not use shell special characters.
|
| 6257 |
|
|
.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
|
| 6258 |
|
|
.IX Item "-A -predicate=answer"
|
| 6259 |
|
|
Cancel an assertion with the predicate \fIpredicate\fR and answer
|
| 6260 |
|
|
\&\fIanswer\fR.
|
| 6261 |
|
|
.IP "\fB\-dCHARS\fR" 4
|
| 6262 |
|
|
.IX Item "-dCHARS"
|
| 6263 |
|
|
\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
|
| 6264 |
|
|
and must not be preceded by a space. Other characters are interpreted
|
| 6265 |
|
|
by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
|
| 6266 |
|
|
are silently ignored. If you specify characters whose behavior
|
| 6267 |
|
|
conflicts, the result is undefined.
|
| 6268 |
|
|
.RS 4
|
| 6269 |
|
|
.IP "\fBM\fR" 4
|
| 6270 |
|
|
.IX Item "M"
|
| 6271 |
|
|
Instead of the normal output, generate a list of \fB#define\fR
|
| 6272 |
|
|
directives for all the macros defined during the execution of the
|
| 6273 |
|
|
preprocessor, including predefined macros. This gives you a way of
|
| 6274 |
|
|
finding out what is predefined in your version of the preprocessor.
|
| 6275 |
|
|
Assuming you have no file \fIfoo.h\fR, the command
|
| 6276 |
|
|
.Sp
|
| 6277 |
|
|
.Vb 1
|
| 6278 |
|
|
\& touch foo.h; cpp -dM foo.h
|
| 6279 |
|
|
.Ve
|
| 6280 |
|
|
.Sp
|
| 6281 |
|
|
will show all the predefined macros.
|
| 6282 |
|
|
.IP "\fBD\fR" 4
|
| 6283 |
|
|
.IX Item "D"
|
| 6284 |
|
|
Like \fBM\fR except in two respects: it does \fInot\fR include the
|
| 6285 |
|
|
predefined macros, and it outputs \fIboth\fR the \fB#define\fR
|
| 6286 |
|
|
directives and the result of preprocessing. Both kinds of output go to
|
| 6287 |
|
|
the standard output file.
|
| 6288 |
|
|
.IP "\fBN\fR" 4
|
| 6289 |
|
|
.IX Item "N"
|
| 6290 |
|
|
Like \fBD\fR, but emit only the macro names, not their expansions.
|
| 6291 |
|
|
.IP "\fBI\fR" 4
|
| 6292 |
|
|
.IX Item "I"
|
| 6293 |
|
|
Output \fB#include\fR directives in addition to the result of
|
| 6294 |
|
|
preprocessing.
|
| 6295 |
|
|
.RE
|
| 6296 |
|
|
.RS 4
|
| 6297 |
|
|
.RE
|
| 6298 |
|
|
.IP "\fB\-P\fR" 4
|
| 6299 |
|
|
.IX Item "-P"
|
| 6300 |
|
|
Inhibit generation of linemarkers in the output from the preprocessor.
|
| 6301 |
|
|
This might be useful when running the preprocessor on something that is
|
| 6302 |
|
|
not C code, and will be sent to a program which might be confused by the
|
| 6303 |
|
|
linemarkers.
|
| 6304 |
|
|
.IP "\fB\-C\fR" 4
|
| 6305 |
|
|
.IX Item "-C"
|
| 6306 |
|
|
Do not discard comments. All comments are passed through to the output
|
| 6307 |
|
|
file, except for comments in processed directives, which are deleted
|
| 6308 |
|
|
along with the directive.
|
| 6309 |
|
|
.Sp
|
| 6310 |
|
|
You should be prepared for side effects when using \fB\-C\fR; it
|
| 6311 |
|
|
causes the preprocessor to treat comments as tokens in their own right.
|
| 6312 |
|
|
For example, comments appearing at the start of what would be a
|
| 6313 |
|
|
directive line have the effect of turning that line into an ordinary
|
| 6314 |
|
|
source line, since the first token on the line is no longer a \fB#\fR.
|
| 6315 |
|
|
.IP "\fB\-CC\fR" 4
|
| 6316 |
|
|
.IX Item "-CC"
|
| 6317 |
|
|
Do not discard comments, including during macro expansion. This is
|
| 6318 |
|
|
like \fB\-C\fR, except that comments contained within macros are
|
| 6319 |
|
|
also passed through to the output file where the macro is expanded.
|
| 6320 |
|
|
.Sp
|
| 6321 |
|
|
In addition to the side-effects of the \fB\-C\fR option, the
|
| 6322 |
|
|
\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
|
| 6323 |
|
|
to be converted to C\-style comments. This is to prevent later use
|
| 6324 |
|
|
of that macro from inadvertently commenting out the remainder of
|
| 6325 |
|
|
the source line.
|
| 6326 |
|
|
.Sp
|
| 6327 |
|
|
The \fB\-CC\fR option is generally used to support lint comments.
|
| 6328 |
|
|
.IP "\fB\-traditional\-cpp\fR" 4
|
| 6329 |
|
|
.IX Item "-traditional-cpp"
|
| 6330 |
|
|
Try to imitate the behavior of old-fashioned C preprocessors, as
|
| 6331 |
|
|
opposed to \s-1ISO\s0 C preprocessors.
|
| 6332 |
|
|
.IP "\fB\-trigraphs\fR" 4
|
| 6333 |
|
|
.IX Item "-trigraphs"
|
| 6334 |
|
|
Process trigraph sequences.
|
| 6335 |
|
|
These are three-character sequences, all starting with \fB??\fR, that
|
| 6336 |
|
|
are defined by \s-1ISO\s0 C to stand for single characters. For example,
|
| 6337 |
|
|
\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
|
| 6338 |
|
|
constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
|
| 6339 |
|
|
standard-conforming modes it converts them. See the \fB\-std\fR and
|
| 6340 |
|
|
\&\fB\-ansi\fR options.
|
| 6341 |
|
|
.Sp
|
| 6342 |
|
|
The nine trigraphs and their replacements are
|
| 6343 |
|
|
.Sp
|
| 6344 |
|
|
.Vb 2
|
| 6345 |
|
|
\& Trigraph: ??( ??) ??< ??> ??= ??/ ??' ??! ??-
|
| 6346 |
|
|
\& Replacement: [ ] { } # \e ^ | ~
|
| 6347 |
|
|
.Ve
|
| 6348 |
|
|
.IP "\fB\-remap\fR" 4
|
| 6349 |
|
|
.IX Item "-remap"
|
| 6350 |
|
|
Enable special code to work around file systems which only permit very
|
| 6351 |
|
|
short file names, such as \s-1MS\-DOS\s0.
|
| 6352 |
|
|
.IP "\fB\-\-help\fR" 4
|
| 6353 |
|
|
.IX Item "--help"
|
| 6354 |
|
|
.PD 0
|
| 6355 |
|
|
.IP "\fB\-\-target\-help\fR" 4
|
| 6356 |
|
|
.IX Item "--target-help"
|
| 6357 |
|
|
.PD
|
| 6358 |
|
|
Print text describing all the command line options instead of
|
| 6359 |
|
|
preprocessing anything.
|
| 6360 |
|
|
.IP "\fB\-v\fR" 4
|
| 6361 |
|
|
.IX Item "-v"
|
| 6362 |
|
|
Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
|
| 6363 |
|
|
execution, and report the final form of the include path.
|
| 6364 |
|
|
.IP "\fB\-H\fR" 4
|
| 6365 |
|
|
.IX Item "-H"
|
| 6366 |
|
|
Print the name of each header file used, in addition to other normal
|
| 6367 |
|
|
activities. Each name is indented to show how deep in the
|
| 6368 |
|
|
\&\fB#include\fR stack it is. Precompiled header files are also
|
| 6369 |
|
|
printed, even if they are found to be invalid; an invalid precompiled
|
| 6370 |
|
|
header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
|
| 6371 |
|
|
.IP "\fB\-version\fR" 4
|
| 6372 |
|
|
.IX Item "-version"
|
| 6373 |
|
|
.PD 0
|
| 6374 |
|
|
.IP "\fB\-\-version\fR" 4
|
| 6375 |
|
|
.IX Item "--version"
|
| 6376 |
|
|
.PD
|
| 6377 |
|
|
Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
|
| 6378 |
|
|
preprocess as normal. With two dashes, exit immediately.
|
| 6379 |
|
|
.Sh "Passing Options to the Assembler"
|
| 6380 |
|
|
.IX Subsection "Passing Options to the Assembler"
|
| 6381 |
|
|
You can pass options to the assembler.
|
| 6382 |
|
|
.IP "\fB\-Wa,\fR\fIoption\fR" 4
|
| 6383 |
|
|
.IX Item "-Wa,option"
|
| 6384 |
|
|
Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
|
| 6385 |
|
|
contains commas, it is split into multiple options at the commas.
|
| 6386 |
|
|
.IP "\fB\-Xassembler\fR \fIoption\fR" 4
|
| 6387 |
|
|
.IX Item "-Xassembler option"
|
| 6388 |
|
|
Pass \fIoption\fR as an option to the assembler. You can use this to
|
| 6389 |
|
|
supply system-specific assembler options which \s-1GCC\s0 does not know how to
|
| 6390 |
|
|
recognize.
|
| 6391 |
|
|
.Sp
|
| 6392 |
|
|
If you want to pass an option that takes an argument, you must use
|
| 6393 |
|
|
\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
|
| 6394 |
|
|
.Sh "Options for Linking"
|
| 6395 |
|
|
.IX Subsection "Options for Linking"
|
| 6396 |
|
|
These options come into play when the compiler links object files into
|
| 6397 |
|
|
an executable output file. They are meaningless if the compiler is
|
| 6398 |
|
|
not doing a link step.
|
| 6399 |
|
|
.IP "\fIobject-file-name\fR" 4
|
| 6400 |
|
|
.IX Item "object-file-name"
|
| 6401 |
|
|
A file name that does not end in a special recognized suffix is
|
| 6402 |
|
|
considered to name an object file or library. (Object files are
|
| 6403 |
|
|
distinguished from libraries by the linker according to the file
|
| 6404 |
|
|
contents.) If linking is done, these object files are used as input
|
| 6405 |
|
|
to the linker.
|
| 6406 |
|
|
.IP "\fB\-c\fR" 4
|
| 6407 |
|
|
.IX Item "-c"
|
| 6408 |
|
|
.PD 0
|
| 6409 |
|
|
.IP "\fB\-S\fR" 4
|
| 6410 |
|
|
.IX Item "-S"
|
| 6411 |
|
|
.IP "\fB\-E\fR" 4
|
| 6412 |
|
|
.IX Item "-E"
|
| 6413 |
|
|
.PD
|
| 6414 |
|
|
If any of these options is used, then the linker is not run, and
|
| 6415 |
|
|
object file names should not be used as arguments.
|
| 6416 |
|
|
.IP "\fB\-l\fR\fIlibrary\fR" 4
|
| 6417 |
|
|
.IX Item "-llibrary"
|
| 6418 |
|
|
.PD 0
|
| 6419 |
|
|
.IP "\fB\-l\fR \fIlibrary\fR" 4
|
| 6420 |
|
|
.IX Item "-l library"
|
| 6421 |
|
|
.PD
|
| 6422 |
|
|
Search the library named \fIlibrary\fR when linking. (The second
|
| 6423 |
|
|
alternative with the library as a separate argument is only for
|
| 6424 |
|
|
\&\s-1POSIX\s0 compliance and is not recommended.)
|
| 6425 |
|
|
.Sp
|
| 6426 |
|
|
It makes a difference where in the command you write this option; the
|
| 6427 |
|
|
linker searches and processes libraries and object files in the order they
|
| 6428 |
|
|
are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
|
| 6429 |
|
|
after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
|
| 6430 |
|
|
to functions in \fBz\fR, those functions may not be loaded.
|
| 6431 |
|
|
.Sp
|
| 6432 |
|
|
The linker searches a standard list of directories for the library,
|
| 6433 |
|
|
which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
|
| 6434 |
|
|
then uses this file as if it had been specified precisely by name.
|
| 6435 |
|
|
.Sp
|
| 6436 |
|
|
The directories searched include several standard system directories
|
| 6437 |
|
|
plus any that you specify with \fB\-L\fR.
|
| 6438 |
|
|
.Sp
|
| 6439 |
|
|
Normally the files found this way are library files\-\-\-archive files
|
| 6440 |
|
|
whose members are object files. The linker handles an archive file by
|
| 6441 |
|
|
scanning through it for members which define symbols that have so far
|
| 6442 |
|
|
been referenced but not defined. But if the file that is found is an
|
| 6443 |
|
|
ordinary object file, it is linked in the usual fashion. The only
|
| 6444 |
|
|
difference between using an \fB\-l\fR option and specifying a file name
|
| 6445 |
|
|
is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
|
| 6446 |
|
|
and searches several directories.
|
| 6447 |
|
|
.IP "\fB\-lobjc\fR" 4
|
| 6448 |
|
|
.IX Item "-lobjc"
|
| 6449 |
|
|
You need this special case of the \fB\-l\fR option in order to
|
| 6450 |
|
|
link an Objective-C or Objective\-\*(C+ program.
|
| 6451 |
|
|
.IP "\fB\-nostartfiles\fR" 4
|
| 6452 |
|
|
.IX Item "-nostartfiles"
|
| 6453 |
|
|
Do not use the standard system startup files when linking.
|
| 6454 |
|
|
The standard system libraries are used normally, unless \fB\-nostdlib\fR
|
| 6455 |
|
|
or \fB\-nodefaultlibs\fR is used.
|
| 6456 |
|
|
.IP "\fB\-nodefaultlibs\fR" 4
|
| 6457 |
|
|
.IX Item "-nodefaultlibs"
|
| 6458 |
|
|
Do not use the standard system libraries when linking.
|
| 6459 |
|
|
Only the libraries you specify will be passed to the linker.
|
| 6460 |
|
|
The standard startup files are used normally, unless \fB\-nostartfiles\fR
|
| 6461 |
|
|
is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
|
| 6462 |
|
|
\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
|
| 6463 |
|
|
These entries are usually resolved by entries in
|
| 6464 |
|
|
libc. These entry points should be supplied through some other
|
| 6465 |
|
|
mechanism when this option is specified.
|
| 6466 |
|
|
.IP "\fB\-nostdlib\fR" 4
|
| 6467 |
|
|
.IX Item "-nostdlib"
|
| 6468 |
|
|
Do not use the standard system startup files or libraries when linking.
|
| 6469 |
|
|
No startup files and only the libraries you specify will be passed to
|
| 6470 |
|
|
the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
|
| 6471 |
|
|
\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
|
| 6472 |
|
|
These entries are usually resolved by entries in
|
| 6473 |
|
|
libc. These entry points should be supplied through some other
|
| 6474 |
|
|
mechanism when this option is specified.
|
| 6475 |
|
|
.Sp
|
| 6476 |
|
|
One of the standard libraries bypassed by \fB\-nostdlib\fR and
|
| 6477 |
|
|
\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
|
| 6478 |
|
|
that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
|
| 6479 |
|
|
needs for some languages.
|
| 6480 |
|
|
.Sp
|
| 6481 |
|
|
In most cases, you need \fIlibgcc.a\fR even when you want to avoid
|
| 6482 |
|
|
other standard libraries. In other words, when you specify \fB\-nostdlib\fR
|
| 6483 |
|
|
or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
|
| 6484 |
|
|
This ensures that you have no unresolved references to internal \s-1GCC\s0
|
| 6485 |
|
|
library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
|
| 6486 |
|
|
constructors will be called.)
|
| 6487 |
|
|
.IP "\fB\-pie\fR" 4
|
| 6488 |
|
|
.IX Item "-pie"
|
| 6489 |
|
|
Produce a position independent executable on targets which support it.
|
| 6490 |
|
|
For predictable results, you must also specify the same set of options
|
| 6491 |
|
|
that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
|
| 6492 |
|
|
or model suboptions) when you specify this option.
|
| 6493 |
|
|
.IP "\fB\-rdynamic\fR" 4
|
| 6494 |
|
|
.IX Item "-rdynamic"
|
| 6495 |
|
|
Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
|
| 6496 |
|
|
that support it. This instructs the linker to add all symbols, not
|
| 6497 |
|
|
only used ones, to the dynamic symbol table. This option is needed
|
| 6498 |
|
|
for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
|
| 6499 |
|
|
from within a program.
|
| 6500 |
|
|
.IP "\fB\-s\fR" 4
|
| 6501 |
|
|
.IX Item "-s"
|
| 6502 |
|
|
Remove all symbol table and relocation information from the executable.
|
| 6503 |
|
|
.IP "\fB\-static\fR" 4
|
| 6504 |
|
|
.IX Item "-static"
|
| 6505 |
|
|
On systems that support dynamic linking, this prevents linking with the shared
|
| 6506 |
|
|
libraries. On other systems, this option has no effect.
|
| 6507 |
|
|
.IP "\fB\-shared\fR" 4
|
| 6508 |
|
|
.IX Item "-shared"
|
| 6509 |
|
|
Produce a shared object which can then be linked with other objects to
|
| 6510 |
|
|
form an executable. Not all systems support this option. For predictable
|
| 6511 |
|
|
results, you must also specify the same set of options that were used to
|
| 6512 |
|
|
generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
|
| 6513 |
|
|
when you specify this option.[1]
|
| 6514 |
|
|
.IP "\fB\-shared\-libgcc\fR" 4
|
| 6515 |
|
|
.IX Item "-shared-libgcc"
|
| 6516 |
|
|
.PD 0
|
| 6517 |
|
|
.IP "\fB\-static\-libgcc\fR" 4
|
| 6518 |
|
|
.IX Item "-static-libgcc"
|
| 6519 |
|
|
.PD
|
| 6520 |
|
|
On systems that provide \fIlibgcc\fR as a shared library, these options
|
| 6521 |
|
|
force the use of either the shared or static version respectively.
|
| 6522 |
|
|
If no shared version of \fIlibgcc\fR was built when the compiler was
|
| 6523 |
|
|
configured, these options have no effect.
|
| 6524 |
|
|
.Sp
|
| 6525 |
|
|
There are several situations in which an application should use the
|
| 6526 |
|
|
shared \fIlibgcc\fR instead of the static version. The most common
|
| 6527 |
|
|
of these is when the application wishes to throw and catch exceptions
|
| 6528 |
|
|
across different shared libraries. In that case, each of the libraries
|
| 6529 |
|
|
as well as the application itself should use the shared \fIlibgcc\fR.
|
| 6530 |
|
|
.Sp
|
| 6531 |
|
|
Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
|
| 6532 |
|
|
\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
|
| 6533 |
|
|
executable, because \*(C+ and Java programs typically use exceptions, so
|
| 6534 |
|
|
this is the right thing to do.
|
| 6535 |
|
|
.Sp
|
| 6536 |
|
|
If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
|
| 6537 |
|
|
find that they will not always be linked with the shared \fIlibgcc\fR.
|
| 6538 |
|
|
If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
|
| 6539 |
|
|
or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
|
| 6540 |
|
|
it will link the shared version of \fIlibgcc\fR into shared libraries
|
| 6541 |
|
|
by default. Otherwise, it will take advantage of the linker and optimize
|
| 6542 |
|
|
away the linking with the shared version of \fIlibgcc\fR, linking with
|
| 6543 |
|
|
the static version of libgcc by default. This allows exceptions to
|
| 6544 |
|
|
propagate through such shared libraries, without incurring relocation
|
| 6545 |
|
|
costs at library load time.
|
| 6546 |
|
|
.Sp
|
| 6547 |
|
|
However, if a library or main executable is supposed to throw or catch
|
| 6548 |
|
|
exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
|
| 6549 |
|
|
for the languages used in the program, or using the option
|
| 6550 |
|
|
\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
|
| 6551 |
|
|
\&\fIlibgcc\fR.
|
| 6552 |
|
|
.IP "\fB\-symbolic\fR" 4
|
| 6553 |
|
|
.IX Item "-symbolic"
|
| 6554 |
|
|
Bind references to global symbols when building a shared object. Warn
|
| 6555 |
|
|
about any unresolved references (unless overridden by the link editor
|
| 6556 |
|
|
option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
|
| 6557 |
|
|
this option.
|
| 6558 |
|
|
.IP "\fB\-Xlinker\fR \fIoption\fR" 4
|
| 6559 |
|
|
.IX Item "-Xlinker option"
|
| 6560 |
|
|
Pass \fIoption\fR as an option to the linker. You can use this to
|
| 6561 |
|
|
supply system-specific linker options which \s-1GCC\s0 does not know how to
|
| 6562 |
|
|
recognize.
|
| 6563 |
|
|
.Sp
|
| 6564 |
|
|
If you want to pass an option that takes an argument, you must use
|
| 6565 |
|
|
\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
|
| 6566 |
|
|
For example, to pass \fB\-assert definitions\fR, you must write
|
| 6567 |
|
|
\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
|
| 6568 |
|
|
\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
|
| 6569 |
|
|
string as a single argument, which is not what the linker expects.
|
| 6570 |
|
|
.IP "\fB\-Wl,\fR\fIoption\fR" 4
|
| 6571 |
|
|
.IX Item "-Wl,option"
|
| 6572 |
|
|
Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
|
| 6573 |
|
|
commas, it is split into multiple options at the commas.
|
| 6574 |
|
|
.IP "\fB\-u\fR \fIsymbol\fR" 4
|
| 6575 |
|
|
.IX Item "-u symbol"
|
| 6576 |
|
|
Pretend the symbol \fIsymbol\fR is undefined, to force linking of
|
| 6577 |
|
|
library modules to define it. You can use \fB\-u\fR multiple times with
|
| 6578 |
|
|
different symbols to force loading of additional library modules.
|
| 6579 |
|
|
.Sh "Options for Directory Search"
|
| 6580 |
|
|
.IX Subsection "Options for Directory Search"
|
| 6581 |
|
|
These options specify directories to search for header files, for
|
| 6582 |
|
|
libraries and for parts of the compiler:
|
| 6583 |
|
|
.IP "\fB\-I\fR\fIdir\fR" 4
|
| 6584 |
|
|
.IX Item "-Idir"
|
| 6585 |
|
|
Add the directory \fIdir\fR to the head of the list of directories to be
|
| 6586 |
|
|
searched for header files. This can be used to override a system header
|
| 6587 |
|
|
file, substituting your own version, since these directories are
|
| 6588 |
|
|
searched before the system header file directories. However, you should
|
| 6589 |
|
|
not use this option to add directories that contain vendor-supplied
|
| 6590 |
|
|
system header files (use \fB\-isystem\fR for that). If you use more than
|
| 6591 |
|
|
one \fB\-I\fR option, the directories are scanned in left-to-right
|
| 6592 |
|
|
order; the standard system directories come after.
|
| 6593 |
|
|
.Sp
|
| 6594 |
|
|
If a standard system include directory, or a directory specified with
|
| 6595 |
|
|
\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
|
| 6596 |
|
|
option will be ignored. The directory will still be searched but as a
|
| 6597 |
|
|
system directory at its normal position in the system include chain.
|
| 6598 |
|
|
This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
|
| 6599 |
|
|
the ordering for the include_next directive are not inadvertently changed.
|
| 6600 |
|
|
If you really need to change the search order for system directories,
|
| 6601 |
|
|
use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
|
| 6602 |
|
|
.IP "\fB\-iquote\fR\fIdir\fR" 4
|
| 6603 |
|
|
.IX Item "-iquotedir"
|
| 6604 |
|
|
Add the directory \fIdir\fR to the head of the list of directories to
|
| 6605 |
|
|
be searched for header files only for the case of \fB#include
|
| 6606 |
|
|
"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
|
| 6607 |
|
|
otherwise just like \fB\-I\fR.
|
| 6608 |
|
|
.IP "\fB\-L\fR\fIdir\fR" 4
|
| 6609 |
|
|
.IX Item "-Ldir"
|
| 6610 |
|
|
Add directory \fIdir\fR to the list of directories to be searched
|
| 6611 |
|
|
for \fB\-l\fR.
|
| 6612 |
|
|
.IP "\fB\-B\fR\fIprefix\fR" 4
|
| 6613 |
|
|
.IX Item "-Bprefix"
|
| 6614 |
|
|
This option specifies where to find the executables, libraries,
|
| 6615 |
|
|
include files, and data files of the compiler itself.
|
| 6616 |
|
|
.Sp
|
| 6617 |
|
|
The compiler driver program runs one or more of the subprograms
|
| 6618 |
|
|
\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
|
| 6619 |
|
|
\&\fIprefix\fR as a prefix for each program it tries to run, both with and
|
| 6620 |
|
|
without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
|
| 6621 |
|
|
.Sp
|
| 6622 |
|
|
For each subprogram to be run, the compiler driver first tries the
|
| 6623 |
|
|
\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
|
| 6624 |
|
|
was not specified, the driver tries two standard prefixes, which are
|
| 6625 |
|
|
\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
|
| 6626 |
|
|
those results in a file name that is found, the unmodified program
|
| 6627 |
|
|
name is searched for using the directories specified in your
|
| 6628 |
|
|
\&\fB\s-1PATH\s0\fR environment variable.
|
| 6629 |
|
|
.Sp
|
| 6630 |
|
|
The compiler will check to see if the path provided by the \fB\-B\fR
|
| 6631 |
|
|
refers to a directory, and if necessary it will add a directory
|
| 6632 |
|
|
separator character at the end of the path.
|
| 6633 |
|
|
.Sp
|
| 6634 |
|
|
\&\fB\-B\fR prefixes that effectively specify directory names also apply
|
| 6635 |
|
|
to libraries in the linker, because the compiler translates these
|
| 6636 |
|
|
options into \fB\-L\fR options for the linker. They also apply to
|
| 6637 |
|
|
includes files in the preprocessor, because the compiler translates these
|
| 6638 |
|
|
options into \fB\-isystem\fR options for the preprocessor. In this case,
|
| 6639 |
|
|
the compiler appends \fBinclude\fR to the prefix.
|
| 6640 |
|
|
.Sp
|
| 6641 |
|
|
The run-time support file \fIlibgcc.a\fR can also be searched for using
|
| 6642 |
|
|
the \fB\-B\fR prefix, if needed. If it is not found there, the two
|
| 6643 |
|
|
standard prefixes above are tried, and that is all. The file is left
|
| 6644 |
|
|
out of the link if it is not found by those means.
|
| 6645 |
|
|
.Sp
|
| 6646 |
|
|
Another way to specify a prefix much like the \fB\-B\fR prefix is to use
|
| 6647 |
|
|
the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
|
| 6648 |
|
|
.Sp
|
| 6649 |
|
|
As a special kludge, if the path provided by \fB\-B\fR is
|
| 6650 |
|
|
\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
|
| 6651 |
|
|
9, then it will be replaced by \fI[dir/]include\fR. This is to help
|
| 6652 |
|
|
with boot-strapping the compiler.
|
| 6653 |
|
|
.IP "\fB\-specs=\fR\fIfile\fR" 4
|
| 6654 |
|
|
.IX Item "-specs=file"
|
| 6655 |
|
|
Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
|
| 6656 |
|
|
file, in order to override the defaults that the \fIgcc\fR driver
|
| 6657 |
|
|
program uses when determining what switches to pass to \fIcc1\fR,
|
| 6658 |
|
|
\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
|
| 6659 |
|
|
\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
|
| 6660 |
|
|
are processed in order, from left to right.
|
| 6661 |
|
|
.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
|
| 6662 |
|
|
.IX Item "--sysroot=dir"
|
| 6663 |
|
|
Use \fIdir\fR as the logical root directory for headers and libraries.
|
| 6664 |
|
|
For example, if the compiler would normally search for headers in
|
| 6665 |
|
|
\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
|
| 6666 |
|
|
search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
|
| 6667 |
|
|
.Sp
|
| 6668 |
|
|
If you use both this option and the \fB\-isysroot\fR option, then
|
| 6669 |
|
|
the \fB\-\-sysroot\fR option will apply to libraries, but the
|
| 6670 |
|
|
\&\fB\-isysroot\fR option will apply to header files.
|
| 6671 |
|
|
.Sp
|
| 6672 |
|
|
The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
|
| 6673 |
|
|
for this option. If your linker does not support this option, the
|
| 6674 |
|
|
header file aspect of \fB\-\-sysroot\fR will still work, but the
|
| 6675 |
|
|
library aspect will not.
|
| 6676 |
|
|
.IP "\fB\-I\-\fR" 4
|
| 6677 |
|
|
.IX Item "-I-"
|
| 6678 |
|
|
This option has been deprecated. Please use \fB\-iquote\fR instead for
|
| 6679 |
|
|
\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
|
| 6680 |
|
|
Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
|
| 6681 |
|
|
option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
|
| 6682 |
|
|
they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
|
| 6683 |
|
|
.Sp
|
| 6684 |
|
|
If additional directories are specified with \fB\-I\fR options after
|
| 6685 |
|
|
the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
|
| 6686 |
|
|
directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
|
| 6687 |
|
|
this way.)
|
| 6688 |
|
|
.Sp
|
| 6689 |
|
|
In addition, the \fB\-I\-\fR option inhibits the use of the current
|
| 6690 |
|
|
directory (where the current input file came from) as the first search
|
| 6691 |
|
|
directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
|
| 6692 |
|
|
override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
|
| 6693 |
|
|
searching the directory which was current when the compiler was
|
| 6694 |
|
|
invoked. That is not exactly the same as what the preprocessor does
|
| 6695 |
|
|
by default, but it is often satisfactory.
|
| 6696 |
|
|
.Sp
|
| 6697 |
|
|
\&\fB\-I\-\fR does not inhibit the use of the standard system directories
|
| 6698 |
|
|
for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
|
| 6699 |
|
|
independent.
|
| 6700 |
|
|
.Sh "Specifying Target Machine and Compiler Version"
|
| 6701 |
|
|
.IX Subsection "Specifying Target Machine and Compiler Version"
|
| 6702 |
|
|
The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
|
| 6703 |
|
|
\&\fI\-gcc\fR when cross\-compiling, or
|
| 6704 |
|
|
\&\fI\-gcc\-\fR to run a version other than the one that
|
| 6705 |
|
|
was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
|
| 6706 |
|
|
options that will switch to another cross-compiler or version.
|
| 6707 |
|
|
.IP "\fB\-b\fR \fImachine\fR" 4
|
| 6708 |
|
|
.IX Item "-b machine"
|
| 6709 |
|
|
The argument \fImachine\fR specifies the target machine for compilation.
|
| 6710 |
|
|
.Sp
|
| 6711 |
|
|
The value to use for \fImachine\fR is the same as was specified as the
|
| 6712 |
|
|
machine type when configuring \s-1GCC\s0 as a cross\-compiler. For
|
| 6713 |
|
|
example, if a cross-compiler was configured with \fBconfigure
|
| 6714 |
|
|
arm-elf\fR, meaning to compile for an arm processor with elf binaries,
|
| 6715 |
|
|
then you would specify \fB\-b arm-elf\fR to run that cross compiler.
|
| 6716 |
|
|
Because there are other options beginning with \fB\-b\fR, the
|
| 6717 |
|
|
configuration must contain a hyphen.
|
| 6718 |
|
|
.IP "\fB\-V\fR \fIversion\fR" 4
|
| 6719 |
|
|
.IX Item "-V version"
|
| 6720 |
|
|
The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
|
| 6721 |
|
|
This is useful when multiple versions are installed. For example,
|
| 6722 |
|
|
\&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
|
| 6723 |
|
|
.PP
|
| 6724 |
|
|
The \fB\-V\fR and \fB\-b\fR options work by running the
|
| 6725 |
|
|
\&\fI\-gcc\-\fR executable, so there's no real reason to
|
| 6726 |
|
|
use them if you can just run that directly.
|
| 6727 |
|
|
.Sh "Hardware Models and Configurations"
|
| 6728 |
|
|
.IX Subsection "Hardware Models and Configurations"
|
| 6729 |
|
|
Earlier we discussed the standard option \fB\-b\fR which chooses among
|
| 6730 |
|
|
different installed compilers for completely different target
|
| 6731 |
|
|
machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
|
| 6732 |
|
|
.PP
|
| 6733 |
|
|
In addition, each of these target machine types can have its own
|
| 6734 |
|
|
special options, starting with \fB\-m\fR, to choose among various
|
| 6735 |
|
|
hardware models or configurations\-\-\-for example, 68010 vs 68020,
|
| 6736 |
|
|
floating coprocessor or none. A single installed version of the
|
| 6737 |
|
|
compiler can compile for any model or configuration, according to the
|
| 6738 |
|
|
options specified.
|
| 6739 |
|
|
.PP
|
| 6740 |
|
|
Some configurations of the compiler also support additional special
|
| 6741 |
|
|
options, usually for compatibility with other compilers on the same
|
| 6742 |
|
|
platform.
|
| 6743 |
|
|
.PP
|
| 6744 |
|
|
\fI\s-1ARC\s0 Options\fR
|
| 6745 |
|
|
.IX Subsection "ARC Options"
|
| 6746 |
|
|
.PP
|
| 6747 |
|
|
These options are defined for \s-1ARC\s0 implementations:
|
| 6748 |
|
|
.IP "\fB\-EL\fR" 4
|
| 6749 |
|
|
.IX Item "-EL"
|
| 6750 |
|
|
Compile code for little endian mode. This is the default.
|
| 6751 |
|
|
.IP "\fB\-EB\fR" 4
|
| 6752 |
|
|
.IX Item "-EB"
|
| 6753 |
|
|
Compile code for big endian mode.
|
| 6754 |
|
|
.IP "\fB\-mmangle\-cpu\fR" 4
|
| 6755 |
|
|
.IX Item "-mmangle-cpu"
|
| 6756 |
|
|
Prepend the name of the cpu to all public symbol names.
|
| 6757 |
|
|
In multiple-processor systems, there are many \s-1ARC\s0 variants with different
|
| 6758 |
|
|
instruction and register set characteristics. This flag prevents code
|
| 6759 |
|
|
compiled for one cpu to be linked with code compiled for another.
|
| 6760 |
|
|
No facility exists for handling variants that are \*(L"almost identical\*(R".
|
| 6761 |
|
|
This is an all or nothing option.
|
| 6762 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
|
| 6763 |
|
|
.IX Item "-mcpu=cpu"
|
| 6764 |
|
|
Compile code for \s-1ARC\s0 variant \fIcpu\fR.
|
| 6765 |
|
|
Which variants are supported depend on the configuration.
|
| 6766 |
|
|
All variants support \fB\-mcpu=base\fR, this is the default.
|
| 6767 |
|
|
.IP "\fB\-mtext=\fR\fItext-section\fR" 4
|
| 6768 |
|
|
.IX Item "-mtext=text-section"
|
| 6769 |
|
|
.PD 0
|
| 6770 |
|
|
.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
|
| 6771 |
|
|
.IX Item "-mdata=data-section"
|
| 6772 |
|
|
.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
|
| 6773 |
|
|
.IX Item "-mrodata=readonly-data-section"
|
| 6774 |
|
|
.PD
|
| 6775 |
|
|
Put functions, data, and readonly data in \fItext-section\fR,
|
| 6776 |
|
|
\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
|
| 6777 |
|
|
by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
|
| 6778 |
|
|
.PP
|
| 6779 |
|
|
\fI\s-1ARM\s0 Options\fR
|
| 6780 |
|
|
.IX Subsection "ARM Options"
|
| 6781 |
|
|
.PP
|
| 6782 |
|
|
These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
|
| 6783 |
|
|
architectures:
|
| 6784 |
|
|
.IP "\fB\-mabi=\fR\fIname\fR" 4
|
| 6785 |
|
|
.IX Item "-mabi=name"
|
| 6786 |
|
|
Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
|
| 6787 |
|
|
\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
|
| 6788 |
|
|
.IP "\fB\-mapcs\-frame\fR" 4
|
| 6789 |
|
|
.IX Item "-mapcs-frame"
|
| 6790 |
|
|
Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
|
| 6791 |
|
|
Standard for all functions, even if this is not strictly necessary for
|
| 6792 |
|
|
correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
|
| 6793 |
|
|
with this option will cause the stack frames not to be generated for
|
| 6794 |
|
|
leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
|
| 6795 |
|
|
.IP "\fB\-mapcs\fR" 4
|
| 6796 |
|
|
.IX Item "-mapcs"
|
| 6797 |
|
|
This is a synonym for \fB\-mapcs\-frame\fR.
|
| 6798 |
|
|
.IP "\fB\-mthumb\-interwork\fR" 4
|
| 6799 |
|
|
.IX Item "-mthumb-interwork"
|
| 6800 |
|
|
Generate code which supports calling between the \s-1ARM\s0 and Thumb
|
| 6801 |
|
|
instruction sets. Without this option the two instruction sets cannot
|
| 6802 |
|
|
be reliably used inside one program. The default is
|
| 6803 |
|
|
\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
|
| 6804 |
|
|
when \fB\-mthumb\-interwork\fR is specified.
|
| 6805 |
|
|
.IP "\fB\-mno\-sched\-prolog\fR" 4
|
| 6806 |
|
|
.IX Item "-mno-sched-prolog"
|
| 6807 |
|
|
Prevent the reordering of instructions in the function prolog, or the
|
| 6808 |
|
|
merging of those instruction with the instructions in the function's
|
| 6809 |
|
|
body. This means that all functions will start with a recognizable set
|
| 6810 |
|
|
of instructions (or in fact one of a choice from a small set of
|
| 6811 |
|
|
different function prologues), and this information can be used to
|
| 6812 |
|
|
locate the start if functions inside an executable piece of code. The
|
| 6813 |
|
|
default is \fB\-msched\-prolog\fR.
|
| 6814 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
| 6815 |
|
|
.IX Item "-mhard-float"
|
| 6816 |
|
|
Generate output containing floating point instructions. This is the
|
| 6817 |
|
|
default.
|
| 6818 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 6819 |
|
|
.IX Item "-msoft-float"
|
| 6820 |
|
|
Generate output containing library calls for floating point.
|
| 6821 |
|
|
\&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0
|
| 6822 |
|
|
targets. Normally the facilities of the machine's usual C compiler are
|
| 6823 |
|
|
used, but this cannot be done directly in cross\-compilation. You must make
|
| 6824 |
|
|
your own arrangements to provide suitable library functions for
|
| 6825 |
|
|
cross\-compilation.
|
| 6826 |
|
|
.Sp
|
| 6827 |
|
|
\&\fB\-msoft\-float\fR changes the calling convention in the output file;
|
| 6828 |
|
|
therefore, it is only useful if you compile \fIall\fR of a program with
|
| 6829 |
|
|
this option. In particular, you need to compile \fIlibgcc.a\fR, the
|
| 6830 |
|
|
library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
|
| 6831 |
|
|
this to work.
|
| 6832 |
|
|
.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
|
| 6833 |
|
|
.IX Item "-mfloat-abi=name"
|
| 6834 |
|
|
Specifies which \s-1ABI\s0 to use for floating point values. Permissible values
|
| 6835 |
|
|
are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
|
| 6836 |
|
|
.Sp
|
| 6837 |
|
|
\&\fBsoft\fR and \fBhard\fR are equivalent to \fB\-msoft\-float\fR
|
| 6838 |
|
|
and \fB\-mhard\-float\fR respectively. \fBsoftfp\fR allows the generation
|
| 6839 |
|
|
of floating point instructions, but still uses the soft-float calling
|
| 6840 |
|
|
conventions.
|
| 6841 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
| 6842 |
|
|
.IX Item "-mlittle-endian"
|
| 6843 |
|
|
Generate code for a processor running in little-endian mode. This is
|
| 6844 |
|
|
the default for all standard configurations.
|
| 6845 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
| 6846 |
|
|
.IX Item "-mbig-endian"
|
| 6847 |
|
|
Generate code for a processor running in big-endian mode; the default is
|
| 6848 |
|
|
to compile code for a little-endian processor.
|
| 6849 |
|
|
.IP "\fB\-mwords\-little\-endian\fR" 4
|
| 6850 |
|
|
.IX Item "-mwords-little-endian"
|
| 6851 |
|
|
This option only applies when generating code for big-endian processors.
|
| 6852 |
|
|
Generate code for a little-endian word order but a big-endian byte
|
| 6853 |
|
|
order. That is, a byte order of the form \fB32107654\fR. Note: this
|
| 6854 |
|
|
option should only be used if you require compatibility with code for
|
| 6855 |
|
|
big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
|
| 6856 |
|
|
2.8.
|
| 6857 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
| 6858 |
|
|
.IX Item "-mcpu=name"
|
| 6859 |
|
|
This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
|
| 6860 |
|
|
to determine what kind of instructions it can emit when generating
|
| 6861 |
|
|
assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
|
| 6862 |
|
|
\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
|
| 6863 |
|
|
\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
|
| 6864 |
|
|
\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
|
| 6865 |
|
|
\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
|
| 6866 |
|
|
\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
|
| 6867 |
|
|
\&\fBarm8\fR, \fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
|
| 6868 |
|
|
\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
|
| 6869 |
|
|
\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
|
| 6870 |
|
|
\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
|
| 6871 |
|
|
\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
|
| 6872 |
|
|
\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
|
| 6873 |
|
|
\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
|
| 6874 |
|
|
\&\fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR, \fBxscale\fR, \fBiwmmxt\fR,
|
| 6875 |
|
|
\&\fBep9312\fR.
|
| 6876 |
|
|
.IP "\fB\-mtune=\fR\fIname\fR" 4
|
| 6877 |
|
|
.IX Item "-mtune=name"
|
| 6878 |
|
|
This option is very similar to the \fB\-mcpu=\fR option, except that
|
| 6879 |
|
|
instead of specifying the actual target processor type, and hence
|
| 6880 |
|
|
restricting which instructions can be used, it specifies that \s-1GCC\s0 should
|
| 6881 |
|
|
tune the performance of the code as if the target were of the type
|
| 6882 |
|
|
specified in this option, but still choosing the instructions that it
|
| 6883 |
|
|
will generate based on the cpu specified by a \fB\-mcpu=\fR option.
|
| 6884 |
|
|
For some \s-1ARM\s0 implementations better performance can be obtained by using
|
| 6885 |
|
|
this option.
|
| 6886 |
|
|
.IP "\fB\-march=\fR\fIname\fR" 4
|
| 6887 |
|
|
.IX Item "-march=name"
|
| 6888 |
|
|
This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
|
| 6889 |
|
|
name to determine what kind of instructions it can emit when generating
|
| 6890 |
|
|
assembly code. This option can be used in conjunction with or instead
|
| 6891 |
|
|
of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
|
| 6892 |
|
|
\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
|
| 6893 |
|
|
\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR, \fBarmv6\fR, \fBarmv6j\fR,
|
| 6894 |
|
|
\&\fBiwmmxt\fR, \fBep9312\fR.
|
| 6895 |
|
|
.IP "\fB\-mfpu=\fR\fIname\fR" 4
|
| 6896 |
|
|
.IX Item "-mfpu=name"
|
| 6897 |
|
|
.PD 0
|
| 6898 |
|
|
.IP "\fB\-mfpe=\fR\fInumber\fR" 4
|
| 6899 |
|
|
.IX Item "-mfpe=number"
|
| 6900 |
|
|
.IP "\fB\-mfp=\fR\fInumber\fR" 4
|
| 6901 |
|
|
.IX Item "-mfp=number"
|
| 6902 |
|
|
.PD
|
| 6903 |
|
|
This specifies what floating point hardware (or hardware emulation) is
|
| 6904 |
|
|
available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
|
| 6905 |
|
|
\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR. \fB\-mfp\fR and \fB\-mfpe\fR
|
| 6906 |
|
|
are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
|
| 6907 |
|
|
with older versions of \s-1GCC\s0.
|
| 6908 |
|
|
.Sp
|
| 6909 |
|
|
If \fB\-msoft\-float\fR is specified this specifies the format of
|
| 6910 |
|
|
floating point values.
|
| 6911 |
|
|
.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
|
| 6912 |
|
|
.IX Item "-mstructure-size-boundary=n"
|
| 6913 |
|
|
The size of all structures and unions will be rounded up to a multiple
|
| 6914 |
|
|
of the number of bits set by this option. Permissible values are 8, 32
|
| 6915 |
|
|
and 64. The default value varies for different toolchains. For the \s-1COFF\s0
|
| 6916 |
|
|
targeted toolchain the default value is 8. A value of 64 is only allowed
|
| 6917 |
|
|
if the underlying \s-1ABI\s0 supports it.
|
| 6918 |
|
|
.Sp
|
| 6919 |
|
|
Specifying the larger number can produce faster, more efficient code, but
|
| 6920 |
|
|
can also increase the size of the program. Different values are potentially
|
| 6921 |
|
|
incompatible. Code compiled with one value cannot necessarily expect to
|
| 6922 |
|
|
work with code or libraries compiled with another value, if they exchange
|
| 6923 |
|
|
information using structures or unions.
|
| 6924 |
|
|
.IP "\fB\-mabort\-on\-noreturn\fR" 4
|
| 6925 |
|
|
.IX Item "-mabort-on-noreturn"
|
| 6926 |
|
|
Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
|
| 6927 |
|
|
\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
|
| 6928 |
|
|
return.
|
| 6929 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 6930 |
|
|
.IX Item "-mlong-calls"
|
| 6931 |
|
|
.PD 0
|
| 6932 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
| 6933 |
|
|
.IX Item "-mno-long-calls"
|
| 6934 |
|
|
.PD
|
| 6935 |
|
|
Tells the compiler to perform function calls by first loading the
|
| 6936 |
|
|
address of the function into a register and then performing a subroutine
|
| 6937 |
|
|
call on this register. This switch is needed if the target function
|
| 6938 |
|
|
will lie outside of the 64 megabyte addressing range of the offset based
|
| 6939 |
|
|
version of subroutine call instruction.
|
| 6940 |
|
|
.Sp
|
| 6941 |
|
|
Even if this switch is enabled, not all function calls will be turned
|
| 6942 |
|
|
into long calls. The heuristic is that static functions, functions
|
| 6943 |
|
|
which have the \fBshort-call\fR attribute, functions that are inside
|
| 6944 |
|
|
the scope of a \fB#pragma no_long_calls\fR directive and functions whose
|
| 6945 |
|
|
definitions have already been compiled within the current compilation
|
| 6946 |
|
|
unit, will not be turned into long calls. The exception to this rule is
|
| 6947 |
|
|
that weak function definitions, functions with the \fBlong-call\fR
|
| 6948 |
|
|
attribute or the \fBsection\fR attribute, and functions that are within
|
| 6949 |
|
|
the scope of a \fB#pragma long_calls\fR directive, will always be
|
| 6950 |
|
|
turned into long calls.
|
| 6951 |
|
|
.Sp
|
| 6952 |
|
|
This feature is not enabled by default. Specifying
|
| 6953 |
|
|
\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
|
| 6954 |
|
|
placing the function calls within the scope of a \fB#pragma
|
| 6955 |
|
|
long_calls_off\fR directive. Note these switches have no effect on how
|
| 6956 |
|
|
the compiler generates code to handle function calls via function
|
| 6957 |
|
|
pointers.
|
| 6958 |
|
|
.IP "\fB\-mnop\-fun\-dllimport\fR" 4
|
| 6959 |
|
|
.IX Item "-mnop-fun-dllimport"
|
| 6960 |
|
|
Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute.
|
| 6961 |
|
|
.IP "\fB\-msingle\-pic\-base\fR" 4
|
| 6962 |
|
|
.IX Item "-msingle-pic-base"
|
| 6963 |
|
|
Treat the register used for \s-1PIC\s0 addressing as read\-only, rather than
|
| 6964 |
|
|
loading it in the prologue for each function. The run-time system is
|
| 6965 |
|
|
responsible for initializing this register with an appropriate value
|
| 6966 |
|
|
before execution begins.
|
| 6967 |
|
|
.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
|
| 6968 |
|
|
.IX Item "-mpic-register=reg"
|
| 6969 |
|
|
Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
|
| 6970 |
|
|
unless stack-checking is enabled, when R9 is used.
|
| 6971 |
|
|
.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
|
| 6972 |
|
|
.IX Item "-mcirrus-fix-invalid-insns"
|
| 6973 |
|
|
Insert NOPs into the instruction stream to in order to work around
|
| 6974 |
|
|
problems with invalid Maverick instruction combinations. This option
|
| 6975 |
|
|
is only valid if the \fB\-mcpu=ep9312\fR option has been used to
|
| 6976 |
|
|
enable generation of instructions for the Cirrus Maverick floating
|
| 6977 |
|
|
point co\-processor. This option is not enabled by default, since the
|
| 6978 |
|
|
problem is only present in older Maverick implementations. The default
|
| 6979 |
|
|
can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
|
| 6980 |
|
|
switch.
|
| 6981 |
|
|
.IP "\fB\-mpoke\-function\-name\fR" 4
|
| 6982 |
|
|
.IX Item "-mpoke-function-name"
|
| 6983 |
|
|
Write the name of each function into the text section, directly
|
| 6984 |
|
|
preceding the function prologue. The generated code is similar to this:
|
| 6985 |
|
|
.Sp
|
| 6986 |
|
|
.Vb 9
|
| 6987 |
|
|
\& t0
|
| 6988 |
|
|
\& .ascii "arm_poke_function_name", 0
|
| 6989 |
|
|
\& .align
|
| 6990 |
|
|
\& t1
|
| 6991 |
|
|
\& .word 0xff000000 + (t1 - t0)
|
| 6992 |
|
|
\& arm_poke_function_name
|
| 6993 |
|
|
\& mov ip, sp
|
| 6994 |
|
|
\& stmfd sp!, {fp, ip, lr, pc}
|
| 6995 |
|
|
\& sub fp, ip, #4
|
| 6996 |
|
|
.Ve
|
| 6997 |
|
|
.Sp
|
| 6998 |
|
|
When performing a stack backtrace, code can inspect the value of
|
| 6999 |
|
|
\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
|
| 7000 |
|
|
location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
|
| 7001 |
|
|
there is a function name embedded immediately preceding this location
|
| 7002 |
|
|
and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
|
| 7003 |
|
|
.IP "\fB\-mthumb\fR" 4
|
| 7004 |
|
|
.IX Item "-mthumb"
|
| 7005 |
|
|
Generate code for the 16\-bit Thumb instruction set. The default is to
|
| 7006 |
|
|
use the 32\-bit \s-1ARM\s0 instruction set.
|
| 7007 |
|
|
.IP "\fB\-mtpcs\-frame\fR" 4
|
| 7008 |
|
|
.IX Item "-mtpcs-frame"
|
| 7009 |
|
|
Generate a stack frame that is compliant with the Thumb Procedure Call
|
| 7010 |
|
|
Standard for all non-leaf functions. (A leaf function is one that does
|
| 7011 |
|
|
not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
|
| 7012 |
|
|
.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
|
| 7013 |
|
|
.IX Item "-mtpcs-leaf-frame"
|
| 7014 |
|
|
Generate a stack frame that is compliant with the Thumb Procedure Call
|
| 7015 |
|
|
Standard for all leaf functions. (A leaf function is one that does
|
| 7016 |
|
|
not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
|
| 7017 |
|
|
.IP "\fB\-mcallee\-super\-interworking\fR" 4
|
| 7018 |
|
|
.IX Item "-mcallee-super-interworking"
|
| 7019 |
|
|
Gives all externally visible functions in the file being compiled an \s-1ARM\s0
|
| 7020 |
|
|
instruction set header which switches to Thumb mode before executing the
|
| 7021 |
|
|
rest of the function. This allows these functions to be called from
|
| 7022 |
|
|
non-interworking code.
|
| 7023 |
|
|
.IP "\fB\-mcaller\-super\-interworking\fR" 4
|
| 7024 |
|
|
.IX Item "-mcaller-super-interworking"
|
| 7025 |
|
|
Allows calls via function pointers (including virtual functions) to
|
| 7026 |
|
|
execute correctly regardless of whether the target code has been
|
| 7027 |
|
|
compiled for interworking or not. There is a small overhead in the cost
|
| 7028 |
|
|
of executing a function pointer if this option is enabled.
|
| 7029 |
|
|
.IP "\fB\-mtp=\fR\fIname\fR" 4
|
| 7030 |
|
|
.IX Item "-mtp=name"
|
| 7031 |
|
|
Specify the access model for the thread local storage pointer. The valid
|
| 7032 |
|
|
models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
|
| 7033 |
|
|
\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
|
| 7034 |
|
|
(supported in the arm6k architecture), and \fBauto\fR, which uses the
|
| 7035 |
|
|
best available method for the selected processor. The default setting is
|
| 7036 |
|
|
\&\fBauto\fR.
|
| 7037 |
|
|
.PP
|
| 7038 |
|
|
\fI\s-1AVR\s0 Options\fR
|
| 7039 |
|
|
.IX Subsection "AVR Options"
|
| 7040 |
|
|
.PP
|
| 7041 |
|
|
These options are defined for \s-1AVR\s0 implementations:
|
| 7042 |
|
|
.IP "\fB\-mmcu=\fR\fImcu\fR" 4
|
| 7043 |
|
|
.IX Item "-mmcu=mcu"
|
| 7044 |
|
|
Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
|
| 7045 |
|
|
.Sp
|
| 7046 |
|
|
Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
|
| 7047 |
|
|
compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
|
| 7048 |
|
|
attiny11, attiny12, attiny15, attiny28).
|
| 7049 |
|
|
.Sp
|
| 7050 |
|
|
Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
|
| 7051 |
|
|
8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
|
| 7052 |
|
|
at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
|
| 7053 |
|
|
at90c8534, at90s8535).
|
| 7054 |
|
|
.Sp
|
| 7055 |
|
|
Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
|
| 7056 |
|
|
memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
|
| 7057 |
|
|
.Sp
|
| 7058 |
|
|
Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
|
| 7059 |
|
|
memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
|
| 7060 |
|
|
.Sp
|
| 7061 |
|
|
Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
|
| 7062 |
|
|
memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
|
| 7063 |
|
|
atmega64, atmega128, at43usb355, at94k).
|
| 7064 |
|
|
.IP "\fB\-msize\fR" 4
|
| 7065 |
|
|
.IX Item "-msize"
|
| 7066 |
|
|
Output instruction sizes to the asm file.
|
| 7067 |
|
|
.IP "\fB\-minit\-stack=\fR\fIN\fR" 4
|
| 7068 |
|
|
.IX Item "-minit-stack=N"
|
| 7069 |
|
|
Specify the initial stack address, which may be a symbol or numeric value,
|
| 7070 |
|
|
\&\fB_\|_stack\fR is the default.
|
| 7071 |
|
|
.IP "\fB\-mno\-interrupts\fR" 4
|
| 7072 |
|
|
.IX Item "-mno-interrupts"
|
| 7073 |
|
|
Generated code is not compatible with hardware interrupts.
|
| 7074 |
|
|
Code size will be smaller.
|
| 7075 |
|
|
.IP "\fB\-mcall\-prologues\fR" 4
|
| 7076 |
|
|
.IX Item "-mcall-prologues"
|
| 7077 |
|
|
Functions prologues/epilogues expanded as call to appropriate
|
| 7078 |
|
|
subroutines. Code size will be smaller.
|
| 7079 |
|
|
.IP "\fB\-mno\-tablejump\fR" 4
|
| 7080 |
|
|
.IX Item "-mno-tablejump"
|
| 7081 |
|
|
Do not generate tablejump insns which sometimes increase code size.
|
| 7082 |
|
|
.IP "\fB\-mtiny\-stack\fR" 4
|
| 7083 |
|
|
.IX Item "-mtiny-stack"
|
| 7084 |
|
|
Change only the low 8 bits of the stack pointer.
|
| 7085 |
|
|
.IP "\fB\-mint8\fR" 4
|
| 7086 |
|
|
.IX Item "-mint8"
|
| 7087 |
|
|
Assume int to be 8 bit integer. This affects the sizes of all types: A
|
| 7088 |
|
|
char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
|
| 7089 |
|
|
and long long will be 4 bytes. Please note that this option does not
|
| 7090 |
|
|
comply to the C standards, but it will provide you with smaller code
|
| 7091 |
|
|
size.
|
| 7092 |
|
|
.PP
|
| 7093 |
|
|
\fIBlackfin Options\fR
|
| 7094 |
|
|
.IX Subsection "Blackfin Options"
|
| 7095 |
|
|
.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
|
| 7096 |
|
|
.IX Item "-momit-leaf-frame-pointer"
|
| 7097 |
|
|
Don't keep the frame pointer in a register for leaf functions. This
|
| 7098 |
|
|
avoids the instructions to save, set up and restore frame pointers and
|
| 7099 |
|
|
makes an extra register available in leaf functions. The option
|
| 7100 |
|
|
\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
|
| 7101 |
|
|
which might make debugging harder.
|
| 7102 |
|
|
.IP "\fB\-mspecld\-anomaly\fR" 4
|
| 7103 |
|
|
.IX Item "-mspecld-anomaly"
|
| 7104 |
|
|
When enabled, the compiler will ensure that the generated code does not
|
| 7105 |
|
|
contain speculative loads after jump instructions. This option is enabled
|
| 7106 |
|
|
by default.
|
| 7107 |
|
|
.IP "\fB\-mno\-specld\-anomaly\fR" 4
|
| 7108 |
|
|
.IX Item "-mno-specld-anomaly"
|
| 7109 |
|
|
Don't generate extra code to prevent speculative loads from occurring.
|
| 7110 |
|
|
.IP "\fB\-mcsync\-anomaly\fR" 4
|
| 7111 |
|
|
.IX Item "-mcsync-anomaly"
|
| 7112 |
|
|
When enabled, the compiler will ensure that the generated code does not
|
| 7113 |
|
|
contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
|
| 7114 |
|
|
This option is enabled by default.
|
| 7115 |
|
|
.IP "\fB\-mno\-csync\-anomaly\fR" 4
|
| 7116 |
|
|
.IX Item "-mno-csync-anomaly"
|
| 7117 |
|
|
Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
|
| 7118 |
|
|
occurring too soon after a conditional branch.
|
| 7119 |
|
|
.IP "\fB\-mlow\-64k\fR" 4
|
| 7120 |
|
|
.IX Item "-mlow-64k"
|
| 7121 |
|
|
When enabled, the compiler is free to take advantage of the knowledge that
|
| 7122 |
|
|
the entire program fits into the low 64k of memory.
|
| 7123 |
|
|
.IP "\fB\-mno\-low\-64k\fR" 4
|
| 7124 |
|
|
.IX Item "-mno-low-64k"
|
| 7125 |
|
|
Assume that the program is arbitrarily large. This is the default.
|
| 7126 |
|
|
.IP "\fB\-mid\-shared\-library\fR" 4
|
| 7127 |
|
|
.IX Item "-mid-shared-library"
|
| 7128 |
|
|
Generate code that supports shared libraries via the library \s-1ID\s0 method.
|
| 7129 |
|
|
This allows for execute in place and shared libraries in an environment
|
| 7130 |
|
|
without virtual memory management. This option implies \fB\-fPIC\fR.
|
| 7131 |
|
|
.IP "\fB\-mno\-id\-shared\-library\fR" 4
|
| 7132 |
|
|
.IX Item "-mno-id-shared-library"
|
| 7133 |
|
|
Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
|
| 7134 |
|
|
This is the default.
|
| 7135 |
|
|
.IP "\fB\-mshared\-library\-id=n\fR" 4
|
| 7136 |
|
|
.IX Item "-mshared-library-id=n"
|
| 7137 |
|
|
Specified the identification number of the \s-1ID\s0 based shared library being
|
| 7138 |
|
|
compiled. Specifying a value of 0 will generate more compact code, specifying
|
| 7139 |
|
|
other values will force the allocation of that number to the current
|
| 7140 |
|
|
library but is no more space or time efficient than omitting this option.
|
| 7141 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 7142 |
|
|
.IX Item "-mlong-calls"
|
| 7143 |
|
|
.PD 0
|
| 7144 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
| 7145 |
|
|
.IX Item "-mno-long-calls"
|
| 7146 |
|
|
.PD
|
| 7147 |
|
|
Tells the compiler to perform function calls by first loading the
|
| 7148 |
|
|
address of the function into a register and then performing a subroutine
|
| 7149 |
|
|
call on this register. This switch is needed if the target function
|
| 7150 |
|
|
will lie outside of the 24 bit addressing range of the offset based
|
| 7151 |
|
|
version of subroutine call instruction.
|
| 7152 |
|
|
.Sp
|
| 7153 |
|
|
This feature is not enabled by default. Specifying
|
| 7154 |
|
|
\&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
|
| 7155 |
|
|
switches have no effect on how the compiler generates code to handle
|
| 7156 |
|
|
function calls via function pointers.
|
| 7157 |
|
|
.PP
|
| 7158 |
|
|
\fI\s-1CRIS\s0 Options\fR
|
| 7159 |
|
|
.IX Subsection "CRIS Options"
|
| 7160 |
|
|
.PP
|
| 7161 |
|
|
These options are defined specifically for the \s-1CRIS\s0 ports.
|
| 7162 |
|
|
.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
|
| 7163 |
|
|
.IX Item "-march=architecture-type"
|
| 7164 |
|
|
.PD 0
|
| 7165 |
|
|
.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
|
| 7166 |
|
|
.IX Item "-mcpu=architecture-type"
|
| 7167 |
|
|
.PD
|
| 7168 |
|
|
Generate code for the specified architecture. The choices for
|
| 7169 |
|
|
\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
|
| 7170 |
|
|
respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
|
| 7171 |
|
|
Default is \fBv0\fR except for cris\-axis\-linux\-gnu, where the default is
|
| 7172 |
|
|
\&\fBv10\fR.
|
| 7173 |
|
|
.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
|
| 7174 |
|
|
.IX Item "-mtune=architecture-type"
|
| 7175 |
|
|
Tune to \fIarchitecture-type\fR everything applicable about the generated
|
| 7176 |
|
|
code, except for the \s-1ABI\s0 and the set of available instructions. The
|
| 7177 |
|
|
choices for \fIarchitecture-type\fR are the same as for
|
| 7178 |
|
|
\&\fB\-march=\fR\fIarchitecture-type\fR.
|
| 7179 |
|
|
.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
|
| 7180 |
|
|
.IX Item "-mmax-stack-frame=n"
|
| 7181 |
|
|
Warn when the stack frame of a function exceeds \fIn\fR bytes.
|
| 7182 |
|
|
.IP "\fB\-melinux\-stacksize=\fR\fIn\fR" 4
|
| 7183 |
|
|
.IX Item "-melinux-stacksize=n"
|
| 7184 |
|
|
Only available with the \fBcris-axis-aout\fR target. Arranges for
|
| 7185 |
|
|
indications in the program to the kernel loader that the stack of the
|
| 7186 |
|
|
program should be set to \fIn\fR bytes.
|
| 7187 |
|
|
.IP "\fB\-metrax4\fR" 4
|
| 7188 |
|
|
.IX Item "-metrax4"
|
| 7189 |
|
|
.PD 0
|
| 7190 |
|
|
.IP "\fB\-metrax100\fR" 4
|
| 7191 |
|
|
.IX Item "-metrax100"
|
| 7192 |
|
|
.PD
|
| 7193 |
|
|
The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
|
| 7194 |
|
|
\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
|
| 7195 |
|
|
.IP "\fB\-mmul\-bug\-workaround\fR" 4
|
| 7196 |
|
|
.IX Item "-mmul-bug-workaround"
|
| 7197 |
|
|
.PD 0
|
| 7198 |
|
|
.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
|
| 7199 |
|
|
.IX Item "-mno-mul-bug-workaround"
|
| 7200 |
|
|
.PD
|
| 7201 |
|
|
Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
|
| 7202 |
|
|
models where it applies. This option is active by default.
|
| 7203 |
|
|
.IP "\fB\-mpdebug\fR" 4
|
| 7204 |
|
|
.IX Item "-mpdebug"
|
| 7205 |
|
|
Enable CRIS-specific verbose debug-related information in the assembly
|
| 7206 |
|
|
code. This option also has the effect to turn off the \fB#NO_APP\fR
|
| 7207 |
|
|
formatted-code indicator to the assembler at the beginning of the
|
| 7208 |
|
|
assembly file.
|
| 7209 |
|
|
.IP "\fB\-mcc\-init\fR" 4
|
| 7210 |
|
|
.IX Item "-mcc-init"
|
| 7211 |
|
|
Do not use condition-code results from previous instruction; always emit
|
| 7212 |
|
|
compare and test instructions before use of condition codes.
|
| 7213 |
|
|
.IP "\fB\-mno\-side\-effects\fR" 4
|
| 7214 |
|
|
.IX Item "-mno-side-effects"
|
| 7215 |
|
|
Do not emit instructions with side-effects in addressing modes other than
|
| 7216 |
|
|
post\-increment.
|
| 7217 |
|
|
.IP "\fB\-mstack\-align\fR" 4
|
| 7218 |
|
|
.IX Item "-mstack-align"
|
| 7219 |
|
|
.PD 0
|
| 7220 |
|
|
.IP "\fB\-mno\-stack\-align\fR" 4
|
| 7221 |
|
|
.IX Item "-mno-stack-align"
|
| 7222 |
|
|
.IP "\fB\-mdata\-align\fR" 4
|
| 7223 |
|
|
.IX Item "-mdata-align"
|
| 7224 |
|
|
.IP "\fB\-mno\-data\-align\fR" 4
|
| 7225 |
|
|
.IX Item "-mno-data-align"
|
| 7226 |
|
|
.IP "\fB\-mconst\-align\fR" 4
|
| 7227 |
|
|
.IX Item "-mconst-align"
|
| 7228 |
|
|
.IP "\fB\-mno\-const\-align\fR" 4
|
| 7229 |
|
|
.IX Item "-mno-const-align"
|
| 7230 |
|
|
.PD
|
| 7231 |
|
|
These options (no\-options) arranges (eliminate arrangements) for the
|
| 7232 |
|
|
stack\-frame, individual data and constants to be aligned for the maximum
|
| 7233 |
|
|
single data access size for the chosen \s-1CPU\s0 model. The default is to
|
| 7234 |
|
|
arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
|
| 7235 |
|
|
not affected by these options.
|
| 7236 |
|
|
.IP "\fB\-m32\-bit\fR" 4
|
| 7237 |
|
|
.IX Item "-m32-bit"
|
| 7238 |
|
|
.PD 0
|
| 7239 |
|
|
.IP "\fB\-m16\-bit\fR" 4
|
| 7240 |
|
|
.IX Item "-m16-bit"
|
| 7241 |
|
|
.IP "\fB\-m8\-bit\fR" 4
|
| 7242 |
|
|
.IX Item "-m8-bit"
|
| 7243 |
|
|
.PD
|
| 7244 |
|
|
Similar to the stack\- data\- and const-align options above, these options
|
| 7245 |
|
|
arrange for stack\-frame, writable data and constants to all be 32\-bit,
|
| 7246 |
|
|
16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
|
| 7247 |
|
|
.IP "\fB\-mno\-prologue\-epilogue\fR" 4
|
| 7248 |
|
|
.IX Item "-mno-prologue-epilogue"
|
| 7249 |
|
|
.PD 0
|
| 7250 |
|
|
.IP "\fB\-mprologue\-epilogue\fR" 4
|
| 7251 |
|
|
.IX Item "-mprologue-epilogue"
|
| 7252 |
|
|
.PD
|
| 7253 |
|
|
With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
|
| 7254 |
|
|
epilogue that sets up the stack-frame are omitted and no return
|
| 7255 |
|
|
instructions or return sequences are generated in the code. Use this
|
| 7256 |
|
|
option only together with visual inspection of the compiled code: no
|
| 7257 |
|
|
warnings or errors are generated when call-saved registers must be saved,
|
| 7258 |
|
|
or storage for local variable needs to be allocated.
|
| 7259 |
|
|
.IP "\fB\-mno\-gotplt\fR" 4
|
| 7260 |
|
|
.IX Item "-mno-gotplt"
|
| 7261 |
|
|
.PD 0
|
| 7262 |
|
|
.IP "\fB\-mgotplt\fR" 4
|
| 7263 |
|
|
.IX Item "-mgotplt"
|
| 7264 |
|
|
.PD
|
| 7265 |
|
|
With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
|
| 7266 |
|
|
instruction sequences that load addresses for functions from the \s-1PLT\s0 part
|
| 7267 |
|
|
of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
|
| 7268 |
|
|
\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
|
| 7269 |
|
|
.IP "\fB\-maout\fR" 4
|
| 7270 |
|
|
.IX Item "-maout"
|
| 7271 |
|
|
Legacy no-op option only recognized with the cris-axis-aout target.
|
| 7272 |
|
|
.IP "\fB\-melf\fR" 4
|
| 7273 |
|
|
.IX Item "-melf"
|
| 7274 |
|
|
Legacy no-op option only recognized with the cris-axis-elf and
|
| 7275 |
|
|
cris-axis-linux-gnu targets.
|
| 7276 |
|
|
.IP "\fB\-melinux\fR" 4
|
| 7277 |
|
|
.IX Item "-melinux"
|
| 7278 |
|
|
Only recognized with the cris-axis-aout target, where it selects a
|
| 7279 |
|
|
GNU/linux\-like multilib, include files and instruction set for
|
| 7280 |
|
|
\&\fB\-march=v8\fR.
|
| 7281 |
|
|
.IP "\fB\-mlinux\fR" 4
|
| 7282 |
|
|
.IX Item "-mlinux"
|
| 7283 |
|
|
Legacy no-op option only recognized with the cris-axis-linux-gnu target.
|
| 7284 |
|
|
.IP "\fB\-sim\fR" 4
|
| 7285 |
|
|
.IX Item "-sim"
|
| 7286 |
|
|
This option, recognized for the cris-axis-aout and cris-axis-elf arranges
|
| 7287 |
|
|
to link with input-output functions from a simulator library. Code,
|
| 7288 |
|
|
initialized data and zero-initialized data are allocated consecutively.
|
| 7289 |
|
|
.IP "\fB\-sim2\fR" 4
|
| 7290 |
|
|
.IX Item "-sim2"
|
| 7291 |
|
|
Like \fB\-sim\fR, but pass linker options to locate initialized data at
|
| 7292 |
|
|
0x40000000 and zero-initialized data at 0x80000000.
|
| 7293 |
|
|
.PP
|
| 7294 |
|
|
\fI\s-1CRX\s0 Options\fR
|
| 7295 |
|
|
.IX Subsection "CRX Options"
|
| 7296 |
|
|
.PP
|
| 7297 |
|
|
These options are defined specifically for the \s-1CRX\s0 ports.
|
| 7298 |
|
|
.IP "\fB\-mmac\fR" 4
|
| 7299 |
|
|
.IX Item "-mmac"
|
| 7300 |
|
|
Enable the use of multiply-accumulate instructions. Disabled by default.
|
| 7301 |
|
|
.IP "\fB\-mpush\-args\fR" 4
|
| 7302 |
|
|
.IX Item "-mpush-args"
|
| 7303 |
|
|
Push instructions will be used to pass outgoing arguments when functions
|
| 7304 |
|
|
are called. Enabled by default.
|
| 7305 |
|
|
.PP
|
| 7306 |
|
|
\fIDarwin Options\fR
|
| 7307 |
|
|
.IX Subsection "Darwin Options"
|
| 7308 |
|
|
.PP
|
| 7309 |
|
|
These options are defined for all architectures running the Darwin operating
|
| 7310 |
|
|
system.
|
| 7311 |
|
|
.PP
|
| 7312 |
|
|
\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
|
| 7313 |
|
|
an object file for the single architecture that it was built to
|
| 7314 |
|
|
target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
|
| 7315 |
|
|
\&\fB\-arch\fR options are used; it does so by running the compiler or
|
| 7316 |
|
|
linker multiple times and joining the results together with
|
| 7317 |
|
|
\&\fIlipo\fR.
|
| 7318 |
|
|
.PP
|
| 7319 |
|
|
The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
|
| 7320 |
|
|
\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
|
| 7321 |
|
|
that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
|
| 7322 |
|
|
\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
|
| 7323 |
|
|
.PP
|
| 7324 |
|
|
The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
|
| 7325 |
|
|
mismatch. The assembler, \fIas\fR, will only permit instructions to
|
| 7326 |
|
|
be used that are valid for the subtype of the file it is generating,
|
| 7327 |
|
|
so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
|
| 7328 |
|
|
The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
|
| 7329 |
|
|
and print an error if asked to create a shared library with a less
|
| 7330 |
|
|
restrictive subtype than its input files (for instance, trying to put
|
| 7331 |
|
|
a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
|
| 7332 |
|
|
for executables, \fIld\fR, will quietly give the executable the most
|
| 7333 |
|
|
restrictive subtype of any of its input files.
|
| 7334 |
|
|
.IP "\fB\-F\fR\fIdir\fR" 4
|
| 7335 |
|
|
.IX Item "-Fdir"
|
| 7336 |
|
|
Add the framework directory \fIdir\fR to the head of the list of
|
| 7337 |
|
|
directories to be searched for header files. These directories are
|
| 7338 |
|
|
interleaved with those specified by \fB\-I\fR options and are
|
| 7339 |
|
|
scanned in a left-to-right order.
|
| 7340 |
|
|
.Sp
|
| 7341 |
|
|
A framework directory is a directory with frameworks in it. A
|
| 7342 |
|
|
framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
|
| 7343 |
|
|
\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
|
| 7344 |
|
|
in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
|
| 7345 |
|
|
directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
|
| 7346 |
|
|
the framework are found in one of those two directories, with
|
| 7347 |
|
|
\&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
|
| 7348 |
|
|
directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
|
| 7349 |
|
|
Includes of subframework headers can only appear in a header of a
|
| 7350 |
|
|
framework that contains the subframework, or in a sibling subframework
|
| 7351 |
|
|
header. Two subframeworks are siblings if they occur in the same
|
| 7352 |
|
|
framework. A subframework should not have the same name as a
|
| 7353 |
|
|
framework, a warning will be issued if this is violated. Currently a
|
| 7354 |
|
|
subframework cannot have subframeworks, in the future, the mechanism
|
| 7355 |
|
|
may be extended to support this. The standard frameworks can be found
|
| 7356 |
|
|
in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
|
| 7357 |
|
|
\&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
|
| 7358 |
|
|
\&\f(CW\*(C`#include \*(C'\fR, where \fBFramework\fR denotes
|
| 7359 |
|
|
the name of the framework and header.h is found in the
|
| 7360 |
|
|
\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
|
| 7361 |
|
|
.IP "\fB\-gused\fR" 4
|
| 7362 |
|
|
.IX Item "-gused"
|
| 7363 |
|
|
Emit debugging information for symbols that are used. For \s-1STABS\s0
|
| 7364 |
|
|
debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
|
| 7365 |
|
|
This is by default \s-1ON\s0.
|
| 7366 |
|
|
.IP "\fB\-gfull\fR" 4
|
| 7367 |
|
|
.IX Item "-gfull"
|
| 7368 |
|
|
Emit debugging information for all symbols and types.
|
| 7369 |
|
|
.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
|
| 7370 |
|
|
.IX Item "-mmacosx-version-min=version"
|
| 7371 |
|
|
The earliest version of MacOS X that this executable will run on
|
| 7372 |
|
|
is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
|
| 7373 |
|
|
\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
|
| 7374 |
|
|
.Sp
|
| 7375 |
|
|
The default for this option is to make choices that seem to be most
|
| 7376 |
|
|
useful.
|
| 7377 |
|
|
.IP "\fB\-mone\-byte\-bool\fR" 4
|
| 7378 |
|
|
.IX Item "-mone-byte-bool"
|
| 7379 |
|
|
Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
|
| 7380 |
|
|
By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
|
| 7381 |
|
|
Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
|
| 7382 |
|
|
option has no effect on x86.
|
| 7383 |
|
|
.Sp
|
| 7384 |
|
|
\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
|
| 7385 |
|
|
to generate code that is not binary compatible with code generated
|
| 7386 |
|
|
without that switch. Using this switch may require recompiling all
|
| 7387 |
|
|
other modules in a program, including system libraries. Use this
|
| 7388 |
|
|
switch to conform to a non-default data model.
|
| 7389 |
|
|
.IP "\fB\-mfix\-and\-continue\fR" 4
|
| 7390 |
|
|
.IX Item "-mfix-and-continue"
|
| 7391 |
|
|
.PD 0
|
| 7392 |
|
|
.IP "\fB\-ffix\-and\-continue\fR" 4
|
| 7393 |
|
|
.IX Item "-ffix-and-continue"
|
| 7394 |
|
|
.IP "\fB\-findirect\-data\fR" 4
|
| 7395 |
|
|
.IX Item "-findirect-data"
|
| 7396 |
|
|
.PD
|
| 7397 |
|
|
Generate code suitable for fast turn around development. Needed to
|
| 7398 |
|
|
enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
|
| 7399 |
|
|
programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
|
| 7400 |
|
|
are provided for backwards compatibility.
|
| 7401 |
|
|
.IP "\fB\-all_load\fR" 4
|
| 7402 |
|
|
.IX Item "-all_load"
|
| 7403 |
|
|
Loads all members of static archive libraries.
|
| 7404 |
|
|
See man \fIld\fR\|(1) for more information.
|
| 7405 |
|
|
.IP "\fB\-arch_errors_fatal\fR" 4
|
| 7406 |
|
|
.IX Item "-arch_errors_fatal"
|
| 7407 |
|
|
Cause the errors having to do with files that have the wrong architecture
|
| 7408 |
|
|
to be fatal.
|
| 7409 |
|
|
.IP "\fB\-bind_at_load\fR" 4
|
| 7410 |
|
|
.IX Item "-bind_at_load"
|
| 7411 |
|
|
Causes the output file to be marked such that the dynamic linker will
|
| 7412 |
|
|
bind all undefined references when the file is loaded or launched.
|
| 7413 |
|
|
.IP "\fB\-bundle\fR" 4
|
| 7414 |
|
|
.IX Item "-bundle"
|
| 7415 |
|
|
Produce a Mach-o bundle format file.
|
| 7416 |
|
|
See man \fIld\fR\|(1) for more information.
|
| 7417 |
|
|
.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
|
| 7418 |
|
|
.IX Item "-bundle_loader executable"
|
| 7419 |
|
|
This option specifies the \fIexecutable\fR that will be loading the build
|
| 7420 |
|
|
output file being linked. See man \fIld\fR\|(1) for more information.
|
| 7421 |
|
|
.IP "\fB\-dynamiclib\fR" 4
|
| 7422 |
|
|
.IX Item "-dynamiclib"
|
| 7423 |
|
|
When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
|
| 7424 |
|
|
an executable when linking, using the Darwin \fIlibtool\fR command.
|
| 7425 |
|
|
.IP "\fB\-force_cpusubtype_ALL\fR" 4
|
| 7426 |
|
|
.IX Item "-force_cpusubtype_ALL"
|
| 7427 |
|
|
This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
|
| 7428 |
|
|
one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
|
| 7429 |
|
|
.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
|
| 7430 |
|
|
.IX Item "-allowable_client client_name"
|
| 7431 |
|
|
.PD 0
|
| 7432 |
|
|
.IP "\fB\-client_name\fR" 4
|
| 7433 |
|
|
.IX Item "-client_name"
|
| 7434 |
|
|
.IP "\fB\-compatibility_version\fR" 4
|
| 7435 |
|
|
.IX Item "-compatibility_version"
|
| 7436 |
|
|
.IP "\fB\-current_version\fR" 4
|
| 7437 |
|
|
.IX Item "-current_version"
|
| 7438 |
|
|
.IP "\fB\-dead_strip\fR" 4
|
| 7439 |
|
|
.IX Item "-dead_strip"
|
| 7440 |
|
|
.IP "\fB\-dependency\-file\fR" 4
|
| 7441 |
|
|
.IX Item "-dependency-file"
|
| 7442 |
|
|
.IP "\fB\-dylib_file\fR" 4
|
| 7443 |
|
|
.IX Item "-dylib_file"
|
| 7444 |
|
|
.IP "\fB\-dylinker_install_name\fR" 4
|
| 7445 |
|
|
.IX Item "-dylinker_install_name"
|
| 7446 |
|
|
.IP "\fB\-dynamic\fR" 4
|
| 7447 |
|
|
.IX Item "-dynamic"
|
| 7448 |
|
|
.IP "\fB\-exported_symbols_list\fR" 4
|
| 7449 |
|
|
.IX Item "-exported_symbols_list"
|
| 7450 |
|
|
.IP "\fB\-filelist\fR" 4
|
| 7451 |
|
|
.IX Item "-filelist"
|
| 7452 |
|
|
.IP "\fB\-flat_namespace\fR" 4
|
| 7453 |
|
|
.IX Item "-flat_namespace"
|
| 7454 |
|
|
.IP "\fB\-force_flat_namespace\fR" 4
|
| 7455 |
|
|
.IX Item "-force_flat_namespace"
|
| 7456 |
|
|
.IP "\fB\-headerpad_max_install_names\fR" 4
|
| 7457 |
|
|
.IX Item "-headerpad_max_install_names"
|
| 7458 |
|
|
.IP "\fB\-image_base\fR" 4
|
| 7459 |
|
|
.IX Item "-image_base"
|
| 7460 |
|
|
.IP "\fB\-init\fR" 4
|
| 7461 |
|
|
.IX Item "-init"
|
| 7462 |
|
|
.IP "\fB\-install_name\fR" 4
|
| 7463 |
|
|
.IX Item "-install_name"
|
| 7464 |
|
|
.IP "\fB\-keep_private_externs\fR" 4
|
| 7465 |
|
|
.IX Item "-keep_private_externs"
|
| 7466 |
|
|
.IP "\fB\-multi_module\fR" 4
|
| 7467 |
|
|
.IX Item "-multi_module"
|
| 7468 |
|
|
.IP "\fB\-multiply_defined\fR" 4
|
| 7469 |
|
|
.IX Item "-multiply_defined"
|
| 7470 |
|
|
.IP "\fB\-multiply_defined_unused\fR" 4
|
| 7471 |
|
|
.IX Item "-multiply_defined_unused"
|
| 7472 |
|
|
.IP "\fB\-noall_load\fR" 4
|
| 7473 |
|
|
.IX Item "-noall_load"
|
| 7474 |
|
|
.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
|
| 7475 |
|
|
.IX Item "-no_dead_strip_inits_and_terms"
|
| 7476 |
|
|
.IP "\fB\-nofixprebinding\fR" 4
|
| 7477 |
|
|
.IX Item "-nofixprebinding"
|
| 7478 |
|
|
.IP "\fB\-nomultidefs\fR" 4
|
| 7479 |
|
|
.IX Item "-nomultidefs"
|
| 7480 |
|
|
.IP "\fB\-noprebind\fR" 4
|
| 7481 |
|
|
.IX Item "-noprebind"
|
| 7482 |
|
|
.IP "\fB\-noseglinkedit\fR" 4
|
| 7483 |
|
|
.IX Item "-noseglinkedit"
|
| 7484 |
|
|
.IP "\fB\-pagezero_size\fR" 4
|
| 7485 |
|
|
.IX Item "-pagezero_size"
|
| 7486 |
|
|
.IP "\fB\-prebind\fR" 4
|
| 7487 |
|
|
.IX Item "-prebind"
|
| 7488 |
|
|
.IP "\fB\-prebind_all_twolevel_modules\fR" 4
|
| 7489 |
|
|
.IX Item "-prebind_all_twolevel_modules"
|
| 7490 |
|
|
.IP "\fB\-private_bundle\fR" 4
|
| 7491 |
|
|
.IX Item "-private_bundle"
|
| 7492 |
|
|
.IP "\fB\-read_only_relocs\fR" 4
|
| 7493 |
|
|
.IX Item "-read_only_relocs"
|
| 7494 |
|
|
.IP "\fB\-sectalign\fR" 4
|
| 7495 |
|
|
.IX Item "-sectalign"
|
| 7496 |
|
|
.IP "\fB\-sectobjectsymbols\fR" 4
|
| 7497 |
|
|
.IX Item "-sectobjectsymbols"
|
| 7498 |
|
|
.IP "\fB\-whyload\fR" 4
|
| 7499 |
|
|
.IX Item "-whyload"
|
| 7500 |
|
|
.IP "\fB\-seg1addr\fR" 4
|
| 7501 |
|
|
.IX Item "-seg1addr"
|
| 7502 |
|
|
.IP "\fB\-sectcreate\fR" 4
|
| 7503 |
|
|
.IX Item "-sectcreate"
|
| 7504 |
|
|
.IP "\fB\-sectobjectsymbols\fR" 4
|
| 7505 |
|
|
.IX Item "-sectobjectsymbols"
|
| 7506 |
|
|
.IP "\fB\-sectorder\fR" 4
|
| 7507 |
|
|
.IX Item "-sectorder"
|
| 7508 |
|
|
.IP "\fB\-segaddr\fR" 4
|
| 7509 |
|
|
.IX Item "-segaddr"
|
| 7510 |
|
|
.IP "\fB\-segs_read_only_addr\fR" 4
|
| 7511 |
|
|
.IX Item "-segs_read_only_addr"
|
| 7512 |
|
|
.IP "\fB\-segs_read_write_addr\fR" 4
|
| 7513 |
|
|
.IX Item "-segs_read_write_addr"
|
| 7514 |
|
|
.IP "\fB\-seg_addr_table\fR" 4
|
| 7515 |
|
|
.IX Item "-seg_addr_table"
|
| 7516 |
|
|
.IP "\fB\-seg_addr_table_filename\fR" 4
|
| 7517 |
|
|
.IX Item "-seg_addr_table_filename"
|
| 7518 |
|
|
.IP "\fB\-seglinkedit\fR" 4
|
| 7519 |
|
|
.IX Item "-seglinkedit"
|
| 7520 |
|
|
.IP "\fB\-segprot\fR" 4
|
| 7521 |
|
|
.IX Item "-segprot"
|
| 7522 |
|
|
.IP "\fB\-segs_read_only_addr\fR" 4
|
| 7523 |
|
|
.IX Item "-segs_read_only_addr"
|
| 7524 |
|
|
.IP "\fB\-segs_read_write_addr\fR" 4
|
| 7525 |
|
|
.IX Item "-segs_read_write_addr"
|
| 7526 |
|
|
.IP "\fB\-single_module\fR" 4
|
| 7527 |
|
|
.IX Item "-single_module"
|
| 7528 |
|
|
.IP "\fB\-static\fR" 4
|
| 7529 |
|
|
.IX Item "-static"
|
| 7530 |
|
|
.IP "\fB\-sub_library\fR" 4
|
| 7531 |
|
|
.IX Item "-sub_library"
|
| 7532 |
|
|
.IP "\fB\-sub_umbrella\fR" 4
|
| 7533 |
|
|
.IX Item "-sub_umbrella"
|
| 7534 |
|
|
.IP "\fB\-twolevel_namespace\fR" 4
|
| 7535 |
|
|
.IX Item "-twolevel_namespace"
|
| 7536 |
|
|
.IP "\fB\-umbrella\fR" 4
|
| 7537 |
|
|
.IX Item "-umbrella"
|
| 7538 |
|
|
.IP "\fB\-undefined\fR" 4
|
| 7539 |
|
|
.IX Item "-undefined"
|
| 7540 |
|
|
.IP "\fB\-unexported_symbols_list\fR" 4
|
| 7541 |
|
|
.IX Item "-unexported_symbols_list"
|
| 7542 |
|
|
.IP "\fB\-weak_reference_mismatches\fR" 4
|
| 7543 |
|
|
.IX Item "-weak_reference_mismatches"
|
| 7544 |
|
|
.IP "\fB\-whatsloaded\fR" 4
|
| 7545 |
|
|
.IX Item "-whatsloaded"
|
| 7546 |
|
|
.PD
|
| 7547 |
|
|
These options are passed to the Darwin linker. The Darwin linker man page
|
| 7548 |
|
|
describes them in detail.
|
| 7549 |
|
|
.PP
|
| 7550 |
|
|
\fI\s-1DEC\s0 Alpha Options\fR
|
| 7551 |
|
|
.IX Subsection "DEC Alpha Options"
|
| 7552 |
|
|
.PP
|
| 7553 |
|
|
These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
|
| 7554 |
|
|
.IP "\fB\-mno\-soft\-float\fR" 4
|
| 7555 |
|
|
.IX Item "-mno-soft-float"
|
| 7556 |
|
|
.PD 0
|
| 7557 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 7558 |
|
|
.IX Item "-msoft-float"
|
| 7559 |
|
|
.PD
|
| 7560 |
|
|
Use (do not use) the hardware floating-point instructions for
|
| 7561 |
|
|
floating-point operations. When \fB\-msoft\-float\fR is specified,
|
| 7562 |
|
|
functions in \fIlibgcc.a\fR will be used to perform floating-point
|
| 7563 |
|
|
operations. Unless they are replaced by routines that emulate the
|
| 7564 |
|
|
floating-point operations, or compiled in such a way as to call such
|
| 7565 |
|
|
emulations routines, these routines will issue floating-point
|
| 7566 |
|
|
operations. If you are compiling for an Alpha without floating-point
|
| 7567 |
|
|
operations, you must ensure that the library is built so as not to call
|
| 7568 |
|
|
them.
|
| 7569 |
|
|
.Sp
|
| 7570 |
|
|
Note that Alpha implementations without floating-point operations are
|
| 7571 |
|
|
required to have floating-point registers.
|
| 7572 |
|
|
.IP "\fB\-mfp\-reg\fR" 4
|
| 7573 |
|
|
.IX Item "-mfp-reg"
|
| 7574 |
|
|
.PD 0
|
| 7575 |
|
|
.IP "\fB\-mno\-fp\-regs\fR" 4
|
| 7576 |
|
|
.IX Item "-mno-fp-regs"
|
| 7577 |
|
|
.PD
|
| 7578 |
|
|
Generate code that uses (does not use) the floating-point register set.
|
| 7579 |
|
|
\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
|
| 7580 |
|
|
register set is not used, floating point operands are passed in integer
|
| 7581 |
|
|
registers as if they were integers and floating-point results are passed
|
| 7582 |
|
|
in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
|
| 7583 |
|
|
so any function with a floating-point argument or return value called by code
|
| 7584 |
|
|
compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
|
| 7585 |
|
|
option.
|
| 7586 |
|
|
.Sp
|
| 7587 |
|
|
A typical use of this option is building a kernel that does not use,
|
| 7588 |
|
|
and hence need not save and restore, any floating-point registers.
|
| 7589 |
|
|
.IP "\fB\-mieee\fR" 4
|
| 7590 |
|
|
.IX Item "-mieee"
|
| 7591 |
|
|
The Alpha architecture implements floating-point hardware optimized for
|
| 7592 |
|
|
maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
|
| 7593 |
|
|
point standard. However, for full compliance, software assistance is
|
| 7594 |
|
|
required. This option generates code fully \s-1IEEE\s0 compliant code
|
| 7595 |
|
|
\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
|
| 7596 |
|
|
If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
|
| 7597 |
|
|
defined during compilation. The resulting code is less efficient but is
|
| 7598 |
|
|
able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
|
| 7599 |
|
|
values such as not-a-number and plus/minus infinity. Other Alpha
|
| 7600 |
|
|
compilers call this option \fB\-ieee_with_no_inexact\fR.
|
| 7601 |
|
|
.IP "\fB\-mieee\-with\-inexact\fR" 4
|
| 7602 |
|
|
.IX Item "-mieee-with-inexact"
|
| 7603 |
|
|
This is like \fB\-mieee\fR except the generated code also maintains
|
| 7604 |
|
|
the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
|
| 7605 |
|
|
generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
|
| 7606 |
|
|
\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
|
| 7607 |
|
|
macro. On some Alpha implementations the resulting code may execute
|
| 7608 |
|
|
significantly slower than the code generated by default. Since there is
|
| 7609 |
|
|
very little code that depends on the \fIinexact-flag\fR, you should
|
| 7610 |
|
|
normally not specify this option. Other Alpha compilers call this
|
| 7611 |
|
|
option \fB\-ieee_with_inexact\fR.
|
| 7612 |
|
|
.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
|
| 7613 |
|
|
.IX Item "-mfp-trap-mode=trap-mode"
|
| 7614 |
|
|
This option controls what floating-point related traps are enabled.
|
| 7615 |
|
|
Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
|
| 7616 |
|
|
The trap mode can be set to one of four values:
|
| 7617 |
|
|
.RS 4
|
| 7618 |
|
|
.IP "\fBn\fR" 4
|
| 7619 |
|
|
.IX Item "n"
|
| 7620 |
|
|
This is the default (normal) setting. The only traps that are enabled
|
| 7621 |
|
|
are the ones that cannot be disabled in software (e.g., division by zero
|
| 7622 |
|
|
trap).
|
| 7623 |
|
|
.IP "\fBu\fR" 4
|
| 7624 |
|
|
.IX Item "u"
|
| 7625 |
|
|
In addition to the traps enabled by \fBn\fR, underflow traps are enabled
|
| 7626 |
|
|
as well.
|
| 7627 |
|
|
.IP "\fBsu\fR" 4
|
| 7628 |
|
|
.IX Item "su"
|
| 7629 |
|
|
Like \fBsu\fR, but the instructions are marked to be safe for software
|
| 7630 |
|
|
completion (see Alpha architecture manual for details).
|
| 7631 |
|
|
.IP "\fBsui\fR" 4
|
| 7632 |
|
|
.IX Item "sui"
|
| 7633 |
|
|
Like \fBsu\fR, but inexact traps are enabled as well.
|
| 7634 |
|
|
.RE
|
| 7635 |
|
|
.RS 4
|
| 7636 |
|
|
.RE
|
| 7637 |
|
|
.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
|
| 7638 |
|
|
.IX Item "-mfp-rounding-mode=rounding-mode"
|
| 7639 |
|
|
Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
|
| 7640 |
|
|
\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
|
| 7641 |
|
|
of:
|
| 7642 |
|
|
.RS 4
|
| 7643 |
|
|
.IP "\fBn\fR" 4
|
| 7644 |
|
|
.IX Item "n"
|
| 7645 |
|
|
Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
|
| 7646 |
|
|
the nearest machine number or towards the even machine number in case
|
| 7647 |
|
|
of a tie.
|
| 7648 |
|
|
.IP "\fBm\fR" 4
|
| 7649 |
|
|
.IX Item "m"
|
| 7650 |
|
|
Round towards minus infinity.
|
| 7651 |
|
|
.IP "\fBc\fR" 4
|
| 7652 |
|
|
.IX Item "c"
|
| 7653 |
|
|
Chopped rounding mode. Floating point numbers are rounded towards zero.
|
| 7654 |
|
|
.IP "\fBd\fR" 4
|
| 7655 |
|
|
.IX Item "d"
|
| 7656 |
|
|
Dynamic rounding mode. A field in the floating point control register
|
| 7657 |
|
|
(\fIfpcr\fR, see Alpha architecture reference manual) controls the
|
| 7658 |
|
|
rounding mode in effect. The C library initializes this register for
|
| 7659 |
|
|
rounding towards plus infinity. Thus, unless your program modifies the
|
| 7660 |
|
|
\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
|
| 7661 |
|
|
.RE
|
| 7662 |
|
|
.RS 4
|
| 7663 |
|
|
.RE
|
| 7664 |
|
|
.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
|
| 7665 |
|
|
.IX Item "-mtrap-precision=trap-precision"
|
| 7666 |
|
|
In the Alpha architecture, floating point traps are imprecise. This
|
| 7667 |
|
|
means without software assistance it is impossible to recover from a
|
| 7668 |
|
|
floating trap and program execution normally needs to be terminated.
|
| 7669 |
|
|
\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
|
| 7670 |
|
|
in determining the exact location that caused a floating point trap.
|
| 7671 |
|
|
Depending on the requirements of an application, different levels of
|
| 7672 |
|
|
precisions can be selected:
|
| 7673 |
|
|
.RS 4
|
| 7674 |
|
|
.IP "\fBp\fR" 4
|
| 7675 |
|
|
.IX Item "p"
|
| 7676 |
|
|
Program precision. This option is the default and means a trap handler
|
| 7677 |
|
|
can only identify which program caused a floating point exception.
|
| 7678 |
|
|
.IP "\fBf\fR" 4
|
| 7679 |
|
|
.IX Item "f"
|
| 7680 |
|
|
Function precision. The trap handler can determine the function that
|
| 7681 |
|
|
caused a floating point exception.
|
| 7682 |
|
|
.IP "\fBi\fR" 4
|
| 7683 |
|
|
.IX Item "i"
|
| 7684 |
|
|
Instruction precision. The trap handler can determine the exact
|
| 7685 |
|
|
instruction that caused a floating point exception.
|
| 7686 |
|
|
.RE
|
| 7687 |
|
|
.RS 4
|
| 7688 |
|
|
.Sp
|
| 7689 |
|
|
Other Alpha compilers provide the equivalent options called
|
| 7690 |
|
|
\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
|
| 7691 |
|
|
.RE
|
| 7692 |
|
|
.IP "\fB\-mieee\-conformant\fR" 4
|
| 7693 |
|
|
.IX Item "-mieee-conformant"
|
| 7694 |
|
|
This option marks the generated code as \s-1IEEE\s0 conformant. You must not
|
| 7695 |
|
|
use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
|
| 7696 |
|
|
\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
|
| 7697 |
|
|
is to emit the line \fB.eflag 48\fR in the function prologue of the
|
| 7698 |
|
|
generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
|
| 7699 |
|
|
IEEE-conformant math library routines will be linked in.
|
| 7700 |
|
|
.IP "\fB\-mbuild\-constants\fR" 4
|
| 7701 |
|
|
.IX Item "-mbuild-constants"
|
| 7702 |
|
|
Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
|
| 7703 |
|
|
see if it can construct it from smaller constants in two or three
|
| 7704 |
|
|
instructions. If it cannot, it will output the constant as a literal and
|
| 7705 |
|
|
generate code to load it from the data segment at runtime.
|
| 7706 |
|
|
.Sp
|
| 7707 |
|
|
Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
|
| 7708 |
|
|
using code, even if it takes more instructions (the maximum is six).
|
| 7709 |
|
|
.Sp
|
| 7710 |
|
|
You would typically use this option to build a shared library dynamic
|
| 7711 |
|
|
loader. Itself a shared library, it must relocate itself in memory
|
| 7712 |
|
|
before it can find the variables and constants in its own data segment.
|
| 7713 |
|
|
.IP "\fB\-malpha\-as\fR" 4
|
| 7714 |
|
|
.IX Item "-malpha-as"
|
| 7715 |
|
|
.PD 0
|
| 7716 |
|
|
.IP "\fB\-mgas\fR" 4
|
| 7717 |
|
|
.IX Item "-mgas"
|
| 7718 |
|
|
.PD
|
| 7719 |
|
|
Select whether to generate code to be assembled by the vendor-supplied
|
| 7720 |
|
|
assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
|
| 7721 |
|
|
.IP "\fB\-mbwx\fR" 4
|
| 7722 |
|
|
.IX Item "-mbwx"
|
| 7723 |
|
|
.PD 0
|
| 7724 |
|
|
.IP "\fB\-mno\-bwx\fR" 4
|
| 7725 |
|
|
.IX Item "-mno-bwx"
|
| 7726 |
|
|
.IP "\fB\-mcix\fR" 4
|
| 7727 |
|
|
.IX Item "-mcix"
|
| 7728 |
|
|
.IP "\fB\-mno\-cix\fR" 4
|
| 7729 |
|
|
.IX Item "-mno-cix"
|
| 7730 |
|
|
.IP "\fB\-mfix\fR" 4
|
| 7731 |
|
|
.IX Item "-mfix"
|
| 7732 |
|
|
.IP "\fB\-mno\-fix\fR" 4
|
| 7733 |
|
|
.IX Item "-mno-fix"
|
| 7734 |
|
|
.IP "\fB\-mmax\fR" 4
|
| 7735 |
|
|
.IX Item "-mmax"
|
| 7736 |
|
|
.IP "\fB\-mno\-max\fR" 4
|
| 7737 |
|
|
.IX Item "-mno-max"
|
| 7738 |
|
|
.PD
|
| 7739 |
|
|
Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
|
| 7740 |
|
|
\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
|
| 7741 |
|
|
sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
|
| 7742 |
|
|
of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
|
| 7743 |
|
|
.IP "\fB\-mfloat\-vax\fR" 4
|
| 7744 |
|
|
.IX Item "-mfloat-vax"
|
| 7745 |
|
|
.PD 0
|
| 7746 |
|
|
.IP "\fB\-mfloat\-ieee\fR" 4
|
| 7747 |
|
|
.IX Item "-mfloat-ieee"
|
| 7748 |
|
|
.PD
|
| 7749 |
|
|
Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
|
| 7750 |
|
|
arithmetic instead of \s-1IEEE\s0 single and double precision.
|
| 7751 |
|
|
.IP "\fB\-mexplicit\-relocs\fR" 4
|
| 7752 |
|
|
.IX Item "-mexplicit-relocs"
|
| 7753 |
|
|
.PD 0
|
| 7754 |
|
|
.IP "\fB\-mno\-explicit\-relocs\fR" 4
|
| 7755 |
|
|
.IX Item "-mno-explicit-relocs"
|
| 7756 |
|
|
.PD
|
| 7757 |
|
|
Older Alpha assemblers provided no way to generate symbol relocations
|
| 7758 |
|
|
except via assembler macros. Use of these macros does not allow
|
| 7759 |
|
|
optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
|
| 7760 |
|
|
supports a new syntax that allows the compiler to explicitly mark
|
| 7761 |
|
|
which relocations should apply to which instructions. This option
|
| 7762 |
|
|
is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
|
| 7763 |
|
|
the assembler when it is built and sets the default accordingly.
|
| 7764 |
|
|
.IP "\fB\-msmall\-data\fR" 4
|
| 7765 |
|
|
.IX Item "-msmall-data"
|
| 7766 |
|
|
.PD 0
|
| 7767 |
|
|
.IP "\fB\-mlarge\-data\fR" 4
|
| 7768 |
|
|
.IX Item "-mlarge-data"
|
| 7769 |
|
|
.PD
|
| 7770 |
|
|
When \fB\-mexplicit\-relocs\fR is in effect, static data is
|
| 7771 |
|
|
accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
|
| 7772 |
|
|
is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
|
| 7773 |
|
|
(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
|
| 7774 |
|
|
16\-bit relocations off of the \f(CW$gp\fR register. This limits the
|
| 7775 |
|
|
size of the small data area to 64KB, but allows the variables to be
|
| 7776 |
|
|
directly accessed via a single instruction.
|
| 7777 |
|
|
.Sp
|
| 7778 |
|
|
The default is \fB\-mlarge\-data\fR. With this option the data area
|
| 7779 |
|
|
is limited to just below 2GB. Programs that require more than 2GB of
|
| 7780 |
|
|
data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
|
| 7781 |
|
|
heap instead of in the program's data segment.
|
| 7782 |
|
|
.Sp
|
| 7783 |
|
|
When generating code for shared libraries, \fB\-fpic\fR implies
|
| 7784 |
|
|
\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
|
| 7785 |
|
|
.IP "\fB\-msmall\-text\fR" 4
|
| 7786 |
|
|
.IX Item "-msmall-text"
|
| 7787 |
|
|
.PD 0
|
| 7788 |
|
|
.IP "\fB\-mlarge\-text\fR" 4
|
| 7789 |
|
|
.IX Item "-mlarge-text"
|
| 7790 |
|
|
.PD
|
| 7791 |
|
|
When \fB\-msmall\-text\fR is used, the compiler assumes that the
|
| 7792 |
|
|
code of the entire program (or shared library) fits in 4MB, and is
|
| 7793 |
|
|
thus reachable with a branch instruction. When \fB\-msmall\-data\fR
|
| 7794 |
|
|
is used, the compiler can assume that all local symbols share the
|
| 7795 |
|
|
same \f(CW$gp\fR value, and thus reduce the number of instructions
|
| 7796 |
|
|
required for a function call from 4 to 1.
|
| 7797 |
|
|
.Sp
|
| 7798 |
|
|
The default is \fB\-mlarge\-text\fR.
|
| 7799 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
| 7800 |
|
|
.IX Item "-mcpu=cpu_type"
|
| 7801 |
|
|
Set the instruction set and instruction scheduling parameters for
|
| 7802 |
|
|
machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
|
| 7803 |
|
|
style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
|
| 7804 |
|
|
parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
|
| 7805 |
|
|
choose the default values for the instruction set from the processor
|
| 7806 |
|
|
you specify. If you do not specify a processor type, \s-1GCC\s0 will default
|
| 7807 |
|
|
to the processor on which the compiler was built.
|
| 7808 |
|
|
.Sp
|
| 7809 |
|
|
Supported values for \fIcpu_type\fR are
|
| 7810 |
|
|
.RS 4
|
| 7811 |
|
|
.IP "\fBev4\fR" 4
|
| 7812 |
|
|
.IX Item "ev4"
|
| 7813 |
|
|
.PD 0
|
| 7814 |
|
|
.IP "\fBev45\fR" 4
|
| 7815 |
|
|
.IX Item "ev45"
|
| 7816 |
|
|
.IP "\fB21064\fR" 4
|
| 7817 |
|
|
.IX Item "21064"
|
| 7818 |
|
|
.PD
|
| 7819 |
|
|
Schedules as an \s-1EV4\s0 and has no instruction set extensions.
|
| 7820 |
|
|
.IP "\fBev5\fR" 4
|
| 7821 |
|
|
.IX Item "ev5"
|
| 7822 |
|
|
.PD 0
|
| 7823 |
|
|
.IP "\fB21164\fR" 4
|
| 7824 |
|
|
.IX Item "21164"
|
| 7825 |
|
|
.PD
|
| 7826 |
|
|
Schedules as an \s-1EV5\s0 and has no instruction set extensions.
|
| 7827 |
|
|
.IP "\fBev56\fR" 4
|
| 7828 |
|
|
.IX Item "ev56"
|
| 7829 |
|
|
.PD 0
|
| 7830 |
|
|
.IP "\fB21164a\fR" 4
|
| 7831 |
|
|
.IX Item "21164a"
|
| 7832 |
|
|
.PD
|
| 7833 |
|
|
Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
|
| 7834 |
|
|
.IP "\fBpca56\fR" 4
|
| 7835 |
|
|
.IX Item "pca56"
|
| 7836 |
|
|
.PD 0
|
| 7837 |
|
|
.IP "\fB21164pc\fR" 4
|
| 7838 |
|
|
.IX Item "21164pc"
|
| 7839 |
|
|
.IP "\fB21164PC\fR" 4
|
| 7840 |
|
|
.IX Item "21164PC"
|
| 7841 |
|
|
.PD
|
| 7842 |
|
|
Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
|
| 7843 |
|
|
.IP "\fBev6\fR" 4
|
| 7844 |
|
|
.IX Item "ev6"
|
| 7845 |
|
|
.PD 0
|
| 7846 |
|
|
.IP "\fB21264\fR" 4
|
| 7847 |
|
|
.IX Item "21264"
|
| 7848 |
|
|
.PD
|
| 7849 |
|
|
Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
|
| 7850 |
|
|
.IP "\fBev67\fR" 4
|
| 7851 |
|
|
.IX Item "ev67"
|
| 7852 |
|
|
.PD 0
|
| 7853 |
|
|
.IP "\fB21264a\fR" 4
|
| 7854 |
|
|
.IX Item "21264a"
|
| 7855 |
|
|
.PD
|
| 7856 |
|
|
Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
|
| 7857 |
|
|
.RE
|
| 7858 |
|
|
.RS 4
|
| 7859 |
|
|
.RE
|
| 7860 |
|
|
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
|
| 7861 |
|
|
.IX Item "-mtune=cpu_type"
|
| 7862 |
|
|
Set only the instruction scheduling parameters for machine type
|
| 7863 |
|
|
\&\fIcpu_type\fR. The instruction set is not changed.
|
| 7864 |
|
|
.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
|
| 7865 |
|
|
.IX Item "-mmemory-latency=time"
|
| 7866 |
|
|
Sets the latency the scheduler should assume for typical memory
|
| 7867 |
|
|
references as seen by the application. This number is highly
|
| 7868 |
|
|
dependent on the memory access patterns used by the application
|
| 7869 |
|
|
and the size of the external cache on the machine.
|
| 7870 |
|
|
.Sp
|
| 7871 |
|
|
Valid options for \fItime\fR are
|
| 7872 |
|
|
.RS 4
|
| 7873 |
|
|
.IP "\fInumber\fR" 4
|
| 7874 |
|
|
.IX Item "number"
|
| 7875 |
|
|
A decimal number representing clock cycles.
|
| 7876 |
|
|
.IP "\fBL1\fR" 4
|
| 7877 |
|
|
.IX Item "L1"
|
| 7878 |
|
|
.PD 0
|
| 7879 |
|
|
.IP "\fBL2\fR" 4
|
| 7880 |
|
|
.IX Item "L2"
|
| 7881 |
|
|
.IP "\fBL3\fR" 4
|
| 7882 |
|
|
.IX Item "L3"
|
| 7883 |
|
|
.IP "\fBmain\fR" 4
|
| 7884 |
|
|
.IX Item "main"
|
| 7885 |
|
|
.PD
|
| 7886 |
|
|
The compiler contains estimates of the number of clock cycles for
|
| 7887 |
|
|
\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
|
| 7888 |
|
|
(also called Dcache, Scache, and Bcache), as well as to main memory.
|
| 7889 |
|
|
Note that L3 is only valid for \s-1EV5\s0.
|
| 7890 |
|
|
.RE
|
| 7891 |
|
|
.RS 4
|
| 7892 |
|
|
.RE
|
| 7893 |
|
|
.PP
|
| 7894 |
|
|
\fI\s-1DEC\s0 Alpha/VMS Options\fR
|
| 7895 |
|
|
.IX Subsection "DEC Alpha/VMS Options"
|
| 7896 |
|
|
.PP
|
| 7897 |
|
|
These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
|
| 7898 |
|
|
.IP "\fB\-mvms\-return\-codes\fR" 4
|
| 7899 |
|
|
.IX Item "-mvms-return-codes"
|
| 7900 |
|
|
Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
|
| 7901 |
|
|
style condition (e.g. error) codes.
|
| 7902 |
|
|
.PP
|
| 7903 |
|
|
\fI\s-1FRV\s0 Options\fR
|
| 7904 |
|
|
.IX Subsection "FRV Options"
|
| 7905 |
|
|
.IP "\fB\-mgpr\-32\fR" 4
|
| 7906 |
|
|
.IX Item "-mgpr-32"
|
| 7907 |
|
|
Only use the first 32 general purpose registers.
|
| 7908 |
|
|
.IP "\fB\-mgpr\-64\fR" 4
|
| 7909 |
|
|
.IX Item "-mgpr-64"
|
| 7910 |
|
|
Use all 64 general purpose registers.
|
| 7911 |
|
|
.IP "\fB\-mfpr\-32\fR" 4
|
| 7912 |
|
|
.IX Item "-mfpr-32"
|
| 7913 |
|
|
Use only the first 32 floating point registers.
|
| 7914 |
|
|
.IP "\fB\-mfpr\-64\fR" 4
|
| 7915 |
|
|
.IX Item "-mfpr-64"
|
| 7916 |
|
|
Use all 64 floating point registers
|
| 7917 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
| 7918 |
|
|
.IX Item "-mhard-float"
|
| 7919 |
|
|
Use hardware instructions for floating point operations.
|
| 7920 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 7921 |
|
|
.IX Item "-msoft-float"
|
| 7922 |
|
|
Use library routines for floating point operations.
|
| 7923 |
|
|
.IP "\fB\-malloc\-cc\fR" 4
|
| 7924 |
|
|
.IX Item "-malloc-cc"
|
| 7925 |
|
|
Dynamically allocate condition code registers.
|
| 7926 |
|
|
.IP "\fB\-mfixed\-cc\fR" 4
|
| 7927 |
|
|
.IX Item "-mfixed-cc"
|
| 7928 |
|
|
Do not try to dynamically allocate condition code registers, only
|
| 7929 |
|
|
use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
|
| 7930 |
|
|
.IP "\fB\-mdword\fR" 4
|
| 7931 |
|
|
.IX Item "-mdword"
|
| 7932 |
|
|
Change \s-1ABI\s0 to use double word insns.
|
| 7933 |
|
|
.IP "\fB\-mno\-dword\fR" 4
|
| 7934 |
|
|
.IX Item "-mno-dword"
|
| 7935 |
|
|
Do not use double word instructions.
|
| 7936 |
|
|
.IP "\fB\-mdouble\fR" 4
|
| 7937 |
|
|
.IX Item "-mdouble"
|
| 7938 |
|
|
Use floating point double instructions.
|
| 7939 |
|
|
.IP "\fB\-mno\-double\fR" 4
|
| 7940 |
|
|
.IX Item "-mno-double"
|
| 7941 |
|
|
Do not use floating point double instructions.
|
| 7942 |
|
|
.IP "\fB\-mmedia\fR" 4
|
| 7943 |
|
|
.IX Item "-mmedia"
|
| 7944 |
|
|
Use media instructions.
|
| 7945 |
|
|
.IP "\fB\-mno\-media\fR" 4
|
| 7946 |
|
|
.IX Item "-mno-media"
|
| 7947 |
|
|
Do not use media instructions.
|
| 7948 |
|
|
.IP "\fB\-mmuladd\fR" 4
|
| 7949 |
|
|
.IX Item "-mmuladd"
|
| 7950 |
|
|
Use multiply and add/subtract instructions.
|
| 7951 |
|
|
.IP "\fB\-mno\-muladd\fR" 4
|
| 7952 |
|
|
.IX Item "-mno-muladd"
|
| 7953 |
|
|
Do not use multiply and add/subtract instructions.
|
| 7954 |
|
|
.IP "\fB\-mfdpic\fR" 4
|
| 7955 |
|
|
.IX Item "-mfdpic"
|
| 7956 |
|
|
Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
|
| 7957 |
|
|
pointers to functions. Without any PIC/PIE\-related options, it
|
| 7958 |
|
|
implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
|
| 7959 |
|
|
assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
|
| 7960 |
|
|
\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
|
| 7961 |
|
|
are computed with 32 bits.
|
| 7962 |
|
|
.IP "\fB\-minline\-plt\fR" 4
|
| 7963 |
|
|
.IX Item "-minline-plt"
|
| 7964 |
|
|
Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
|
| 7965 |
|
|
not known to bind locally. It has no effect without \fB\-mfdpic\fR.
|
| 7966 |
|
|
It's enabled by default if optimizing for speed and compiling for
|
| 7967 |
|
|
shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
|
| 7968 |
|
|
optimization option such as \fB\-O3\fR or above is present in the
|
| 7969 |
|
|
command line.
|
| 7970 |
|
|
.IP "\fB\-mTLS\fR" 4
|
| 7971 |
|
|
.IX Item "-mTLS"
|
| 7972 |
|
|
Assume a large \s-1TLS\s0 segment when generating thread-local code.
|
| 7973 |
|
|
.IP "\fB\-mtls\fR" 4
|
| 7974 |
|
|
.IX Item "-mtls"
|
| 7975 |
|
|
Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
|
| 7976 |
|
|
.IP "\fB\-mgprel\-ro\fR" 4
|
| 7977 |
|
|
.IX Item "-mgprel-ro"
|
| 7978 |
|
|
Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
|
| 7979 |
|
|
that is known to be in read-only sections. It's enabled by default,
|
| 7980 |
|
|
except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
|
| 7981 |
|
|
make the global offset table smaller, it trades 1 instruction for 4.
|
| 7982 |
|
|
With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
|
| 7983 |
|
|
one of which may be shared by multiple symbols, and it avoids the need
|
| 7984 |
|
|
for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
|
| 7985 |
|
|
win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
|
| 7986 |
|
|
.IP "\fB\-multilib\-library\-pic\fR" 4
|
| 7987 |
|
|
.IX Item "-multilib-library-pic"
|
| 7988 |
|
|
Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
|
| 7989 |
|
|
\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
|
| 7990 |
|
|
\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
|
| 7991 |
|
|
it explicitly.
|
| 7992 |
|
|
.IP "\fB\-mlinked\-fp\fR" 4
|
| 7993 |
|
|
.IX Item "-mlinked-fp"
|
| 7994 |
|
|
Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
|
| 7995 |
|
|
a stack frame is allocated. This option is enabled by default and can
|
| 7996 |
|
|
be disabled with \fB\-mno\-linked\-fp\fR.
|
| 7997 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 7998 |
|
|
.IX Item "-mlong-calls"
|
| 7999 |
|
|
Use indirect addressing to call functions outside the current
|
| 8000 |
|
|
compilation unit. This allows the functions to be placed anywhere
|
| 8001 |
|
|
within the 32\-bit address space.
|
| 8002 |
|
|
.IP "\fB\-malign\-labels\fR" 4
|
| 8003 |
|
|
.IX Item "-malign-labels"
|
| 8004 |
|
|
Try to align labels to an 8\-byte boundary by inserting nops into the
|
| 8005 |
|
|
previous packet. This option only has an effect when \s-1VLIW\s0 packing
|
| 8006 |
|
|
is enabled. It doesn't create new packets; it merely adds nops to
|
| 8007 |
|
|
existing ones.
|
| 8008 |
|
|
.IP "\fB\-mlibrary\-pic\fR" 4
|
| 8009 |
|
|
.IX Item "-mlibrary-pic"
|
| 8010 |
|
|
Generate position-independent \s-1EABI\s0 code.
|
| 8011 |
|
|
.IP "\fB\-macc\-4\fR" 4
|
| 8012 |
|
|
.IX Item "-macc-4"
|
| 8013 |
|
|
Use only the first four media accumulator registers.
|
| 8014 |
|
|
.IP "\fB\-macc\-8\fR" 4
|
| 8015 |
|
|
.IX Item "-macc-8"
|
| 8016 |
|
|
Use all eight media accumulator registers.
|
| 8017 |
|
|
.IP "\fB\-mpack\fR" 4
|
| 8018 |
|
|
.IX Item "-mpack"
|
| 8019 |
|
|
Pack \s-1VLIW\s0 instructions.
|
| 8020 |
|
|
.IP "\fB\-mno\-pack\fR" 4
|
| 8021 |
|
|
.IX Item "-mno-pack"
|
| 8022 |
|
|
Do not pack \s-1VLIW\s0 instructions.
|
| 8023 |
|
|
.IP "\fB\-mno\-eflags\fR" 4
|
| 8024 |
|
|
.IX Item "-mno-eflags"
|
| 8025 |
|
|
Do not mark \s-1ABI\s0 switches in e_flags.
|
| 8026 |
|
|
.IP "\fB\-mcond\-move\fR" 4
|
| 8027 |
|
|
.IX Item "-mcond-move"
|
| 8028 |
|
|
Enable the use of conditional-move instructions (default).
|
| 8029 |
|
|
.Sp
|
| 8030 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8031 |
|
|
in a future version.
|
| 8032 |
|
|
.IP "\fB\-mno\-cond\-move\fR" 4
|
| 8033 |
|
|
.IX Item "-mno-cond-move"
|
| 8034 |
|
|
Disable the use of conditional-move instructions.
|
| 8035 |
|
|
.Sp
|
| 8036 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8037 |
|
|
in a future version.
|
| 8038 |
|
|
.IP "\fB\-mscc\fR" 4
|
| 8039 |
|
|
.IX Item "-mscc"
|
| 8040 |
|
|
Enable the use of conditional set instructions (default).
|
| 8041 |
|
|
.Sp
|
| 8042 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8043 |
|
|
in a future version.
|
| 8044 |
|
|
.IP "\fB\-mno\-scc\fR" 4
|
| 8045 |
|
|
.IX Item "-mno-scc"
|
| 8046 |
|
|
Disable the use of conditional set instructions.
|
| 8047 |
|
|
.Sp
|
| 8048 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8049 |
|
|
in a future version.
|
| 8050 |
|
|
.IP "\fB\-mcond\-exec\fR" 4
|
| 8051 |
|
|
.IX Item "-mcond-exec"
|
| 8052 |
|
|
Enable the use of conditional execution (default).
|
| 8053 |
|
|
.Sp
|
| 8054 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8055 |
|
|
in a future version.
|
| 8056 |
|
|
.IP "\fB\-mno\-cond\-exec\fR" 4
|
| 8057 |
|
|
.IX Item "-mno-cond-exec"
|
| 8058 |
|
|
Disable the use of conditional execution.
|
| 8059 |
|
|
.Sp
|
| 8060 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8061 |
|
|
in a future version.
|
| 8062 |
|
|
.IP "\fB\-mvliw\-branch\fR" 4
|
| 8063 |
|
|
.IX Item "-mvliw-branch"
|
| 8064 |
|
|
Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
|
| 8065 |
|
|
.Sp
|
| 8066 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8067 |
|
|
in a future version.
|
| 8068 |
|
|
.IP "\fB\-mno\-vliw\-branch\fR" 4
|
| 8069 |
|
|
.IX Item "-mno-vliw-branch"
|
| 8070 |
|
|
Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
|
| 8071 |
|
|
.Sp
|
| 8072 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8073 |
|
|
in a future version.
|
| 8074 |
|
|
.IP "\fB\-mmulti\-cond\-exec\fR" 4
|
| 8075 |
|
|
.IX Item "-mmulti-cond-exec"
|
| 8076 |
|
|
Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
|
| 8077 |
|
|
(default).
|
| 8078 |
|
|
.Sp
|
| 8079 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8080 |
|
|
in a future version.
|
| 8081 |
|
|
.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
|
| 8082 |
|
|
.IX Item "-mno-multi-cond-exec"
|
| 8083 |
|
|
Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
|
| 8084 |
|
|
.Sp
|
| 8085 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8086 |
|
|
in a future version.
|
| 8087 |
|
|
.IP "\fB\-mnested\-cond\-exec\fR" 4
|
| 8088 |
|
|
.IX Item "-mnested-cond-exec"
|
| 8089 |
|
|
Enable nested conditional execution optimizations (default).
|
| 8090 |
|
|
.Sp
|
| 8091 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8092 |
|
|
in a future version.
|
| 8093 |
|
|
.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
|
| 8094 |
|
|
.IX Item "-mno-nested-cond-exec"
|
| 8095 |
|
|
Disable nested conditional execution optimizations.
|
| 8096 |
|
|
.Sp
|
| 8097 |
|
|
This switch is mainly for debugging the compiler and will likely be removed
|
| 8098 |
|
|
in a future version.
|
| 8099 |
|
|
.IP "\fB\-moptimize\-membar\fR" 4
|
| 8100 |
|
|
.IX Item "-moptimize-membar"
|
| 8101 |
|
|
This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
|
| 8102 |
|
|
compiler generated code. It is enabled by default.
|
| 8103 |
|
|
.IP "\fB\-mno\-optimize\-membar\fR" 4
|
| 8104 |
|
|
.IX Item "-mno-optimize-membar"
|
| 8105 |
|
|
This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
|
| 8106 |
|
|
instructions from the generated code.
|
| 8107 |
|
|
.IP "\fB\-mtomcat\-stats\fR" 4
|
| 8108 |
|
|
.IX Item "-mtomcat-stats"
|
| 8109 |
|
|
Cause gas to print out tomcat statistics.
|
| 8110 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
|
| 8111 |
|
|
.IX Item "-mcpu=cpu"
|
| 8112 |
|
|
Select the processor type for which to generate code. Possible values are
|
| 8113 |
|
|
\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
|
| 8114 |
|
|
\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
|
| 8115 |
|
|
.PP
|
| 8116 |
|
|
\fIH8/300 Options\fR
|
| 8117 |
|
|
.IX Subsection "H8/300 Options"
|
| 8118 |
|
|
.PP
|
| 8119 |
|
|
These \fB\-m\fR options are defined for the H8/300 implementations:
|
| 8120 |
|
|
.IP "\fB\-mrelax\fR" 4
|
| 8121 |
|
|
.IX Item "-mrelax"
|
| 8122 |
|
|
Shorten some address references at link time, when possible; uses the
|
| 8123 |
|
|
linker option \fB\-relax\fR.
|
| 8124 |
|
|
.IP "\fB\-mh\fR" 4
|
| 8125 |
|
|
.IX Item "-mh"
|
| 8126 |
|
|
Generate code for the H8/300H.
|
| 8127 |
|
|
.IP "\fB\-ms\fR" 4
|
| 8128 |
|
|
.IX Item "-ms"
|
| 8129 |
|
|
Generate code for the H8S.
|
| 8130 |
|
|
.IP "\fB\-mn\fR" 4
|
| 8131 |
|
|
.IX Item "-mn"
|
| 8132 |
|
|
Generate code for the H8S and H8/300H in the normal mode. This switch
|
| 8133 |
|
|
must be used either with \fB\-mh\fR or \fB\-ms\fR.
|
| 8134 |
|
|
.IP "\fB\-ms2600\fR" 4
|
| 8135 |
|
|
.IX Item "-ms2600"
|
| 8136 |
|
|
Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
|
| 8137 |
|
|
.IP "\fB\-mint32\fR" 4
|
| 8138 |
|
|
.IX Item "-mint32"
|
| 8139 |
|
|
Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
|
| 8140 |
|
|
.IP "\fB\-malign\-300\fR" 4
|
| 8141 |
|
|
.IX Item "-malign-300"
|
| 8142 |
|
|
On the H8/300H and H8S, use the same alignment rules as for the H8/300.
|
| 8143 |
|
|
The default for the H8/300H and H8S is to align longs and floats on 4
|
| 8144 |
|
|
byte boundaries.
|
| 8145 |
|
|
\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
|
| 8146 |
|
|
This option has no effect on the H8/300.
|
| 8147 |
|
|
.PP
|
| 8148 |
|
|
\fI\s-1HPPA\s0 Options\fR
|
| 8149 |
|
|
.IX Subsection "HPPA Options"
|
| 8150 |
|
|
.PP
|
| 8151 |
|
|
These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
|
| 8152 |
|
|
.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
|
| 8153 |
|
|
.IX Item "-march=architecture-type"
|
| 8154 |
|
|
Generate code for the specified architecture. The choices for
|
| 8155 |
|
|
\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
|
| 8156 |
|
|
1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
|
| 8157 |
|
|
\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
|
| 8158 |
|
|
architecture option for your machine. Code compiled for lower numbered
|
| 8159 |
|
|
architectures will run on higher numbered architectures, but not the
|
| 8160 |
|
|
other way around.
|
| 8161 |
|
|
.IP "\fB\-mpa\-risc\-1\-0\fR" 4
|
| 8162 |
|
|
.IX Item "-mpa-risc-1-0"
|
| 8163 |
|
|
.PD 0
|
| 8164 |
|
|
.IP "\fB\-mpa\-risc\-1\-1\fR" 4
|
| 8165 |
|
|
.IX Item "-mpa-risc-1-1"
|
| 8166 |
|
|
.IP "\fB\-mpa\-risc\-2\-0\fR" 4
|
| 8167 |
|
|
.IX Item "-mpa-risc-2-0"
|
| 8168 |
|
|
.PD
|
| 8169 |
|
|
Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
|
| 8170 |
|
|
.IP "\fB\-mbig\-switch\fR" 4
|
| 8171 |
|
|
.IX Item "-mbig-switch"
|
| 8172 |
|
|
Generate code suitable for big switch tables. Use this option only if
|
| 8173 |
|
|
the assembler/linker complain about out of range branches within a switch
|
| 8174 |
|
|
table.
|
| 8175 |
|
|
.IP "\fB\-mjump\-in\-delay\fR" 4
|
| 8176 |
|
|
.IX Item "-mjump-in-delay"
|
| 8177 |
|
|
Fill delay slots of function calls with unconditional jump instructions
|
| 8178 |
|
|
by modifying the return pointer for the function call to be the target
|
| 8179 |
|
|
of the conditional jump.
|
| 8180 |
|
|
.IP "\fB\-mdisable\-fpregs\fR" 4
|
| 8181 |
|
|
.IX Item "-mdisable-fpregs"
|
| 8182 |
|
|
Prevent floating point registers from being used in any manner. This is
|
| 8183 |
|
|
necessary for compiling kernels which perform lazy context switching of
|
| 8184 |
|
|
floating point registers. If you use this option and attempt to perform
|
| 8185 |
|
|
floating point operations, the compiler will abort.
|
| 8186 |
|
|
.IP "\fB\-mdisable\-indexing\fR" 4
|
| 8187 |
|
|
.IX Item "-mdisable-indexing"
|
| 8188 |
|
|
Prevent the compiler from using indexing address modes. This avoids some
|
| 8189 |
|
|
rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
|
| 8190 |
|
|
.IP "\fB\-mno\-space\-regs\fR" 4
|
| 8191 |
|
|
.IX Item "-mno-space-regs"
|
| 8192 |
|
|
Generate code that assumes the target has no space registers. This allows
|
| 8193 |
|
|
\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
|
| 8194 |
|
|
.Sp
|
| 8195 |
|
|
Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
|
| 8196 |
|
|
.IP "\fB\-mfast\-indirect\-calls\fR" 4
|
| 8197 |
|
|
.IX Item "-mfast-indirect-calls"
|
| 8198 |
|
|
Generate code that assumes calls never cross space boundaries. This
|
| 8199 |
|
|
allows \s-1GCC\s0 to emit code which performs faster indirect calls.
|
| 8200 |
|
|
.Sp
|
| 8201 |
|
|
This option will not work in the presence of shared libraries or nested
|
| 8202 |
|
|
functions.
|
| 8203 |
|
|
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
|
| 8204 |
|
|
.IX Item "-mfixed-range=register-range"
|
| 8205 |
|
|
Generate code treating the given register range as fixed registers.
|
| 8206 |
|
|
A fixed register is one that the register allocator can not use. This is
|
| 8207 |
|
|
useful when compiling kernel code. A register range is specified as
|
| 8208 |
|
|
two registers separated by a dash. Multiple register ranges can be
|
| 8209 |
|
|
specified separated by a comma.
|
| 8210 |
|
|
.IP "\fB\-mlong\-load\-store\fR" 4
|
| 8211 |
|
|
.IX Item "-mlong-load-store"
|
| 8212 |
|
|
Generate 3\-instruction load and store sequences as sometimes required by
|
| 8213 |
|
|
the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
|
| 8214 |
|
|
the \s-1HP\s0 compilers.
|
| 8215 |
|
|
.IP "\fB\-mportable\-runtime\fR" 4
|
| 8216 |
|
|
.IX Item "-mportable-runtime"
|
| 8217 |
|
|
Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
|
| 8218 |
|
|
.IP "\fB\-mgas\fR" 4
|
| 8219 |
|
|
.IX Item "-mgas"
|
| 8220 |
|
|
Enable the use of assembler directives only \s-1GAS\s0 understands.
|
| 8221 |
|
|
.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
|
| 8222 |
|
|
.IX Item "-mschedule=cpu-type"
|
| 8223 |
|
|
Schedule code according to the constraints for the machine type
|
| 8224 |
|
|
\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
|
| 8225 |
|
|
\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
|
| 8226 |
|
|
to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
|
| 8227 |
|
|
proper scheduling option for your machine. The default scheduling is
|
| 8228 |
|
|
\&\fB8000\fR.
|
| 8229 |
|
|
.IP "\fB\-mlinker\-opt\fR" 4
|
| 8230 |
|
|
.IX Item "-mlinker-opt"
|
| 8231 |
|
|
Enable the optimization pass in the HP-UX linker. Note this makes symbolic
|
| 8232 |
|
|
debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
|
| 8233 |
|
|
linkers in which they give bogus error messages when linking some programs.
|
| 8234 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 8235 |
|
|
.IX Item "-msoft-float"
|
| 8236 |
|
|
Generate output containing library calls for floating point.
|
| 8237 |
|
|
\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
|
| 8238 |
|
|
targets. Normally the facilities of the machine's usual C compiler are
|
| 8239 |
|
|
used, but this cannot be done directly in cross\-compilation. You must make
|
| 8240 |
|
|
your own arrangements to provide suitable library functions for
|
| 8241 |
|
|
cross\-compilation. The embedded target \fBhppa1.1\-*\-pro\fR
|
| 8242 |
|
|
does provide software floating point support.
|
| 8243 |
|
|
.Sp
|
| 8244 |
|
|
\&\fB\-msoft\-float\fR changes the calling convention in the output file;
|
| 8245 |
|
|
therefore, it is only useful if you compile \fIall\fR of a program with
|
| 8246 |
|
|
this option. In particular, you need to compile \fIlibgcc.a\fR, the
|
| 8247 |
|
|
library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
|
| 8248 |
|
|
this to work.
|
| 8249 |
|
|
.IP "\fB\-msio\fR" 4
|
| 8250 |
|
|
.IX Item "-msio"
|
| 8251 |
|
|
Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
|
| 8252 |
|
|
\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
|
| 8253 |
|
|
\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
|
| 8254 |
|
|
options are available under HP-UX and \s-1HI\-UX\s0.
|
| 8255 |
|
|
.IP "\fB\-mgnu\-ld\fR" 4
|
| 8256 |
|
|
.IX Item "-mgnu-ld"
|
| 8257 |
|
|
Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
|
| 8258 |
|
|
building a shared library. It is the default when \s-1GCC\s0 is configured,
|
| 8259 |
|
|
explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
|
| 8260 |
|
|
have any affect on which ld is called, it only changes what parameters
|
| 8261 |
|
|
are passed to that ld. The ld that is called is determined by the
|
| 8262 |
|
|
\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
|
| 8263 |
|
|
finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
|
| 8264 |
|
|
using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
|
| 8265 |
|
|
on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
|
| 8266 |
|
|
.IP "\fB\-mhp\-ld\fR" 4
|
| 8267 |
|
|
.IX Item "-mhp-ld"
|
| 8268 |
|
|
Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
|
| 8269 |
|
|
a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
|
| 8270 |
|
|
links. It is the default when \s-1GCC\s0 is configured, explicitly or
|
| 8271 |
|
|
implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
|
| 8272 |
|
|
which ld is called, it only changes what parameters are passed to that
|
| 8273 |
|
|
ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
|
| 8274 |
|
|
configure option, \s-1GCC\s0's program search path, and finally by the user's
|
| 8275 |
|
|
\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
|
| 8276 |
|
|
`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
|
| 8277 |
|
|
HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
|
| 8278 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 8279 |
|
|
.IX Item "-mlong-calls"
|
| 8280 |
|
|
Generate code that uses long call sequences. This ensures that a call
|
| 8281 |
|
|
is always able to reach linker generated stubs. The default is to generate
|
| 8282 |
|
|
long calls only when the distance from the call site to the beginning
|
| 8283 |
|
|
of the function or translation unit, as the case may be, exceeds a
|
| 8284 |
|
|
predefined limit set by the branch type being used. The limits for
|
| 8285 |
|
|
normal calls are 7,600,000 and 240,000 bytes, respectively for the
|
| 8286 |
|
|
\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
|
| 8287 |
|
|
240,000 bytes.
|
| 8288 |
|
|
.Sp
|
| 8289 |
|
|
Distances are measured from the beginning of functions when using the
|
| 8290 |
|
|
\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
|
| 8291 |
|
|
and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
|
| 8292 |
|
|
the \s-1SOM\s0 linker.
|
| 8293 |
|
|
.Sp
|
| 8294 |
|
|
It is normally not desirable to use this option as it will degrade
|
| 8295 |
|
|
performance. However, it may be useful in large applications,
|
| 8296 |
|
|
particularly when partial linking is used to build the application.
|
| 8297 |
|
|
.Sp
|
| 8298 |
|
|
The types of long calls used depends on the capabilities of the
|
| 8299 |
|
|
assembler and linker, and the type of code being generated. The
|
| 8300 |
|
|
impact on systems that support long absolute calls, and long pic
|
| 8301 |
|
|
symbol-difference or pc-relative calls should be relatively small.
|
| 8302 |
|
|
However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
|
| 8303 |
|
|
and it is quite long.
|
| 8304 |
|
|
.IP "\fB\-munix=\fR\fIunix-std\fR" 4
|
| 8305 |
|
|
.IX Item "-munix=unix-std"
|
| 8306 |
|
|
Generate compiler predefines and select a startfile for the specified
|
| 8307 |
|
|
\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
|
| 8308 |
|
|
and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
|
| 8309 |
|
|
is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
|
| 8310 |
|
|
11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
|
| 8311 |
|
|
\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
|
| 8312 |
|
|
and later.
|
| 8313 |
|
|
.Sp
|
| 8314 |
|
|
\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
|
| 8315 |
|
|
\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
|
| 8316 |
|
|
and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
|
| 8317 |
|
|
\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
|
| 8318 |
|
|
\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
|
| 8319 |
|
|
\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
|
| 8320 |
|
|
.Sp
|
| 8321 |
|
|
It is \fIimportant\fR to note that this option changes the interfaces
|
| 8322 |
|
|
for various library routines. It also affects the operational behavior
|
| 8323 |
|
|
of the C library. Thus, \fIextreme\fR care is needed in using this
|
| 8324 |
|
|
option.
|
| 8325 |
|
|
.Sp
|
| 8326 |
|
|
Library code that is intended to operate with more than one \s-1UNIX\s0
|
| 8327 |
|
|
standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
|
| 8328 |
|
|
as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
|
| 8329 |
|
|
.IP "\fB\-nolibdld\fR" 4
|
| 8330 |
|
|
.IX Item "-nolibdld"
|
| 8331 |
|
|
Suppress the generation of link options to search libdld.sl when the
|
| 8332 |
|
|
\&\fB\-static\fR option is specified on HP-UX 10 and later.
|
| 8333 |
|
|
.IP "\fB\-static\fR" 4
|
| 8334 |
|
|
.IX Item "-static"
|
| 8335 |
|
|
The HP-UX implementation of setlocale in libc has a dependency on
|
| 8336 |
|
|
libdld.sl. There isn't an archive version of libdld.sl. Thus,
|
| 8337 |
|
|
when the \fB\-static\fR option is specified, special link options
|
| 8338 |
|
|
are needed to resolve this dependency.
|
| 8339 |
|
|
.Sp
|
| 8340 |
|
|
On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
|
| 8341 |
|
|
link with libdld.sl when the \fB\-static\fR option is specified.
|
| 8342 |
|
|
This causes the resulting binary to be dynamic. On the 64\-bit port,
|
| 8343 |
|
|
the linkers generate dynamic binaries by default in any case. The
|
| 8344 |
|
|
\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
|
| 8345 |
|
|
adding these link options.
|
| 8346 |
|
|
.IP "\fB\-threads\fR" 4
|
| 8347 |
|
|
.IX Item "-threads"
|
| 8348 |
|
|
Add support for multithreading with the \fIdce thread\fR library
|
| 8349 |
|
|
under \s-1HP\-UX\s0. This option sets flags for both the preprocessor and
|
| 8350 |
|
|
linker.
|
| 8351 |
|
|
.PP
|
| 8352 |
|
|
\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
|
| 8353 |
|
|
.IX Subsection "Intel 386 and AMD x86-64 Options"
|
| 8354 |
|
|
.PP
|
| 8355 |
|
|
These \fB\-m\fR options are defined for the i386 and x86\-64 family of
|
| 8356 |
|
|
computers:
|
| 8357 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
| 8358 |
|
|
.IX Item "-mtune=cpu-type"
|
| 8359 |
|
|
Tune to \fIcpu-type\fR everything applicable about the generated code, except
|
| 8360 |
|
|
for the \s-1ABI\s0 and the set of available instructions. The choices for
|
| 8361 |
|
|
\&\fIcpu-type\fR are:
|
| 8362 |
|
|
.RS 4
|
| 8363 |
|
|
.IP "\fIi386\fR" 4
|
| 8364 |
|
|
.IX Item "i386"
|
| 8365 |
|
|
Original Intel's i386 \s-1CPU\s0.
|
| 8366 |
|
|
.IP "\fIi486\fR" 4
|
| 8367 |
|
|
.IX Item "i486"
|
| 8368 |
|
|
Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
|
| 8369 |
|
|
.IP "\fIi586, pentium\fR" 4
|
| 8370 |
|
|
.IX Item "i586, pentium"
|
| 8371 |
|
|
Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
|
| 8372 |
|
|
.IP "\fIpentium-mmx\fR" 4
|
| 8373 |
|
|
.IX Item "pentium-mmx"
|
| 8374 |
|
|
Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
|
| 8375 |
|
|
.IP "\fIi686, pentiumpro\fR" 4
|
| 8376 |
|
|
.IX Item "i686, pentiumpro"
|
| 8377 |
|
|
Intel PentiumPro \s-1CPU\s0.
|
| 8378 |
|
|
.IP "\fIpentium2\fR" 4
|
| 8379 |
|
|
.IX Item "pentium2"
|
| 8380 |
|
|
Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
|
| 8381 |
|
|
.IP "\fIpentium3, pentium3m\fR" 4
|
| 8382 |
|
|
.IX Item "pentium3, pentium3m"
|
| 8383 |
|
|
Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
|
| 8384 |
|
|
support.
|
| 8385 |
|
|
.IP "\fIpentium-m\fR" 4
|
| 8386 |
|
|
.IX Item "pentium-m"
|
| 8387 |
|
|
Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
|
| 8388 |
|
|
support. Used by Centrino notebooks.
|
| 8389 |
|
|
.IP "\fIpentium4, pentium4m\fR" 4
|
| 8390 |
|
|
.IX Item "pentium4, pentium4m"
|
| 8391 |
|
|
Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
|
| 8392 |
|
|
.IP "\fIprescott\fR" 4
|
| 8393 |
|
|
.IX Item "prescott"
|
| 8394 |
|
|
Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
|
| 8395 |
|
|
set support.
|
| 8396 |
|
|
.IP "\fInocona\fR" 4
|
| 8397 |
|
|
.IX Item "nocona"
|
| 8398 |
|
|
Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
|
| 8399 |
|
|
\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
|
| 8400 |
|
|
.IP "\fIk6\fR" 4
|
| 8401 |
|
|
.IX Item "k6"
|
| 8402 |
|
|
\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
|
| 8403 |
|
|
.IP "\fIk6\-2, k6\-3\fR" 4
|
| 8404 |
|
|
.IX Item "k6-2, k6-3"
|
| 8405 |
|
|
Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
|
| 8406 |
|
|
.IP "\fIathlon, athlon-tbird\fR" 4
|
| 8407 |
|
|
.IX Item "athlon, athlon-tbird"
|
| 8408 |
|
|
\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
|
| 8409 |
|
|
support.
|
| 8410 |
|
|
.IP "\fIathlon\-4, athlon\-xp, athlon-mp\fR" 4
|
| 8411 |
|
|
.IX Item "athlon-4, athlon-xp, athlon-mp"
|
| 8412 |
|
|
Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
|
| 8413 |
|
|
instruction set support.
|
| 8414 |
|
|
.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
|
| 8415 |
|
|
.IX Item "k8, opteron, athlon64, athlon-fx"
|
| 8416 |
|
|
\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
|
| 8417 |
|
|
\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
|
| 8418 |
|
|
.IP "\fIwinchip\-c6\fR" 4
|
| 8419 |
|
|
.IX Item "winchip-c6"
|
| 8420 |
|
|
\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
|
| 8421 |
|
|
set support.
|
| 8422 |
|
|
.IP "\fIwinchip2\fR" 4
|
| 8423 |
|
|
.IX Item "winchip2"
|
| 8424 |
|
|
\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
|
| 8425 |
|
|
instruction set support.
|
| 8426 |
|
|
.IP "\fIc3\fR" 4
|
| 8427 |
|
|
.IX Item "c3"
|
| 8428 |
|
|
Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
|
| 8429 |
|
|
implemented for this chip.)
|
| 8430 |
|
|
.IP "\fIc3\-2\fR" 4
|
| 8431 |
|
|
.IX Item "c3-2"
|
| 8432 |
|
|
Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
|
| 8433 |
|
|
implemented for this chip.)
|
| 8434 |
|
|
.RE
|
| 8435 |
|
|
.RS 4
|
| 8436 |
|
|
.Sp
|
| 8437 |
|
|
While picking a specific \fIcpu-type\fR will schedule things appropriately
|
| 8438 |
|
|
for that particular chip, the compiler will not generate any code that
|
| 8439 |
|
|
does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
|
| 8440 |
|
|
being used.
|
| 8441 |
|
|
.RE
|
| 8442 |
|
|
.IP "\fB\-march=\fR\fIcpu-type\fR" 4
|
| 8443 |
|
|
.IX Item "-march=cpu-type"
|
| 8444 |
|
|
Generate instructions for the machine type \fIcpu-type\fR. The choices
|
| 8445 |
|
|
for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
|
| 8446 |
|
|
specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
|
| 8447 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
|
| 8448 |
|
|
.IX Item "-mcpu=cpu-type"
|
| 8449 |
|
|
A deprecated synonym for \fB\-mtune\fR.
|
| 8450 |
|
|
.IP "\fB\-m386\fR" 4
|
| 8451 |
|
|
.IX Item "-m386"
|
| 8452 |
|
|
.PD 0
|
| 8453 |
|
|
.IP "\fB\-m486\fR" 4
|
| 8454 |
|
|
.IX Item "-m486"
|
| 8455 |
|
|
.IP "\fB\-mpentium\fR" 4
|
| 8456 |
|
|
.IX Item "-mpentium"
|
| 8457 |
|
|
.IP "\fB\-mpentiumpro\fR" 4
|
| 8458 |
|
|
.IX Item "-mpentiumpro"
|
| 8459 |
|
|
.PD
|
| 8460 |
|
|
These options are synonyms for \fB\-mtune=i386\fR, \fB\-mtune=i486\fR,
|
| 8461 |
|
|
\&\fB\-mtune=pentium\fR, and \fB\-mtune=pentiumpro\fR respectively.
|
| 8462 |
|
|
These synonyms are deprecated.
|
| 8463 |
|
|
.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
|
| 8464 |
|
|
.IX Item "-mfpmath=unit"
|
| 8465 |
|
|
Generate floating point arithmetics for selected unit \fIunit\fR. The choices
|
| 8466 |
|
|
for \fIunit\fR are:
|
| 8467 |
|
|
.RS 4
|
| 8468 |
|
|
.IP "\fB387\fR" 4
|
| 8469 |
|
|
.IX Item "387"
|
| 8470 |
|
|
Use the standard 387 floating point coprocessor present majority of chips and
|
| 8471 |
|
|
emulated otherwise. Code compiled with this option will run almost everywhere.
|
| 8472 |
|
|
The temporary results are computed in 80bit precision instead of precision
|
| 8473 |
|
|
specified by the type resulting in slightly different results compared to most
|
| 8474 |
|
|
of other chips. See \fB\-ffloat\-store\fR for more detailed description.
|
| 8475 |
|
|
.Sp
|
| 8476 |
|
|
This is the default choice for i386 compiler.
|
| 8477 |
|
|
.IP "\fBsse\fR" 4
|
| 8478 |
|
|
.IX Item "sse"
|
| 8479 |
|
|
Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
|
| 8480 |
|
|
This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
|
| 8481 |
|
|
by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
|
| 8482 |
|
|
instruction set supports only single precision arithmetics, thus the double and
|
| 8483 |
|
|
extended precision arithmetics is still done using 387. Later version, present
|
| 8484 |
|
|
only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
|
| 8485 |
|
|
arithmetics too.
|
| 8486 |
|
|
.Sp
|
| 8487 |
|
|
For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
|
| 8488 |
|
|
or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
|
| 8489 |
|
|
effective. For the x86\-64 compiler, these extensions are enabled by default.
|
| 8490 |
|
|
.Sp
|
| 8491 |
|
|
The resulting code should be considerably faster in the majority of cases and avoid
|
| 8492 |
|
|
the numerical instability problems of 387 code, but may break some existing
|
| 8493 |
|
|
code that expects temporaries to be 80bit.
|
| 8494 |
|
|
.Sp
|
| 8495 |
|
|
This is the default choice for the x86\-64 compiler.
|
| 8496 |
|
|
.IP "\fBsse,387\fR" 4
|
| 8497 |
|
|
.IX Item "sse,387"
|
| 8498 |
|
|
Attempt to utilize both instruction sets at once. This effectively double the
|
| 8499 |
|
|
amount of available registers and on chips with separate execution units for
|
| 8500 |
|
|
387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
|
| 8501 |
|
|
still experimental, because the \s-1GCC\s0 register allocator does not model separate
|
| 8502 |
|
|
functional units well resulting in instable performance.
|
| 8503 |
|
|
.RE
|
| 8504 |
|
|
.RS 4
|
| 8505 |
|
|
.RE
|
| 8506 |
|
|
.IP "\fB\-masm=\fR\fIdialect\fR" 4
|
| 8507 |
|
|
.IX Item "-masm=dialect"
|
| 8508 |
|
|
Output asm instructions using selected \fIdialect\fR. Supported
|
| 8509 |
|
|
choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
|
| 8510 |
|
|
not support \fBintel\fR.
|
| 8511 |
|
|
.IP "\fB\-mieee\-fp\fR" 4
|
| 8512 |
|
|
.IX Item "-mieee-fp"
|
| 8513 |
|
|
.PD 0
|
| 8514 |
|
|
.IP "\fB\-mno\-ieee\-fp\fR" 4
|
| 8515 |
|
|
.IX Item "-mno-ieee-fp"
|
| 8516 |
|
|
.PD
|
| 8517 |
|
|
Control whether or not the compiler uses \s-1IEEE\s0 floating point
|
| 8518 |
|
|
comparisons. These handle correctly the case where the result of a
|
| 8519 |
|
|
comparison is unordered.
|
| 8520 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 8521 |
|
|
.IX Item "-msoft-float"
|
| 8522 |
|
|
Generate output containing library calls for floating point.
|
| 8523 |
|
|
\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
|
| 8524 |
|
|
Normally the facilities of the machine's usual C compiler are used, but
|
| 8525 |
|
|
this can't be done directly in cross\-compilation. You must make your
|
| 8526 |
|
|
own arrangements to provide suitable library functions for
|
| 8527 |
|
|
cross\-compilation.
|
| 8528 |
|
|
.Sp
|
| 8529 |
|
|
On machines where a function returns floating point results in the 80387
|
| 8530 |
|
|
register stack, some floating point opcodes may be emitted even if
|
| 8531 |
|
|
\&\fB\-msoft\-float\fR is used.
|
| 8532 |
|
|
.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
|
| 8533 |
|
|
.IX Item "-mno-fp-ret-in-387"
|
| 8534 |
|
|
Do not use the \s-1FPU\s0 registers for return values of functions.
|
| 8535 |
|
|
.Sp
|
| 8536 |
|
|
The usual calling convention has functions return values of types
|
| 8537 |
|
|
\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
|
| 8538 |
|
|
is no \s-1FPU\s0. The idea is that the operating system should emulate
|
| 8539 |
|
|
an \s-1FPU\s0.
|
| 8540 |
|
|
.Sp
|
| 8541 |
|
|
The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
|
| 8542 |
|
|
in ordinary \s-1CPU\s0 registers instead.
|
| 8543 |
|
|
.IP "\fB\-mno\-fancy\-math\-387\fR" 4
|
| 8544 |
|
|
.IX Item "-mno-fancy-math-387"
|
| 8545 |
|
|
Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
|
| 8546 |
|
|
\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
|
| 8547 |
|
|
generating those instructions. This option is the default on FreeBSD,
|
| 8548 |
|
|
OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
|
| 8549 |
|
|
indicates that the target cpu will always have an \s-1FPU\s0 and so the
|
| 8550 |
|
|
instruction will not need emulation. As of revision 2.6.1, these
|
| 8551 |
|
|
instructions are not generated unless you also use the
|
| 8552 |
|
|
\&\fB\-funsafe\-math\-optimizations\fR switch.
|
| 8553 |
|
|
.IP "\fB\-malign\-double\fR" 4
|
| 8554 |
|
|
.IX Item "-malign-double"
|
| 8555 |
|
|
.PD 0
|
| 8556 |
|
|
.IP "\fB\-mno\-align\-double\fR" 4
|
| 8557 |
|
|
.IX Item "-mno-align-double"
|
| 8558 |
|
|
.PD
|
| 8559 |
|
|
Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
|
| 8560 |
|
|
\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
|
| 8561 |
|
|
boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
|
| 8562 |
|
|
produce code that runs somewhat faster on a \fBPentium\fR at the
|
| 8563 |
|
|
expense of more memory.
|
| 8564 |
|
|
.Sp
|
| 8565 |
|
|
\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
|
| 8566 |
|
|
structures containing the above types will be aligned differently than
|
| 8567 |
|
|
the published application binary interface specifications for the 386
|
| 8568 |
|
|
and will not be binary compatible with structures in code compiled
|
| 8569 |
|
|
without that switch.
|
| 8570 |
|
|
.IP "\fB\-m96bit\-long\-double\fR" 4
|
| 8571 |
|
|
.IX Item "-m96bit-long-double"
|
| 8572 |
|
|
.PD 0
|
| 8573 |
|
|
.IP "\fB\-m128bit\-long\-double\fR" 4
|
| 8574 |
|
|
.IX Item "-m128bit-long-double"
|
| 8575 |
|
|
.PD
|
| 8576 |
|
|
These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
|
| 8577 |
|
|
application binary interface specifies the size to be 96 bits,
|
| 8578 |
|
|
so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
|
| 8579 |
|
|
.Sp
|
| 8580 |
|
|
Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
|
| 8581 |
|
|
to be aligned to an 8 or 16 byte boundary. In arrays or structures
|
| 8582 |
|
|
conforming to the \s-1ABI\s0, this would not be possible. So specifying a
|
| 8583 |
|
|
\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
|
| 8584 |
|
|
to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
|
| 8585 |
|
|
32 bit zero.
|
| 8586 |
|
|
.Sp
|
| 8587 |
|
|
In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
|
| 8588 |
|
|
its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
|
| 8589 |
|
|
.Sp
|
| 8590 |
|
|
Notice that neither of these options enable any extra precision over the x87
|
| 8591 |
|
|
standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
|
| 8592 |
|
|
.Sp
|
| 8593 |
|
|
\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
|
| 8594 |
|
|
structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
|
| 8595 |
|
|
their size as well as function calling convention for function taking
|
| 8596 |
|
|
\&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
|
| 8597 |
|
|
compatible with arrays or structures in code compiled without that switch.
|
| 8598 |
|
|
.IP "\fB\-mmlarge\-data\-threshold=\fR\fInumber\fR" 4
|
| 8599 |
|
|
.IX Item "-mmlarge-data-threshold=number"
|
| 8600 |
|
|
When \fB\-mcmodel=medium\fR is specified, the data greater than
|
| 8601 |
|
|
\&\fIthreshold\fR are placed in large data section. This value must be the
|
| 8602 |
|
|
same across all object linked into the binary and defaults to 65535.
|
| 8603 |
|
|
.IP "\fB\-msvr3\-shlib\fR" 4
|
| 8604 |
|
|
.IX Item "-msvr3-shlib"
|
| 8605 |
|
|
.PD 0
|
| 8606 |
|
|
.IP "\fB\-mno\-svr3\-shlib\fR" 4
|
| 8607 |
|
|
.IX Item "-mno-svr3-shlib"
|
| 8608 |
|
|
.PD
|
| 8609 |
|
|
Control whether \s-1GCC\s0 places uninitialized local variables into the
|
| 8610 |
|
|
\&\f(CW\*(C`bss\*(C'\fR or \f(CW\*(C`data\*(C'\fR segments. \fB\-msvr3\-shlib\fR places them
|
| 8611 |
|
|
into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3.
|
| 8612 |
|
|
.IP "\fB\-mrtd\fR" 4
|
| 8613 |
|
|
.IX Item "-mrtd"
|
| 8614 |
|
|
Use a different function-calling convention, in which functions that
|
| 8615 |
|
|
take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
|
| 8616 |
|
|
instruction, which pops their arguments while returning. This saves one
|
| 8617 |
|
|
instruction in the caller since there is no need to pop the arguments
|
| 8618 |
|
|
there.
|
| 8619 |
|
|
.Sp
|
| 8620 |
|
|
You can specify that an individual function is called with this calling
|
| 8621 |
|
|
sequence with the function attribute \fBstdcall\fR. You can also
|
| 8622 |
|
|
override the \fB\-mrtd\fR option by using the function attribute
|
| 8623 |
|
|
\&\fBcdecl\fR.
|
| 8624 |
|
|
.Sp
|
| 8625 |
|
|
\&\fBWarning:\fR this calling convention is incompatible with the one
|
| 8626 |
|
|
normally used on Unix, so you cannot use it if you need to call
|
| 8627 |
|
|
libraries compiled with the Unix compiler.
|
| 8628 |
|
|
.Sp
|
| 8629 |
|
|
Also, you must provide function prototypes for all functions that
|
| 8630 |
|
|
take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
|
| 8631 |
|
|
otherwise incorrect code will be generated for calls to those
|
| 8632 |
|
|
functions.
|
| 8633 |
|
|
.Sp
|
| 8634 |
|
|
In addition, seriously incorrect code will result if you call a
|
| 8635 |
|
|
function with too many arguments. (Normally, extra arguments are
|
| 8636 |
|
|
harmlessly ignored.)
|
| 8637 |
|
|
.IP "\fB\-mregparm=\fR\fInum\fR" 4
|
| 8638 |
|
|
.IX Item "-mregparm=num"
|
| 8639 |
|
|
Control how many registers are used to pass integer arguments. By
|
| 8640 |
|
|
default, no registers are used to pass arguments, and at most 3
|
| 8641 |
|
|
registers can be used. You can control this behavior for a specific
|
| 8642 |
|
|
function by using the function attribute \fBregparm\fR.
|
| 8643 |
|
|
.Sp
|
| 8644 |
|
|
\&\fBWarning:\fR if you use this switch, and
|
| 8645 |
|
|
\&\fInum\fR is nonzero, then you must build all modules with the same
|
| 8646 |
|
|
value, including any libraries. This includes the system libraries and
|
| 8647 |
|
|
startup modules.
|
| 8648 |
|
|
.IP "\fB\-msseregparm\fR" 4
|
| 8649 |
|
|
.IX Item "-msseregparm"
|
| 8650 |
|
|
Use \s-1SSE\s0 register passing conventions for float and double arguments
|
| 8651 |
|
|
and return values. You can control this behavior for a specific
|
| 8652 |
|
|
function by using the function attribute \fBsseregparm\fR.
|
| 8653 |
|
|
.Sp
|
| 8654 |
|
|
\&\fBWarning:\fR if you use this switch then you must build all
|
| 8655 |
|
|
modules with the same value, including any libraries. This includes
|
| 8656 |
|
|
the system libraries and startup modules.
|
| 8657 |
|
|
.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
|
| 8658 |
|
|
.IX Item "-mpreferred-stack-boundary=num"
|
| 8659 |
|
|
Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
|
| 8660 |
|
|
byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
|
| 8661 |
|
|
the default is 4 (16 bytes or 128 bits), except when optimizing for code
|
| 8662 |
|
|
size (\fB\-Os\fR), in which case the default is the minimum correct
|
| 8663 |
|
|
alignment (4 bytes for x86, and 8 bytes for x86\-64).
|
| 8664 |
|
|
.Sp
|
| 8665 |
|
|
On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
|
| 8666 |
|
|
should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
|
| 8667 |
|
|
suffer significant run time performance penalties. On Pentium \s-1III\s0, the
|
| 8668 |
|
|
Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR suffers similar
|
| 8669 |
|
|
penalties if it is not 16 byte aligned.
|
| 8670 |
|
|
.Sp
|
| 8671 |
|
|
To ensure proper alignment of this values on the stack, the stack boundary
|
| 8672 |
|
|
must be as aligned as that required by any value stored on the stack.
|
| 8673 |
|
|
Further, every function must be generated such that it keeps the stack
|
| 8674 |
|
|
aligned. Thus calling a function compiled with a higher preferred
|
| 8675 |
|
|
stack boundary from a function compiled with a lower preferred stack
|
| 8676 |
|
|
boundary will most likely misalign the stack. It is recommended that
|
| 8677 |
|
|
libraries that use callbacks always use the default setting.
|
| 8678 |
|
|
.Sp
|
| 8679 |
|
|
This extra alignment does consume extra stack space, and generally
|
| 8680 |
|
|
increases code size. Code that is sensitive to stack space usage, such
|
| 8681 |
|
|
as embedded systems and operating system kernels, may want to reduce the
|
| 8682 |
|
|
preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
|
| 8683 |
|
|
.IP "\fB\-mmmx\fR" 4
|
| 8684 |
|
|
.IX Item "-mmmx"
|
| 8685 |
|
|
.PD 0
|
| 8686 |
|
|
.IP "\fB\-mno\-mmx\fR" 4
|
| 8687 |
|
|
.IX Item "-mno-mmx"
|
| 8688 |
|
|
.IP "\fB\-msse\fR" 4
|
| 8689 |
|
|
.IX Item "-msse"
|
| 8690 |
|
|
.IP "\fB\-mno\-sse\fR" 4
|
| 8691 |
|
|
.IX Item "-mno-sse"
|
| 8692 |
|
|
.IP "\fB\-msse2\fR" 4
|
| 8693 |
|
|
.IX Item "-msse2"
|
| 8694 |
|
|
.IP "\fB\-mno\-sse2\fR" 4
|
| 8695 |
|
|
.IX Item "-mno-sse2"
|
| 8696 |
|
|
.IP "\fB\-msse3\fR" 4
|
| 8697 |
|
|
.IX Item "-msse3"
|
| 8698 |
|
|
.IP "\fB\-mno\-sse3\fR" 4
|
| 8699 |
|
|
.IX Item "-mno-sse3"
|
| 8700 |
|
|
.IP "\fB\-m3dnow\fR" 4
|
| 8701 |
|
|
.IX Item "-m3dnow"
|
| 8702 |
|
|
.IP "\fB\-mno\-3dnow\fR" 4
|
| 8703 |
|
|
.IX Item "-mno-3dnow"
|
| 8704 |
|
|
.PD
|
| 8705 |
|
|
These switches enable or disable the use of instructions in the \s-1MMX\s0,
|
| 8706 |
|
|
\&\s-1SSE\s0, \s-1SSE2\s0 or 3DNow! extended instruction sets. These extensions are
|
| 8707 |
|
|
also available as built-in functions: see \fBX86 Built-in Functions\fR,
|
| 8708 |
|
|
for details of the functions enabled and disabled by these switches.
|
| 8709 |
|
|
.Sp
|
| 8710 |
|
|
To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
|
| 8711 |
|
|
code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
|
| 8712 |
|
|
.Sp
|
| 8713 |
|
|
These options will enable \s-1GCC\s0 to use these extended instructions in
|
| 8714 |
|
|
generated code, even without \fB\-mfpmath=sse\fR. Applications which
|
| 8715 |
|
|
perform runtime \s-1CPU\s0 detection must compile separate files for each
|
| 8716 |
|
|
supported architecture, using the appropriate flags. In particular,
|
| 8717 |
|
|
the file containing the \s-1CPU\s0 detection code should be compiled without
|
| 8718 |
|
|
these options.
|
| 8719 |
|
|
.IP "\fB\-mpush\-args\fR" 4
|
| 8720 |
|
|
.IX Item "-mpush-args"
|
| 8721 |
|
|
.PD 0
|
| 8722 |
|
|
.IP "\fB\-mno\-push\-args\fR" 4
|
| 8723 |
|
|
.IX Item "-mno-push-args"
|
| 8724 |
|
|
.PD
|
| 8725 |
|
|
Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
|
| 8726 |
|
|
and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
|
| 8727 |
|
|
by default. In some cases disabling it may improve performance because of
|
| 8728 |
|
|
improved scheduling and reduced dependencies.
|
| 8729 |
|
|
.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
|
| 8730 |
|
|
.IX Item "-maccumulate-outgoing-args"
|
| 8731 |
|
|
If enabled, the maximum amount of space required for outgoing arguments will be
|
| 8732 |
|
|
computed in the function prologue. This is faster on most modern CPUs
|
| 8733 |
|
|
because of reduced dependencies, improved scheduling and reduced stack usage
|
| 8734 |
|
|
when preferred stack boundary is not equal to 2. The drawback is a notable
|
| 8735 |
|
|
increase in code size. This switch implies \fB\-mno\-push\-args\fR.
|
| 8736 |
|
|
.IP "\fB\-mthreads\fR" 4
|
| 8737 |
|
|
.IX Item "-mthreads"
|
| 8738 |
|
|
Support thread-safe exception handling on \fBMingw32\fR. Code that relies
|
| 8739 |
|
|
on thread-safe exception handling must compile and link all code with the
|
| 8740 |
|
|
\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
|
| 8741 |
|
|
\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
|
| 8742 |
|
|
\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
|
| 8743 |
|
|
.IP "\fB\-mno\-align\-stringops\fR" 4
|
| 8744 |
|
|
.IX Item "-mno-align-stringops"
|
| 8745 |
|
|
Do not align destination of inlined string operations. This switch reduces
|
| 8746 |
|
|
code size and improves performance in case the destination is already aligned,
|
| 8747 |
|
|
but \s-1GCC\s0 doesn't know about it.
|
| 8748 |
|
|
.IP "\fB\-minline\-all\-stringops\fR" 4
|
| 8749 |
|
|
.IX Item "-minline-all-stringops"
|
| 8750 |
|
|
By default \s-1GCC\s0 inlines string operations only when destination is known to be
|
| 8751 |
|
|
aligned at least to 4 byte boundary. This enables more inlining, increase code
|
| 8752 |
|
|
size, but may improve performance of code that depends on fast memcpy, strlen
|
| 8753 |
|
|
and memset for short lengths.
|
| 8754 |
|
|
.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
|
| 8755 |
|
|
.IX Item "-momit-leaf-frame-pointer"
|
| 8756 |
|
|
Don't keep the frame pointer in a register for leaf functions. This
|
| 8757 |
|
|
avoids the instructions to save, set up and restore frame pointers and
|
| 8758 |
|
|
makes an extra register available in leaf functions. The option
|
| 8759 |
|
|
\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
|
| 8760 |
|
|
which might make debugging harder.
|
| 8761 |
|
|
.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
|
| 8762 |
|
|
.IX Item "-mtls-direct-seg-refs"
|
| 8763 |
|
|
.PD 0
|
| 8764 |
|
|
.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
|
| 8765 |
|
|
.IX Item "-mno-tls-direct-seg-refs"
|
| 8766 |
|
|
.PD
|
| 8767 |
|
|
Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
|
| 8768 |
|
|
\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
|
| 8769 |
|
|
or whether the thread base pointer must be added. Whether or not this
|
| 8770 |
|
|
is legal depends on the operating system, and whether it maps the
|
| 8771 |
|
|
segment to cover the entire \s-1TLS\s0 area.
|
| 8772 |
|
|
.Sp
|
| 8773 |
|
|
For systems that use \s-1GNU\s0 libc, the default is on.
|
| 8774 |
|
|
.PP
|
| 8775 |
|
|
These \fB\-m\fR switches are supported in addition to the above
|
| 8776 |
|
|
on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
|
| 8777 |
|
|
.IP "\fB\-m32\fR" 4
|
| 8778 |
|
|
.IX Item "-m32"
|
| 8779 |
|
|
.PD 0
|
| 8780 |
|
|
.IP "\fB\-m64\fR" 4
|
| 8781 |
|
|
.IX Item "-m64"
|
| 8782 |
|
|
.PD
|
| 8783 |
|
|
Generate code for a 32\-bit or 64\-bit environment.
|
| 8784 |
|
|
The 32\-bit environment sets int, long and pointer to 32 bits and
|
| 8785 |
|
|
generates code that runs on any i386 system.
|
| 8786 |
|
|
The 64\-bit environment sets int to 32 bits and long and pointer
|
| 8787 |
|
|
to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture.
|
| 8788 |
|
|
.IP "\fB\-mno\-red\-zone\fR" 4
|
| 8789 |
|
|
.IX Item "-mno-red-zone"
|
| 8790 |
|
|
Do not use a so called red zone for x86\-64 code. The red zone is mandated
|
| 8791 |
|
|
by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
|
| 8792 |
|
|
stack pointer that will not be modified by signal or interrupt handlers
|
| 8793 |
|
|
and therefore can be used for temporary data without adjusting the stack
|
| 8794 |
|
|
pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
|
| 8795 |
|
|
.IP "\fB\-mcmodel=small\fR" 4
|
| 8796 |
|
|
.IX Item "-mcmodel=small"
|
| 8797 |
|
|
Generate code for the small code model: the program and its symbols must
|
| 8798 |
|
|
be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
|
| 8799 |
|
|
Programs can be statically or dynamically linked. This is the default
|
| 8800 |
|
|
code model.
|
| 8801 |
|
|
.IP "\fB\-mcmodel=kernel\fR" 4
|
| 8802 |
|
|
.IX Item "-mcmodel=kernel"
|
| 8803 |
|
|
Generate code for the kernel code model. The kernel runs in the
|
| 8804 |
|
|
negative 2 \s-1GB\s0 of the address space.
|
| 8805 |
|
|
This model has to be used for Linux kernel code.
|
| 8806 |
|
|
.IP "\fB\-mcmodel=medium\fR" 4
|
| 8807 |
|
|
.IX Item "-mcmodel=medium"
|
| 8808 |
|
|
Generate code for the medium model: The program is linked in the lower 2
|
| 8809 |
|
|
\&\s-1GB\s0 of the address space but symbols can be located anywhere in the
|
| 8810 |
|
|
address space. Programs can be statically or dynamically linked, but
|
| 8811 |
|
|
building of shared libraries are not supported with the medium model.
|
| 8812 |
|
|
.IP "\fB\-mcmodel=large\fR" 4
|
| 8813 |
|
|
.IX Item "-mcmodel=large"
|
| 8814 |
|
|
Generate code for the large model: This model makes no assumptions
|
| 8815 |
|
|
about addresses and sizes of sections. Currently \s-1GCC\s0 does not implement
|
| 8816 |
|
|
this model.
|
| 8817 |
|
|
.PP
|
| 8818 |
|
|
\fI\s-1IA\-64\s0 Options\fR
|
| 8819 |
|
|
.IX Subsection "IA-64 Options"
|
| 8820 |
|
|
.PP
|
| 8821 |
|
|
These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
|
| 8822 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
| 8823 |
|
|
.IX Item "-mbig-endian"
|
| 8824 |
|
|
Generate code for a big endian target. This is the default for \s-1HP\-UX\s0.
|
| 8825 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
| 8826 |
|
|
.IX Item "-mlittle-endian"
|
| 8827 |
|
|
Generate code for a little endian target. This is the default for \s-1AIX5\s0
|
| 8828 |
|
|
and GNU/Linux.
|
| 8829 |
|
|
.IP "\fB\-mgnu\-as\fR" 4
|
| 8830 |
|
|
.IX Item "-mgnu-as"
|
| 8831 |
|
|
.PD 0
|
| 8832 |
|
|
.IP "\fB\-mno\-gnu\-as\fR" 4
|
| 8833 |
|
|
.IX Item "-mno-gnu-as"
|
| 8834 |
|
|
.PD
|
| 8835 |
|
|
Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
|
| 8836 |
|
|
.IP "\fB\-mgnu\-ld\fR" 4
|
| 8837 |
|
|
.IX Item "-mgnu-ld"
|
| 8838 |
|
|
.PD 0
|
| 8839 |
|
|
.IP "\fB\-mno\-gnu\-ld\fR" 4
|
| 8840 |
|
|
.IX Item "-mno-gnu-ld"
|
| 8841 |
|
|
.PD
|
| 8842 |
|
|
Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
|
| 8843 |
|
|
.IP "\fB\-mno\-pic\fR" 4
|
| 8844 |
|
|
.IX Item "-mno-pic"
|
| 8845 |
|
|
Generate code that does not use a global pointer register. The result
|
| 8846 |
|
|
is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
|
| 8847 |
|
|
.IP "\fB\-mvolatile\-asm\-stop\fR" 4
|
| 8848 |
|
|
.IX Item "-mvolatile-asm-stop"
|
| 8849 |
|
|
.PD 0
|
| 8850 |
|
|
.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
|
| 8851 |
|
|
.IX Item "-mno-volatile-asm-stop"
|
| 8852 |
|
|
.PD
|
| 8853 |
|
|
Generate (or don't) a stop bit immediately before and after volatile asm
|
| 8854 |
|
|
statements.
|
| 8855 |
|
|
.IP "\fB\-mregister\-names\fR" 4
|
| 8856 |
|
|
.IX Item "-mregister-names"
|
| 8857 |
|
|
.PD 0
|
| 8858 |
|
|
.IP "\fB\-mno\-register\-names\fR" 4
|
| 8859 |
|
|
.IX Item "-mno-register-names"
|
| 8860 |
|
|
.PD
|
| 8861 |
|
|
Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
|
| 8862 |
|
|
the stacked registers. This may make assembler output more readable.
|
| 8863 |
|
|
.IP "\fB\-mno\-sdata\fR" 4
|
| 8864 |
|
|
.IX Item "-mno-sdata"
|
| 8865 |
|
|
.PD 0
|
| 8866 |
|
|
.IP "\fB\-msdata\fR" 4
|
| 8867 |
|
|
.IX Item "-msdata"
|
| 8868 |
|
|
.PD
|
| 8869 |
|
|
Disable (or enable) optimizations that use the small data section. This may
|
| 8870 |
|
|
be useful for working around optimizer bugs.
|
| 8871 |
|
|
.IP "\fB\-mconstant\-gp\fR" 4
|
| 8872 |
|
|
.IX Item "-mconstant-gp"
|
| 8873 |
|
|
Generate code that uses a single constant global pointer value. This is
|
| 8874 |
|
|
useful when compiling kernel code.
|
| 8875 |
|
|
.IP "\fB\-mauto\-pic\fR" 4
|
| 8876 |
|
|
.IX Item "-mauto-pic"
|
| 8877 |
|
|
Generate code that is self\-relocatable. This implies \fB\-mconstant\-gp\fR.
|
| 8878 |
|
|
This is useful when compiling firmware code.
|
| 8879 |
|
|
.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
|
| 8880 |
|
|
.IX Item "-minline-float-divide-min-latency"
|
| 8881 |
|
|
Generate code for inline divides of floating point values
|
| 8882 |
|
|
using the minimum latency algorithm.
|
| 8883 |
|
|
.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
|
| 8884 |
|
|
.IX Item "-minline-float-divide-max-throughput"
|
| 8885 |
|
|
Generate code for inline divides of floating point values
|
| 8886 |
|
|
using the maximum throughput algorithm.
|
| 8887 |
|
|
.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
|
| 8888 |
|
|
.IX Item "-minline-int-divide-min-latency"
|
| 8889 |
|
|
Generate code for inline divides of integer values
|
| 8890 |
|
|
using the minimum latency algorithm.
|
| 8891 |
|
|
.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
|
| 8892 |
|
|
.IX Item "-minline-int-divide-max-throughput"
|
| 8893 |
|
|
Generate code for inline divides of integer values
|
| 8894 |
|
|
using the maximum throughput algorithm.
|
| 8895 |
|
|
.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
|
| 8896 |
|
|
.IX Item "-minline-sqrt-min-latency"
|
| 8897 |
|
|
Generate code for inline square roots
|
| 8898 |
|
|
using the minimum latency algorithm.
|
| 8899 |
|
|
.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
|
| 8900 |
|
|
.IX Item "-minline-sqrt-max-throughput"
|
| 8901 |
|
|
Generate code for inline square roots
|
| 8902 |
|
|
using the maximum throughput algorithm.
|
| 8903 |
|
|
.IP "\fB\-mno\-dwarf2\-asm\fR" 4
|
| 8904 |
|
|
.IX Item "-mno-dwarf2-asm"
|
| 8905 |
|
|
.PD 0
|
| 8906 |
|
|
.IP "\fB\-mdwarf2\-asm\fR" 4
|
| 8907 |
|
|
.IX Item "-mdwarf2-asm"
|
| 8908 |
|
|
.PD
|
| 8909 |
|
|
Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
|
| 8910 |
|
|
info. This may be useful when not using the \s-1GNU\s0 assembler.
|
| 8911 |
|
|
.IP "\fB\-mearly\-stop\-bits\fR" 4
|
| 8912 |
|
|
.IX Item "-mearly-stop-bits"
|
| 8913 |
|
|
.PD 0
|
| 8914 |
|
|
.IP "\fB\-mno\-early\-stop\-bits\fR" 4
|
| 8915 |
|
|
.IX Item "-mno-early-stop-bits"
|
| 8916 |
|
|
.PD
|
| 8917 |
|
|
Allow stop bits to be placed earlier than immediately preceding the
|
| 8918 |
|
|
instruction that triggered the stop bit. This can improve instruction
|
| 8919 |
|
|
scheduling, but does not always do so.
|
| 8920 |
|
|
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
|
| 8921 |
|
|
.IX Item "-mfixed-range=register-range"
|
| 8922 |
|
|
Generate code treating the given register range as fixed registers.
|
| 8923 |
|
|
A fixed register is one that the register allocator can not use. This is
|
| 8924 |
|
|
useful when compiling kernel code. A register range is specified as
|
| 8925 |
|
|
two registers separated by a dash. Multiple register ranges can be
|
| 8926 |
|
|
specified separated by a comma.
|
| 8927 |
|
|
.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
|
| 8928 |
|
|
.IX Item "-mtls-size=tls-size"
|
| 8929 |
|
|
Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
|
| 8930 |
|
|
64.
|
| 8931 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
| 8932 |
|
|
.IX Item "-mtune=cpu-type"
|
| 8933 |
|
|
Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
|
| 8934 |
|
|
itanium, itanium1, merced, itanium2, and mckinley.
|
| 8935 |
|
|
.IP "\fB\-mt\fR" 4
|
| 8936 |
|
|
.IX Item "-mt"
|
| 8937 |
|
|
.PD 0
|
| 8938 |
|
|
.IP "\fB\-pthread\fR" 4
|
| 8939 |
|
|
.IX Item "-pthread"
|
| 8940 |
|
|
.PD
|
| 8941 |
|
|
Add support for multithreading using the \s-1POSIX\s0 threads library. This
|
| 8942 |
|
|
option sets flags for both the preprocessor and linker. It does
|
| 8943 |
|
|
not affect the thread safety of object code produced by the compiler or
|
| 8944 |
|
|
that of libraries supplied with it. These are HP-UX specific flags.
|
| 8945 |
|
|
.IP "\fB\-milp32\fR" 4
|
| 8946 |
|
|
.IX Item "-milp32"
|
| 8947 |
|
|
.PD 0
|
| 8948 |
|
|
.IP "\fB\-mlp64\fR" 4
|
| 8949 |
|
|
.IX Item "-mlp64"
|
| 8950 |
|
|
.PD
|
| 8951 |
|
|
Generate code for a 32\-bit or 64\-bit environment.
|
| 8952 |
|
|
The 32\-bit environment sets int, long and pointer to 32 bits.
|
| 8953 |
|
|
The 64\-bit environment sets int to 32 bits and long and pointer
|
| 8954 |
|
|
to 64 bits. These are HP-UX specific flags.
|
| 8955 |
|
|
.PP
|
| 8956 |
|
|
\fIM32C Options\fR
|
| 8957 |
|
|
.IX Subsection "M32C Options"
|
| 8958 |
|
|
.IP "\fB\-mcpu=\fR\fIname\fR" 4
|
| 8959 |
|
|
.IX Item "-mcpu=name"
|
| 8960 |
|
|
Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
|
| 8961 |
|
|
\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
|
| 8962 |
|
|
/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
|
| 8963 |
|
|
the M32C/80 series.
|
| 8964 |
|
|
.IP "\fB\-msim\fR" 4
|
| 8965 |
|
|
.IX Item "-msim"
|
| 8966 |
|
|
Specifies that the program will be run on the simulator. This causes
|
| 8967 |
|
|
an alternate runtime library to be linked in which supports, for
|
| 8968 |
|
|
example, file I/O. You must not use this option when generating
|
| 8969 |
|
|
programs that will run on real hardware; you must provide your own
|
| 8970 |
|
|
runtime library for whatever I/O functions are needed.
|
| 8971 |
|
|
.IP "\fB\-memregs=\fR\fInumber\fR" 4
|
| 8972 |
|
|
.IX Item "-memregs=number"
|
| 8973 |
|
|
Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
|
| 8974 |
|
|
during code generation. These pseudo-registers will be used like real
|
| 8975 |
|
|
registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
|
| 8976 |
|
|
code into available registers, and the performance penalty of using
|
| 8977 |
|
|
memory instead of registers. Note that all modules in a program must
|
| 8978 |
|
|
be compiled with the same value for this option. Because of that, you
|
| 8979 |
|
|
must not use this option with the default runtime libraries gcc
|
| 8980 |
|
|
builds.
|
| 8981 |
|
|
.PP
|
| 8982 |
|
|
\fIM32R/D Options\fR
|
| 8983 |
|
|
.IX Subsection "M32R/D Options"
|
| 8984 |
|
|
.PP
|
| 8985 |
|
|
These \fB\-m\fR options are defined for Renesas M32R/D architectures:
|
| 8986 |
|
|
.IP "\fB\-m32r2\fR" 4
|
| 8987 |
|
|
.IX Item "-m32r2"
|
| 8988 |
|
|
Generate code for the M32R/2.
|
| 8989 |
|
|
.IP "\fB\-m32rx\fR" 4
|
| 8990 |
|
|
.IX Item "-m32rx"
|
| 8991 |
|
|
Generate code for the M32R/X.
|
| 8992 |
|
|
.IP "\fB\-m32r\fR" 4
|
| 8993 |
|
|
.IX Item "-m32r"
|
| 8994 |
|
|
Generate code for the M32R. This is the default.
|
| 8995 |
|
|
.IP "\fB\-mmodel=small\fR" 4
|
| 8996 |
|
|
.IX Item "-mmodel=small"
|
| 8997 |
|
|
Assume all objects live in the lower 16MB of memory (so that their addresses
|
| 8998 |
|
|
can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
|
| 8999 |
|
|
are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
|
| 9000 |
|
|
This is the default.
|
| 9001 |
|
|
.Sp
|
| 9002 |
|
|
The addressability of a particular object can be set with the
|
| 9003 |
|
|
\&\f(CW\*(C`model\*(C'\fR attribute.
|
| 9004 |
|
|
.IP "\fB\-mmodel=medium\fR" 4
|
| 9005 |
|
|
.IX Item "-mmodel=medium"
|
| 9006 |
|
|
Assume objects may be anywhere in the 32\-bit address space (the compiler
|
| 9007 |
|
|
will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
|
| 9008 |
|
|
assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
|
| 9009 |
|
|
.IP "\fB\-mmodel=large\fR" 4
|
| 9010 |
|
|
.IX Item "-mmodel=large"
|
| 9011 |
|
|
Assume objects may be anywhere in the 32\-bit address space (the compiler
|
| 9012 |
|
|
will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
|
| 9013 |
|
|
assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
|
| 9014 |
|
|
(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
|
| 9015 |
|
|
instruction sequence).
|
| 9016 |
|
|
.IP "\fB\-msdata=none\fR" 4
|
| 9017 |
|
|
.IX Item "-msdata=none"
|
| 9018 |
|
|
Disable use of the small data area. Variables will be put into
|
| 9019 |
|
|
one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
|
| 9020 |
|
|
\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
|
| 9021 |
|
|
This is the default.
|
| 9022 |
|
|
.Sp
|
| 9023 |
|
|
The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
|
| 9024 |
|
|
Objects may be explicitly put in the small data area with the
|
| 9025 |
|
|
\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
|
| 9026 |
|
|
.IP "\fB\-msdata=sdata\fR" 4
|
| 9027 |
|
|
.IX Item "-msdata=sdata"
|
| 9028 |
|
|
Put small global and static data in the small data area, but do not
|
| 9029 |
|
|
generate special code to reference them.
|
| 9030 |
|
|
.IP "\fB\-msdata=use\fR" 4
|
| 9031 |
|
|
.IX Item "-msdata=use"
|
| 9032 |
|
|
Put small global and static data in the small data area, and generate
|
| 9033 |
|
|
special instructions to reference them.
|
| 9034 |
|
|
.IP "\fB\-G\fR \fInum\fR" 4
|
| 9035 |
|
|
.IX Item "-G num"
|
| 9036 |
|
|
Put global and static objects less than or equal to \fInum\fR bytes
|
| 9037 |
|
|
into the small data or bss sections instead of the normal data or bss
|
| 9038 |
|
|
sections. The default value of \fInum\fR is 8.
|
| 9039 |
|
|
The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
|
| 9040 |
|
|
for this option to have any effect.
|
| 9041 |
|
|
.Sp
|
| 9042 |
|
|
All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
|
| 9043 |
|
|
Compiling with different values of \fInum\fR may or may not work; if it
|
| 9044 |
|
|
doesn't the linker will give an error message\-\-\-incorrect code will not be
|
| 9045 |
|
|
generated.
|
| 9046 |
|
|
.IP "\fB\-mdebug\fR" 4
|
| 9047 |
|
|
.IX Item "-mdebug"
|
| 9048 |
|
|
Makes the M32R specific code in the compiler display some statistics
|
| 9049 |
|
|
that might help in debugging programs.
|
| 9050 |
|
|
.IP "\fB\-malign\-loops\fR" 4
|
| 9051 |
|
|
.IX Item "-malign-loops"
|
| 9052 |
|
|
Align all loops to a 32\-byte boundary.
|
| 9053 |
|
|
.IP "\fB\-mno\-align\-loops\fR" 4
|
| 9054 |
|
|
.IX Item "-mno-align-loops"
|
| 9055 |
|
|
Do not enforce a 32\-byte alignment for loops. This is the default.
|
| 9056 |
|
|
.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
|
| 9057 |
|
|
.IX Item "-missue-rate=number"
|
| 9058 |
|
|
Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
|
| 9059 |
|
|
or 2.
|
| 9060 |
|
|
.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
|
| 9061 |
|
|
.IX Item "-mbranch-cost=number"
|
| 9062 |
|
|
\&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
|
| 9063 |
|
|
preferred over conditional code, if it is 2, then the opposite will
|
| 9064 |
|
|
apply.
|
| 9065 |
|
|
.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
|
| 9066 |
|
|
.IX Item "-mflush-trap=number"
|
| 9067 |
|
|
Specifies the trap number to use to flush the cache. The default is
|
| 9068 |
|
|
12. Valid numbers are between 0 and 15 inclusive.
|
| 9069 |
|
|
.IP "\fB\-mno\-flush\-trap\fR" 4
|
| 9070 |
|
|
.IX Item "-mno-flush-trap"
|
| 9071 |
|
|
Specifies that the cache cannot be flushed by using a trap.
|
| 9072 |
|
|
.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
|
| 9073 |
|
|
.IX Item "-mflush-func=name"
|
| 9074 |
|
|
Specifies the name of the operating system function to call to flush
|
| 9075 |
|
|
the cache. The default is \fI_flush_cache\fR, but a function call
|
| 9076 |
|
|
will only be used if a trap is not available.
|
| 9077 |
|
|
.IP "\fB\-mno\-flush\-func\fR" 4
|
| 9078 |
|
|
.IX Item "-mno-flush-func"
|
| 9079 |
|
|
Indicates that there is no \s-1OS\s0 function for flushing the cache.
|
| 9080 |
|
|
.PP
|
| 9081 |
|
|
\fIM680x0 Options\fR
|
| 9082 |
|
|
.IX Subsection "M680x0 Options"
|
| 9083 |
|
|
.PP
|
| 9084 |
|
|
These are the \fB\-m\fR options defined for the 68000 series. The default
|
| 9085 |
|
|
values for these options depends on which style of 68000 was selected when
|
| 9086 |
|
|
the compiler was configured; the defaults for the most common choices are
|
| 9087 |
|
|
given below.
|
| 9088 |
|
|
.IP "\fB\-m68000\fR" 4
|
| 9089 |
|
|
.IX Item "-m68000"
|
| 9090 |
|
|
.PD 0
|
| 9091 |
|
|
.IP "\fB\-mc68000\fR" 4
|
| 9092 |
|
|
.IX Item "-mc68000"
|
| 9093 |
|
|
.PD
|
| 9094 |
|
|
Generate output for a 68000. This is the default
|
| 9095 |
|
|
when the compiler is configured for 68000\-based systems.
|
| 9096 |
|
|
.Sp
|
| 9097 |
|
|
Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
|
| 9098 |
|
|
including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
|
| 9099 |
|
|
.IP "\fB\-m68020\fR" 4
|
| 9100 |
|
|
.IX Item "-m68020"
|
| 9101 |
|
|
.PD 0
|
| 9102 |
|
|
.IP "\fB\-mc68020\fR" 4
|
| 9103 |
|
|
.IX Item "-mc68020"
|
| 9104 |
|
|
.PD
|
| 9105 |
|
|
Generate output for a 68020. This is the default
|
| 9106 |
|
|
when the compiler is configured for 68020\-based systems.
|
| 9107 |
|
|
.IP "\fB\-m68881\fR" 4
|
| 9108 |
|
|
.IX Item "-m68881"
|
| 9109 |
|
|
Generate output containing 68881 instructions for floating point.
|
| 9110 |
|
|
This is the default for most 68020 systems unless \fB\-\-nfp\fR was
|
| 9111 |
|
|
specified when the compiler was configured.
|
| 9112 |
|
|
.IP "\fB\-m68030\fR" 4
|
| 9113 |
|
|
.IX Item "-m68030"
|
| 9114 |
|
|
Generate output for a 68030. This is the default when the compiler is
|
| 9115 |
|
|
configured for 68030\-based systems.
|
| 9116 |
|
|
.IP "\fB\-m68040\fR" 4
|
| 9117 |
|
|
.IX Item "-m68040"
|
| 9118 |
|
|
Generate output for a 68040. This is the default when the compiler is
|
| 9119 |
|
|
configured for 68040\-based systems.
|
| 9120 |
|
|
.Sp
|
| 9121 |
|
|
This option inhibits the use of 68881/68882 instructions that have to be
|
| 9122 |
|
|
emulated by software on the 68040. Use this option if your 68040 does not
|
| 9123 |
|
|
have code to emulate those instructions.
|
| 9124 |
|
|
.IP "\fB\-m68060\fR" 4
|
| 9125 |
|
|
.IX Item "-m68060"
|
| 9126 |
|
|
Generate output for a 68060. This is the default when the compiler is
|
| 9127 |
|
|
configured for 68060\-based systems.
|
| 9128 |
|
|
.Sp
|
| 9129 |
|
|
This option inhibits the use of 68020 and 68881/68882 instructions that
|
| 9130 |
|
|
have to be emulated by software on the 68060. Use this option if your 68060
|
| 9131 |
|
|
does not have code to emulate those instructions.
|
| 9132 |
|
|
.IP "\fB\-mcpu32\fR" 4
|
| 9133 |
|
|
.IX Item "-mcpu32"
|
| 9134 |
|
|
Generate output for a \s-1CPU32\s0. This is the default
|
| 9135 |
|
|
when the compiler is configured for CPU32\-based systems.
|
| 9136 |
|
|
.Sp
|
| 9137 |
|
|
Use this option for microcontrollers with a
|
| 9138 |
|
|
\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
|
| 9139 |
|
|
68336, 68340, 68341, 68349 and 68360.
|
| 9140 |
|
|
.IP "\fB\-m5200\fR" 4
|
| 9141 |
|
|
.IX Item "-m5200"
|
| 9142 |
|
|
Generate output for a 520X \*(L"coldfire\*(R" family cpu. This is the default
|
| 9143 |
|
|
when the compiler is configured for 520X\-based systems.
|
| 9144 |
|
|
.Sp
|
| 9145 |
|
|
Use this option for microcontroller with a 5200 core, including
|
| 9146 |
|
|
the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0.
|
| 9147 |
|
|
.IP "\fB\-m68020\-40\fR" 4
|
| 9148 |
|
|
.IX Item "-m68020-40"
|
| 9149 |
|
|
Generate output for a 68040, without using any of the new instructions.
|
| 9150 |
|
|
This results in code which can run relatively efficiently on either a
|
| 9151 |
|
|
68020/68881 or a 68030 or a 68040. The generated code does use the
|
| 9152 |
|
|
68881 instructions that are emulated on the 68040.
|
| 9153 |
|
|
.IP "\fB\-m68020\-60\fR" 4
|
| 9154 |
|
|
.IX Item "-m68020-60"
|
| 9155 |
|
|
Generate output for a 68060, without using any of the new instructions.
|
| 9156 |
|
|
This results in code which can run relatively efficiently on either a
|
| 9157 |
|
|
68020/68881 or a 68030 or a 68040. The generated code does use the
|
| 9158 |
|
|
68881 instructions that are emulated on the 68060.
|
| 9159 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 9160 |
|
|
.IX Item "-msoft-float"
|
| 9161 |
|
|
Generate output containing library calls for floating point.
|
| 9162 |
|
|
\&\fBWarning:\fR the requisite libraries are not available for all m68k
|
| 9163 |
|
|
targets. Normally the facilities of the machine's usual C compiler are
|
| 9164 |
|
|
used, but this can't be done directly in cross\-compilation. You must
|
| 9165 |
|
|
make your own arrangements to provide suitable library functions for
|
| 9166 |
|
|
cross\-compilation. The embedded targets \fBm68k\-*\-aout\fR and
|
| 9167 |
|
|
\&\fBm68k\-*\-coff\fR do provide software floating point support.
|
| 9168 |
|
|
.IP "\fB\-mshort\fR" 4
|
| 9169 |
|
|
.IX Item "-mshort"
|
| 9170 |
|
|
Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
|
| 9171 |
|
|
Additionally, parameters passed on the stack are also aligned to a
|
| 9172 |
|
|
16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
|
| 9173 |
|
|
.IP "\fB\-mnobitfield\fR" 4
|
| 9174 |
|
|
.IX Item "-mnobitfield"
|
| 9175 |
|
|
Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
|
| 9176 |
|
|
and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
|
| 9177 |
|
|
.IP "\fB\-mbitfield\fR" 4
|
| 9178 |
|
|
.IX Item "-mbitfield"
|
| 9179 |
|
|
Do use the bit-field instructions. The \fB\-m68020\fR option implies
|
| 9180 |
|
|
\&\fB\-mbitfield\fR. This is the default if you use a configuration
|
| 9181 |
|
|
designed for a 68020.
|
| 9182 |
|
|
.IP "\fB\-mrtd\fR" 4
|
| 9183 |
|
|
.IX Item "-mrtd"
|
| 9184 |
|
|
Use a different function-calling convention, in which functions
|
| 9185 |
|
|
that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
|
| 9186 |
|
|
instruction, which pops their arguments while returning. This
|
| 9187 |
|
|
saves one instruction in the caller since there is no need to pop
|
| 9188 |
|
|
the arguments there.
|
| 9189 |
|
|
.Sp
|
| 9190 |
|
|
This calling convention is incompatible with the one normally
|
| 9191 |
|
|
used on Unix, so you cannot use it if you need to call libraries
|
| 9192 |
|
|
compiled with the Unix compiler.
|
| 9193 |
|
|
.Sp
|
| 9194 |
|
|
Also, you must provide function prototypes for all functions that
|
| 9195 |
|
|
take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
|
| 9196 |
|
|
otherwise incorrect code will be generated for calls to those
|
| 9197 |
|
|
functions.
|
| 9198 |
|
|
.Sp
|
| 9199 |
|
|
In addition, seriously incorrect code will result if you call a
|
| 9200 |
|
|
function with too many arguments. (Normally, extra arguments are
|
| 9201 |
|
|
harmlessly ignored.)
|
| 9202 |
|
|
.Sp
|
| 9203 |
|
|
The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
|
| 9204 |
|
|
68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
|
| 9205 |
|
|
.IP "\fB\-malign\-int\fR" 4
|
| 9206 |
|
|
.IX Item "-malign-int"
|
| 9207 |
|
|
.PD 0
|
| 9208 |
|
|
.IP "\fB\-mno\-align\-int\fR" 4
|
| 9209 |
|
|
.IX Item "-mno-align-int"
|
| 9210 |
|
|
.PD
|
| 9211 |
|
|
Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
|
| 9212 |
|
|
\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
|
| 9213 |
|
|
boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
|
| 9214 |
|
|
Aligning variables on 32\-bit boundaries produces code that runs somewhat
|
| 9215 |
|
|
faster on processors with 32\-bit busses at the expense of more memory.
|
| 9216 |
|
|
.Sp
|
| 9217 |
|
|
\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
|
| 9218 |
|
|
align structures containing the above types differently than
|
| 9219 |
|
|
most published application binary interface specifications for the m68k.
|
| 9220 |
|
|
.IP "\fB\-mpcrel\fR" 4
|
| 9221 |
|
|
.IX Item "-mpcrel"
|
| 9222 |
|
|
Use the pc-relative addressing mode of the 68000 directly, instead of
|
| 9223 |
|
|
using a global offset table. At present, this option implies \fB\-fpic\fR,
|
| 9224 |
|
|
allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
|
| 9225 |
|
|
not presently supported with \fB\-mpcrel\fR, though this could be supported for
|
| 9226 |
|
|
68020 and higher processors.
|
| 9227 |
|
|
.IP "\fB\-mno\-strict\-align\fR" 4
|
| 9228 |
|
|
.IX Item "-mno-strict-align"
|
| 9229 |
|
|
.PD 0
|
| 9230 |
|
|
.IP "\fB\-mstrict\-align\fR" 4
|
| 9231 |
|
|
.IX Item "-mstrict-align"
|
| 9232 |
|
|
.PD
|
| 9233 |
|
|
Do not (do) assume that unaligned memory references will be handled by
|
| 9234 |
|
|
the system.
|
| 9235 |
|
|
.IP "\fB\-msep\-data\fR" 4
|
| 9236 |
|
|
.IX Item "-msep-data"
|
| 9237 |
|
|
Generate code that allows the data segment to be located in a different
|
| 9238 |
|
|
area of memory from the text segment. This allows for execute in place in
|
| 9239 |
|
|
an environment without virtual memory management. This option implies
|
| 9240 |
|
|
\&\fB\-fPIC\fR.
|
| 9241 |
|
|
.IP "\fB\-mno\-sep\-data\fR" 4
|
| 9242 |
|
|
.IX Item "-mno-sep-data"
|
| 9243 |
|
|
Generate code that assumes that the data segment follows the text segment.
|
| 9244 |
|
|
This is the default.
|
| 9245 |
|
|
.IP "\fB\-mid\-shared\-library\fR" 4
|
| 9246 |
|
|
.IX Item "-mid-shared-library"
|
| 9247 |
|
|
Generate code that supports shared libraries via the library \s-1ID\s0 method.
|
| 9248 |
|
|
This allows for execute in place and shared libraries in an environment
|
| 9249 |
|
|
without virtual memory management. This option implies \fB\-fPIC\fR.
|
| 9250 |
|
|
.IP "\fB\-mno\-id\-shared\-library\fR" 4
|
| 9251 |
|
|
.IX Item "-mno-id-shared-library"
|
| 9252 |
|
|
Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
|
| 9253 |
|
|
This is the default.
|
| 9254 |
|
|
.IP "\fB\-mshared\-library\-id=n\fR" 4
|
| 9255 |
|
|
.IX Item "-mshared-library-id=n"
|
| 9256 |
|
|
Specified the identification number of the \s-1ID\s0 based shared library being
|
| 9257 |
|
|
compiled. Specifying a value of 0 will generate more compact code, specifying
|
| 9258 |
|
|
other values will force the allocation of that number to the current
|
| 9259 |
|
|
library but is no more space or time efficient than omitting this option.
|
| 9260 |
|
|
.PP
|
| 9261 |
|
|
\fIM68hc1x Options\fR
|
| 9262 |
|
|
.IX Subsection "M68hc1x Options"
|
| 9263 |
|
|
.PP
|
| 9264 |
|
|
These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
|
| 9265 |
|
|
microcontrollers. The default values for these options depends on
|
| 9266 |
|
|
which style of microcontroller was selected when the compiler was configured;
|
| 9267 |
|
|
the defaults for the most common choices are given below.
|
| 9268 |
|
|
.IP "\fB\-m6811\fR" 4
|
| 9269 |
|
|
.IX Item "-m6811"
|
| 9270 |
|
|
.PD 0
|
| 9271 |
|
|
.IP "\fB\-m68hc11\fR" 4
|
| 9272 |
|
|
.IX Item "-m68hc11"
|
| 9273 |
|
|
.PD
|
| 9274 |
|
|
Generate output for a 68HC11. This is the default
|
| 9275 |
|
|
when the compiler is configured for 68HC11\-based systems.
|
| 9276 |
|
|
.IP "\fB\-m6812\fR" 4
|
| 9277 |
|
|
.IX Item "-m6812"
|
| 9278 |
|
|
.PD 0
|
| 9279 |
|
|
.IP "\fB\-m68hc12\fR" 4
|
| 9280 |
|
|
.IX Item "-m68hc12"
|
| 9281 |
|
|
.PD
|
| 9282 |
|
|
Generate output for a 68HC12. This is the default
|
| 9283 |
|
|
when the compiler is configured for 68HC12\-based systems.
|
| 9284 |
|
|
.IP "\fB\-m68S12\fR" 4
|
| 9285 |
|
|
.IX Item "-m68S12"
|
| 9286 |
|
|
.PD 0
|
| 9287 |
|
|
.IP "\fB\-m68hcs12\fR" 4
|
| 9288 |
|
|
.IX Item "-m68hcs12"
|
| 9289 |
|
|
.PD
|
| 9290 |
|
|
Generate output for a 68HCS12.
|
| 9291 |
|
|
.IP "\fB\-mauto\-incdec\fR" 4
|
| 9292 |
|
|
.IX Item "-mauto-incdec"
|
| 9293 |
|
|
Enable the use of 68HC12 pre and post auto-increment and auto-decrement
|
| 9294 |
|
|
addressing modes.
|
| 9295 |
|
|
.IP "\fB\-minmax\fR" 4
|
| 9296 |
|
|
.IX Item "-minmax"
|
| 9297 |
|
|
.PD 0
|
| 9298 |
|
|
.IP "\fB\-nominmax\fR" 4
|
| 9299 |
|
|
.IX Item "-nominmax"
|
| 9300 |
|
|
.PD
|
| 9301 |
|
|
Enable the use of 68HC12 min and max instructions.
|
| 9302 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 9303 |
|
|
.IX Item "-mlong-calls"
|
| 9304 |
|
|
.PD 0
|
| 9305 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
| 9306 |
|
|
.IX Item "-mno-long-calls"
|
| 9307 |
|
|
.PD
|
| 9308 |
|
|
Treat all calls as being far away (near). If calls are assumed to be
|
| 9309 |
|
|
far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
|
| 9310 |
|
|
call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
|
| 9311 |
|
|
.IP "\fB\-mshort\fR" 4
|
| 9312 |
|
|
.IX Item "-mshort"
|
| 9313 |
|
|
Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
|
| 9314 |
|
|
.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
|
| 9315 |
|
|
.IX Item "-msoft-reg-count=count"
|
| 9316 |
|
|
Specify the number of pseudo-soft registers which are used for the
|
| 9317 |
|
|
code generation. The maximum number is 32. Using more pseudo-soft
|
| 9318 |
|
|
register may or may not result in better code depending on the program.
|
| 9319 |
|
|
The default is 4 for 68HC11 and 2 for 68HC12.
|
| 9320 |
|
|
.PP
|
| 9321 |
|
|
\fIMCore Options\fR
|
| 9322 |
|
|
.IX Subsection "MCore Options"
|
| 9323 |
|
|
.PP
|
| 9324 |
|
|
These are the \fB\-m\fR options defined for the Motorola M*Core
|
| 9325 |
|
|
processors.
|
| 9326 |
|
|
.IP "\fB\-mhardlit\fR" 4
|
| 9327 |
|
|
.IX Item "-mhardlit"
|
| 9328 |
|
|
.PD 0
|
| 9329 |
|
|
.IP "\fB\-mno\-hardlit\fR" 4
|
| 9330 |
|
|
.IX Item "-mno-hardlit"
|
| 9331 |
|
|
.PD
|
| 9332 |
|
|
Inline constants into the code stream if it can be done in two
|
| 9333 |
|
|
instructions or less.
|
| 9334 |
|
|
.IP "\fB\-mdiv\fR" 4
|
| 9335 |
|
|
.IX Item "-mdiv"
|
| 9336 |
|
|
.PD 0
|
| 9337 |
|
|
.IP "\fB\-mno\-div\fR" 4
|
| 9338 |
|
|
.IX Item "-mno-div"
|
| 9339 |
|
|
.PD
|
| 9340 |
|
|
Use the divide instruction. (Enabled by default).
|
| 9341 |
|
|
.IP "\fB\-mrelax\-immediate\fR" 4
|
| 9342 |
|
|
.IX Item "-mrelax-immediate"
|
| 9343 |
|
|
.PD 0
|
| 9344 |
|
|
.IP "\fB\-mno\-relax\-immediate\fR" 4
|
| 9345 |
|
|
.IX Item "-mno-relax-immediate"
|
| 9346 |
|
|
.PD
|
| 9347 |
|
|
Allow arbitrary sized immediates in bit operations.
|
| 9348 |
|
|
.IP "\fB\-mwide\-bitfields\fR" 4
|
| 9349 |
|
|
.IX Item "-mwide-bitfields"
|
| 9350 |
|
|
.PD 0
|
| 9351 |
|
|
.IP "\fB\-mno\-wide\-bitfields\fR" 4
|
| 9352 |
|
|
.IX Item "-mno-wide-bitfields"
|
| 9353 |
|
|
.PD
|
| 9354 |
|
|
Always treat bit-fields as int\-sized.
|
| 9355 |
|
|
.IP "\fB\-m4byte\-functions\fR" 4
|
| 9356 |
|
|
.IX Item "-m4byte-functions"
|
| 9357 |
|
|
.PD 0
|
| 9358 |
|
|
.IP "\fB\-mno\-4byte\-functions\fR" 4
|
| 9359 |
|
|
.IX Item "-mno-4byte-functions"
|
| 9360 |
|
|
.PD
|
| 9361 |
|
|
Force all functions to be aligned to a four byte boundary.
|
| 9362 |
|
|
.IP "\fB\-mcallgraph\-data\fR" 4
|
| 9363 |
|
|
.IX Item "-mcallgraph-data"
|
| 9364 |
|
|
.PD 0
|
| 9365 |
|
|
.IP "\fB\-mno\-callgraph\-data\fR" 4
|
| 9366 |
|
|
.IX Item "-mno-callgraph-data"
|
| 9367 |
|
|
.PD
|
| 9368 |
|
|
Emit callgraph information.
|
| 9369 |
|
|
.IP "\fB\-mslow\-bytes\fR" 4
|
| 9370 |
|
|
.IX Item "-mslow-bytes"
|
| 9371 |
|
|
.PD 0
|
| 9372 |
|
|
.IP "\fB\-mno\-slow\-bytes\fR" 4
|
| 9373 |
|
|
.IX Item "-mno-slow-bytes"
|
| 9374 |
|
|
.PD
|
| 9375 |
|
|
Prefer word access when reading byte quantities.
|
| 9376 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
| 9377 |
|
|
.IX Item "-mlittle-endian"
|
| 9378 |
|
|
.PD 0
|
| 9379 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
| 9380 |
|
|
.IX Item "-mbig-endian"
|
| 9381 |
|
|
.PD
|
| 9382 |
|
|
Generate code for a little endian target.
|
| 9383 |
|
|
.IP "\fB\-m210\fR" 4
|
| 9384 |
|
|
.IX Item "-m210"
|
| 9385 |
|
|
.PD 0
|
| 9386 |
|
|
.IP "\fB\-m340\fR" 4
|
| 9387 |
|
|
.IX Item "-m340"
|
| 9388 |
|
|
.PD
|
| 9389 |
|
|
Generate code for the 210 processor.
|
| 9390 |
|
|
.PP
|
| 9391 |
|
|
\fI\s-1MIPS\s0 Options\fR
|
| 9392 |
|
|
.IX Subsection "MIPS Options"
|
| 9393 |
|
|
.IP "\fB\-EB\fR" 4
|
| 9394 |
|
|
.IX Item "-EB"
|
| 9395 |
|
|
Generate big-endian code.
|
| 9396 |
|
|
.IP "\fB\-EL\fR" 4
|
| 9397 |
|
|
.IX Item "-EL"
|
| 9398 |
|
|
Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
|
| 9399 |
|
|
configurations.
|
| 9400 |
|
|
.IP "\fB\-march=\fR\fIarch\fR" 4
|
| 9401 |
|
|
.IX Item "-march=arch"
|
| 9402 |
|
|
Generate code that will run on \fIarch\fR, which can be the name of a
|
| 9403 |
|
|
generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
|
| 9404 |
|
|
The \s-1ISA\s0 names are:
|
| 9405 |
|
|
\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
|
| 9406 |
|
|
\&\fBmips32\fR, \fBmips32r2\fR, and \fBmips64\fR.
|
| 9407 |
|
|
The processor names are:
|
| 9408 |
|
|
\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR,
|
| 9409 |
|
|
\&\fB5kc\fR, \fB5kf\fR,
|
| 9410 |
|
|
\&\fB20kc\fR,
|
| 9411 |
|
|
\&\fB24k\fR, \fB24kc\fR, \fB24kf\fR, \fB24kx\fR,
|
| 9412 |
|
|
\&\fBm4k\fR,
|
| 9413 |
|
|
\&\fBorion\fR,
|
| 9414 |
|
|
\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
|
| 9415 |
|
|
\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
|
| 9416 |
|
|
\&\fBrm7000\fR, \fBrm9000\fR,
|
| 9417 |
|
|
\&\fBsb1\fR,
|
| 9418 |
|
|
\&\fBsr71000\fR,
|
| 9419 |
|
|
\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
|
| 9420 |
|
|
\&\fBvr5000\fR, \fBvr5400\fR and \fBvr5500\fR.
|
| 9421 |
|
|
The special value \fBfrom-abi\fR selects the
|
| 9422 |
|
|
most compatible architecture for the selected \s-1ABI\s0 (that is,
|
| 9423 |
|
|
\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
|
| 9424 |
|
|
.Sp
|
| 9425 |
|
|
In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
|
| 9426 |
|
|
(for example, \fB\-march=r2k\fR). Prefixes are optional, and
|
| 9427 |
|
|
\&\fBvr\fR may be written \fBr\fR.
|
| 9428 |
|
|
.Sp
|
| 9429 |
|
|
\&\s-1GCC\s0 defines two macros based on the value of this option. The first
|
| 9430 |
|
|
is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
|
| 9431 |
|
|
a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
|
| 9432 |
|
|
where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
|
| 9433 |
|
|
For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
|
| 9434 |
|
|
to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
|
| 9435 |
|
|
.Sp
|
| 9436 |
|
|
Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
|
| 9437 |
|
|
above. In other words, it will have the full prefix and will not
|
| 9438 |
|
|
abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
|
| 9439 |
|
|
the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
|
| 9440 |
|
|
\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
|
| 9441 |
|
|
\&\fB\-march\fR option is given.
|
| 9442 |
|
|
.IP "\fB\-mtune=\fR\fIarch\fR" 4
|
| 9443 |
|
|
.IX Item "-mtune=arch"
|
| 9444 |
|
|
Optimize for \fIarch\fR. Among other things, this option controls
|
| 9445 |
|
|
the way instructions are scheduled, and the perceived cost of arithmetic
|
| 9446 |
|
|
operations. The list of \fIarch\fR values is the same as for
|
| 9447 |
|
|
\&\fB\-march\fR.
|
| 9448 |
|
|
.Sp
|
| 9449 |
|
|
When this option is not used, \s-1GCC\s0 will optimize for the processor
|
| 9450 |
|
|
specified by \fB\-march\fR. By using \fB\-march\fR and
|
| 9451 |
|
|
\&\fB\-mtune\fR together, it is possible to generate code that will
|
| 9452 |
|
|
run on a family of processors, but optimize the code for one
|
| 9453 |
|
|
particular member of that family.
|
| 9454 |
|
|
.Sp
|
| 9455 |
|
|
\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
|
| 9456 |
|
|
\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
|
| 9457 |
|
|
\&\fB\-march\fR ones described above.
|
| 9458 |
|
|
.IP "\fB\-mips1\fR" 4
|
| 9459 |
|
|
.IX Item "-mips1"
|
| 9460 |
|
|
Equivalent to \fB\-march=mips1\fR.
|
| 9461 |
|
|
.IP "\fB\-mips2\fR" 4
|
| 9462 |
|
|
.IX Item "-mips2"
|
| 9463 |
|
|
Equivalent to \fB\-march=mips2\fR.
|
| 9464 |
|
|
.IP "\fB\-mips3\fR" 4
|
| 9465 |
|
|
.IX Item "-mips3"
|
| 9466 |
|
|
Equivalent to \fB\-march=mips3\fR.
|
| 9467 |
|
|
.IP "\fB\-mips4\fR" 4
|
| 9468 |
|
|
.IX Item "-mips4"
|
| 9469 |
|
|
Equivalent to \fB\-march=mips4\fR.
|
| 9470 |
|
|
.IP "\fB\-mips32\fR" 4
|
| 9471 |
|
|
.IX Item "-mips32"
|
| 9472 |
|
|
Equivalent to \fB\-march=mips32\fR.
|
| 9473 |
|
|
.IP "\fB\-mips32r2\fR" 4
|
| 9474 |
|
|
.IX Item "-mips32r2"
|
| 9475 |
|
|
Equivalent to \fB\-march=mips32r2\fR.
|
| 9476 |
|
|
.IP "\fB\-mips64\fR" 4
|
| 9477 |
|
|
.IX Item "-mips64"
|
| 9478 |
|
|
Equivalent to \fB\-march=mips64\fR.
|
| 9479 |
|
|
.IP "\fB\-mips16\fR" 4
|
| 9480 |
|
|
.IX Item "-mips16"
|
| 9481 |
|
|
.PD 0
|
| 9482 |
|
|
.IP "\fB\-mno\-mips16\fR" 4
|
| 9483 |
|
|
.IX Item "-mno-mips16"
|
| 9484 |
|
|
.PD
|
| 9485 |
|
|
Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
|
| 9486 |
|
|
\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
|
| 9487 |
|
|
.IP "\fB\-mabi=32\fR" 4
|
| 9488 |
|
|
.IX Item "-mabi=32"
|
| 9489 |
|
|
.PD 0
|
| 9490 |
|
|
.IP "\fB\-mabi=o64\fR" 4
|
| 9491 |
|
|
.IX Item "-mabi=o64"
|
| 9492 |
|
|
.IP "\fB\-mabi=n32\fR" 4
|
| 9493 |
|
|
.IX Item "-mabi=n32"
|
| 9494 |
|
|
.IP "\fB\-mabi=64\fR" 4
|
| 9495 |
|
|
.IX Item "-mabi=64"
|
| 9496 |
|
|
.IP "\fB\-mabi=eabi\fR" 4
|
| 9497 |
|
|
.IX Item "-mabi=eabi"
|
| 9498 |
|
|
.PD
|
| 9499 |
|
|
Generate code for the given \s-1ABI\s0.
|
| 9500 |
|
|
.Sp
|
| 9501 |
|
|
Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
|
| 9502 |
|
|
generates 64\-bit code when you select a 64\-bit architecture, but you
|
| 9503 |
|
|
can use \fB\-mgp32\fR to get 32\-bit code instead.
|
| 9504 |
|
|
.Sp
|
| 9505 |
|
|
For information about the O64 \s-1ABI\s0, see
|
| 9506 |
|
|
<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
|
| 9507 |
|
|
.IP "\fB\-mabicalls\fR" 4
|
| 9508 |
|
|
.IX Item "-mabicalls"
|
| 9509 |
|
|
.PD 0
|
| 9510 |
|
|
.IP "\fB\-mno\-abicalls\fR" 4
|
| 9511 |
|
|
.IX Item "-mno-abicalls"
|
| 9512 |
|
|
.PD
|
| 9513 |
|
|
Generate (do not generate) SVR4\-style position-independent code.
|
| 9514 |
|
|
\&\fB\-mabicalls\fR is the default for SVR4\-based systems.
|
| 9515 |
|
|
.IP "\fB\-mxgot\fR" 4
|
| 9516 |
|
|
.IX Item "-mxgot"
|
| 9517 |
|
|
.PD 0
|
| 9518 |
|
|
.IP "\fB\-mno\-xgot\fR" 4
|
| 9519 |
|
|
.IX Item "-mno-xgot"
|
| 9520 |
|
|
.PD
|
| 9521 |
|
|
Lift (do not lift) the usual restrictions on the size of the global
|
| 9522 |
|
|
offset table.
|
| 9523 |
|
|
.Sp
|
| 9524 |
|
|
\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
|
| 9525 |
|
|
While this is relatively efficient, it will only work if the \s-1GOT\s0
|
| 9526 |
|
|
is smaller than about 64k. Anything larger will cause the linker
|
| 9527 |
|
|
to report an error such as:
|
| 9528 |
|
|
.Sp
|
| 9529 |
|
|
.Vb 1
|
| 9530 |
|
|
\& relocation truncated to fit: R_MIPS_GOT16 foobar
|
| 9531 |
|
|
.Ve
|
| 9532 |
|
|
.Sp
|
| 9533 |
|
|
If this happens, you should recompile your code with \fB\-mxgot\fR.
|
| 9534 |
|
|
It should then work with very large GOTs, although it will also be
|
| 9535 |
|
|
less efficient, since it will take three instructions to fetch the
|
| 9536 |
|
|
value of a global symbol.
|
| 9537 |
|
|
.Sp
|
| 9538 |
|
|
Note that some linkers can create multiple GOTs. If you have such a
|
| 9539 |
|
|
linker, you should only need to use \fB\-mxgot\fR when a single object
|
| 9540 |
|
|
file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
|
| 9541 |
|
|
.Sp
|
| 9542 |
|
|
These options have no effect unless \s-1GCC\s0 is generating position
|
| 9543 |
|
|
independent code.
|
| 9544 |
|
|
.IP "\fB\-mgp32\fR" 4
|
| 9545 |
|
|
.IX Item "-mgp32"
|
| 9546 |
|
|
Assume that general-purpose registers are 32 bits wide.
|
| 9547 |
|
|
.IP "\fB\-mgp64\fR" 4
|
| 9548 |
|
|
.IX Item "-mgp64"
|
| 9549 |
|
|
Assume that general-purpose registers are 64 bits wide.
|
| 9550 |
|
|
.IP "\fB\-mfp32\fR" 4
|
| 9551 |
|
|
.IX Item "-mfp32"
|
| 9552 |
|
|
Assume that floating-point registers are 32 bits wide.
|
| 9553 |
|
|
.IP "\fB\-mfp64\fR" 4
|
| 9554 |
|
|
.IX Item "-mfp64"
|
| 9555 |
|
|
Assume that floating-point registers are 64 bits wide.
|
| 9556 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
| 9557 |
|
|
.IX Item "-mhard-float"
|
| 9558 |
|
|
Use floating-point coprocessor instructions.
|
| 9559 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 9560 |
|
|
.IX Item "-msoft-float"
|
| 9561 |
|
|
Do not use floating-point coprocessor instructions. Implement
|
| 9562 |
|
|
floating-point calculations using library calls instead.
|
| 9563 |
|
|
.IP "\fB\-msingle\-float\fR" 4
|
| 9564 |
|
|
.IX Item "-msingle-float"
|
| 9565 |
|
|
Assume that the floating-point coprocessor only supports single-precision
|
| 9566 |
|
|
operations.
|
| 9567 |
|
|
.IP "\fB\-mdouble\-float\fR" 4
|
| 9568 |
|
|
.IX Item "-mdouble-float"
|
| 9569 |
|
|
Assume that the floating-point coprocessor supports double-precision
|
| 9570 |
|
|
operations. This is the default.
|
| 9571 |
|
|
.IP "\fB\-mdsp\fR" 4
|
| 9572 |
|
|
.IX Item "-mdsp"
|
| 9573 |
|
|
.PD 0
|
| 9574 |
|
|
.IP "\fB\-mno\-dsp\fR" 4
|
| 9575 |
|
|
.IX Item "-mno-dsp"
|
| 9576 |
|
|
.PD
|
| 9577 |
|
|
Use (do not use) the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
|
| 9578 |
|
|
.IP "\fB\-mpaired\-single\fR" 4
|
| 9579 |
|
|
.IX Item "-mpaired-single"
|
| 9580 |
|
|
.PD 0
|
| 9581 |
|
|
.IP "\fB\-mno\-paired\-single\fR" 4
|
| 9582 |
|
|
.IX Item "-mno-paired-single"
|
| 9583 |
|
|
.PD
|
| 9584 |
|
|
Use (do not use) paired-single floating-point instructions.
|
| 9585 |
|
|
This option can only be used
|
| 9586 |
|
|
when generating 64\-bit code and requires hardware floating-point
|
| 9587 |
|
|
support to be enabled.
|
| 9588 |
|
|
.IP "\fB\-mips3d\fR" 4
|
| 9589 |
|
|
.IX Item "-mips3d"
|
| 9590 |
|
|
.PD 0
|
| 9591 |
|
|
.IP "\fB\-mno\-mips3d\fR" 4
|
| 9592 |
|
|
.IX Item "-mno-mips3d"
|
| 9593 |
|
|
.PD
|
| 9594 |
|
|
Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
|
| 9595 |
|
|
The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
|
| 9596 |
|
|
.IP "\fB\-mlong64\fR" 4
|
| 9597 |
|
|
.IX Item "-mlong64"
|
| 9598 |
|
|
Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
|
| 9599 |
|
|
an explanation of the default and the way that the pointer size is
|
| 9600 |
|
|
determined.
|
| 9601 |
|
|
.IP "\fB\-mlong32\fR" 4
|
| 9602 |
|
|
.IX Item "-mlong32"
|
| 9603 |
|
|
Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
|
| 9604 |
|
|
.Sp
|
| 9605 |
|
|
The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
|
| 9606 |
|
|
the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
|
| 9607 |
|
|
uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
|
| 9608 |
|
|
32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
|
| 9609 |
|
|
or the same size as integer registers, whichever is smaller.
|
| 9610 |
|
|
.IP "\fB\-msym32\fR" 4
|
| 9611 |
|
|
.IX Item "-msym32"
|
| 9612 |
|
|
.PD 0
|
| 9613 |
|
|
.IP "\fB\-mno\-sym32\fR" 4
|
| 9614 |
|
|
.IX Item "-mno-sym32"
|
| 9615 |
|
|
.PD
|
| 9616 |
|
|
Assume (do not assume) that all symbols have 32\-bit values, regardless
|
| 9617 |
|
|
of the selected \s-1ABI\s0. This option is useful in combination with
|
| 9618 |
|
|
\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
|
| 9619 |
|
|
to generate shorter and faster references to symbolic addresses.
|
| 9620 |
|
|
.IP "\fB\-G\fR \fInum\fR" 4
|
| 9621 |
|
|
.IX Item "-G num"
|
| 9622 |
|
|
Put global and static items less than or equal to \fInum\fR bytes into
|
| 9623 |
|
|
the small data or bss section instead of the normal data or bss section.
|
| 9624 |
|
|
This allows the data to be accessed using a single instruction.
|
| 9625 |
|
|
.Sp
|
| 9626 |
|
|
All modules should be compiled with the same \fB\-G\fR \fInum\fR
|
| 9627 |
|
|
value.
|
| 9628 |
|
|
.IP "\fB\-membedded\-data\fR" 4
|
| 9629 |
|
|
.IX Item "-membedded-data"
|
| 9630 |
|
|
.PD 0
|
| 9631 |
|
|
.IP "\fB\-mno\-embedded\-data\fR" 4
|
| 9632 |
|
|
.IX Item "-mno-embedded-data"
|
| 9633 |
|
|
.PD
|
| 9634 |
|
|
Allocate variables to the read-only data section first if possible, then
|
| 9635 |
|
|
next in the small data section if possible, otherwise in data. This gives
|
| 9636 |
|
|
slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
|
| 9637 |
|
|
when executing, and thus may be preferred for some embedded systems.
|
| 9638 |
|
|
.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
|
| 9639 |
|
|
.IX Item "-muninit-const-in-rodata"
|
| 9640 |
|
|
.PD 0
|
| 9641 |
|
|
.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
|
| 9642 |
|
|
.IX Item "-mno-uninit-const-in-rodata"
|
| 9643 |
|
|
.PD
|
| 9644 |
|
|
Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
|
| 9645 |
|
|
This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
|
| 9646 |
|
|
.IP "\fB\-msplit\-addresses\fR" 4
|
| 9647 |
|
|
.IX Item "-msplit-addresses"
|
| 9648 |
|
|
.PD 0
|
| 9649 |
|
|
.IP "\fB\-mno\-split\-addresses\fR" 4
|
| 9650 |
|
|
.IX Item "-mno-split-addresses"
|
| 9651 |
|
|
.PD
|
| 9652 |
|
|
Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
|
| 9653 |
|
|
relocation operators. This option has been superseded by
|
| 9654 |
|
|
\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
|
| 9655 |
|
|
.IP "\fB\-mexplicit\-relocs\fR" 4
|
| 9656 |
|
|
.IX Item "-mexplicit-relocs"
|
| 9657 |
|
|
.PD 0
|
| 9658 |
|
|
.IP "\fB\-mno\-explicit\-relocs\fR" 4
|
| 9659 |
|
|
.IX Item "-mno-explicit-relocs"
|
| 9660 |
|
|
.PD
|
| 9661 |
|
|
Use (do not use) assembler relocation operators when dealing with symbolic
|
| 9662 |
|
|
addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
|
| 9663 |
|
|
is to use assembler macros instead.
|
| 9664 |
|
|
.Sp
|
| 9665 |
|
|
\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
|
| 9666 |
|
|
to use an assembler that supports relocation operators.
|
| 9667 |
|
|
.IP "\fB\-mcheck\-zero\-division\fR" 4
|
| 9668 |
|
|
.IX Item "-mcheck-zero-division"
|
| 9669 |
|
|
.PD 0
|
| 9670 |
|
|
.IP "\fB\-mno\-check\-zero\-division\fR" 4
|
| 9671 |
|
|
.IX Item "-mno-check-zero-division"
|
| 9672 |
|
|
.PD
|
| 9673 |
|
|
Trap (do not trap) on integer division by zero. The default is
|
| 9674 |
|
|
\&\fB\-mcheck\-zero\-division\fR.
|
| 9675 |
|
|
.IP "\fB\-mdivide\-traps\fR" 4
|
| 9676 |
|
|
.IX Item "-mdivide-traps"
|
| 9677 |
|
|
.PD 0
|
| 9678 |
|
|
.IP "\fB\-mdivide\-breaks\fR" 4
|
| 9679 |
|
|
.IX Item "-mdivide-breaks"
|
| 9680 |
|
|
.PD
|
| 9681 |
|
|
\&\s-1MIPS\s0 systems check for division by zero by generating either a
|
| 9682 |
|
|
conditional trap or a break instruction. Using traps results in
|
| 9683 |
|
|
smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
|
| 9684 |
|
|
versions of the Linux kernel have a bug that prevents trap from
|
| 9685 |
|
|
generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
|
| 9686 |
|
|
allow conditional traps on architectures that support them and
|
| 9687 |
|
|
\&\fB\-mdivide\-breaks\fR to force the use of breaks.
|
| 9688 |
|
|
.Sp
|
| 9689 |
|
|
The default is usually \fB\-mdivide\-traps\fR, but this can be
|
| 9690 |
|
|
overridden at configure time using \fB\-\-with\-divide=breaks\fR.
|
| 9691 |
|
|
Divide-by-zero checks can be completely disabled using
|
| 9692 |
|
|
\&\fB\-mno\-check\-zero\-division\fR.
|
| 9693 |
|
|
.IP "\fB\-mmemcpy\fR" 4
|
| 9694 |
|
|
.IX Item "-mmemcpy"
|
| 9695 |
|
|
.PD 0
|
| 9696 |
|
|
.IP "\fB\-mno\-memcpy\fR" 4
|
| 9697 |
|
|
.IX Item "-mno-memcpy"
|
| 9698 |
|
|
.PD
|
| 9699 |
|
|
Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
|
| 9700 |
|
|
moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
|
| 9701 |
|
|
most constant-sized copies.
|
| 9702 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 9703 |
|
|
.IX Item "-mlong-calls"
|
| 9704 |
|
|
.PD 0
|
| 9705 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
| 9706 |
|
|
.IX Item "-mno-long-calls"
|
| 9707 |
|
|
.PD
|
| 9708 |
|
|
Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
|
| 9709 |
|
|
functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
|
| 9710 |
|
|
and callee to be in the same 256 megabyte segment.
|
| 9711 |
|
|
.Sp
|
| 9712 |
|
|
This option has no effect on abicalls code. The default is
|
| 9713 |
|
|
\&\fB\-mno\-long\-calls\fR.
|
| 9714 |
|
|
.IP "\fB\-mmad\fR" 4
|
| 9715 |
|
|
.IX Item "-mmad"
|
| 9716 |
|
|
.PD 0
|
| 9717 |
|
|
.IP "\fB\-mno\-mad\fR" 4
|
| 9718 |
|
|
.IX Item "-mno-mad"
|
| 9719 |
|
|
.PD
|
| 9720 |
|
|
Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
|
| 9721 |
|
|
instructions, as provided by the R4650 \s-1ISA\s0.
|
| 9722 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
| 9723 |
|
|
.IX Item "-mfused-madd"
|
| 9724 |
|
|
.PD 0
|
| 9725 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
| 9726 |
|
|
.IX Item "-mno-fused-madd"
|
| 9727 |
|
|
.PD
|
| 9728 |
|
|
Enable (disable) use of the floating point multiply-accumulate
|
| 9729 |
|
|
instructions, when they are available. The default is
|
| 9730 |
|
|
\&\fB\-mfused\-madd\fR.
|
| 9731 |
|
|
.Sp
|
| 9732 |
|
|
When multiply-accumulate instructions are used, the intermediate
|
| 9733 |
|
|
product is calculated to infinite precision and is not subject to
|
| 9734 |
|
|
the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
|
| 9735 |
|
|
circumstances.
|
| 9736 |
|
|
.IP "\fB\-nocpp\fR" 4
|
| 9737 |
|
|
.IX Item "-nocpp"
|
| 9738 |
|
|
Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
|
| 9739 |
|
|
assembler files (with a \fB.s\fR suffix) when assembling them.
|
| 9740 |
|
|
.IP "\fB\-mfix\-r4000\fR" 4
|
| 9741 |
|
|
.IX Item "-mfix-r4000"
|
| 9742 |
|
|
.PD 0
|
| 9743 |
|
|
.IP "\fB\-mno\-fix\-r4000\fR" 4
|
| 9744 |
|
|
.IX Item "-mno-fix-r4000"
|
| 9745 |
|
|
.PD
|
| 9746 |
|
|
Work around certain R4000 \s-1CPU\s0 errata:
|
| 9747 |
|
|
.RS 4
|
| 9748 |
|
|
.IP "\-" 4
|
| 9749 |
|
|
A double-word or a variable shift may give an incorrect result if executed
|
| 9750 |
|
|
immediately after starting an integer division.
|
| 9751 |
|
|
.IP "\-" 4
|
| 9752 |
|
|
A double-word or a variable shift may give an incorrect result if executed
|
| 9753 |
|
|
while an integer multiplication is in progress.
|
| 9754 |
|
|
.IP "\-" 4
|
| 9755 |
|
|
An integer division may give an incorrect result if started in a delay slot
|
| 9756 |
|
|
of a taken branch or a jump.
|
| 9757 |
|
|
.RE
|
| 9758 |
|
|
.RS 4
|
| 9759 |
|
|
.RE
|
| 9760 |
|
|
.IP "\fB\-mfix\-r4400\fR" 4
|
| 9761 |
|
|
.IX Item "-mfix-r4400"
|
| 9762 |
|
|
.PD 0
|
| 9763 |
|
|
.IP "\fB\-mno\-fix\-r4400\fR" 4
|
| 9764 |
|
|
.IX Item "-mno-fix-r4400"
|
| 9765 |
|
|
.PD
|
| 9766 |
|
|
Work around certain R4400 \s-1CPU\s0 errata:
|
| 9767 |
|
|
.RS 4
|
| 9768 |
|
|
.IP "\-" 4
|
| 9769 |
|
|
A double-word or a variable shift may give an incorrect result if executed
|
| 9770 |
|
|
immediately after starting an integer division.
|
| 9771 |
|
|
.RE
|
| 9772 |
|
|
.RS 4
|
| 9773 |
|
|
.RE
|
| 9774 |
|
|
.IP "\fB\-mfix\-vr4120\fR" 4
|
| 9775 |
|
|
.IX Item "-mfix-vr4120"
|
| 9776 |
|
|
.PD 0
|
| 9777 |
|
|
.IP "\fB\-mno\-fix\-vr4120\fR" 4
|
| 9778 |
|
|
.IX Item "-mno-fix-vr4120"
|
| 9779 |
|
|
.PD
|
| 9780 |
|
|
Work around certain \s-1VR4120\s0 errata:
|
| 9781 |
|
|
.RS 4
|
| 9782 |
|
|
.IP "\-" 4
|
| 9783 |
|
|
\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
|
| 9784 |
|
|
.IP "\-" 4
|
| 9785 |
|
|
\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
|
| 9786 |
|
|
of the operands is negative.
|
| 9787 |
|
|
.RE
|
| 9788 |
|
|
.RS 4
|
| 9789 |
|
|
.Sp
|
| 9790 |
|
|
The workarounds for the division errata rely on special functions in
|
| 9791 |
|
|
\&\fIlibgcc.a\fR. At present, these functions are only provided by
|
| 9792 |
|
|
the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
|
| 9793 |
|
|
.Sp
|
| 9794 |
|
|
Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
|
| 9795 |
|
|
instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
|
| 9796 |
|
|
.RE
|
| 9797 |
|
|
.IP "\fB\-mfix\-vr4130\fR" 4
|
| 9798 |
|
|
.IX Item "-mfix-vr4130"
|
| 9799 |
|
|
Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
|
| 9800 |
|
|
workarounds are implemented by the assembler rather than by \s-1GCC\s0,
|
| 9801 |
|
|
although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
|
| 9802 |
|
|
\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
|
| 9803 |
|
|
instructions are available instead.
|
| 9804 |
|
|
.IP "\fB\-mfix\-sb1\fR" 4
|
| 9805 |
|
|
.IX Item "-mfix-sb1"
|
| 9806 |
|
|
.PD 0
|
| 9807 |
|
|
.IP "\fB\-mno\-fix\-sb1\fR" 4
|
| 9808 |
|
|
.IX Item "-mno-fix-sb1"
|
| 9809 |
|
|
.PD
|
| 9810 |
|
|
Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
|
| 9811 |
|
|
(This flag currently works around the \s-1SB\-1\s0 revision 2
|
| 9812 |
|
|
\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
|
| 9813 |
|
|
.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
|
| 9814 |
|
|
.IX Item "-mflush-func=func"
|
| 9815 |
|
|
.PD 0
|
| 9816 |
|
|
.IP "\fB\-mno\-flush\-func\fR" 4
|
| 9817 |
|
|
.IX Item "-mno-flush-func"
|
| 9818 |
|
|
.PD
|
| 9819 |
|
|
Specifies the function to call to flush the I and D caches, or to not
|
| 9820 |
|
|
call any such function. If called, the function must take the same
|
| 9821 |
|
|
arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
|
| 9822 |
|
|
memory range for which the cache is being flushed, the size of the
|
| 9823 |
|
|
memory range, and the number 3 (to flush both caches). The default
|
| 9824 |
|
|
depends on the target \s-1GCC\s0 was configured for, but commonly is either
|
| 9825 |
|
|
\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
|
| 9826 |
|
|
.IP "\fB\-mbranch\-likely\fR" 4
|
| 9827 |
|
|
.IX Item "-mbranch-likely"
|
| 9828 |
|
|
.PD 0
|
| 9829 |
|
|
.IP "\fB\-mno\-branch\-likely\fR" 4
|
| 9830 |
|
|
.IX Item "-mno-branch-likely"
|
| 9831 |
|
|
.PD
|
| 9832 |
|
|
Enable or disable use of Branch Likely instructions, regardless of the
|
| 9833 |
|
|
default for the selected architecture. By default, Branch Likely
|
| 9834 |
|
|
instructions may be generated if they are supported by the selected
|
| 9835 |
|
|
architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
|
| 9836 |
|
|
and processors which implement those architectures; for those, Branch
|
| 9837 |
|
|
Likely instructions will not be generated by default because the \s-1MIPS32\s0
|
| 9838 |
|
|
and \s-1MIPS64\s0 architectures specifically deprecate their use.
|
| 9839 |
|
|
.IP "\fB\-mfp\-exceptions\fR" 4
|
| 9840 |
|
|
.IX Item "-mfp-exceptions"
|
| 9841 |
|
|
.PD 0
|
| 9842 |
|
|
.IP "\fB\-mno\-fp\-exceptions\fR" 4
|
| 9843 |
|
|
.IX Item "-mno-fp-exceptions"
|
| 9844 |
|
|
.PD
|
| 9845 |
|
|
Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
|
| 9846 |
|
|
\&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
|
| 9847 |
|
|
enabled.
|
| 9848 |
|
|
.Sp
|
| 9849 |
|
|
For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
|
| 9850 |
|
|
64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
|
| 9851 |
|
|
\&\s-1FP\s0 pipe.
|
| 9852 |
|
|
.IP "\fB\-mvr4130\-align\fR" 4
|
| 9853 |
|
|
.IX Item "-mvr4130-align"
|
| 9854 |
|
|
.PD 0
|
| 9855 |
|
|
.IP "\fB\-mno\-vr4130\-align\fR" 4
|
| 9856 |
|
|
.IX Item "-mno-vr4130-align"
|
| 9857 |
|
|
.PD
|
| 9858 |
|
|
The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
|
| 9859 |
|
|
instructions together if the first one is 8\-byte aligned. When this
|
| 9860 |
|
|
option is enabled, \s-1GCC\s0 will align pairs of instructions that it
|
| 9861 |
|
|
thinks should execute in parallel.
|
| 9862 |
|
|
.Sp
|
| 9863 |
|
|
This option only has an effect when optimizing for the \s-1VR4130\s0.
|
| 9864 |
|
|
It normally makes code faster, but at the expense of making it bigger.
|
| 9865 |
|
|
It is enabled by default at optimization level \fB\-O3\fR.
|
| 9866 |
|
|
.PP
|
| 9867 |
|
|
\fI\s-1MMIX\s0 Options\fR
|
| 9868 |
|
|
.IX Subsection "MMIX Options"
|
| 9869 |
|
|
.PP
|
| 9870 |
|
|
These options are defined for the \s-1MMIX:\s0
|
| 9871 |
|
|
.IP "\fB\-mlibfuncs\fR" 4
|
| 9872 |
|
|
.IX Item "-mlibfuncs"
|
| 9873 |
|
|
.PD 0
|
| 9874 |
|
|
.IP "\fB\-mno\-libfuncs\fR" 4
|
| 9875 |
|
|
.IX Item "-mno-libfuncs"
|
| 9876 |
|
|
.PD
|
| 9877 |
|
|
Specify that intrinsic library functions are being compiled, passing all
|
| 9878 |
|
|
values in registers, no matter the size.
|
| 9879 |
|
|
.IP "\fB\-mepsilon\fR" 4
|
| 9880 |
|
|
.IX Item "-mepsilon"
|
| 9881 |
|
|
.PD 0
|
| 9882 |
|
|
.IP "\fB\-mno\-epsilon\fR" 4
|
| 9883 |
|
|
.IX Item "-mno-epsilon"
|
| 9884 |
|
|
.PD
|
| 9885 |
|
|
Generate floating-point comparison instructions that compare with respect
|
| 9886 |
|
|
to the \f(CW\*(C`rE\*(C'\fR epsilon register.
|
| 9887 |
|
|
.IP "\fB\-mabi=mmixware\fR" 4
|
| 9888 |
|
|
.IX Item "-mabi=mmixware"
|
| 9889 |
|
|
.PD 0
|
| 9890 |
|
|
.IP "\fB\-mabi=gnu\fR" 4
|
| 9891 |
|
|
.IX Item "-mabi=gnu"
|
| 9892 |
|
|
.PD
|
| 9893 |
|
|
Generate code that passes function parameters and return values that (in
|
| 9894 |
|
|
the called function) are seen as registers \f(CW$0\fR and up, as opposed to
|
| 9895 |
|
|
the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
|
| 9896 |
|
|
.IP "\fB\-mzero\-extend\fR" 4
|
| 9897 |
|
|
.IX Item "-mzero-extend"
|
| 9898 |
|
|
.PD 0
|
| 9899 |
|
|
.IP "\fB\-mno\-zero\-extend\fR" 4
|
| 9900 |
|
|
.IX Item "-mno-zero-extend"
|
| 9901 |
|
|
.PD
|
| 9902 |
|
|
When reading data from memory in sizes shorter than 64 bits, use (do not
|
| 9903 |
|
|
use) zero-extending load instructions by default, rather than
|
| 9904 |
|
|
sign-extending ones.
|
| 9905 |
|
|
.IP "\fB\-mknuthdiv\fR" 4
|
| 9906 |
|
|
.IX Item "-mknuthdiv"
|
| 9907 |
|
|
.PD 0
|
| 9908 |
|
|
.IP "\fB\-mno\-knuthdiv\fR" 4
|
| 9909 |
|
|
.IX Item "-mno-knuthdiv"
|
| 9910 |
|
|
.PD
|
| 9911 |
|
|
Make the result of a division yielding a remainder have the same sign as
|
| 9912 |
|
|
the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
|
| 9913 |
|
|
remainder follows the sign of the dividend. Both methods are
|
| 9914 |
|
|
arithmetically valid, the latter being almost exclusively used.
|
| 9915 |
|
|
.IP "\fB\-mtoplevel\-symbols\fR" 4
|
| 9916 |
|
|
.IX Item "-mtoplevel-symbols"
|
| 9917 |
|
|
.PD 0
|
| 9918 |
|
|
.IP "\fB\-mno\-toplevel\-symbols\fR" 4
|
| 9919 |
|
|
.IX Item "-mno-toplevel-symbols"
|
| 9920 |
|
|
.PD
|
| 9921 |
|
|
Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
|
| 9922 |
|
|
code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
|
| 9923 |
|
|
.IP "\fB\-melf\fR" 4
|
| 9924 |
|
|
.IX Item "-melf"
|
| 9925 |
|
|
Generate an executable in the \s-1ELF\s0 format, rather than the default
|
| 9926 |
|
|
\&\fBmmo\fR format used by the \fBmmix\fR simulator.
|
| 9927 |
|
|
.IP "\fB\-mbranch\-predict\fR" 4
|
| 9928 |
|
|
.IX Item "-mbranch-predict"
|
| 9929 |
|
|
.PD 0
|
| 9930 |
|
|
.IP "\fB\-mno\-branch\-predict\fR" 4
|
| 9931 |
|
|
.IX Item "-mno-branch-predict"
|
| 9932 |
|
|
.PD
|
| 9933 |
|
|
Use (do not use) the probable-branch instructions, when static branch
|
| 9934 |
|
|
prediction indicates a probable branch.
|
| 9935 |
|
|
.IP "\fB\-mbase\-addresses\fR" 4
|
| 9936 |
|
|
.IX Item "-mbase-addresses"
|
| 9937 |
|
|
.PD 0
|
| 9938 |
|
|
.IP "\fB\-mno\-base\-addresses\fR" 4
|
| 9939 |
|
|
.IX Item "-mno-base-addresses"
|
| 9940 |
|
|
.PD
|
| 9941 |
|
|
Generate (do not generate) code that uses \fIbase addresses\fR. Using a
|
| 9942 |
|
|
base address automatically generates a request (handled by the assembler
|
| 9943 |
|
|
and the linker) for a constant to be set up in a global register. The
|
| 9944 |
|
|
register is used for one or more base address requests within the range 0
|
| 9945 |
|
|
to 255 from the value held in the register. The generally leads to short
|
| 9946 |
|
|
and fast code, but the number of different data items that can be
|
| 9947 |
|
|
addressed is limited. This means that a program that uses lots of static
|
| 9948 |
|
|
data may require \fB\-mno\-base\-addresses\fR.
|
| 9949 |
|
|
.IP "\fB\-msingle\-exit\fR" 4
|
| 9950 |
|
|
.IX Item "-msingle-exit"
|
| 9951 |
|
|
.PD 0
|
| 9952 |
|
|
.IP "\fB\-mno\-single\-exit\fR" 4
|
| 9953 |
|
|
.IX Item "-mno-single-exit"
|
| 9954 |
|
|
.PD
|
| 9955 |
|
|
Force (do not force) generated code to have a single exit point in each
|
| 9956 |
|
|
function.
|
| 9957 |
|
|
.PP
|
| 9958 |
|
|
\fI\s-1MN10300\s0 Options\fR
|
| 9959 |
|
|
.IX Subsection "MN10300 Options"
|
| 9960 |
|
|
.PP
|
| 9961 |
|
|
These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
|
| 9962 |
|
|
.IP "\fB\-mmult\-bug\fR" 4
|
| 9963 |
|
|
.IX Item "-mmult-bug"
|
| 9964 |
|
|
Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
|
| 9965 |
|
|
processors. This is the default.
|
| 9966 |
|
|
.IP "\fB\-mno\-mult\-bug\fR" 4
|
| 9967 |
|
|
.IX Item "-mno-mult-bug"
|
| 9968 |
|
|
Do not generate code to avoid bugs in the multiply instructions for the
|
| 9969 |
|
|
\&\s-1MN10300\s0 processors.
|
| 9970 |
|
|
.IP "\fB\-mam33\fR" 4
|
| 9971 |
|
|
.IX Item "-mam33"
|
| 9972 |
|
|
Generate code which uses features specific to the \s-1AM33\s0 processor.
|
| 9973 |
|
|
.IP "\fB\-mno\-am33\fR" 4
|
| 9974 |
|
|
.IX Item "-mno-am33"
|
| 9975 |
|
|
Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
|
| 9976 |
|
|
is the default.
|
| 9977 |
|
|
.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
|
| 9978 |
|
|
.IX Item "-mreturn-pointer-on-d0"
|
| 9979 |
|
|
When generating a function which returns a pointer, return the pointer
|
| 9980 |
|
|
in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
|
| 9981 |
|
|
only in a0, and attempts to call such functions without a prototype
|
| 9982 |
|
|
would result in errors. Note that this option is on by default; use
|
| 9983 |
|
|
\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
|
| 9984 |
|
|
.IP "\fB\-mno\-crt0\fR" 4
|
| 9985 |
|
|
.IX Item "-mno-crt0"
|
| 9986 |
|
|
Do not link in the C run-time initialization object file.
|
| 9987 |
|
|
.IP "\fB\-mrelax\fR" 4
|
| 9988 |
|
|
.IX Item "-mrelax"
|
| 9989 |
|
|
Indicate to the linker that it should perform a relaxation optimization pass
|
| 9990 |
|
|
to shorten branches, calls and absolute memory addresses. This option only
|
| 9991 |
|
|
has an effect when used on the command line for the final link step.
|
| 9992 |
|
|
.Sp
|
| 9993 |
|
|
This option makes symbolic debugging impossible.
|
| 9994 |
|
|
.PP
|
| 9995 |
|
|
\fI\s-1MT\s0 Options\fR
|
| 9996 |
|
|
.IX Subsection "MT Options"
|
| 9997 |
|
|
.PP
|
| 9998 |
|
|
These \fB\-m\fR options are defined for Morpho \s-1MT\s0 architectures:
|
| 9999 |
|
|
.IP "\fB\-march=\fR\fIcpu-type\fR" 4
|
| 10000 |
|
|
.IX Item "-march=cpu-type"
|
| 10001 |
|
|
Generate code that will run on \fIcpu-type\fR, which is the name of a system
|
| 10002 |
|
|
representing a certain processor type. Possible values for
|
| 10003 |
|
|
\&\fIcpu-type\fR are \fBms1\-64\-001\fR, \fBms1\-16\-002\fR,
|
| 10004 |
|
|
\&\fBms1\-16\-003\fR and \fBms2\fR.
|
| 10005 |
|
|
.Sp
|
| 10006 |
|
|
When this option is not used, the default is \fB\-march=ms1\-16\-002\fR.
|
| 10007 |
|
|
.IP "\fB\-mbacc\fR" 4
|
| 10008 |
|
|
.IX Item "-mbacc"
|
| 10009 |
|
|
Use byte loads and stores when generating code.
|
| 10010 |
|
|
.IP "\fB\-mno\-bacc\fR" 4
|
| 10011 |
|
|
.IX Item "-mno-bacc"
|
| 10012 |
|
|
Do not use byte loads and stores when generating code.
|
| 10013 |
|
|
.IP "\fB\-msim\fR" 4
|
| 10014 |
|
|
.IX Item "-msim"
|
| 10015 |
|
|
Use simulator runtime
|
| 10016 |
|
|
.IP "\fB\-mno\-crt0\fR" 4
|
| 10017 |
|
|
.IX Item "-mno-crt0"
|
| 10018 |
|
|
Do not link in the C run-time initialization object file
|
| 10019 |
|
|
\&\fIcrti.o\fR. Other run-time initialization and termination files
|
| 10020 |
|
|
such as \fIstartup.o\fR and \fIexit.o\fR are still included on the
|
| 10021 |
|
|
linker command line.
|
| 10022 |
|
|
.PP
|
| 10023 |
|
|
\fI\s-1PDP\-11\s0 Options\fR
|
| 10024 |
|
|
.IX Subsection "PDP-11 Options"
|
| 10025 |
|
|
.PP
|
| 10026 |
|
|
These options are defined for the \s-1PDP\-11:\s0
|
| 10027 |
|
|
.IP "\fB\-mfpu\fR" 4
|
| 10028 |
|
|
.IX Item "-mfpu"
|
| 10029 |
|
|
Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
|
| 10030 |
|
|
point on the \s-1PDP\-11/40\s0 is not supported.)
|
| 10031 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 10032 |
|
|
.IX Item "-msoft-float"
|
| 10033 |
|
|
Do not use hardware floating point.
|
| 10034 |
|
|
.IP "\fB\-mac0\fR" 4
|
| 10035 |
|
|
.IX Item "-mac0"
|
| 10036 |
|
|
Return floating-point results in ac0 (fr0 in Unix assembler syntax).
|
| 10037 |
|
|
.IP "\fB\-mno\-ac0\fR" 4
|
| 10038 |
|
|
.IX Item "-mno-ac0"
|
| 10039 |
|
|
Return floating-point results in memory. This is the default.
|
| 10040 |
|
|
.IP "\fB\-m40\fR" 4
|
| 10041 |
|
|
.IX Item "-m40"
|
| 10042 |
|
|
Generate code for a \s-1PDP\-11/40\s0.
|
| 10043 |
|
|
.IP "\fB\-m45\fR" 4
|
| 10044 |
|
|
.IX Item "-m45"
|
| 10045 |
|
|
Generate code for a \s-1PDP\-11/45\s0. This is the default.
|
| 10046 |
|
|
.IP "\fB\-m10\fR" 4
|
| 10047 |
|
|
.IX Item "-m10"
|
| 10048 |
|
|
Generate code for a \s-1PDP\-11/10\s0.
|
| 10049 |
|
|
.IP "\fB\-mbcopy\-builtin\fR" 4
|
| 10050 |
|
|
.IX Item "-mbcopy-builtin"
|
| 10051 |
|
|
Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
|
| 10052 |
|
|
default.
|
| 10053 |
|
|
.IP "\fB\-mbcopy\fR" 4
|
| 10054 |
|
|
.IX Item "-mbcopy"
|
| 10055 |
|
|
Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
|
| 10056 |
|
|
.IP "\fB\-mint16\fR" 4
|
| 10057 |
|
|
.IX Item "-mint16"
|
| 10058 |
|
|
.PD 0
|
| 10059 |
|
|
.IP "\fB\-mno\-int32\fR" 4
|
| 10060 |
|
|
.IX Item "-mno-int32"
|
| 10061 |
|
|
.PD
|
| 10062 |
|
|
Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
|
| 10063 |
|
|
.IP "\fB\-mint32\fR" 4
|
| 10064 |
|
|
.IX Item "-mint32"
|
| 10065 |
|
|
.PD 0
|
| 10066 |
|
|
.IP "\fB\-mno\-int16\fR" 4
|
| 10067 |
|
|
.IX Item "-mno-int16"
|
| 10068 |
|
|
.PD
|
| 10069 |
|
|
Use 32\-bit \f(CW\*(C`int\*(C'\fR.
|
| 10070 |
|
|
.IP "\fB\-mfloat64\fR" 4
|
| 10071 |
|
|
.IX Item "-mfloat64"
|
| 10072 |
|
|
.PD 0
|
| 10073 |
|
|
.IP "\fB\-mno\-float32\fR" 4
|
| 10074 |
|
|
.IX Item "-mno-float32"
|
| 10075 |
|
|
.PD
|
| 10076 |
|
|
Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
|
| 10077 |
|
|
.IP "\fB\-mfloat32\fR" 4
|
| 10078 |
|
|
.IX Item "-mfloat32"
|
| 10079 |
|
|
.PD 0
|
| 10080 |
|
|
.IP "\fB\-mno\-float64\fR" 4
|
| 10081 |
|
|
.IX Item "-mno-float64"
|
| 10082 |
|
|
.PD
|
| 10083 |
|
|
Use 32\-bit \f(CW\*(C`float\*(C'\fR.
|
| 10084 |
|
|
.IP "\fB\-mabshi\fR" 4
|
| 10085 |
|
|
.IX Item "-mabshi"
|
| 10086 |
|
|
Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
|
| 10087 |
|
|
.IP "\fB\-mno\-abshi\fR" 4
|
| 10088 |
|
|
.IX Item "-mno-abshi"
|
| 10089 |
|
|
Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
|
| 10090 |
|
|
.IP "\fB\-mbranch\-expensive\fR" 4
|
| 10091 |
|
|
.IX Item "-mbranch-expensive"
|
| 10092 |
|
|
Pretend that branches are expensive. This is for experimenting with
|
| 10093 |
|
|
code generation only.
|
| 10094 |
|
|
.IP "\fB\-mbranch\-cheap\fR" 4
|
| 10095 |
|
|
.IX Item "-mbranch-cheap"
|
| 10096 |
|
|
Do not pretend that branches are expensive. This is the default.
|
| 10097 |
|
|
.IP "\fB\-msplit\fR" 4
|
| 10098 |
|
|
.IX Item "-msplit"
|
| 10099 |
|
|
Generate code for a system with split I&D.
|
| 10100 |
|
|
.IP "\fB\-mno\-split\fR" 4
|
| 10101 |
|
|
.IX Item "-mno-split"
|
| 10102 |
|
|
Generate code for a system without split I&D. This is the default.
|
| 10103 |
|
|
.IP "\fB\-munix\-asm\fR" 4
|
| 10104 |
|
|
.IX Item "-munix-asm"
|
| 10105 |
|
|
Use Unix assembler syntax. This is the default when configured for
|
| 10106 |
|
|
\&\fBpdp11\-*\-bsd\fR.
|
| 10107 |
|
|
.IP "\fB\-mdec\-asm\fR" 4
|
| 10108 |
|
|
.IX Item "-mdec-asm"
|
| 10109 |
|
|
Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
|
| 10110 |
|
|
\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
|
| 10111 |
|
|
.PP
|
| 10112 |
|
|
\fIPowerPC Options\fR
|
| 10113 |
|
|
.IX Subsection "PowerPC Options"
|
| 10114 |
|
|
.PP
|
| 10115 |
|
|
These are listed under
|
| 10116 |
|
|
.PP
|
| 10117 |
|
|
\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
|
| 10118 |
|
|
.IX Subsection "IBM RS/6000 and PowerPC Options"
|
| 10119 |
|
|
.PP
|
| 10120 |
|
|
These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
|
| 10121 |
|
|
.IP "\fB\-mpower\fR" 4
|
| 10122 |
|
|
.IX Item "-mpower"
|
| 10123 |
|
|
.PD 0
|
| 10124 |
|
|
.IP "\fB\-mno\-power\fR" 4
|
| 10125 |
|
|
.IX Item "-mno-power"
|
| 10126 |
|
|
.IP "\fB\-mpower2\fR" 4
|
| 10127 |
|
|
.IX Item "-mpower2"
|
| 10128 |
|
|
.IP "\fB\-mno\-power2\fR" 4
|
| 10129 |
|
|
.IX Item "-mno-power2"
|
| 10130 |
|
|
.IP "\fB\-mpowerpc\fR" 4
|
| 10131 |
|
|
.IX Item "-mpowerpc"
|
| 10132 |
|
|
.IP "\fB\-mno\-powerpc\fR" 4
|
| 10133 |
|
|
.IX Item "-mno-powerpc"
|
| 10134 |
|
|
.IP "\fB\-mpowerpc\-gpopt\fR" 4
|
| 10135 |
|
|
.IX Item "-mpowerpc-gpopt"
|
| 10136 |
|
|
.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
|
| 10137 |
|
|
.IX Item "-mno-powerpc-gpopt"
|
| 10138 |
|
|
.IP "\fB\-mpowerpc\-gfxopt\fR" 4
|
| 10139 |
|
|
.IX Item "-mpowerpc-gfxopt"
|
| 10140 |
|
|
.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
|
| 10141 |
|
|
.IX Item "-mno-powerpc-gfxopt"
|
| 10142 |
|
|
.IP "\fB\-mpowerpc64\fR" 4
|
| 10143 |
|
|
.IX Item "-mpowerpc64"
|
| 10144 |
|
|
.IP "\fB\-mno\-powerpc64\fR" 4
|
| 10145 |
|
|
.IX Item "-mno-powerpc64"
|
| 10146 |
|
|
.IP "\fB\-mmfcrf\fR" 4
|
| 10147 |
|
|
.IX Item "-mmfcrf"
|
| 10148 |
|
|
.IP "\fB\-mno\-mfcrf\fR" 4
|
| 10149 |
|
|
.IX Item "-mno-mfcrf"
|
| 10150 |
|
|
.IP "\fB\-mpopcntb\fR" 4
|
| 10151 |
|
|
.IX Item "-mpopcntb"
|
| 10152 |
|
|
.IP "\fB\-mno\-popcntb\fR" 4
|
| 10153 |
|
|
.IX Item "-mno-popcntb"
|
| 10154 |
|
|
.IP "\fB\-mfprnd\fR" 4
|
| 10155 |
|
|
.IX Item "-mfprnd"
|
| 10156 |
|
|
.IP "\fB\-mno\-fprnd\fR" 4
|
| 10157 |
|
|
.IX Item "-mno-fprnd"
|
| 10158 |
|
|
.PD
|
| 10159 |
|
|
\&\s-1GCC\s0 supports two related instruction set architectures for the
|
| 10160 |
|
|
\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
|
| 10161 |
|
|
instructions supported by the \fBrios\fR chip set used in the original
|
| 10162 |
|
|
\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
|
| 10163 |
|
|
architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
|
| 10164 |
|
|
the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
|
| 10165 |
|
|
.Sp
|
| 10166 |
|
|
Neither architecture is a subset of the other. However there is a
|
| 10167 |
|
|
large common subset of instructions supported by both. An \s-1MQ\s0
|
| 10168 |
|
|
register is included in processors supporting the \s-1POWER\s0 architecture.
|
| 10169 |
|
|
.Sp
|
| 10170 |
|
|
You use these options to specify which instructions are available on the
|
| 10171 |
|
|
processor you are using. The default value of these options is
|
| 10172 |
|
|
determined when configuring \s-1GCC\s0. Specifying the
|
| 10173 |
|
|
\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
|
| 10174 |
|
|
options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
|
| 10175 |
|
|
rather than the options listed above.
|
| 10176 |
|
|
.Sp
|
| 10177 |
|
|
The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
|
| 10178 |
|
|
are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
|
| 10179 |
|
|
Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
|
| 10180 |
|
|
to generate instructions that are present in the \s-1POWER2\s0 architecture but
|
| 10181 |
|
|
not the original \s-1POWER\s0 architecture.
|
| 10182 |
|
|
.Sp
|
| 10183 |
|
|
The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
|
| 10184 |
|
|
are found only in the 32\-bit subset of the PowerPC architecture.
|
| 10185 |
|
|
Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
|
| 10186 |
|
|
\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
|
| 10187 |
|
|
General Purpose group, including floating-point square root. Specifying
|
| 10188 |
|
|
\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
|
| 10189 |
|
|
use the optional PowerPC architecture instructions in the Graphics
|
| 10190 |
|
|
group, including floating-point select.
|
| 10191 |
|
|
.Sp
|
| 10192 |
|
|
The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
|
| 10193 |
|
|
condition register field instruction implemented on the \s-1POWER4\s0
|
| 10194 |
|
|
processor and other processors that support the PowerPC V2.01
|
| 10195 |
|
|
architecture.
|
| 10196 |
|
|
The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
|
| 10197 |
|
|
double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
|
| 10198 |
|
|
\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
|
| 10199 |
|
|
architecture.
|
| 10200 |
|
|
The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
|
| 10201 |
|
|
integer instructions implemented on the \s-1POWER5+\s0 processor and other
|
| 10202 |
|
|
processors that support the PowerPC V2.03 architecture.
|
| 10203 |
|
|
.Sp
|
| 10204 |
|
|
The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
|
| 10205 |
|
|
64\-bit instructions that are found in the full PowerPC64 architecture
|
| 10206 |
|
|
and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
|
| 10207 |
|
|
\&\fB\-mno\-powerpc64\fR.
|
| 10208 |
|
|
.Sp
|
| 10209 |
|
|
If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
|
| 10210 |
|
|
will use only the instructions in the common subset of both
|
| 10211 |
|
|
architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
|
| 10212 |
|
|
the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
|
| 10213 |
|
|
permits \s-1GCC\s0 to use any instruction from either architecture and to
|
| 10214 |
|
|
allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
|
| 10215 |
|
|
.IP "\fB\-mnew\-mnemonics\fR" 4
|
| 10216 |
|
|
.IX Item "-mnew-mnemonics"
|
| 10217 |
|
|
.PD 0
|
| 10218 |
|
|
.IP "\fB\-mold\-mnemonics\fR" 4
|
| 10219 |
|
|
.IX Item "-mold-mnemonics"
|
| 10220 |
|
|
.PD
|
| 10221 |
|
|
Select which mnemonics to use in the generated assembler code. With
|
| 10222 |
|
|
\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
|
| 10223 |
|
|
the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
|
| 10224 |
|
|
assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
|
| 10225 |
|
|
defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
|
| 10226 |
|
|
mnemonic irrespective of which of these options is specified.
|
| 10227 |
|
|
.Sp
|
| 10228 |
|
|
\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
|
| 10229 |
|
|
use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
|
| 10230 |
|
|
value of these option. Unless you are building a cross\-compiler, you
|
| 10231 |
|
|
should normally not specify either \fB\-mnew\-mnemonics\fR or
|
| 10232 |
|
|
\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
|
| 10233 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
| 10234 |
|
|
.IX Item "-mcpu=cpu_type"
|
| 10235 |
|
|
Set architecture type, register usage, choice of mnemonics, and
|
| 10236 |
|
|
instruction scheduling parameters for machine type \fIcpu_type\fR.
|
| 10237 |
|
|
Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
|
| 10238 |
|
|
\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB505\fR,
|
| 10239 |
|
|
\&\fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
|
| 10240 |
|
|
\&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
|
| 10241 |
|
|
\&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
|
| 10242 |
|
|
\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBec603e\fR, \fBG3\fR,
|
| 10243 |
|
|
\&\fBG4\fR, \fBG5\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR,
|
| 10244 |
|
|
\&\fBpower4\fR, \fBpower5\fR, \fBpower5+\fR,
|
| 10245 |
|
|
\&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR,
|
| 10246 |
|
|
\&\fBrios\fR, \fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
|
| 10247 |
|
|
.Sp
|
| 10248 |
|
|
\&\fB\-mcpu=common\fR selects a completely generic processor. Code
|
| 10249 |
|
|
generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
|
| 10250 |
|
|
\&\s-1GCC\s0 will use only the instructions in the common subset of both
|
| 10251 |
|
|
architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
|
| 10252 |
|
|
processor model for scheduling purposes.
|
| 10253 |
|
|
.Sp
|
| 10254 |
|
|
\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
|
| 10255 |
|
|
\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
|
| 10256 |
|
|
PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
|
| 10257 |
|
|
types, with an appropriate, generic processor model assumed for
|
| 10258 |
|
|
scheduling purposes.
|
| 10259 |
|
|
.Sp
|
| 10260 |
|
|
The other options specify a specific processor. Code generated under
|
| 10261 |
|
|
those options will run best on that processor, and may not run at all on
|
| 10262 |
|
|
others.
|
| 10263 |
|
|
.Sp
|
| 10264 |
|
|
The \fB\-mcpu\fR options automatically enable or disable the
|
| 10265 |
|
|
following options: \fB\-maltivec\fR, \fB\-mfprnd\fR,
|
| 10266 |
|
|
\&\fB\-mhard\-float\fR, \fB\-mmfcrf\fR, \fB\-mmultiple\fR,
|
| 10267 |
|
|
\&\fB\-mnew\-mnemonics\fR, \fB\-mpopcntb\fR, \fB\-mpower\fR,
|
| 10268 |
|
|
\&\fB\-mpower2\fR, \fB\-mpowerpc64\fR, \fB\-mpowerpc\-gpopt\fR,
|
| 10269 |
|
|
\&\fB\-mpowerpc\-gfxopt\fR, \fB\-mstring\fR. The particular options
|
| 10270 |
|
|
set for any particular \s-1CPU\s0 will vary between compiler versions,
|
| 10271 |
|
|
depending on what setting seems to produce optimal code for that \s-1CPU\s0;
|
| 10272 |
|
|
it doesn't necessarily reflect the actual hardware's capabilities. If
|
| 10273 |
|
|
you wish to set an individual option to a particular value, you may
|
| 10274 |
|
|
specify it after the \fB\-mcpu\fR option, like \fB\-mcpu=970
|
| 10275 |
|
|
\&\-mno\-altivec\fR.
|
| 10276 |
|
|
.Sp
|
| 10277 |
|
|
On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
|
| 10278 |
|
|
not enabled or disabled by the \fB\-mcpu\fR option at present because
|
| 10279 |
|
|
\&\s-1AIX\s0 does not have full support for these options. You may still
|
| 10280 |
|
|
enable or disable them individually if you're sure it'll work in your
|
| 10281 |
|
|
environment.
|
| 10282 |
|
|
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
|
| 10283 |
|
|
.IX Item "-mtune=cpu_type"
|
| 10284 |
|
|
Set the instruction scheduling parameters for machine type
|
| 10285 |
|
|
\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
|
| 10286 |
|
|
choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
|
| 10287 |
|
|
values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
|
| 10288 |
|
|
\&\fB\-mcpu\fR. If both are specified, the code generated will use the
|
| 10289 |
|
|
architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
|
| 10290 |
|
|
scheduling parameters set by \fB\-mtune\fR.
|
| 10291 |
|
|
.IP "\fB\-mswdiv\fR" 4
|
| 10292 |
|
|
.IX Item "-mswdiv"
|
| 10293 |
|
|
.PD 0
|
| 10294 |
|
|
.IP "\fB\-mno\-swdiv\fR" 4
|
| 10295 |
|
|
.IX Item "-mno-swdiv"
|
| 10296 |
|
|
.PD
|
| 10297 |
|
|
Generate code to compute division as reciprocal estimate and iterative
|
| 10298 |
|
|
refinement, creating opportunities for increased throughput. This
|
| 10299 |
|
|
feature requires: optional PowerPC Graphics instruction set for single
|
| 10300 |
|
|
precision and \s-1FRE\s0 instruction for double precision, assuming divides
|
| 10301 |
|
|
cannot generate user-visible traps, and the domain values not include
|
| 10302 |
|
|
Infinities, denormals or zero denominator.
|
| 10303 |
|
|
.IP "\fB\-maltivec\fR" 4
|
| 10304 |
|
|
.IX Item "-maltivec"
|
| 10305 |
|
|
.PD 0
|
| 10306 |
|
|
.IP "\fB\-mno\-altivec\fR" 4
|
| 10307 |
|
|
.IX Item "-mno-altivec"
|
| 10308 |
|
|
.PD
|
| 10309 |
|
|
Generate code that uses (does not use) AltiVec instructions, and also
|
| 10310 |
|
|
enable the use of built-in functions that allow more direct access to
|
| 10311 |
|
|
the AltiVec instruction set. You may also need to set
|
| 10312 |
|
|
\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
|
| 10313 |
|
|
enhancements.
|
| 10314 |
|
|
.IP "\fB\-mvrsave\fR" 4
|
| 10315 |
|
|
.IX Item "-mvrsave"
|
| 10316 |
|
|
.PD 0
|
| 10317 |
|
|
.IP "\fB\-mno\-vrsave\fR" 4
|
| 10318 |
|
|
.IX Item "-mno-vrsave"
|
| 10319 |
|
|
.PD
|
| 10320 |
|
|
Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
|
| 10321 |
|
|
.IP "\fB\-msecure\-plt\fR" 4
|
| 10322 |
|
|
.IX Item "-msecure-plt"
|
| 10323 |
|
|
Generate code that allows ld and ld.so to build executables and shared
|
| 10324 |
|
|
libraries with non-exec .plt and .got sections. This is a PowerPC
|
| 10325 |
|
|
32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
|
| 10326 |
|
|
.IP "\fB\-mbss\-plt\fR" 4
|
| 10327 |
|
|
.IX Item "-mbss-plt"
|
| 10328 |
|
|
Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
|
| 10329 |
|
|
requires .plt and .got sections that are both writable and executable.
|
| 10330 |
|
|
This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
|
| 10331 |
|
|
.IP "\fB\-misel\fR" 4
|
| 10332 |
|
|
.IX Item "-misel"
|
| 10333 |
|
|
.PD 0
|
| 10334 |
|
|
.IP "\fB\-mno\-isel\fR" 4
|
| 10335 |
|
|
.IX Item "-mno-isel"
|
| 10336 |
|
|
.PD
|
| 10337 |
|
|
This switch enables or disables the generation of \s-1ISEL\s0 instructions.
|
| 10338 |
|
|
.IP "\fB\-misel=\fR\fIyes/no\fR" 4
|
| 10339 |
|
|
.IX Item "-misel=yes/no"
|
| 10340 |
|
|
This switch has been deprecated. Use \fB\-misel\fR and
|
| 10341 |
|
|
\&\fB\-mno\-isel\fR instead.
|
| 10342 |
|
|
.IP "\fB\-mspe\fR" 4
|
| 10343 |
|
|
.IX Item "-mspe"
|
| 10344 |
|
|
.PD 0
|
| 10345 |
|
|
.IP "\fB\-mno\-isel\fR" 4
|
| 10346 |
|
|
.IX Item "-mno-isel"
|
| 10347 |
|
|
.PD
|
| 10348 |
|
|
This switch enables or disables the generation of \s-1SPE\s0 simd
|
| 10349 |
|
|
instructions.
|
| 10350 |
|
|
.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
|
| 10351 |
|
|
.IX Item "-mspe=yes/no"
|
| 10352 |
|
|
This option has been deprecated. Use \fB\-mspe\fR and
|
| 10353 |
|
|
\&\fB\-mno\-spe\fR instead.
|
| 10354 |
|
|
.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
|
| 10355 |
|
|
.IX Item "-mfloat-gprs=yes/single/double/no"
|
| 10356 |
|
|
.PD 0
|
| 10357 |
|
|
.IP "\fB\-mfloat\-gprs\fR" 4
|
| 10358 |
|
|
.IX Item "-mfloat-gprs"
|
| 10359 |
|
|
.PD
|
| 10360 |
|
|
This switch enables or disables the generation of floating point
|
| 10361 |
|
|
operations on the general purpose registers for architectures that
|
| 10362 |
|
|
support it.
|
| 10363 |
|
|
.Sp
|
| 10364 |
|
|
The argument \fIyes\fR or \fIsingle\fR enables the use of
|
| 10365 |
|
|
single-precision floating point operations.
|
| 10366 |
|
|
.Sp
|
| 10367 |
|
|
The argument \fIdouble\fR enables the use of single and
|
| 10368 |
|
|
double-precision floating point operations.
|
| 10369 |
|
|
.Sp
|
| 10370 |
|
|
The argument \fIno\fR disables floating point operations on the
|
| 10371 |
|
|
general purpose registers.
|
| 10372 |
|
|
.Sp
|
| 10373 |
|
|
This option is currently only available on the MPC854x.
|
| 10374 |
|
|
.IP "\fB\-m32\fR" 4
|
| 10375 |
|
|
.IX Item "-m32"
|
| 10376 |
|
|
.PD 0
|
| 10377 |
|
|
.IP "\fB\-m64\fR" 4
|
| 10378 |
|
|
.IX Item "-m64"
|
| 10379 |
|
|
.PD
|
| 10380 |
|
|
Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
|
| 10381 |
|
|
targets (including GNU/Linux). The 32\-bit environment sets int, long
|
| 10382 |
|
|
and pointer to 32 bits and generates code that runs on any PowerPC
|
| 10383 |
|
|
variant. The 64\-bit environment sets int to 32 bits and long and
|
| 10384 |
|
|
pointer to 64 bits, and generates code for PowerPC64, as for
|
| 10385 |
|
|
\&\fB\-mpowerpc64\fR.
|
| 10386 |
|
|
.IP "\fB\-mfull\-toc\fR" 4
|
| 10387 |
|
|
.IX Item "-mfull-toc"
|
| 10388 |
|
|
.PD 0
|
| 10389 |
|
|
.IP "\fB\-mno\-fp\-in\-toc\fR" 4
|
| 10390 |
|
|
.IX Item "-mno-fp-in-toc"
|
| 10391 |
|
|
.IP "\fB\-mno\-sum\-in\-toc\fR" 4
|
| 10392 |
|
|
.IX Item "-mno-sum-in-toc"
|
| 10393 |
|
|
.IP "\fB\-mminimal\-toc\fR" 4
|
| 10394 |
|
|
.IX Item "-mminimal-toc"
|
| 10395 |
|
|
.PD
|
| 10396 |
|
|
Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
|
| 10397 |
|
|
every executable file. The \fB\-mfull\-toc\fR option is selected by
|
| 10398 |
|
|
default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
|
| 10399 |
|
|
each unique non-automatic variable reference in your program. \s-1GCC\s0
|
| 10400 |
|
|
will also place floating-point constants in the \s-1TOC\s0. However, only
|
| 10401 |
|
|
16,384 entries are available in the \s-1TOC\s0.
|
| 10402 |
|
|
.Sp
|
| 10403 |
|
|
If you receive a linker error message that saying you have overflowed
|
| 10404 |
|
|
the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
|
| 10405 |
|
|
with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
|
| 10406 |
|
|
\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
|
| 10407 |
|
|
constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
|
| 10408 |
|
|
generate code to calculate the sum of an address and a constant at
|
| 10409 |
|
|
run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
|
| 10410 |
|
|
or both of these options. Each causes \s-1GCC\s0 to produce very slightly
|
| 10411 |
|
|
slower and larger code at the expense of conserving \s-1TOC\s0 space.
|
| 10412 |
|
|
.Sp
|
| 10413 |
|
|
If you still run out of space in the \s-1TOC\s0 even when you specify both of
|
| 10414 |
|
|
these options, specify \fB\-mminimal\-toc\fR instead. This option causes
|
| 10415 |
|
|
\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
|
| 10416 |
|
|
option, \s-1GCC\s0 will produce code that is slower and larger but which
|
| 10417 |
|
|
uses extremely little \s-1TOC\s0 space. You may wish to use this option
|
| 10418 |
|
|
only on files that contain less frequently executed code.
|
| 10419 |
|
|
.IP "\fB\-maix64\fR" 4
|
| 10420 |
|
|
.IX Item "-maix64"
|
| 10421 |
|
|
.PD 0
|
| 10422 |
|
|
.IP "\fB\-maix32\fR" 4
|
| 10423 |
|
|
.IX Item "-maix32"
|
| 10424 |
|
|
.PD
|
| 10425 |
|
|
Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
|
| 10426 |
|
|
\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
|
| 10427 |
|
|
Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
|
| 10428 |
|
|
\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
|
| 10429 |
|
|
implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
|
| 10430 |
|
|
.IP "\fB\-mxl\-compat\fR" 4
|
| 10431 |
|
|
.IX Item "-mxl-compat"
|
| 10432 |
|
|
.PD 0
|
| 10433 |
|
|
.IP "\fB\-mno\-xl\-compat\fR" 4
|
| 10434 |
|
|
.IX Item "-mno-xl-compat"
|
| 10435 |
|
|
.PD
|
| 10436 |
|
|
Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
|
| 10437 |
|
|
when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
|
| 10438 |
|
|
prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
|
| 10439 |
|
|
in addition to argument FPRs. Do not assume that most significant
|
| 10440 |
|
|
double in 128\-bit long double value is properly rounded when comparing
|
| 10441 |
|
|
values and converting to double. Use \s-1XL\s0 symbol names for long double
|
| 10442 |
|
|
support routines.
|
| 10443 |
|
|
.Sp
|
| 10444 |
|
|
The \s-1AIX\s0 calling convention was extended but not initially documented to
|
| 10445 |
|
|
handle an obscure K&R C case of calling a function that takes the
|
| 10446 |
|
|
address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
|
| 10447 |
|
|
compilers access floating point arguments which do not fit in the
|
| 10448 |
|
|
\&\s-1RSA\s0 from the stack when a subroutine is compiled without
|
| 10449 |
|
|
optimization. Because always storing floating-point arguments on the
|
| 10450 |
|
|
stack is inefficient and rarely needed, this option is not enabled by
|
| 10451 |
|
|
default and only is necessary when calling subroutines compiled by \s-1IBM\s0
|
| 10452 |
|
|
\&\s-1XL\s0 compilers without optimization.
|
| 10453 |
|
|
.IP "\fB\-mpe\fR" 4
|
| 10454 |
|
|
.IX Item "-mpe"
|
| 10455 |
|
|
Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
|
| 10456 |
|
|
application written to use message passing with special startup code to
|
| 10457 |
|
|
enable the application to run. The system must have \s-1PE\s0 installed in the
|
| 10458 |
|
|
standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
|
| 10459 |
|
|
must be overridden with the \fB\-specs=\fR option to specify the
|
| 10460 |
|
|
appropriate directory location. The Parallel Environment does not
|
| 10461 |
|
|
support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
|
| 10462 |
|
|
option are incompatible.
|
| 10463 |
|
|
.IP "\fB\-malign\-natural\fR" 4
|
| 10464 |
|
|
.IX Item "-malign-natural"
|
| 10465 |
|
|
.PD 0
|
| 10466 |
|
|
.IP "\fB\-malign\-power\fR" 4
|
| 10467 |
|
|
.IX Item "-malign-power"
|
| 10468 |
|
|
.PD
|
| 10469 |
|
|
On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
|
| 10470 |
|
|
\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
|
| 10471 |
|
|
types, such as floating-point doubles, on their natural size-based boundary.
|
| 10472 |
|
|
The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
|
| 10473 |
|
|
alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
|
| 10474 |
|
|
.Sp
|
| 10475 |
|
|
On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
|
| 10476 |
|
|
is not supported.
|
| 10477 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 10478 |
|
|
.IX Item "-msoft-float"
|
| 10479 |
|
|
.PD 0
|
| 10480 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
| 10481 |
|
|
.IX Item "-mhard-float"
|
| 10482 |
|
|
.PD
|
| 10483 |
|
|
Generate code that does not use (uses) the floating-point register set.
|
| 10484 |
|
|
Software floating point emulation is provided if you use the
|
| 10485 |
|
|
\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
|
| 10486 |
|
|
.IP "\fB\-mmultiple\fR" 4
|
| 10487 |
|
|
.IX Item "-mmultiple"
|
| 10488 |
|
|
.PD 0
|
| 10489 |
|
|
.IP "\fB\-mno\-multiple\fR" 4
|
| 10490 |
|
|
.IX Item "-mno-multiple"
|
| 10491 |
|
|
.PD
|
| 10492 |
|
|
Generate code that uses (does not use) the load multiple word
|
| 10493 |
|
|
instructions and the store multiple word instructions. These
|
| 10494 |
|
|
instructions are generated by default on \s-1POWER\s0 systems, and not
|
| 10495 |
|
|
generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
|
| 10496 |
|
|
endian PowerPC systems, since those instructions do not work when the
|
| 10497 |
|
|
processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
|
| 10498 |
|
|
\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
|
| 10499 |
|
|
.IP "\fB\-mstring\fR" 4
|
| 10500 |
|
|
.IX Item "-mstring"
|
| 10501 |
|
|
.PD 0
|
| 10502 |
|
|
.IP "\fB\-mno\-string\fR" 4
|
| 10503 |
|
|
.IX Item "-mno-string"
|
| 10504 |
|
|
.PD
|
| 10505 |
|
|
Generate code that uses (does not use) the load string instructions
|
| 10506 |
|
|
and the store string word instructions to save multiple registers and
|
| 10507 |
|
|
do small block moves. These instructions are generated by default on
|
| 10508 |
|
|
\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
|
| 10509 |
|
|
\&\fB\-mstring\fR on little endian PowerPC systems, since those
|
| 10510 |
|
|
instructions do not work when the processor is in little endian mode.
|
| 10511 |
|
|
The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
|
| 10512 |
|
|
usage in little endian mode.
|
| 10513 |
|
|
.IP "\fB\-mupdate\fR" 4
|
| 10514 |
|
|
.IX Item "-mupdate"
|
| 10515 |
|
|
.PD 0
|
| 10516 |
|
|
.IP "\fB\-mno\-update\fR" 4
|
| 10517 |
|
|
.IX Item "-mno-update"
|
| 10518 |
|
|
.PD
|
| 10519 |
|
|
Generate code that uses (does not use) the load or store instructions
|
| 10520 |
|
|
that update the base register to the address of the calculated memory
|
| 10521 |
|
|
location. These instructions are generated by default. If you use
|
| 10522 |
|
|
\&\fB\-mno\-update\fR, there is a small window between the time that the
|
| 10523 |
|
|
stack pointer is updated and the address of the previous frame is
|
| 10524 |
|
|
stored, which means code that walks the stack frame across interrupts or
|
| 10525 |
|
|
signals may get corrupted data.
|
| 10526 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
| 10527 |
|
|
.IX Item "-mfused-madd"
|
| 10528 |
|
|
.PD 0
|
| 10529 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
| 10530 |
|
|
.IX Item "-mno-fused-madd"
|
| 10531 |
|
|
.PD
|
| 10532 |
|
|
Generate code that uses (does not use) the floating point multiply and
|
| 10533 |
|
|
accumulate instructions. These instructions are generated by default if
|
| 10534 |
|
|
hardware floating is used.
|
| 10535 |
|
|
.IP "\fB\-mno\-bit\-align\fR" 4
|
| 10536 |
|
|
.IX Item "-mno-bit-align"
|
| 10537 |
|
|
.PD 0
|
| 10538 |
|
|
.IP "\fB\-mbit\-align\fR" 4
|
| 10539 |
|
|
.IX Item "-mbit-align"
|
| 10540 |
|
|
.PD
|
| 10541 |
|
|
On System V.4 and embedded PowerPC systems do not (do) force structures
|
| 10542 |
|
|
and unions that contain bit-fields to be aligned to the base type of the
|
| 10543 |
|
|
bit\-field.
|
| 10544 |
|
|
.Sp
|
| 10545 |
|
|
For example, by default a structure containing nothing but 8
|
| 10546 |
|
|
\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
|
| 10547 |
|
|
boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
|
| 10548 |
|
|
the structure would be aligned to a 1 byte boundary and be one byte in
|
| 10549 |
|
|
size.
|
| 10550 |
|
|
.IP "\fB\-mno\-strict\-align\fR" 4
|
| 10551 |
|
|
.IX Item "-mno-strict-align"
|
| 10552 |
|
|
.PD 0
|
| 10553 |
|
|
.IP "\fB\-mstrict\-align\fR" 4
|
| 10554 |
|
|
.IX Item "-mstrict-align"
|
| 10555 |
|
|
.PD
|
| 10556 |
|
|
On System V.4 and embedded PowerPC systems do not (do) assume that
|
| 10557 |
|
|
unaligned memory references will be handled by the system.
|
| 10558 |
|
|
.IP "\fB\-mrelocatable\fR" 4
|
| 10559 |
|
|
.IX Item "-mrelocatable"
|
| 10560 |
|
|
.PD 0
|
| 10561 |
|
|
.IP "\fB\-mno\-relocatable\fR" 4
|
| 10562 |
|
|
.IX Item "-mno-relocatable"
|
| 10563 |
|
|
.PD
|
| 10564 |
|
|
On embedded PowerPC systems generate code that allows (does not allow)
|
| 10565 |
|
|
the program to be relocated to a different address at runtime. If you
|
| 10566 |
|
|
use \fB\-mrelocatable\fR on any module, all objects linked together must
|
| 10567 |
|
|
be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
|
| 10568 |
|
|
.IP "\fB\-mrelocatable\-lib\fR" 4
|
| 10569 |
|
|
.IX Item "-mrelocatable-lib"
|
| 10570 |
|
|
.PD 0
|
| 10571 |
|
|
.IP "\fB\-mno\-relocatable\-lib\fR" 4
|
| 10572 |
|
|
.IX Item "-mno-relocatable-lib"
|
| 10573 |
|
|
.PD
|
| 10574 |
|
|
On embedded PowerPC systems generate code that allows (does not allow)
|
| 10575 |
|
|
the program to be relocated to a different address at runtime. Modules
|
| 10576 |
|
|
compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
|
| 10577 |
|
|
compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
|
| 10578 |
|
|
with modules compiled with the \fB\-mrelocatable\fR options.
|
| 10579 |
|
|
.IP "\fB\-mno\-toc\fR" 4
|
| 10580 |
|
|
.IX Item "-mno-toc"
|
| 10581 |
|
|
.PD 0
|
| 10582 |
|
|
.IP "\fB\-mtoc\fR" 4
|
| 10583 |
|
|
.IX Item "-mtoc"
|
| 10584 |
|
|
.PD
|
| 10585 |
|
|
On System V.4 and embedded PowerPC systems do not (do) assume that
|
| 10586 |
|
|
register 2 contains a pointer to a global area pointing to the addresses
|
| 10587 |
|
|
used in the program.
|
| 10588 |
|
|
.IP "\fB\-mlittle\fR" 4
|
| 10589 |
|
|
.IX Item "-mlittle"
|
| 10590 |
|
|
.PD 0
|
| 10591 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
| 10592 |
|
|
.IX Item "-mlittle-endian"
|
| 10593 |
|
|
.PD
|
| 10594 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
| 10595 |
|
|
processor in little endian mode. The \fB\-mlittle\-endian\fR option is
|
| 10596 |
|
|
the same as \fB\-mlittle\fR.
|
| 10597 |
|
|
.IP "\fB\-mbig\fR" 4
|
| 10598 |
|
|
.IX Item "-mbig"
|
| 10599 |
|
|
.PD 0
|
| 10600 |
|
|
.IP "\fB\-mbig\-endian\fR" 4
|
| 10601 |
|
|
.IX Item "-mbig-endian"
|
| 10602 |
|
|
.PD
|
| 10603 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
| 10604 |
|
|
processor in big endian mode. The \fB\-mbig\-endian\fR option is
|
| 10605 |
|
|
the same as \fB\-mbig\fR.
|
| 10606 |
|
|
.IP "\fB\-mdynamic\-no\-pic\fR" 4
|
| 10607 |
|
|
.IX Item "-mdynamic-no-pic"
|
| 10608 |
|
|
On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
|
| 10609 |
|
|
relocatable, but that its external references are relocatable. The
|
| 10610 |
|
|
resulting code is suitable for applications, but not shared
|
| 10611 |
|
|
libraries.
|
| 10612 |
|
|
.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
|
| 10613 |
|
|
.IX Item "-mprioritize-restricted-insns=priority"
|
| 10614 |
|
|
This option controls the priority that is assigned to
|
| 10615 |
|
|
dispatch-slot restricted instructions during the second scheduling
|
| 10616 |
|
|
pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
|
| 10617 |
|
|
\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
|
| 10618 |
|
|
instructions.
|
| 10619 |
|
|
.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
|
| 10620 |
|
|
.IX Item "-msched-costly-dep=dependence_type"
|
| 10621 |
|
|
This option controls which dependences are considered costly
|
| 10622 |
|
|
by the target during instruction scheduling. The argument
|
| 10623 |
|
|
\&\fIdependence_type\fR takes one of the following values:
|
| 10624 |
|
|
\&\fIno\fR: no dependence is costly,
|
| 10625 |
|
|
\&\fIall\fR: all dependences are costly,
|
| 10626 |
|
|
\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
|
| 10627 |
|
|
\&\fIstore_to_load\fR: any dependence from store to load is costly,
|
| 10628 |
|
|
\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
|
| 10629 |
|
|
.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
|
| 10630 |
|
|
.IX Item "-minsert-sched-nops=scheme"
|
| 10631 |
|
|
This option controls which nop insertion scheme will be used during
|
| 10632 |
|
|
the second scheduling pass. The argument \fIscheme\fR takes one of the
|
| 10633 |
|
|
following values:
|
| 10634 |
|
|
\&\fIno\fR: Don't insert nops.
|
| 10635 |
|
|
\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
|
| 10636 |
|
|
according to the scheduler's grouping.
|
| 10637 |
|
|
\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
|
| 10638 |
|
|
separate groups. Insert exactly as many nops as needed to force an insn
|
| 10639 |
|
|
to a new group, according to the estimated processor grouping.
|
| 10640 |
|
|
\&\fInumber\fR: Insert nops to force costly dependent insns into
|
| 10641 |
|
|
separate groups. Insert \fInumber\fR nops to force an insn to a new group.
|
| 10642 |
|
|
.IP "\fB\-mcall\-sysv\fR" 4
|
| 10643 |
|
|
.IX Item "-mcall-sysv"
|
| 10644 |
|
|
On System V.4 and embedded PowerPC systems compile code using calling
|
| 10645 |
|
|
conventions that adheres to the March 1995 draft of the System V
|
| 10646 |
|
|
Application Binary Interface, PowerPC processor supplement. This is the
|
| 10647 |
|
|
default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
|
| 10648 |
|
|
.IP "\fB\-mcall\-sysv\-eabi\fR" 4
|
| 10649 |
|
|
.IX Item "-mcall-sysv-eabi"
|
| 10650 |
|
|
Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
|
| 10651 |
|
|
.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
|
| 10652 |
|
|
.IX Item "-mcall-sysv-noeabi"
|
| 10653 |
|
|
Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
|
| 10654 |
|
|
.IP "\fB\-mcall\-solaris\fR" 4
|
| 10655 |
|
|
.IX Item "-mcall-solaris"
|
| 10656 |
|
|
On System V.4 and embedded PowerPC systems compile code for the Solaris
|
| 10657 |
|
|
operating system.
|
| 10658 |
|
|
.IP "\fB\-mcall\-linux\fR" 4
|
| 10659 |
|
|
.IX Item "-mcall-linux"
|
| 10660 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
| 10661 |
|
|
Linux-based \s-1GNU\s0 system.
|
| 10662 |
|
|
.IP "\fB\-mcall\-gnu\fR" 4
|
| 10663 |
|
|
.IX Item "-mcall-gnu"
|
| 10664 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
| 10665 |
|
|
Hurd-based \s-1GNU\s0 system.
|
| 10666 |
|
|
.IP "\fB\-mcall\-netbsd\fR" 4
|
| 10667 |
|
|
.IX Item "-mcall-netbsd"
|
| 10668 |
|
|
On System V.4 and embedded PowerPC systems compile code for the
|
| 10669 |
|
|
NetBSD operating system.
|
| 10670 |
|
|
.IP "\fB\-maix\-struct\-return\fR" 4
|
| 10671 |
|
|
.IX Item "-maix-struct-return"
|
| 10672 |
|
|
Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
|
| 10673 |
|
|
.IP "\fB\-msvr4\-struct\-return\fR" 4
|
| 10674 |
|
|
.IX Item "-msvr4-struct-return"
|
| 10675 |
|
|
Return structures smaller than 8 bytes in registers (as specified by the
|
| 10676 |
|
|
\&\s-1SVR4\s0 \s-1ABI\s0).
|
| 10677 |
|
|
.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
|
| 10678 |
|
|
.IX Item "-mabi=abi-type"
|
| 10679 |
|
|
Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
|
| 10680 |
|
|
Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
|
| 10681 |
|
|
\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
|
| 10682 |
|
|
.IP "\fB\-mabi=spe\fR" 4
|
| 10683 |
|
|
.IX Item "-mabi=spe"
|
| 10684 |
|
|
Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
|
| 10685 |
|
|
the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
|
| 10686 |
|
|
\&\s-1ABI\s0.
|
| 10687 |
|
|
.IP "\fB\-mabi=no\-spe\fR" 4
|
| 10688 |
|
|
.IX Item "-mabi=no-spe"
|
| 10689 |
|
|
Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
|
| 10690 |
|
|
.IP "\fB\-mabi=ibmlongdouble\fR" 4
|
| 10691 |
|
|
.IX Item "-mabi=ibmlongdouble"
|
| 10692 |
|
|
Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
|
| 10693 |
|
|
This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
|
| 10694 |
|
|
.IP "\fB\-mabi=ieeelongdouble\fR" 4
|
| 10695 |
|
|
.IX Item "-mabi=ieeelongdouble"
|
| 10696 |
|
|
Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
|
| 10697 |
|
|
This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
|
| 10698 |
|
|
.IP "\fB\-mprototype\fR" 4
|
| 10699 |
|
|
.IX Item "-mprototype"
|
| 10700 |
|
|
.PD 0
|
| 10701 |
|
|
.IP "\fB\-mno\-prototype\fR" 4
|
| 10702 |
|
|
.IX Item "-mno-prototype"
|
| 10703 |
|
|
.PD
|
| 10704 |
|
|
On System V.4 and embedded PowerPC systems assume that all calls to
|
| 10705 |
|
|
variable argument functions are properly prototyped. Otherwise, the
|
| 10706 |
|
|
compiler must insert an instruction before every non prototyped call to
|
| 10707 |
|
|
set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
|
| 10708 |
|
|
indicate whether floating point values were passed in the floating point
|
| 10709 |
|
|
registers in case the function takes a variable arguments. With
|
| 10710 |
|
|
\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
|
| 10711 |
|
|
will set or clear the bit.
|
| 10712 |
|
|
.IP "\fB\-msim\fR" 4
|
| 10713 |
|
|
.IX Item "-msim"
|
| 10714 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
| 10715 |
|
|
\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
|
| 10716 |
|
|
\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR.
|
| 10717 |
|
|
configurations.
|
| 10718 |
|
|
.IP "\fB\-mmvme\fR" 4
|
| 10719 |
|
|
.IX Item "-mmvme"
|
| 10720 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
| 10721 |
|
|
\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
|
| 10722 |
|
|
\&\fIlibc.a\fR.
|
| 10723 |
|
|
.IP "\fB\-mads\fR" 4
|
| 10724 |
|
|
.IX Item "-mads"
|
| 10725 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
| 10726 |
|
|
\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
|
| 10727 |
|
|
\&\fIlibc.a\fR.
|
| 10728 |
|
|
.IP "\fB\-myellowknife\fR" 4
|
| 10729 |
|
|
.IX Item "-myellowknife"
|
| 10730 |
|
|
On embedded PowerPC systems, assume that the startup module is called
|
| 10731 |
|
|
\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
|
| 10732 |
|
|
\&\fIlibc.a\fR.
|
| 10733 |
|
|
.IP "\fB\-mvxworks\fR" 4
|
| 10734 |
|
|
.IX Item "-mvxworks"
|
| 10735 |
|
|
On System V.4 and embedded PowerPC systems, specify that you are
|
| 10736 |
|
|
compiling for a VxWorks system.
|
| 10737 |
|
|
.IP "\fB\-mwindiss\fR" 4
|
| 10738 |
|
|
.IX Item "-mwindiss"
|
| 10739 |
|
|
Specify that you are compiling for the WindISS simulation environment.
|
| 10740 |
|
|
.IP "\fB\-memb\fR" 4
|
| 10741 |
|
|
.IX Item "-memb"
|
| 10742 |
|
|
On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
|
| 10743 |
|
|
header to indicate that \fBeabi\fR extended relocations are used.
|
| 10744 |
|
|
.IP "\fB\-meabi\fR" 4
|
| 10745 |
|
|
.IX Item "-meabi"
|
| 10746 |
|
|
.PD 0
|
| 10747 |
|
|
.IP "\fB\-mno\-eabi\fR" 4
|
| 10748 |
|
|
.IX Item "-mno-eabi"
|
| 10749 |
|
|
.PD
|
| 10750 |
|
|
On System V.4 and embedded PowerPC systems do (do not) adhere to the
|
| 10751 |
|
|
Embedded Applications Binary Interface (eabi) which is a set of
|
| 10752 |
|
|
modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
|
| 10753 |
|
|
means that the stack is aligned to an 8 byte boundary, a function
|
| 10754 |
|
|
\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
|
| 10755 |
|
|
environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
|
| 10756 |
|
|
\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
|
| 10757 |
|
|
\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
|
| 10758 |
|
|
do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
|
| 10759 |
|
|
\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
|
| 10760 |
|
|
small data area. The \fB\-meabi\fR option is on by default if you
|
| 10761 |
|
|
configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
|
| 10762 |
|
|
.IP "\fB\-msdata=eabi\fR" 4
|
| 10763 |
|
|
.IX Item "-msdata=eabi"
|
| 10764 |
|
|
On System V.4 and embedded PowerPC systems, put small initialized
|
| 10765 |
|
|
\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
|
| 10766 |
|
|
is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
|
| 10767 |
|
|
non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
|
| 10768 |
|
|
which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
|
| 10769 |
|
|
global and static data in the \fB.sbss\fR section, which is adjacent to
|
| 10770 |
|
|
the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
|
| 10771 |
|
|
incompatible with the \fB\-mrelocatable\fR option. The
|
| 10772 |
|
|
\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
|
| 10773 |
|
|
.IP "\fB\-msdata=sysv\fR" 4
|
| 10774 |
|
|
.IX Item "-msdata=sysv"
|
| 10775 |
|
|
On System V.4 and embedded PowerPC systems, put small global and static
|
| 10776 |
|
|
data in the \fB.sdata\fR section, which is pointed to by register
|
| 10777 |
|
|
\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
|
| 10778 |
|
|
\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
|
| 10779 |
|
|
The \fB\-msdata=sysv\fR option is incompatible with the
|
| 10780 |
|
|
\&\fB\-mrelocatable\fR option.
|
| 10781 |
|
|
.IP "\fB\-msdata=default\fR" 4
|
| 10782 |
|
|
.IX Item "-msdata=default"
|
| 10783 |
|
|
.PD 0
|
| 10784 |
|
|
.IP "\fB\-msdata\fR" 4
|
| 10785 |
|
|
.IX Item "-msdata"
|
| 10786 |
|
|
.PD
|
| 10787 |
|
|
On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
|
| 10788 |
|
|
compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
|
| 10789 |
|
|
same as \fB\-msdata=sysv\fR.
|
| 10790 |
|
|
.IP "\fB\-msdata\-data\fR" 4
|
| 10791 |
|
|
.IX Item "-msdata-data"
|
| 10792 |
|
|
On System V.4 and embedded PowerPC systems, put small global and static
|
| 10793 |
|
|
data in the \fB.sdata\fR section. Put small uninitialized global and
|
| 10794 |
|
|
static data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
|
| 10795 |
|
|
to address small data however. This is the default behavior unless
|
| 10796 |
|
|
other \fB\-msdata\fR options are used.
|
| 10797 |
|
|
.IP "\fB\-msdata=none\fR" 4
|
| 10798 |
|
|
.IX Item "-msdata=none"
|
| 10799 |
|
|
.PD 0
|
| 10800 |
|
|
.IP "\fB\-mno\-sdata\fR" 4
|
| 10801 |
|
|
.IX Item "-mno-sdata"
|
| 10802 |
|
|
.PD
|
| 10803 |
|
|
On embedded PowerPC systems, put all initialized global and static data
|
| 10804 |
|
|
in the \fB.data\fR section, and all uninitialized data in the
|
| 10805 |
|
|
\&\fB.bss\fR section.
|
| 10806 |
|
|
.IP "\fB\-G\fR \fInum\fR" 4
|
| 10807 |
|
|
.IX Item "-G num"
|
| 10808 |
|
|
On embedded PowerPC systems, put global and static items less than or
|
| 10809 |
|
|
equal to \fInum\fR bytes into the small data or bss sections instead of
|
| 10810 |
|
|
the normal data or bss section. By default, \fInum\fR is 8. The
|
| 10811 |
|
|
\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
|
| 10812 |
|
|
All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
|
| 10813 |
|
|
.IP "\fB\-mregnames\fR" 4
|
| 10814 |
|
|
.IX Item "-mregnames"
|
| 10815 |
|
|
.PD 0
|
| 10816 |
|
|
.IP "\fB\-mno\-regnames\fR" 4
|
| 10817 |
|
|
.IX Item "-mno-regnames"
|
| 10818 |
|
|
.PD
|
| 10819 |
|
|
On System V.4 and embedded PowerPC systems do (do not) emit register
|
| 10820 |
|
|
names in the assembly language output using symbolic forms.
|
| 10821 |
|
|
.IP "\fB\-mlongcall\fR" 4
|
| 10822 |
|
|
.IX Item "-mlongcall"
|
| 10823 |
|
|
.PD 0
|
| 10824 |
|
|
.IP "\fB\-mno\-longcall\fR" 4
|
| 10825 |
|
|
.IX Item "-mno-longcall"
|
| 10826 |
|
|
.PD
|
| 10827 |
|
|
Default to making all function calls indirectly, using a register, so
|
| 10828 |
|
|
that functions which reside further than 32 megabytes (33,554,432
|
| 10829 |
|
|
bytes) from the current location can be called. This setting can be
|
| 10830 |
|
|
overridden by the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by
|
| 10831 |
|
|
\&\f(CW\*(C`#pragma longcall(0)\*(C'\fR.
|
| 10832 |
|
|
.Sp
|
| 10833 |
|
|
Some linkers are capable of detecting out-of-range calls and generating
|
| 10834 |
|
|
glue code on the fly. On these systems, long calls are unnecessary and
|
| 10835 |
|
|
generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
|
| 10836 |
|
|
as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
|
| 10837 |
|
|
to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
|
| 10838 |
|
|
.Sp
|
| 10839 |
|
|
On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
|
| 10840 |
|
|
callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
|
| 10841 |
|
|
addresses represent the callee and the \*(L"branch island\*(R". The
|
| 10842 |
|
|
Darwin/PPC linker will prefer the first address and generate a \*(L"bl
|
| 10843 |
|
|
callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
|
| 10844 |
|
|
otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
|
| 10845 |
|
|
island\*(R". The \*(L"branch island\*(R" is appended to the body of the
|
| 10846 |
|
|
calling function; it computes the full 32\-bit address of the callee
|
| 10847 |
|
|
and jumps to it.
|
| 10848 |
|
|
.Sp
|
| 10849 |
|
|
On Mach-O (Darwin) systems, this option directs the compiler emit to
|
| 10850 |
|
|
the glue for every direct call, and the Darwin linker decides whether
|
| 10851 |
|
|
to use or discard it.
|
| 10852 |
|
|
.Sp
|
| 10853 |
|
|
In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
|
| 10854 |
|
|
when the linker is known to generate glue.
|
| 10855 |
|
|
.IP "\fB\-pthread\fR" 4
|
| 10856 |
|
|
.IX Item "-pthread"
|
| 10857 |
|
|
Adds support for multithreading with the \fIpthreads\fR library.
|
| 10858 |
|
|
This option sets flags for both the preprocessor and linker.
|
| 10859 |
|
|
.PP
|
| 10860 |
|
|
\fIS/390 and zSeries Options\fR
|
| 10861 |
|
|
.IX Subsection "S/390 and zSeries Options"
|
| 10862 |
|
|
.PP
|
| 10863 |
|
|
These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
|
| 10864 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
| 10865 |
|
|
.IX Item "-mhard-float"
|
| 10866 |
|
|
.PD 0
|
| 10867 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 10868 |
|
|
.IX Item "-msoft-float"
|
| 10869 |
|
|
.PD
|
| 10870 |
|
|
Use (do not use) the hardware floating-point instructions and registers
|
| 10871 |
|
|
for floating-point operations. When \fB\-msoft\-float\fR is specified,
|
| 10872 |
|
|
functions in \fIlibgcc.a\fR will be used to perform floating-point
|
| 10873 |
|
|
operations. When \fB\-mhard\-float\fR is specified, the compiler
|
| 10874 |
|
|
generates \s-1IEEE\s0 floating-point instructions. This is the default.
|
| 10875 |
|
|
.IP "\fB\-mlong\-double\-64\fR" 4
|
| 10876 |
|
|
.IX Item "-mlong-double-64"
|
| 10877 |
|
|
.PD 0
|
| 10878 |
|
|
.IP "\fB\-mlong\-double\-128\fR" 4
|
| 10879 |
|
|
.IX Item "-mlong-double-128"
|
| 10880 |
|
|
.PD
|
| 10881 |
|
|
These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
|
| 10882 |
|
|
of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
|
| 10883 |
|
|
type. This is the default.
|
| 10884 |
|
|
.IP "\fB\-mbackchain\fR" 4
|
| 10885 |
|
|
.IX Item "-mbackchain"
|
| 10886 |
|
|
.PD 0
|
| 10887 |
|
|
.IP "\fB\-mno\-backchain\fR" 4
|
| 10888 |
|
|
.IX Item "-mno-backchain"
|
| 10889 |
|
|
.PD
|
| 10890 |
|
|
Store (do not store) the address of the caller's frame as backchain pointer
|
| 10891 |
|
|
into the callee's stack frame.
|
| 10892 |
|
|
A backchain may be needed to allow debugging using tools that do not understand
|
| 10893 |
|
|
\&\s-1DWARF\-2\s0 call frame information.
|
| 10894 |
|
|
When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
|
| 10895 |
|
|
at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
|
| 10896 |
|
|
the backchain is placed into the topmost word of the 96/160 byte register
|
| 10897 |
|
|
save area.
|
| 10898 |
|
|
.Sp
|
| 10899 |
|
|
In general, code compiled with \fB\-mbackchain\fR is call-compatible with
|
| 10900 |
|
|
code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
|
| 10901 |
|
|
for debugging purposes usually requires that the whole binary is built with
|
| 10902 |
|
|
\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
|
| 10903 |
|
|
\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
|
| 10904 |
|
|
to build a linux kernel use \fB\-msoft\-float\fR.
|
| 10905 |
|
|
.Sp
|
| 10906 |
|
|
The default is to not maintain the backchain.
|
| 10907 |
|
|
.IP "\fB\-mpacked\-stack\fR" 4
|
| 10908 |
|
|
.IX Item "-mpacked-stack"
|
| 10909 |
|
|
.PD 0
|
| 10910 |
|
|
.IP "\fB\-mno\-packed\-stack\fR" 4
|
| 10911 |
|
|
.IX Item "-mno-packed-stack"
|
| 10912 |
|
|
.PD
|
| 10913 |
|
|
Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
|
| 10914 |
|
|
specified, the compiler uses the all fields of the 96/160 byte register save
|
| 10915 |
|
|
area only for their default purpose; unused fields still take up stack space.
|
| 10916 |
|
|
When \fB\-mpacked\-stack\fR is specified, register save slots are densely
|
| 10917 |
|
|
packed at the top of the register save area; unused space is reused for other
|
| 10918 |
|
|
purposes, allowing for more efficient use of the available stack space.
|
| 10919 |
|
|
However, when \fB\-mbackchain\fR is also in effect, the topmost word of
|
| 10920 |
|
|
the save area is always used to store the backchain, and the return address
|
| 10921 |
|
|
register is always saved two words below the backchain.
|
| 10922 |
|
|
.Sp
|
| 10923 |
|
|
As long as the stack frame backchain is not used, code generated with
|
| 10924 |
|
|
\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
|
| 10925 |
|
|
\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
|
| 10926 |
|
|
S/390 or zSeries generated code that uses the stack frame backchain at run
|
| 10927 |
|
|
time, not just for debugging purposes. Such code is not call-compatible
|
| 10928 |
|
|
with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
|
| 10929 |
|
|
combination of \fB\-mbackchain\fR,
|
| 10930 |
|
|
\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
|
| 10931 |
|
|
to build a linux kernel use \fB\-msoft\-float\fR.
|
| 10932 |
|
|
.Sp
|
| 10933 |
|
|
The default is to not use the packed stack layout.
|
| 10934 |
|
|
.IP "\fB\-msmall\-exec\fR" 4
|
| 10935 |
|
|
.IX Item "-msmall-exec"
|
| 10936 |
|
|
.PD 0
|
| 10937 |
|
|
.IP "\fB\-mno\-small\-exec\fR" 4
|
| 10938 |
|
|
.IX Item "-mno-small-exec"
|
| 10939 |
|
|
.PD
|
| 10940 |
|
|
Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
|
| 10941 |
|
|
to do subroutine calls.
|
| 10942 |
|
|
This only works reliably if the total executable size does not
|
| 10943 |
|
|
exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
|
| 10944 |
|
|
which does not have this limitation.
|
| 10945 |
|
|
.IP "\fB\-m64\fR" 4
|
| 10946 |
|
|
.IX Item "-m64"
|
| 10947 |
|
|
.PD 0
|
| 10948 |
|
|
.IP "\fB\-m31\fR" 4
|
| 10949 |
|
|
.IX Item "-m31"
|
| 10950 |
|
|
.PD
|
| 10951 |
|
|
When \fB\-m31\fR is specified, generate code compliant to the
|
| 10952 |
|
|
GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
|
| 10953 |
|
|
code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
|
| 10954 |
|
|
particular to generate 64\-bit instructions. For the \fBs390\fR
|
| 10955 |
|
|
targets, the default is \fB\-m31\fR, while the \fBs390x\fR
|
| 10956 |
|
|
targets default to \fB\-m64\fR.
|
| 10957 |
|
|
.IP "\fB\-mzarch\fR" 4
|
| 10958 |
|
|
.IX Item "-mzarch"
|
| 10959 |
|
|
.PD 0
|
| 10960 |
|
|
.IP "\fB\-mesa\fR" 4
|
| 10961 |
|
|
.IX Item "-mesa"
|
| 10962 |
|
|
.PD
|
| 10963 |
|
|
When \fB\-mzarch\fR is specified, generate code using the
|
| 10964 |
|
|
instructions available on z/Architecture.
|
| 10965 |
|
|
When \fB\-mesa\fR is specified, generate code using the
|
| 10966 |
|
|
instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
|
| 10967 |
|
|
not possible with \fB\-m64\fR.
|
| 10968 |
|
|
When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
|
| 10969 |
|
|
the default is \fB\-mesa\fR. When generating code compliant
|
| 10970 |
|
|
to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
|
| 10971 |
|
|
.IP "\fB\-mmvcle\fR" 4
|
| 10972 |
|
|
.IX Item "-mmvcle"
|
| 10973 |
|
|
.PD 0
|
| 10974 |
|
|
.IP "\fB\-mno\-mvcle\fR" 4
|
| 10975 |
|
|
.IX Item "-mno-mvcle"
|
| 10976 |
|
|
.PD
|
| 10977 |
|
|
Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
|
| 10978 |
|
|
to perform block moves. When \fB\-mno\-mvcle\fR is specified,
|
| 10979 |
|
|
use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
|
| 10980 |
|
|
size.
|
| 10981 |
|
|
.IP "\fB\-mdebug\fR" 4
|
| 10982 |
|
|
.IX Item "-mdebug"
|
| 10983 |
|
|
.PD 0
|
| 10984 |
|
|
.IP "\fB\-mno\-debug\fR" 4
|
| 10985 |
|
|
.IX Item "-mno-debug"
|
| 10986 |
|
|
.PD
|
| 10987 |
|
|
Print (or do not print) additional debug information when compiling.
|
| 10988 |
|
|
The default is to not print debug information.
|
| 10989 |
|
|
.IP "\fB\-march=\fR\fIcpu-type\fR" 4
|
| 10990 |
|
|
.IX Item "-march=cpu-type"
|
| 10991 |
|
|
Generate code that will run on \fIcpu-type\fR, which is the name of a system
|
| 10992 |
|
|
representing a certain processor type. Possible values for
|
| 10993 |
|
|
\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, and \fBz990\fR.
|
| 10994 |
|
|
When generating code using the instructions available on z/Architecture,
|
| 10995 |
|
|
the default is \fB\-march=z900\fR. Otherwise, the default is
|
| 10996 |
|
|
\&\fB\-march=g5\fR.
|
| 10997 |
|
|
.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
|
| 10998 |
|
|
.IX Item "-mtune=cpu-type"
|
| 10999 |
|
|
Tune to \fIcpu-type\fR everything applicable about the generated code,
|
| 11000 |
|
|
except for the \s-1ABI\s0 and the set of available instructions.
|
| 11001 |
|
|
The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
|
| 11002 |
|
|
The default is the value used for \fB\-march\fR.
|
| 11003 |
|
|
.IP "\fB\-mtpf\-trace\fR" 4
|
| 11004 |
|
|
.IX Item "-mtpf-trace"
|
| 11005 |
|
|
.PD 0
|
| 11006 |
|
|
.IP "\fB\-mno\-tpf\-trace\fR" 4
|
| 11007 |
|
|
.IX Item "-mno-tpf-trace"
|
| 11008 |
|
|
.PD
|
| 11009 |
|
|
Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
|
| 11010 |
|
|
routines in the operating system. This option is off by default, even
|
| 11011 |
|
|
when compiling for the \s-1TPF\s0 \s-1OS\s0.
|
| 11012 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
| 11013 |
|
|
.IX Item "-mfused-madd"
|
| 11014 |
|
|
.PD 0
|
| 11015 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
| 11016 |
|
|
.IX Item "-mno-fused-madd"
|
| 11017 |
|
|
.PD
|
| 11018 |
|
|
Generate code that uses (does not use) the floating point multiply and
|
| 11019 |
|
|
accumulate instructions. These instructions are generated by default if
|
| 11020 |
|
|
hardware floating point is used.
|
| 11021 |
|
|
.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
|
| 11022 |
|
|
.IX Item "-mwarn-framesize=framesize"
|
| 11023 |
|
|
Emit a warning if the current function exceeds the given frame size. Because
|
| 11024 |
|
|
this is a compile time check it doesn't need to be a real problem when the program
|
| 11025 |
|
|
runs. It is intended to identify functions which most probably cause
|
| 11026 |
|
|
a stack overflow. It is useful to be used in an environment with limited stack
|
| 11027 |
|
|
size e.g. the linux kernel.
|
| 11028 |
|
|
.IP "\fB\-mwarn\-dynamicstack\fR" 4
|
| 11029 |
|
|
.IX Item "-mwarn-dynamicstack"
|
| 11030 |
|
|
Emit a warning if the function calls alloca or uses dynamically
|
| 11031 |
|
|
sized arrays. This is generally a bad idea with a limited stack size.
|
| 11032 |
|
|
.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
|
| 11033 |
|
|
.IX Item "-mstack-guard=stack-guard"
|
| 11034 |
|
|
.PD 0
|
| 11035 |
|
|
.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
|
| 11036 |
|
|
.IX Item "-mstack-size=stack-size"
|
| 11037 |
|
|
.PD
|
| 11038 |
|
|
These arguments always have to be used in conjunction. If they are present the s390
|
| 11039 |
|
|
back end emits additional instructions in the function prologue which trigger a trap
|
| 11040 |
|
|
if the stack size is \fIstack-guard\fR bytes above the \fIstack-size\fR
|
| 11041 |
|
|
(remember that the stack on s390 grows downward). These options are intended to
|
| 11042 |
|
|
be used to help debugging stack overflow problems. The additionally emitted code
|
| 11043 |
|
|
causes only little overhead and hence can also be used in production like systems
|
| 11044 |
|
|
without greater performance degradation. The given values have to be exact
|
| 11045 |
|
|
powers of 2 and \fIstack-size\fR has to be greater than \fIstack-guard\fR without
|
| 11046 |
|
|
exceeding 64k.
|
| 11047 |
|
|
In order to be efficient the extra code makes the assumption that the stack starts
|
| 11048 |
|
|
at an address aligned to the value given by \fIstack-size\fR.
|
| 11049 |
|
|
.PP
|
| 11050 |
|
|
\fI\s-1SH\s0 Options\fR
|
| 11051 |
|
|
.IX Subsection "SH Options"
|
| 11052 |
|
|
.PP
|
| 11053 |
|
|
These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
|
| 11054 |
|
|
.IP "\fB\-m1\fR" 4
|
| 11055 |
|
|
.IX Item "-m1"
|
| 11056 |
|
|
Generate code for the \s-1SH1\s0.
|
| 11057 |
|
|
.IP "\fB\-m2\fR" 4
|
| 11058 |
|
|
.IX Item "-m2"
|
| 11059 |
|
|
Generate code for the \s-1SH2\s0.
|
| 11060 |
|
|
.IP "\fB\-m2e\fR" 4
|
| 11061 |
|
|
.IX Item "-m2e"
|
| 11062 |
|
|
Generate code for the SH2e.
|
| 11063 |
|
|
.IP "\fB\-m3\fR" 4
|
| 11064 |
|
|
.IX Item "-m3"
|
| 11065 |
|
|
Generate code for the \s-1SH3\s0.
|
| 11066 |
|
|
.IP "\fB\-m3e\fR" 4
|
| 11067 |
|
|
.IX Item "-m3e"
|
| 11068 |
|
|
Generate code for the SH3e.
|
| 11069 |
|
|
.IP "\fB\-m4\-nofpu\fR" 4
|
| 11070 |
|
|
.IX Item "-m4-nofpu"
|
| 11071 |
|
|
Generate code for the \s-1SH4\s0 without a floating-point unit.
|
| 11072 |
|
|
.IP "\fB\-m4\-single\-only\fR" 4
|
| 11073 |
|
|
.IX Item "-m4-single-only"
|
| 11074 |
|
|
Generate code for the \s-1SH4\s0 with a floating-point unit that only
|
| 11075 |
|
|
supports single-precision arithmetic.
|
| 11076 |
|
|
.IP "\fB\-m4\-single\fR" 4
|
| 11077 |
|
|
.IX Item "-m4-single"
|
| 11078 |
|
|
Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
|
| 11079 |
|
|
single-precision mode by default.
|
| 11080 |
|
|
.IP "\fB\-m4\fR" 4
|
| 11081 |
|
|
.IX Item "-m4"
|
| 11082 |
|
|
Generate code for the \s-1SH4\s0.
|
| 11083 |
|
|
.IP "\fB\-m4a\-nofpu\fR" 4
|
| 11084 |
|
|
.IX Item "-m4a-nofpu"
|
| 11085 |
|
|
Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
|
| 11086 |
|
|
floating-point unit is not used.
|
| 11087 |
|
|
.IP "\fB\-m4a\-single\-only\fR" 4
|
| 11088 |
|
|
.IX Item "-m4a-single-only"
|
| 11089 |
|
|
Generate code for the SH4a, in such a way that no double-precision
|
| 11090 |
|
|
floating point operations are used.
|
| 11091 |
|
|
.IP "\fB\-m4a\-single\fR" 4
|
| 11092 |
|
|
.IX Item "-m4a-single"
|
| 11093 |
|
|
Generate code for the SH4a assuming the floating-point unit is in
|
| 11094 |
|
|
single-precision mode by default.
|
| 11095 |
|
|
.IP "\fB\-m4a\fR" 4
|
| 11096 |
|
|
.IX Item "-m4a"
|
| 11097 |
|
|
Generate code for the SH4a.
|
| 11098 |
|
|
.IP "\fB\-m4al\fR" 4
|
| 11099 |
|
|
.IX Item "-m4al"
|
| 11100 |
|
|
Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
|
| 11101 |
|
|
\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
|
| 11102 |
|
|
instructions at the moment.
|
| 11103 |
|
|
.IP "\fB\-mb\fR" 4
|
| 11104 |
|
|
.IX Item "-mb"
|
| 11105 |
|
|
Compile code for the processor in big endian mode.
|
| 11106 |
|
|
.IP "\fB\-ml\fR" 4
|
| 11107 |
|
|
.IX Item "-ml"
|
| 11108 |
|
|
Compile code for the processor in little endian mode.
|
| 11109 |
|
|
.IP "\fB\-mdalign\fR" 4
|
| 11110 |
|
|
.IX Item "-mdalign"
|
| 11111 |
|
|
Align doubles at 64\-bit boundaries. Note that this changes the calling
|
| 11112 |
|
|
conventions, and thus some functions from the standard C library will
|
| 11113 |
|
|
not work unless you recompile it first with \fB\-mdalign\fR.
|
| 11114 |
|
|
.IP "\fB\-mrelax\fR" 4
|
| 11115 |
|
|
.IX Item "-mrelax"
|
| 11116 |
|
|
Shorten some address references at link time, when possible; uses the
|
| 11117 |
|
|
linker option \fB\-relax\fR.
|
| 11118 |
|
|
.IP "\fB\-mbigtable\fR" 4
|
| 11119 |
|
|
.IX Item "-mbigtable"
|
| 11120 |
|
|
Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
|
| 11121 |
|
|
16\-bit offsets.
|
| 11122 |
|
|
.IP "\fB\-mfmovd\fR" 4
|
| 11123 |
|
|
.IX Item "-mfmovd"
|
| 11124 |
|
|
Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
|
| 11125 |
|
|
.IP "\fB\-mhitachi\fR" 4
|
| 11126 |
|
|
.IX Item "-mhitachi"
|
| 11127 |
|
|
Comply with the calling conventions defined by Renesas.
|
| 11128 |
|
|
.IP "\fB\-mrenesas\fR" 4
|
| 11129 |
|
|
.IX Item "-mrenesas"
|
| 11130 |
|
|
Comply with the calling conventions defined by Renesas.
|
| 11131 |
|
|
.IP "\fB\-mno\-renesas\fR" 4
|
| 11132 |
|
|
.IX Item "-mno-renesas"
|
| 11133 |
|
|
Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
|
| 11134 |
|
|
conventions were available. This option is the default for all
|
| 11135 |
|
|
targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
|
| 11136 |
|
|
.IP "\fB\-mnomacsave\fR" 4
|
| 11137 |
|
|
.IX Item "-mnomacsave"
|
| 11138 |
|
|
Mark the \f(CW\*(C`MAC\*(C'\fR register as call\-clobbered, even if
|
| 11139 |
|
|
\&\fB\-mhitachi\fR is given.
|
| 11140 |
|
|
.IP "\fB\-mieee\fR" 4
|
| 11141 |
|
|
.IX Item "-mieee"
|
| 11142 |
|
|
Increase IEEE-compliance of floating-point code.
|
| 11143 |
|
|
At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
|
| 11144 |
|
|
When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
|
| 11145 |
|
|
comparisons of NANs / infinities incurs extra overhead in every
|
| 11146 |
|
|
floating point comparison, therefore the default is set to
|
| 11147 |
|
|
\&\fB\-ffinite\-math\-only\fR.
|
| 11148 |
|
|
.IP "\fB\-misize\fR" 4
|
| 11149 |
|
|
.IX Item "-misize"
|
| 11150 |
|
|
Dump instruction size and location in the assembly code.
|
| 11151 |
|
|
.IP "\fB\-mpadstruct\fR" 4
|
| 11152 |
|
|
.IX Item "-mpadstruct"
|
| 11153 |
|
|
This option is deprecated. It pads structures to multiple of 4 bytes,
|
| 11154 |
|
|
which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
|
| 11155 |
|
|
.IP "\fB\-mspace\fR" 4
|
| 11156 |
|
|
.IX Item "-mspace"
|
| 11157 |
|
|
Optimize for space instead of speed. Implied by \fB\-Os\fR.
|
| 11158 |
|
|
.IP "\fB\-mprefergot\fR" 4
|
| 11159 |
|
|
.IX Item "-mprefergot"
|
| 11160 |
|
|
When generating position-independent code, emit function calls using
|
| 11161 |
|
|
the Global Offset Table instead of the Procedure Linkage Table.
|
| 11162 |
|
|
.IP "\fB\-musermode\fR" 4
|
| 11163 |
|
|
.IX Item "-musermode"
|
| 11164 |
|
|
Generate a library function call to invalidate instruction cache
|
| 11165 |
|
|
entries, after fixing up a trampoline. This library function call
|
| 11166 |
|
|
doesn't assume it can write to the whole memory address space. This
|
| 11167 |
|
|
is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
|
| 11168 |
|
|
.IP "\fB\-multcost=\fR\fInumber\fR" 4
|
| 11169 |
|
|
.IX Item "-multcost=number"
|
| 11170 |
|
|
Set the cost to assume for a multiply insn.
|
| 11171 |
|
|
.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
|
| 11172 |
|
|
.IX Item "-mdiv=strategy"
|
| 11173 |
|
|
Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
|
| 11174 |
|
|
one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
|
| 11175 |
|
|
inv:call2, inv:fp .
|
| 11176 |
|
|
\&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
|
| 11177 |
|
|
but needs only a few instructions, so it might be a good choice if
|
| 11178 |
|
|
your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
|
| 11179 |
|
|
schedule the floating point instructions together with other instructions.
|
| 11180 |
|
|
Division by zero causes a floating point exception.
|
| 11181 |
|
|
\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
|
| 11182 |
|
|
and then multiplies the dividend with the inverse. This strategy allows
|
| 11183 |
|
|
cse and hoisting of the inverse calculation. Division by zero calculates
|
| 11184 |
|
|
an unspecified result, but does not trap.
|
| 11185 |
|
|
\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
|
| 11186 |
|
|
have been found, or if the entire operation has been hoisted to the same
|
| 11187 |
|
|
place, the last stages of the inverse calculation are intertwined with the
|
| 11188 |
|
|
final multiply to reduce the overall latency, at the expense of using a few
|
| 11189 |
|
|
more instructions, and thus offering fewer scheduling opportunities with
|
| 11190 |
|
|
other code.
|
| 11191 |
|
|
\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
|
| 11192 |
|
|
strategy.
|
| 11193 |
|
|
This gives high code density for m5\-*media\-nofpu compilations.
|
| 11194 |
|
|
\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
|
| 11195 |
|
|
assumes that a pointer to a lookup table has already been set up, which
|
| 11196 |
|
|
exposes the pointer load to cse / code hoisting optimizations.
|
| 11197 |
|
|
\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
|
| 11198 |
|
|
code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
|
| 11199 |
|
|
\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
|
| 11200 |
|
|
potentially-trapping side effect of division by zero is carried by a
|
| 11201 |
|
|
separate instruction, so it is possible that all the integer instructions
|
| 11202 |
|
|
are hoisted out, but the marker for the side effect stays where it is.
|
| 11203 |
|
|
A recombination to fp operations or a call is not possible in that case.
|
| 11204 |
|
|
\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
|
| 11205 |
|
|
that the inverse calculation was nor separated from the multiply, they speed
|
| 11206 |
|
|
up division where the dividend fits into 20 bits (plus sign where applicable),
|
| 11207 |
|
|
by inserting a test to skip a number of operations in this case; this test
|
| 11208 |
|
|
slows down the case of larger dividends. inv20u assumes the case of a such
|
| 11209 |
|
|
a small dividend to be unlikely, and inv20l assumes it to be likely.
|
| 11210 |
|
|
.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
|
| 11211 |
|
|
.IX Item "-mdivsi3_libfunc=name"
|
| 11212 |
|
|
Set the name of the library function used for 32 bit signed division to
|
| 11213 |
|
|
\&\fIname\fR. This only affect the name used in the call and inv:call
|
| 11214 |
|
|
division strategies, and the compiler will still expect the same
|
| 11215 |
|
|
sets of input/output/clobbered registers as if this option was not present.
|
| 11216 |
|
|
.IP "\fB\-madjust\-unroll\fR" 4
|
| 11217 |
|
|
.IX Item "-madjust-unroll"
|
| 11218 |
|
|
Throttle unrolling to avoid thrashing target registers.
|
| 11219 |
|
|
This option only has an effect if the gcc code base supports the
|
| 11220 |
|
|
\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
|
| 11221 |
|
|
.IP "\fB\-mindexed\-addressing\fR" 4
|
| 11222 |
|
|
.IX Item "-mindexed-addressing"
|
| 11223 |
|
|
Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
|
| 11224 |
|
|
This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
|
| 11225 |
|
|
semantics for the indexed addressing mode. The architecture allows the
|
| 11226 |
|
|
implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
|
| 11227 |
|
|
get 32 bit addressing, but since no current hardware implementation supports
|
| 11228 |
|
|
this or any other way to make the indexed addressing mode safe to use in
|
| 11229 |
|
|
the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
|
| 11230 |
|
|
.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
|
| 11231 |
|
|
.IX Item "-mgettrcost=number"
|
| 11232 |
|
|
Set the cost assumed for the gettr instruction to \fInumber\fR.
|
| 11233 |
|
|
The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
|
| 11234 |
|
|
.IP "\fB\-mpt\-fixed\fR" 4
|
| 11235 |
|
|
.IX Item "-mpt-fixed"
|
| 11236 |
|
|
Assume pt* instructions won't trap. This will generally generate better
|
| 11237 |
|
|
scheduled code, but is unsafe on current hardware. The current architecture
|
| 11238 |
|
|
definition says that ptabs and ptrel trap when the target anded with 3 is 3.
|
| 11239 |
|
|
This has the unintentional effect of making it unsafe to schedule ptabs /
|
| 11240 |
|
|
ptrel before a branch, or hoist it out of a loop. For example,
|
| 11241 |
|
|
_\|_do_global_ctors, a part of libgcc that runs constructors at program
|
| 11242 |
|
|
startup, calls functions in a list which is delimited by \-1. With the
|
| 11243 |
|
|
\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
|
| 11244 |
|
|
That means that all the constructors will be run a bit quicker, but when
|
| 11245 |
|
|
the loop comes to the end of the list, the program crashes because ptabs
|
| 11246 |
|
|
loads \-1 into a target register. Since this option is unsafe for any
|
| 11247 |
|
|
hardware implementing the current architecture specification, the default
|
| 11248 |
|
|
is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
|
| 11249 |
|
|
\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
|
| 11250 |
|
|
this deters register allocation using target registers for storing
|
| 11251 |
|
|
ordinary integers.
|
| 11252 |
|
|
.IP "\fB\-minvalid\-symbols\fR" 4
|
| 11253 |
|
|
.IX Item "-minvalid-symbols"
|
| 11254 |
|
|
Assume symbols might be invalid. Ordinary function symbols generated by
|
| 11255 |
|
|
the compiler will always be valid to load with movi/shori/ptabs or
|
| 11256 |
|
|
movi/shori/ptrel, but with assembler and/or linker tricks it is possible
|
| 11257 |
|
|
to generate symbols that will cause ptabs / ptrel to trap.
|
| 11258 |
|
|
This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
|
| 11259 |
|
|
It will then prevent cross-basic-block cse, hoisting and most scheduling
|
| 11260 |
|
|
of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
|
| 11261 |
|
|
.PP
|
| 11262 |
|
|
\fI\s-1SPARC\s0 Options\fR
|
| 11263 |
|
|
.IX Subsection "SPARC Options"
|
| 11264 |
|
|
.PP
|
| 11265 |
|
|
These \fB\-m\fR options are supported on the \s-1SPARC:\s0
|
| 11266 |
|
|
.IP "\fB\-mno\-app\-regs\fR" 4
|
| 11267 |
|
|
.IX Item "-mno-app-regs"
|
| 11268 |
|
|
.PD 0
|
| 11269 |
|
|
.IP "\fB\-mapp\-regs\fR" 4
|
| 11270 |
|
|
.IX Item "-mapp-regs"
|
| 11271 |
|
|
.PD
|
| 11272 |
|
|
Specify \fB\-mapp\-regs\fR to generate output using the global registers
|
| 11273 |
|
|
2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
|
| 11274 |
|
|
is the default.
|
| 11275 |
|
|
.Sp
|
| 11276 |
|
|
To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
|
| 11277 |
|
|
specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
|
| 11278 |
|
|
software with this option.
|
| 11279 |
|
|
.IP "\fB\-mfpu\fR" 4
|
| 11280 |
|
|
.IX Item "-mfpu"
|
| 11281 |
|
|
.PD 0
|
| 11282 |
|
|
.IP "\fB\-mhard\-float\fR" 4
|
| 11283 |
|
|
.IX Item "-mhard-float"
|
| 11284 |
|
|
.PD
|
| 11285 |
|
|
Generate output containing floating point instructions. This is the
|
| 11286 |
|
|
default.
|
| 11287 |
|
|
.IP "\fB\-mno\-fpu\fR" 4
|
| 11288 |
|
|
.IX Item "-mno-fpu"
|
| 11289 |
|
|
.PD 0
|
| 11290 |
|
|
.IP "\fB\-msoft\-float\fR" 4
|
| 11291 |
|
|
.IX Item "-msoft-float"
|
| 11292 |
|
|
.PD
|
| 11293 |
|
|
Generate output containing library calls for floating point.
|
| 11294 |
|
|
\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
|
| 11295 |
|
|
targets. Normally the facilities of the machine's usual C compiler are
|
| 11296 |
|
|
used, but this cannot be done directly in cross\-compilation. You must make
|
| 11297 |
|
|
your own arrangements to provide suitable library functions for
|
| 11298 |
|
|
cross\-compilation. The embedded targets \fBsparc\-*\-aout\fR and
|
| 11299 |
|
|
\&\fBsparclite\-*\-*\fR do provide software floating point support.
|
| 11300 |
|
|
.Sp
|
| 11301 |
|
|
\&\fB\-msoft\-float\fR changes the calling convention in the output file;
|
| 11302 |
|
|
therefore, it is only useful if you compile \fIall\fR of a program with
|
| 11303 |
|
|
this option. In particular, you need to compile \fIlibgcc.a\fR, the
|
| 11304 |
|
|
library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
|
| 11305 |
|
|
this to work.
|
| 11306 |
|
|
.IP "\fB\-mhard\-quad\-float\fR" 4
|
| 11307 |
|
|
.IX Item "-mhard-quad-float"
|
| 11308 |
|
|
Generate output containing quad-word (long double) floating point
|
| 11309 |
|
|
instructions.
|
| 11310 |
|
|
.IP "\fB\-msoft\-quad\-float\fR" 4
|
| 11311 |
|
|
.IX Item "-msoft-quad-float"
|
| 11312 |
|
|
Generate output containing library calls for quad-word (long double)
|
| 11313 |
|
|
floating point instructions. The functions called are those specified
|
| 11314 |
|
|
in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
|
| 11315 |
|
|
.Sp
|
| 11316 |
|
|
As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
|
| 11317 |
|
|
support for the quad-word floating point instructions. They all invoke
|
| 11318 |
|
|
a trap handler for one of these instructions, and then the trap handler
|
| 11319 |
|
|
emulates the effect of the instruction. Because of the trap handler overhead,
|
| 11320 |
|
|
this is much slower than calling the \s-1ABI\s0 library routines. Thus the
|
| 11321 |
|
|
\&\fB\-msoft\-quad\-float\fR option is the default.
|
| 11322 |
|
|
.IP "\fB\-mno\-unaligned\-doubles\fR" 4
|
| 11323 |
|
|
.IX Item "-mno-unaligned-doubles"
|
| 11324 |
|
|
.PD 0
|
| 11325 |
|
|
.IP "\fB\-munaligned\-doubles\fR" 4
|
| 11326 |
|
|
.IX Item "-munaligned-doubles"
|
| 11327 |
|
|
.PD
|
| 11328 |
|
|
Assume that doubles have 8 byte alignment. This is the default.
|
| 11329 |
|
|
.Sp
|
| 11330 |
|
|
With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
|
| 11331 |
|
|
alignment only if they are contained in another type, or if they have an
|
| 11332 |
|
|
absolute address. Otherwise, it assumes they have 4 byte alignment.
|
| 11333 |
|
|
Specifying this option avoids some rare compatibility problems with code
|
| 11334 |
|
|
generated by other compilers. It is not the default because it results
|
| 11335 |
|
|
in a performance loss, especially for floating point code.
|
| 11336 |
|
|
.IP "\fB\-mno\-faster\-structs\fR" 4
|
| 11337 |
|
|
.IX Item "-mno-faster-structs"
|
| 11338 |
|
|
.PD 0
|
| 11339 |
|
|
.IP "\fB\-mfaster\-structs\fR" 4
|
| 11340 |
|
|
.IX Item "-mfaster-structs"
|
| 11341 |
|
|
.PD
|
| 11342 |
|
|
With \fB\-mfaster\-structs\fR, the compiler assumes that structures
|
| 11343 |
|
|
should have 8 byte alignment. This enables the use of pairs of
|
| 11344 |
|
|
\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
|
| 11345 |
|
|
assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
|
| 11346 |
|
|
However, the use of this changed alignment directly violates the \s-1SPARC\s0
|
| 11347 |
|
|
\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
|
| 11348 |
|
|
acknowledges that their resulting code will not be directly in line with
|
| 11349 |
|
|
the rules of the \s-1ABI\s0.
|
| 11350 |
|
|
.IP "\fB\-mimpure\-text\fR" 4
|
| 11351 |
|
|
.IX Item "-mimpure-text"
|
| 11352 |
|
|
\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
|
| 11353 |
|
|
the compiler to not pass \fB\-z text\fR to the linker when linking a
|
| 11354 |
|
|
shared object. Using this option, you can link position-dependent
|
| 11355 |
|
|
code into a shared object.
|
| 11356 |
|
|
.Sp
|
| 11357 |
|
|
\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
|
| 11358 |
|
|
allocatable but non-writable sections\*(R" linker error message.
|
| 11359 |
|
|
However, the necessary relocations will trigger copy\-on\-write, and the
|
| 11360 |
|
|
shared object is not actually shared across processes. Instead of
|
| 11361 |
|
|
using \fB\-mimpure\-text\fR, you should compile all source code with
|
| 11362 |
|
|
\&\fB\-fpic\fR or \fB\-fPIC\fR.
|
| 11363 |
|
|
.Sp
|
| 11364 |
|
|
This option is only available on SunOS and Solaris.
|
| 11365 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
| 11366 |
|
|
.IX Item "-mcpu=cpu_type"
|
| 11367 |
|
|
Set the instruction set, register set, and instruction scheduling parameters
|
| 11368 |
|
|
for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
|
| 11369 |
|
|
\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
|
| 11370 |
|
|
\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
|
| 11371 |
|
|
\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR, and
|
| 11372 |
|
|
\&\fBultrasparc3\fR.
|
| 11373 |
|
|
.Sp
|
| 11374 |
|
|
Default instruction scheduling parameters are used for values that select
|
| 11375 |
|
|
an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
|
| 11376 |
|
|
\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
|
| 11377 |
|
|
.Sp
|
| 11378 |
|
|
Here is a list of each supported architecture and their supported
|
| 11379 |
|
|
implementations.
|
| 11380 |
|
|
.Sp
|
| 11381 |
|
|
.Vb 5
|
| 11382 |
|
|
\& v7: cypress
|
| 11383 |
|
|
\& v8: supersparc, hypersparc
|
| 11384 |
|
|
\& sparclite: f930, f934, sparclite86x
|
| 11385 |
|
|
\& sparclet: tsc701
|
| 11386 |
|
|
\& v9: ultrasparc, ultrasparc3
|
| 11387 |
|
|
.Ve
|
| 11388 |
|
|
.Sp
|
| 11389 |
|
|
By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
|
| 11390 |
|
|
variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
|
| 11391 |
|
|
additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
|
| 11392 |
|
|
SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
|
| 11393 |
|
|
SPARCStation 1, 2, \s-1IPX\s0 etc.
|
| 11394 |
|
|
.Sp
|
| 11395 |
|
|
With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
|
| 11396 |
|
|
architecture. The only difference from V7 code is that the compiler emits
|
| 11397 |
|
|
the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
|
| 11398 |
|
|
but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
|
| 11399 |
|
|
optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
|
| 11400 |
|
|
2000 series.
|
| 11401 |
|
|
.Sp
|
| 11402 |
|
|
With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
|
| 11403 |
|
|
the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
|
| 11404 |
|
|
and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
|
| 11405 |
|
|
With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
|
| 11406 |
|
|
Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
|
| 11407 |
|
|
\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
|
| 11408 |
|
|
\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
|
| 11409 |
|
|
.Sp
|
| 11410 |
|
|
With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
|
| 11411 |
|
|
the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
|
| 11412 |
|
|
integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
|
| 11413 |
|
|
but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
|
| 11414 |
|
|
optimizes it for the \s-1TEMIC\s0 SPARClet chip.
|
| 11415 |
|
|
.Sp
|
| 11416 |
|
|
With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
|
| 11417 |
|
|
architecture. This adds 64\-bit integer and floating-point move instructions,
|
| 11418 |
|
|
3 additional floating-point condition code registers and conditional move
|
| 11419 |
|
|
instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
|
| 11420 |
|
|
optimizes it for the Sun UltraSPARC I/II chips. With
|
| 11421 |
|
|
\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
|
| 11422 |
|
|
Sun UltraSPARC \s-1III\s0 chip.
|
| 11423 |
|
|
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
|
| 11424 |
|
|
.IX Item "-mtune=cpu_type"
|
| 11425 |
|
|
Set the instruction scheduling parameters for machine type
|
| 11426 |
|
|
\&\fIcpu_type\fR, but do not set the instruction set or register set that the
|
| 11427 |
|
|
option \fB\-mcpu=\fR\fIcpu_type\fR would.
|
| 11428 |
|
|
.Sp
|
| 11429 |
|
|
The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
|
| 11430 |
|
|
\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
|
| 11431 |
|
|
that select a particular cpu implementation. Those are \fBcypress\fR,
|
| 11432 |
|
|
\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
|
| 11433 |
|
|
\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR, and
|
| 11434 |
|
|
\&\fBultrasparc3\fR.
|
| 11435 |
|
|
.IP "\fB\-mv8plus\fR" 4
|
| 11436 |
|
|
.IX Item "-mv8plus"
|
| 11437 |
|
|
.PD 0
|
| 11438 |
|
|
.IP "\fB\-mno\-v8plus\fR" 4
|
| 11439 |
|
|
.IX Item "-mno-v8plus"
|
| 11440 |
|
|
.PD
|
| 11441 |
|
|
With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
|
| 11442 |
|
|
difference from the V8 \s-1ABI\s0 is that the global and out registers are
|
| 11443 |
|
|
considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
|
| 11444 |
|
|
mode for all \s-1SPARC\-V9\s0 processors.
|
| 11445 |
|
|
.IP "\fB\-mvis\fR" 4
|
| 11446 |
|
|
.IX Item "-mvis"
|
| 11447 |
|
|
.PD 0
|
| 11448 |
|
|
.IP "\fB\-mno\-vis\fR" 4
|
| 11449 |
|
|
.IX Item "-mno-vis"
|
| 11450 |
|
|
.PD
|
| 11451 |
|
|
With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
|
| 11452 |
|
|
Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
|
| 11453 |
|
|
.PP
|
| 11454 |
|
|
These \fB\-m\fR options are supported in addition to the above
|
| 11455 |
|
|
on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
|
| 11456 |
|
|
.IP "\fB\-mlittle\-endian\fR" 4
|
| 11457 |
|
|
.IX Item "-mlittle-endian"
|
| 11458 |
|
|
Generate code for a processor running in little-endian mode. It is only
|
| 11459 |
|
|
available for a few configurations and most notably not on Solaris and Linux.
|
| 11460 |
|
|
.IP "\fB\-m32\fR" 4
|
| 11461 |
|
|
.IX Item "-m32"
|
| 11462 |
|
|
.PD 0
|
| 11463 |
|
|
.IP "\fB\-m64\fR" 4
|
| 11464 |
|
|
.IX Item "-m64"
|
| 11465 |
|
|
.PD
|
| 11466 |
|
|
Generate code for a 32\-bit or 64\-bit environment.
|
| 11467 |
|
|
The 32\-bit environment sets int, long and pointer to 32 bits.
|
| 11468 |
|
|
The 64\-bit environment sets int to 32 bits and long and pointer
|
| 11469 |
|
|
to 64 bits.
|
| 11470 |
|
|
.IP "\fB\-mcmodel=medlow\fR" 4
|
| 11471 |
|
|
.IX Item "-mcmodel=medlow"
|
| 11472 |
|
|
Generate code for the Medium/Low code model: 64\-bit addresses, programs
|
| 11473 |
|
|
must be linked in the low 32 bits of memory. Programs can be statically
|
| 11474 |
|
|
or dynamically linked.
|
| 11475 |
|
|
.IP "\fB\-mcmodel=medmid\fR" 4
|
| 11476 |
|
|
.IX Item "-mcmodel=medmid"
|
| 11477 |
|
|
Generate code for the Medium/Middle code model: 64\-bit addresses, programs
|
| 11478 |
|
|
must be linked in the low 44 bits of memory, the text and data segments must
|
| 11479 |
|
|
be less than 2GB in size and the data segment must be located within 2GB of
|
| 11480 |
|
|
the text segment.
|
| 11481 |
|
|
.IP "\fB\-mcmodel=medany\fR" 4
|
| 11482 |
|
|
.IX Item "-mcmodel=medany"
|
| 11483 |
|
|
Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
|
| 11484 |
|
|
may be linked anywhere in memory, the text and data segments must be less
|
| 11485 |
|
|
than 2GB in size and the data segment must be located within 2GB of the
|
| 11486 |
|
|
text segment.
|
| 11487 |
|
|
.IP "\fB\-mcmodel=embmedany\fR" 4
|
| 11488 |
|
|
.IX Item "-mcmodel=embmedany"
|
| 11489 |
|
|
Generate code for the Medium/Anywhere code model for embedded systems:
|
| 11490 |
|
|
64\-bit addresses, the text and data segments must be less than 2GB in
|
| 11491 |
|
|
size, both starting anywhere in memory (determined at link time). The
|
| 11492 |
|
|
global register \f(CW%g4\fR points to the base of the data segment. Programs
|
| 11493 |
|
|
are statically linked and \s-1PIC\s0 is not supported.
|
| 11494 |
|
|
.IP "\fB\-mstack\-bias\fR" 4
|
| 11495 |
|
|
.IX Item "-mstack-bias"
|
| 11496 |
|
|
.PD 0
|
| 11497 |
|
|
.IP "\fB\-mno\-stack\-bias\fR" 4
|
| 11498 |
|
|
.IX Item "-mno-stack-bias"
|
| 11499 |
|
|
.PD
|
| 11500 |
|
|
With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
|
| 11501 |
|
|
frame pointer if present, are offset by \-2047 which must be added back
|
| 11502 |
|
|
when making stack frame references. This is the default in 64\-bit mode.
|
| 11503 |
|
|
Otherwise, assume no such offset is present.
|
| 11504 |
|
|
.PP
|
| 11505 |
|
|
These switches are supported in addition to the above on Solaris:
|
| 11506 |
|
|
.IP "\fB\-threads\fR" 4
|
| 11507 |
|
|
.IX Item "-threads"
|
| 11508 |
|
|
Add support for multithreading using the Solaris threads library. This
|
| 11509 |
|
|
option sets flags for both the preprocessor and linker. This option does
|
| 11510 |
|
|
not affect the thread safety of object code produced by the compiler or
|
| 11511 |
|
|
that of libraries supplied with it.
|
| 11512 |
|
|
.IP "\fB\-pthreads\fR" 4
|
| 11513 |
|
|
.IX Item "-pthreads"
|
| 11514 |
|
|
Add support for multithreading using the \s-1POSIX\s0 threads library. This
|
| 11515 |
|
|
option sets flags for both the preprocessor and linker. This option does
|
| 11516 |
|
|
not affect the thread safety of object code produced by the compiler or
|
| 11517 |
|
|
that of libraries supplied with it.
|
| 11518 |
|
|
.IP "\fB\-pthread\fR" 4
|
| 11519 |
|
|
.IX Item "-pthread"
|
| 11520 |
|
|
This is a synonym for \fB\-pthreads\fR.
|
| 11521 |
|
|
.PP
|
| 11522 |
|
|
\fIOptions for System V\fR
|
| 11523 |
|
|
.IX Subsection "Options for System V"
|
| 11524 |
|
|
.PP
|
| 11525 |
|
|
These additional options are available on System V Release 4 for
|
| 11526 |
|
|
compatibility with other compilers on those systems:
|
| 11527 |
|
|
.IP "\fB\-G\fR" 4
|
| 11528 |
|
|
.IX Item "-G"
|
| 11529 |
|
|
Create a shared object.
|
| 11530 |
|
|
It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
|
| 11531 |
|
|
.IP "\fB\-Qy\fR" 4
|
| 11532 |
|
|
.IX Item "-Qy"
|
| 11533 |
|
|
Identify the versions of each tool used by the compiler, in a
|
| 11534 |
|
|
\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
|
| 11535 |
|
|
.IP "\fB\-Qn\fR" 4
|
| 11536 |
|
|
.IX Item "-Qn"
|
| 11537 |
|
|
Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
|
| 11538 |
|
|
the default).
|
| 11539 |
|
|
.IP "\fB\-YP,\fR\fIdirs\fR" 4
|
| 11540 |
|
|
.IX Item "-YP,dirs"
|
| 11541 |
|
|
Search the directories \fIdirs\fR, and no others, for libraries
|
| 11542 |
|
|
specified with \fB\-l\fR.
|
| 11543 |
|
|
.IP "\fB\-Ym,\fR\fIdir\fR" 4
|
| 11544 |
|
|
.IX Item "-Ym,dir"
|
| 11545 |
|
|
Look in the directory \fIdir\fR to find the M4 preprocessor.
|
| 11546 |
|
|
The assembler uses this option.
|
| 11547 |
|
|
.PP
|
| 11548 |
|
|
\fITMS320C3x/C4x Options\fR
|
| 11549 |
|
|
.IX Subsection "TMS320C3x/C4x Options"
|
| 11550 |
|
|
.PP
|
| 11551 |
|
|
These \fB\-m\fR options are defined for TMS320C3x/C4x implementations:
|
| 11552 |
|
|
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
|
| 11553 |
|
|
.IX Item "-mcpu=cpu_type"
|
| 11554 |
|
|
Set the instruction set, register set, and instruction scheduling
|
| 11555 |
|
|
parameters for machine type \fIcpu_type\fR. Supported values for
|
| 11556 |
|
|
\&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and
|
| 11557 |
|
|
\&\fBc44\fR. The default is \fBc40\fR to generate code for the
|
| 11558 |
|
|
\&\s-1TMS320C40\s0.
|
| 11559 |
|
|
.IP "\fB\-mbig\-memory\fR" 4
|
| 11560 |
|
|
.IX Item "-mbig-memory"
|
| 11561 |
|
|
.PD 0
|
| 11562 |
|
|
.IP "\fB\-mbig\fR" 4
|
| 11563 |
|
|
.IX Item "-mbig"
|
| 11564 |
|
|
.IP "\fB\-msmall\-memory\fR" 4
|
| 11565 |
|
|
.IX Item "-msmall-memory"
|
| 11566 |
|
|
.IP "\fB\-msmall\fR" 4
|
| 11567 |
|
|
.IX Item "-msmall"
|
| 11568 |
|
|
.PD
|
| 11569 |
|
|
Generates code for the big or small memory model. The small memory
|
| 11570 |
|
|
model assumed that all data fits into one 64K word page. At run-time
|
| 11571 |
|
|
the data page (\s-1DP\s0) register must be set to point to the 64K page
|
| 11572 |
|
|
containing the .bss and .data program sections. The big memory model is
|
| 11573 |
|
|
the default and requires reloading of the \s-1DP\s0 register for every direct
|
| 11574 |
|
|
memory access.
|
| 11575 |
|
|
.IP "\fB\-mbk\fR" 4
|
| 11576 |
|
|
.IX Item "-mbk"
|
| 11577 |
|
|
.PD 0
|
| 11578 |
|
|
.IP "\fB\-mno\-bk\fR" 4
|
| 11579 |
|
|
.IX Item "-mno-bk"
|
| 11580 |
|
|
.PD
|
| 11581 |
|
|
Allow (disallow) allocation of general integer operands into the block
|
| 11582 |
|
|
count register \s-1BK\s0.
|
| 11583 |
|
|
.IP "\fB\-mdb\fR" 4
|
| 11584 |
|
|
.IX Item "-mdb"
|
| 11585 |
|
|
.PD 0
|
| 11586 |
|
|
.IP "\fB\-mno\-db\fR" 4
|
| 11587 |
|
|
.IX Item "-mno-db"
|
| 11588 |
|
|
.PD
|
| 11589 |
|
|
Enable (disable) generation of code using decrement and branch,
|
| 11590 |
|
|
DBcond(D), instructions. This is enabled by default for the C4x. To be
|
| 11591 |
|
|
on the safe side, this is disabled for the C3x, since the maximum
|
| 11592 |
|
|
iteration count on the C3x is 2^{23 + 1} (but who iterates loops more than
|
| 11593 |
|
|
2^{23} times on the C3x?). Note that \s-1GCC\s0 will try to reverse a loop so
|
| 11594 |
|
|
that it can utilize the decrement and branch instruction, but will give
|
| 11595 |
|
|
up if there is more than one memory reference in the loop. Thus a loop
|
| 11596 |
|
|
where the loop counter is decremented can generate slightly more
|
| 11597 |
|
|
efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilized.
|
| 11598 |
|
|
.IP "\fB\-mdp\-isr\-reload\fR" 4
|
| 11599 |
|
|
.IX Item "-mdp-isr-reload"
|
| 11600 |
|
|
.PD 0
|
| 11601 |
|
|
.IP "\fB\-mparanoid\fR" 4
|
| 11602 |
|
|
.IX Item "-mparanoid"
|
| 11603 |
|
|
.PD
|
| 11604 |
|
|
Force the \s-1DP\s0 register to be saved on entry to an interrupt service
|
| 11605 |
|
|
routine (\s-1ISR\s0), reloaded to point to the data section, and restored on
|
| 11606 |
|
|
exit from the \s-1ISR\s0. This should not be required unless someone has
|
| 11607 |
|
|
violated the small memory model by modifying the \s-1DP\s0 register, say within
|
| 11608 |
|
|
an object library.
|
| 11609 |
|
|
.IP "\fB\-mmpyi\fR" 4
|
| 11610 |
|
|
.IX Item "-mmpyi"
|
| 11611 |
|
|
.PD 0
|
| 11612 |
|
|
.IP "\fB\-mno\-mpyi\fR" 4
|
| 11613 |
|
|
.IX Item "-mno-mpyi"
|
| 11614 |
|
|
.PD
|
| 11615 |
|
|
For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies
|
| 11616 |
|
|
instead of a library call to guarantee 32\-bit results. Note that if one
|
| 11617 |
|
|
of the operands is a constant, then the multiplication will be performed
|
| 11618 |
|
|
using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x,
|
| 11619 |
|
|
then squaring operations are performed inline instead of a library call.
|
| 11620 |
|
|
.IP "\fB\-mfast\-fix\fR" 4
|
| 11621 |
|
|
.IX Item "-mfast-fix"
|
| 11622 |
|
|
.PD 0
|
| 11623 |
|
|
.IP "\fB\-mno\-fast\-fix\fR" 4
|
| 11624 |
|
|
.IX Item "-mno-fast-fix"
|
| 11625 |
|
|
.PD
|
| 11626 |
|
|
The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an
|
| 11627 |
|
|
integer value chooses the nearest integer less than or equal to the
|
| 11628 |
|
|
floating point value rather than to the nearest integer. Thus if the
|
| 11629 |
|
|
floating point number is negative, the result will be incorrectly
|
| 11630 |
|
|
truncated an additional code is necessary to detect and correct this
|
| 11631 |
|
|
case. This option can be used to disable generation of the additional
|
| 11632 |
|
|
code required to correct the result.
|
| 11633 |
|
|
.IP "\fB\-mrptb\fR" 4
|
| 11634 |
|
|
.IX Item "-mrptb"
|
| 11635 |
|
|
.PD 0
|
| 11636 |
|
|
.IP "\fB\-mno\-rptb\fR" 4
|
| 11637 |
|
|
.IX Item "-mno-rptb"
|
| 11638 |
|
|
.PD
|
| 11639 |
|
|
Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0
|
| 11640 |
|
|
instruction for zero overhead looping. The \s-1RPTB\s0 construct is only used
|
| 11641 |
|
|
for innermost loops that do not call functions or jump across the loop
|
| 11642 |
|
|
boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the
|
| 11643 |
|
|
overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers.
|
| 11644 |
|
|
This is enabled by default with \fB\-O2\fR.
|
| 11645 |
|
|
.IP "\fB\-mrpts=\fR\fIcount\fR" 4
|
| 11646 |
|
|
.IX Item "-mrpts=count"
|
| 11647 |
|
|
.PD 0
|
| 11648 |
|
|
.IP "\fB\-mno\-rpts\fR" 4
|
| 11649 |
|
|
.IX Item "-mno-rpts"
|
| 11650 |
|
|
.PD
|
| 11651 |
|
|
Enable (disable) the use of the single instruction repeat instruction
|
| 11652 |
|
|
\&\s-1RPTS\s0. If a repeat block contains a single instruction, and the loop
|
| 11653 |
|
|
count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will
|
| 11654 |
|
|
emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0. If no value is specified,
|
| 11655 |
|
|
then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined
|
| 11656 |
|
|
at compile time. Note that the repeated instruction following \s-1RPTS\s0 does
|
| 11657 |
|
|
not have to be reloaded from memory each iteration, thus freeing up the
|
| 11658 |
|
|
\&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this
|
| 11659 |
|
|
instruction, it is disabled by default.
|
| 11660 |
|
|
.IP "\fB\-mloop\-unsigned\fR" 4
|
| 11661 |
|
|
.IX Item "-mloop-unsigned"
|
| 11662 |
|
|
.PD 0
|
| 11663 |
|
|
.IP "\fB\-mno\-loop\-unsigned\fR" 4
|
| 11664 |
|
|
.IX Item "-mno-loop-unsigned"
|
| 11665 |
|
|
.PD
|
| 11666 |
|
|
The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40)
|
| 11667 |
|
|
is 2^{31 + 1} since these instructions test if the iteration count is
|
| 11668 |
|
|
negative to terminate the loop. If the iteration count is unsigned
|
| 11669 |
|
|
there is a possibility than the 2^{31 + 1} maximum iteration count may be
|
| 11670 |
|
|
exceeded. This switch allows an unsigned iteration count.
|
| 11671 |
|
|
.IP "\fB\-mti\fR" 4
|
| 11672 |
|
|
.IX Item "-mti"
|
| 11673 |
|
|
Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy
|
| 11674 |
|
|
with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0
|
| 11675 |
|
|
C3x C compiler. For example, long doubles are passed as structures
|
| 11676 |
|
|
rather than in floating point registers.
|
| 11677 |
|
|
.IP "\fB\-mregparm\fR" 4
|
| 11678 |
|
|
.IX Item "-mregparm"
|
| 11679 |
|
|
.PD 0
|
| 11680 |
|
|
.IP "\fB\-mmemparm\fR" 4
|
| 11681 |
|
|
.IX Item "-mmemparm"
|
| 11682 |
|
|
.PD
|
| 11683 |
|
|
Generate code that uses registers (stack) for passing arguments to functions.
|
| 11684 |
|
|
By default, arguments are passed in registers where possible rather
|
| 11685 |
|
|
than by pushing arguments on to the stack.
|
| 11686 |
|
|
.IP "\fB\-mparallel\-insns\fR" 4
|
| 11687 |
|
|
.IX Item "-mparallel-insns"
|
| 11688 |
|
|
.PD 0
|
| 11689 |
|
|
.IP "\fB\-mno\-parallel\-insns\fR" 4
|
| 11690 |
|
|
.IX Item "-mno-parallel-insns"
|
| 11691 |
|
|
.PD
|
| 11692 |
|
|
Allow the generation of parallel instructions. This is enabled by
|
| 11693 |
|
|
default with \fB\-O2\fR.
|
| 11694 |
|
|
.IP "\fB\-mparallel\-mpy\fR" 4
|
| 11695 |
|
|
.IX Item "-mparallel-mpy"
|
| 11696 |
|
|
.PD 0
|
| 11697 |
|
|
.IP "\fB\-mno\-parallel\-mpy\fR" 4
|
| 11698 |
|
|
.IX Item "-mno-parallel-mpy"
|
| 11699 |
|
|
.PD
|
| 11700 |
|
|
Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
|
| 11701 |
|
|
provided \fB\-mparallel\-insns\fR is also specified. These instructions have
|
| 11702 |
|
|
tight register constraints which can pessimize the code generation
|
| 11703 |
|
|
of large functions.
|
| 11704 |
|
|
.PP
|
| 11705 |
|
|
\fIV850 Options\fR
|
| 11706 |
|
|
.IX Subsection "V850 Options"
|
| 11707 |
|
|
.PP
|
| 11708 |
|
|
These \fB\-m\fR options are defined for V850 implementations:
|
| 11709 |
|
|
.IP "\fB\-mlong\-calls\fR" 4
|
| 11710 |
|
|
.IX Item "-mlong-calls"
|
| 11711 |
|
|
.PD 0
|
| 11712 |
|
|
.IP "\fB\-mno\-long\-calls\fR" 4
|
| 11713 |
|
|
.IX Item "-mno-long-calls"
|
| 11714 |
|
|
.PD
|
| 11715 |
|
|
Treat all calls as being far away (near). If calls are assumed to be
|
| 11716 |
|
|
far away, the compiler will always load the functions address up into a
|
| 11717 |
|
|
register, and call indirect through the pointer.
|
| 11718 |
|
|
.IP "\fB\-mno\-ep\fR" 4
|
| 11719 |
|
|
.IX Item "-mno-ep"
|
| 11720 |
|
|
.PD 0
|
| 11721 |
|
|
.IP "\fB\-mep\fR" 4
|
| 11722 |
|
|
.IX Item "-mep"
|
| 11723 |
|
|
.PD
|
| 11724 |
|
|
Do not optimize (do optimize) basic blocks that use the same index
|
| 11725 |
|
|
pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
|
| 11726 |
|
|
use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
|
| 11727 |
|
|
option is on by default if you optimize.
|
| 11728 |
|
|
.IP "\fB\-mno\-prolog\-function\fR" 4
|
| 11729 |
|
|
.IX Item "-mno-prolog-function"
|
| 11730 |
|
|
.PD 0
|
| 11731 |
|
|
.IP "\fB\-mprolog\-function\fR" 4
|
| 11732 |
|
|
.IX Item "-mprolog-function"
|
| 11733 |
|
|
.PD
|
| 11734 |
|
|
Do not use (do use) external functions to save and restore registers
|
| 11735 |
|
|
at the prologue and epilogue of a function. The external functions
|
| 11736 |
|
|
are slower, but use less code space if more than one function saves
|
| 11737 |
|
|
the same number of registers. The \fB\-mprolog\-function\fR option
|
| 11738 |
|
|
is on by default if you optimize.
|
| 11739 |
|
|
.IP "\fB\-mspace\fR" 4
|
| 11740 |
|
|
.IX Item "-mspace"
|
| 11741 |
|
|
Try to make the code as small as possible. At present, this just turns
|
| 11742 |
|
|
on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
|
| 11743 |
|
|
.IP "\fB\-mtda=\fR\fIn\fR" 4
|
| 11744 |
|
|
.IX Item "-mtda=n"
|
| 11745 |
|
|
Put static or global variables whose size is \fIn\fR bytes or less into
|
| 11746 |
|
|
the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
|
| 11747 |
|
|
area can hold up to 256 bytes in total (128 bytes for byte references).
|
| 11748 |
|
|
.IP "\fB\-msda=\fR\fIn\fR" 4
|
| 11749 |
|
|
.IX Item "-msda=n"
|
| 11750 |
|
|
Put static or global variables whose size is \fIn\fR bytes or less into
|
| 11751 |
|
|
the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
|
| 11752 |
|
|
area can hold up to 64 kilobytes.
|
| 11753 |
|
|
.IP "\fB\-mzda=\fR\fIn\fR" 4
|
| 11754 |
|
|
.IX Item "-mzda=n"
|
| 11755 |
|
|
Put static or global variables whose size is \fIn\fR bytes or less into
|
| 11756 |
|
|
the first 32 kilobytes of memory.
|
| 11757 |
|
|
.IP "\fB\-mv850\fR" 4
|
| 11758 |
|
|
.IX Item "-mv850"
|
| 11759 |
|
|
Specify that the target processor is the V850.
|
| 11760 |
|
|
.IP "\fB\-mbig\-switch\fR" 4
|
| 11761 |
|
|
.IX Item "-mbig-switch"
|
| 11762 |
|
|
Generate code suitable for big switch tables. Use this option only if
|
| 11763 |
|
|
the assembler/linker complain about out of range branches within a switch
|
| 11764 |
|
|
table.
|
| 11765 |
|
|
.IP "\fB\-mapp\-regs\fR" 4
|
| 11766 |
|
|
.IX Item "-mapp-regs"
|
| 11767 |
|
|
This option will cause r2 and r5 to be used in the code generated by
|
| 11768 |
|
|
the compiler. This setting is the default.
|
| 11769 |
|
|
.IP "\fB\-mno\-app\-regs\fR" 4
|
| 11770 |
|
|
.IX Item "-mno-app-regs"
|
| 11771 |
|
|
This option will cause r2 and r5 to be treated as fixed registers.
|
| 11772 |
|
|
.IP "\fB\-mv850e1\fR" 4
|
| 11773 |
|
|
.IX Item "-mv850e1"
|
| 11774 |
|
|
Specify that the target processor is the V850E1. The preprocessor
|
| 11775 |
|
|
constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
|
| 11776 |
|
|
this option is used.
|
| 11777 |
|
|
.IP "\fB\-mv850e\fR" 4
|
| 11778 |
|
|
.IX Item "-mv850e"
|
| 11779 |
|
|
Specify that the target processor is the V850E. The preprocessor
|
| 11780 |
|
|
constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
|
| 11781 |
|
|
.Sp
|
| 11782 |
|
|
If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
|
| 11783 |
|
|
are defined then a default target processor will be chosen and the
|
| 11784 |
|
|
relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
|
| 11785 |
|
|
.Sp
|
| 11786 |
|
|
The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
|
| 11787 |
|
|
defined, regardless of which processor variant is the target.
|
| 11788 |
|
|
.IP "\fB\-mdisable\-callt\fR" 4
|
| 11789 |
|
|
.IX Item "-mdisable-callt"
|
| 11790 |
|
|
This option will suppress generation of the \s-1CALLT\s0 instruction for the
|
| 11791 |
|
|
v850e and v850e1 flavors of the v850 architecture. The default is
|
| 11792 |
|
|
\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
|
| 11793 |
|
|
.PP
|
| 11794 |
|
|
\fI\s-1VAX\s0 Options\fR
|
| 11795 |
|
|
.IX Subsection "VAX Options"
|
| 11796 |
|
|
.PP
|
| 11797 |
|
|
These \fB\-m\fR options are defined for the \s-1VAX:\s0
|
| 11798 |
|
|
.IP "\fB\-munix\fR" 4
|
| 11799 |
|
|
.IX Item "-munix"
|
| 11800 |
|
|
Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
|
| 11801 |
|
|
that the Unix assembler for the \s-1VAX\s0 cannot handle across long
|
| 11802 |
|
|
ranges.
|
| 11803 |
|
|
.IP "\fB\-mgnu\fR" 4
|
| 11804 |
|
|
.IX Item "-mgnu"
|
| 11805 |
|
|
Do output those jump instructions, on the assumption that you
|
| 11806 |
|
|
will assemble with the \s-1GNU\s0 assembler.
|
| 11807 |
|
|
.IP "\fB\-mg\fR" 4
|
| 11808 |
|
|
.IX Item "-mg"
|
| 11809 |
|
|
Output code for g\-format floating point numbers instead of d\-format.
|
| 11810 |
|
|
.PP
|
| 11811 |
|
|
\fIx86\-64 Options\fR
|
| 11812 |
|
|
.IX Subsection "x86-64 Options"
|
| 11813 |
|
|
.PP
|
| 11814 |
|
|
These are listed under
|
| 11815 |
|
|
.PP
|
| 11816 |
|
|
\fIXstormy16 Options\fR
|
| 11817 |
|
|
.IX Subsection "Xstormy16 Options"
|
| 11818 |
|
|
.PP
|
| 11819 |
|
|
These options are defined for Xstormy16:
|
| 11820 |
|
|
.IP "\fB\-msim\fR" 4
|
| 11821 |
|
|
.IX Item "-msim"
|
| 11822 |
|
|
Choose startup files and linker script suitable for the simulator.
|
| 11823 |
|
|
.PP
|
| 11824 |
|
|
\fIXtensa Options\fR
|
| 11825 |
|
|
.IX Subsection "Xtensa Options"
|
| 11826 |
|
|
.PP
|
| 11827 |
|
|
These options are supported for Xtensa targets:
|
| 11828 |
|
|
.IP "\fB\-mconst16\fR" 4
|
| 11829 |
|
|
.IX Item "-mconst16"
|
| 11830 |
|
|
.PD 0
|
| 11831 |
|
|
.IP "\fB\-mno\-const16\fR" 4
|
| 11832 |
|
|
.IX Item "-mno-const16"
|
| 11833 |
|
|
.PD
|
| 11834 |
|
|
Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
|
| 11835 |
|
|
constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
|
| 11836 |
|
|
standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
|
| 11837 |
|
|
instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
|
| 11838 |
|
|
instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
|
| 11839 |
|
|
the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
|
| 11840 |
|
|
.IP "\fB\-mfused\-madd\fR" 4
|
| 11841 |
|
|
.IX Item "-mfused-madd"
|
| 11842 |
|
|
.PD 0
|
| 11843 |
|
|
.IP "\fB\-mno\-fused\-madd\fR" 4
|
| 11844 |
|
|
.IX Item "-mno-fused-madd"
|
| 11845 |
|
|
.PD
|
| 11846 |
|
|
Enable or disable use of fused multiply/add and multiply/subtract
|
| 11847 |
|
|
instructions in the floating-point option. This has no effect if the
|
| 11848 |
|
|
floating-point option is not also enabled. Disabling fused multiply/add
|
| 11849 |
|
|
and multiply/subtract instructions forces the compiler to use separate
|
| 11850 |
|
|
instructions for the multiply and add/subtract operations. This may be
|
| 11851 |
|
|
desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
|
| 11852 |
|
|
required: the fused multiply add/subtract instructions do not round the
|
| 11853 |
|
|
intermediate result, thereby producing results with \fImore\fR bits of
|
| 11854 |
|
|
precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
|
| 11855 |
|
|
add/subtract instructions also ensures that the program output is not
|
| 11856 |
|
|
sensitive to the compiler's ability to combine multiply and add/subtract
|
| 11857 |
|
|
operations.
|
| 11858 |
|
|
.IP "\fB\-mtext\-section\-literals\fR" 4
|
| 11859 |
|
|
.IX Item "-mtext-section-literals"
|
| 11860 |
|
|
.PD 0
|
| 11861 |
|
|
.IP "\fB\-mno\-text\-section\-literals\fR" 4
|
| 11862 |
|
|
.IX Item "-mno-text-section-literals"
|
| 11863 |
|
|
.PD
|
| 11864 |
|
|
Control the treatment of literal pools. The default is
|
| 11865 |
|
|
\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
|
| 11866 |
|
|
section in the output file. This allows the literal pool to be placed
|
| 11867 |
|
|
in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
|
| 11868 |
|
|
pools from separate object files to remove redundant literals and
|
| 11869 |
|
|
improve code size. With \fB\-mtext\-section\-literals\fR, the literals
|
| 11870 |
|
|
are interspersed in the text section in order to keep them as close as
|
| 11871 |
|
|
possible to their references. This may be necessary for large assembly
|
| 11872 |
|
|
files.
|
| 11873 |
|
|
.IP "\fB\-mtarget\-align\fR" 4
|
| 11874 |
|
|
.IX Item "-mtarget-align"
|
| 11875 |
|
|
.PD 0
|
| 11876 |
|
|
.IP "\fB\-mno\-target\-align\fR" 4
|
| 11877 |
|
|
.IX Item "-mno-target-align"
|
| 11878 |
|
|
.PD
|
| 11879 |
|
|
When this option is enabled, \s-1GCC\s0 instructs the assembler to
|
| 11880 |
|
|
automatically align instructions to reduce branch penalties at the
|
| 11881 |
|
|
expense of some code density. The assembler attempts to widen density
|
| 11882 |
|
|
instructions to align branch targets and the instructions following call
|
| 11883 |
|
|
instructions. If there are not enough preceding safe density
|
| 11884 |
|
|
instructions to align a target, no widening will be performed. The
|
| 11885 |
|
|
default is \fB\-mtarget\-align\fR. These options do not affect the
|
| 11886 |
|
|
treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
|
| 11887 |
|
|
assembler will always align, either by widening density instructions or
|
| 11888 |
|
|
by inserting no-op instructions.
|
| 11889 |
|
|
.IP "\fB\-mlongcalls\fR" 4
|
| 11890 |
|
|
.IX Item "-mlongcalls"
|
| 11891 |
|
|
.PD 0
|
| 11892 |
|
|
.IP "\fB\-mno\-longcalls\fR" 4
|
| 11893 |
|
|
.IX Item "-mno-longcalls"
|
| 11894 |
|
|
.PD
|
| 11895 |
|
|
When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
|
| 11896 |
|
|
direct calls to indirect calls unless it can determine that the target
|
| 11897 |
|
|
of a direct call is in the range allowed by the call instruction. This
|
| 11898 |
|
|
translation typically occurs for calls to functions in other source
|
| 11899 |
|
|
files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
|
| 11900 |
|
|
instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
|
| 11901 |
|
|
The default is \fB\-mno\-longcalls\fR. This option should be used in
|
| 11902 |
|
|
programs where the call target can potentially be out of range. This
|
| 11903 |
|
|
option is implemented in the assembler, not the compiler, so the
|
| 11904 |
|
|
assembly code generated by \s-1GCC\s0 will still show direct call
|
| 11905 |
|
|
instructions\-\-\-look at the disassembled object code to see the actual
|
| 11906 |
|
|
instructions. Note that the assembler will use an indirect call for
|
| 11907 |
|
|
every cross-file call, not just those that really will be out of range.
|
| 11908 |
|
|
.PP
|
| 11909 |
|
|
\fIzSeries Options\fR
|
| 11910 |
|
|
.IX Subsection "zSeries Options"
|
| 11911 |
|
|
.PP
|
| 11912 |
|
|
These are listed under
|
| 11913 |
|
|
.Sh "Options for Code Generation Conventions"
|
| 11914 |
|
|
.IX Subsection "Options for Code Generation Conventions"
|
| 11915 |
|
|
These machine-independent options control the interface conventions
|
| 11916 |
|
|
used in code generation.
|
| 11917 |
|
|
.PP
|
| 11918 |
|
|
Most of them have both positive and negative forms; the negative form
|
| 11919 |
|
|
of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
|
| 11920 |
|
|
one of the forms is listed\-\-\-the one which is not the default. You
|
| 11921 |
|
|
can figure out the other form by either removing \fBno\-\fR or adding
|
| 11922 |
|
|
it.
|
| 11923 |
|
|
.IP "\fB\-fbounds\-check\fR" 4
|
| 11924 |
|
|
.IX Item "-fbounds-check"
|
| 11925 |
|
|
For front-ends that support it, generate additional code to check that
|
| 11926 |
|
|
indices used to access arrays are within the declared range. This is
|
| 11927 |
|
|
currently only supported by the Java and Fortran 77 front\-ends, where
|
| 11928 |
|
|
this option defaults to true and false respectively.
|
| 11929 |
|
|
.IP "\fB\-ftrapv\fR" 4
|
| 11930 |
|
|
.IX Item "-ftrapv"
|
| 11931 |
|
|
This option generates traps for signed overflow on addition, subtraction,
|
| 11932 |
|
|
multiplication operations.
|
| 11933 |
|
|
.IP "\fB\-fwrapv\fR" 4
|
| 11934 |
|
|
.IX Item "-fwrapv"
|
| 11935 |
|
|
This option instructs the compiler to assume that signed arithmetic
|
| 11936 |
|
|
overflow of addition, subtraction and multiplication wraps around
|
| 11937 |
|
|
using twos-complement representation. This flag enables some optimizations
|
| 11938 |
|
|
and disables others. This option is enabled by default for the Java
|
| 11939 |
|
|
front\-end, as required by the Java language specification.
|
| 11940 |
|
|
.IP "\fB\-fexceptions\fR" 4
|
| 11941 |
|
|
.IX Item "-fexceptions"
|
| 11942 |
|
|
Enable exception handling. Generates extra code needed to propagate
|
| 11943 |
|
|
exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
|
| 11944 |
|
|
unwind information for all functions, which can produce significant data
|
| 11945 |
|
|
size overhead, although it does not affect execution. If you do not
|
| 11946 |
|
|
specify this option, \s-1GCC\s0 will enable it by default for languages like
|
| 11947 |
|
|
\&\*(C+ which normally require exception handling, and disable it for
|
| 11948 |
|
|
languages like C that do not normally require it. However, you may need
|
| 11949 |
|
|
to enable this option when compiling C code that needs to interoperate
|
| 11950 |
|
|
properly with exception handlers written in \*(C+. You may also wish to
|
| 11951 |
|
|
disable this option if you are compiling older \*(C+ programs that don't
|
| 11952 |
|
|
use exception handling.
|
| 11953 |
|
|
.IP "\fB\-fnon\-call\-exceptions\fR" 4
|
| 11954 |
|
|
.IX Item "-fnon-call-exceptions"
|
| 11955 |
|
|
Generate code that allows trapping instructions to throw exceptions.
|
| 11956 |
|
|
Note that this requires platform-specific runtime support that does
|
| 11957 |
|
|
not exist everywhere. Moreover, it only allows \fItrapping\fR
|
| 11958 |
|
|
instructions to throw exceptions, i.e. memory references or floating
|
| 11959 |
|
|
point instructions. It does not allow exceptions to be thrown from
|
| 11960 |
|
|
arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
|
| 11961 |
|
|
.IP "\fB\-funwind\-tables\fR" 4
|
| 11962 |
|
|
.IX Item "-funwind-tables"
|
| 11963 |
|
|
Similar to \fB\-fexceptions\fR, except that it will just generate any needed
|
| 11964 |
|
|
static data, but will not affect the generated code in any other way.
|
| 11965 |
|
|
You will normally not enable this option; instead, a language processor
|
| 11966 |
|
|
that needs this handling would enable it on your behalf.
|
| 11967 |
|
|
.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
|
| 11968 |
|
|
.IX Item "-fasynchronous-unwind-tables"
|
| 11969 |
|
|
Generate unwind table in dwarf2 format, if supported by target machine. The
|
| 11970 |
|
|
table is exact at each instruction boundary, so it can be used for stack
|
| 11971 |
|
|
unwinding from asynchronous events (such as debugger or garbage collector).
|
| 11972 |
|
|
.IP "\fB\-fpcc\-struct\-return\fR" 4
|
| 11973 |
|
|
.IX Item "-fpcc-struct-return"
|
| 11974 |
|
|
Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
|
| 11975 |
|
|
longer ones, rather than in registers. This convention is less
|
| 11976 |
|
|
efficient, but it has the advantage of allowing intercallability between
|
| 11977 |
|
|
GCC-compiled files and files compiled with other compilers, particularly
|
| 11978 |
|
|
the Portable C Compiler (pcc).
|
| 11979 |
|
|
.Sp
|
| 11980 |
|
|
The precise convention for returning structures in memory depends
|
| 11981 |
|
|
on the target configuration macros.
|
| 11982 |
|
|
.Sp
|
| 11983 |
|
|
Short structures and unions are those whose size and alignment match
|
| 11984 |
|
|
that of some integer type.
|
| 11985 |
|
|
.Sp
|
| 11986 |
|
|
\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
|
| 11987 |
|
|
switch is not binary compatible with code compiled with the
|
| 11988 |
|
|
\&\fB\-freg\-struct\-return\fR switch.
|
| 11989 |
|
|
Use it to conform to a non-default application binary interface.
|
| 11990 |
|
|
.IP "\fB\-freg\-struct\-return\fR" 4
|
| 11991 |
|
|
.IX Item "-freg-struct-return"
|
| 11992 |
|
|
Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
|
| 11993 |
|
|
This is more efficient for small structures than
|
| 11994 |
|
|
\&\fB\-fpcc\-struct\-return\fR.
|
| 11995 |
|
|
.Sp
|
| 11996 |
|
|
If you specify neither \fB\-fpcc\-struct\-return\fR nor
|
| 11997 |
|
|
\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
|
| 11998 |
|
|
standard for the target. If there is no standard convention, \s-1GCC\s0
|
| 11999 |
|
|
defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
|
| 12000 |
|
|
the principal compiler. In those cases, we can choose the standard, and
|
| 12001 |
|
|
we chose the more efficient register return alternative.
|
| 12002 |
|
|
.Sp
|
| 12003 |
|
|
\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
|
| 12004 |
|
|
switch is not binary compatible with code compiled with the
|
| 12005 |
|
|
\&\fB\-fpcc\-struct\-return\fR switch.
|
| 12006 |
|
|
Use it to conform to a non-default application binary interface.
|
| 12007 |
|
|
.IP "\fB\-fshort\-enums\fR" 4
|
| 12008 |
|
|
.IX Item "-fshort-enums"
|
| 12009 |
|
|
Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
|
| 12010 |
|
|
declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
|
| 12011 |
|
|
will be equivalent to the smallest integer type which has enough room.
|
| 12012 |
|
|
.Sp
|
| 12013 |
|
|
\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
|
| 12014 |
|
|
code that is not binary compatible with code generated without that switch.
|
| 12015 |
|
|
Use it to conform to a non-default application binary interface.
|
| 12016 |
|
|
.IP "\fB\-fshort\-double\fR" 4
|
| 12017 |
|
|
.IX Item "-fshort-double"
|
| 12018 |
|
|
Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
|
| 12019 |
|
|
.Sp
|
| 12020 |
|
|
\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
|
| 12021 |
|
|
code that is not binary compatible with code generated without that switch.
|
| 12022 |
|
|
Use it to conform to a non-default application binary interface.
|
| 12023 |
|
|
.IP "\fB\-fshort\-wchar\fR" 4
|
| 12024 |
|
|
.IX Item "-fshort-wchar"
|
| 12025 |
|
|
Override the underlying type for \fBwchar_t\fR to be \fBshort
|
| 12026 |
|
|
unsigned int\fR instead of the default for the target. This option is
|
| 12027 |
|
|
useful for building programs to run under \s-1WINE\s0.
|
| 12028 |
|
|
.Sp
|
| 12029 |
|
|
\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
|
| 12030 |
|
|
code that is not binary compatible with code generated without that switch.
|
| 12031 |
|
|
Use it to conform to a non-default application binary interface.
|
| 12032 |
|
|
.IP "\fB\-fshared\-data\fR" 4
|
| 12033 |
|
|
.IX Item "-fshared-data"
|
| 12034 |
|
|
Requests that the data and non\-\f(CW\*(C`const\*(C'\fR variables of this
|
| 12035 |
|
|
compilation be shared data rather than private data. The distinction
|
| 12036 |
|
|
makes sense only on certain operating systems, where shared data is
|
| 12037 |
|
|
shared between processes running the same program, while private data
|
| 12038 |
|
|
exists in one copy per process.
|
| 12039 |
|
|
.IP "\fB\-fno\-common\fR" 4
|
| 12040 |
|
|
.IX Item "-fno-common"
|
| 12041 |
|
|
In C, allocate even uninitialized global variables in the data section of the
|
| 12042 |
|
|
object file, rather than generating them as common blocks. This has the
|
| 12043 |
|
|
effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in
|
| 12044 |
|
|
two different compilations, you will get an error when you link them.
|
| 12045 |
|
|
The only reason this might be useful is if you wish to verify that the
|
| 12046 |
|
|
program will work on other systems which always work this way.
|
| 12047 |
|
|
.IP "\fB\-fno\-ident\fR" 4
|
| 12048 |
|
|
.IX Item "-fno-ident"
|
| 12049 |
|
|
Ignore the \fB#ident\fR directive.
|
| 12050 |
|
|
.IP "\fB\-finhibit\-size\-directive\fR" 4
|
| 12051 |
|
|
.IX Item "-finhibit-size-directive"
|
| 12052 |
|
|
Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
|
| 12053 |
|
|
would cause trouble if the function is split in the middle, and the
|
| 12054 |
|
|
two halves are placed at locations far apart in memory. This option is
|
| 12055 |
|
|
used when compiling \fIcrtstuff.c\fR; you should not need to use it
|
| 12056 |
|
|
for anything else.
|
| 12057 |
|
|
.IP "\fB\-fverbose\-asm\fR" 4
|
| 12058 |
|
|
.IX Item "-fverbose-asm"
|
| 12059 |
|
|
Put extra commentary information in the generated assembly code to
|
| 12060 |
|
|
make it more readable. This option is generally only of use to those
|
| 12061 |
|
|
who actually need to read the generated assembly code (perhaps while
|
| 12062 |
|
|
debugging the compiler itself).
|
| 12063 |
|
|
.Sp
|
| 12064 |
|
|
\&\fB\-fno\-verbose\-asm\fR, the default, causes the
|
| 12065 |
|
|
extra information to be omitted and is useful when comparing two assembler
|
| 12066 |
|
|
files.
|
| 12067 |
|
|
.IP "\fB\-fpic\fR" 4
|
| 12068 |
|
|
.IX Item "-fpic"
|
| 12069 |
|
|
Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
|
| 12070 |
|
|
library, if supported for the target machine. Such code accesses all
|
| 12071 |
|
|
constant addresses through a global offset table (\s-1GOT\s0). The dynamic
|
| 12072 |
|
|
loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
|
| 12073 |
|
|
loader is not part of \s-1GCC\s0; it is part of the operating system). If
|
| 12074 |
|
|
the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
|
| 12075 |
|
|
maximum size, you get an error message from the linker indicating that
|
| 12076 |
|
|
\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
|
| 12077 |
|
|
instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
|
| 12078 |
|
|
on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
|
| 12079 |
|
|
.Sp
|
| 12080 |
|
|
Position-independent code requires special support, and therefore works
|
| 12081 |
|
|
only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
|
| 12082 |
|
|
but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
|
| 12083 |
|
|
position\-independent.
|
| 12084 |
|
|
.IP "\fB\-fPIC\fR" 4
|
| 12085 |
|
|
.IX Item "-fPIC"
|
| 12086 |
|
|
If supported for the target machine, emit position-independent code,
|
| 12087 |
|
|
suitable for dynamic linking and avoiding any limit on the size of the
|
| 12088 |
|
|
global offset table. This option makes a difference on the m68k,
|
| 12089 |
|
|
PowerPC and \s-1SPARC\s0.
|
| 12090 |
|
|
.Sp
|
| 12091 |
|
|
Position-independent code requires special support, and therefore works
|
| 12092 |
|
|
only on certain machines.
|
| 12093 |
|
|
.IP "\fB\-fpie\fR" 4
|
| 12094 |
|
|
.IX Item "-fpie"
|
| 12095 |
|
|
.PD 0
|
| 12096 |
|
|
.IP "\fB\-fPIE\fR" 4
|
| 12097 |
|
|
.IX Item "-fPIE"
|
| 12098 |
|
|
.PD
|
| 12099 |
|
|
These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
|
| 12100 |
|
|
generated position independent code can be only linked into executables.
|
| 12101 |
|
|
Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
|
| 12102 |
|
|
used during linking.
|
| 12103 |
|
|
.IP "\fB\-fno\-jump\-tables\fR" 4
|
| 12104 |
|
|
.IX Item "-fno-jump-tables"
|
| 12105 |
|
|
Do not use jump tables for switch statements even where it would be
|
| 12106 |
|
|
more efficient than other code generation strategies. This option is
|
| 12107 |
|
|
of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
|
| 12108 |
|
|
building code which forms part of a dynamic linker and cannot
|
| 12109 |
|
|
reference the address of a jump table. On some targets, jump tables
|
| 12110 |
|
|
do not require a \s-1GOT\s0 and this option is not needed.
|
| 12111 |
|
|
.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
|
| 12112 |
|
|
.IX Item "-ffixed-reg"
|
| 12113 |
|
|
Treat the register named \fIreg\fR as a fixed register; generated code
|
| 12114 |
|
|
should never refer to it (except perhaps as a stack pointer, frame
|
| 12115 |
|
|
pointer or in some other fixed role).
|
| 12116 |
|
|
.Sp
|
| 12117 |
|
|
\&\fIreg\fR must be the name of a register. The register names accepted
|
| 12118 |
|
|
are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
|
| 12119 |
|
|
macro in the machine description macro file.
|
| 12120 |
|
|
.Sp
|
| 12121 |
|
|
This flag does not have a negative form, because it specifies a
|
| 12122 |
|
|
three-way choice.
|
| 12123 |
|
|
.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
|
| 12124 |
|
|
.IX Item "-fcall-used-reg"
|
| 12125 |
|
|
Treat the register named \fIreg\fR as an allocable register that is
|
| 12126 |
|
|
clobbered by function calls. It may be allocated for temporaries or
|
| 12127 |
|
|
variables that do not live across a call. Functions compiled this way
|
| 12128 |
|
|
will not save and restore the register \fIreg\fR.
|
| 12129 |
|
|
.Sp
|
| 12130 |
|
|
It is an error to used this flag with the frame pointer or stack pointer.
|
| 12131 |
|
|
Use of this flag for other registers that have fixed pervasive roles in
|
| 12132 |
|
|
the machine's execution model will produce disastrous results.
|
| 12133 |
|
|
.Sp
|
| 12134 |
|
|
This flag does not have a negative form, because it specifies a
|
| 12135 |
|
|
three-way choice.
|
| 12136 |
|
|
.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
|
| 12137 |
|
|
.IX Item "-fcall-saved-reg"
|
| 12138 |
|
|
Treat the register named \fIreg\fR as an allocable register saved by
|
| 12139 |
|
|
functions. It may be allocated even for temporaries or variables that
|
| 12140 |
|
|
live across a call. Functions compiled this way will save and restore
|
| 12141 |
|
|
the register \fIreg\fR if they use it.
|
| 12142 |
|
|
.Sp
|
| 12143 |
|
|
It is an error to used this flag with the frame pointer or stack pointer.
|
| 12144 |
|
|
Use of this flag for other registers that have fixed pervasive roles in
|
| 12145 |
|
|
the machine's execution model will produce disastrous results.
|
| 12146 |
|
|
.Sp
|
| 12147 |
|
|
A different sort of disaster will result from the use of this flag for
|
| 12148 |
|
|
a register in which function values may be returned.
|
| 12149 |
|
|
.Sp
|
| 12150 |
|
|
This flag does not have a negative form, because it specifies a
|
| 12151 |
|
|
three-way choice.
|
| 12152 |
|
|
.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
|
| 12153 |
|
|
.IX Item "-fpack-struct[=n]"
|
| 12154 |
|
|
Without a value specified, pack all structure members together without
|
| 12155 |
|
|
holes. When a value is specified (which must be a small power of two), pack
|
| 12156 |
|
|
structure members according to this value, representing the maximum
|
| 12157 |
|
|
alignment (that is, objects with default alignment requirements larger than
|
| 12158 |
|
|
this will be output potentially unaligned at the next fitting location.
|
| 12159 |
|
|
.Sp
|
| 12160 |
|
|
\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
|
| 12161 |
|
|
code that is not binary compatible with code generated without that switch.
|
| 12162 |
|
|
Additionally, it makes the code suboptimal.
|
| 12163 |
|
|
Use it to conform to a non-default application binary interface.
|
| 12164 |
|
|
.IP "\fB\-finstrument\-functions\fR" 4
|
| 12165 |
|
|
.IX Item "-finstrument-functions"
|
| 12166 |
|
|
Generate instrumentation calls for entry and exit to functions. Just
|
| 12167 |
|
|
after function entry and just before function exit, the following
|
| 12168 |
|
|
profiling functions will be called with the address of the current
|
| 12169 |
|
|
function and its call site. (On some platforms,
|
| 12170 |
|
|
\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
|
| 12171 |
|
|
function, so the call site information may not be available to the
|
| 12172 |
|
|
profiling functions otherwise.)
|
| 12173 |
|
|
.Sp
|
| 12174 |
|
|
.Vb 4
|
| 12175 |
|
|
\& void __cyg_profile_func_enter (void *this_fn,
|
| 12176 |
|
|
\& void *call_site);
|
| 12177 |
|
|
\& void __cyg_profile_func_exit (void *this_fn,
|
| 12178 |
|
|
\& void *call_site);
|
| 12179 |
|
|
.Ve
|
| 12180 |
|
|
.Sp
|
| 12181 |
|
|
The first argument is the address of the start of the current function,
|
| 12182 |
|
|
which may be looked up exactly in the symbol table.
|
| 12183 |
|
|
.Sp
|
| 12184 |
|
|
This instrumentation is also done for functions expanded inline in other
|
| 12185 |
|
|
functions. The profiling calls will indicate where, conceptually, the
|
| 12186 |
|
|
inline function is entered and exited. This means that addressable
|
| 12187 |
|
|
versions of such functions must be available. If all your uses of a
|
| 12188 |
|
|
function are expanded inline, this may mean an additional expansion of
|
| 12189 |
|
|
code size. If you use \fBextern inline\fR in your C code, an
|
| 12190 |
|
|
addressable version of such functions must be provided. (This is
|
| 12191 |
|
|
normally the case anyways, but if you get lucky and the optimizer always
|
| 12192 |
|
|
expands the functions inline, you might have gotten away without
|
| 12193 |
|
|
providing static copies.)
|
| 12194 |
|
|
.Sp
|
| 12195 |
|
|
A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
|
| 12196 |
|
|
which case this instrumentation will not be done. This can be used, for
|
| 12197 |
|
|
example, for the profiling functions listed above, high-priority
|
| 12198 |
|
|
interrupt routines, and any functions from which the profiling functions
|
| 12199 |
|
|
cannot safely be called (perhaps signal handlers, if the profiling
|
| 12200 |
|
|
routines generate output or allocate memory).
|
| 12201 |
|
|
.IP "\fB\-fstack\-check\fR" 4
|
| 12202 |
|
|
.IX Item "-fstack-check"
|
| 12203 |
|
|
Generate code to verify that you do not go beyond the boundary of the
|
| 12204 |
|
|
stack. You should specify this flag if you are running in an
|
| 12205 |
|
|
environment with multiple threads, but only rarely need to specify it in
|
| 12206 |
|
|
a single-threaded environment since stack overflow is automatically
|
| 12207 |
|
|
detected on nearly all systems if there is only one stack.
|
| 12208 |
|
|
.Sp
|
| 12209 |
|
|
Note that this switch does not actually cause checking to be done; the
|
| 12210 |
|
|
operating system must do that. The switch causes generation of code
|
| 12211 |
|
|
to ensure that the operating system sees the stack being extended.
|
| 12212 |
|
|
.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
|
| 12213 |
|
|
.IX Item "-fstack-limit-register=reg"
|
| 12214 |
|
|
.PD 0
|
| 12215 |
|
|
.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
|
| 12216 |
|
|
.IX Item "-fstack-limit-symbol=sym"
|
| 12217 |
|
|
.IP "\fB\-fno\-stack\-limit\fR" 4
|
| 12218 |
|
|
.IX Item "-fno-stack-limit"
|
| 12219 |
|
|
.PD
|
| 12220 |
|
|
Generate code to ensure that the stack does not grow beyond a certain value,
|
| 12221 |
|
|
either the value of a register or the address of a symbol. If the stack
|
| 12222 |
|
|
would grow beyond the value, a signal is raised. For most targets,
|
| 12223 |
|
|
the signal is raised before the stack overruns the boundary, so
|
| 12224 |
|
|
it is possible to catch the signal without taking special precautions.
|
| 12225 |
|
|
.Sp
|
| 12226 |
|
|
For instance, if the stack starts at absolute address \fB0x80000000\fR
|
| 12227 |
|
|
and grows downwards, you can use the flags
|
| 12228 |
|
|
\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
|
| 12229 |
|
|
\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
|
| 12230 |
|
|
of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
|
| 12231 |
|
|
.IP "\fB\-fargument\-alias\fR" 4
|
| 12232 |
|
|
.IX Item "-fargument-alias"
|
| 12233 |
|
|
.PD 0
|
| 12234 |
|
|
.IP "\fB\-fargument\-noalias\fR" 4
|
| 12235 |
|
|
.IX Item "-fargument-noalias"
|
| 12236 |
|
|
.IP "\fB\-fargument\-noalias\-global\fR" 4
|
| 12237 |
|
|
.IX Item "-fargument-noalias-global"
|
| 12238 |
|
|
.PD
|
| 12239 |
|
|
Specify the possible relationships among parameters and between
|
| 12240 |
|
|
parameters and global data.
|
| 12241 |
|
|
.Sp
|
| 12242 |
|
|
\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
|
| 12243 |
|
|
alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
|
| 12244 |
|
|
each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
|
| 12245 |
|
|
alias each other and do not alias global storage.
|
| 12246 |
|
|
.Sp
|
| 12247 |
|
|
Each language will automatically use whatever option is required by
|
| 12248 |
|
|
the language standard. You should not need to use these options yourself.
|
| 12249 |
|
|
.IP "\fB\-fleading\-underscore\fR" 4
|
| 12250 |
|
|
.IX Item "-fleading-underscore"
|
| 12251 |
|
|
This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
|
| 12252 |
|
|
change the way C symbols are represented in the object file. One use
|
| 12253 |
|
|
is to help link with legacy assembly code.
|
| 12254 |
|
|
.Sp
|
| 12255 |
|
|
\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
|
| 12256 |
|
|
generate code that is not binary compatible with code generated without that
|
| 12257 |
|
|
switch. Use it to conform to a non-default application binary interface.
|
| 12258 |
|
|
Not all targets provide complete support for this switch.
|
| 12259 |
|
|
.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
|
| 12260 |
|
|
.IX Item "-ftls-model=model"
|
| 12261 |
|
|
Alter the thread-local storage model to be used.
|
| 12262 |
|
|
The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
|
| 12263 |
|
|
\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
|
| 12264 |
|
|
.Sp
|
| 12265 |
|
|
The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
|
| 12266 |
|
|
\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
|
| 12267 |
|
|
.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
|
| 12268 |
|
|
.IX Item "-fvisibility=default|internal|hidden|protected"
|
| 12269 |
|
|
Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
|
| 12270 |
|
|
symbols will be marked with this unless overridden within the code.
|
| 12271 |
|
|
Using this feature can very substantially improve linking and
|
| 12272 |
|
|
load times of shared object libraries, produce more optimized
|
| 12273 |
|
|
code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
|
| 12274 |
|
|
It is \fBstrongly\fR recommended that you use this in any shared objects
|
| 12275 |
|
|
you distribute.
|
| 12276 |
|
|
.Sp
|
| 12277 |
|
|
Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
|
| 12278 |
|
|
available to be linked against from outside the shared object.
|
| 12279 |
|
|
\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
|
| 12280 |
|
|
usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
|
| 12281 |
|
|
The default if \fB\-fvisibility\fR isn't specified is
|
| 12282 |
|
|
\&\f(CW\*(C`default\*(C'\fR, i.e., make every
|
| 12283 |
|
|
symbol public\-\-\-this causes the same behavior as previous versions of
|
| 12284 |
|
|
\&\s-1GCC\s0.
|
| 12285 |
|
|
.Sp
|
| 12286 |
|
|
A good explanation of the benefits offered by ensuring \s-1ELF\s0
|
| 12287 |
|
|
symbols have the correct visibility is given by \*(L"How To Write
|
| 12288 |
|
|
Shared Libraries\*(R" by Ulrich Drepper (which can be found at
|
| 12289 |
|
|
<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
|
| 12290 |
|
|
solution made possible by this option to marking things hidden when
|
| 12291 |
|
|
the default is public is to make the default hidden and mark things
|
| 12292 |
|
|
public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
|
| 12293 |
|
|
and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
|
| 12294 |
|
|
\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
|
| 12295 |
|
|
identical syntax. This is a great boon to those working with
|
| 12296 |
|
|
cross-platform projects.
|
| 12297 |
|
|
.Sp
|
| 12298 |
|
|
For those adding visibility support to existing code, you may find
|
| 12299 |
|
|
\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
|
| 12300 |
|
|
the declarations you wish to set visibility for with (for example)
|
| 12301 |
|
|
\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
|
| 12302 |
|
|
\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
|
| 12303 |
|
|
Bear in mind that symbol visibility should be viewed \fBas
|
| 12304 |
|
|
part of the \s-1API\s0 interface contract\fR and thus all new code should
|
| 12305 |
|
|
always specify visibility when it is not the default ie; declarations
|
| 12306 |
|
|
only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
|
| 12307 |
|
|
as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
|
| 12308 |
|
|
abundantly clear also aids readability and self-documentation of the code.
|
| 12309 |
|
|
Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
|
| 12310 |
|
|
operator delete must always be of default visibility.
|
| 12311 |
|
|
.Sp
|
| 12312 |
|
|
An overview of these techniques, their benefits and how to use them
|
| 12313 |
|
|
is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
|
| 12314 |
|
|
.SH "ENVIRONMENT"
|
| 12315 |
|
|
.IX Header "ENVIRONMENT"
|
| 12316 |
|
|
This section describes several environment variables that affect how \s-1GCC\s0
|
| 12317 |
|
|
operates. Some of them work by specifying directories or prefixes to use
|
| 12318 |
|
|
when searching for various kinds of files. Some are used to specify other
|
| 12319 |
|
|
aspects of the compilation environment.
|
| 12320 |
|
|
.PP
|
| 12321 |
|
|
Note that you can also specify places to search using options such as
|
| 12322 |
|
|
\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
|
| 12323 |
|
|
take precedence over places specified using environment variables, which
|
| 12324 |
|
|
in turn take precedence over those specified by the configuration of \s-1GCC\s0.
|
| 12325 |
|
|
.IP "\fB\s-1LANG\s0\fR" 4
|
| 12326 |
|
|
.IX Item "LANG"
|
| 12327 |
|
|
.PD 0
|
| 12328 |
|
|
.IP "\fB\s-1LC_CTYPE\s0\fR" 4
|
| 12329 |
|
|
.IX Item "LC_CTYPE"
|
| 12330 |
|
|
.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
|
| 12331 |
|
|
.IX Item "LC_MESSAGES"
|
| 12332 |
|
|
.IP "\fB\s-1LC_ALL\s0\fR" 4
|
| 12333 |
|
|
.IX Item "LC_ALL"
|
| 12334 |
|
|
.PD
|
| 12335 |
|
|
These environment variables control the way that \s-1GCC\s0 uses
|
| 12336 |
|
|
localization information that allow \s-1GCC\s0 to work with different
|
| 12337 |
|
|
national conventions. \s-1GCC\s0 inspects the locale categories
|
| 12338 |
|
|
\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
|
| 12339 |
|
|
so. These locale categories can be set to any value supported by your
|
| 12340 |
|
|
installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
|
| 12341 |
|
|
Kingdom encoded in \s-1UTF\-8\s0.
|
| 12342 |
|
|
.Sp
|
| 12343 |
|
|
The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
|
| 12344 |
|
|
classification. \s-1GCC\s0 uses it to determine the character boundaries in
|
| 12345 |
|
|
a string; this is needed for some multibyte encodings that contain quote
|
| 12346 |
|
|
and escape characters that would otherwise be interpreted as a string
|
| 12347 |
|
|
end or escape.
|
| 12348 |
|
|
.Sp
|
| 12349 |
|
|
The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
|
| 12350 |
|
|
use in diagnostic messages.
|
| 12351 |
|
|
.Sp
|
| 12352 |
|
|
If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
|
| 12353 |
|
|
of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
|
| 12354 |
|
|
and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
|
| 12355 |
|
|
environment variable. If none of these variables are set, \s-1GCC\s0
|
| 12356 |
|
|
defaults to traditional C English behavior.
|
| 12357 |
|
|
.IP "\fB\s-1TMPDIR\s0\fR" 4
|
| 12358 |
|
|
.IX Item "TMPDIR"
|
| 12359 |
|
|
If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
|
| 12360 |
|
|
files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
|
| 12361 |
|
|
compilation which is to be used as input to the next stage: for example,
|
| 12362 |
|
|
the output of the preprocessor, which is the input to the compiler
|
| 12363 |
|
|
proper.
|
| 12364 |
|
|
.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
|
| 12365 |
|
|
.IX Item "GCC_EXEC_PREFIX"
|
| 12366 |
|
|
If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
|
| 12367 |
|
|
names of the subprograms executed by the compiler. No slash is added
|
| 12368 |
|
|
when this prefix is combined with the name of a subprogram, but you can
|
| 12369 |
|
|
specify a prefix that ends with a slash if you wish.
|
| 12370 |
|
|
.Sp
|
| 12371 |
|
|
If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
|
| 12372 |
|
|
an appropriate prefix to use based on the pathname it was invoked with.
|
| 12373 |
|
|
.Sp
|
| 12374 |
|
|
If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
|
| 12375 |
|
|
tries looking in the usual places for the subprogram.
|
| 12376 |
|
|
.Sp
|
| 12377 |
|
|
The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
|
| 12378 |
|
|
\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the value
|
| 12379 |
|
|
of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
|
| 12380 |
|
|
.Sp
|
| 12381 |
|
|
Other prefixes specified with \fB\-B\fR take precedence over this prefix.
|
| 12382 |
|
|
.Sp
|
| 12383 |
|
|
This prefix is also used for finding files such as \fIcrt0.o\fR that are
|
| 12384 |
|
|
used for linking.
|
| 12385 |
|
|
.Sp
|
| 12386 |
|
|
In addition, the prefix is used in an unusual way in finding the
|
| 12387 |
|
|
directories to search for header files. For each of the standard
|
| 12388 |
|
|
directories whose name normally begins with \fB/usr/local/lib/gcc\fR
|
| 12389 |
|
|
(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
|
| 12390 |
|
|
replacing that beginning with the specified prefix to produce an
|
| 12391 |
|
|
alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
|
| 12392 |
|
|
\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
|
| 12393 |
|
|
These alternate directories are searched first; the standard directories
|
| 12394 |
|
|
come next.
|
| 12395 |
|
|
.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
|
| 12396 |
|
|
.IX Item "COMPILER_PATH"
|
| 12397 |
|
|
The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
|
| 12398 |
|
|
directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
|
| 12399 |
|
|
specified when searching for subprograms, if it can't find the
|
| 12400 |
|
|
subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
|
| 12401 |
|
|
.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
|
| 12402 |
|
|
.IX Item "LIBRARY_PATH"
|
| 12403 |
|
|
The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
|
| 12404 |
|
|
directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
|
| 12405 |
|
|
\&\s-1GCC\s0 tries the directories thus specified when searching for special
|
| 12406 |
|
|
linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
|
| 12407 |
|
|
using \s-1GCC\s0 also uses these directories when searching for ordinary
|
| 12408 |
|
|
libraries for the \fB\-l\fR option (but directories specified with
|
| 12409 |
|
|
\&\fB\-L\fR come first).
|
| 12410 |
|
|
.IP "\fB\s-1LANG\s0\fR" 4
|
| 12411 |
|
|
.IX Item "LANG"
|
| 12412 |
|
|
This variable is used to pass locale information to the compiler. One way in
|
| 12413 |
|
|
which this information is used is to determine the character set to be used
|
| 12414 |
|
|
when character literals, string literals and comments are parsed in C and \*(C+.
|
| 12415 |
|
|
When the compiler is configured to allow multibyte characters,
|
| 12416 |
|
|
the following values for \fB\s-1LANG\s0\fR are recognized:
|
| 12417 |
|
|
.RS 4
|
| 12418 |
|
|
.IP "\fBC\-JIS\fR" 4
|
| 12419 |
|
|
.IX Item "C-JIS"
|
| 12420 |
|
|
Recognize \s-1JIS\s0 characters.
|
| 12421 |
|
|
.IP "\fBC\-SJIS\fR" 4
|
| 12422 |
|
|
.IX Item "C-SJIS"
|
| 12423 |
|
|
Recognize \s-1SJIS\s0 characters.
|
| 12424 |
|
|
.IP "\fBC\-EUCJP\fR" 4
|
| 12425 |
|
|
.IX Item "C-EUCJP"
|
| 12426 |
|
|
Recognize \s-1EUCJP\s0 characters.
|
| 12427 |
|
|
.RE
|
| 12428 |
|
|
.RS 4
|
| 12429 |
|
|
.Sp
|
| 12430 |
|
|
If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
|
| 12431 |
|
|
compiler will use mblen and mbtowc as defined by the default locale to
|
| 12432 |
|
|
recognize and translate multibyte characters.
|
| 12433 |
|
|
.RE
|
| 12434 |
|
|
.PP
|
| 12435 |
|
|
Some additional environments variables affect the behavior of the
|
| 12436 |
|
|
preprocessor.
|
| 12437 |
|
|
.IP "\fB\s-1CPATH\s0\fR" 4
|
| 12438 |
|
|
.IX Item "CPATH"
|
| 12439 |
|
|
.PD 0
|
| 12440 |
|
|
.IP "\fBC_INCLUDE_PATH\fR" 4
|
| 12441 |
|
|
.IX Item "C_INCLUDE_PATH"
|
| 12442 |
|
|
.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
|
| 12443 |
|
|
.IX Item "CPLUS_INCLUDE_PATH"
|
| 12444 |
|
|
.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
|
| 12445 |
|
|
.IX Item "OBJC_INCLUDE_PATH"
|
| 12446 |
|
|
.PD
|
| 12447 |
|
|
Each variable's value is a list of directories separated by a special
|
| 12448 |
|
|
character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
|
| 12449 |
|
|
The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
|
| 12450 |
|
|
determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
|
| 12451 |
|
|
semicolon, and for almost all other targets it is a colon.
|
| 12452 |
|
|
.Sp
|
| 12453 |
|
|
\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
|
| 12454 |
|
|
specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
|
| 12455 |
|
|
options on the command line. This environment variable is used
|
| 12456 |
|
|
regardless of which language is being preprocessed.
|
| 12457 |
|
|
.Sp
|
| 12458 |
|
|
The remaining environment variables apply only when preprocessing the
|
| 12459 |
|
|
particular language indicated. Each specifies a list of directories
|
| 12460 |
|
|
to be searched as if specified with \fB\-isystem\fR, but after any
|
| 12461 |
|
|
paths given with \fB\-isystem\fR options on the command line.
|
| 12462 |
|
|
.Sp
|
| 12463 |
|
|
In all these variables, an empty element instructs the compiler to
|
| 12464 |
|
|
search its current working directory. Empty elements can appear at the
|
| 12465 |
|
|
beginning or end of a path. For instance, if the value of
|
| 12466 |
|
|
\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
|
| 12467 |
|
|
effect as \fB\-I.\ \-I/special/include\fR.
|
| 12468 |
|
|
.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
|
| 12469 |
|
|
.IX Item "DEPENDENCIES_OUTPUT"
|
| 12470 |
|
|
If this variable is set, its value specifies how to output
|
| 12471 |
|
|
dependencies for Make based on the non-system header files processed
|
| 12472 |
|
|
by the compiler. System header files are ignored in the dependency
|
| 12473 |
|
|
output.
|
| 12474 |
|
|
.Sp
|
| 12475 |
|
|
The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
|
| 12476 |
|
|
which case the Make rules are written to that file, guessing the target
|
| 12477 |
|
|
name from the source file name. Or the value can have the form
|
| 12478 |
|
|
\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
|
| 12479 |
|
|
file \fIfile\fR using \fItarget\fR as the target name.
|
| 12480 |
|
|
.Sp
|
| 12481 |
|
|
In other words, this environment variable is equivalent to combining
|
| 12482 |
|
|
the options \fB\-MM\fR and \fB\-MF\fR,
|
| 12483 |
|
|
with an optional \fB\-MT\fR switch too.
|
| 12484 |
|
|
.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
|
| 12485 |
|
|
.IX Item "SUNPRO_DEPENDENCIES"
|
| 12486 |
|
|
This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
|
| 12487 |
|
|
except that system header files are not ignored, so it implies
|
| 12488 |
|
|
\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
|
| 12489 |
|
|
main input file is omitted.
|
| 12490 |
|
|
.SH "BUGS"
|
| 12491 |
|
|
.IX Header "BUGS"
|
| 12492 |
|
|
For instructions on reporting bugs, see
|
| 12493 |
|
|
<\fBhttp://gcc.gnu.org/bugs.html\fR>.
|
| 12494 |
|
|
.SH "FOOTNOTES"
|
| 12495 |
|
|
.IX Header "FOOTNOTES"
|
| 12496 |
|
|
.IP "1." 4
|
| 12497 |
|
|
On some systems, \fBgcc \-shared\fR
|
| 12498 |
|
|
needs to build supplementary stub code for constructors to work. On
|
| 12499 |
|
|
multi-libbed systems, \fBgcc \-shared\fR must select the correct support
|
| 12500 |
|
|
libraries to link against. Failing to supply the correct flags may lead
|
| 12501 |
|
|
to subtle defects. Supplying them in cases where they are not necessary
|
| 12502 |
|
|
is innocuous.
|
| 12503 |
|
|
.SH "SEE ALSO"
|
| 12504 |
|
|
.IX Header "SEE ALSO"
|
| 12505 |
|
|
\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
|
| 12506 |
|
|
\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
|
| 12507 |
|
|
and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
|
| 12508 |
|
|
\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
|
| 12509 |
|
|
.SH "AUTHOR"
|
| 12510 |
|
|
.IX Header "AUTHOR"
|
| 12511 |
|
|
See the Info entry for \fBgcc\fR, or
|
| 12512 |
|
|
<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
|
| 12513 |
|
|
for contributors to \s-1GCC\s0.
|
| 12514 |
|
|
.SH "COPYRIGHT"
|
| 12515 |
|
|
.IX Header "COPYRIGHT"
|
| 12516 |
|
|
Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
|
| 12517 |
|
|
1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
|
| 12518 |
|
|
.PP
|
| 12519 |
|
|
Permission is granted to copy, distribute and/or modify this document
|
| 12520 |
|
|
under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
|
| 12521 |
|
|
any later version published by the Free Software Foundation; with the
|
| 12522 |
|
|
Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
|
| 12523 |
|
|
Free Software\*(R", the Front-Cover texts being (a) (see below), and with
|
| 12524 |
|
|
the Back-Cover Texts being (b) (see below). A copy of the license is
|
| 12525 |
|
|
included in the \fIgfdl\fR\|(7) man page.
|
| 12526 |
|
|
.PP
|
| 12527 |
|
|
(a) The \s-1FSF\s0's Front-Cover Text is:
|
| 12528 |
|
|
.PP
|
| 12529 |
|
|
.Vb 1
|
| 12530 |
|
|
\& A GNU Manual
|
| 12531 |
|
|
.Ve
|
| 12532 |
|
|
.PP
|
| 12533 |
|
|
(b) The \s-1FSF\s0's Back-Cover Text is:
|
| 12534 |
|
|
.PP
|
| 12535 |
|
|
.Vb 3
|
| 12536 |
|
|
\& You have freedom to copy and modify this GNU Manual, like GNU
|
| 12537 |
|
|
\& software. Copies published by the Free Software Foundation raise
|
| 12538 |
|
|
\& funds for GNU development.
|
| 12539 |
|
|
.Ve
|
