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jlechner |
@c Copyright (C) 1988, 1989, 1992, 1994, 1997, 1998, 1999, 2000, 2001, 2002,
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@c 2003, 2004, 2005
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@c Free Software Foundation, Inc.
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@c This is part of the GCC manual.
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@c For copying conditions, see the file gcc.texi.
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@node RTL
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@chapter RTL Representation
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@cindex RTL representation
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@cindex representation of RTL
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@cindex Register Transfer Language (RTL)
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Most of the work of the compiler is done on an intermediate representation
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called register transfer language. In this language, the instructions to be
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output are described, pretty much one by one, in an algebraic form that
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describes what the instruction does.
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RTL is inspired by Lisp lists. It has both an internal form, made up of
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structures that point at other structures, and a textual form that is used
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in the machine description and in printed debugging dumps. The textual
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form uses nested parentheses to indicate the pointers in the internal form.
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@menu
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* RTL Objects:: Expressions vs vectors vs strings vs integers.
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* RTL Classes:: Categories of RTL expression objects, and their structure.
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* Accessors:: Macros to access expression operands or vector elts.
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* Special Accessors:: Macros to access specific annotations on RTL.
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* Flags:: Other flags in an RTL expression.
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* Machine Modes:: Describing the size and format of a datum.
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* Constants:: Expressions with constant values.
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* Regs and Memory:: Expressions representing register contents or memory.
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* Arithmetic:: Expressions representing arithmetic on other expressions.
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* Comparisons:: Expressions representing comparison of expressions.
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* Bit-Fields:: Expressions representing bit-fields in memory or reg.
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* Vector Operations:: Expressions involving vector datatypes.
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* Conversions:: Extending, truncating, floating or fixing.
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* RTL Declarations:: Declaring volatility, constancy, etc.
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* Side Effects:: Expressions for storing in registers, etc.
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* Incdec:: Embedded side-effects for autoincrement addressing.
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* Assembler:: Representing @code{asm} with operands.
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* Insns:: Expression types for entire insns.
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* Calls:: RTL representation of function call insns.
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* Sharing:: Some expressions are unique; others *must* be copied.
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* Reading RTL:: Reading textual RTL from a file.
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@end menu
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@node RTL Objects
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@section RTL Object Types
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@cindex RTL object types
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@cindex RTL integers
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@cindex RTL strings
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@cindex RTL vectors
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@cindex RTL expression
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@cindex RTX (See RTL)
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RTL uses five kinds of objects: expressions, integers, wide integers,
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strings and vectors. Expressions are the most important ones. An RTL
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expression (``RTX'', for short) is a C structure, but it is usually
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referred to with a pointer; a type that is given the typedef name
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@code{rtx}.
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An integer is simply an @code{int}; their written form uses decimal
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digits. A wide integer is an integral object whose type is
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@code{HOST_WIDE_INT}; their written form uses decimal digits.
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A string is a sequence of characters. In core it is represented as a
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@code{char *} in usual C fashion, and it is written in C syntax as well.
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However, strings in RTL may never be null. If you write an empty string in
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a machine description, it is represented in core as a null pointer rather
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than as a pointer to a null character. In certain contexts, these null
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pointers instead of strings are valid. Within RTL code, strings are most
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commonly found inside @code{symbol_ref} expressions, but they appear in
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other contexts in the RTL expressions that make up machine descriptions.
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In a machine description, strings are normally written with double
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quotes, as you would in C@. However, strings in machine descriptions may
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extend over many lines, which is invalid C, and adjacent string
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constants are not concatenated as they are in C@. Any string constant
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may be surrounded with a single set of parentheses. Sometimes this
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makes the machine description easier to read.
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There is also a special syntax for strings, which can be useful when C
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code is embedded in a machine description. Wherever a string can
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appear, it is also valid to write a C-style brace block. The entire
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brace block, including the outermost pair of braces, is considered to be
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the string constant. Double quote characters inside the braces are not
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special. Therefore, if you write string constants in the C code, you
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need not escape each quote character with a backslash.
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A vector contains an arbitrary number of pointers to expressions. The
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number of elements in the vector is explicitly present in the vector.
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The written form of a vector consists of square brackets
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(@samp{[@dots{}]}) surrounding the elements, in sequence and with
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whitespace separating them. Vectors of length zero are not created;
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null pointers are used instead.
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@cindex expression codes
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@cindex codes, RTL expression
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@findex GET_CODE
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@findex PUT_CODE
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Expressions are classified by @dfn{expression codes} (also called RTX
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codes). The expression code is a name defined in @file{rtl.def}, which is
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also (in uppercase) a C enumeration constant. The possible expression
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codes and their meanings are machine-independent. The code of an RTX can
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be extracted with the macro @code{GET_CODE (@var{x})} and altered with
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@code{PUT_CODE (@var{x}, @var{newcode})}.
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The expression code determines how many operands the expression contains,
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and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
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by looking at an operand what kind of object it is. Instead, you must know
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from its context---from the expression code of the containing expression.
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For example, in an expression of code @code{subreg}, the first operand is
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to be regarded as an expression and the second operand as an integer. In
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an expression of code @code{plus}, there are two operands, both of which
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are to be regarded as expressions. In a @code{symbol_ref} expression,
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there is one operand, which is to be regarded as a string.
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Expressions are written as parentheses containing the name of the
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expression type, its flags and machine mode if any, and then the operands
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of the expression (separated by spaces).
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Expression code names in the @samp{md} file are written in lowercase,
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but when they appear in C code they are written in uppercase. In this
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manual, they are shown as follows: @code{const_int}.
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@cindex (nil)
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@cindex nil
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In a few contexts a null pointer is valid where an expression is normally
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wanted. The written form of this is @code{(nil)}.
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@node RTL Classes
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@section RTL Classes and Formats
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@cindex RTL classes
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@cindex classes of RTX codes
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@cindex RTX codes, classes of
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@findex GET_RTX_CLASS
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The various expression codes are divided into several @dfn{classes},
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which are represented by single characters. You can determine the class
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of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
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Currently, @file{rtl.def} defines these classes:
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@table @code
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@item RTX_OBJ
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An RTX code that represents an actual object, such as a register
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(@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
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@code{LO_SUM}) is also included; instead, @code{SUBREG} and
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@code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
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@item RTX_CONST_OBJ
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An RTX code that represents a constant object. @code{HIGH} is also
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included in this class.
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@item RTX_COMPARE
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An RTX code for a non-symmetric comparison, such as @code{GEU} or
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@code{LT}.
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@item RTX_COMM_COMPARE
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An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
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or @code{ORDERED}.
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@item RTX_UNARY
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An RTX code for a unary arithmetic operation, such as @code{NEG},
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@code{NOT}, or @code{ABS}. This category also includes value extension
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(sign or zero) and conversions between integer and floating point.
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@item RTX_COMM_ARITH
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An RTX code for a commutative binary operation, such as @code{PLUS} or
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@code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
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@code{<}.
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@item RTX_BIN_ARITH
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An RTX code for a non-commutative binary operation, such as @code{MINUS},
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@code{DIV}, or @code{ASHIFTRT}.
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@item RTX_BITFIELD_OPS
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An RTX code for a bit-field operation. Currently only
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@code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
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and are lvalues (so they can be used for insertion as well).
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@xref{Bit-Fields}.
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@item RTX_TERNARY
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An RTX code for other three input operations. Currently only
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@code{IF_THEN_ELSE} and @code{VEC_MERGE}.
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@item RTX_INSN
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An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
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@code{CALL_INSN}. @xref{Insns}.
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@item RTX_MATCH
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An RTX code for something that matches in insns, such as
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@code{MATCH_DUP}. These only occur in machine descriptions.
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@item RTX_AUTOINC
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An RTX code for an auto-increment addressing mode, such as
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@code{POST_INC}.
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@item RTX_EXTRA
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All other RTX codes. This category includes the remaining codes used
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only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
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all the codes describing side effects (@code{SET}, @code{USE},
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@code{CLOBBER}, etc.) and the non-insns that may appear on an insn
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chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
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@code{SUBREG} is also part of this class.
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@end table
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@cindex RTL format
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For each expression code, @file{rtl.def} specifies the number of
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contained objects and their kinds using a sequence of characters
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called the @dfn{format} of the expression code. For example,
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the format of @code{subreg} is @samp{ei}.
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@cindex RTL format characters
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These are the most commonly used format characters:
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@table @code
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@item e
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An expression (actually a pointer to an expression).
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@item i
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An integer.
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@item w
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A wide integer.
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@item s
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A string.
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@item E
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A vector of expressions.
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@end table
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A few other format characters are used occasionally:
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@table @code
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@item u
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@samp{u} is equivalent to @samp{e} except that it is printed differently
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in debugging dumps. It is used for pointers to insns.
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@item n
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@samp{n} is equivalent to @samp{i} except that it is printed differently
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in debugging dumps. It is used for the line number or code number of a
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@code{note} insn.
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@item S
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@samp{S} indicates a string which is optional. In the RTL objects in
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core, @samp{S} is equivalent to @samp{s}, but when the object is read,
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from an @samp{md} file, the string value of this operand may be omitted.
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An omitted string is taken to be the null string.
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@item V
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@samp{V} indicates a vector which is optional. In the RTL objects in
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core, @samp{V} is equivalent to @samp{E}, but when the object is read
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from an @samp{md} file, the vector value of this operand may be omitted.
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An omitted vector is effectively the same as a vector of no elements.
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@item B
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@samp{B} indicates a pointer to basic block structure.
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@item 0
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@samp{0} means a slot whose contents do not fit any normal category.
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@samp{0} slots are not printed at all in dumps, and are often used in
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special ways by small parts of the compiler.
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@end table
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There are macros to get the number of operands and the format
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of an expression code:
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@table @code
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@findex GET_RTX_LENGTH
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@item GET_RTX_LENGTH (@var{code})
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Number of operands of an RTX of code @var{code}.
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@findex GET_RTX_FORMAT
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@item GET_RTX_FORMAT (@var{code})
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The format of an RTX of code @var{code}, as a C string.
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@end table
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Some classes of RTX codes always have the same format. For example, it
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is safe to assume that all comparison operations have format @code{ee}.
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@table @code
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@item 1
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All codes of this class have format @code{e}.
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@item <
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@itemx c
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@itemx 2
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All codes of these classes have format @code{ee}.
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@item b
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@itemx 3
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All codes of these classes have format @code{eee}.
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@item i
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All codes of this class have formats that begin with @code{iuueiee}.
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@xref{Insns}. Note that not all RTL objects linked onto an insn chain
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are of class @code{i}.
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@item o
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@itemx m
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@itemx x
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You can make no assumptions about the format of these codes.
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@end table
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@node Accessors
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@section Access to Operands
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@cindex accessors
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@cindex access to operands
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@cindex operand access
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@findex XEXP
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@findex XINT
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@findex XWINT
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@findex XSTR
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Operands of expressions are accessed using the macros @code{XEXP},
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@code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
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two arguments: an expression-pointer (RTX) and an operand number
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(counting from zero). Thus,
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@smallexample
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XEXP (@var{x}, 2)
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@end smallexample
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@noindent
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accesses operand 2 of expression @var{x}, as an expression.
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@smallexample
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XINT (@var{x}, 2)
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@end smallexample
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@noindent
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accesses the same operand as an integer. @code{XSTR}, used in the same
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fashion, would access it as a string.
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Any operand can be accessed as an integer, as an expression or as a string.
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You must choose the correct method of access for the kind of value actually
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stored in the operand. You would do this based on the expression code of
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|
|
the containing expression. That is also how you would know how many
|
340 |
|
|
operands there are.
|
341 |
|
|
|
342 |
|
|
For example, if @var{x} is a @code{subreg} expression, you know that it has
|
343 |
|
|
two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
|
344 |
|
|
and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
|
345 |
|
|
would get the address of the expression operand but cast as an integer;
|
346 |
|
|
that might occasionally be useful, but it would be cleaner to write
|
347 |
|
|
@code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
|
348 |
|
|
compile without error, and would return the second, integer operand cast as
|
349 |
|
|
an expression pointer, which would probably result in a crash when
|
350 |
|
|
accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
|
351 |
|
|
but this will access memory past the end of the expression with
|
352 |
|
|
unpredictable results.
|
353 |
|
|
|
354 |
|
|
Access to operands which are vectors is more complicated. You can use the
|
355 |
|
|
macro @code{XVEC} to get the vector-pointer itself, or the macros
|
356 |
|
|
@code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
|
357 |
|
|
vector.
|
358 |
|
|
|
359 |
|
|
@table @code
|
360 |
|
|
@findex XVEC
|
361 |
|
|
@item XVEC (@var{exp}, @var{idx})
|
362 |
|
|
Access the vector-pointer which is operand number @var{idx} in @var{exp}.
|
363 |
|
|
|
364 |
|
|
@findex XVECLEN
|
365 |
|
|
@item XVECLEN (@var{exp}, @var{idx})
|
366 |
|
|
Access the length (number of elements) in the vector which is
|
367 |
|
|
in operand number @var{idx} in @var{exp}. This value is an @code{int}.
|
368 |
|
|
|
369 |
|
|
@findex XVECEXP
|
370 |
|
|
@item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
|
371 |
|
|
Access element number @var{eltnum} in the vector which is
|
372 |
|
|
in operand number @var{idx} in @var{exp}. This value is an RTX@.
|
373 |
|
|
|
374 |
|
|
It is up to you to make sure that @var{eltnum} is not negative
|
375 |
|
|
and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
|
376 |
|
|
@end table
|
377 |
|
|
|
378 |
|
|
All the macros defined in this section expand into lvalues and therefore
|
379 |
|
|
can be used to assign the operands, lengths and vector elements as well as
|
380 |
|
|
to access them.
|
381 |
|
|
|
382 |
|
|
@node Special Accessors
|
383 |
|
|
@section Access to Special Operands
|
384 |
|
|
@cindex access to special operands
|
385 |
|
|
|
386 |
|
|
Some RTL nodes have special annotations associated with them.
|
387 |
|
|
|
388 |
|
|
@table @code
|
389 |
|
|
@item MEM
|
390 |
|
|
@table @code
|
391 |
|
|
@findex MEM_ALIAS_SET
|
392 |
|
|
@item MEM_ALIAS_SET (@var{x})
|
393 |
|
|
If 0, @var{x} is not in any alias set, and may alias anything. Otherwise,
|
394 |
|
|
@var{x} can only alias @code{MEM}s in a conflicting alias set. This value
|
395 |
|
|
is set in a language-dependent manner in the front-end, and should not be
|
396 |
|
|
altered in the back-end. In some front-ends, these numbers may correspond
|
397 |
|
|
in some way to types, or other language-level entities, but they need not,
|
398 |
|
|
and the back-end makes no such assumptions.
|
399 |
|
|
These set numbers are tested with @code{alias_sets_conflict_p}.
|
400 |
|
|
|
401 |
|
|
@findex MEM_EXPR
|
402 |
|
|
@item MEM_EXPR (@var{x})
|
403 |
|
|
If this register is known to hold the value of some user-level
|
404 |
|
|
declaration, this is that tree node. It may also be a
|
405 |
|
|
@code{COMPONENT_REF}, in which case this is some field reference,
|
406 |
|
|
and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
|
407 |
|
|
or another @code{COMPONENT_REF}, or null if there is no compile-time
|
408 |
|
|
object associated with the reference.
|
409 |
|
|
|
410 |
|
|
@findex MEM_OFFSET
|
411 |
|
|
@item MEM_OFFSET (@var{x})
|
412 |
|
|
The offset from the start of @code{MEM_EXPR} as a @code{CONST_INT} rtx.
|
413 |
|
|
|
414 |
|
|
@findex MEM_SIZE
|
415 |
|
|
@item MEM_SIZE (@var{x})
|
416 |
|
|
The size in bytes of the memory reference as a @code{CONST_INT} rtx.
|
417 |
|
|
This is mostly relevant for @code{BLKmode} references as otherwise
|
418 |
|
|
the size is implied by the mode.
|
419 |
|
|
|
420 |
|
|
@findex MEM_ALIGN
|
421 |
|
|
@item MEM_ALIGN (@var{x})
|
422 |
|
|
The known alignment in bits of the memory reference.
|
423 |
|
|
@end table
|
424 |
|
|
|
425 |
|
|
@item REG
|
426 |
|
|
@table @code
|
427 |
|
|
@findex ORIGINAL_REGNO
|
428 |
|
|
@item ORIGINAL_REGNO (@var{x})
|
429 |
|
|
This field holds the number the register ``originally'' had; for a
|
430 |
|
|
pseudo register turned into a hard reg this will hold the old pseudo
|
431 |
|
|
register number.
|
432 |
|
|
|
433 |
|
|
@findex REG_EXPR
|
434 |
|
|
@item REG_EXPR (@var{x})
|
435 |
|
|
If this register is known to hold the value of some user-level
|
436 |
|
|
declaration, this is that tree node.
|
437 |
|
|
|
438 |
|
|
@findex REG_OFFSET
|
439 |
|
|
@item REG_OFFSET (@var{x})
|
440 |
|
|
If this register is known to hold the value of some user-level
|
441 |
|
|
declaration, this is the offset into that logical storage.
|
442 |
|
|
@end table
|
443 |
|
|
|
444 |
|
|
@item SYMBOL_REF
|
445 |
|
|
@table @code
|
446 |
|
|
@findex SYMBOL_REF_DECL
|
447 |
|
|
@item SYMBOL_REF_DECL (@var{x})
|
448 |
|
|
If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
|
449 |
|
|
a @code{FUNCTION_DECL}, that tree is recorded here. If this value is
|
450 |
|
|
null, then @var{x} was created by back end code generation routines,
|
451 |
|
|
and there is no associated front end symbol table entry.
|
452 |
|
|
|
453 |
|
|
@code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
|
454 |
|
|
that is, some sort of constant. In this case, the @code{symbol_ref}
|
455 |
|
|
is an entry in the per-file constant pool; again, there is no associated
|
456 |
|
|
front end symbol table entry.
|
457 |
|
|
|
458 |
|
|
@findex SYMBOL_REF_FLAGS
|
459 |
|
|
@item SYMBOL_REF_FLAGS (@var{x})
|
460 |
|
|
In a @code{symbol_ref}, this is used to communicate various predicates
|
461 |
|
|
about the symbol. Some of these are common enough to be computed by
|
462 |
|
|
common code, some are specific to the target. The common bits are:
|
463 |
|
|
|
464 |
|
|
@table @code
|
465 |
|
|
@findex SYMBOL_REF_FUNCTION_P
|
466 |
|
|
@findex SYMBOL_FLAG_FUNCTION
|
467 |
|
|
@item SYMBOL_FLAG_FUNCTION
|
468 |
|
|
Set if the symbol refers to a function.
|
469 |
|
|
|
470 |
|
|
@findex SYMBOL_REF_LOCAL_P
|
471 |
|
|
@findex SYMBOL_FLAG_LOCAL
|
472 |
|
|
@item SYMBOL_FLAG_LOCAL
|
473 |
|
|
Set if the symbol is local to this ``module''.
|
474 |
|
|
See @code{TARGET_BINDS_LOCAL_P}.
|
475 |
|
|
|
476 |
|
|
@findex SYMBOL_REF_EXTERNAL_P
|
477 |
|
|
@findex SYMBOL_FLAG_EXTERNAL
|
478 |
|
|
@item SYMBOL_FLAG_EXTERNAL
|
479 |
|
|
Set if this symbol is not defined in this translation unit.
|
480 |
|
|
Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
|
481 |
|
|
|
482 |
|
|
@findex SYMBOL_REF_SMALL_P
|
483 |
|
|
@findex SYMBOL_FLAG_SMALL
|
484 |
|
|
@item SYMBOL_FLAG_SMALL
|
485 |
|
|
Set if the symbol is located in the small data section.
|
486 |
|
|
See @code{TARGET_IN_SMALL_DATA_P}.
|
487 |
|
|
|
488 |
|
|
@findex SYMBOL_FLAG_TLS_SHIFT
|
489 |
|
|
@findex SYMBOL_REF_TLS_MODEL
|
490 |
|
|
@item SYMBOL_REF_TLS_MODEL (@var{x})
|
491 |
|
|
This is a multi-bit field accessor that returns the @code{tls_model}
|
492 |
|
|
to be used for a thread-local storage symbol. It returns zero for
|
493 |
|
|
non-thread-local symbols.
|
494 |
|
|
@end table
|
495 |
|
|
|
496 |
|
|
Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
|
497 |
|
|
the target's use.
|
498 |
|
|
@end table
|
499 |
|
|
@end table
|
500 |
|
|
|
501 |
|
|
@node Flags
|
502 |
|
|
@section Flags in an RTL Expression
|
503 |
|
|
@cindex flags in RTL expression
|
504 |
|
|
|
505 |
|
|
RTL expressions contain several flags (one-bit bit-fields)
|
506 |
|
|
that are used in certain types of expression. Most often they
|
507 |
|
|
are accessed with the following macros, which expand into lvalues.
|
508 |
|
|
|
509 |
|
|
@table @code
|
510 |
|
|
@findex CONSTANT_POOL_ADDRESS_P
|
511 |
|
|
@cindex @code{symbol_ref} and @samp{/u}
|
512 |
|
|
@cindex @code{unchanging}, in @code{symbol_ref}
|
513 |
|
|
@item CONSTANT_POOL_ADDRESS_P (@var{x})
|
514 |
|
|
Nonzero in a @code{symbol_ref} if it refers to part of the current
|
515 |
|
|
function's constant pool. For most targets these addresses are in a
|
516 |
|
|
@code{.rodata} section entirely separate from the function, but for
|
517 |
|
|
some targets the addresses are close to the beginning of the function.
|
518 |
|
|
In either case GCC assumes these addresses can be addressed directly,
|
519 |
|
|
perhaps with the help of base registers.
|
520 |
|
|
Stored in the @code{unchanging} field and printed as @samp{/u}.
|
521 |
|
|
|
522 |
|
|
@findex CONST_OR_PURE_CALL_P
|
523 |
|
|
@cindex @code{call_insn} and @samp{/u}
|
524 |
|
|
@cindex @code{unchanging}, in @code{call_insn}
|
525 |
|
|
@item CONST_OR_PURE_CALL_P (@var{x})
|
526 |
|
|
In a @code{call_insn}, @code{note}, or an @code{expr_list} for notes,
|
527 |
|
|
indicates that the insn represents a call to a const or pure function.
|
528 |
|
|
Stored in the @code{unchanging} field and printed as @samp{/u}.
|
529 |
|
|
|
530 |
|
|
@findex INSN_ANNULLED_BRANCH_P
|
531 |
|
|
@cindex @code{jump_insn} and @samp{/u}
|
532 |
|
|
@cindex @code{call_insn} and @samp{/u}
|
533 |
|
|
@cindex @code{insn} and @samp{/u}
|
534 |
|
|
@cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
|
535 |
|
|
@item INSN_ANNULLED_BRANCH_P (@var{x})
|
536 |
|
|
In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
|
537 |
|
|
that the branch is an annulling one. See the discussion under
|
538 |
|
|
@code{sequence} below. Stored in the @code{unchanging} field and
|
539 |
|
|
printed as @samp{/u}.
|
540 |
|
|
|
541 |
|
|
@findex INSN_DELETED_P
|
542 |
|
|
@cindex @code{insn} and @samp{/v}
|
543 |
|
|
@cindex @code{call_insn} and @samp{/v}
|
544 |
|
|
@cindex @code{jump_insn} and @samp{/v}
|
545 |
|
|
@cindex @code{code_label} and @samp{/v}
|
546 |
|
|
@cindex @code{barrier} and @samp{/v}
|
547 |
|
|
@cindex @code{note} and @samp{/v}
|
548 |
|
|
@cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @code{barrier}, and @code{note}
|
549 |
|
|
@item INSN_DELETED_P (@var{x})
|
550 |
|
|
In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
|
551 |
|
|
@code{barrier}, or @code{note},
|
552 |
|
|
nonzero if the insn has been deleted. Stored in the
|
553 |
|
|
@code{volatil} field and printed as @samp{/v}.
|
554 |
|
|
|
555 |
|
|
@findex INSN_FROM_TARGET_P
|
556 |
|
|
@cindex @code{insn} and @samp{/s}
|
557 |
|
|
@cindex @code{jump_insn} and @samp{/s}
|
558 |
|
|
@cindex @code{call_insn} and @samp{/s}
|
559 |
|
|
@cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
|
560 |
|
|
@item INSN_FROM_TARGET_P (@var{x})
|
561 |
|
|
In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
|
562 |
|
|
slot of a branch, indicates that the insn
|
563 |
|
|
is from the target of the branch. If the branch insn has
|
564 |
|
|
@code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
|
565 |
|
|
the branch is taken. For annulled branches with
|
566 |
|
|
@code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
|
567 |
|
|
branch is not taken. When @code{INSN_ANNULLED_BRANCH_P} is not set,
|
568 |
|
|
this insn will always be executed. Stored in the @code{in_struct}
|
569 |
|
|
field and printed as @samp{/s}.
|
570 |
|
|
|
571 |
|
|
@findex LABEL_OUTSIDE_LOOP_P
|
572 |
|
|
@cindex @code{label_ref} and @samp{/s}
|
573 |
|
|
@cindex @code{in_struct}, in @code{label_ref}
|
574 |
|
|
@item LABEL_OUTSIDE_LOOP_P (@var{x})
|
575 |
|
|
In @code{label_ref} expressions, nonzero if this is a reference to a
|
576 |
|
|
label that is outside the innermost loop containing the reference to the
|
577 |
|
|
label. Stored in the @code{in_struct} field and printed as @samp{/s}.
|
578 |
|
|
|
579 |
|
|
@findex LABEL_PRESERVE_P
|
580 |
|
|
@cindex @code{code_label} and @samp{/i}
|
581 |
|
|
@cindex @code{note} and @samp{/i}
|
582 |
|
|
@cindex @code{in_struct}, in @code{code_label} and @code{note}
|
583 |
|
|
@item LABEL_PRESERVE_P (@var{x})
|
584 |
|
|
In a @code{code_label} or @code{note}, indicates that the label is referenced by
|
585 |
|
|
code or data not visible to the RTL of a given function.
|
586 |
|
|
Labels referenced by a non-local goto will have this bit set. Stored
|
587 |
|
|
in the @code{in_struct} field and printed as @samp{/s}.
|
588 |
|
|
|
589 |
|
|
@findex LABEL_REF_NONLOCAL_P
|
590 |
|
|
@cindex @code{label_ref} and @samp{/v}
|
591 |
|
|
@cindex @code{reg_label} and @samp{/v}
|
592 |
|
|
@cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
|
593 |
|
|
@item LABEL_REF_NONLOCAL_P (@var{x})
|
594 |
|
|
In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
|
595 |
|
|
a reference to a non-local label.
|
596 |
|
|
Stored in the @code{volatil} field and printed as @samp{/v}.
|
597 |
|
|
|
598 |
|
|
@findex MEM_IN_STRUCT_P
|
599 |
|
|
@cindex @code{mem} and @samp{/s}
|
600 |
|
|
@cindex @code{in_struct}, in @code{mem}
|
601 |
|
|
@item MEM_IN_STRUCT_P (@var{x})
|
602 |
|
|
In @code{mem} expressions, nonzero for reference to an entire structure,
|
603 |
|
|
union or array, or to a component of one. Zero for references to a
|
604 |
|
|
scalar variable or through a pointer to a scalar. If both this flag and
|
605 |
|
|
@code{MEM_SCALAR_P} are clear, then we don't know whether this @code{mem}
|
606 |
|
|
is in a structure or not. Both flags should never be simultaneously set.
|
607 |
|
|
Stored in the @code{in_struct} field and printed as @samp{/s}.
|
608 |
|
|
|
609 |
|
|
@findex MEM_KEEP_ALIAS_SET_P
|
610 |
|
|
@cindex @code{mem} and @samp{/j}
|
611 |
|
|
@cindex @code{jump}, in @code{mem}
|
612 |
|
|
@item MEM_KEEP_ALIAS_SET_P (@var{x})
|
613 |
|
|
In @code{mem} expressions, 1 if we should keep the alias set for this
|
614 |
|
|
mem unchanged when we access a component. Set to 1, for example, when we
|
615 |
|
|
are already in a non-addressable component of an aggregate.
|
616 |
|
|
Stored in the @code{jump} field and printed as @samp{/j}.
|
617 |
|
|
|
618 |
|
|
@findex MEM_SCALAR_P
|
619 |
|
|
@cindex @code{mem} and @samp{/f}
|
620 |
|
|
@cindex @code{frame_related}, in @code{mem}
|
621 |
|
|
@item MEM_SCALAR_P (@var{x})
|
622 |
|
|
In @code{mem} expressions, nonzero for reference to a scalar known not
|
623 |
|
|
to be a member of a structure, union, or array. Zero for such
|
624 |
|
|
references and for indirections through pointers, even pointers pointing
|
625 |
|
|
to scalar types. If both this flag and @code{MEM_IN_STRUCT_P} are clear,
|
626 |
|
|
then we don't know whether this @code{mem} is in a structure or not.
|
627 |
|
|
Both flags should never be simultaneously set.
|
628 |
|
|
Stored in the @code{frame_related} field and printed as @samp{/f}.
|
629 |
|
|
|
630 |
|
|
@findex MEM_VOLATILE_P
|
631 |
|
|
@cindex @code{mem} and @samp{/v}
|
632 |
|
|
@cindex @code{asm_input} and @samp{/v}
|
633 |
|
|
@cindex @code{asm_operands} and @samp{/v}
|
634 |
|
|
@cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
|
635 |
|
|
@item MEM_VOLATILE_P (@var{x})
|
636 |
|
|
In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
|
637 |
|
|
nonzero for volatile memory references.
|
638 |
|
|
Stored in the @code{volatil} field and printed as @samp{/v}.
|
639 |
|
|
|
640 |
|
|
@findex MEM_NOTRAP_P
|
641 |
|
|
@cindex @code{mem} and @samp{/c}
|
642 |
|
|
@cindex @code{call}, in @code{mem}
|
643 |
|
|
@item MEM_NOTRAP_P (@var{x})
|
644 |
|
|
In @code{mem}, nonzero for memory references that will not trap.
|
645 |
|
|
Stored in the @code{call} field and printed as @samp{/c}.
|
646 |
|
|
|
647 |
|
|
@findex REG_FUNCTION_VALUE_P
|
648 |
|
|
@cindex @code{reg} and @samp{/i}
|
649 |
|
|
@cindex @code{integrated}, in @code{reg}
|
650 |
|
|
@item REG_FUNCTION_VALUE_P (@var{x})
|
651 |
|
|
Nonzero in a @code{reg} if it is the place in which this function's
|
652 |
|
|
value is going to be returned. (This happens only in a hard
|
653 |
|
|
register.) Stored in the @code{integrated} field and printed as
|
654 |
|
|
@samp{/i}.
|
655 |
|
|
|
656 |
|
|
@findex REG_POINTER
|
657 |
|
|
@cindex @code{reg} and @samp{/f}
|
658 |
|
|
@cindex @code{frame_related}, in @code{reg}
|
659 |
|
|
@item REG_POINTER (@var{x})
|
660 |
|
|
Nonzero in a @code{reg} if the register holds a pointer. Stored in the
|
661 |
|
|
@code{frame_related} field and printed as @samp{/f}.
|
662 |
|
|
|
663 |
|
|
@findex REG_USERVAR_P
|
664 |
|
|
@cindex @code{reg} and @samp{/v}
|
665 |
|
|
@cindex @code{volatil}, in @code{reg}
|
666 |
|
|
@item REG_USERVAR_P (@var{x})
|
667 |
|
|
In a @code{reg}, nonzero if it corresponds to a variable present in
|
668 |
|
|
the user's source code. Zero for temporaries generated internally by
|
669 |
|
|
the compiler. Stored in the @code{volatil} field and printed as
|
670 |
|
|
@samp{/v}.
|
671 |
|
|
|
672 |
|
|
The same hard register may be used also for collecting the values of
|
673 |
|
|
functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
|
674 |
|
|
in this kind of use.
|
675 |
|
|
|
676 |
|
|
@findex RTX_FRAME_RELATED_P
|
677 |
|
|
@cindex @code{insn} and @samp{/f}
|
678 |
|
|
@cindex @code{call_insn} and @samp{/f}
|
679 |
|
|
@cindex @code{jump_insn} and @samp{/f}
|
680 |
|
|
@cindex @code{barrier} and @samp{/f}
|
681 |
|
|
@cindex @code{set} and @samp{/f}
|
682 |
|
|
@cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, and @code{set}
|
683 |
|
|
@item RTX_FRAME_RELATED_P (@var{x})
|
684 |
|
|
Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
|
685 |
|
|
@code{barrier}, or @code{set} which is part of a function prologue
|
686 |
|
|
and sets the stack pointer, sets the frame pointer, or saves a register.
|
687 |
|
|
This flag should also be set on an instruction that sets up a temporary
|
688 |
|
|
register to use in place of the frame pointer.
|
689 |
|
|
Stored in the @code{frame_related} field and printed as @samp{/f}.
|
690 |
|
|
|
691 |
|
|
In particular, on RISC targets where there are limits on the sizes of
|
692 |
|
|
immediate constants, it is sometimes impossible to reach the register
|
693 |
|
|
save area directly from the stack pointer. In that case, a temporary
|
694 |
|
|
register is used that is near enough to the register save area, and the
|
695 |
|
|
Canonical Frame Address, i.e., DWARF2's logical frame pointer, register
|
696 |
|
|
must (temporarily) be changed to be this temporary register. So, the
|
697 |
|
|
instruction that sets this temporary register must be marked as
|
698 |
|
|
@code{RTX_FRAME_RELATED_P}.
|
699 |
|
|
|
700 |
|
|
If the marked instruction is overly complex (defined in terms of what
|
701 |
|
|
@code{dwarf2out_frame_debug_expr} can handle), you will also have to
|
702 |
|
|
create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
|
703 |
|
|
instruction. This note should contain a simple expression of the
|
704 |
|
|
computation performed by this instruction, i.e., one that
|
705 |
|
|
@code{dwarf2out_frame_debug_expr} can handle.
|
706 |
|
|
|
707 |
|
|
This flag is required for exception handling support on targets with RTL
|
708 |
|
|
prologues.
|
709 |
|
|
|
710 |
|
|
@cindex @code{insn} and @samp{/i}
|
711 |
|
|
@cindex @code{call_insn} and @samp{/i}
|
712 |
|
|
@cindex @code{jump_insn} and @samp{/i}
|
713 |
|
|
@cindex @code{barrier} and @samp{/i}
|
714 |
|
|
@cindex @code{code_label} and @samp{/i}
|
715 |
|
|
@cindex @code{insn_list} and @samp{/i}
|
716 |
|
|
@cindex @code{const} and @samp{/i}
|
717 |
|
|
@cindex @code{note} and @samp{/i}
|
718 |
|
|
@cindex @code{integrated}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, @code{code_label}, @code{insn_list}, @code{const}, and @code{note}
|
719 |
|
|
@code{code_label}, @code{insn_list}, @code{const}, or @code{note} if it
|
720 |
|
|
resulted from an in-line function call.
|
721 |
|
|
Stored in the @code{integrated} field and printed as @samp{/i}.
|
722 |
|
|
|
723 |
|
|
@findex MEM_READONLY_P
|
724 |
|
|
@cindex @code{mem} and @samp{/u}
|
725 |
|
|
@cindex @code{unchanging}, in @code{mem}
|
726 |
|
|
@item MEM_READONLY_P (@var{x})
|
727 |
|
|
Nonzero in a @code{mem}, if the memory is statically allocated and read-only.
|
728 |
|
|
|
729 |
|
|
Read-only in this context means never modified during the lifetime of the
|
730 |
|
|
program, not necessarily in ROM or in write-disabled pages. A common
|
731 |
|
|
example of the later is a shared library's global offset table. This
|
732 |
|
|
table is initialized by the runtime loader, so the memory is technically
|
733 |
|
|
writable, but after control is transfered from the runtime loader to the
|
734 |
|
|
application, this memory will never be subsequently modified.
|
735 |
|
|
|
736 |
|
|
Stored in the @code{unchanging} field and printed as @samp{/u}.
|
737 |
|
|
|
738 |
|
|
@findex SCHED_GROUP_P
|
739 |
|
|
@cindex @code{insn} and @samp{/s}
|
740 |
|
|
@cindex @code{call_insn} and @samp{/s}
|
741 |
|
|
@cindex @code{jump_insn} and @samp{/s}
|
742 |
|
|
@cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn}
|
743 |
|
|
@item SCHED_GROUP_P (@var{x})
|
744 |
|
|
During instruction scheduling, in an @code{insn}, @code{call_insn} or
|
745 |
|
|
@code{jump_insn}, indicates that the
|
746 |
|
|
previous insn must be scheduled together with this insn. This is used to
|
747 |
|
|
ensure that certain groups of instructions will not be split up by the
|
748 |
|
|
instruction scheduling pass, for example, @code{use} insns before
|
749 |
|
|
a @code{call_insn} may not be separated from the @code{call_insn}.
|
750 |
|
|
Stored in the @code{in_struct} field and printed as @samp{/s}.
|
751 |
|
|
|
752 |
|
|
@findex SET_IS_RETURN_P
|
753 |
|
|
@cindex @code{insn} and @samp{/j}
|
754 |
|
|
@cindex @code{jump}, in @code{insn}
|
755 |
|
|
@item SET_IS_RETURN_P (@var{x})
|
756 |
|
|
For a @code{set}, nonzero if it is for a return.
|
757 |
|
|
Stored in the @code{jump} field and printed as @samp{/j}.
|
758 |
|
|
|
759 |
|
|
@findex SIBLING_CALL_P
|
760 |
|
|
@cindex @code{call_insn} and @samp{/j}
|
761 |
|
|
@cindex @code{jump}, in @code{call_insn}
|
762 |
|
|
@item SIBLING_CALL_P (@var{x})
|
763 |
|
|
For a @code{call_insn}, nonzero if the insn is a sibling call.
|
764 |
|
|
Stored in the @code{jump} field and printed as @samp{/j}.
|
765 |
|
|
|
766 |
|
|
@findex STRING_POOL_ADDRESS_P
|
767 |
|
|
@cindex @code{symbol_ref} and @samp{/f}
|
768 |
|
|
@cindex @code{frame_related}, in @code{symbol_ref}
|
769 |
|
|
@item STRING_POOL_ADDRESS_P (@var{x})
|
770 |
|
|
For a @code{symbol_ref} expression, nonzero if it addresses this function's
|
771 |
|
|
string constant pool.
|
772 |
|
|
Stored in the @code{frame_related} field and printed as @samp{/f}.
|
773 |
|
|
|
774 |
|
|
@findex SUBREG_PROMOTED_UNSIGNED_P
|
775 |
|
|
@cindex @code{subreg} and @samp{/u} and @samp{/v}
|
776 |
|
|
@cindex @code{unchanging}, in @code{subreg}
|
777 |
|
|
@cindex @code{volatil}, in @code{subreg}
|
778 |
|
|
@item SUBREG_PROMOTED_UNSIGNED_P (@var{x})
|
779 |
|
|
Returns a value greater then zero for a @code{subreg} that has
|
780 |
|
|
@code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
|
781 |
|
|
zero-extended, zero if it is kept sign-extended, and less then zero if it is
|
782 |
|
|
extended some other way via the @code{ptr_extend} instruction.
|
783 |
|
|
Stored in the @code{unchanging}
|
784 |
|
|
field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
|
785 |
|
|
This macro may only be used to get the value it may not be used to change
|
786 |
|
|
the value. Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
|
787 |
|
|
|
788 |
|
|
@findex SUBREG_PROMOTED_UNSIGNED_SET
|
789 |
|
|
@cindex @code{subreg} and @samp{/u}
|
790 |
|
|
@cindex @code{unchanging}, in @code{subreg}
|
791 |
|
|
@cindex @code{volatil}, in @code{subreg}
|
792 |
|
|
@item SUBREG_PROMOTED_UNSIGNED_SET (@var{x})
|
793 |
|
|
Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
|
794 |
|
|
to reflect zero, sign, or other extension. If @code{volatil} is
|
795 |
|
|
zero, then @code{unchanging} as nonzero means zero extension and as
|
796 |
|
|
zero means sign extension. If @code{volatil} is nonzero then some
|
797 |
|
|
other type of extension was done via the @code{ptr_extend} instruction.
|
798 |
|
|
|
799 |
|
|
@findex SUBREG_PROMOTED_VAR_P
|
800 |
|
|
@cindex @code{subreg} and @samp{/s}
|
801 |
|
|
@cindex @code{in_struct}, in @code{subreg}
|
802 |
|
|
@item SUBREG_PROMOTED_VAR_P (@var{x})
|
803 |
|
|
Nonzero in a @code{subreg} if it was made when accessing an object that
|
804 |
|
|
was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
|
805 |
|
|
description macro (@pxref{Storage Layout}). In this case, the mode of
|
806 |
|
|
the @code{subreg} is the declared mode of the object and the mode of
|
807 |
|
|
@code{SUBREG_REG} is the mode of the register that holds the object.
|
808 |
|
|
Promoted variables are always either sign- or zero-extended to the wider
|
809 |
|
|
mode on every assignment. Stored in the @code{in_struct} field and
|
810 |
|
|
printed as @samp{/s}.
|
811 |
|
|
|
812 |
|
|
@findex SYMBOL_REF_USED
|
813 |
|
|
@cindex @code{used}, in @code{symbol_ref}
|
814 |
|
|
@item SYMBOL_REF_USED (@var{x})
|
815 |
|
|
In a @code{symbol_ref}, indicates that @var{x} has been used. This is
|
816 |
|
|
normally only used to ensure that @var{x} is only declared external
|
817 |
|
|
once. Stored in the @code{used} field.
|
818 |
|
|
|
819 |
|
|
@findex SYMBOL_REF_WEAK
|
820 |
|
|
@cindex @code{symbol_ref} and @samp{/i}
|
821 |
|
|
@cindex @code{integrated}, in @code{symbol_ref}
|
822 |
|
|
@item SYMBOL_REF_WEAK (@var{x})
|
823 |
|
|
In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
|
824 |
|
|
Stored in the @code{integrated} field and printed as @samp{/i}.
|
825 |
|
|
|
826 |
|
|
@findex SYMBOL_REF_FLAG
|
827 |
|
|
@cindex @code{symbol_ref} and @samp{/v}
|
828 |
|
|
@cindex @code{volatil}, in @code{symbol_ref}
|
829 |
|
|
@item SYMBOL_REF_FLAG (@var{x})
|
830 |
|
|
In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
|
831 |
|
|
Stored in the @code{volatil} field and printed as @samp{/v}.
|
832 |
|
|
|
833 |
|
|
Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
|
834 |
|
|
by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS}
|
835 |
|
|
is mandatory if the target requires more than one bit of storage.
|
836 |
|
|
@end table
|
837 |
|
|
|
838 |
|
|
These are the fields to which the above macros refer:
|
839 |
|
|
|
840 |
|
|
@table @code
|
841 |
|
|
@findex call
|
842 |
|
|
@cindex @samp{/c} in RTL dump
|
843 |
|
|
@item call
|
844 |
|
|
In a @code{mem}, 1 means that the memory reference will not trap.
|
845 |
|
|
|
846 |
|
|
In an RTL dump, this flag is represented as @samp{/c}.
|
847 |
|
|
|
848 |
|
|
@findex frame_related
|
849 |
|
|
@cindex @samp{/f} in RTL dump
|
850 |
|
|
@item frame_related
|
851 |
|
|
In an @code{insn} or @code{set} expression, 1 means that it is part of
|
852 |
|
|
a function prologue and sets the stack pointer, sets the frame pointer,
|
853 |
|
|
saves a register, or sets up a temporary register to use in place of the
|
854 |
|
|
frame pointer.
|
855 |
|
|
|
856 |
|
|
In @code{reg} expressions, 1 means that the register holds a pointer.
|
857 |
|
|
|
858 |
|
|
In @code{symbol_ref} expressions, 1 means that the reference addresses
|
859 |
|
|
this function's string constant pool.
|
860 |
|
|
|
861 |
|
|
In @code{mem} expressions, 1 means that the reference is to a scalar.
|
862 |
|
|
|
863 |
|
|
In an RTL dump, this flag is represented as @samp{/f}.
|
864 |
|
|
|
865 |
|
|
@findex in_struct
|
866 |
|
|
@cindex @samp{/s} in RTL dump
|
867 |
|
|
@item in_struct
|
868 |
|
|
In @code{mem} expressions, it is 1 if the memory datum referred to is
|
869 |
|
|
all or part of a structure or array; 0 if it is (or might be) a scalar
|
870 |
|
|
variable. A reference through a C pointer has 0 because the pointer
|
871 |
|
|
might point to a scalar variable. This information allows the compiler
|
872 |
|
|
to determine something about possible cases of aliasing.
|
873 |
|
|
|
874 |
|
|
In @code{reg} expressions, it is 1 if the register has its entire life
|
875 |
|
|
contained within the test expression of some loop.
|
876 |
|
|
|
877 |
|
|
In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
|
878 |
|
|
an object that has had its mode promoted from a wider mode.
|
879 |
|
|
|
880 |
|
|
In @code{label_ref} expressions, 1 means that the referenced label is
|
881 |
|
|
outside the innermost loop containing the insn in which the @code{label_ref}
|
882 |
|
|
was found.
|
883 |
|
|
|
884 |
|
|
In @code{code_label} expressions, it is 1 if the label may never be deleted.
|
885 |
|
|
This is used for labels which are the target of non-local gotos. Such a
|
886 |
|
|
label that would have been deleted is replaced with a @code{note} of type
|
887 |
|
|
@code{NOTE_INSN_DELETED_LABEL}.
|
888 |
|
|
|
889 |
|
|
In an @code{insn} during dead-code elimination, 1 means that the insn is
|
890 |
|
|
dead code.
|
891 |
|
|
|
892 |
|
|
In an @code{insn} or @code{jump_insn} during reorg for an insn in the
|
893 |
|
|
delay slot of a branch,
|
894 |
|
|
1 means that this insn is from the target of the branch.
|
895 |
|
|
|
896 |
|
|
In an @code{insn} during instruction scheduling, 1 means that this insn
|
897 |
|
|
must be scheduled as part of a group together with the previous insn.
|
898 |
|
|
|
899 |
|
|
In an RTL dump, this flag is represented as @samp{/s}.
|
900 |
|
|
|
901 |
|
|
@findex integrated
|
902 |
|
|
@cindex @samp{/i} in RTL dump
|
903 |
|
|
@item integrated
|
904 |
|
|
In an @code{insn}, @code{insn_list}, or @code{const}, 1 means the RTL was
|
905 |
|
|
produced by procedure integration.
|
906 |
|
|
|
907 |
|
|
In @code{reg} expressions, 1 means the register contains
|
908 |
|
|
the value to be returned by the current function. On
|
909 |
|
|
machines that pass parameters in registers, the same register number
|
910 |
|
|
may be used for parameters as well, but this flag is not set on such
|
911 |
|
|
uses.
|
912 |
|
|
|
913 |
|
|
In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
|
914 |
|
|
|
915 |
|
|
In an RTL dump, this flag is represented as @samp{/i}.
|
916 |
|
|
|
917 |
|
|
@findex jump
|
918 |
|
|
@cindex @samp{/j} in RTL dump
|
919 |
|
|
@item jump
|
920 |
|
|
In a @code{mem} expression, 1 means we should keep the alias set for this
|
921 |
|
|
mem unchanged when we access a component.
|
922 |
|
|
|
923 |
|
|
In a @code{set}, 1 means it is for a return.
|
924 |
|
|
|
925 |
|
|
In a @code{call_insn}, 1 means it is a sibling call.
|
926 |
|
|
|
927 |
|
|
In an RTL dump, this flag is represented as @samp{/j}.
|
928 |
|
|
|
929 |
|
|
@findex unchanging
|
930 |
|
|
@cindex @samp{/u} in RTL dump
|
931 |
|
|
@item unchanging
|
932 |
|
|
In @code{reg} and @code{mem} expressions, 1 means
|
933 |
|
|
that the value of the expression never changes.
|
934 |
|
|
|
935 |
|
|
In @code{subreg} expressions, it is 1 if the @code{subreg} references an
|
936 |
|
|
unsigned object whose mode has been promoted to a wider mode.
|
937 |
|
|
|
938 |
|
|
In an @code{insn} or @code{jump_insn} in the delay slot of a branch
|
939 |
|
|
instruction, 1 means an annulling branch should be used.
|
940 |
|
|
|
941 |
|
|
In a @code{symbol_ref} expression, 1 means that this symbol addresses
|
942 |
|
|
something in the per-function constant pool.
|
943 |
|
|
|
944 |
|
|
In a @code{call_insn}, @code{note}, or an @code{expr_list} of notes,
|
945 |
|
|
1 means that this instruction is a call to a const or pure function.
|
946 |
|
|
|
947 |
|
|
In an RTL dump, this flag is represented as @samp{/u}.
|
948 |
|
|
|
949 |
|
|
@findex used
|
950 |
|
|
@item used
|
951 |
|
|
This flag is used directly (without an access macro) at the end of RTL
|
952 |
|
|
generation for a function, to count the number of times an expression
|
953 |
|
|
appears in insns. Expressions that appear more than once are copied,
|
954 |
|
|
according to the rules for shared structure (@pxref{Sharing}).
|
955 |
|
|
|
956 |
|
|
For a @code{reg}, it is used directly (without an access macro) by the
|
957 |
|
|
leaf register renumbering code to ensure that each register is only
|
958 |
|
|
renumbered once.
|
959 |
|
|
|
960 |
|
|
In a @code{symbol_ref}, it indicates that an external declaration for
|
961 |
|
|
the symbol has already been written.
|
962 |
|
|
|
963 |
|
|
@findex volatil
|
964 |
|
|
@cindex @samp{/v} in RTL dump
|
965 |
|
|
@item volatil
|
966 |
|
|
@cindex volatile memory references
|
967 |
|
|
In a @code{mem}, @code{asm_operands}, or @code{asm_input}
|
968 |
|
|
expression, it is 1 if the memory
|
969 |
|
|
reference is volatile. Volatile memory references may not be deleted,
|
970 |
|
|
reordered or combined.
|
971 |
|
|
|
972 |
|
|
In a @code{symbol_ref} expression, it is used for machine-specific
|
973 |
|
|
purposes.
|
974 |
|
|
|
975 |
|
|
In a @code{reg} expression, it is 1 if the value is a user-level variable.
|
976 |
|
|
|
977 |
|
|
|
978 |
|
|
In an @code{insn}, 1 means the insn has been deleted.
|
979 |
|
|
|
980 |
|
|
In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
|
981 |
|
|
to a non-local label.
|
982 |
|
|
|
983 |
|
|
In an RTL dump, this flag is represented as @samp{/v}.
|
984 |
|
|
@end table
|
985 |
|
|
|
986 |
|
|
@node Machine Modes
|
987 |
|
|
@section Machine Modes
|
988 |
|
|
@cindex machine modes
|
989 |
|
|
|
990 |
|
|
@findex enum machine_mode
|
991 |
|
|
A machine mode describes a size of data object and the representation used
|
992 |
|
|
for it. In the C code, machine modes are represented by an enumeration
|
993 |
|
|
type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
|
994 |
|
|
expression has room for a machine mode and so do certain kinds of tree
|
995 |
|
|
expressions (declarations and types, to be precise).
|
996 |
|
|
|
997 |
|
|
In debugging dumps and machine descriptions, the machine mode of an RTL
|
998 |
|
|
expression is written after the expression code with a colon to separate
|
999 |
|
|
them. The letters @samp{mode} which appear at the end of each machine mode
|
1000 |
|
|
name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
|
1001 |
|
|
expression with machine mode @code{SImode}. If the mode is
|
1002 |
|
|
@code{VOIDmode}, it is not written at all.
|
1003 |
|
|
|
1004 |
|
|
Here is a table of machine modes. The term ``byte'' below refers to an
|
1005 |
|
|
object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
|
1006 |
|
|
|
1007 |
|
|
@table @code
|
1008 |
|
|
@findex BImode
|
1009 |
|
|
@item BImode
|
1010 |
|
|
``Bit'' mode represents a single bit, for predicate registers.
|
1011 |
|
|
|
1012 |
|
|
@findex QImode
|
1013 |
|
|
@item QImode
|
1014 |
|
|
``Quarter-Integer'' mode represents a single byte treated as an integer.
|
1015 |
|
|
|
1016 |
|
|
@findex HImode
|
1017 |
|
|
@item HImode
|
1018 |
|
|
``Half-Integer'' mode represents a two-byte integer.
|
1019 |
|
|
|
1020 |
|
|
@findex PSImode
|
1021 |
|
|
@item PSImode
|
1022 |
|
|
``Partial Single Integer'' mode represents an integer which occupies
|
1023 |
|
|
four bytes but which doesn't really use all four. On some machines,
|
1024 |
|
|
this is the right mode to use for pointers.
|
1025 |
|
|
|
1026 |
|
|
@findex SImode
|
1027 |
|
|
@item SImode
|
1028 |
|
|
``Single Integer'' mode represents a four-byte integer.
|
1029 |
|
|
|
1030 |
|
|
@findex PDImode
|
1031 |
|
|
@item PDImode
|
1032 |
|
|
``Partial Double Integer'' mode represents an integer which occupies
|
1033 |
|
|
eight bytes but which doesn't really use all eight. On some machines,
|
1034 |
|
|
this is the right mode to use for certain pointers.
|
1035 |
|
|
|
1036 |
|
|
@findex DImode
|
1037 |
|
|
@item DImode
|
1038 |
|
|
``Double Integer'' mode represents an eight-byte integer.
|
1039 |
|
|
|
1040 |
|
|
@findex TImode
|
1041 |
|
|
@item TImode
|
1042 |
|
|
``Tetra Integer'' (?) mode represents a sixteen-byte integer.
|
1043 |
|
|
|
1044 |
|
|
@findex OImode
|
1045 |
|
|
@item OImode
|
1046 |
|
|
``Octa Integer'' (?) mode represents a thirty-two-byte integer.
|
1047 |
|
|
|
1048 |
|
|
@findex QFmode
|
1049 |
|
|
@item QFmode
|
1050 |
|
|
``Quarter-Floating'' mode represents a quarter-precision (single byte)
|
1051 |
|
|
floating point number.
|
1052 |
|
|
|
1053 |
|
|
@findex HFmode
|
1054 |
|
|
@item HFmode
|
1055 |
|
|
``Half-Floating'' mode represents a half-precision (two byte) floating
|
1056 |
|
|
point number.
|
1057 |
|
|
|
1058 |
|
|
@findex TQFmode
|
1059 |
|
|
@item TQFmode
|
1060 |
|
|
``Three-Quarter-Floating'' (?) mode represents a three-quarter-precision
|
1061 |
|
|
(three byte) floating point number.
|
1062 |
|
|
|
1063 |
|
|
@findex SFmode
|
1064 |
|
|
@item SFmode
|
1065 |
|
|
``Single Floating'' mode represents a four byte floating point number.
|
1066 |
|
|
In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
|
1067 |
|
|
this is a single-precision IEEE floating point number; it can also be
|
1068 |
|
|
used for double-precision (on processors with 16-bit bytes) and
|
1069 |
|
|
single-precision VAX and IBM types.
|
1070 |
|
|
|
1071 |
|
|
@findex DFmode
|
1072 |
|
|
@item DFmode
|
1073 |
|
|
``Double Floating'' mode represents an eight byte floating point number.
|
1074 |
|
|
In the common case, of a processor with IEEE arithmetic and 8-bit bytes,
|
1075 |
|
|
this is a double-precision IEEE floating point number.
|
1076 |
|
|
|
1077 |
|
|
@findex XFmode
|
1078 |
|
|
@item XFmode
|
1079 |
|
|
``Extended Floating'' mode represents an IEEE extended floating point
|
1080 |
|
|
number. This mode only has 80 meaningful bits (ten bytes). Some
|
1081 |
|
|
processors require such numbers to be padded to twelve bytes, others
|
1082 |
|
|
to sixteen; this mode is used for either.
|
1083 |
|
|
|
1084 |
|
|
@findex TFmode
|
1085 |
|
|
@item TFmode
|
1086 |
|
|
``Tetra Floating'' mode represents a sixteen byte floating point number
|
1087 |
|
|
all 128 of whose bits are meaningful. One common use is the
|
1088 |
|
|
IEEE quad-precision format.
|
1089 |
|
|
|
1090 |
|
|
@findex CCmode
|
1091 |
|
|
@item CCmode
|
1092 |
|
|
``Condition Code'' mode represents the value of a condition code, which
|
1093 |
|
|
is a machine-specific set of bits used to represent the result of a
|
1094 |
|
|
comparison operation. Other machine-specific modes may also be used for
|
1095 |
|
|
the condition code. These modes are not used on machines that use
|
1096 |
|
|
@code{cc0} (see @pxref{Condition Code}).
|
1097 |
|
|
|
1098 |
|
|
@findex BLKmode
|
1099 |
|
|
@item BLKmode
|
1100 |
|
|
``Block'' mode represents values that are aggregates to which none of
|
1101 |
|
|
the other modes apply. In RTL, only memory references can have this mode,
|
1102 |
|
|
and only if they appear in string-move or vector instructions. On machines
|
1103 |
|
|
which have no such instructions, @code{BLKmode} will not appear in RTL@.
|
1104 |
|
|
|
1105 |
|
|
@findex VOIDmode
|
1106 |
|
|
@item VOIDmode
|
1107 |
|
|
Void mode means the absence of a mode or an unspecified mode.
|
1108 |
|
|
For example, RTL expressions of code @code{const_int} have mode
|
1109 |
|
|
@code{VOIDmode} because they can be taken to have whatever mode the context
|
1110 |
|
|
requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
|
1111 |
|
|
the absence of any mode.
|
1112 |
|
|
|
1113 |
|
|
@findex QCmode
|
1114 |
|
|
@findex HCmode
|
1115 |
|
|
@findex SCmode
|
1116 |
|
|
@findex DCmode
|
1117 |
|
|
@findex XCmode
|
1118 |
|
|
@findex TCmode
|
1119 |
|
|
@item QCmode, HCmode, SCmode, DCmode, XCmode, TCmode
|
1120 |
|
|
These modes stand for a complex number represented as a pair of floating
|
1121 |
|
|
point values. The floating point values are in @code{QFmode},
|
1122 |
|
|
@code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
|
1123 |
|
|
@code{TFmode}, respectively.
|
1124 |
|
|
|
1125 |
|
|
@findex CQImode
|
1126 |
|
|
@findex CHImode
|
1127 |
|
|
@findex CSImode
|
1128 |
|
|
@findex CDImode
|
1129 |
|
|
@findex CTImode
|
1130 |
|
|
@findex COImode
|
1131 |
|
|
@item CQImode, CHImode, CSImode, CDImode, CTImode, COImode
|
1132 |
|
|
These modes stand for a complex number represented as a pair of integer
|
1133 |
|
|
values. The integer values are in @code{QImode}, @code{HImode},
|
1134 |
|
|
@code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
|
1135 |
|
|
respectively.
|
1136 |
|
|
@end table
|
1137 |
|
|
|
1138 |
|
|
The machine description defines @code{Pmode} as a C macro which expands
|
1139 |
|
|
into the machine mode used for addresses. Normally this is the mode
|
1140 |
|
|
whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
|
1141 |
|
|
|
1142 |
|
|
The only modes which a machine description @i{must} support are
|
1143 |
|
|
@code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
|
1144 |
|
|
@code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
|
1145 |
|
|
The compiler will attempt to use @code{DImode} for 8-byte structures and
|
1146 |
|
|
unions, but this can be prevented by overriding the definition of
|
1147 |
|
|
@code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
|
1148 |
|
|
use @code{TImode} for 16-byte structures and unions. Likewise, you can
|
1149 |
|
|
arrange for the C type @code{short int} to avoid using @code{HImode}.
|
1150 |
|
|
|
1151 |
|
|
@cindex mode classes
|
1152 |
|
|
Very few explicit references to machine modes remain in the compiler and
|
1153 |
|
|
these few references will soon be removed. Instead, the machine modes
|
1154 |
|
|
are divided into mode classes. These are represented by the enumeration
|
1155 |
|
|
type @code{enum mode_class} defined in @file{machmode.h}. The possible
|
1156 |
|
|
mode classes are:
|
1157 |
|
|
|
1158 |
|
|
@table @code
|
1159 |
|
|
@findex MODE_INT
|
1160 |
|
|
@item MODE_INT
|
1161 |
|
|
Integer modes. By default these are @code{BImode}, @code{QImode},
|
1162 |
|
|
@code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
|
1163 |
|
|
@code{OImode}.
|
1164 |
|
|
|
1165 |
|
|
@findex MODE_PARTIAL_INT
|
1166 |
|
|
@item MODE_PARTIAL_INT
|
1167 |
|
|
The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
|
1168 |
|
|
@code{PSImode} and @code{PDImode}.
|
1169 |
|
|
|
1170 |
|
|
@findex MODE_FLOAT
|
1171 |
|
|
@item MODE_FLOAT
|
1172 |
|
|
Floating point modes. By default these are @code{QFmode},
|
1173 |
|
|
@code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
|
1174 |
|
|
@code{XFmode} and @code{TFmode}.
|
1175 |
|
|
|
1176 |
|
|
@findex MODE_COMPLEX_INT
|
1177 |
|
|
@item MODE_COMPLEX_INT
|
1178 |
|
|
Complex integer modes. (These are not currently implemented).
|
1179 |
|
|
|
1180 |
|
|
@findex MODE_COMPLEX_FLOAT
|
1181 |
|
|
@item MODE_COMPLEX_FLOAT
|
1182 |
|
|
Complex floating point modes. By default these are @code{QCmode},
|
1183 |
|
|
@code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
|
1184 |
|
|
@code{TCmode}.
|
1185 |
|
|
|
1186 |
|
|
@findex MODE_FUNCTION
|
1187 |
|
|
@item MODE_FUNCTION
|
1188 |
|
|
Algol or Pascal function variables including a static chain.
|
1189 |
|
|
(These are not currently implemented).
|
1190 |
|
|
|
1191 |
|
|
@findex MODE_CC
|
1192 |
|
|
@item MODE_CC
|
1193 |
|
|
Modes representing condition code values. These are @code{CCmode} plus
|
1194 |
|
|
any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}.
|
1195 |
|
|
@xref{Jump Patterns},
|
1196 |
|
|
also see @ref{Condition Code}.
|
1197 |
|
|
|
1198 |
|
|
@findex MODE_RANDOM
|
1199 |
|
|
@item MODE_RANDOM
|
1200 |
|
|
This is a catchall mode class for modes which don't fit into the above
|
1201 |
|
|
classes. Currently @code{VOIDmode} and @code{BLKmode} are in
|
1202 |
|
|
@code{MODE_RANDOM}.
|
1203 |
|
|
@end table
|
1204 |
|
|
|
1205 |
|
|
Here are some C macros that relate to machine modes:
|
1206 |
|
|
|
1207 |
|
|
@table @code
|
1208 |
|
|
@findex GET_MODE
|
1209 |
|
|
@item GET_MODE (@var{x})
|
1210 |
|
|
Returns the machine mode of the RTX @var{x}.
|
1211 |
|
|
|
1212 |
|
|
@findex PUT_MODE
|
1213 |
|
|
@item PUT_MODE (@var{x}, @var{newmode})
|
1214 |
|
|
Alters the machine mode of the RTX @var{x} to be @var{newmode}.
|
1215 |
|
|
|
1216 |
|
|
@findex NUM_MACHINE_MODES
|
1217 |
|
|
@item NUM_MACHINE_MODES
|
1218 |
|
|
Stands for the number of machine modes available on the target
|
1219 |
|
|
machine. This is one greater than the largest numeric value of any
|
1220 |
|
|
machine mode.
|
1221 |
|
|
|
1222 |
|
|
@findex GET_MODE_NAME
|
1223 |
|
|
@item GET_MODE_NAME (@var{m})
|
1224 |
|
|
Returns the name of mode @var{m} as a string.
|
1225 |
|
|
|
1226 |
|
|
@findex GET_MODE_CLASS
|
1227 |
|
|
@item GET_MODE_CLASS (@var{m})
|
1228 |
|
|
Returns the mode class of mode @var{m}.
|
1229 |
|
|
|
1230 |
|
|
@findex GET_MODE_WIDER_MODE
|
1231 |
|
|
@item GET_MODE_WIDER_MODE (@var{m})
|
1232 |
|
|
Returns the next wider natural mode. For example, the expression
|
1233 |
|
|
@code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
|
1234 |
|
|
|
1235 |
|
|
@findex GET_MODE_SIZE
|
1236 |
|
|
@item GET_MODE_SIZE (@var{m})
|
1237 |
|
|
Returns the size in bytes of a datum of mode @var{m}.
|
1238 |
|
|
|
1239 |
|
|
@findex GET_MODE_BITSIZE
|
1240 |
|
|
@item GET_MODE_BITSIZE (@var{m})
|
1241 |
|
|
Returns the size in bits of a datum of mode @var{m}.
|
1242 |
|
|
|
1243 |
|
|
@findex GET_MODE_MASK
|
1244 |
|
|
@item GET_MODE_MASK (@var{m})
|
1245 |
|
|
Returns a bitmask containing 1 for all bits in a word that fit within
|
1246 |
|
|
mode @var{m}. This macro can only be used for modes whose bitsize is
|
1247 |
|
|
less than or equal to @code{HOST_BITS_PER_INT}.
|
1248 |
|
|
|
1249 |
|
|
@findex GET_MODE_ALIGNMENT
|
1250 |
|
|
@item GET_MODE_ALIGNMENT (@var{m})
|
1251 |
|
|
Return the required alignment, in bits, for an object of mode @var{m}.
|
1252 |
|
|
|
1253 |
|
|
@findex GET_MODE_UNIT_SIZE
|
1254 |
|
|
@item GET_MODE_UNIT_SIZE (@var{m})
|
1255 |
|
|
Returns the size in bytes of the subunits of a datum of mode @var{m}.
|
1256 |
|
|
This is the same as @code{GET_MODE_SIZE} except in the case of complex
|
1257 |
|
|
modes. For them, the unit size is the size of the real or imaginary
|
1258 |
|
|
part.
|
1259 |
|
|
|
1260 |
|
|
@findex GET_MODE_NUNITS
|
1261 |
|
|
@item GET_MODE_NUNITS (@var{m})
|
1262 |
|
|
Returns the number of units contained in a mode, i.e.,
|
1263 |
|
|
@code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
|
1264 |
|
|
|
1265 |
|
|
@findex GET_CLASS_NARROWEST_MODE
|
1266 |
|
|
@item GET_CLASS_NARROWEST_MODE (@var{c})
|
1267 |
|
|
Returns the narrowest mode in mode class @var{c}.
|
1268 |
|
|
@end table
|
1269 |
|
|
|
1270 |
|
|
@findex byte_mode
|
1271 |
|
|
@findex word_mode
|
1272 |
|
|
The global variables @code{byte_mode} and @code{word_mode} contain modes
|
1273 |
|
|
whose classes are @code{MODE_INT} and whose bitsizes are either
|
1274 |
|
|
@code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
|
1275 |
|
|
machines, these are @code{QImode} and @code{SImode}, respectively.
|
1276 |
|
|
|
1277 |
|
|
@node Constants
|
1278 |
|
|
@section Constant Expression Types
|
1279 |
|
|
@cindex RTL constants
|
1280 |
|
|
@cindex RTL constant expression types
|
1281 |
|
|
|
1282 |
|
|
The simplest RTL expressions are those that represent constant values.
|
1283 |
|
|
|
1284 |
|
|
@table @code
|
1285 |
|
|
@findex const_int
|
1286 |
|
|
@item (const_int @var{i})
|
1287 |
|
|
This type of expression represents the integer value @var{i}. @var{i}
|
1288 |
|
|
is customarily accessed with the macro @code{INTVAL} as in
|
1289 |
|
|
@code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
|
1290 |
|
|
|
1291 |
|
|
Constants generated for modes with fewer bits than @code{HOST_WIDE_INT}
|
1292 |
|
|
must be sign extended to full width (e.g., with @code{gen_int_mode}).
|
1293 |
|
|
|
1294 |
|
|
@findex const0_rtx
|
1295 |
|
|
@findex const1_rtx
|
1296 |
|
|
@findex const2_rtx
|
1297 |
|
|
@findex constm1_rtx
|
1298 |
|
|
There is only one expression object for the integer value zero; it is
|
1299 |
|
|
the value of the variable @code{const0_rtx}. Likewise, the only
|
1300 |
|
|
expression for integer value one is found in @code{const1_rtx}, the only
|
1301 |
|
|
expression for integer value two is found in @code{const2_rtx}, and the
|
1302 |
|
|
only expression for integer value negative one is found in
|
1303 |
|
|
@code{constm1_rtx}. Any attempt to create an expression of code
|
1304 |
|
|
@code{const_int} and value zero, one, two or negative one will return
|
1305 |
|
|
@code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
|
1306 |
|
|
@code{constm1_rtx} as appropriate.
|
1307 |
|
|
|
1308 |
|
|
@findex const_true_rtx
|
1309 |
|
|
Similarly, there is only one object for the integer whose value is
|
1310 |
|
|
@code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
|
1311 |
|
|
@code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
|
1312 |
|
|
@code{const1_rtx} will point to the same object. If
|
1313 |
|
|
@code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
|
1314 |
|
|
@code{constm1_rtx} will point to the same object.
|
1315 |
|
|
|
1316 |
|
|
@findex const_double
|
1317 |
|
|
@item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
|
1318 |
|
|
Represents either a floating-point constant of mode @var{m} or an
|
1319 |
|
|
integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
|
1320 |
|
|
bits but small enough to fit within twice that number of bits (GCC
|
1321 |
|
|
does not provide a mechanism to represent even larger constants). In
|
1322 |
|
|
the latter case, @var{m} will be @code{VOIDmode}.
|
1323 |
|
|
|
1324 |
|
|
@findex const_vector
|
1325 |
|
|
@item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
|
1326 |
|
|
Represents a vector constant. The square brackets stand for the vector
|
1327 |
|
|
containing the constant elements. @var{x0}, @var{x1} and so on are
|
1328 |
|
|
the @code{const_int} or @code{const_double} elements.
|
1329 |
|
|
|
1330 |
|
|
The number of units in a @code{const_vector} is obtained with the macro
|
1331 |
|
|
@code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
|
1332 |
|
|
|
1333 |
|
|
Individual elements in a vector constant are accessed with the macro
|
1334 |
|
|
@code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
|
1335 |
|
|
where @var{v} is the vector constant and @var{n} is the element
|
1336 |
|
|
desired.
|
1337 |
|
|
|
1338 |
|
|
@findex CONST_DOUBLE_MEM
|
1339 |
|
|
@findex CONST_DOUBLE_CHAIN
|
1340 |
|
|
@var{addr} is used to contain the @code{mem} expression that corresponds
|
1341 |
|
|
to the location in memory that at which the constant can be found. If
|
1342 |
|
|
it has not been allocated a memory location, but is on the chain of all
|
1343 |
|
|
@code{const_double} expressions in this compilation (maintained using an
|
1344 |
|
|
undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
|
1345 |
|
|
on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
|
1346 |
|
|
customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
|
1347 |
|
|
chain field via @code{CONST_DOUBLE_CHAIN}.
|
1348 |
|
|
|
1349 |
|
|
@findex CONST_DOUBLE_LOW
|
1350 |
|
|
If @var{m} is @code{VOIDmode}, the bits of the value are stored in
|
1351 |
|
|
@var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
|
1352 |
|
|
@code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
|
1353 |
|
|
|
1354 |
|
|
If the constant is floating point (regardless of its precision), then
|
1355 |
|
|
the number of integers used to store the value depends on the size of
|
1356 |
|
|
@code{REAL_VALUE_TYPE} (@pxref{Floating Point}). The integers
|
1357 |
|
|
represent a floating point number, but not precisely in the target
|
1358 |
|
|
machine's or host machine's floating point format. To convert them to
|
1359 |
|
|
the precise bit pattern used by the target machine, use the macro
|
1360 |
|
|
@code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
|
1361 |
|
|
|
1362 |
|
|
@findex CONST0_RTX
|
1363 |
|
|
@findex CONST1_RTX
|
1364 |
|
|
@findex CONST2_RTX
|
1365 |
|
|
The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
|
1366 |
|
|
value 0 in mode @var{mode}. If mode @var{mode} is of mode class
|
1367 |
|
|
@code{MODE_INT}, it returns @code{const0_rtx}. If mode @var{mode} is of
|
1368 |
|
|
mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
|
1369 |
|
|
expression in mode @var{mode}. Otherwise, it returns a
|
1370 |
|
|
@code{CONST_VECTOR} expression in mode @var{mode}. Similarly, the macro
|
1371 |
|
|
@code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
|
1372 |
|
|
mode @var{mode} and similarly for @code{CONST2_RTX}. The
|
1373 |
|
|
@code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
|
1374 |
|
|
for vector modes.
|
1375 |
|
|
|
1376 |
|
|
@findex const_string
|
1377 |
|
|
@item (const_string @var{str})
|
1378 |
|
|
Represents a constant string with value @var{str}. Currently this is
|
1379 |
|
|
used only for insn attributes (@pxref{Insn Attributes}) since constant
|
1380 |
|
|
strings in C are placed in memory.
|
1381 |
|
|
|
1382 |
|
|
@findex symbol_ref
|
1383 |
|
|
@item (symbol_ref:@var{mode} @var{symbol})
|
1384 |
|
|
Represents the value of an assembler label for data. @var{symbol} is
|
1385 |
|
|
a string that describes the name of the assembler label. If it starts
|
1386 |
|
|
with a @samp{*}, the label is the rest of @var{symbol} not including
|
1387 |
|
|
the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
|
1388 |
|
|
with @samp{_}.
|
1389 |
|
|
|
1390 |
|
|
The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
|
1391 |
|
|
Usually that is the only mode for which a symbol is directly valid.
|
1392 |
|
|
|
1393 |
|
|
@findex label_ref
|
1394 |
|
|
@item (label_ref:@var{mode} @var{label})
|
1395 |
|
|
Represents the value of an assembler label for code. It contains one
|
1396 |
|
|
operand, an expression, which must be a @code{code_label} or a @code{note}
|
1397 |
|
|
of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
|
1398 |
|
|
sequence to identify the place where the label should go.
|
1399 |
|
|
|
1400 |
|
|
The reason for using a distinct expression type for code label
|
1401 |
|
|
references is so that jump optimization can distinguish them.
|
1402 |
|
|
|
1403 |
|
|
The @code{label_ref} contains a mode, which is usually @code{Pmode}.
|
1404 |
|
|
Usually that is the only mode for which a label is directly valid.
|
1405 |
|
|
|
1406 |
|
|
@item (const:@var{m} @var{exp})
|
1407 |
|
|
Represents a constant that is the result of an assembly-time
|
1408 |
|
|
arithmetic computation. The operand, @var{exp}, is an expression that
|
1409 |
|
|
contains only constants (@code{const_int}, @code{symbol_ref} and
|
1410 |
|
|
@code{label_ref} expressions) combined with @code{plus} and
|
1411 |
|
|
@code{minus}. However, not all combinations are valid, since the
|
1412 |
|
|
assembler cannot do arbitrary arithmetic on relocatable symbols.
|
1413 |
|
|
|
1414 |
|
|
@var{m} should be @code{Pmode}.
|
1415 |
|
|
|
1416 |
|
|
@findex high
|
1417 |
|
|
@item (high:@var{m} @var{exp})
|
1418 |
|
|
Represents the high-order bits of @var{exp}, usually a
|
1419 |
|
|
@code{symbol_ref}. The number of bits is machine-dependent and is
|
1420 |
|
|
normally the number of bits specified in an instruction that initializes
|
1421 |
|
|
the high order bits of a register. It is used with @code{lo_sum} to
|
1422 |
|
|
represent the typical two-instruction sequence used in RISC machines to
|
1423 |
|
|
reference a global memory location.
|
1424 |
|
|
|
1425 |
|
|
@var{m} should be @code{Pmode}.
|
1426 |
|
|
@end table
|
1427 |
|
|
|
1428 |
|
|
@node Regs and Memory
|
1429 |
|
|
@section Registers and Memory
|
1430 |
|
|
@cindex RTL register expressions
|
1431 |
|
|
@cindex RTL memory expressions
|
1432 |
|
|
|
1433 |
|
|
Here are the RTL expression types for describing access to machine
|
1434 |
|
|
registers and to main memory.
|
1435 |
|
|
|
1436 |
|
|
@table @code
|
1437 |
|
|
@findex reg
|
1438 |
|
|
@cindex hard registers
|
1439 |
|
|
@cindex pseudo registers
|
1440 |
|
|
@item (reg:@var{m} @var{n})
|
1441 |
|
|
For small values of the integer @var{n} (those that are less than
|
1442 |
|
|
@code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
|
1443 |
|
|
register number @var{n}: a @dfn{hard register}. For larger values of
|
1444 |
|
|
@var{n}, it stands for a temporary value or @dfn{pseudo register}.
|
1445 |
|
|
The compiler's strategy is to generate code assuming an unlimited
|
1446 |
|
|
number of such pseudo registers, and later convert them into hard
|
1447 |
|
|
registers or into memory references.
|
1448 |
|
|
|
1449 |
|
|
@var{m} is the machine mode of the reference. It is necessary because
|
1450 |
|
|
machines can generally refer to each register in more than one mode.
|
1451 |
|
|
For example, a register may contain a full word but there may be
|
1452 |
|
|
instructions to refer to it as a half word or as a single byte, as
|
1453 |
|
|
well as instructions to refer to it as a floating point number of
|
1454 |
|
|
various precisions.
|
1455 |
|
|
|
1456 |
|
|
Even for a register that the machine can access in only one mode,
|
1457 |
|
|
the mode must always be specified.
|
1458 |
|
|
|
1459 |
|
|
The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
|
1460 |
|
|
description, since the number of hard registers on the machine is an
|
1461 |
|
|
invariant characteristic of the machine. Note, however, that not
|
1462 |
|
|
all of the machine registers must be general registers. All the
|
1463 |
|
|
machine registers that can be used for storage of data are given
|
1464 |
|
|
hard register numbers, even those that can be used only in certain
|
1465 |
|
|
instructions or can hold only certain types of data.
|
1466 |
|
|
|
1467 |
|
|
A hard register may be accessed in various modes throughout one
|
1468 |
|
|
function, but each pseudo register is given a natural mode
|
1469 |
|
|
and is accessed only in that mode. When it is necessary to describe
|
1470 |
|
|
an access to a pseudo register using a nonnatural mode, a @code{subreg}
|
1471 |
|
|
expression is used.
|
1472 |
|
|
|
1473 |
|
|
A @code{reg} expression with a machine mode that specifies more than
|
1474 |
|
|
one word of data may actually stand for several consecutive registers.
|
1475 |
|
|
If in addition the register number specifies a hardware register, then
|
1476 |
|
|
it actually represents several consecutive hardware registers starting
|
1477 |
|
|
with the specified one.
|
1478 |
|
|
|
1479 |
|
|
Each pseudo register number used in a function's RTL code is
|
1480 |
|
|
represented by a unique @code{reg} expression.
|
1481 |
|
|
|
1482 |
|
|
@findex FIRST_VIRTUAL_REGISTER
|
1483 |
|
|
@findex LAST_VIRTUAL_REGISTER
|
1484 |
|
|
Some pseudo register numbers, those within the range of
|
1485 |
|
|
@code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
|
1486 |
|
|
appear during the RTL generation phase and are eliminated before the
|
1487 |
|
|
optimization phases. These represent locations in the stack frame that
|
1488 |
|
|
cannot be determined until RTL generation for the function has been
|
1489 |
|
|
completed. The following virtual register numbers are defined:
|
1490 |
|
|
|
1491 |
|
|
@table @code
|
1492 |
|
|
@findex VIRTUAL_INCOMING_ARGS_REGNUM
|
1493 |
|
|
@item VIRTUAL_INCOMING_ARGS_REGNUM
|
1494 |
|
|
This points to the first word of the incoming arguments passed on the
|
1495 |
|
|
stack. Normally these arguments are placed there by the caller, but the
|
1496 |
|
|
callee may have pushed some arguments that were previously passed in
|
1497 |
|
|
registers.
|
1498 |
|
|
|
1499 |
|
|
@cindex @code{FIRST_PARM_OFFSET} and virtual registers
|
1500 |
|
|
@cindex @code{ARG_POINTER_REGNUM} and virtual registers
|
1501 |
|
|
When RTL generation is complete, this virtual register is replaced
|
1502 |
|
|
by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
|
1503 |
|
|
value of @code{FIRST_PARM_OFFSET}.
|
1504 |
|
|
|
1505 |
|
|
@findex VIRTUAL_STACK_VARS_REGNUM
|
1506 |
|
|
@cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
|
1507 |
|
|
@item VIRTUAL_STACK_VARS_REGNUM
|
1508 |
|
|
If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points
|
1509 |
|
|
to immediately above the first variable on the stack. Otherwise, it points
|
1510 |
|
|
to the first variable on the stack.
|
1511 |
|
|
|
1512 |
|
|
@cindex @code{STARTING_FRAME_OFFSET} and virtual registers
|
1513 |
|
|
@cindex @code{FRAME_POINTER_REGNUM} and virtual registers
|
1514 |
|
|
@code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
|
1515 |
|
|
register given by @code{FRAME_POINTER_REGNUM} and the value
|
1516 |
|
|
@code{STARTING_FRAME_OFFSET}.
|
1517 |
|
|
|
1518 |
|
|
@findex VIRTUAL_STACK_DYNAMIC_REGNUM
|
1519 |
|
|
@item VIRTUAL_STACK_DYNAMIC_REGNUM
|
1520 |
|
|
This points to the location of dynamically allocated memory on the stack
|
1521 |
|
|
immediately after the stack pointer has been adjusted by the amount of
|
1522 |
|
|
memory desired.
|
1523 |
|
|
|
1524 |
|
|
@cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
|
1525 |
|
|
@cindex @code{STACK_POINTER_REGNUM} and virtual registers
|
1526 |
|
|
This virtual register is replaced by the sum of the register given by
|
1527 |
|
|
@code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
|
1528 |
|
|
|
1529 |
|
|
@findex VIRTUAL_OUTGOING_ARGS_REGNUM
|
1530 |
|
|
@item VIRTUAL_OUTGOING_ARGS_REGNUM
|
1531 |
|
|
This points to the location in the stack at which outgoing arguments
|
1532 |
|
|
should be written when the stack is pre-pushed (arguments pushed using
|
1533 |
|
|
push insns should always use @code{STACK_POINTER_REGNUM}).
|
1534 |
|
|
|
1535 |
|
|
@cindex @code{STACK_POINTER_OFFSET} and virtual registers
|
1536 |
|
|
This virtual register is replaced by the sum of the register given by
|
1537 |
|
|
@code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
|
1538 |
|
|
@end table
|
1539 |
|
|
|
1540 |
|
|
@findex subreg
|
1541 |
|
|
@item (subreg:@var{m} @var{reg} @var{bytenum})
|
1542 |
|
|
@code{subreg} expressions are used to refer to a register in a machine
|
1543 |
|
|
mode other than its natural one, or to refer to one register of
|
1544 |
|
|
a multi-part @code{reg} that actually refers to several registers.
|
1545 |
|
|
|
1546 |
|
|
Each pseudo-register has a natural mode. If it is necessary to
|
1547 |
|
|
operate on it in a different mode---for example, to perform a fullword
|
1548 |
|
|
move instruction on a pseudo-register that contains a single
|
1549 |
|
|
byte---the pseudo-register must be enclosed in a @code{subreg}. In
|
1550 |
|
|
such a case, @var{bytenum} is zero.
|
1551 |
|
|
|
1552 |
|
|
Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
|
1553 |
|
|
case it is restricting consideration to only the bits of @var{reg} that
|
1554 |
|
|
are in @var{m}.
|
1555 |
|
|
|
1556 |
|
|
Sometimes @var{m} is wider than the mode of @var{reg}. These
|
1557 |
|
|
@code{subreg} expressions are often called @dfn{paradoxical}. They are
|
1558 |
|
|
used in cases where we want to refer to an object in a wider mode but do
|
1559 |
|
|
not care what value the additional bits have. The reload pass ensures
|
1560 |
|
|
that paradoxical references are only made to hard registers.
|
1561 |
|
|
|
1562 |
|
|
The other use of @code{subreg} is to extract the individual registers of
|
1563 |
|
|
a multi-register value. Machine modes such as @code{DImode} and
|
1564 |
|
|
@code{TImode} can indicate values longer than a word, values which
|
1565 |
|
|
usually require two or more consecutive registers. To access one of the
|
1566 |
|
|
registers, use a @code{subreg} with mode @code{SImode} and a
|
1567 |
|
|
@var{bytenum} offset that says which register.
|
1568 |
|
|
|
1569 |
|
|
Storing in a non-paradoxical @code{subreg} has undefined results for
|
1570 |
|
|
bits belonging to the same word as the @code{subreg}. This laxity makes
|
1571 |
|
|
it easier to generate efficient code for such instructions. To
|
1572 |
|
|
represent an instruction that preserves all the bits outside of those in
|
1573 |
|
|
the @code{subreg}, use @code{strict_low_part} around the @code{subreg}.
|
1574 |
|
|
|
1575 |
|
|
@cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
|
1576 |
|
|
The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
|
1577 |
|
|
that byte number zero is part of the most significant word; otherwise,
|
1578 |
|
|
it is part of the least significant word.
|
1579 |
|
|
|
1580 |
|
|
@cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
|
1581 |
|
|
The compilation parameter @code{BYTES_BIG_ENDIAN}, if set to 1, says
|
1582 |
|
|
that byte number zero is the most significant byte within a word;
|
1583 |
|
|
otherwise, it is the least significant byte within a word.
|
1584 |
|
|
|
1585 |
|
|
@cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
|
1586 |
|
|
On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
|
1587 |
|
|
@code{WORDS_BIG_ENDIAN}.
|
1588 |
|
|
However, most parts of the compiler treat floating point values as if
|
1589 |
|
|
they had the same endianness as integer values. This works because
|
1590 |
|
|
they handle them solely as a collection of integer values, with no
|
1591 |
|
|
particular numerical value. Only real.c and the runtime libraries
|
1592 |
|
|
care about @code{FLOAT_WORDS_BIG_ENDIAN}.
|
1593 |
|
|
|
1594 |
|
|
@cindex combiner pass
|
1595 |
|
|
@cindex reload pass
|
1596 |
|
|
@cindex @code{subreg}, special reload handling
|
1597 |
|
|
Between the combiner pass and the reload pass, it is possible to have a
|
1598 |
|
|
paradoxical @code{subreg} which contains a @code{mem} instead of a
|
1599 |
|
|
@code{reg} as its first operand. After the reload pass, it is also
|
1600 |
|
|
possible to have a non-paradoxical @code{subreg} which contains a
|
1601 |
|
|
@code{mem}; this usually occurs when the @code{mem} is a stack slot
|
1602 |
|
|
which replaced a pseudo register.
|
1603 |
|
|
|
1604 |
|
|
Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
|
1605 |
|
|
using a @code{subreg}. On some machines the most significant part of a
|
1606 |
|
|
@code{DFmode} value does not have the same format as a single-precision
|
1607 |
|
|
floating value.
|
1608 |
|
|
|
1609 |
|
|
It is also not valid to access a single word of a multi-word value in a
|
1610 |
|
|
hard register when less registers can hold the value than would be
|
1611 |
|
|
expected from its size. For example, some 32-bit machines have
|
1612 |
|
|
floating-point registers that can hold an entire @code{DFmode} value.
|
1613 |
|
|
If register 10 were such a register @code{(subreg:SI (reg:DF 10) 4)}
|
1614 |
|
|
would be invalid because there is no way to convert that reference to
|
1615 |
|
|
a single machine register. The reload pass prevents @code{subreg}
|
1616 |
|
|
expressions such as these from being formed.
|
1617 |
|
|
|
1618 |
|
|
@findex SUBREG_REG
|
1619 |
|
|
@findex SUBREG_BYTE
|
1620 |
|
|
The first operand of a @code{subreg} expression is customarily accessed
|
1621 |
|
|
with the @code{SUBREG_REG} macro and the second operand is customarily
|
1622 |
|
|
accessed with the @code{SUBREG_BYTE} macro.
|
1623 |
|
|
|
1624 |
|
|
@findex scratch
|
1625 |
|
|
@cindex scratch operands
|
1626 |
|
|
@item (scratch:@var{m})
|
1627 |
|
|
This represents a scratch register that will be required for the
|
1628 |
|
|
execution of a single instruction and not used subsequently. It is
|
1629 |
|
|
converted into a @code{reg} by either the local register allocator or
|
1630 |
|
|
the reload pass.
|
1631 |
|
|
|
1632 |
|
|
@code{scratch} is usually present inside a @code{clobber} operation
|
1633 |
|
|
(@pxref{Side Effects}).
|
1634 |
|
|
|
1635 |
|
|
@findex cc0
|
1636 |
|
|
@cindex condition code register
|
1637 |
|
|
@item (cc0)
|
1638 |
|
|
This refers to the machine's condition code register. It has no
|
1639 |
|
|
operands and may not have a machine mode. There are two ways to use it:
|
1640 |
|
|
|
1641 |
|
|
@itemize @bullet
|
1642 |
|
|
@item
|
1643 |
|
|
To stand for a complete set of condition code flags. This is best on
|
1644 |
|
|
most machines, where each comparison sets the entire series of flags.
|
1645 |
|
|
|
1646 |
|
|
With this technique, @code{(cc0)} may be validly used in only two
|
1647 |
|
|
contexts: as the destination of an assignment (in test and compare
|
1648 |
|
|
instructions) and in comparison operators comparing against zero
|
1649 |
|
|
(@code{const_int} with value zero; that is to say, @code{const0_rtx}).
|
1650 |
|
|
|
1651 |
|
|
@item
|
1652 |
|
|
To stand for a single flag that is the result of a single condition.
|
1653 |
|
|
This is useful on machines that have only a single flag bit, and in
|
1654 |
|
|
which comparison instructions must specify the condition to test.
|
1655 |
|
|
|
1656 |
|
|
With this technique, @code{(cc0)} may be validly used in only two
|
1657 |
|
|
contexts: as the destination of an assignment (in test and compare
|
1658 |
|
|
instructions) where the source is a comparison operator, and as the
|
1659 |
|
|
first operand of @code{if_then_else} (in a conditional branch).
|
1660 |
|
|
@end itemize
|
1661 |
|
|
|
1662 |
|
|
@findex cc0_rtx
|
1663 |
|
|
There is only one expression object of code @code{cc0}; it is the
|
1664 |
|
|
value of the variable @code{cc0_rtx}. Any attempt to create an
|
1665 |
|
|
expression of code @code{cc0} will return @code{cc0_rtx}.
|
1666 |
|
|
|
1667 |
|
|
Instructions can set the condition code implicitly. On many machines,
|
1668 |
|
|
nearly all instructions set the condition code based on the value that
|
1669 |
|
|
they compute or store. It is not necessary to record these actions
|
1670 |
|
|
explicitly in the RTL because the machine description includes a
|
1671 |
|
|
prescription for recognizing the instructions that do so (by means of
|
1672 |
|
|
the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
|
1673 |
|
|
instructions whose sole purpose is to set the condition code, and
|
1674 |
|
|
instructions that use the condition code, need mention @code{(cc0)}.
|
1675 |
|
|
|
1676 |
|
|
On some machines, the condition code register is given a register number
|
1677 |
|
|
and a @code{reg} is used instead of @code{(cc0)}. This is usually the
|
1678 |
|
|
preferable approach if only a small subset of instructions modify the
|
1679 |
|
|
condition code. Other machines store condition codes in general
|
1680 |
|
|
registers; in such cases a pseudo register should be used.
|
1681 |
|
|
|
1682 |
|
|
Some machines, such as the SPARC and RS/6000, have two sets of
|
1683 |
|
|
arithmetic instructions, one that sets and one that does not set the
|
1684 |
|
|
condition code. This is best handled by normally generating the
|
1685 |
|
|
instruction that does not set the condition code, and making a pattern
|
1686 |
|
|
that both performs the arithmetic and sets the condition code register
|
1687 |
|
|
(which would not be @code{(cc0)} in this case). For examples, search
|
1688 |
|
|
for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
|
1689 |
|
|
|
1690 |
|
|
@findex pc
|
1691 |
|
|
@item (pc)
|
1692 |
|
|
@cindex program counter
|
1693 |
|
|
This represents the machine's program counter. It has no operands and
|
1694 |
|
|
may not have a machine mode. @code{(pc)} may be validly used only in
|
1695 |
|
|
certain specific contexts in jump instructions.
|
1696 |
|
|
|
1697 |
|
|
@findex pc_rtx
|
1698 |
|
|
There is only one expression object of code @code{pc}; it is the value
|
1699 |
|
|
of the variable @code{pc_rtx}. Any attempt to create an expression of
|
1700 |
|
|
code @code{pc} will return @code{pc_rtx}.
|
1701 |
|
|
|
1702 |
|
|
All instructions that do not jump alter the program counter implicitly
|
1703 |
|
|
by incrementing it, but there is no need to mention this in the RTL@.
|
1704 |
|
|
|
1705 |
|
|
@findex mem
|
1706 |
|
|
@item (mem:@var{m} @var{addr} @var{alias})
|
1707 |
|
|
This RTX represents a reference to main memory at an address
|
1708 |
|
|
represented by the expression @var{addr}. @var{m} specifies how large
|
1709 |
|
|
a unit of memory is accessed. @var{alias} specifies an alias set for the
|
1710 |
|
|
reference. In general two items are in different alias sets if they cannot
|
1711 |
|
|
reference the same memory address.
|
1712 |
|
|
|
1713 |
|
|
The construct @code{(mem:BLK (scratch))} is considered to alias all
|
1714 |
|
|
other memories. Thus it may be used as a memory barrier in epilogue
|
1715 |
|
|
stack deallocation patterns.
|
1716 |
|
|
|
1717 |
|
|
@findex addressof
|
1718 |
|
|
@item (addressof:@var{m} @var{reg})
|
1719 |
|
|
This RTX represents a request for the address of register @var{reg}. Its mode
|
1720 |
|
|
is always @code{Pmode}. If there are any @code{addressof}
|
1721 |
|
|
expressions left in the function after CSE, @var{reg} is forced into the
|
1722 |
|
|
stack and the @code{addressof} expression is replaced with a @code{plus}
|
1723 |
|
|
expression for the address of its stack slot.
|
1724 |
|
|
@end table
|
1725 |
|
|
|
1726 |
|
|
@node Arithmetic
|
1727 |
|
|
@section RTL Expressions for Arithmetic
|
1728 |
|
|
@cindex arithmetic, in RTL
|
1729 |
|
|
@cindex math, in RTL
|
1730 |
|
|
@cindex RTL expressions for arithmetic
|
1731 |
|
|
|
1732 |
|
|
Unless otherwise specified, all the operands of arithmetic expressions
|
1733 |
|
|
must be valid for mode @var{m}. An operand is valid for mode @var{m}
|
1734 |
|
|
if it has mode @var{m}, or if it is a @code{const_int} or
|
1735 |
|
|
@code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
|
1736 |
|
|
|
1737 |
|
|
For commutative binary operations, constants should be placed in the
|
1738 |
|
|
second operand.
|
1739 |
|
|
|
1740 |
|
|
@table @code
|
1741 |
|
|
@findex plus
|
1742 |
|
|
@findex ss_plus
|
1743 |
|
|
@findex us_plus
|
1744 |
|
|
@cindex RTL sum
|
1745 |
|
|
@cindex RTL addition
|
1746 |
|
|
@cindex RTL addition with signed saturation
|
1747 |
|
|
@cindex RTL addition with unsigned saturation
|
1748 |
|
|
@item (plus:@var{m} @var{x} @var{y})
|
1749 |
|
|
@itemx (ss_plus:@var{m} @var{x} @var{y})
|
1750 |
|
|
@itemx (us_plus:@var{m} @var{x} @var{y})
|
1751 |
|
|
|
1752 |
|
|
These three expressions all represent the sum of the values
|
1753 |
|
|
represented by @var{x} and @var{y} carried out in machine mode
|
1754 |
|
|
@var{m}. They differ in their behavior on overflow of integer modes.
|
1755 |
|
|
@code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
|
1756 |
|
|
saturates at the maximum signed value representable in @var{m};
|
1757 |
|
|
@code{us_plus} saturates at the maximum unsigned value.
|
1758 |
|
|
|
1759 |
|
|
@c ??? What happens on overflow of floating point modes?
|
1760 |
|
|
|
1761 |
|
|
@findex lo_sum
|
1762 |
|
|
@item (lo_sum:@var{m} @var{x} @var{y})
|
1763 |
|
|
|
1764 |
|
|
This expression represents the sum of @var{x} and the low-order bits
|
1765 |
|
|
of @var{y}. It is used with @code{high} (@pxref{Constants}) to
|
1766 |
|
|
represent the typical two-instruction sequence used in RISC machines
|
1767 |
|
|
to reference a global memory location.
|
1768 |
|
|
|
1769 |
|
|
The number of low order bits is machine-dependent but is
|
1770 |
|
|
normally the number of bits in a @code{Pmode} item minus the number of
|
1771 |
|
|
bits set by @code{high}.
|
1772 |
|
|
|
1773 |
|
|
@var{m} should be @code{Pmode}.
|
1774 |
|
|
|
1775 |
|
|
@findex minus
|
1776 |
|
|
@findex ss_minus
|
1777 |
|
|
@findex us_minus
|
1778 |
|
|
@cindex RTL difference
|
1779 |
|
|
@cindex RTL subtraction
|
1780 |
|
|
@cindex RTL subtraction with signed saturation
|
1781 |
|
|
@cindex RTL subtraction with unsigned saturation
|
1782 |
|
|
@item (minus:@var{m} @var{x} @var{y})
|
1783 |
|
|
@itemx (ss_minus:@var{m} @var{x} @var{y})
|
1784 |
|
|
@itemx (us_minus:@var{m} @var{x} @var{y})
|
1785 |
|
|
|
1786 |
|
|
These three expressions represent the result of subtracting @var{y}
|
1787 |
|
|
from @var{x}, carried out in mode @var{M}. Behavior on overflow is
|
1788 |
|
|
the same as for the three variants of @code{plus} (see above).
|
1789 |
|
|
|
1790 |
|
|
@findex compare
|
1791 |
|
|
@cindex RTL comparison
|
1792 |
|
|
@item (compare:@var{m} @var{x} @var{y})
|
1793 |
|
|
Represents the result of subtracting @var{y} from @var{x} for purposes
|
1794 |
|
|
of comparison. The result is computed without overflow, as if with
|
1795 |
|
|
infinite precision.
|
1796 |
|
|
|
1797 |
|
|
Of course, machines can't really subtract with infinite precision.
|
1798 |
|
|
However, they can pretend to do so when only the sign of the result will
|
1799 |
|
|
be used, which is the case when the result is stored in the condition
|
1800 |
|
|
code. And that is the @emph{only} way this kind of expression may
|
1801 |
|
|
validly be used: as a value to be stored in the condition codes, either
|
1802 |
|
|
@code{(cc0)} or a register. @xref{Comparisons}.
|
1803 |
|
|
|
1804 |
|
|
The mode @var{m} is not related to the modes of @var{x} and @var{y}, but
|
1805 |
|
|
instead is the mode of the condition code value. If @code{(cc0)} is
|
1806 |
|
|
used, it is @code{VOIDmode}. Otherwise it is some mode in class
|
1807 |
|
|
@code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}. If @var{m}
|
1808 |
|
|
is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
|
1809 |
|
|
information (in an unspecified format) so that any comparison operator
|
1810 |
|
|
can be applied to the result of the @code{COMPARE} operation. For other
|
1811 |
|
|
modes in class @code{MODE_CC}, the operation only returns a subset of
|
1812 |
|
|
this information.
|
1813 |
|
|
|
1814 |
|
|
Normally, @var{x} and @var{y} must have the same mode. Otherwise,
|
1815 |
|
|
@code{compare} is valid only if the mode of @var{x} is in class
|
1816 |
|
|
@code{MODE_INT} and @var{y} is a @code{const_int} or
|
1817 |
|
|
@code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
|
1818 |
|
|
determines what mode the comparison is to be done in; thus it must not
|
1819 |
|
|
be @code{VOIDmode}.
|
1820 |
|
|
|
1821 |
|
|
If one of the operands is a constant, it should be placed in the
|
1822 |
|
|
second operand and the comparison code adjusted as appropriate.
|
1823 |
|
|
|
1824 |
|
|
A @code{compare} specifying two @code{VOIDmode} constants is not valid
|
1825 |
|
|
since there is no way to know in what mode the comparison is to be
|
1826 |
|
|
performed; the comparison must either be folded during the compilation
|
1827 |
|
|
or the first operand must be loaded into a register while its mode is
|
1828 |
|
|
still known.
|
1829 |
|
|
|
1830 |
|
|
@findex neg
|
1831 |
|
|
@item (neg:@var{m} @var{x})
|
1832 |
|
|
Represents the negation (subtraction from zero) of the value represented
|
1833 |
|
|
by @var{x}, carried out in mode @var{m}.
|
1834 |
|
|
|
1835 |
|
|
@findex mult
|
1836 |
|
|
@cindex multiplication
|
1837 |
|
|
@cindex product
|
1838 |
|
|
@item (mult:@var{m} @var{x} @var{y})
|
1839 |
|
|
Represents the signed product of the values represented by @var{x} and
|
1840 |
|
|
@var{y} carried out in machine mode @var{m}.
|
1841 |
|
|
|
1842 |
|
|
Some machines support a multiplication that generates a product wider
|
1843 |
|
|
than the operands. Write the pattern for this as
|
1844 |
|
|
|
1845 |
|
|
@smallexample
|
1846 |
|
|
(mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
|
1847 |
|
|
@end smallexample
|
1848 |
|
|
|
1849 |
|
|
where @var{m} is wider than the modes of @var{x} and @var{y}, which need
|
1850 |
|
|
not be the same.
|
1851 |
|
|
|
1852 |
|
|
For unsigned widening multiplication, use the same idiom, but with
|
1853 |
|
|
@code{zero_extend} instead of @code{sign_extend}.
|
1854 |
|
|
|
1855 |
|
|
@findex div
|
1856 |
|
|
@cindex division
|
1857 |
|
|
@cindex signed division
|
1858 |
|
|
@cindex quotient
|
1859 |
|
|
@item (div:@var{m} @var{x} @var{y})
|
1860 |
|
|
Represents the quotient in signed division of @var{x} by @var{y},
|
1861 |
|
|
carried out in machine mode @var{m}. If @var{m} is a floating point
|
1862 |
|
|
mode, it represents the exact quotient; otherwise, the integerized
|
1863 |
|
|
quotient.
|
1864 |
|
|
|
1865 |
|
|
Some machines have division instructions in which the operands and
|
1866 |
|
|
quotient widths are not all the same; you should represent
|
1867 |
|
|
such instructions using @code{truncate} and @code{sign_extend} as in,
|
1868 |
|
|
|
1869 |
|
|
@smallexample
|
1870 |
|
|
(truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
|
1871 |
|
|
@end smallexample
|
1872 |
|
|
|
1873 |
|
|
@findex udiv
|
1874 |
|
|
@cindex unsigned division
|
1875 |
|
|
@cindex division
|
1876 |
|
|
@item (udiv:@var{m} @var{x} @var{y})
|
1877 |
|
|
Like @code{div} but represents unsigned division.
|
1878 |
|
|
|
1879 |
|
|
@findex mod
|
1880 |
|
|
@findex umod
|
1881 |
|
|
@cindex remainder
|
1882 |
|
|
@cindex division
|
1883 |
|
|
@item (mod:@var{m} @var{x} @var{y})
|
1884 |
|
|
@itemx (umod:@var{m} @var{x} @var{y})
|
1885 |
|
|
Like @code{div} and @code{udiv} but represent the remainder instead of
|
1886 |
|
|
the quotient.
|
1887 |
|
|
|
1888 |
|
|
@findex smin
|
1889 |
|
|
@findex smax
|
1890 |
|
|
@cindex signed minimum
|
1891 |
|
|
@cindex signed maximum
|
1892 |
|
|
@item (smin:@var{m} @var{x} @var{y})
|
1893 |
|
|
@itemx (smax:@var{m} @var{x} @var{y})
|
1894 |
|
|
Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
|
1895 |
|
|
@var{x} and @var{y}, interpreted as signed values in mode @var{m}.
|
1896 |
|
|
When used with floating point, if both operands are zeros, or if either
|
1897 |
|
|
operand is @code{NaN}, then it is unspecified which of the two operands
|
1898 |
|
|
is returned as the result.
|
1899 |
|
|
|
1900 |
|
|
@findex umin
|
1901 |
|
|
@findex umax
|
1902 |
|
|
@cindex unsigned minimum and maximum
|
1903 |
|
|
@item (umin:@var{m} @var{x} @var{y})
|
1904 |
|
|
@itemx (umax:@var{m} @var{x} @var{y})
|
1905 |
|
|
Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
|
1906 |
|
|
integers.
|
1907 |
|
|
|
1908 |
|
|
@findex not
|
1909 |
|
|
@cindex complement, bitwise
|
1910 |
|
|
@cindex bitwise complement
|
1911 |
|
|
@item (not:@var{m} @var{x})
|
1912 |
|
|
Represents the bitwise complement of the value represented by @var{x},
|
1913 |
|
|
carried out in mode @var{m}, which must be a fixed-point machine mode.
|
1914 |
|
|
|
1915 |
|
|
@findex and
|
1916 |
|
|
@cindex logical-and, bitwise
|
1917 |
|
|
@cindex bitwise logical-and
|
1918 |
|
|
@item (and:@var{m} @var{x} @var{y})
|
1919 |
|
|
Represents the bitwise logical-and of the values represented by
|
1920 |
|
|
@var{x} and @var{y}, carried out in machine mode @var{m}, which must be
|
1921 |
|
|
a fixed-point machine mode.
|
1922 |
|
|
|
1923 |
|
|
@findex ior
|
1924 |
|
|
@cindex inclusive-or, bitwise
|
1925 |
|
|
@cindex bitwise inclusive-or
|
1926 |
|
|
@item (ior:@var{m} @var{x} @var{y})
|
1927 |
|
|
Represents the bitwise inclusive-or of the values represented by @var{x}
|
1928 |
|
|
and @var{y}, carried out in machine mode @var{m}, which must be a
|
1929 |
|
|
fixed-point mode.
|
1930 |
|
|
|
1931 |
|
|
@findex xor
|
1932 |
|
|
@cindex exclusive-or, bitwise
|
1933 |
|
|
@cindex bitwise exclusive-or
|
1934 |
|
|
@item (xor:@var{m} @var{x} @var{y})
|
1935 |
|
|
Represents the bitwise exclusive-or of the values represented by @var{x}
|
1936 |
|
|
and @var{y}, carried out in machine mode @var{m}, which must be a
|
1937 |
|
|
fixed-point mode.
|
1938 |
|
|
|
1939 |
|
|
@findex ashift
|
1940 |
|
|
@cindex left shift
|
1941 |
|
|
@cindex shift
|
1942 |
|
|
@cindex arithmetic shift
|
1943 |
|
|
@item (ashift:@var{m} @var{x} @var{c})
|
1944 |
|
|
Represents the result of arithmetically shifting @var{x} left by @var{c}
|
1945 |
|
|
places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
|
1946 |
|
|
be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
|
1947 |
|
|
mode is determined by the mode called for in the machine description
|
1948 |
|
|
entry for the left-shift instruction. For example, on the VAX, the mode
|
1949 |
|
|
of @var{c} is @code{QImode} regardless of @var{m}.
|
1950 |
|
|
|
1951 |
|
|
@findex lshiftrt
|
1952 |
|
|
@cindex right shift
|
1953 |
|
|
@findex ashiftrt
|
1954 |
|
|
@item (lshiftrt:@var{m} @var{x} @var{c})
|
1955 |
|
|
@itemx (ashiftrt:@var{m} @var{x} @var{c})
|
1956 |
|
|
Like @code{ashift} but for right shift. Unlike the case for left shift,
|
1957 |
|
|
these two operations are distinct.
|
1958 |
|
|
|
1959 |
|
|
@findex rotate
|
1960 |
|
|
@cindex rotate
|
1961 |
|
|
@cindex left rotate
|
1962 |
|
|
@findex rotatert
|
1963 |
|
|
@cindex right rotate
|
1964 |
|
|
@item (rotate:@var{m} @var{x} @var{c})
|
1965 |
|
|
@itemx (rotatert:@var{m} @var{x} @var{c})
|
1966 |
|
|
Similar but represent left and right rotate. If @var{c} is a constant,
|
1967 |
|
|
use @code{rotate}.
|
1968 |
|
|
|
1969 |
|
|
@findex abs
|
1970 |
|
|
@cindex absolute value
|
1971 |
|
|
@item (abs:@var{m} @var{x})
|
1972 |
|
|
Represents the absolute value of @var{x}, computed in mode @var{m}.
|
1973 |
|
|
|
1974 |
|
|
@findex sqrt
|
1975 |
|
|
@cindex square root
|
1976 |
|
|
@item (sqrt:@var{m} @var{x})
|
1977 |
|
|
Represents the square root of @var{x}, computed in mode @var{m}.
|
1978 |
|
|
Most often @var{m} will be a floating point mode.
|
1979 |
|
|
|
1980 |
|
|
@findex ffs
|
1981 |
|
|
@item (ffs:@var{m} @var{x})
|
1982 |
|
|
Represents one plus the index of the least significant 1-bit in
|
1983 |
|
|
@var{x}, represented as an integer of mode @var{m}. (The value is
|
1984 |
|
|
zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
|
1985 |
|
|
depending on the target machine, various mode combinations may be
|
1986 |
|
|
valid.
|
1987 |
|
|
|
1988 |
|
|
@findex clz
|
1989 |
|
|
@item (clz:@var{m} @var{x})
|
1990 |
|
|
Represents the number of leading 0-bits in @var{x}, represented as an
|
1991 |
|
|
integer of mode @var{m}, starting at the most significant bit position.
|
1992 |
|
|
If @var{x} is zero, the value is determined by
|
1993 |
|
|
@code{CLZ_DEFINED_VALUE_AT_ZERO}. Note that this is one of
|
1994 |
|
|
the few expressions that is not invariant under widening. The mode of
|
1995 |
|
|
@var{x} will usually be an integer mode.
|
1996 |
|
|
|
1997 |
|
|
@findex ctz
|
1998 |
|
|
@item (ctz:@var{m} @var{x})
|
1999 |
|
|
Represents the number of trailing 0-bits in @var{x}, represented as an
|
2000 |
|
|
integer of mode @var{m}, starting at the least significant bit position.
|
2001 |
|
|
If @var{x} is zero, the value is determined by
|
2002 |
|
|
@code{CTZ_DEFINED_VALUE_AT_ZERO}. Except for this case,
|
2003 |
|
|
@code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}. The mode of
|
2004 |
|
|
@var{x} will usually be an integer mode.
|
2005 |
|
|
|
2006 |
|
|
@findex popcount
|
2007 |
|
|
@item (popcount:@var{m} @var{x})
|
2008 |
|
|
Represents the number of 1-bits in @var{x}, represented as an integer of
|
2009 |
|
|
mode @var{m}. The mode of @var{x} will usually be an integer mode.
|
2010 |
|
|
|
2011 |
|
|
@findex parity
|
2012 |
|
|
@item (parity:@var{m} @var{x})
|
2013 |
|
|
Represents the number of 1-bits modulo 2 in @var{x}, represented as an
|
2014 |
|
|
integer of mode @var{m}. The mode of @var{x} will usually be an integer
|
2015 |
|
|
mode.
|
2016 |
|
|
@end table
|
2017 |
|
|
|
2018 |
|
|
@node Comparisons
|
2019 |
|
|
@section Comparison Operations
|
2020 |
|
|
@cindex RTL comparison operations
|
2021 |
|
|
|
2022 |
|
|
Comparison operators test a relation on two operands and are considered
|
2023 |
|
|
to represent a machine-dependent nonzero value described by, but not
|
2024 |
|
|
necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
|
2025 |
|
|
if the relation holds, or zero if it does not, for comparison operators
|
2026 |
|
|
whose results have a `MODE_INT' mode,
|
2027 |
|
|
@code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
|
2028 |
|
|
zero if it does not, for comparison operators that return floating-point
|
2029 |
|
|
values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc})
|
2030 |
|
|
if the relation holds, or of zeros if it does not, for comparison operators
|
2031 |
|
|
that return vector results.
|
2032 |
|
|
The mode of the comparison operation is independent of the mode
|
2033 |
|
|
of the data being compared. If the comparison operation is being tested
|
2034 |
|
|
(e.g., the first operand of an @code{if_then_else}), the mode must be
|
2035 |
|
|
@code{VOIDmode}.
|
2036 |
|
|
|
2037 |
|
|
@cindex condition codes
|
2038 |
|
|
There are two ways that comparison operations may be used. The
|
2039 |
|
|
comparison operators may be used to compare the condition codes
|
2040 |
|
|
@code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
|
2041 |
|
|
a construct actually refers to the result of the preceding instruction
|
2042 |
|
|
in which the condition codes were set. The instruction setting the
|
2043 |
|
|
condition code must be adjacent to the instruction using the condition
|
2044 |
|
|
code; only @code{note} insns may separate them.
|
2045 |
|
|
|
2046 |
|
|
Alternatively, a comparison operation may directly compare two data
|
2047 |
|
|
objects. The mode of the comparison is determined by the operands; they
|
2048 |
|
|
must both be valid for a common machine mode. A comparison with both
|
2049 |
|
|
operands constant would be invalid as the machine mode could not be
|
2050 |
|
|
deduced from it, but such a comparison should never exist in RTL due to
|
2051 |
|
|
constant folding.
|
2052 |
|
|
|
2053 |
|
|
In the example above, if @code{(cc0)} were last set to
|
2054 |
|
|
@code{(compare @var{x} @var{y})}, the comparison operation is
|
2055 |
|
|
identical to @code{(eq @var{x} @var{y})}. Usually only one style
|
2056 |
|
|
of comparisons is supported on a particular machine, but the combine
|
2057 |
|
|
pass will try to merge the operations to produce the @code{eq} shown
|
2058 |
|
|
in case it exists in the context of the particular insn involved.
|
2059 |
|
|
|
2060 |
|
|
Inequality comparisons come in two flavors, signed and unsigned. Thus,
|
2061 |
|
|
there are distinct expression codes @code{gt} and @code{gtu} for signed and
|
2062 |
|
|
unsigned greater-than. These can produce different results for the same
|
2063 |
|
|
pair of integer values: for example, 1 is signed greater-than @minus{}1 but not
|
2064 |
|
|
unsigned greater-than, because @minus{}1 when regarded as unsigned is actually
|
2065 |
|
|
@code{0xffffffff} which is greater than 1.
|
2066 |
|
|
|
2067 |
|
|
The signed comparisons are also used for floating point values. Floating
|
2068 |
|
|
point comparisons are distinguished by the machine modes of the operands.
|
2069 |
|
|
|
2070 |
|
|
@table @code
|
2071 |
|
|
@findex eq
|
2072 |
|
|
@cindex equal
|
2073 |
|
|
@item (eq:@var{m} @var{x} @var{y})
|
2074 |
|
|
@code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
|
2075 |
|
|
are equal, otherwise 0.
|
2076 |
|
|
|
2077 |
|
|
@findex ne
|
2078 |
|
|
@cindex not equal
|
2079 |
|
|
@item (ne:@var{m} @var{x} @var{y})
|
2080 |
|
|
@code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
|
2081 |
|
|
are not equal, otherwise 0.
|
2082 |
|
|
|
2083 |
|
|
@findex gt
|
2084 |
|
|
@cindex greater than
|
2085 |
|
|
@item (gt:@var{m} @var{x} @var{y})
|
2086 |
|
|
@code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}. If they
|
2087 |
|
|
are fixed-point, the comparison is done in a signed sense.
|
2088 |
|
|
|
2089 |
|
|
@findex gtu
|
2090 |
|
|
@cindex greater than
|
2091 |
|
|
@cindex unsigned greater than
|
2092 |
|
|
@item (gtu:@var{m} @var{x} @var{y})
|
2093 |
|
|
Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
|
2094 |
|
|
|
2095 |
|
|
@findex lt
|
2096 |
|
|
@cindex less than
|
2097 |
|
|
@findex ltu
|
2098 |
|
|
@cindex unsigned less than
|
2099 |
|
|
@item (lt:@var{m} @var{x} @var{y})
|
2100 |
|
|
@itemx (ltu:@var{m} @var{x} @var{y})
|
2101 |
|
|
Like @code{gt} and @code{gtu} but test for ``less than''.
|
2102 |
|
|
|
2103 |
|
|
@findex ge
|
2104 |
|
|
@cindex greater than
|
2105 |
|
|
@findex geu
|
2106 |
|
|
@cindex unsigned greater than
|
2107 |
|
|
@item (ge:@var{m} @var{x} @var{y})
|
2108 |
|
|
@itemx (geu:@var{m} @var{x} @var{y})
|
2109 |
|
|
Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
|
2110 |
|
|
|
2111 |
|
|
@findex le
|
2112 |
|
|
@cindex less than or equal
|
2113 |
|
|
@findex leu
|
2114 |
|
|
@cindex unsigned less than
|
2115 |
|
|
@item (le:@var{m} @var{x} @var{y})
|
2116 |
|
|
@itemx (leu:@var{m} @var{x} @var{y})
|
2117 |
|
|
Like @code{gt} and @code{gtu} but test for ``less than or equal''.
|
2118 |
|
|
|
2119 |
|
|
@findex if_then_else
|
2120 |
|
|
@item (if_then_else @var{cond} @var{then} @var{else})
|
2121 |
|
|
This is not a comparison operation but is listed here because it is
|
2122 |
|
|
always used in conjunction with a comparison operation. To be
|
2123 |
|
|
precise, @var{cond} is a comparison expression. This expression
|
2124 |
|
|
represents a choice, according to @var{cond}, between the value
|
2125 |
|
|
represented by @var{then} and the one represented by @var{else}.
|
2126 |
|
|
|
2127 |
|
|
On most machines, @code{if_then_else} expressions are valid only
|
2128 |
|
|
to express conditional jumps.
|
2129 |
|
|
|
2130 |
|
|
@findex cond
|
2131 |
|
|
@item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
|
2132 |
|
|
Similar to @code{if_then_else}, but more general. Each of @var{test1},
|
2133 |
|
|
@var{test2}, @dots{} is performed in turn. The result of this expression is
|
2134 |
|
|
the @var{value} corresponding to the first nonzero test, or @var{default} if
|
2135 |
|
|
none of the tests are nonzero expressions.
|
2136 |
|
|
|
2137 |
|
|
This is currently not valid for instruction patterns and is supported only
|
2138 |
|
|
for insn attributes. @xref{Insn Attributes}.
|
2139 |
|
|
@end table
|
2140 |
|
|
|
2141 |
|
|
@node Bit-Fields
|
2142 |
|
|
@section Bit-Fields
|
2143 |
|
|
@cindex bit-fields
|
2144 |
|
|
|
2145 |
|
|
Special expression codes exist to represent bit-field instructions.
|
2146 |
|
|
|
2147 |
|
|
@table @code
|
2148 |
|
|
@findex sign_extract
|
2149 |
|
|
@cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
|
2150 |
|
|
@item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
|
2151 |
|
|
This represents a reference to a sign-extended bit-field contained or
|
2152 |
|
|
starting in @var{loc} (a memory or register reference). The bit-field
|
2153 |
|
|
is @var{size} bits wide and starts at bit @var{pos}. The compilation
|
2154 |
|
|
option @code{BITS_BIG_ENDIAN} says which end of the memory unit
|
2155 |
|
|
@var{pos} counts from.
|
2156 |
|
|
|
2157 |
|
|
If @var{loc} is in memory, its mode must be a single-byte integer mode.
|
2158 |
|
|
If @var{loc} is in a register, the mode to use is specified by the
|
2159 |
|
|
operand of the @code{insv} or @code{extv} pattern
|
2160 |
|
|
(@pxref{Standard Names}) and is usually a full-word integer mode,
|
2161 |
|
|
which is the default if none is specified.
|
2162 |
|
|
|
2163 |
|
|
The mode of @var{pos} is machine-specific and is also specified
|
2164 |
|
|
in the @code{insv} or @code{extv} pattern.
|
2165 |
|
|
|
2166 |
|
|
The mode @var{m} is the same as the mode that would be used for
|
2167 |
|
|
@var{loc} if it were a register.
|
2168 |
|
|
|
2169 |
|
|
A @code{sign_extract} can not appear as an lvalue, or part thereof,
|
2170 |
|
|
in RTL.
|
2171 |
|
|
|
2172 |
|
|
@findex zero_extract
|
2173 |
|
|
@item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
|
2174 |
|
|
Like @code{sign_extract} but refers to an unsigned or zero-extended
|
2175 |
|
|
bit-field. The same sequence of bits are extracted, but they
|
2176 |
|
|
are filled to an entire word with zeros instead of by sign-extension.
|
2177 |
|
|
|
2178 |
|
|
Unlike @code{sign_extract}, this type of expressions can be lvalues
|
2179 |
|
|
in RTL; they may appear on the left side of an assignment, indicating
|
2180 |
|
|
insertion of a value into the specified bit-field.
|
2181 |
|
|
@end table
|
2182 |
|
|
|
2183 |
|
|
@node Vector Operations
|
2184 |
|
|
@section Vector Operations
|
2185 |
|
|
@cindex vector operations
|
2186 |
|
|
|
2187 |
|
|
All normal RTL expressions can be used with vector modes; they are
|
2188 |
|
|
interpreted as operating on each part of the vector independently.
|
2189 |
|
|
Additionally, there are a few new expressions to describe specific vector
|
2190 |
|
|
operations.
|
2191 |
|
|
|
2192 |
|
|
@table @code
|
2193 |
|
|
@findex vec_merge
|
2194 |
|
|
@item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
|
2195 |
|
|
This describes a merge operation between two vectors. The result is a vector
|
2196 |
|
|
of mode @var{m}; its elements are selected from either @var{vec1} or
|
2197 |
|
|
@var{vec2}. Which elements are selected is described by @var{items}, which
|
2198 |
|
|
is a bit mask represented by a @code{const_int}; a zero bit indicates the
|
2199 |
|
|
corresponding element in the result vector is taken from @var{vec2} while
|
2200 |
|
|
a set bit indicates it is taken from @var{vec1}.
|
2201 |
|
|
|
2202 |
|
|
@findex vec_select
|
2203 |
|
|
@item (vec_select:@var{m} @var{vec1} @var{selection})
|
2204 |
|
|
This describes an operation that selects parts of a vector. @var{vec1} is
|
2205 |
|
|
the source vector, @var{selection} is a @code{parallel} that contains a
|
2206 |
|
|
@code{const_int} for each of the subparts of the result vector, giving the
|
2207 |
|
|
number of the source subpart that should be stored into it.
|
2208 |
|
|
|
2209 |
|
|
@findex vec_concat
|
2210 |
|
|
@item (vec_concat:@var{m} @var{vec1} @var{vec2})
|
2211 |
|
|
Describes a vector concat operation. The result is a concatenation of the
|
2212 |
|
|
vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
|
2213 |
|
|
the two inputs.
|
2214 |
|
|
|
2215 |
|
|
@findex vec_duplicate
|
2216 |
|
|
@item (vec_duplicate:@var{m} @var{vec})
|
2217 |
|
|
This operation converts a small vector into a larger one by duplicating the
|
2218 |
|
|
input values. The output vector mode must have the same submodes as the
|
2219 |
|
|
input vector mode, and the number of output parts must be an integer multiple
|
2220 |
|
|
of the number of input parts.
|
2221 |
|
|
|
2222 |
|
|
@end table
|
2223 |
|
|
|
2224 |
|
|
@node Conversions
|
2225 |
|
|
@section Conversions
|
2226 |
|
|
@cindex conversions
|
2227 |
|
|
@cindex machine mode conversions
|
2228 |
|
|
|
2229 |
|
|
All conversions between machine modes must be represented by
|
2230 |
|
|
explicit conversion operations. For example, an expression
|
2231 |
|
|
which is the sum of a byte and a full word cannot be written as
|
2232 |
|
|
@code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
|
2233 |
|
|
operation requires two operands of the same machine mode.
|
2234 |
|
|
Therefore, the byte-sized operand is enclosed in a conversion
|
2235 |
|
|
operation, as in
|
2236 |
|
|
|
2237 |
|
|
@smallexample
|
2238 |
|
|
(plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
|
2239 |
|
|
@end smallexample
|
2240 |
|
|
|
2241 |
|
|
The conversion operation is not a mere placeholder, because there
|
2242 |
|
|
may be more than one way of converting from a given starting mode
|
2243 |
|
|
to the desired final mode. The conversion operation code says how
|
2244 |
|
|
to do it.
|
2245 |
|
|
|
2246 |
|
|
For all conversion operations, @var{x} must not be @code{VOIDmode}
|
2247 |
|
|
because the mode in which to do the conversion would not be known.
|
2248 |
|
|
The conversion must either be done at compile-time or @var{x}
|
2249 |
|
|
must be placed into a register.
|
2250 |
|
|
|
2251 |
|
|
@table @code
|
2252 |
|
|
@findex sign_extend
|
2253 |
|
|
@item (sign_extend:@var{m} @var{x})
|
2254 |
|
|
Represents the result of sign-extending the value @var{x}
|
2255 |
|
|
to machine mode @var{m}. @var{m} must be a fixed-point mode
|
2256 |
|
|
and @var{x} a fixed-point value of a mode narrower than @var{m}.
|
2257 |
|
|
|
2258 |
|
|
@findex zero_extend
|
2259 |
|
|
@item (zero_extend:@var{m} @var{x})
|
2260 |
|
|
Represents the result of zero-extending the value @var{x}
|
2261 |
|
|
to machine mode @var{m}. @var{m} must be a fixed-point mode
|
2262 |
|
|
and @var{x} a fixed-point value of a mode narrower than @var{m}.
|
2263 |
|
|
|
2264 |
|
|
@findex float_extend
|
2265 |
|
|
@item (float_extend:@var{m} @var{x})
|
2266 |
|
|
Represents the result of extending the value @var{x}
|
2267 |
|
|
to machine mode @var{m}. @var{m} must be a floating point mode
|
2268 |
|
|
and @var{x} a floating point value of a mode narrower than @var{m}.
|
2269 |
|
|
|
2270 |
|
|
@findex truncate
|
2271 |
|
|
@item (truncate:@var{m} @var{x})
|
2272 |
|
|
Represents the result of truncating the value @var{x}
|
2273 |
|
|
to machine mode @var{m}. @var{m} must be a fixed-point mode
|
2274 |
|
|
and @var{x} a fixed-point value of a mode wider than @var{m}.
|
2275 |
|
|
|
2276 |
|
|
@findex ss_truncate
|
2277 |
|
|
@item (ss_truncate:@var{m} @var{x})
|
2278 |
|
|
Represents the result of truncating the value @var{x}
|
2279 |
|
|
to machine mode @var{m}, using signed saturation in the case of
|
2280 |
|
|
overflow. Both @var{m} and the mode of @var{x} must be fixed-point
|
2281 |
|
|
modes.
|
2282 |
|
|
|
2283 |
|
|
@findex us_truncate
|
2284 |
|
|
@item (us_truncate:@var{m} @var{x})
|
2285 |
|
|
Represents the result of truncating the value @var{x}
|
2286 |
|
|
to machine mode @var{m}, using unsigned saturation in the case of
|
2287 |
|
|
overflow. Both @var{m} and the mode of @var{x} must be fixed-point
|
2288 |
|
|
modes.
|
2289 |
|
|
|
2290 |
|
|
@findex float_truncate
|
2291 |
|
|
@item (float_truncate:@var{m} @var{x})
|
2292 |
|
|
Represents the result of truncating the value @var{x}
|
2293 |
|
|
to machine mode @var{m}. @var{m} must be a floating point mode
|
2294 |
|
|
and @var{x} a floating point value of a mode wider than @var{m}.
|
2295 |
|
|
|
2296 |
|
|
@findex float
|
2297 |
|
|
@item (float:@var{m} @var{x})
|
2298 |
|
|
Represents the result of converting fixed point value @var{x},
|
2299 |
|
|
regarded as signed, to floating point mode @var{m}.
|
2300 |
|
|
|
2301 |
|
|
@findex unsigned_float
|
2302 |
|
|
@item (unsigned_float:@var{m} @var{x})
|
2303 |
|
|
Represents the result of converting fixed point value @var{x},
|
2304 |
|
|
regarded as unsigned, to floating point mode @var{m}.
|
2305 |
|
|
|
2306 |
|
|
@findex fix
|
2307 |
|
|
@item (fix:@var{m} @var{x})
|
2308 |
|
|
When @var{m} is a fixed point mode, represents the result of
|
2309 |
|
|
converting floating point value @var{x} to mode @var{m}, regarded as
|
2310 |
|
|
signed. How rounding is done is not specified, so this operation may
|
2311 |
|
|
be used validly in compiling C code only for integer-valued operands.
|
2312 |
|
|
|
2313 |
|
|
@findex unsigned_fix
|
2314 |
|
|
@item (unsigned_fix:@var{m} @var{x})
|
2315 |
|
|
Represents the result of converting floating point value @var{x} to
|
2316 |
|
|
fixed point mode @var{m}, regarded as unsigned. How rounding is done
|
2317 |
|
|
is not specified.
|
2318 |
|
|
|
2319 |
|
|
@findex fix
|
2320 |
|
|
@item (fix:@var{m} @var{x})
|
2321 |
|
|
When @var{m} is a floating point mode, represents the result of
|
2322 |
|
|
converting floating point value @var{x} (valid for mode @var{m}) to an
|
2323 |
|
|
integer, still represented in floating point mode @var{m}, by rounding
|
2324 |
|
|
towards zero.
|
2325 |
|
|
@end table
|
2326 |
|
|
|
2327 |
|
|
@node RTL Declarations
|
2328 |
|
|
@section Declarations
|
2329 |
|
|
@cindex RTL declarations
|
2330 |
|
|
@cindex declarations, RTL
|
2331 |
|
|
|
2332 |
|
|
Declaration expression codes do not represent arithmetic operations
|
2333 |
|
|
but rather state assertions about their operands.
|
2334 |
|
|
|
2335 |
|
|
@table @code
|
2336 |
|
|
@findex strict_low_part
|
2337 |
|
|
@cindex @code{subreg}, in @code{strict_low_part}
|
2338 |
|
|
@item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
|
2339 |
|
|
This expression code is used in only one context: as the destination operand of a
|
2340 |
|
|
@code{set} expression. In addition, the operand of this expression
|
2341 |
|
|
must be a non-paradoxical @code{subreg} expression.
|
2342 |
|
|
|
2343 |
|
|
The presence of @code{strict_low_part} says that the part of the
|
2344 |
|
|
register which is meaningful in mode @var{n}, but is not part of
|
2345 |
|
|
mode @var{m}, is not to be altered. Normally, an assignment to such
|
2346 |
|
|
a subreg is allowed to have undefined effects on the rest of the
|
2347 |
|
|
register when @var{m} is less than a word.
|
2348 |
|
|
@end table
|
2349 |
|
|
|
2350 |
|
|
@node Side Effects
|
2351 |
|
|
@section Side Effect Expressions
|
2352 |
|
|
@cindex RTL side effect expressions
|
2353 |
|
|
|
2354 |
|
|
The expression codes described so far represent values, not actions.
|
2355 |
|
|
But machine instructions never produce values; they are meaningful
|
2356 |
|
|
only for their side effects on the state of the machine. Special
|
2357 |
|
|
expression codes are used to represent side effects.
|
2358 |
|
|
|
2359 |
|
|
The body of an instruction is always one of these side effect codes;
|
2360 |
|
|
the codes described above, which represent values, appear only as
|
2361 |
|
|
the operands of these.
|
2362 |
|
|
|
2363 |
|
|
@table @code
|
2364 |
|
|
@findex set
|
2365 |
|
|
@item (set @var{lval} @var{x})
|
2366 |
|
|
Represents the action of storing the value of @var{x} into the place
|
2367 |
|
|
represented by @var{lval}. @var{lval} must be an expression
|
2368 |
|
|
representing a place that can be stored in: @code{reg} (or @code{subreg},
|
2369 |
|
|
@code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
|
2370 |
|
|
@code{parallel}, or @code{cc0}.
|
2371 |
|
|
|
2372 |
|
|
If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
|
2373 |
|
|
machine mode; then @var{x} must be valid for that mode.
|
2374 |
|
|
|
2375 |
|
|
If @var{lval} is a @code{reg} whose machine mode is less than the full
|
2376 |
|
|
width of the register, then it means that the part of the register
|
2377 |
|
|
specified by the machine mode is given the specified value and the
|
2378 |
|
|
rest of the register receives an undefined value. Likewise, if
|
2379 |
|
|
@var{lval} is a @code{subreg} whose machine mode is narrower than
|
2380 |
|
|
the mode of the register, the rest of the register can be changed in
|
2381 |
|
|
an undefined way.
|
2382 |
|
|
|
2383 |
|
|
If @var{lval} is a @code{strict_low_part} of a subreg, then the part
|
2384 |
|
|
of the register specified by the machine mode of the @code{subreg} is
|
2385 |
|
|
given the value @var{x} and the rest of the register is not changed.
|
2386 |
|
|
|
2387 |
|
|
If @var{lval} is a @code{zero_extract}, then the referenced part of
|
2388 |
|
|
the bit-field (a memory or register reference) specified by the
|
2389 |
|
|
@code{zero_extract} is given the value @var{x} and the rest of the
|
2390 |
|
|
bit-field is not changed. Note that @code{sign_extract} can not
|
2391 |
|
|
appear in @var{lval}.
|
2392 |
|
|
|
2393 |
|
|
If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
|
2394 |
|
|
be either a @code{compare} expression or a value that may have any mode.
|
2395 |
|
|
The latter case represents a ``test'' instruction. The expression
|
2396 |
|
|
@code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
|
2397 |
|
|
@code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
|
2398 |
|
|
Use the former expression to save space during the compilation.
|
2399 |
|
|
|
2400 |
|
|
If @var{lval} is a @code{parallel}, it is used to represent the case of
|
2401 |
|
|
a function returning a structure in multiple registers. Each element
|
2402 |
|
|
of the @code{parallel} is an @code{expr_list} whose first operand is a
|
2403 |
|
|
@code{reg} and whose second operand is a @code{const_int} representing the
|
2404 |
|
|
offset (in bytes) into the structure at which the data in that register
|
2405 |
|
|
corresponds. The first element may be null to indicate that the structure
|
2406 |
|
|
is also passed partly in memory.
|
2407 |
|
|
|
2408 |
|
|
@cindex jump instructions and @code{set}
|
2409 |
|
|
@cindex @code{if_then_else} usage
|
2410 |
|
|
If @var{lval} is @code{(pc)}, we have a jump instruction, and the
|
2411 |
|
|
possibilities for @var{x} are very limited. It may be a
|
2412 |
|
|
@code{label_ref} expression (unconditional jump). It may be an
|
2413 |
|
|
@code{if_then_else} (conditional jump), in which case either the
|
2414 |
|
|
second or the third operand must be @code{(pc)} (for the case which
|
2415 |
|
|
does not jump) and the other of the two must be a @code{label_ref}
|
2416 |
|
|
(for the case which does jump). @var{x} may also be a @code{mem} or
|
2417 |
|
|
@code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
|
2418 |
|
|
@code{mem}; these unusual patterns are used to represent jumps through
|
2419 |
|
|
branch tables.
|
2420 |
|
|
|
2421 |
|
|
If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
|
2422 |
|
|
@var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
|
2423 |
|
|
valid for the mode of @var{lval}.
|
2424 |
|
|
|
2425 |
|
|
@findex SET_DEST
|
2426 |
|
|
@findex SET_SRC
|
2427 |
|
|
@var{lval} is customarily accessed with the @code{SET_DEST} macro and
|
2428 |
|
|
@var{x} with the @code{SET_SRC} macro.
|
2429 |
|
|
|
2430 |
|
|
@findex return
|
2431 |
|
|
@item (return)
|
2432 |
|
|
As the sole expression in a pattern, represents a return from the
|
2433 |
|
|
current function, on machines where this can be done with one
|
2434 |
|
|
instruction, such as VAXen. On machines where a multi-instruction
|
2435 |
|
|
``epilogue'' must be executed in order to return from the function,
|
2436 |
|
|
returning is done by jumping to a label which precedes the epilogue, and
|
2437 |
|
|
the @code{return} expression code is never used.
|
2438 |
|
|
|
2439 |
|
|
Inside an @code{if_then_else} expression, represents the value to be
|
2440 |
|
|
placed in @code{pc} to return to the caller.
|
2441 |
|
|
|
2442 |
|
|
Note that an insn pattern of @code{(return)} is logically equivalent to
|
2443 |
|
|
@code{(set (pc) (return))}, but the latter form is never used.
|
2444 |
|
|
|
2445 |
|
|
@findex call
|
2446 |
|
|
@item (call @var{function} @var{nargs})
|
2447 |
|
|
Represents a function call. @var{function} is a @code{mem} expression
|
2448 |
|
|
whose address is the address of the function to be called.
|
2449 |
|
|
@var{nargs} is an expression which can be used for two purposes: on
|
2450 |
|
|
some machines it represents the number of bytes of stack argument; on
|
2451 |
|
|
others, it represents the number of argument registers.
|
2452 |
|
|
|
2453 |
|
|
Each machine has a standard machine mode which @var{function} must
|
2454 |
|
|
have. The machine description defines macro @code{FUNCTION_MODE} to
|
2455 |
|
|
expand into the requisite mode name. The purpose of this mode is to
|
2456 |
|
|
specify what kind of addressing is allowed, on machines where the
|
2457 |
|
|
allowed kinds of addressing depend on the machine mode being
|
2458 |
|
|
addressed.
|
2459 |
|
|
|
2460 |
|
|
@findex clobber
|
2461 |
|
|
@item (clobber @var{x})
|
2462 |
|
|
Represents the storing or possible storing of an unpredictable,
|
2463 |
|
|
undescribed value into @var{x}, which must be a @code{reg},
|
2464 |
|
|
@code{scratch}, @code{parallel} or @code{mem} expression.
|
2465 |
|
|
|
2466 |
|
|
One place this is used is in string instructions that store standard
|
2467 |
|
|
values into particular hard registers. It may not be worth the
|
2468 |
|
|
trouble to describe the values that are stored, but it is essential to
|
2469 |
|
|
inform the compiler that the registers will be altered, lest it
|
2470 |
|
|
attempt to keep data in them across the string instruction.
|
2471 |
|
|
|
2472 |
|
|
If @var{x} is @code{(mem:BLK (const_int 0))} or
|
2473 |
|
|
@code{(mem:BLK (scratch))}, it means that all memory
|
2474 |
|
|
locations must be presumed clobbered. If @var{x} is a @code{parallel},
|
2475 |
|
|
it has the same meaning as a @code{parallel} in a @code{set} expression.
|
2476 |
|
|
|
2477 |
|
|
Note that the machine description classifies certain hard registers as
|
2478 |
|
|
``call-clobbered''. All function call instructions are assumed by
|
2479 |
|
|
default to clobber these registers, so there is no need to use
|
2480 |
|
|
@code{clobber} expressions to indicate this fact. Also, each function
|
2481 |
|
|
call is assumed to have the potential to alter any memory location,
|
2482 |
|
|
unless the function is declared @code{const}.
|
2483 |
|
|
|
2484 |
|
|
If the last group of expressions in a @code{parallel} are each a
|
2485 |
|
|
@code{clobber} expression whose arguments are @code{reg} or
|
2486 |
|
|
@code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
|
2487 |
|
|
phase can add the appropriate @code{clobber} expressions to an insn it
|
2488 |
|
|
has constructed when doing so will cause a pattern to be matched.
|
2489 |
|
|
|
2490 |
|
|
This feature can be used, for example, on a machine that whose multiply
|
2491 |
|
|
and add instructions don't use an MQ register but which has an
|
2492 |
|
|
add-accumulate instruction that does clobber the MQ register. Similarly,
|
2493 |
|
|
a combined instruction might require a temporary register while the
|
2494 |
|
|
constituent instructions might not.
|
2495 |
|
|
|
2496 |
|
|
When a @code{clobber} expression for a register appears inside a
|
2497 |
|
|
@code{parallel} with other side effects, the register allocator
|
2498 |
|
|
guarantees that the register is unoccupied both before and after that
|
2499 |
|
|
insn. However, the reload phase may allocate a register used for one of
|
2500 |
|
|
the inputs unless the @samp{&} constraint is specified for the selected
|
2501 |
|
|
alternative (@pxref{Modifiers}). You can clobber either a specific hard
|
2502 |
|
|
register, a pseudo register, or a @code{scratch} expression; in the
|
2503 |
|
|
latter two cases, GCC will allocate a hard register that is available
|
2504 |
|
|
there for use as a temporary.
|
2505 |
|
|
|
2506 |
|
|
For instructions that require a temporary register, you should use
|
2507 |
|
|
@code{scratch} instead of a pseudo-register because this will allow the
|
2508 |
|
|
combiner phase to add the @code{clobber} when required. You do this by
|
2509 |
|
|
coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
|
2510 |
|
|
clobber a pseudo register, use one which appears nowhere else---generate
|
2511 |
|
|
a new one each time. Otherwise, you may confuse CSE@.
|
2512 |
|
|
|
2513 |
|
|
There is one other known use for clobbering a pseudo register in a
|
2514 |
|
|
@code{parallel}: when one of the input operands of the insn is also
|
2515 |
|
|
clobbered by the insn. In this case, using the same pseudo register in
|
2516 |
|
|
the clobber and elsewhere in the insn produces the expected results.
|
2517 |
|
|
|
2518 |
|
|
@findex use
|
2519 |
|
|
@item (use @var{x})
|
2520 |
|
|
Represents the use of the value of @var{x}. It indicates that the
|
2521 |
|
|
value in @var{x} at this point in the program is needed, even though
|
2522 |
|
|
it may not be apparent why this is so. Therefore, the compiler will
|
2523 |
|
|
not attempt to delete previous instructions whose only effect is to
|
2524 |
|
|
store a value in @var{x}. @var{x} must be a @code{reg} expression.
|
2525 |
|
|
|
2526 |
|
|
In some situations, it may be tempting to add a @code{use} of a
|
2527 |
|
|
register in a @code{parallel} to describe a situation where the value
|
2528 |
|
|
of a special register will modify the behavior of the instruction.
|
2529 |
|
|
An hypothetical example might be a pattern for an addition that can
|
2530 |
|
|
either wrap around or use saturating addition depending on the value
|
2531 |
|
|
of a special control register:
|
2532 |
|
|
|
2533 |
|
|
@smallexample
|
2534 |
|
|
(parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
|
2535 |
|
|
(reg:SI 4)] 0))
|
2536 |
|
|
(use (reg:SI 1))])
|
2537 |
|
|
@end smallexample
|
2538 |
|
|
|
2539 |
|
|
@noindent
|
2540 |
|
|
|
2541 |
|
|
This will not work, several of the optimizers only look at expressions
|
2542 |
|
|
locally; it is very likely that if you have multiple insns with
|
2543 |
|
|
identical inputs to the @code{unspec}, they will be optimized away even
|
2544 |
|
|
if register 1 changes in between.
|
2545 |
|
|
|
2546 |
|
|
This means that @code{use} can @emph{only} be used to describe
|
2547 |
|
|
that the register is live. You should think twice before adding
|
2548 |
|
|
@code{use} statements, more often you will want to use @code{unspec}
|
2549 |
|
|
instead. The @code{use} RTX is most commonly useful to describe that
|
2550 |
|
|
a fixed register is implicitly used in an insn. It is also safe to use
|
2551 |
|
|
in patterns where the compiler knows for other reasons that the result
|
2552 |
|
|
of the whole pattern is variable, such as @samp{movmem@var{m}} or
|
2553 |
|
|
@samp{call} patterns.
|
2554 |
|
|
|
2555 |
|
|
During the reload phase, an insn that has a @code{use} as pattern
|
2556 |
|
|
can carry a reg_equal note. These @code{use} insns will be deleted
|
2557 |
|
|
before the reload phase exits.
|
2558 |
|
|
|
2559 |
|
|
During the delayed branch scheduling phase, @var{x} may be an insn.
|
2560 |
|
|
This indicates that @var{x} previously was located at this place in the
|
2561 |
|
|
code and its data dependencies need to be taken into account. These
|
2562 |
|
|
@code{use} insns will be deleted before the delayed branch scheduling
|
2563 |
|
|
phase exits.
|
2564 |
|
|
|
2565 |
|
|
@findex parallel
|
2566 |
|
|
@item (parallel [@var{x0} @var{x1} @dots{}])
|
2567 |
|
|
Represents several side effects performed in parallel. The square
|
2568 |
|
|
brackets stand for a vector; the operand of @code{parallel} is a
|
2569 |
|
|
vector of expressions. @var{x0}, @var{x1} and so on are individual
|
2570 |
|
|
side effect expressions---expressions of code @code{set}, @code{call},
|
2571 |
|
|
@code{return}, @code{clobber} or @code{use}.
|
2572 |
|
|
|
2573 |
|
|
``In parallel'' means that first all the values used in the individual
|
2574 |
|
|
side-effects are computed, and second all the actual side-effects are
|
2575 |
|
|
performed. For example,
|
2576 |
|
|
|
2577 |
|
|
@smallexample
|
2578 |
|
|
(parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
|
2579 |
|
|
(set (mem:SI (reg:SI 1)) (reg:SI 1))])
|
2580 |
|
|
@end smallexample
|
2581 |
|
|
|
2582 |
|
|
@noindent
|
2583 |
|
|
says unambiguously that the values of hard register 1 and the memory
|
2584 |
|
|
location addressed by it are interchanged. In both places where
|
2585 |
|
|
@code{(reg:SI 1)} appears as a memory address it refers to the value
|
2586 |
|
|
in register 1 @emph{before} the execution of the insn.
|
2587 |
|
|
|
2588 |
|
|
It follows that it is @emph{incorrect} to use @code{parallel} and
|
2589 |
|
|
expect the result of one @code{set} to be available for the next one.
|
2590 |
|
|
For example, people sometimes attempt to represent a jump-if-zero
|
2591 |
|
|
instruction this way:
|
2592 |
|
|
|
2593 |
|
|
@smallexample
|
2594 |
|
|
(parallel [(set (cc0) (reg:SI 34))
|
2595 |
|
|
(set (pc) (if_then_else
|
2596 |
|
|
(eq (cc0) (const_int 0))
|
2597 |
|
|
(label_ref @dots{})
|
2598 |
|
|
(pc)))])
|
2599 |
|
|
@end smallexample
|
2600 |
|
|
|
2601 |
|
|
@noindent
|
2602 |
|
|
But this is incorrect, because it says that the jump condition depends
|
2603 |
|
|
on the condition code value @emph{before} this instruction, not on the
|
2604 |
|
|
new value that is set by this instruction.
|
2605 |
|
|
|
2606 |
|
|
@cindex peephole optimization, RTL representation
|
2607 |
|
|
Peephole optimization, which takes place together with final assembly
|
2608 |
|
|
code output, can produce insns whose patterns consist of a @code{parallel}
|
2609 |
|
|
whose elements are the operands needed to output the resulting
|
2610 |
|
|
assembler code---often @code{reg}, @code{mem} or constant expressions.
|
2611 |
|
|
This would not be well-formed RTL at any other stage in compilation,
|
2612 |
|
|
but it is ok then because no further optimization remains to be done.
|
2613 |
|
|
However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
|
2614 |
|
|
any, must deal with such insns if you define any peephole optimizations.
|
2615 |
|
|
|
2616 |
|
|
@findex cond_exec
|
2617 |
|
|
@item (cond_exec [@var{cond} @var{expr}])
|
2618 |
|
|
Represents a conditionally executed expression. The @var{expr} is
|
2619 |
|
|
executed only if the @var{cond} is nonzero. The @var{cond} expression
|
2620 |
|
|
must not have side-effects, but the @var{expr} may very well have
|
2621 |
|
|
side-effects.
|
2622 |
|
|
|
2623 |
|
|
@findex sequence
|
2624 |
|
|
@item (sequence [@var{insns} @dots{}])
|
2625 |
|
|
Represents a sequence of insns. Each of the @var{insns} that appears
|
2626 |
|
|
in the vector is suitable for appearing in the chain of insns, so it
|
2627 |
|
|
must be an @code{insn}, @code{jump_insn}, @code{call_insn},
|
2628 |
|
|
@code{code_label}, @code{barrier} or @code{note}.
|
2629 |
|
|
|
2630 |
|
|
A @code{sequence} RTX is never placed in an actual insn during RTL
|
2631 |
|
|
generation. It represents the sequence of insns that result from a
|
2632 |
|
|
@code{define_expand} @emph{before} those insns are passed to
|
2633 |
|
|
@code{emit_insn} to insert them in the chain of insns. When actually
|
2634 |
|
|
inserted, the individual sub-insns are separated out and the
|
2635 |
|
|
@code{sequence} is forgotten.
|
2636 |
|
|
|
2637 |
|
|
After delay-slot scheduling is completed, an insn and all the insns that
|
2638 |
|
|
reside in its delay slots are grouped together into a @code{sequence}.
|
2639 |
|
|
The insn requiring the delay slot is the first insn in the vector;
|
2640 |
|
|
subsequent insns are to be placed in the delay slot.
|
2641 |
|
|
|
2642 |
|
|
@code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
|
2643 |
|
|
indicate that a branch insn should be used that will conditionally annul
|
2644 |
|
|
the effect of the insns in the delay slots. In such a case,
|
2645 |
|
|
@code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
|
2646 |
|
|
the branch and should be executed only if the branch is taken; otherwise
|
2647 |
|
|
the insn should be executed only if the branch is not taken.
|
2648 |
|
|
@xref{Delay Slots}.
|
2649 |
|
|
@end table
|
2650 |
|
|
|
2651 |
|
|
These expression codes appear in place of a side effect, as the body of
|
2652 |
|
|
an insn, though strictly speaking they do not always describe side
|
2653 |
|
|
effects as such:
|
2654 |
|
|
|
2655 |
|
|
@table @code
|
2656 |
|
|
@findex asm_input
|
2657 |
|
|
@item (asm_input @var{s})
|
2658 |
|
|
Represents literal assembler code as described by the string @var{s}.
|
2659 |
|
|
|
2660 |
|
|
@findex unspec
|
2661 |
|
|
@findex unspec_volatile
|
2662 |
|
|
@item (unspec [@var{operands} @dots{}] @var{index})
|
2663 |
|
|
@itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
|
2664 |
|
|
Represents a machine-specific operation on @var{operands}. @var{index}
|
2665 |
|
|
selects between multiple machine-specific operations.
|
2666 |
|
|
@code{unspec_volatile} is used for volatile operations and operations
|
2667 |
|
|
that may trap; @code{unspec} is used for other operations.
|
2668 |
|
|
|
2669 |
|
|
These codes may appear inside a @code{pattern} of an
|
2670 |
|
|
insn, inside a @code{parallel}, or inside an expression.
|
2671 |
|
|
|
2672 |
|
|
@findex addr_vec
|
2673 |
|
|
@item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
|
2674 |
|
|
Represents a table of jump addresses. The vector elements @var{lr0},
|
2675 |
|
|
etc., are @code{label_ref} expressions. The mode @var{m} specifies
|
2676 |
|
|
how much space is given to each address; normally @var{m} would be
|
2677 |
|
|
@code{Pmode}.
|
2678 |
|
|
|
2679 |
|
|
@findex addr_diff_vec
|
2680 |
|
|
@item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}] @var{min} @var{max} @var{flags})
|
2681 |
|
|
Represents a table of jump addresses expressed as offsets from
|
2682 |
|
|
@var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
|
2683 |
|
|
expressions and so is @var{base}. The mode @var{m} specifies how much
|
2684 |
|
|
space is given to each address-difference. @var{min} and @var{max}
|
2685 |
|
|
are set up by branch shortening and hold a label with a minimum and a
|
2686 |
|
|
maximum address, respectively. @var{flags} indicates the relative
|
2687 |
|
|
position of @var{base}, @var{min} and @var{max} to the containing insn
|
2688 |
|
|
and of @var{min} and @var{max} to @var{base}. See rtl.def for details.
|
2689 |
|
|
|
2690 |
|
|
@findex prefetch
|
2691 |
|
|
@item (prefetch:@var{m} @var{addr} @var{rw} @var{locality})
|
2692 |
|
|
Represents prefetch of memory at address @var{addr}.
|
2693 |
|
|
Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise;
|
2694 |
|
|
targets that do not support write prefetches should treat this as a normal
|
2695 |
|
|
prefetch.
|
2696 |
|
|
Operand @var{locality} specifies the amount of temporal locality; 0 if there
|
2697 |
|
|
is none or 1, 2, or 3 for increasing levels of temporal locality;
|
2698 |
|
|
targets that do not support locality hints should ignore this.
|
2699 |
|
|
|
2700 |
|
|
This insn is used to minimize cache-miss latency by moving data into a
|
2701 |
|
|
cache before it is accessed. It should use only non-faulting data prefetch
|
2702 |
|
|
instructions.
|
2703 |
|
|
@end table
|
2704 |
|
|
|
2705 |
|
|
@node Incdec
|
2706 |
|
|
@section Embedded Side-Effects on Addresses
|
2707 |
|
|
@cindex RTL preincrement
|
2708 |
|
|
@cindex RTL postincrement
|
2709 |
|
|
@cindex RTL predecrement
|
2710 |
|
|
@cindex RTL postdecrement
|
2711 |
|
|
|
2712 |
|
|
Six special side-effect expression codes appear as memory addresses.
|
2713 |
|
|
|
2714 |
|
|
@table @code
|
2715 |
|
|
@findex pre_dec
|
2716 |
|
|
@item (pre_dec:@var{m} @var{x})
|
2717 |
|
|
Represents the side effect of decrementing @var{x} by a standard
|
2718 |
|
|
amount and represents also the value that @var{x} has after being
|
2719 |
|
|
decremented. @var{x} must be a @code{reg} or @code{mem}, but most
|
2720 |
|
|
machines allow only a @code{reg}. @var{m} must be the machine mode
|
2721 |
|
|
for pointers on the machine in use. The amount @var{x} is decremented
|
2722 |
|
|
by is the length in bytes of the machine mode of the containing memory
|
2723 |
|
|
reference of which this expression serves as the address. Here is an
|
2724 |
|
|
example of its use:
|
2725 |
|
|
|
2726 |
|
|
@smallexample
|
2727 |
|
|
(mem:DF (pre_dec:SI (reg:SI 39)))
|
2728 |
|
|
@end smallexample
|
2729 |
|
|
|
2730 |
|
|
@noindent
|
2731 |
|
|
This says to decrement pseudo register 39 by the length of a @code{DFmode}
|
2732 |
|
|
value and use the result to address a @code{DFmode} value.
|
2733 |
|
|
|
2734 |
|
|
@findex pre_inc
|
2735 |
|
|
@item (pre_inc:@var{m} @var{x})
|
2736 |
|
|
Similar, but specifies incrementing @var{x} instead of decrementing it.
|
2737 |
|
|
|
2738 |
|
|
@findex post_dec
|
2739 |
|
|
@item (post_dec:@var{m} @var{x})
|
2740 |
|
|
Represents the same side effect as @code{pre_dec} but a different
|
2741 |
|
|
value. The value represented here is the value @var{x} has @i{before}
|
2742 |
|
|
being decremented.
|
2743 |
|
|
|
2744 |
|
|
@findex post_inc
|
2745 |
|
|
@item (post_inc:@var{m} @var{x})
|
2746 |
|
|
Similar, but specifies incrementing @var{x} instead of decrementing it.
|
2747 |
|
|
|
2748 |
|
|
@findex post_modify
|
2749 |
|
|
@item (post_modify:@var{m} @var{x} @var{y})
|
2750 |
|
|
|
2751 |
|
|
Represents the side effect of setting @var{x} to @var{y} and
|
2752 |
|
|
represents @var{x} before @var{x} is modified. @var{x} must be a
|
2753 |
|
|
@code{reg} or @code{mem}, but most machines allow only a @code{reg}.
|
2754 |
|
|
@var{m} must be the machine mode for pointers on the machine in use.
|
2755 |
|
|
|
2756 |
|
|
The expression @var{y} must be one of three forms:
|
2757 |
|
|
@table @code
|
2758 |
|
|
@code{(plus:@var{m} @var{x} @var{z})},
|
2759 |
|
|
@code{(minus:@var{m} @var{x} @var{z})}, or
|
2760 |
|
|
@code{(plus:@var{m} @var{x} @var{i})},
|
2761 |
|
|
@end table
|
2762 |
|
|
where @var{z} is an index register and @var{i} is a constant.
|
2763 |
|
|
|
2764 |
|
|
Here is an example of its use:
|
2765 |
|
|
|
2766 |
|
|
@smallexample
|
2767 |
|
|
(mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
|
2768 |
|
|
(reg:SI 48))))
|
2769 |
|
|
@end smallexample
|
2770 |
|
|
|
2771 |
|
|
This says to modify pseudo register 42 by adding the contents of pseudo
|
2772 |
|
|
register 48 to it, after the use of what ever 42 points to.
|
2773 |
|
|
|
2774 |
|
|
@findex pre_modify
|
2775 |
|
|
@item (pre_modify:@var{m} @var{x} @var{expr})
|
2776 |
|
|
Similar except side effects happen before the use.
|
2777 |
|
|
@end table
|
2778 |
|
|
|
2779 |
|
|
These embedded side effect expressions must be used with care. Instruction
|
2780 |
|
|
patterns may not use them. Until the @samp{flow} pass of the compiler,
|
2781 |
|
|
they may occur only to represent pushes onto the stack. The @samp{flow}
|
2782 |
|
|
pass finds cases where registers are incremented or decremented in one
|
2783 |
|
|
instruction and used as an address shortly before or after; these cases are
|
2784 |
|
|
then transformed to use pre- or post-increment or -decrement.
|
2785 |
|
|
|
2786 |
|
|
If a register used as the operand of these expressions is used in
|
2787 |
|
|
another address in an insn, the original value of the register is used.
|
2788 |
|
|
Uses of the register outside of an address are not permitted within the
|
2789 |
|
|
same insn as a use in an embedded side effect expression because such
|
2790 |
|
|
insns behave differently on different machines and hence must be treated
|
2791 |
|
|
as ambiguous and disallowed.
|
2792 |
|
|
|
2793 |
|
|
An instruction that can be represented with an embedded side effect
|
2794 |
|
|
could also be represented using @code{parallel} containing an additional
|
2795 |
|
|
@code{set} to describe how the address register is altered. This is not
|
2796 |
|
|
done because machines that allow these operations at all typically
|
2797 |
|
|
allow them wherever a memory address is called for. Describing them as
|
2798 |
|
|
additional parallel stores would require doubling the number of entries
|
2799 |
|
|
in the machine description.
|
2800 |
|
|
|
2801 |
|
|
@node Assembler
|
2802 |
|
|
@section Assembler Instructions as Expressions
|
2803 |
|
|
@cindex assembler instructions in RTL
|
2804 |
|
|
|
2805 |
|
|
@cindex @code{asm_operands}, usage
|
2806 |
|
|
The RTX code @code{asm_operands} represents a value produced by a
|
2807 |
|
|
user-specified assembler instruction. It is used to represent
|
2808 |
|
|
an @code{asm} statement with arguments. An @code{asm} statement with
|
2809 |
|
|
a single output operand, like this:
|
2810 |
|
|
|
2811 |
|
|
@smallexample
|
2812 |
|
|
asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
|
2813 |
|
|
@end smallexample
|
2814 |
|
|
|
2815 |
|
|
@noindent
|
2816 |
|
|
is represented using a single @code{asm_operands} RTX which represents
|
2817 |
|
|
the value that is stored in @code{outputvar}:
|
2818 |
|
|
|
2819 |
|
|
@smallexample
|
2820 |
|
|
(set @var{rtx-for-outputvar}
|
2821 |
|
|
(asm_operands "foo %1,%2,%0" "a" 0
|
2822 |
|
|
[@var{rtx-for-addition-result} @var{rtx-for-*z}]
|
2823 |
|
|
[(asm_input:@var{m1} "g")
|
2824 |
|
|
(asm_input:@var{m2} "di")]))
|
2825 |
|
|
@end smallexample
|
2826 |
|
|
|
2827 |
|
|
@noindent
|
2828 |
|
|
Here the operands of the @code{asm_operands} RTX are the assembler
|
2829 |
|
|
template string, the output-operand's constraint, the index-number of the
|
2830 |
|
|
output operand among the output operands specified, a vector of input
|
2831 |
|
|
operand RTX's, and a vector of input-operand modes and constraints. The
|
2832 |
|
|
mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
|
2833 |
|
|
@code{*z}.
|
2834 |
|
|
|
2835 |
|
|
When an @code{asm} statement has multiple output values, its insn has
|
2836 |
|
|
several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
|
2837 |
|
|
contains a @code{asm_operands}; all of these share the same assembler
|
2838 |
|
|
template and vectors, but each contains the constraint for the respective
|
2839 |
|
|
output operand. They are also distinguished by the output-operand index
|
2840 |
|
|
number, which is 0, 1, @dots{} for successive output operands.
|
2841 |
|
|
|
2842 |
|
|
@node Insns
|
2843 |
|
|
@section Insns
|
2844 |
|
|
@cindex insns
|
2845 |
|
|
|
2846 |
|
|
The RTL representation of the code for a function is a doubly-linked
|
2847 |
|
|
chain of objects called @dfn{insns}. Insns are expressions with
|
2848 |
|
|
special codes that are used for no other purpose. Some insns are
|
2849 |
|
|
actual instructions; others represent dispatch tables for @code{switch}
|
2850 |
|
|
statements; others represent labels to jump to or various sorts of
|
2851 |
|
|
declarative information.
|
2852 |
|
|
|
2853 |
|
|
In addition to its own specific data, each insn must have a unique
|
2854 |
|
|
id-number that distinguishes it from all other insns in the current
|
2855 |
|
|
function (after delayed branch scheduling, copies of an insn with the
|
2856 |
|
|
same id-number may be present in multiple places in a function, but
|
2857 |
|
|
these copies will always be identical and will only appear inside a
|
2858 |
|
|
@code{sequence}), and chain pointers to the preceding and following
|
2859 |
|
|
insns. These three fields occupy the same position in every insn,
|
2860 |
|
|
independent of the expression code of the insn. They could be accessed
|
2861 |
|
|
with @code{XEXP} and @code{XINT}, but instead three special macros are
|
2862 |
|
|
always used:
|
2863 |
|
|
|
2864 |
|
|
@table @code
|
2865 |
|
|
@findex INSN_UID
|
2866 |
|
|
@item INSN_UID (@var{i})
|
2867 |
|
|
Accesses the unique id of insn @var{i}.
|
2868 |
|
|
|
2869 |
|
|
@findex PREV_INSN
|
2870 |
|
|
@item PREV_INSN (@var{i})
|
2871 |
|
|
Accesses the chain pointer to the insn preceding @var{i}.
|
2872 |
|
|
If @var{i} is the first insn, this is a null pointer.
|
2873 |
|
|
|
2874 |
|
|
@findex NEXT_INSN
|
2875 |
|
|
@item NEXT_INSN (@var{i})
|
2876 |
|
|
Accesses the chain pointer to the insn following @var{i}.
|
2877 |
|
|
If @var{i} is the last insn, this is a null pointer.
|
2878 |
|
|
@end table
|
2879 |
|
|
|
2880 |
|
|
@findex get_insns
|
2881 |
|
|
@findex get_last_insn
|
2882 |
|
|
The first insn in the chain is obtained by calling @code{get_insns}; the
|
2883 |
|
|
last insn is the result of calling @code{get_last_insn}. Within the
|
2884 |
|
|
chain delimited by these insns, the @code{NEXT_INSN} and
|
2885 |
|
|
@code{PREV_INSN} pointers must always correspond: if @var{insn} is not
|
2886 |
|
|
the first insn,
|
2887 |
|
|
|
2888 |
|
|
@smallexample
|
2889 |
|
|
NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
|
2890 |
|
|
@end smallexample
|
2891 |
|
|
|
2892 |
|
|
@noindent
|
2893 |
|
|
is always true and if @var{insn} is not the last insn,
|
2894 |
|
|
|
2895 |
|
|
@smallexample
|
2896 |
|
|
PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
|
2897 |
|
|
@end smallexample
|
2898 |
|
|
|
2899 |
|
|
@noindent
|
2900 |
|
|
is always true.
|
2901 |
|
|
|
2902 |
|
|
After delay slot scheduling, some of the insns in the chain might be
|
2903 |
|
|
@code{sequence} expressions, which contain a vector of insns. The value
|
2904 |
|
|
of @code{NEXT_INSN} in all but the last of these insns is the next insn
|
2905 |
|
|
in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
|
2906 |
|
|
is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
|
2907 |
|
|
which it is contained. Similar rules apply for @code{PREV_INSN}.
|
2908 |
|
|
|
2909 |
|
|
This means that the above invariants are not necessarily true for insns
|
2910 |
|
|
inside @code{sequence} expressions. Specifically, if @var{insn} is the
|
2911 |
|
|
first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
|
2912 |
|
|
is the insn containing the @code{sequence} expression, as is the value
|
2913 |
|
|
of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
|
2914 |
|
|
insn in the @code{sequence} expression. You can use these expressions
|
2915 |
|
|
to find the containing @code{sequence} expression.
|
2916 |
|
|
|
2917 |
|
|
Every insn has one of the following six expression codes:
|
2918 |
|
|
|
2919 |
|
|
@table @code
|
2920 |
|
|
@findex insn
|
2921 |
|
|
@item insn
|
2922 |
|
|
The expression code @code{insn} is used for instructions that do not jump
|
2923 |
|
|
and do not do function calls. @code{sequence} expressions are always
|
2924 |
|
|
contained in insns with code @code{insn} even if one of those insns
|
2925 |
|
|
should jump or do function calls.
|
2926 |
|
|
|
2927 |
|
|
Insns with code @code{insn} have four additional fields beyond the three
|
2928 |
|
|
mandatory ones listed above. These four are described in a table below.
|
2929 |
|
|
|
2930 |
|
|
@findex jump_insn
|
2931 |
|
|
@item jump_insn
|
2932 |
|
|
The expression code @code{jump_insn} is used for instructions that may
|
2933 |
|
|
jump (or, more generally, may contain @code{label_ref} expressions). If
|
2934 |
|
|
there is an instruction to return from the current function, it is
|
2935 |
|
|
recorded as a @code{jump_insn}.
|
2936 |
|
|
|
2937 |
|
|
@findex JUMP_LABEL
|
2938 |
|
|
@code{jump_insn} insns have the same extra fields as @code{insn} insns,
|
2939 |
|
|
accessed in the same way and in addition contain a field
|
2940 |
|
|
@code{JUMP_LABEL} which is defined once jump optimization has completed.
|
2941 |
|
|
|
2942 |
|
|
For simple conditional and unconditional jumps, this field contains
|
2943 |
|
|
the @code{code_label} to which this insn will (possibly conditionally)
|
2944 |
|
|
branch. In a more complex jump, @code{JUMP_LABEL} records one of the
|
2945 |
|
|
labels that the insn refers to; the only way to find the others is to
|
2946 |
|
|
scan the entire body of the insn. In an @code{addr_vec},
|
2947 |
|
|
@code{JUMP_LABEL} is @code{NULL_RTX}.
|
2948 |
|
|
|
2949 |
|
|
Return insns count as jumps, but since they do not refer to any
|
2950 |
|
|
labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
|
2951 |
|
|
|
2952 |
|
|
@findex call_insn
|
2953 |
|
|
@item call_insn
|
2954 |
|
|
The expression code @code{call_insn} is used for instructions that may do
|
2955 |
|
|
function calls. It is important to distinguish these instructions because
|
2956 |
|
|
they imply that certain registers and memory locations may be altered
|
2957 |
|
|
unpredictably.
|
2958 |
|
|
|
2959 |
|
|
@findex CALL_INSN_FUNCTION_USAGE
|
2960 |
|
|
@code{call_insn} insns have the same extra fields as @code{insn} insns,
|
2961 |
|
|
accessed in the same way and in addition contain a field
|
2962 |
|
|
@code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
|
2963 |
|
|
@code{expr_list} expressions) containing @code{use} and @code{clobber}
|
2964 |
|
|
expressions that denote hard registers and @code{MEM}s used or
|
2965 |
|
|
clobbered by the called function.
|
2966 |
|
|
|
2967 |
|
|
A @code{MEM} generally points to a stack slots in which arguments passed
|
2968 |
|
|
to the libcall by reference (@pxref{Register Arguments,
|
2969 |
|
|
TARGET_PASS_BY_REFERENCE}) are stored. If the argument is
|
2970 |
|
|
caller-copied (@pxref{Register Arguments, TARGET_CALLEE_COPIES}),
|
2971 |
|
|
the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
|
2972 |
|
|
entries; if it's callee-copied, only a @code{USE} will appear, and the
|
2973 |
|
|
@code{MEM} may point to addresses that are not stack slots. These
|
2974 |
|
|
@code{MEM}s are used only in libcalls, because, unlike regular function
|
2975 |
|
|
calls, @code{CONST_CALL}s (which libcalls generally are, @pxref{Flags,
|
2976 |
|
|
CONST_CALL_P}) aren't assumed to read and write all memory, so flow
|
2977 |
|
|
would consider the stores dead and remove them. Note that, since a
|
2978 |
|
|
libcall must never return values in memory (@pxref{Aggregate Return,
|
2979 |
|
|
RETURN_IN_MEMORY}), there will never be a @code{CLOBBER} for a memory
|
2980 |
|
|
address holding a return value.
|
2981 |
|
|
|
2982 |
|
|
@code{CLOBBER}ed registers in this list augment registers specified in
|
2983 |
|
|
@code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
|
2984 |
|
|
|
2985 |
|
|
@findex code_label
|
2986 |
|
|
@findex CODE_LABEL_NUMBER
|
2987 |
|
|
@item code_label
|
2988 |
|
|
A @code{code_label} insn represents a label that a jump insn can jump
|
2989 |
|
|
to. It contains two special fields of data in addition to the three
|
2990 |
|
|
standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
|
2991 |
|
|
number}, a number that identifies this label uniquely among all the
|
2992 |
|
|
labels in the compilation (not just in the current function).
|
2993 |
|
|
Ultimately, the label is represented in the assembler output as an
|
2994 |
|
|
assembler label, usually of the form @samp{L@var{n}} where @var{n} is
|
2995 |
|
|
the label number.
|
2996 |
|
|
|
2997 |
|
|
When a @code{code_label} appears in an RTL expression, it normally
|
2998 |
|
|
appears within a @code{label_ref} which represents the address of
|
2999 |
|
|
the label, as a number.
|
3000 |
|
|
|
3001 |
|
|
Besides as a @code{code_label}, a label can also be represented as a
|
3002 |
|
|
@code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
|
3003 |
|
|
|
3004 |
|
|
@findex LABEL_NUSES
|
3005 |
|
|
The field @code{LABEL_NUSES} is only defined once the jump optimization
|
3006 |
|
|
phase is completed. It contains the number of times this label is
|
3007 |
|
|
referenced in the current function.
|
3008 |
|
|
|
3009 |
|
|
@findex LABEL_KIND
|
3010 |
|
|
@findex SET_LABEL_KIND
|
3011 |
|
|
@findex LABEL_ALT_ENTRY_P
|
3012 |
|
|
@cindex alternate entry points
|
3013 |
|
|
The field @code{LABEL_KIND} differentiates four different types of
|
3014 |
|
|
labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
|
3015 |
|
|
@code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}. The only labels
|
3016 |
|
|
that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
|
3017 |
|
|
points} to the current function. These may be static (visible only in
|
3018 |
|
|
the containing translation unit), global (exposed to all translation
|
3019 |
|
|
units), or weak (global, but can be overridden by another symbol with the
|
3020 |
|
|
same name).
|
3021 |
|
|
|
3022 |
|
|
Much of the compiler treats all four kinds of label identically. Some
|
3023 |
|
|
of it needs to know whether or not a label is an alternate entry point;
|
3024 |
|
|
for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided. It is
|
3025 |
|
|
equivalent to testing whether @samp{LABEL_KIND (label) == LABEL_NORMAL}.
|
3026 |
|
|
The only place that cares about the distinction between static, global,
|
3027 |
|
|
and weak alternate entry points, besides the front-end code that creates
|
3028 |
|
|
them, is the function @code{output_alternate_entry_point}, in
|
3029 |
|
|
@file{final.c}.
|
3030 |
|
|
|
3031 |
|
|
To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
|
3032 |
|
|
|
3033 |
|
|
@findex barrier
|
3034 |
|
|
@item barrier
|
3035 |
|
|
Barriers are placed in the instruction stream when control cannot flow
|
3036 |
|
|
past them. They are placed after unconditional jump instructions to
|
3037 |
|
|
indicate that the jumps are unconditional and after calls to
|
3038 |
|
|
@code{volatile} functions, which do not return (e.g., @code{exit}).
|
3039 |
|
|
They contain no information beyond the three standard fields.
|
3040 |
|
|
|
3041 |
|
|
@findex note
|
3042 |
|
|
@findex NOTE_LINE_NUMBER
|
3043 |
|
|
@findex NOTE_SOURCE_FILE
|
3044 |
|
|
@item note
|
3045 |
|
|
@code{note} insns are used to represent additional debugging and
|
3046 |
|
|
declarative information. They contain two nonstandard fields, an
|
3047 |
|
|
integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
|
3048 |
|
|
string accessed with @code{NOTE_SOURCE_FILE}.
|
3049 |
|
|
|
3050 |
|
|
If @code{NOTE_LINE_NUMBER} is positive, the note represents the
|
3051 |
|
|
position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
|
3052 |
|
|
that the line came from. These notes control generation of line
|
3053 |
|
|
number data in the assembler output.
|
3054 |
|
|
|
3055 |
|
|
Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
|
3056 |
|
|
code with one of the following values (and @code{NOTE_SOURCE_FILE}
|
3057 |
|
|
must contain a null pointer):
|
3058 |
|
|
|
3059 |
|
|
@table @code
|
3060 |
|
|
@findex NOTE_INSN_DELETED
|
3061 |
|
|
@item NOTE_INSN_DELETED
|
3062 |
|
|
Such a note is completely ignorable. Some passes of the compiler
|
3063 |
|
|
delete insns by altering them into notes of this kind.
|
3064 |
|
|
|
3065 |
|
|
@findex NOTE_INSN_DELETED_LABEL
|
3066 |
|
|
@item NOTE_INSN_DELETED_LABEL
|
3067 |
|
|
This marks what used to be a @code{code_label}, but was not used for other
|
3068 |
|
|
purposes than taking its address and was transformed to mark that no
|
3069 |
|
|
code jumps to it.
|
3070 |
|
|
|
3071 |
|
|
@findex NOTE_INSN_BLOCK_BEG
|
3072 |
|
|
@findex NOTE_INSN_BLOCK_END
|
3073 |
|
|
@item NOTE_INSN_BLOCK_BEG
|
3074 |
|
|
@itemx NOTE_INSN_BLOCK_END
|
3075 |
|
|
These types of notes indicate the position of the beginning and end
|
3076 |
|
|
of a level of scoping of variable names. They control the output
|
3077 |
|
|
of debugging information.
|
3078 |
|
|
|
3079 |
|
|
@findex NOTE_INSN_EH_REGION_BEG
|
3080 |
|
|
@findex NOTE_INSN_EH_REGION_END
|
3081 |
|
|
@item NOTE_INSN_EH_REGION_BEG
|
3082 |
|
|
@itemx NOTE_INSN_EH_REGION_END
|
3083 |
|
|
These types of notes indicate the position of the beginning and end of a
|
3084 |
|
|
level of scoping for exception handling. @code{NOTE_BLOCK_NUMBER}
|
3085 |
|
|
identifies which @code{CODE_LABEL} or @code{note} of type
|
3086 |
|
|
@code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
|
3087 |
|
|
|
3088 |
|
|
@findex NOTE_INSN_LOOP_BEG
|
3089 |
|
|
@findex NOTE_INSN_LOOP_END
|
3090 |
|
|
@item NOTE_INSN_LOOP_BEG
|
3091 |
|
|
@itemx NOTE_INSN_LOOP_END
|
3092 |
|
|
These types of notes indicate the position of the beginning and end
|
3093 |
|
|
of a @code{while} or @code{for} loop. They enable the loop optimizer
|
3094 |
|
|
to find loops quickly.
|
3095 |
|
|
|
3096 |
|
|
@findex NOTE_INSN_LOOP_CONT
|
3097 |
|
|
@item NOTE_INSN_LOOP_CONT
|
3098 |
|
|
Appears at the place in a loop that @code{continue} statements jump to.
|
3099 |
|
|
|
3100 |
|
|
@findex NOTE_INSN_LOOP_VTOP
|
3101 |
|
|
@item NOTE_INSN_LOOP_VTOP
|
3102 |
|
|
This note indicates the place in a loop where the exit test begins for
|
3103 |
|
|
those loops in which the exit test has been duplicated. This position
|
3104 |
|
|
becomes another virtual start of the loop when considering loop
|
3105 |
|
|
invariants.
|
3106 |
|
|
|
3107 |
|
|
@findex NOTE_INSN_FUNCTION_BEG
|
3108 |
|
|
@item NOTE_INSN_FUNCTION_BEG
|
3109 |
|
|
Appears at the start of the function body, after the function
|
3110 |
|
|
prologue.
|
3111 |
|
|
|
3112 |
|
|
@findex NOTE_INSN_FUNCTION_END
|
3113 |
|
|
@item NOTE_INSN_FUNCTION_END
|
3114 |
|
|
Appears near the end of the function body, just before the label that
|
3115 |
|
|
@code{return} statements jump to (on machine where a single instruction
|
3116 |
|
|
does not suffice for returning). This note may be deleted by jump
|
3117 |
|
|
optimization.
|
3118 |
|
|
|
3119 |
|
|
@end table
|
3120 |
|
|
|
3121 |
|
|
These codes are printed symbolically when they appear in debugging dumps.
|
3122 |
|
|
@end table
|
3123 |
|
|
|
3124 |
|
|
@cindex @code{TImode}, in @code{insn}
|
3125 |
|
|
@cindex @code{HImode}, in @code{insn}
|
3126 |
|
|
@cindex @code{QImode}, in @code{insn}
|
3127 |
|
|
The machine mode of an insn is normally @code{VOIDmode}, but some
|
3128 |
|
|
phases use the mode for various purposes.
|
3129 |
|
|
|
3130 |
|
|
The common subexpression elimination pass sets the mode of an insn to
|
3131 |
|
|
@code{QImode} when it is the first insn in a block that has already
|
3132 |
|
|
been processed.
|
3133 |
|
|
|
3134 |
|
|
The second Haifa scheduling pass, for targets that can multiple issue,
|
3135 |
|
|
sets the mode of an insn to @code{TImode} when it is believed that the
|
3136 |
|
|
instruction begins an issue group. That is, when the instruction
|
3137 |
|
|
cannot issue simultaneously with the previous. This may be relied on
|
3138 |
|
|
by later passes, in particular machine-dependent reorg.
|
3139 |
|
|
|
3140 |
|
|
Here is a table of the extra fields of @code{insn}, @code{jump_insn}
|
3141 |
|
|
and @code{call_insn} insns:
|
3142 |
|
|
|
3143 |
|
|
@table @code
|
3144 |
|
|
@findex PATTERN
|
3145 |
|
|
@item PATTERN (@var{i})
|
3146 |
|
|
An expression for the side effect performed by this insn. This must be
|
3147 |
|
|
one of the following codes: @code{set}, @code{call}, @code{use},
|
3148 |
|
|
@code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
|
3149 |
|
|
@code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
|
3150 |
|
|
@code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}. If it is a @code{parallel},
|
3151 |
|
|
each element of the @code{parallel} must be one these codes, except that
|
3152 |
|
|
@code{parallel} expressions cannot be nested and @code{addr_vec} and
|
3153 |
|
|
@code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
|
3154 |
|
|
|
3155 |
|
|
@findex INSN_CODE
|
3156 |
|
|
@item INSN_CODE (@var{i})
|
3157 |
|
|
An integer that says which pattern in the machine description matches
|
3158 |
|
|
this insn, or @minus{}1 if the matching has not yet been attempted.
|
3159 |
|
|
|
3160 |
|
|
Such matching is never attempted and this field remains @minus{}1 on an insn
|
3161 |
|
|
whose pattern consists of a single @code{use}, @code{clobber},
|
3162 |
|
|
@code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
|
3163 |
|
|
|
3164 |
|
|
@findex asm_noperands
|
3165 |
|
|
Matching is also never attempted on insns that result from an @code{asm}
|
3166 |
|
|
statement. These contain at least one @code{asm_operands} expression.
|
3167 |
|
|
The function @code{asm_noperands} returns a non-negative value for
|
3168 |
|
|
such insns.
|
3169 |
|
|
|
3170 |
|
|
In the debugging output, this field is printed as a number followed by
|
3171 |
|
|
a symbolic representation that locates the pattern in the @file{md}
|
3172 |
|
|
file as some small positive or negative offset from a named pattern.
|
3173 |
|
|
|
3174 |
|
|
@findex LOG_LINKS
|
3175 |
|
|
@item LOG_LINKS (@var{i})
|
3176 |
|
|
A list (chain of @code{insn_list} expressions) giving information about
|
3177 |
|
|
dependencies between instructions within a basic block. Neither a jump
|
3178 |
|
|
nor a label may come between the related insns.
|
3179 |
|
|
|
3180 |
|
|
@findex REG_NOTES
|
3181 |
|
|
@item REG_NOTES (@var{i})
|
3182 |
|
|
A list (chain of @code{expr_list} and @code{insn_list} expressions)
|
3183 |
|
|
giving miscellaneous information about the insn. It is often
|
3184 |
|
|
information pertaining to the registers used in this insn.
|
3185 |
|
|
@end table
|
3186 |
|
|
|
3187 |
|
|
The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
|
3188 |
|
|
expressions. Each of these has two operands: the first is an insn,
|
3189 |
|
|
and the second is another @code{insn_list} expression (the next one in
|
3190 |
|
|
the chain). The last @code{insn_list} in the chain has a null pointer
|
3191 |
|
|
as second operand. The significant thing about the chain is which
|
3192 |
|
|
insns appear in it (as first operands of @code{insn_list}
|
3193 |
|
|
expressions). Their order is not significant.
|
3194 |
|
|
|
3195 |
|
|
This list is originally set up by the flow analysis pass; it is a null
|
3196 |
|
|
pointer until then. Flow only adds links for those data dependencies
|
3197 |
|
|
which can be used for instruction combination. For each insn, the flow
|
3198 |
|
|
analysis pass adds a link to insns which store into registers values
|
3199 |
|
|
that are used for the first time in this insn. The instruction
|
3200 |
|
|
scheduling pass adds extra links so that every dependence will be
|
3201 |
|
|
represented. Links represent data dependencies, antidependencies and
|
3202 |
|
|
output dependencies; the machine mode of the link distinguishes these
|
3203 |
|
|
three types: antidependencies have mode @code{REG_DEP_ANTI}, output
|
3204 |
|
|
dependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have
|
3205 |
|
|
mode @code{VOIDmode}.
|
3206 |
|
|
|
3207 |
|
|
The @code{REG_NOTES} field of an insn is a chain similar to the
|
3208 |
|
|
@code{LOG_LINKS} field but it includes @code{expr_list} expressions in
|
3209 |
|
|
addition to @code{insn_list} expressions. There are several kinds of
|
3210 |
|
|
register notes, which are distinguished by the machine mode, which in a
|
3211 |
|
|
register note is really understood as being an @code{enum reg_note}.
|
3212 |
|
|
The first operand @var{op} of the note is data whose meaning depends on
|
3213 |
|
|
the kind of note.
|
3214 |
|
|
|
3215 |
|
|
@findex REG_NOTE_KIND
|
3216 |
|
|
@findex PUT_REG_NOTE_KIND
|
3217 |
|
|
The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
|
3218 |
|
|
register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
|
3219 |
|
|
(@var{x}, @var{newkind})} sets the register note type of @var{x} to be
|
3220 |
|
|
@var{newkind}.
|
3221 |
|
|
|
3222 |
|
|
Register notes are of three classes: They may say something about an
|
3223 |
|
|
input to an insn, they may say something about an output of an insn, or
|
3224 |
|
|
they may create a linkage between two insns. There are also a set
|
3225 |
|
|
of values that are only used in @code{LOG_LINKS}.
|
3226 |
|
|
|
3227 |
|
|
These register notes annotate inputs to an insn:
|
3228 |
|
|
|
3229 |
|
|
@table @code
|
3230 |
|
|
@findex REG_DEAD
|
3231 |
|
|
@item REG_DEAD
|
3232 |
|
|
The value in @var{op} dies in this insn; that is to say, altering the
|
3233 |
|
|
value immediately after this insn would not affect the future behavior
|
3234 |
|
|
of the program.
|
3235 |
|
|
|
3236 |
|
|
It does not follow that the register @var{op} has no useful value after
|
3237 |
|
|
this insn since @var{op} is not necessarily modified by this insn.
|
3238 |
|
|
Rather, no subsequent instruction uses the contents of @var{op}.
|
3239 |
|
|
|
3240 |
|
|
@findex REG_UNUSED
|
3241 |
|
|
@item REG_UNUSED
|
3242 |
|
|
The register @var{op} being set by this insn will not be used in a
|
3243 |
|
|
subsequent insn. This differs from a @code{REG_DEAD} note, which
|
3244 |
|
|
indicates that the value in an input will not be used subsequently.
|
3245 |
|
|
These two notes are independent; both may be present for the same
|
3246 |
|
|
register.
|
3247 |
|
|
|
3248 |
|
|
@findex REG_INC
|
3249 |
|
|
@item REG_INC
|
3250 |
|
|
The register @var{op} is incremented (or decremented; at this level
|
3251 |
|
|
there is no distinction) by an embedded side effect inside this insn.
|
3252 |
|
|
This means it appears in a @code{post_inc}, @code{pre_inc},
|
3253 |
|
|
@code{post_dec} or @code{pre_dec} expression.
|
3254 |
|
|
|
3255 |
|
|
@findex REG_NONNEG
|
3256 |
|
|
@item REG_NONNEG
|
3257 |
|
|
The register @var{op} is known to have a nonnegative value when this
|
3258 |
|
|
insn is reached. This is used so that decrement and branch until zero
|
3259 |
|
|
instructions, such as the m68k dbra, can be matched.
|
3260 |
|
|
|
3261 |
|
|
The @code{REG_NONNEG} note is added to insns only if the machine
|
3262 |
|
|
description has a @samp{decrement_and_branch_until_zero} pattern.
|
3263 |
|
|
|
3264 |
|
|
@findex REG_NO_CONFLICT
|
3265 |
|
|
@item REG_NO_CONFLICT
|
3266 |
|
|
This insn does not cause a conflict between @var{op} and the item
|
3267 |
|
|
being set by this insn even though it might appear that it does.
|
3268 |
|
|
In other words, if the destination register and @var{op} could
|
3269 |
|
|
otherwise be assigned the same register, this insn does not
|
3270 |
|
|
prevent that assignment.
|
3271 |
|
|
|
3272 |
|
|
Insns with this note are usually part of a block that begins with a
|
3273 |
|
|
@code{clobber} insn specifying a multi-word pseudo register (which will
|
3274 |
|
|
be the output of the block), a group of insns that each set one word of
|
3275 |
|
|
the value and have the @code{REG_NO_CONFLICT} note attached, and a final
|
3276 |
|
|
insn that copies the output to itself with an attached @code{REG_EQUAL}
|
3277 |
|
|
note giving the expression being computed. This block is encapsulated
|
3278 |
|
|
with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
|
3279 |
|
|
last insns, respectively.
|
3280 |
|
|
|
3281 |
|
|
@findex REG_LABEL
|
3282 |
|
|
@item REG_LABEL
|
3283 |
|
|
This insn uses @var{op}, a @code{code_label} or a @code{note} of type
|
3284 |
|
|
@code{NOTE_INSN_DELETED_LABEL}, but is not a
|
3285 |
|
|
@code{jump_insn}, or it is a @code{jump_insn} that required the label to
|
3286 |
|
|
be held in a register. The presence of this note allows jump
|
3287 |
|
|
optimization to be aware that @var{op} is, in fact, being used, and flow
|
3288 |
|
|
optimization to build an accurate flow graph.
|
3289 |
|
|
|
3290 |
|
|
@findex REG_CROSSING_JUMP
|
3291 |
|
|
@item REG_CROSSING_JUMP
|
3292 |
|
|
This insn is an branching instruction (either an unconditional jump or
|
3293 |
|
|
an indirect jump) which crosses between hot and cold sections, which
|
3294 |
|
|
could potentially be very far apart in the executable. The presence
|
3295 |
|
|
of this note indicates to other optimizations that this this branching
|
3296 |
|
|
instruction should not be ``collapsed'' into a simpler branching
|
3297 |
|
|
construct. It is used when the optimization to partition basic blocks
|
3298 |
|
|
into hot and cold sections is turned on.
|
3299 |
|
|
|
3300 |
|
|
@findex REG_SETJMP
|
3301 |
|
|
@item REG_SETJMP
|
3302 |
|
|
Appears attached to each @code{CALL_INSN} to @code{setjmp} or a
|
3303 |
|
|
related function.
|
3304 |
|
|
@end table
|
3305 |
|
|
|
3306 |
|
|
The following notes describe attributes of outputs of an insn:
|
3307 |
|
|
|
3308 |
|
|
@table @code
|
3309 |
|
|
@findex REG_EQUIV
|
3310 |
|
|
@findex REG_EQUAL
|
3311 |
|
|
@item REG_EQUIV
|
3312 |
|
|
@itemx REG_EQUAL
|
3313 |
|
|
This note is only valid on an insn that sets only one register and
|
3314 |
|
|
indicates that that register will be equal to @var{op} at run time; the
|
3315 |
|
|
scope of this equivalence differs between the two types of notes. The
|
3316 |
|
|
value which the insn explicitly copies into the register may look
|
3317 |
|
|
different from @var{op}, but they will be equal at run time. If the
|
3318 |
|
|
output of the single @code{set} is a @code{strict_low_part} expression,
|
3319 |
|
|
the note refers to the register that is contained in @code{SUBREG_REG}
|
3320 |
|
|
of the @code{subreg} expression.
|
3321 |
|
|
|
3322 |
|
|
For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
|
3323 |
|
|
the entire function, and could validly be replaced in all its
|
3324 |
|
|
occurrences by @var{op}. (``Validly'' here refers to the data flow of
|
3325 |
|
|
the program; simple replacement may make some insns invalid.) For
|
3326 |
|
|
example, when a constant is loaded into a register that is never
|
3327 |
|
|
assigned any other value, this kind of note is used.
|
3328 |
|
|
|
3329 |
|
|
When a parameter is copied into a pseudo-register at entry to a function,
|
3330 |
|
|
a note of this kind records that the register is equivalent to the stack
|
3331 |
|
|
slot where the parameter was passed. Although in this case the register
|
3332 |
|
|
may be set by other insns, it is still valid to replace the register
|
3333 |
|
|
by the stack slot throughout the function.
|
3334 |
|
|
|
3335 |
|
|
A @code{REG_EQUIV} note is also used on an instruction which copies a
|
3336 |
|
|
register parameter into a pseudo-register at entry to a function, if
|
3337 |
|
|
there is a stack slot where that parameter could be stored. Although
|
3338 |
|
|
other insns may set the pseudo-register, it is valid for the compiler to
|
3339 |
|
|
replace the pseudo-register by stack slot throughout the function,
|
3340 |
|
|
provided the compiler ensures that the stack slot is properly
|
3341 |
|
|
initialized by making the replacement in the initial copy instruction as
|
3342 |
|
|
well. This is used on machines for which the calling convention
|
3343 |
|
|
allocates stack space for register parameters. See
|
3344 |
|
|
@code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
|
3345 |
|
|
|
3346 |
|
|
In the case of @code{REG_EQUAL}, the register that is set by this insn
|
3347 |
|
|
will be equal to @var{op} at run time at the end of this insn but not
|
3348 |
|
|
necessarily elsewhere in the function. In this case, @var{op}
|
3349 |
|
|
is typically an arithmetic expression. For example, when a sequence of
|
3350 |
|
|
insns such as a library call is used to perform an arithmetic operation,
|
3351 |
|
|
this kind of note is attached to the insn that produces or copies the
|
3352 |
|
|
final value.
|
3353 |
|
|
|
3354 |
|
|
These two notes are used in different ways by the compiler passes.
|
3355 |
|
|
@code{REG_EQUAL} is used by passes prior to register allocation (such as
|
3356 |
|
|
common subexpression elimination and loop optimization) to tell them how
|
3357 |
|
|
to think of that value. @code{REG_EQUIV} notes are used by register
|
3358 |
|
|
allocation to indicate that there is an available substitute expression
|
3359 |
|
|
(either a constant or a @code{mem} expression for the location of a
|
3360 |
|
|
parameter on the stack) that may be used in place of a register if
|
3361 |
|
|
insufficient registers are available.
|
3362 |
|
|
|
3363 |
|
|
Except for stack homes for parameters, which are indicated by a
|
3364 |
|
|
@code{REG_EQUIV} note and are not useful to the early optimization
|
3365 |
|
|
passes and pseudo registers that are equivalent to a memory location
|
3366 |
|
|
throughout their entire life, which is not detected until later in
|
3367 |
|
|
the compilation, all equivalences are initially indicated by an attached
|
3368 |
|
|
@code{REG_EQUAL} note. In the early stages of register allocation, a
|
3369 |
|
|
@code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
|
3370 |
|
|
@var{op} is a constant and the insn represents the only set of its
|
3371 |
|
|
destination register.
|
3372 |
|
|
|
3373 |
|
|
Thus, compiler passes prior to register allocation need only check for
|
3374 |
|
|
@code{REG_EQUAL} notes and passes subsequent to register allocation
|
3375 |
|
|
need only check for @code{REG_EQUIV} notes.
|
3376 |
|
|
@end table
|
3377 |
|
|
|
3378 |
|
|
These notes describe linkages between insns. They occur in pairs: one
|
3379 |
|
|
insn has one of a pair of notes that points to a second insn, which has
|
3380 |
|
|
the inverse note pointing back to the first insn.
|
3381 |
|
|
|
3382 |
|
|
@table @code
|
3383 |
|
|
@findex REG_RETVAL
|
3384 |
|
|
@item REG_RETVAL
|
3385 |
|
|
This insn copies the value of a multi-insn sequence (for example, a
|
3386 |
|
|
library call), and @var{op} is the first insn of the sequence (for a
|
3387 |
|
|
library call, the first insn that was generated to set up the arguments
|
3388 |
|
|
for the library call).
|
3389 |
|
|
|
3390 |
|
|
Loop optimization uses this note to treat such a sequence as a single
|
3391 |
|
|
operation for code motion purposes and flow analysis uses this note to
|
3392 |
|
|
delete such sequences whose results are dead.
|
3393 |
|
|
|
3394 |
|
|
A @code{REG_EQUAL} note will also usually be attached to this insn to
|
3395 |
|
|
provide the expression being computed by the sequence.
|
3396 |
|
|
|
3397 |
|
|
These notes will be deleted after reload, since they are no longer
|
3398 |
|
|
accurate or useful.
|
3399 |
|
|
|
3400 |
|
|
@findex REG_LIBCALL
|
3401 |
|
|
@item REG_LIBCALL
|
3402 |
|
|
This is the inverse of @code{REG_RETVAL}: it is placed on the first
|
3403 |
|
|
insn of a multi-insn sequence, and it points to the last one.
|
3404 |
|
|
|
3405 |
|
|
These notes are deleted after reload, since they are no longer useful or
|
3406 |
|
|
accurate.
|
3407 |
|
|
|
3408 |
|
|
@findex REG_CC_SETTER
|
3409 |
|
|
@findex REG_CC_USER
|
3410 |
|
|
@item REG_CC_SETTER
|
3411 |
|
|
@itemx REG_CC_USER
|
3412 |
|
|
On machines that use @code{cc0}, the insns which set and use @code{cc0}
|
3413 |
|
|
set and use @code{cc0} are adjacent. However, when branch delay slot
|
3414 |
|
|
filling is done, this may no longer be true. In this case a
|
3415 |
|
|
@code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
|
3416 |
|
|
point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
|
3417 |
|
|
be placed on the insn using @code{cc0} to point to the insn setting
|
3418 |
|
|
@code{cc0}.
|
3419 |
|
|
@end table
|
3420 |
|
|
|
3421 |
|
|
These values are only used in the @code{LOG_LINKS} field, and indicate
|
3422 |
|
|
the type of dependency that each link represents. Links which indicate
|
3423 |
|
|
a data dependence (a read after write dependence) do not use any code,
|
3424 |
|
|
they simply have mode @code{VOIDmode}, and are printed without any
|
3425 |
|
|
descriptive text.
|
3426 |
|
|
|
3427 |
|
|
@table @code
|
3428 |
|
|
@findex REG_DEP_ANTI
|
3429 |
|
|
@item REG_DEP_ANTI
|
3430 |
|
|
This indicates an anti dependence (a write after read dependence).
|
3431 |
|
|
|
3432 |
|
|
@findex REG_DEP_OUTPUT
|
3433 |
|
|
@item REG_DEP_OUTPUT
|
3434 |
|
|
This indicates an output dependence (a write after write dependence).
|
3435 |
|
|
@end table
|
3436 |
|
|
|
3437 |
|
|
These notes describe information gathered from gcov profile data. They
|
3438 |
|
|
are stored in the @code{REG_NOTES} field of an insn as an
|
3439 |
|
|
@code{expr_list}.
|
3440 |
|
|
|
3441 |
|
|
@table @code
|
3442 |
|
|
@findex REG_BR_PROB
|
3443 |
|
|
@item REG_BR_PROB
|
3444 |
|
|
This is used to specify the ratio of branches to non-branches of a
|
3445 |
|
|
branch insn according to the profile data. The value is stored as a
|
3446 |
|
|
value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
|
3447 |
|
|
probability that the branch will be taken.
|
3448 |
|
|
|
3449 |
|
|
@findex REG_BR_PRED
|
3450 |
|
|
@item REG_BR_PRED
|
3451 |
|
|
These notes are found in JUMP insns after delayed branch scheduling
|
3452 |
|
|
has taken place. They indicate both the direction and the likelihood
|
3453 |
|
|
of the JUMP@. The format is a bitmask of ATTR_FLAG_* values.
|
3454 |
|
|
|
3455 |
|
|
@findex REG_FRAME_RELATED_EXPR
|
3456 |
|
|
@item REG_FRAME_RELATED_EXPR
|
3457 |
|
|
This is used on an RTX_FRAME_RELATED_P insn wherein the attached expression
|
3458 |
|
|
is used in place of the actual insn pattern. This is done in cases where
|
3459 |
|
|
the pattern is either complex or misleading.
|
3460 |
|
|
@end table
|
3461 |
|
|
|
3462 |
|
|
For convenience, the machine mode in an @code{insn_list} or
|
3463 |
|
|
@code{expr_list} is printed using these symbolic codes in debugging dumps.
|
3464 |
|
|
|
3465 |
|
|
@findex insn_list
|
3466 |
|
|
@findex expr_list
|
3467 |
|
|
The only difference between the expression codes @code{insn_list} and
|
3468 |
|
|
@code{expr_list} is that the first operand of an @code{insn_list} is
|
3469 |
|
|
assumed to be an insn and is printed in debugging dumps as the insn's
|
3470 |
|
|
unique id; the first operand of an @code{expr_list} is printed in the
|
3471 |
|
|
ordinary way as an expression.
|
3472 |
|
|
|
3473 |
|
|
@node Calls
|
3474 |
|
|
@section RTL Representation of Function-Call Insns
|
3475 |
|
|
@cindex calling functions in RTL
|
3476 |
|
|
@cindex RTL function-call insns
|
3477 |
|
|
@cindex function-call insns
|
3478 |
|
|
|
3479 |
|
|
Insns that call subroutines have the RTL expression code @code{call_insn}.
|
3480 |
|
|
These insns must satisfy special rules, and their bodies must use a special
|
3481 |
|
|
RTL expression code, @code{call}.
|
3482 |
|
|
|
3483 |
|
|
@cindex @code{call} usage
|
3484 |
|
|
A @code{call} expression has two operands, as follows:
|
3485 |
|
|
|
3486 |
|
|
@smallexample
|
3487 |
|
|
(call (mem:@var{fm} @var{addr}) @var{nbytes})
|
3488 |
|
|
@end smallexample
|
3489 |
|
|
|
3490 |
|
|
@noindent
|
3491 |
|
|
Here @var{nbytes} is an operand that represents the number of bytes of
|
3492 |
|
|
argument data being passed to the subroutine, @var{fm} is a machine mode
|
3493 |
|
|
(which must equal as the definition of the @code{FUNCTION_MODE} macro in
|
3494 |
|
|
the machine description) and @var{addr} represents the address of the
|
3495 |
|
|
subroutine.
|
3496 |
|
|
|
3497 |
|
|
For a subroutine that returns no value, the @code{call} expression as
|
3498 |
|
|
shown above is the entire body of the insn, except that the insn might
|
3499 |
|
|
also contain @code{use} or @code{clobber} expressions.
|
3500 |
|
|
|
3501 |
|
|
@cindex @code{BLKmode}, and function return values
|
3502 |
|
|
For a subroutine that returns a value whose mode is not @code{BLKmode},
|
3503 |
|
|
the value is returned in a hard register. If this register's number is
|
3504 |
|
|
@var{r}, then the body of the call insn looks like this:
|
3505 |
|
|
|
3506 |
|
|
@smallexample
|
3507 |
|
|
(set (reg:@var{m} @var{r})
|
3508 |
|
|
(call (mem:@var{fm} @var{addr}) @var{nbytes}))
|
3509 |
|
|
@end smallexample
|
3510 |
|
|
|
3511 |
|
|
@noindent
|
3512 |
|
|
This RTL expression makes it clear (to the optimizer passes) that the
|
3513 |
|
|
appropriate register receives a useful value in this insn.
|
3514 |
|
|
|
3515 |
|
|
When a subroutine returns a @code{BLKmode} value, it is handled by
|
3516 |
|
|
passing to the subroutine the address of a place to store the value.
|
3517 |
|
|
So the call insn itself does not ``return'' any value, and it has the
|
3518 |
|
|
same RTL form as a call that returns nothing.
|
3519 |
|
|
|
3520 |
|
|
On some machines, the call instruction itself clobbers some register,
|
3521 |
|
|
for example to contain the return address. @code{call_insn} insns
|
3522 |
|
|
on these machines should have a body which is a @code{parallel}
|
3523 |
|
|
that contains both the @code{call} expression and @code{clobber}
|
3524 |
|
|
expressions that indicate which registers are destroyed. Similarly,
|
3525 |
|
|
if the call instruction requires some register other than the stack
|
3526 |
|
|
pointer that is not explicitly mentioned in its RTL, a @code{use}
|
3527 |
|
|
subexpression should mention that register.
|
3528 |
|
|
|
3529 |
|
|
Functions that are called are assumed to modify all registers listed in
|
3530 |
|
|
the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
|
3531 |
|
|
Basics}) and, with the exception of @code{const} functions and library
|
3532 |
|
|
calls, to modify all of memory.
|
3533 |
|
|
|
3534 |
|
|
Insns containing just @code{use} expressions directly precede the
|
3535 |
|
|
@code{call_insn} insn to indicate which registers contain inputs to the
|
3536 |
|
|
function. Similarly, if registers other than those in
|
3537 |
|
|
@code{CALL_USED_REGISTERS} are clobbered by the called function, insns
|
3538 |
|
|
containing a single @code{clobber} follow immediately after the call to
|
3539 |
|
|
indicate which registers.
|
3540 |
|
|
|
3541 |
|
|
@node Sharing
|
3542 |
|
|
@section Structure Sharing Assumptions
|
3543 |
|
|
@cindex sharing of RTL components
|
3544 |
|
|
@cindex RTL structure sharing assumptions
|
3545 |
|
|
|
3546 |
|
|
The compiler assumes that certain kinds of RTL expressions are unique;
|
3547 |
|
|
there do not exist two distinct objects representing the same value.
|
3548 |
|
|
In other cases, it makes an opposite assumption: that no RTL expression
|
3549 |
|
|
object of a certain kind appears in more than one place in the
|
3550 |
|
|
containing structure.
|
3551 |
|
|
|
3552 |
|
|
These assumptions refer to a single function; except for the RTL
|
3553 |
|
|
objects that describe global variables and external functions,
|
3554 |
|
|
and a few standard objects such as small integer constants,
|
3555 |
|
|
no RTL objects are common to two functions.
|
3556 |
|
|
|
3557 |
|
|
@itemize @bullet
|
3558 |
|
|
@cindex @code{reg}, RTL sharing
|
3559 |
|
|
@item
|
3560 |
|
|
Each pseudo-register has only a single @code{reg} object to represent it,
|
3561 |
|
|
and therefore only a single machine mode.
|
3562 |
|
|
|
3563 |
|
|
@cindex symbolic label
|
3564 |
|
|
@cindex @code{symbol_ref}, RTL sharing
|
3565 |
|
|
@item
|
3566 |
|
|
For any symbolic label, there is only one @code{symbol_ref} object
|
3567 |
|
|
referring to it.
|
3568 |
|
|
|
3569 |
|
|
@cindex @code{const_int}, RTL sharing
|
3570 |
|
|
@item
|
3571 |
|
|
All @code{const_int} expressions with equal values are shared.
|
3572 |
|
|
|
3573 |
|
|
@cindex @code{pc}, RTL sharing
|
3574 |
|
|
@item
|
3575 |
|
|
There is only one @code{pc} expression.
|
3576 |
|
|
|
3577 |
|
|
@cindex @code{cc0}, RTL sharing
|
3578 |
|
|
@item
|
3579 |
|
|
There is only one @code{cc0} expression.
|
3580 |
|
|
|
3581 |
|
|
@cindex @code{const_double}, RTL sharing
|
3582 |
|
|
@item
|
3583 |
|
|
There is only one @code{const_double} expression with value 0 for
|
3584 |
|
|
each floating point mode. Likewise for values 1 and 2.
|
3585 |
|
|
|
3586 |
|
|
@cindex @code{const_vector}, RTL sharing
|
3587 |
|
|
@item
|
3588 |
|
|
There is only one @code{const_vector} expression with value 0 for
|
3589 |
|
|
each vector mode, be it an integer or a double constant vector.
|
3590 |
|
|
|
3591 |
|
|
@cindex @code{label_ref}, RTL sharing
|
3592 |
|
|
@cindex @code{scratch}, RTL sharing
|
3593 |
|
|
@item
|
3594 |
|
|
No @code{label_ref} or @code{scratch} appears in more than one place in
|
3595 |
|
|
the RTL structure; in other words, it is safe to do a tree-walk of all
|
3596 |
|
|
the insns in the function and assume that each time a @code{label_ref}
|
3597 |
|
|
or @code{scratch} is seen it is distinct from all others that are seen.
|
3598 |
|
|
|
3599 |
|
|
@cindex @code{mem}, RTL sharing
|
3600 |
|
|
@item
|
3601 |
|
|
Only one @code{mem} object is normally created for each static
|
3602 |
|
|
variable or stack slot, so these objects are frequently shared in all
|
3603 |
|
|
the places they appear. However, separate but equal objects for these
|
3604 |
|
|
variables are occasionally made.
|
3605 |
|
|
|
3606 |
|
|
@cindex @code{asm_operands}, RTL sharing
|
3607 |
|
|
@item
|
3608 |
|
|
When a single @code{asm} statement has multiple output operands, a
|
3609 |
|
|
distinct @code{asm_operands} expression is made for each output operand.
|
3610 |
|
|
However, these all share the vector which contains the sequence of input
|
3611 |
|
|
operands. This sharing is used later on to test whether two
|
3612 |
|
|
@code{asm_operands} expressions come from the same statement, so all
|
3613 |
|
|
optimizations must carefully preserve the sharing if they copy the
|
3614 |
|
|
vector at all.
|
3615 |
|
|
|
3616 |
|
|
@item
|
3617 |
|
|
No RTL object appears in more than one place in the RTL structure
|
3618 |
|
|
except as described above. Many passes of the compiler rely on this
|
3619 |
|
|
by assuming that they can modify RTL objects in place without unwanted
|
3620 |
|
|
side-effects on other insns.
|
3621 |
|
|
|
3622 |
|
|
@findex unshare_all_rtl
|
3623 |
|
|
@item
|
3624 |
|
|
During initial RTL generation, shared structure is freely introduced.
|
3625 |
|
|
After all the RTL for a function has been generated, all shared
|
3626 |
|
|
structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
|
3627 |
|
|
after which the above rules are guaranteed to be followed.
|
3628 |
|
|
|
3629 |
|
|
@findex copy_rtx_if_shared
|
3630 |
|
|
@item
|
3631 |
|
|
During the combiner pass, shared structure within an insn can exist
|
3632 |
|
|
temporarily. However, the shared structure is copied before the
|
3633 |
|
|
combiner is finished with the insn. This is done by calling
|
3634 |
|
|
@code{copy_rtx_if_shared}, which is a subroutine of
|
3635 |
|
|
@code{unshare_all_rtl}.
|
3636 |
|
|
@end itemize
|
3637 |
|
|
|
3638 |
|
|
@node Reading RTL
|
3639 |
|
|
@section Reading RTL
|
3640 |
|
|
|
3641 |
|
|
To read an RTL object from a file, call @code{read_rtx}. It takes one
|
3642 |
|
|
argument, a stdio stream, and returns a single RTL object. This routine
|
3643 |
|
|
is defined in @file{read-rtl.c}. It is not available in the compiler
|
3644 |
|
|
itself, only the various programs that generate the compiler back end
|
3645 |
|
|
from the machine description.
|
3646 |
|
|
|
3647 |
|
|
People frequently have the idea of using RTL stored as text in a file as
|
3648 |
|
|
an interface between a language front end and the bulk of GCC@. This
|
3649 |
|
|
idea is not feasible.
|
3650 |
|
|
|
3651 |
|
|
GCC was designed to use RTL internally only. Correct RTL for a given
|
3652 |
|
|
program is very dependent on the particular target machine. And the RTL
|
3653 |
|
|
does not contain all the information about the program.
|
3654 |
|
|
|
3655 |
|
|
The proper way to interface GCC to a new language front end is with
|
3656 |
|
|
the ``tree'' data structure, described in the files @file{tree.h} and
|
3657 |
|
|
@file{tree.def}. The documentation for this structure (@pxref{Trees})
|
3658 |
|
|
is incomplete.
|