OpenCores
URL https://opencores.org/ocsvn/scarts/scarts/trunk

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-gcc/] [gcc-4.1.1/] [gcc/] [reload.c] - Blame information for rev 16

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 jlechner
/* Search an insn for pseudo regs that must be in hard regs and are not.
2
   Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3
   1999, 2000, 2001, 2002, 2003, 2004, 2005  Free Software Foundation, Inc.
4
 
5
This file is part of GCC.
6
 
7
GCC is free software; you can redistribute it and/or modify it under
8
the terms of the GNU General Public License as published by the Free
9
Software Foundation; either version 2, or (at your option) any later
10
version.
11
 
12
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13
WARRANTY; without even the implied warranty of MERCHANTABILITY or
14
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15
for more details.
16
 
17
You should have received a copy of the GNU General Public License
18
along with GCC; see the file COPYING.  If not, write to the Free
19
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20
02110-1301, USA.  */
21
 
22
/* This file contains subroutines used only from the file reload1.c.
23
   It knows how to scan one insn for operands and values
24
   that need to be copied into registers to make valid code.
25
   It also finds other operands and values which are valid
26
   but for which equivalent values in registers exist and
27
   ought to be used instead.
28
 
29
   Before processing the first insn of the function, call `init_reload'.
30
   init_reload actually has to be called earlier anyway.
31
 
32
   To scan an insn, call `find_reloads'.  This does two things:
33
   1. sets up tables describing which values must be reloaded
34
   for this insn, and what kind of hard regs they must be reloaded into;
35
   2. optionally record the locations where those values appear in
36
   the data, so they can be replaced properly later.
37
   This is done only if the second arg to `find_reloads' is nonzero.
38
 
39
   The third arg to `find_reloads' specifies the number of levels
40
   of indirect addressing supported by the machine.  If it is zero,
41
   indirect addressing is not valid.  If it is one, (MEM (REG n))
42
   is valid even if (REG n) did not get a hard register; if it is two,
43
   (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44
   hard register, and similarly for higher values.
45
 
46
   Then you must choose the hard regs to reload those pseudo regs into,
47
   and generate appropriate load insns before this insn and perhaps
48
   also store insns after this insn.  Set up the array `reload_reg_rtx'
49
   to contain the REG rtx's for the registers you used.  In some
50
   cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51
   for certain reloads.  Then that tells you which register to use,
52
   so you do not need to allocate one.  But you still do need to add extra
53
   instructions to copy the value into and out of that register.
54
 
55
   Finally you must call `subst_reloads' to substitute the reload reg rtx's
56
   into the locations already recorded.
57
 
58
NOTE SIDE EFFECTS:
59
 
60
   find_reloads can alter the operands of the instruction it is called on.
61
 
62
   1. Two operands of any sort may be interchanged, if they are in a
63
   commutative instruction.
64
   This happens only if find_reloads thinks the instruction will compile
65
   better that way.
66
 
67
   2. Pseudo-registers that are equivalent to constants are replaced
68
   with those constants if they are not in hard registers.
69
 
70
1 happens every time find_reloads is called.
71
2 happens only when REPLACE is 1, which is only when
72
actually doing the reloads, not when just counting them.
73
 
74
Using a reload register for several reloads in one insn:
75
 
76
When an insn has reloads, it is considered as having three parts:
77
the input reloads, the insn itself after reloading, and the output reloads.
78
Reloads of values used in memory addresses are often needed for only one part.
79
 
80
When this is so, reload_when_needed records which part needs the reload.
81
Two reloads for different parts of the insn can share the same reload
82
register.
83
 
84
When a reload is used for addresses in multiple parts, or when it is
85
an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86
a register with any other reload.  */
87
 
88
#define REG_OK_STRICT
89
 
90
#include "config.h"
91
#include "system.h"
92
#include "coretypes.h"
93
#include "tm.h"
94
#include "rtl.h"
95
#include "tm_p.h"
96
#include "insn-config.h"
97
#include "expr.h"
98
#include "optabs.h"
99
#include "recog.h"
100
#include "reload.h"
101
#include "regs.h"
102
#include "hard-reg-set.h"
103
#include "flags.h"
104
#include "real.h"
105
#include "output.h"
106
#include "function.h"
107
#include "toplev.h"
108
#include "params.h"
109
#include "target.h"
110
 
111
/* True if X is a constant that can be forced into the constant pool.  */
112
#define CONST_POOL_OK_P(X)                      \
113
  (CONSTANT_P (X)                               \
114
   && GET_CODE (X) != HIGH                      \
115
   && !targetm.cannot_force_const_mem (X))
116
 
117
/* True if C is a non-empty register class that has too few registers
118
   to be safely used as a reload target class.  */
119
#define SMALL_REGISTER_CLASS_P(C) \
120
  (reg_class_size [(C)] == 1 \
121
   || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
122
 
123
 
124
/* All reloads of the current insn are recorded here.  See reload.h for
125
   comments.  */
126
int n_reloads;
127
struct reload rld[MAX_RELOADS];
128
 
129
/* All the "earlyclobber" operands of the current insn
130
   are recorded here.  */
131
int n_earlyclobbers;
132
rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
133
 
134
int reload_n_operands;
135
 
136
/* Replacing reloads.
137
 
138
   If `replace_reloads' is nonzero, then as each reload is recorded
139
   an entry is made for it in the table `replacements'.
140
   Then later `subst_reloads' can look through that table and
141
   perform all the replacements needed.  */
142
 
143
/* Nonzero means record the places to replace.  */
144
static int replace_reloads;
145
 
146
/* Each replacement is recorded with a structure like this.  */
147
struct replacement
148
{
149
  rtx *where;                   /* Location to store in */
150
  rtx *subreg_loc;              /* Location of SUBREG if WHERE is inside
151
                                   a SUBREG; 0 otherwise.  */
152
  int what;                     /* which reload this is for */
153
  enum machine_mode mode;       /* mode it must have */
154
};
155
 
156
static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
157
 
158
/* Number of replacements currently recorded.  */
159
static int n_replacements;
160
 
161
/* Used to track what is modified by an operand.  */
162
struct decomposition
163
{
164
  int reg_flag;         /* Nonzero if referencing a register.  */
165
  int safe;             /* Nonzero if this can't conflict with anything.  */
166
  rtx base;             /* Base address for MEM.  */
167
  HOST_WIDE_INT start;  /* Starting offset or register number.  */
168
  HOST_WIDE_INT end;    /* Ending offset or register number.  */
169
};
170
 
171
#ifdef SECONDARY_MEMORY_NEEDED
172
 
173
/* Save MEMs needed to copy from one class of registers to another.  One MEM
174
   is used per mode, but normally only one or two modes are ever used.
175
 
176
   We keep two versions, before and after register elimination.  The one
177
   after register elimination is record separately for each operand.  This
178
   is done in case the address is not valid to be sure that we separately
179
   reload each.  */
180
 
181
static rtx secondary_memlocs[NUM_MACHINE_MODES];
182
static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
183
static int secondary_memlocs_elim_used = 0;
184
#endif
185
 
186
/* The instruction we are doing reloads for;
187
   so we can test whether a register dies in it.  */
188
static rtx this_insn;
189
 
190
/* Nonzero if this instruction is a user-specified asm with operands.  */
191
static int this_insn_is_asm;
192
 
193
/* If hard_regs_live_known is nonzero,
194
   we can tell which hard regs are currently live,
195
   at least enough to succeed in choosing dummy reloads.  */
196
static int hard_regs_live_known;
197
 
198
/* Indexed by hard reg number,
199
   element is nonnegative if hard reg has been spilled.
200
   This vector is passed to `find_reloads' as an argument
201
   and is not changed here.  */
202
static short *static_reload_reg_p;
203
 
204
/* Set to 1 in subst_reg_equivs if it changes anything.  */
205
static int subst_reg_equivs_changed;
206
 
207
/* On return from push_reload, holds the reload-number for the OUT
208
   operand, which can be different for that from the input operand.  */
209
static int output_reloadnum;
210
 
211
  /* Compare two RTX's.  */
212
#define MATCHES(x, y) \
213
 (x == y || (x != 0 && (REG_P (x)                                \
214
                        ? REG_P (y) && REGNO (x) == REGNO (y)   \
215
                        : rtx_equal_p (x, y) && ! side_effects_p (x))))
216
 
217
  /* Indicates if two reloads purposes are for similar enough things that we
218
     can merge their reloads.  */
219
#define MERGABLE_RELOADS(when1, when2, op1, op2) \
220
  ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER   \
221
   || ((when1) == (when2) && (op1) == (op2))            \
222
   || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
223
   || ((when1) == RELOAD_FOR_OPERAND_ADDRESS            \
224
       && (when2) == RELOAD_FOR_OPERAND_ADDRESS)        \
225
   || ((when1) == RELOAD_FOR_OTHER_ADDRESS              \
226
       && (when2) == RELOAD_FOR_OTHER_ADDRESS))
227
 
228
  /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged.  */
229
#define MERGE_TO_OTHER(when1, when2, op1, op2) \
230
  ((when1) != (when2)                                   \
231
   || ! ((op1) == (op2)                                 \
232
         || (when1) == RELOAD_FOR_INPUT                 \
233
         || (when1) == RELOAD_FOR_OPERAND_ADDRESS       \
234
         || (when1) == RELOAD_FOR_OTHER_ADDRESS))
235
 
236
  /* If we are going to reload an address, compute the reload type to
237
     use.  */
238
#define ADDR_TYPE(type)                                 \
239
  ((type) == RELOAD_FOR_INPUT_ADDRESS                   \
240
   ? RELOAD_FOR_INPADDR_ADDRESS                         \
241
   : ((type) == RELOAD_FOR_OUTPUT_ADDRESS               \
242
      ? RELOAD_FOR_OUTADDR_ADDRESS                      \
243
      : (type)))
244
 
245
#ifdef HAVE_SECONDARY_RELOADS
246
static int push_secondary_reload (int, rtx, int, int, enum reg_class,
247
                                  enum machine_mode, enum reload_type,
248
                                  enum insn_code *);
249
#endif
250
static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
251
                                        int, unsigned int);
252
static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
253
static void push_replacement (rtx *, int, enum machine_mode);
254
static void dup_replacements (rtx *, rtx *);
255
static void combine_reloads (void);
256
static int find_reusable_reload (rtx *, rtx, enum reg_class,
257
                                 enum reload_type, int, int);
258
static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
259
                              enum machine_mode, enum reg_class, int, int);
260
static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
261
static struct decomposition decompose (rtx);
262
static int immune_p (rtx, rtx, struct decomposition);
263
static int alternative_allows_memconst (const char *, int);
264
static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
265
                                int *);
266
static rtx make_memloc (rtx, int);
267
static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
268
static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
269
                                 int, enum reload_type, int, rtx);
270
static rtx subst_reg_equivs (rtx, rtx);
271
static rtx subst_indexed_address (rtx);
272
static void update_auto_inc_notes (rtx, int, int);
273
static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
274
                                   int, enum reload_type,int, rtx);
275
static void find_reloads_address_part (rtx, rtx *, enum reg_class,
276
                                       enum machine_mode, int,
277
                                       enum reload_type, int);
278
static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
279
                                        int, rtx);
280
static void copy_replacements_1 (rtx *, rtx *, int);
281
static int find_inc_amount (rtx, rtx);
282
static int refers_to_mem_for_reload_p (rtx);
283
static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
284
                                         rtx, rtx *);
285
 
286
#ifdef HAVE_SECONDARY_RELOADS
287
 
288
/* Determine if any secondary reloads are needed for loading (if IN_P is
289
   nonzero) or storing (if IN_P is zero) X to or from a reload register of
290
   register class RELOAD_CLASS in mode RELOAD_MODE.  If secondary reloads
291
   are needed, push them.
292
 
293
   Return the reload number of the secondary reload we made, or -1 if
294
   we didn't need one.  *PICODE is set to the insn_code to use if we do
295
   need a secondary reload.  */
296
 
297
static int
298
push_secondary_reload (int in_p, rtx x, int opnum, int optional,
299
                       enum reg_class reload_class,
300
                       enum machine_mode reload_mode, enum reload_type type,
301
                       enum insn_code *picode)
302
{
303
  enum reg_class class = NO_REGS;
304
  enum machine_mode mode = reload_mode;
305
  enum insn_code icode = CODE_FOR_nothing;
306
  enum reg_class t_class = NO_REGS;
307
  enum machine_mode t_mode = VOIDmode;
308
  enum insn_code t_icode = CODE_FOR_nothing;
309
  enum reload_type secondary_type;
310
  int s_reload, t_reload = -1;
311
 
312
  if (type == RELOAD_FOR_INPUT_ADDRESS
313
      || type == RELOAD_FOR_OUTPUT_ADDRESS
314
      || type == RELOAD_FOR_INPADDR_ADDRESS
315
      || type == RELOAD_FOR_OUTADDR_ADDRESS)
316
    secondary_type = type;
317
  else
318
    secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
319
 
320
  *picode = CODE_FOR_nothing;
321
 
322
  /* If X is a paradoxical SUBREG, use the inner value to determine both the
323
     mode and object being reloaded.  */
324
  if (GET_CODE (x) == SUBREG
325
      && (GET_MODE_SIZE (GET_MODE (x))
326
          > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
327
    {
328
      x = SUBREG_REG (x);
329
      reload_mode = GET_MODE (x);
330
    }
331
 
332
  /* If X is a pseudo-register that has an equivalent MEM (actually, if it
333
     is still a pseudo-register by now, it *must* have an equivalent MEM
334
     but we don't want to assume that), use that equivalent when seeing if
335
     a secondary reload is needed since whether or not a reload is needed
336
     might be sensitive to the form of the MEM.  */
337
 
338
  if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
339
      && reg_equiv_mem[REGNO (x)] != 0)
340
    x = reg_equiv_mem[REGNO (x)];
341
 
342
#ifdef SECONDARY_INPUT_RELOAD_CLASS
343
  if (in_p)
344
    class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345
#endif
346
 
347
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
348
  if (! in_p)
349
    class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
350
#endif
351
 
352
  /* If we don't need any secondary registers, done.  */
353
  if (class == NO_REGS)
354
    return -1;
355
 
356
  /* Get a possible insn to use.  If the predicate doesn't accept X, don't
357
     use the insn.  */
358
 
359
  icode = (in_p ? reload_in_optab[(int) reload_mode]
360
           : reload_out_optab[(int) reload_mode]);
361
 
362
  if (icode != CODE_FOR_nothing
363
      && insn_data[(int) icode].operand[in_p].predicate
364
      && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
365
    icode = CODE_FOR_nothing;
366
 
367
  /* If we will be using an insn, see if it can directly handle the reload
368
     register we will be using.  If it can, the secondary reload is for a
369
     scratch register.  If it can't, we will use the secondary reload for
370
     an intermediate register and require a tertiary reload for the scratch
371
     register.  */
372
 
373
  if (icode != CODE_FOR_nothing)
374
    {
375
      /* If IN_P is nonzero, the reload register will be the output in
376
         operand 0.  If IN_P is zero, the reload register will be the input
377
         in operand 1.  Outputs should have an initial "=", which we must
378
         skip.  */
379
 
380
      enum reg_class insn_class;
381
 
382
      if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
383
        insn_class = ALL_REGS;
384
      else
385
        {
386
          const char *insn_constraint
387
            = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
388
          char insn_letter = *insn_constraint;
389
          insn_class
390
            = (insn_letter == 'r' ? GENERAL_REGS
391
               : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
392
                                            insn_constraint));
393
 
394
          gcc_assert (insn_class != NO_REGS);
395
          gcc_assert (!in_p
396
                      || insn_data[(int) icode].operand[!in_p].constraint[0]
397
                         == '=');
398
        }
399
 
400
      /* The scratch register's constraint must start with "=&".  */
401
      gcc_assert (insn_data[(int) icode].operand[2].constraint[0] == '='
402
                  && insn_data[(int) icode].operand[2].constraint[1] == '&');
403
 
404
      if (reg_class_subset_p (reload_class, insn_class))
405
        mode = insn_data[(int) icode].operand[2].mode;
406
      else
407
        {
408
          const char *t_constraint
409
            = &insn_data[(int) icode].operand[2].constraint[2];
410
          char t_letter = *t_constraint;
411
          class = insn_class;
412
          t_mode = insn_data[(int) icode].operand[2].mode;
413
          t_class = (t_letter == 'r' ? GENERAL_REGS
414
                     : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
415
                                                  t_constraint));
416
          t_icode = icode;
417
          icode = CODE_FOR_nothing;
418
        }
419
    }
420
 
421
  /* This case isn't valid, so fail.  Reload is allowed to use the same
422
     register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
423
     in the case of a secondary register, we actually need two different
424
     registers for correct code.  We fail here to prevent the possibility of
425
     silently generating incorrect code later.
426
 
427
     The convention is that secondary input reloads are valid only if the
428
     secondary_class is different from class.  If you have such a case, you
429
     can not use secondary reloads, you must work around the problem some
430
     other way.
431
 
432
     Allow this when a reload_in/out pattern is being used.  I.e. assume
433
     that the generated code handles this case.  */
434
 
435
  gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
436
              || t_icode != CODE_FOR_nothing);
437
 
438
  /* If we need a tertiary reload, see if we have one we can reuse or else
439
     make a new one.  */
440
 
441
  if (t_class != NO_REGS)
442
    {
443
      for (t_reload = 0; t_reload < n_reloads; t_reload++)
444
        if (rld[t_reload].secondary_p
445
            && (reg_class_subset_p (t_class, rld[t_reload].class)
446
                || reg_class_subset_p (rld[t_reload].class, t_class))
447
            && ((in_p && rld[t_reload].inmode == t_mode)
448
                || (! in_p && rld[t_reload].outmode == t_mode))
449
            && ((in_p && (rld[t_reload].secondary_in_icode
450
                          == CODE_FOR_nothing))
451
                || (! in_p &&(rld[t_reload].secondary_out_icode
452
                              == CODE_FOR_nothing)))
453
            && (SMALL_REGISTER_CLASS_P (t_class) || SMALL_REGISTER_CLASSES)
454
            && MERGABLE_RELOADS (secondary_type,
455
                                 rld[t_reload].when_needed,
456
                                 opnum, rld[t_reload].opnum))
457
          {
458
            if (in_p)
459
              rld[t_reload].inmode = t_mode;
460
            if (! in_p)
461
              rld[t_reload].outmode = t_mode;
462
 
463
            if (reg_class_subset_p (t_class, rld[t_reload].class))
464
              rld[t_reload].class = t_class;
465
 
466
            rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
467
            rld[t_reload].optional &= optional;
468
            rld[t_reload].secondary_p = 1;
469
            if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
470
                                opnum, rld[t_reload].opnum))
471
              rld[t_reload].when_needed = RELOAD_OTHER;
472
          }
473
 
474
      if (t_reload == n_reloads)
475
        {
476
          /* We need to make a new tertiary reload for this register class.  */
477
          rld[t_reload].in = rld[t_reload].out = 0;
478
          rld[t_reload].class = t_class;
479
          rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
480
          rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
481
          rld[t_reload].reg_rtx = 0;
482
          rld[t_reload].optional = optional;
483
          rld[t_reload].inc = 0;
484
          /* Maybe we could combine these, but it seems too tricky.  */
485
          rld[t_reload].nocombine = 1;
486
          rld[t_reload].in_reg = 0;
487
          rld[t_reload].out_reg = 0;
488
          rld[t_reload].opnum = opnum;
489
          rld[t_reload].when_needed = secondary_type;
490
          rld[t_reload].secondary_in_reload = -1;
491
          rld[t_reload].secondary_out_reload = -1;
492
          rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
493
          rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
494
          rld[t_reload].secondary_p = 1;
495
 
496
          n_reloads++;
497
        }
498
    }
499
 
500
  /* See if we can reuse an existing secondary reload.  */
501
  for (s_reload = 0; s_reload < n_reloads; s_reload++)
502
    if (rld[s_reload].secondary_p
503
        && (reg_class_subset_p (class, rld[s_reload].class)
504
            || reg_class_subset_p (rld[s_reload].class, class))
505
        && ((in_p && rld[s_reload].inmode == mode)
506
            || (! in_p && rld[s_reload].outmode == mode))
507
        && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
508
            || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
509
        && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
510
            || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
511
        && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
512
        && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
513
                             opnum, rld[s_reload].opnum))
514
      {
515
        if (in_p)
516
          rld[s_reload].inmode = mode;
517
        if (! in_p)
518
          rld[s_reload].outmode = mode;
519
 
520
        if (reg_class_subset_p (class, rld[s_reload].class))
521
          rld[s_reload].class = class;
522
 
523
        rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
524
        rld[s_reload].optional &= optional;
525
        rld[s_reload].secondary_p = 1;
526
        if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
527
                            opnum, rld[s_reload].opnum))
528
          rld[s_reload].when_needed = RELOAD_OTHER;
529
      }
530
 
531
  if (s_reload == n_reloads)
532
    {
533
#ifdef SECONDARY_MEMORY_NEEDED
534
      /* If we need a memory location to copy between the two reload regs,
535
         set it up now.  Note that we do the input case before making
536
         the reload and the output case after.  This is due to the
537
         way reloads are output.  */
538
 
539
      if (in_p && icode == CODE_FOR_nothing
540
          && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
541
        {
542
          get_secondary_mem (x, reload_mode, opnum, type);
543
 
544
          /* We may have just added new reloads.  Make sure we add
545
             the new reload at the end.  */
546
          s_reload = n_reloads;
547
        }
548
#endif
549
 
550
      /* We need to make a new secondary reload for this register class.  */
551
      rld[s_reload].in = rld[s_reload].out = 0;
552
      rld[s_reload].class = class;
553
 
554
      rld[s_reload].inmode = in_p ? mode : VOIDmode;
555
      rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
556
      rld[s_reload].reg_rtx = 0;
557
      rld[s_reload].optional = optional;
558
      rld[s_reload].inc = 0;
559
      /* Maybe we could combine these, but it seems too tricky.  */
560
      rld[s_reload].nocombine = 1;
561
      rld[s_reload].in_reg = 0;
562
      rld[s_reload].out_reg = 0;
563
      rld[s_reload].opnum = opnum;
564
      rld[s_reload].when_needed = secondary_type;
565
      rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
566
      rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
567
      rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
568
      rld[s_reload].secondary_out_icode
569
        = ! in_p ? t_icode : CODE_FOR_nothing;
570
      rld[s_reload].secondary_p = 1;
571
 
572
      n_reloads++;
573
 
574
#ifdef SECONDARY_MEMORY_NEEDED
575
      if (! in_p && icode == CODE_FOR_nothing
576
          && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
577
        get_secondary_mem (x, mode, opnum, type);
578
#endif
579
    }
580
 
581
  *picode = icode;
582
  return s_reload;
583
}
584
#endif /* HAVE_SECONDARY_RELOADS */
585
 
586
#ifdef SECONDARY_MEMORY_NEEDED
587
 
588
/* Return a memory location that will be used to copy X in mode MODE.
589
   If we haven't already made a location for this mode in this insn,
590
   call find_reloads_address on the location being returned.  */
591
 
592
rtx
593
get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
594
                   int opnum, enum reload_type type)
595
{
596
  rtx loc;
597
  int mem_valid;
598
 
599
  /* By default, if MODE is narrower than a word, widen it to a word.
600
     This is required because most machines that require these memory
601
     locations do not support short load and stores from all registers
602
     (e.g., FP registers).  */
603
 
604
#ifdef SECONDARY_MEMORY_NEEDED_MODE
605
  mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
606
#else
607
  if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
608
    mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
609
#endif
610
 
611
  /* If we already have made a MEM for this operand in MODE, return it.  */
612
  if (secondary_memlocs_elim[(int) mode][opnum] != 0)
613
    return secondary_memlocs_elim[(int) mode][opnum];
614
 
615
  /* If this is the first time we've tried to get a MEM for this mode,
616
     allocate a new one.  `something_changed' in reload will get set
617
     by noticing that the frame size has changed.  */
618
 
619
  if (secondary_memlocs[(int) mode] == 0)
620
    {
621
#ifdef SECONDARY_MEMORY_NEEDED_RTX
622
      secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
623
#else
624
      secondary_memlocs[(int) mode]
625
        = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
626
#endif
627
    }
628
 
629
  /* Get a version of the address doing any eliminations needed.  If that
630
     didn't give us a new MEM, make a new one if it isn't valid.  */
631
 
632
  loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
633
  mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
634
 
635
  if (! mem_valid && loc == secondary_memlocs[(int) mode])
636
    loc = copy_rtx (loc);
637
 
638
  /* The only time the call below will do anything is if the stack
639
     offset is too large.  In that case IND_LEVELS doesn't matter, so we
640
     can just pass a zero.  Adjust the type to be the address of the
641
     corresponding object.  If the address was valid, save the eliminated
642
     address.  If it wasn't valid, we need to make a reload each time, so
643
     don't save it.  */
644
 
645
  if (! mem_valid)
646
    {
647
      type =  (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
648
               : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
649
               : RELOAD_OTHER);
650
 
651
      find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
652
                            opnum, type, 0, 0);
653
    }
654
 
655
  secondary_memlocs_elim[(int) mode][opnum] = loc;
656
  if (secondary_memlocs_elim_used <= (int)mode)
657
    secondary_memlocs_elim_used = (int)mode + 1;
658
  return loc;
659
}
660
 
661
/* Clear any secondary memory locations we've made.  */
662
 
663
void
664
clear_secondary_mem (void)
665
{
666
  memset (secondary_memlocs, 0, sizeof secondary_memlocs);
667
}
668
#endif /* SECONDARY_MEMORY_NEEDED */
669
 
670
 
671
/* Find the largest class which has at least one register valid in
672
   mode INNER, and which for every such register, that register number
673
   plus N is also valid in OUTER (if in range) and is cheap to move
674
   into REGNO.  Such a class must exist.  */
675
 
676
static enum reg_class
677
find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
678
                  enum machine_mode inner ATTRIBUTE_UNUSED, int n,
679
                  unsigned int dest_regno ATTRIBUTE_UNUSED)
680
{
681
  int best_cost = -1;
682
  int class;
683
  int regno;
684
  enum reg_class best_class = NO_REGS;
685
  enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
686
  unsigned int best_size = 0;
687
  int cost;
688
 
689
  for (class = 1; class < N_REG_CLASSES; class++)
690
    {
691
      int bad = 0;
692
      int good = 0;
693
      for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
694
        if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
695
          {
696
            if (HARD_REGNO_MODE_OK (regno, inner))
697
              {
698
                good = 1;
699
                if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
700
                    || ! HARD_REGNO_MODE_OK (regno + n, outer))
701
                  bad = 1;
702
              }
703
          }
704
 
705
      if (bad || !good)
706
        continue;
707
      cost = REGISTER_MOVE_COST (outer, class, dest_class);
708
 
709
      if ((reg_class_size[class] > best_size
710
           && (best_cost < 0 || best_cost >= cost))
711
          || best_cost > cost)
712
        {
713
          best_class = class;
714
          best_size = reg_class_size[class];
715
          best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
716
        }
717
    }
718
 
719
  gcc_assert (best_size != 0);
720
 
721
  return best_class;
722
}
723
 
724
/* Return the number of a previously made reload that can be combined with
725
   a new one, or n_reloads if none of the existing reloads can be used.
726
   OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
727
   push_reload, they determine the kind of the new reload that we try to
728
   combine.  P_IN points to the corresponding value of IN, which can be
729
   modified by this function.
730
   DONT_SHARE is nonzero if we can't share any input-only reload for IN.  */
731
 
732
static int
733
find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
734
                      enum reload_type type, int opnum, int dont_share)
735
{
736
  rtx in = *p_in;
737
  int i;
738
  /* We can't merge two reloads if the output of either one is
739
     earlyclobbered.  */
740
 
741
  if (earlyclobber_operand_p (out))
742
    return n_reloads;
743
 
744
  /* We can use an existing reload if the class is right
745
     and at least one of IN and OUT is a match
746
     and the other is at worst neutral.
747
     (A zero compared against anything is neutral.)
748
 
749
     If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
750
     for the same thing since that can cause us to need more reload registers
751
     than we otherwise would.  */
752
 
753
  for (i = 0; i < n_reloads; i++)
754
    if ((reg_class_subset_p (class, rld[i].class)
755
         || reg_class_subset_p (rld[i].class, class))
756
        /* If the existing reload has a register, it must fit our class.  */
757
        && (rld[i].reg_rtx == 0
758
            || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
759
                                  true_regnum (rld[i].reg_rtx)))
760
        && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
761
             && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
762
            || (out != 0 && MATCHES (rld[i].out, out)
763
                && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
764
        && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
765
        && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
766
        && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
767
      return i;
768
 
769
  /* Reloading a plain reg for input can match a reload to postincrement
770
     that reg, since the postincrement's value is the right value.
771
     Likewise, it can match a preincrement reload, since we regard
772
     the preincrementation as happening before any ref in this insn
773
     to that register.  */
774
  for (i = 0; i < n_reloads; i++)
775
    if ((reg_class_subset_p (class, rld[i].class)
776
         || reg_class_subset_p (rld[i].class, class))
777
        /* If the existing reload has a register, it must fit our
778
           class.  */
779
        && (rld[i].reg_rtx == 0
780
            || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
781
                                  true_regnum (rld[i].reg_rtx)))
782
        && out == 0 && rld[i].out == 0 && rld[i].in != 0
783
        && ((REG_P (in)
784
             && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
785
             && MATCHES (XEXP (rld[i].in, 0), in))
786
            || (REG_P (rld[i].in)
787
                && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
788
                && MATCHES (XEXP (in, 0), rld[i].in)))
789
        && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
790
        && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
791
        && MERGABLE_RELOADS (type, rld[i].when_needed,
792
                             opnum, rld[i].opnum))
793
      {
794
        /* Make sure reload_in ultimately has the increment,
795
           not the plain register.  */
796
        if (REG_P (in))
797
          *p_in = rld[i].in;
798
        return i;
799
      }
800
  return n_reloads;
801
}
802
 
803
/* Return nonzero if X is a SUBREG which will require reloading of its
804
   SUBREG_REG expression.  */
805
 
806
static int
807
reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
808
{
809
  rtx inner;
810
 
811
  /* Only SUBREGs are problematical.  */
812
  if (GET_CODE (x) != SUBREG)
813
    return 0;
814
 
815
  inner = SUBREG_REG (x);
816
 
817
  /* If INNER is a constant or PLUS, then INNER must be reloaded.  */
818
  if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
819
    return 1;
820
 
821
  /* If INNER is not a hard register, then INNER will not need to
822
     be reloaded.  */
823
  if (!REG_P (inner)
824
      || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
825
    return 0;
826
 
827
  /* If INNER is not ok for MODE, then INNER will need reloading.  */
828
  if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
829
    return 1;
830
 
831
  /* If the outer part is a word or smaller, INNER larger than a
832
     word and the number of regs for INNER is not the same as the
833
     number of words in INNER, then INNER will need reloading.  */
834
  return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
835
          && output
836
          && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
837
          && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
838
              != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
839
}
840
 
841
/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
842
   requiring an extra reload register.  The caller has already found that
843
   IN contains some reference to REGNO, so check that we can produce the
844
   new value in a single step.  E.g. if we have
845
   (set (reg r13) (plus (reg r13) (const int 1))), and there is an
846
   instruction that adds one to a register, this should succeed.
847
   However, if we have something like
848
   (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
849
   needs to be loaded into a register first, we need a separate reload
850
   register.
851
   Such PLUS reloads are generated by find_reload_address_part.
852
   The out-of-range PLUS expressions are usually introduced in the instruction
853
   patterns by register elimination and substituting pseudos without a home
854
   by their function-invariant equivalences.  */
855
static int
856
can_reload_into (rtx in, int regno, enum machine_mode mode)
857
{
858
  rtx dst, test_insn;
859
  int r = 0;
860
  struct recog_data save_recog_data;
861
 
862
  /* For matching constraints, we often get notional input reloads where
863
     we want to use the original register as the reload register.  I.e.
864
     technically this is a non-optional input-output reload, but IN is
865
     already a valid register, and has been chosen as the reload register.
866
     Speed this up, since it trivially works.  */
867
  if (REG_P (in))
868
    return 1;
869
 
870
  /* To test MEMs properly, we'd have to take into account all the reloads
871
     that are already scheduled, which can become quite complicated.
872
     And since we've already handled address reloads for this MEM, it
873
     should always succeed anyway.  */
874
  if (MEM_P (in))
875
    return 1;
876
 
877
  /* If we can make a simple SET insn that does the job, everything should
878
     be fine.  */
879
  dst =  gen_rtx_REG (mode, regno);
880
  test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
881
  save_recog_data = recog_data;
882
  if (recog_memoized (test_insn) >= 0)
883
    {
884
      extract_insn (test_insn);
885
      r = constrain_operands (1);
886
    }
887
  recog_data = save_recog_data;
888
  return r;
889
}
890
 
891
/* Record one reload that needs to be performed.
892
   IN is an rtx saying where the data are to be found before this instruction.
893
   OUT says where they must be stored after the instruction.
894
   (IN is zero for data not read, and OUT is zero for data not written.)
895
   INLOC and OUTLOC point to the places in the instructions where
896
   IN and OUT were found.
897
   If IN and OUT are both nonzero, it means the same register must be used
898
   to reload both IN and OUT.
899
 
900
   CLASS is a register class required for the reloaded data.
901
   INMODE is the machine mode that the instruction requires
902
   for the reg that replaces IN and OUTMODE is likewise for OUT.
903
 
904
   If IN is zero, then OUT's location and mode should be passed as
905
   INLOC and INMODE.
906
 
907
   STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
908
 
909
   OPTIONAL nonzero means this reload does not need to be performed:
910
   it can be discarded if that is more convenient.
911
 
912
   OPNUM and TYPE say what the purpose of this reload is.
913
 
914
   The return value is the reload-number for this reload.
915
 
916
   If both IN and OUT are nonzero, in some rare cases we might
917
   want to make two separate reloads.  (Actually we never do this now.)
918
   Therefore, the reload-number for OUT is stored in
919
   output_reloadnum when we return; the return value applies to IN.
920
   Usually (presently always), when IN and OUT are nonzero,
921
   the two reload-numbers are equal, but the caller should be careful to
922
   distinguish them.  */
923
 
924
int
925
push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
926
             enum reg_class class, enum machine_mode inmode,
927
             enum machine_mode outmode, int strict_low, int optional,
928
             int opnum, enum reload_type type)
929
{
930
  int i;
931
  int dont_share = 0;
932
  int dont_remove_subreg = 0;
933
  rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
934
  int secondary_in_reload = -1, secondary_out_reload = -1;
935
  enum insn_code secondary_in_icode = CODE_FOR_nothing;
936
  enum insn_code secondary_out_icode = CODE_FOR_nothing;
937
 
938
  /* INMODE and/or OUTMODE could be VOIDmode if no mode
939
     has been specified for the operand.  In that case,
940
     use the operand's mode as the mode to reload.  */
941
  if (inmode == VOIDmode && in != 0)
942
    inmode = GET_MODE (in);
943
  if (outmode == VOIDmode && out != 0)
944
    outmode = GET_MODE (out);
945
 
946
  /* If IN is a pseudo register everywhere-equivalent to a constant, and
947
     it is not in a hard register, reload straight from the constant,
948
     since we want to get rid of such pseudo registers.
949
     Often this is done earlier, but not always in find_reloads_address.  */
950
  if (in != 0 && REG_P (in))
951
    {
952
      int regno = REGNO (in);
953
 
954
      if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
955
          && reg_equiv_constant[regno] != 0)
956
        in = reg_equiv_constant[regno];
957
    }
958
 
959
  /* Likewise for OUT.  Of course, OUT will never be equivalent to
960
     an actual constant, but it might be equivalent to a memory location
961
     (in the case of a parameter).  */
962
  if (out != 0 && REG_P (out))
963
    {
964
      int regno = REGNO (out);
965
 
966
      if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
967
          && reg_equiv_constant[regno] != 0)
968
        out = reg_equiv_constant[regno];
969
    }
970
 
971
  /* If we have a read-write operand with an address side-effect,
972
     change either IN or OUT so the side-effect happens only once.  */
973
  if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
974
    switch (GET_CODE (XEXP (in, 0)))
975
      {
976
      case POST_INC: case POST_DEC:   case POST_MODIFY:
977
        in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
978
        break;
979
 
980
      case PRE_INC: case PRE_DEC: case PRE_MODIFY:
981
        out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
982
        break;
983
 
984
      default:
985
        break;
986
      }
987
 
988
  /* If we are reloading a (SUBREG constant ...), really reload just the
989
     inside expression in its own mode.  Similarly for (SUBREG (PLUS ...)).
990
     If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
991
     a pseudo and hence will become a MEM) with M1 wider than M2 and the
992
     register is a pseudo, also reload the inside expression.
993
     For machines that extend byte loads, do this for any SUBREG of a pseudo
994
     where both M1 and M2 are a word or smaller, M1 is wider than M2, and
995
     M2 is an integral mode that gets extended when loaded.
996
     Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
997
     either M1 is not valid for R or M2 is wider than a word but we only
998
     need one word to store an M2-sized quantity in R.
999
     (However, if OUT is nonzero, we need to reload the reg *and*
1000
     the subreg, so do nothing here, and let following statement handle it.)
1001
 
1002
     Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1003
     we can't handle it here because CONST_INT does not indicate a mode.
1004
 
1005
     Similarly, we must reload the inside expression if we have a
1006
     STRICT_LOW_PART (presumably, in == out in the cas).
1007
 
1008
     Also reload the inner expression if it does not require a secondary
1009
     reload but the SUBREG does.
1010
 
1011
     Finally, reload the inner expression if it is a register that is in
1012
     the class whose registers cannot be referenced in a different size
1013
     and M1 is not the same size as M2.  If subreg_lowpart_p is false, we
1014
     cannot reload just the inside since we might end up with the wrong
1015
     register class.  But if it is inside a STRICT_LOW_PART, we have
1016
     no choice, so we hope we do get the right register class there.  */
1017
 
1018
  if (in != 0 && GET_CODE (in) == SUBREG
1019
      && (subreg_lowpart_p (in) || strict_low)
1020
#ifdef CANNOT_CHANGE_MODE_CLASS
1021
      && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1022
#endif
1023
      && (CONSTANT_P (SUBREG_REG (in))
1024
          || GET_CODE (SUBREG_REG (in)) == PLUS
1025
          || strict_low
1026
          || (((REG_P (SUBREG_REG (in))
1027
                && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1028
               || MEM_P (SUBREG_REG (in)))
1029
              && ((GET_MODE_SIZE (inmode)
1030
                   > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1031
#ifdef LOAD_EXTEND_OP
1032
                  || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1033
                      && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1034
                          <= UNITS_PER_WORD)
1035
                      && (GET_MODE_SIZE (inmode)
1036
                          > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1037
                      && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1038
                      && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1039
#endif
1040
#ifdef WORD_REGISTER_OPERATIONS
1041
                  || ((GET_MODE_SIZE (inmode)
1042
                       < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1043
                      && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1044
                          ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1045
                           / UNITS_PER_WORD)))
1046
#endif
1047
                  ))
1048
          || (REG_P (SUBREG_REG (in))
1049
              && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1050
              /* The case where out is nonzero
1051
                 is handled differently in the following statement.  */
1052
              && (out == 0 || subreg_lowpart_p (in))
1053
              && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1054
                   && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1055
                       > UNITS_PER_WORD)
1056
                   && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1057
                        / UNITS_PER_WORD)
1058
                       != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1059
                                                [GET_MODE (SUBREG_REG (in))]))
1060
                  || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1061
#ifdef SECONDARY_INPUT_RELOAD_CLASS
1062
          || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1063
              && (SECONDARY_INPUT_RELOAD_CLASS (class,
1064
                                                GET_MODE (SUBREG_REG (in)),
1065
                                                SUBREG_REG (in))
1066
                  == NO_REGS))
1067
#endif
1068
#ifdef CANNOT_CHANGE_MODE_CLASS
1069
          || (REG_P (SUBREG_REG (in))
1070
              && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1071
              && REG_CANNOT_CHANGE_MODE_P
1072
              (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1073
#endif
1074
          ))
1075
    {
1076
      in_subreg_loc = inloc;
1077
      inloc = &SUBREG_REG (in);
1078
      in = *inloc;
1079
#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1080
      if (MEM_P (in))
1081
        /* This is supposed to happen only for paradoxical subregs made by
1082
           combine.c.  (SUBREG (MEM)) isn't supposed to occur other ways.  */
1083
        gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1084
#endif
1085
      inmode = GET_MODE (in);
1086
    }
1087
 
1088
  /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1089
     either M1 is not valid for R or M2 is wider than a word but we only
1090
     need one word to store an M2-sized quantity in R.
1091
 
1092
     However, we must reload the inner reg *as well as* the subreg in
1093
     that case.  */
1094
 
1095
  /* Similar issue for (SUBREG constant ...) if it was not handled by the
1096
     code above.  This can happen if SUBREG_BYTE != 0.  */
1097
 
1098
  if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1099
    {
1100
      enum reg_class in_class = class;
1101
 
1102
      if (REG_P (SUBREG_REG (in)))
1103
        in_class
1104
          = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1105
                              subreg_regno_offset (REGNO (SUBREG_REG (in)),
1106
                                                   GET_MODE (SUBREG_REG (in)),
1107
                                                   SUBREG_BYTE (in),
1108
                                                   GET_MODE (in)),
1109
                              REGNO (SUBREG_REG (in)));
1110
 
1111
      /* This relies on the fact that emit_reload_insns outputs the
1112
         instructions for input reloads of type RELOAD_OTHER in the same
1113
         order as the reloads.  Thus if the outer reload is also of type
1114
         RELOAD_OTHER, we are guaranteed that this inner reload will be
1115
         output before the outer reload.  */
1116
      push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1117
                   in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1118
      dont_remove_subreg = 1;
1119
    }
1120
 
1121
  /* Similarly for paradoxical and problematical SUBREGs on the output.
1122
     Note that there is no reason we need worry about the previous value
1123
     of SUBREG_REG (out); even if wider than out,
1124
     storing in a subreg is entitled to clobber it all
1125
     (except in the case of STRICT_LOW_PART,
1126
     and in that case the constraint should label it input-output.)  */
1127
  if (out != 0 && GET_CODE (out) == SUBREG
1128
      && (subreg_lowpart_p (out) || strict_low)
1129
#ifdef CANNOT_CHANGE_MODE_CLASS
1130
      && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1131
#endif
1132
      && (CONSTANT_P (SUBREG_REG (out))
1133
          || strict_low
1134
          || (((REG_P (SUBREG_REG (out))
1135
                && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1136
               || MEM_P (SUBREG_REG (out)))
1137
              && ((GET_MODE_SIZE (outmode)
1138
                   > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1139
#ifdef WORD_REGISTER_OPERATIONS
1140
                  || ((GET_MODE_SIZE (outmode)
1141
                       < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1142
                      && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1143
                          ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1144
                           / UNITS_PER_WORD)))
1145
#endif
1146
                  ))
1147
          || (REG_P (SUBREG_REG (out))
1148
              && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1149
              && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1150
                   && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1151
                       > UNITS_PER_WORD)
1152
                   && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1153
                        / UNITS_PER_WORD)
1154
                       != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1155
                                                [GET_MODE (SUBREG_REG (out))]))
1156
                  || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1157
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1158
          || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1159
              && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1160
                                                 GET_MODE (SUBREG_REG (out)),
1161
                                                 SUBREG_REG (out))
1162
                  == NO_REGS))
1163
#endif
1164
#ifdef CANNOT_CHANGE_MODE_CLASS
1165
          || (REG_P (SUBREG_REG (out))
1166
              && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1167
              && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1168
                                           GET_MODE (SUBREG_REG (out)),
1169
                                           outmode))
1170
#endif
1171
          ))
1172
    {
1173
      out_subreg_loc = outloc;
1174
      outloc = &SUBREG_REG (out);
1175
      out = *outloc;
1176
#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1177
      gcc_assert (!MEM_P (out)
1178
                  || GET_MODE_SIZE (GET_MODE (out))
1179
                     <= GET_MODE_SIZE (outmode));
1180
#endif
1181
      outmode = GET_MODE (out);
1182
    }
1183
 
1184
  /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1185
     either M1 is not valid for R or M2 is wider than a word but we only
1186
     need one word to store an M2-sized quantity in R.
1187
 
1188
     However, we must reload the inner reg *as well as* the subreg in
1189
     that case.  In this case, the inner reg is an in-out reload.  */
1190
 
1191
  if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1192
    {
1193
      /* This relies on the fact that emit_reload_insns outputs the
1194
         instructions for output reloads of type RELOAD_OTHER in reverse
1195
         order of the reloads.  Thus if the outer reload is also of type
1196
         RELOAD_OTHER, we are guaranteed that this inner reload will be
1197
         output after the outer reload.  */
1198
      dont_remove_subreg = 1;
1199
      push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1200
                   &SUBREG_REG (out),
1201
                   find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1202
                                     subreg_regno_offset (REGNO (SUBREG_REG (out)),
1203
                                                          GET_MODE (SUBREG_REG (out)),
1204
                                                          SUBREG_BYTE (out),
1205
                                                          GET_MODE (out)),
1206
                                     REGNO (SUBREG_REG (out))),
1207
                   VOIDmode, VOIDmode, 0, 0,
1208
                   opnum, RELOAD_OTHER);
1209
    }
1210
 
1211
  /* If IN appears in OUT, we can't share any input-only reload for IN.  */
1212
  if (in != 0 && out != 0 && MEM_P (out)
1213
      && (REG_P (in) || MEM_P (in))
1214
      && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1215
    dont_share = 1;
1216
 
1217
  /* If IN is a SUBREG of a hard register, make a new REG.  This
1218
     simplifies some of the cases below.  */
1219
 
1220
  if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1221
      && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1222
      && ! dont_remove_subreg)
1223
    in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1224
 
1225
  /* Similarly for OUT.  */
1226
  if (out != 0 && GET_CODE (out) == SUBREG
1227
      && REG_P (SUBREG_REG (out))
1228
      && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1229
      && ! dont_remove_subreg)
1230
    out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1231
 
1232
  /* Narrow down the class of register wanted if that is
1233
     desirable on this machine for efficiency.  */
1234
  if (in != 0)
1235
    class = PREFERRED_RELOAD_CLASS (in, class);
1236
 
1237
  /* Output reloads may need analogous treatment, different in detail.  */
1238
#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1239
  if (out != 0)
1240
    class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1241
#endif
1242
 
1243
  /* Make sure we use a class that can handle the actual pseudo
1244
     inside any subreg.  For example, on the 386, QImode regs
1245
     can appear within SImode subregs.  Although GENERAL_REGS
1246
     can handle SImode, QImode needs a smaller class.  */
1247
#ifdef LIMIT_RELOAD_CLASS
1248
  if (in_subreg_loc)
1249
    class = LIMIT_RELOAD_CLASS (inmode, class);
1250
  else if (in != 0 && GET_CODE (in) == SUBREG)
1251
    class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1252
 
1253
  if (out_subreg_loc)
1254
    class = LIMIT_RELOAD_CLASS (outmode, class);
1255
  if (out != 0 && GET_CODE (out) == SUBREG)
1256
    class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1257
#endif
1258
 
1259
  /* Verify that this class is at least possible for the mode that
1260
     is specified.  */
1261
  if (this_insn_is_asm)
1262
    {
1263
      enum machine_mode mode;
1264
      if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1265
        mode = inmode;
1266
      else
1267
        mode = outmode;
1268
      if (mode == VOIDmode)
1269
        {
1270
          error_for_asm (this_insn, "cannot reload integer constant "
1271
                         "operand in %<asm%>");
1272
          mode = word_mode;
1273
          if (in != 0)
1274
            inmode = word_mode;
1275
          if (out != 0)
1276
            outmode = word_mode;
1277
        }
1278
      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1279
        if (HARD_REGNO_MODE_OK (i, mode)
1280
            && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1281
          {
1282
            int nregs = hard_regno_nregs[i][mode];
1283
 
1284
            int j;
1285
            for (j = 1; j < nregs; j++)
1286
              if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1287
                break;
1288
            if (j == nregs)
1289
              break;
1290
          }
1291
      if (i == FIRST_PSEUDO_REGISTER)
1292
        {
1293
          error_for_asm (this_insn, "impossible register constraint "
1294
                         "in %<asm%>");
1295
          class = ALL_REGS;
1296
        }
1297
    }
1298
 
1299
  /* Optional output reloads are always OK even if we have no register class,
1300
     since the function of these reloads is only to have spill_reg_store etc.
1301
     set, so that the storing insn can be deleted later.  */
1302
  gcc_assert (class != NO_REGS
1303
              || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1304
 
1305
  i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1306
 
1307
  if (i == n_reloads)
1308
    {
1309
      /* See if we need a secondary reload register to move between CLASS
1310
         and IN or CLASS and OUT.  Get the icode and push any required reloads
1311
         needed for each of them if so.  */
1312
 
1313
#ifdef SECONDARY_INPUT_RELOAD_CLASS
1314
      if (in != 0)
1315
        secondary_in_reload
1316
          = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1317
                                   &secondary_in_icode);
1318
#endif
1319
 
1320
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1321
      if (out != 0 && GET_CODE (out) != SCRATCH)
1322
        secondary_out_reload
1323
          = push_secondary_reload (0, out, opnum, optional, class, outmode,
1324
                                   type, &secondary_out_icode);
1325
#endif
1326
 
1327
      /* We found no existing reload suitable for re-use.
1328
         So add an additional reload.  */
1329
 
1330
#ifdef SECONDARY_MEMORY_NEEDED
1331
      /* If a memory location is needed for the copy, make one.  */
1332
      if (in != 0
1333
          && (REG_P (in)
1334
              || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1335
          && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1336
          && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1337
                                      class, inmode))
1338
        get_secondary_mem (in, inmode, opnum, type);
1339
#endif
1340
 
1341
      i = n_reloads;
1342
      rld[i].in = in;
1343
      rld[i].out = out;
1344
      rld[i].class = class;
1345
      rld[i].inmode = inmode;
1346
      rld[i].outmode = outmode;
1347
      rld[i].reg_rtx = 0;
1348
      rld[i].optional = optional;
1349
      rld[i].inc = 0;
1350
      rld[i].nocombine = 0;
1351
      rld[i].in_reg = inloc ? *inloc : 0;
1352
      rld[i].out_reg = outloc ? *outloc : 0;
1353
      rld[i].opnum = opnum;
1354
      rld[i].when_needed = type;
1355
      rld[i].secondary_in_reload = secondary_in_reload;
1356
      rld[i].secondary_out_reload = secondary_out_reload;
1357
      rld[i].secondary_in_icode = secondary_in_icode;
1358
      rld[i].secondary_out_icode = secondary_out_icode;
1359
      rld[i].secondary_p = 0;
1360
 
1361
      n_reloads++;
1362
 
1363
#ifdef SECONDARY_MEMORY_NEEDED
1364
      if (out != 0
1365
          && (REG_P (out)
1366
              || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1367
          && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1368
          && SECONDARY_MEMORY_NEEDED (class,
1369
                                      REGNO_REG_CLASS (reg_or_subregno (out)),
1370
                                      outmode))
1371
        get_secondary_mem (out, outmode, opnum, type);
1372
#endif
1373
    }
1374
  else
1375
    {
1376
      /* We are reusing an existing reload,
1377
         but we may have additional information for it.
1378
         For example, we may now have both IN and OUT
1379
         while the old one may have just one of them.  */
1380
 
1381
      /* The modes can be different.  If they are, we want to reload in
1382
         the larger mode, so that the value is valid for both modes.  */
1383
      if (inmode != VOIDmode
1384
          && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1385
        rld[i].inmode = inmode;
1386
      if (outmode != VOIDmode
1387
          && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1388
        rld[i].outmode = outmode;
1389
      if (in != 0)
1390
        {
1391
          rtx in_reg = inloc ? *inloc : 0;
1392
          /* If we merge reloads for two distinct rtl expressions that
1393
             are identical in content, there might be duplicate address
1394
             reloads.  Remove the extra set now, so that if we later find
1395
             that we can inherit this reload, we can get rid of the
1396
             address reloads altogether.
1397
 
1398
             Do not do this if both reloads are optional since the result
1399
             would be an optional reload which could potentially leave
1400
             unresolved address replacements.
1401
 
1402
             It is not sufficient to call transfer_replacements since
1403
             choose_reload_regs will remove the replacements for address
1404
             reloads of inherited reloads which results in the same
1405
             problem.  */
1406
          if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1407
              && ! (rld[i].optional && optional))
1408
            {
1409
              /* We must keep the address reload with the lower operand
1410
                 number alive.  */
1411
              if (opnum > rld[i].opnum)
1412
                {
1413
                  remove_address_replacements (in);
1414
                  in = rld[i].in;
1415
                  in_reg = rld[i].in_reg;
1416
                }
1417
              else
1418
                remove_address_replacements (rld[i].in);
1419
            }
1420
          rld[i].in = in;
1421
          rld[i].in_reg = in_reg;
1422
        }
1423
      if (out != 0)
1424
        {
1425
          rld[i].out = out;
1426
          rld[i].out_reg = outloc ? *outloc : 0;
1427
        }
1428
      if (reg_class_subset_p (class, rld[i].class))
1429
        rld[i].class = class;
1430
      rld[i].optional &= optional;
1431
      if (MERGE_TO_OTHER (type, rld[i].when_needed,
1432
                          opnum, rld[i].opnum))
1433
        rld[i].when_needed = RELOAD_OTHER;
1434
      rld[i].opnum = MIN (rld[i].opnum, opnum);
1435
    }
1436
 
1437
  /* If the ostensible rtx being reloaded differs from the rtx found
1438
     in the location to substitute, this reload is not safe to combine
1439
     because we cannot reliably tell whether it appears in the insn.  */
1440
 
1441
  if (in != 0 && in != *inloc)
1442
    rld[i].nocombine = 1;
1443
 
1444
#if 0
1445
  /* This was replaced by changes in find_reloads_address_1 and the new
1446
     function inc_for_reload, which go with a new meaning of reload_inc.  */
1447
 
1448
  /* If this is an IN/OUT reload in an insn that sets the CC,
1449
     it must be for an autoincrement.  It doesn't work to store
1450
     the incremented value after the insn because that would clobber the CC.
1451
     So we must do the increment of the value reloaded from,
1452
     increment it, store it back, then decrement again.  */
1453
  if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1454
    {
1455
      out = 0;
1456
      rld[i].out = 0;
1457
      rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1458
      /* If we did not find a nonzero amount-to-increment-by,
1459
         that contradicts the belief that IN is being incremented
1460
         in an address in this insn.  */
1461
      gcc_assert (rld[i].inc != 0);
1462
    }
1463
#endif
1464
 
1465
  /* If we will replace IN and OUT with the reload-reg,
1466
     record where they are located so that substitution need
1467
     not do a tree walk.  */
1468
 
1469
  if (replace_reloads)
1470
    {
1471
      if (inloc != 0)
1472
        {
1473
          struct replacement *r = &replacements[n_replacements++];
1474
          r->what = i;
1475
          r->subreg_loc = in_subreg_loc;
1476
          r->where = inloc;
1477
          r->mode = inmode;
1478
        }
1479
      if (outloc != 0 && outloc != inloc)
1480
        {
1481
          struct replacement *r = &replacements[n_replacements++];
1482
          r->what = i;
1483
          r->where = outloc;
1484
          r->subreg_loc = out_subreg_loc;
1485
          r->mode = outmode;
1486
        }
1487
    }
1488
 
1489
  /* If this reload is just being introduced and it has both
1490
     an incoming quantity and an outgoing quantity that are
1491
     supposed to be made to match, see if either one of the two
1492
     can serve as the place to reload into.
1493
 
1494
     If one of them is acceptable, set rld[i].reg_rtx
1495
     to that one.  */
1496
 
1497
  if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1498
    {
1499
      rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1500
                                          inmode, outmode,
1501
                                          rld[i].class, i,
1502
                                          earlyclobber_operand_p (out));
1503
 
1504
      /* If the outgoing register already contains the same value
1505
         as the incoming one, we can dispense with loading it.
1506
         The easiest way to tell the caller that is to give a phony
1507
         value for the incoming operand (same as outgoing one).  */
1508
      if (rld[i].reg_rtx == out
1509
          && (REG_P (in) || CONSTANT_P (in))
1510
          && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1511
                                  static_reload_reg_p, i, inmode))
1512
        rld[i].in = out;
1513
    }
1514
 
1515
  /* If this is an input reload and the operand contains a register that
1516
     dies in this insn and is used nowhere else, see if it is the right class
1517
     to be used for this reload.  Use it if so.  (This occurs most commonly
1518
     in the case of paradoxical SUBREGs and in-out reloads).  We cannot do
1519
     this if it is also an output reload that mentions the register unless
1520
     the output is a SUBREG that clobbers an entire register.
1521
 
1522
     Note that the operand might be one of the spill regs, if it is a
1523
     pseudo reg and we are in a block where spilling has not taken place.
1524
     But if there is no spilling in this block, that is OK.
1525
     An explicitly used hard reg cannot be a spill reg.  */
1526
 
1527
  if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1528
    {
1529
      rtx note;
1530
      int regno;
1531
      enum machine_mode rel_mode = inmode;
1532
 
1533
      if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1534
        rel_mode = outmode;
1535
 
1536
      for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1537
        if (REG_NOTE_KIND (note) == REG_DEAD
1538
            && REG_P (XEXP (note, 0))
1539
            && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1540
            && reg_mentioned_p (XEXP (note, 0), in)
1541
            /* Check that we don't use a hardreg for an uninitialized
1542
               pseudo.  See also find_dummy_reload().  */
1543
            && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1544
                || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1545
                                   ORIGINAL_REGNO (XEXP (note, 0))))
1546
            && ! refers_to_regno_for_reload_p (regno,
1547
                                               (regno
1548
                                                + hard_regno_nregs[regno]
1549
                                                                  [rel_mode]),
1550
                                               PATTERN (this_insn), inloc)
1551
            /* If this is also an output reload, IN cannot be used as
1552
               the reload register if it is set in this insn unless IN
1553
               is also OUT.  */
1554
            && (out == 0 || in == out
1555
                || ! hard_reg_set_here_p (regno,
1556
                                          (regno
1557
                                           + hard_regno_nregs[regno]
1558
                                                             [rel_mode]),
1559
                                          PATTERN (this_insn)))
1560
            /* ??? Why is this code so different from the previous?
1561
               Is there any simple coherent way to describe the two together?
1562
               What's going on here.  */
1563
            && (in != out
1564
                || (GET_CODE (in) == SUBREG
1565
                    && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1566
                         / UNITS_PER_WORD)
1567
                        == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1568
                             + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1569
            /* Make sure the operand fits in the reg that dies.  */
1570
            && (GET_MODE_SIZE (rel_mode)
1571
                <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1572
            && HARD_REGNO_MODE_OK (regno, inmode)
1573
            && HARD_REGNO_MODE_OK (regno, outmode))
1574
          {
1575
            unsigned int offs;
1576
            unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1577
                                      hard_regno_nregs[regno][outmode]);
1578
 
1579
            for (offs = 0; offs < nregs; offs++)
1580
              if (fixed_regs[regno + offs]
1581
                  || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1582
                                          regno + offs))
1583
                break;
1584
 
1585
            if (offs == nregs
1586
                && (! (refers_to_regno_for_reload_p
1587
                       (regno, (regno + hard_regno_nregs[regno][inmode]),
1588
                                in, (rtx *)0))
1589
                    || can_reload_into (in, regno, inmode)))
1590
              {
1591
                rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1592
                break;
1593
              }
1594
          }
1595
    }
1596
 
1597
  if (out)
1598
    output_reloadnum = i;
1599
 
1600
  return i;
1601
}
1602
 
1603
/* Record an additional place we must replace a value
1604
   for which we have already recorded a reload.
1605
   RELOADNUM is the value returned by push_reload
1606
   when the reload was recorded.
1607
   This is used in insn patterns that use match_dup.  */
1608
 
1609
static void
1610
push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1611
{
1612
  if (replace_reloads)
1613
    {
1614
      struct replacement *r = &replacements[n_replacements++];
1615
      r->what = reloadnum;
1616
      r->where = loc;
1617
      r->subreg_loc = 0;
1618
      r->mode = mode;
1619
    }
1620
}
1621
 
1622
/* Duplicate any replacement we have recorded to apply at
1623
   location ORIG_LOC to also be performed at DUP_LOC.
1624
   This is used in insn patterns that use match_dup.  */
1625
 
1626
static void
1627
dup_replacements (rtx *dup_loc, rtx *orig_loc)
1628
{
1629
  int i, n = n_replacements;
1630
 
1631
  for (i = 0; i < n; i++)
1632
    {
1633
      struct replacement *r = &replacements[i];
1634
      if (r->where == orig_loc)
1635
        push_replacement (dup_loc, r->what, r->mode);
1636
    }
1637
}
1638
 
1639
/* Transfer all replacements that used to be in reload FROM to be in
1640
   reload TO.  */
1641
 
1642
void
1643
transfer_replacements (int to, int from)
1644
{
1645
  int i;
1646
 
1647
  for (i = 0; i < n_replacements; i++)
1648
    if (replacements[i].what == from)
1649
      replacements[i].what = to;
1650
}
1651
 
1652
/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1653
   or a subpart of it.  If we have any replacements registered for IN_RTX,
1654
   cancel the reloads that were supposed to load them.
1655
   Return nonzero if we canceled any reloads.  */
1656
int
1657
remove_address_replacements (rtx in_rtx)
1658
{
1659
  int i, j;
1660
  char reload_flags[MAX_RELOADS];
1661
  int something_changed = 0;
1662
 
1663
  memset (reload_flags, 0, sizeof reload_flags);
1664
  for (i = 0, j = 0; i < n_replacements; i++)
1665
    {
1666
      if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1667
        reload_flags[replacements[i].what] |= 1;
1668
      else
1669
        {
1670
          replacements[j++] = replacements[i];
1671
          reload_flags[replacements[i].what] |= 2;
1672
        }
1673
    }
1674
  /* Note that the following store must be done before the recursive calls.  */
1675
  n_replacements = j;
1676
 
1677
  for (i = n_reloads - 1; i >= 0; i--)
1678
    {
1679
      if (reload_flags[i] == 1)
1680
        {
1681
          deallocate_reload_reg (i);
1682
          remove_address_replacements (rld[i].in);
1683
          rld[i].in = 0;
1684
          something_changed = 1;
1685
        }
1686
    }
1687
  return something_changed;
1688
}
1689
 
1690
/* If there is only one output reload, and it is not for an earlyclobber
1691
   operand, try to combine it with a (logically unrelated) input reload
1692
   to reduce the number of reload registers needed.
1693
 
1694
   This is safe if the input reload does not appear in
1695
   the value being output-reloaded, because this implies
1696
   it is not needed any more once the original insn completes.
1697
 
1698
   If that doesn't work, see we can use any of the registers that
1699
   die in this insn as a reload register.  We can if it is of the right
1700
   class and does not appear in the value being output-reloaded.  */
1701
 
1702
static void
1703
combine_reloads (void)
1704
{
1705
  int i;
1706
  int output_reload = -1;
1707
  int secondary_out = -1;
1708
  rtx note;
1709
 
1710
  /* Find the output reload; return unless there is exactly one
1711
     and that one is mandatory.  */
1712
 
1713
  for (i = 0; i < n_reloads; i++)
1714
    if (rld[i].out != 0)
1715
      {
1716
        if (output_reload >= 0)
1717
          return;
1718
        output_reload = i;
1719
      }
1720
 
1721
  if (output_reload < 0 || rld[output_reload].optional)
1722
    return;
1723
 
1724
  /* An input-output reload isn't combinable.  */
1725
 
1726
  if (rld[output_reload].in != 0)
1727
    return;
1728
 
1729
  /* If this reload is for an earlyclobber operand, we can't do anything.  */
1730
  if (earlyclobber_operand_p (rld[output_reload].out))
1731
    return;
1732
 
1733
  /* If there is a reload for part of the address of this operand, we would
1734
     need to chnage it to RELOAD_FOR_OTHER_ADDRESS.  But that would extend
1735
     its life to the point where doing this combine would not lower the
1736
     number of spill registers needed.  */
1737
  for (i = 0; i < n_reloads; i++)
1738
    if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1739
         || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1740
        && rld[i].opnum == rld[output_reload].opnum)
1741
      return;
1742
 
1743
  /* Check each input reload; can we combine it?  */
1744
 
1745
  for (i = 0; i < n_reloads; i++)
1746
    if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1747
        /* Life span of this reload must not extend past main insn.  */
1748
        && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1749
        && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1750
        && rld[i].when_needed != RELOAD_OTHER
1751
        && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1752
            == CLASS_MAX_NREGS (rld[output_reload].class,
1753
                                rld[output_reload].outmode))
1754
        && rld[i].inc == 0
1755
        && rld[i].reg_rtx == 0
1756
#ifdef SECONDARY_MEMORY_NEEDED
1757
        /* Don't combine two reloads with different secondary
1758
           memory locations.  */
1759
        && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1760
            || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1761
            || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1762
                            secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1763
#endif
1764
        && (SMALL_REGISTER_CLASSES
1765
            ? (rld[i].class == rld[output_reload].class)
1766
            : (reg_class_subset_p (rld[i].class,
1767
                                   rld[output_reload].class)
1768
               || reg_class_subset_p (rld[output_reload].class,
1769
                                      rld[i].class)))
1770
        && (MATCHES (rld[i].in, rld[output_reload].out)
1771
            /* Args reversed because the first arg seems to be
1772
               the one that we imagine being modified
1773
               while the second is the one that might be affected.  */
1774
            || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1775
                                                      rld[i].in)
1776
                /* However, if the input is a register that appears inside
1777
                   the output, then we also can't share.
1778
                   Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1779
                   If the same reload reg is used for both reg 69 and the
1780
                   result to be stored in memory, then that result
1781
                   will clobber the address of the memory ref.  */
1782
                && ! (REG_P (rld[i].in)
1783
                      && reg_overlap_mentioned_for_reload_p (rld[i].in,
1784
                                                             rld[output_reload].out))))
1785
        && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1786
                                         rld[i].when_needed != RELOAD_FOR_INPUT)
1787
        && (reg_class_size[(int) rld[i].class]
1788
            || SMALL_REGISTER_CLASSES)
1789
        /* We will allow making things slightly worse by combining an
1790
           input and an output, but no worse than that.  */
1791
        && (rld[i].when_needed == RELOAD_FOR_INPUT
1792
            || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1793
      {
1794
        int j;
1795
 
1796
        /* We have found a reload to combine with!  */
1797
        rld[i].out = rld[output_reload].out;
1798
        rld[i].out_reg = rld[output_reload].out_reg;
1799
        rld[i].outmode = rld[output_reload].outmode;
1800
        /* Mark the old output reload as inoperative.  */
1801
        rld[output_reload].out = 0;
1802
        /* The combined reload is needed for the entire insn.  */
1803
        rld[i].when_needed = RELOAD_OTHER;
1804
        /* If the output reload had a secondary reload, copy it.  */
1805
        if (rld[output_reload].secondary_out_reload != -1)
1806
          {
1807
            rld[i].secondary_out_reload
1808
              = rld[output_reload].secondary_out_reload;
1809
            rld[i].secondary_out_icode
1810
              = rld[output_reload].secondary_out_icode;
1811
          }
1812
 
1813
#ifdef SECONDARY_MEMORY_NEEDED
1814
        /* Copy any secondary MEM.  */
1815
        if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1816
          secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1817
            = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1818
#endif
1819
        /* If required, minimize the register class.  */
1820
        if (reg_class_subset_p (rld[output_reload].class,
1821
                                rld[i].class))
1822
          rld[i].class = rld[output_reload].class;
1823
 
1824
        /* Transfer all replacements from the old reload to the combined.  */
1825
        for (j = 0; j < n_replacements; j++)
1826
          if (replacements[j].what == output_reload)
1827
            replacements[j].what = i;
1828
 
1829
        return;
1830
      }
1831
 
1832
  /* If this insn has only one operand that is modified or written (assumed
1833
     to be the first),  it must be the one corresponding to this reload.  It
1834
     is safe to use anything that dies in this insn for that output provided
1835
     that it does not occur in the output (we already know it isn't an
1836
     earlyclobber.  If this is an asm insn, give up.  */
1837
 
1838
  if (INSN_CODE (this_insn) == -1)
1839
    return;
1840
 
1841
  for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1842
    if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1843
        || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1844
      return;
1845
 
1846
  /* See if some hard register that dies in this insn and is not used in
1847
     the output is the right class.  Only works if the register we pick
1848
     up can fully hold our output reload.  */
1849
  for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1850
    if (REG_NOTE_KIND (note) == REG_DEAD
1851
        && REG_P (XEXP (note, 0))
1852
        && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1853
                                                 rld[output_reload].out)
1854
        && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1855
        && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1856
        && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1857
                              REGNO (XEXP (note, 0)))
1858
        && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1859
            <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1860
        /* Ensure that a secondary or tertiary reload for this output
1861
           won't want this register.  */
1862
        && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1863
            || (! (TEST_HARD_REG_BIT
1864
                   (reg_class_contents[(int) rld[secondary_out].class],
1865
                    REGNO (XEXP (note, 0))))
1866
                && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1867
                    ||  ! (TEST_HARD_REG_BIT
1868
                           (reg_class_contents[(int) rld[secondary_out].class],
1869
                            REGNO (XEXP (note, 0)))))))
1870
        && ! fixed_regs[REGNO (XEXP (note, 0))])
1871
      {
1872
        rld[output_reload].reg_rtx
1873
          = gen_rtx_REG (rld[output_reload].outmode,
1874
                         REGNO (XEXP (note, 0)));
1875
        return;
1876
      }
1877
}
1878
 
1879
/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1880
   See if one of IN and OUT is a register that may be used;
1881
   this is desirable since a spill-register won't be needed.
1882
   If so, return the register rtx that proves acceptable.
1883
 
1884
   INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1885
   CLASS is the register class required for the reload.
1886
 
1887
   If FOR_REAL is >= 0, it is the number of the reload,
1888
   and in some cases when it can be discovered that OUT doesn't need
1889
   to be computed, clear out rld[FOR_REAL].out.
1890
 
1891
   If FOR_REAL is -1, this should not be done, because this call
1892
   is just to see if a register can be found, not to find and install it.
1893
 
1894
   EARLYCLOBBER is nonzero if OUT is an earlyclobber operand.  This
1895
   puts an additional constraint on being able to use IN for OUT since
1896
   IN must not appear elsewhere in the insn (it is assumed that IN itself
1897
   is safe from the earlyclobber).  */
1898
 
1899
static rtx
1900
find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1901
                   enum machine_mode inmode, enum machine_mode outmode,
1902
                   enum reg_class class, int for_real, int earlyclobber)
1903
{
1904
  rtx in = real_in;
1905
  rtx out = real_out;
1906
  int in_offset = 0;
1907
  int out_offset = 0;
1908
  rtx value = 0;
1909
 
1910
  /* If operands exceed a word, we can't use either of them
1911
     unless they have the same size.  */
1912
  if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1913
      && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1914
          || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1915
    return 0;
1916
 
1917
  /* Note that {in,out}_offset are needed only when 'in' or 'out'
1918
     respectively refers to a hard register.  */
1919
 
1920
  /* Find the inside of any subregs.  */
1921
  while (GET_CODE (out) == SUBREG)
1922
    {
1923
      if (REG_P (SUBREG_REG (out))
1924
          && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1925
        out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1926
                                           GET_MODE (SUBREG_REG (out)),
1927
                                           SUBREG_BYTE (out),
1928
                                           GET_MODE (out));
1929
      out = SUBREG_REG (out);
1930
    }
1931
  while (GET_CODE (in) == SUBREG)
1932
    {
1933
      if (REG_P (SUBREG_REG (in))
1934
          && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1935
        in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1936
                                          GET_MODE (SUBREG_REG (in)),
1937
                                          SUBREG_BYTE (in),
1938
                                          GET_MODE (in));
1939
      in = SUBREG_REG (in);
1940
    }
1941
 
1942
  /* Narrow down the reg class, the same way push_reload will;
1943
     otherwise we might find a dummy now, but push_reload won't.  */
1944
  class = PREFERRED_RELOAD_CLASS (in, class);
1945
 
1946
  /* See if OUT will do.  */
1947
  if (REG_P (out)
1948
      && REGNO (out) < FIRST_PSEUDO_REGISTER)
1949
    {
1950
      unsigned int regno = REGNO (out) + out_offset;
1951
      unsigned int nwords = hard_regno_nregs[regno][outmode];
1952
      rtx saved_rtx;
1953
 
1954
      /* When we consider whether the insn uses OUT,
1955
         ignore references within IN.  They don't prevent us
1956
         from copying IN into OUT, because those refs would
1957
         move into the insn that reloads IN.
1958
 
1959
         However, we only ignore IN in its role as this reload.
1960
         If the insn uses IN elsewhere and it contains OUT,
1961
         that counts.  We can't be sure it's the "same" operand
1962
         so it might not go through this reload.  */
1963
      saved_rtx = *inloc;
1964
      *inloc = const0_rtx;
1965
 
1966
      if (regno < FIRST_PSEUDO_REGISTER
1967
          && HARD_REGNO_MODE_OK (regno, outmode)
1968
          && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1969
                                             PATTERN (this_insn), outloc))
1970
        {
1971
          unsigned int i;
1972
 
1973
          for (i = 0; i < nwords; i++)
1974
            if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1975
                                     regno + i))
1976
              break;
1977
 
1978
          if (i == nwords)
1979
            {
1980
              if (REG_P (real_out))
1981
                value = real_out;
1982
              else
1983
                value = gen_rtx_REG (outmode, regno);
1984
            }
1985
        }
1986
 
1987
      *inloc = saved_rtx;
1988
    }
1989
 
1990
  /* Consider using IN if OUT was not acceptable
1991
     or if OUT dies in this insn (like the quotient in a divmod insn).
1992
     We can't use IN unless it is dies in this insn,
1993
     which means we must know accurately which hard regs are live.
1994
     Also, the result can't go in IN if IN is used within OUT,
1995
     or if OUT is an earlyclobber and IN appears elsewhere in the insn.  */
1996
  if (hard_regs_live_known
1997
      && REG_P (in)
1998
      && REGNO (in) < FIRST_PSEUDO_REGISTER
1999
      && (value == 0
2000
          || find_reg_note (this_insn, REG_UNUSED, real_out))
2001
      && find_reg_note (this_insn, REG_DEAD, real_in)
2002
      && !fixed_regs[REGNO (in)]
2003
      && HARD_REGNO_MODE_OK (REGNO (in),
2004
                             /* The only case where out and real_out might
2005
                                have different modes is where real_out
2006
                                is a subreg, and in that case, out
2007
                                has a real mode.  */
2008
                             (GET_MODE (out) != VOIDmode
2009
                              ? GET_MODE (out) : outmode))
2010
        /* But only do all this if we can be sure, that this input
2011
           operand doesn't correspond with an uninitialized pseudoreg.
2012
           global can assign some hardreg to it, which is the same as
2013
           a different pseudo also currently live (as it can ignore the
2014
           conflict).  So we never must introduce writes to such hardregs,
2015
           as they would clobber the other live pseudo using the same.
2016
           See also PR20973.  */
2017
      && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2018
          || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
2019
                             ORIGINAL_REGNO (in))))
2020
    {
2021
      unsigned int regno = REGNO (in) + in_offset;
2022
      unsigned int nwords = hard_regno_nregs[regno][inmode];
2023
 
2024
      if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2025
          && ! hard_reg_set_here_p (regno, regno + nwords,
2026
                                    PATTERN (this_insn))
2027
          && (! earlyclobber
2028
              || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2029
                                                 PATTERN (this_insn), inloc)))
2030
        {
2031
          unsigned int i;
2032
 
2033
          for (i = 0; i < nwords; i++)
2034
            if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2035
                                     regno + i))
2036
              break;
2037
 
2038
          if (i == nwords)
2039
            {
2040
              /* If we were going to use OUT as the reload reg
2041
                 and changed our mind, it means OUT is a dummy that
2042
                 dies here.  So don't bother copying value to it.  */
2043
              if (for_real >= 0 && value == real_out)
2044
                rld[for_real].out = 0;
2045
              if (REG_P (real_in))
2046
                value = real_in;
2047
              else
2048
                value = gen_rtx_REG (inmode, regno);
2049
            }
2050
        }
2051
    }
2052
 
2053
  return value;
2054
}
2055
 
2056
/* This page contains subroutines used mainly for determining
2057
   whether the IN or an OUT of a reload can serve as the
2058
   reload register.  */
2059
 
2060
/* Return 1 if X is an operand of an insn that is being earlyclobbered.  */
2061
 
2062
int
2063
earlyclobber_operand_p (rtx x)
2064
{
2065
  int i;
2066
 
2067
  for (i = 0; i < n_earlyclobbers; i++)
2068
    if (reload_earlyclobbers[i] == x)
2069
      return 1;
2070
 
2071
  return 0;
2072
}
2073
 
2074
/* Return 1 if expression X alters a hard reg in the range
2075
   from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2076
   either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2077
   X should be the body of an instruction.  */
2078
 
2079
static int
2080
hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2081
{
2082
  if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2083
    {
2084
      rtx op0 = SET_DEST (x);
2085
 
2086
      while (GET_CODE (op0) == SUBREG)
2087
        op0 = SUBREG_REG (op0);
2088
      if (REG_P (op0))
2089
        {
2090
          unsigned int r = REGNO (op0);
2091
 
2092
          /* See if this reg overlaps range under consideration.  */
2093
          if (r < end_regno
2094
              && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2095
            return 1;
2096
        }
2097
    }
2098
  else if (GET_CODE (x) == PARALLEL)
2099
    {
2100
      int i = XVECLEN (x, 0) - 1;
2101
 
2102
      for (; i >= 0; i--)
2103
        if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2104
          return 1;
2105
    }
2106
 
2107
  return 0;
2108
}
2109
 
2110
/* Return 1 if ADDR is a valid memory address for mode MODE,
2111
   and check that each pseudo reg has the proper kind of
2112
   hard reg.  */
2113
 
2114
int
2115
strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2116
{
2117
  GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2118
  return 0;
2119
 
2120
 win:
2121
  return 1;
2122
}
2123
 
2124
/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2125
   if they are the same hard reg, and has special hacks for
2126
   autoincrement and autodecrement.
2127
   This is specifically intended for find_reloads to use
2128
   in determining whether two operands match.
2129
   X is the operand whose number is the lower of the two.
2130
 
2131
   The value is 2 if Y contains a pre-increment that matches
2132
   a non-incrementing address in X.  */
2133
 
2134
/* ??? To be completely correct, we should arrange to pass
2135
   for X the output operand and for Y the input operand.
2136
   For now, we assume that the output operand has the lower number
2137
   because that is natural in (SET output (... input ...)).  */
2138
 
2139
int
2140
operands_match_p (rtx x, rtx y)
2141
{
2142
  int i;
2143
  RTX_CODE code = GET_CODE (x);
2144
  const char *fmt;
2145
  int success_2;
2146
 
2147
  if (x == y)
2148
    return 1;
2149
  if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2150
      && (REG_P (y) || (GET_CODE (y) == SUBREG
2151
                                  && REG_P (SUBREG_REG (y)))))
2152
    {
2153
      int j;
2154
 
2155
      if (code == SUBREG)
2156
        {
2157
          i = REGNO (SUBREG_REG (x));
2158
          if (i >= FIRST_PSEUDO_REGISTER)
2159
            goto slow;
2160
          i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2161
                                    GET_MODE (SUBREG_REG (x)),
2162
                                    SUBREG_BYTE (x),
2163
                                    GET_MODE (x));
2164
        }
2165
      else
2166
        i = REGNO (x);
2167
 
2168
      if (GET_CODE (y) == SUBREG)
2169
        {
2170
          j = REGNO (SUBREG_REG (y));
2171
          if (j >= FIRST_PSEUDO_REGISTER)
2172
            goto slow;
2173
          j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2174
                                    GET_MODE (SUBREG_REG (y)),
2175
                                    SUBREG_BYTE (y),
2176
                                    GET_MODE (y));
2177
        }
2178
      else
2179
        j = REGNO (y);
2180
 
2181
      /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2182
         multiple hard register group of scalar integer registers, so that
2183
         for example (reg:DI 0) and (reg:SI 1) will be considered the same
2184
         register.  */
2185
      if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2186
          && SCALAR_INT_MODE_P (GET_MODE (x))
2187
          && i < FIRST_PSEUDO_REGISTER)
2188
        i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2189
      if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2190
          && SCALAR_INT_MODE_P (GET_MODE (y))
2191
          && j < FIRST_PSEUDO_REGISTER)
2192
        j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2193
 
2194
      return i == j;
2195
    }
2196
  /* If two operands must match, because they are really a single
2197
     operand of an assembler insn, then two postincrements are invalid
2198
     because the assembler insn would increment only once.
2199
     On the other hand, a postincrement matches ordinary indexing
2200
     if the postincrement is the output operand.  */
2201
  if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2202
    return operands_match_p (XEXP (x, 0), y);
2203
  /* Two preincrements are invalid
2204
     because the assembler insn would increment only once.
2205
     On the other hand, a preincrement matches ordinary indexing
2206
     if the preincrement is the input operand.
2207
     In this case, return 2, since some callers need to do special
2208
     things when this happens.  */
2209
  if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2210
      || GET_CODE (y) == PRE_MODIFY)
2211
    return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2212
 
2213
 slow:
2214
 
2215
  /* Now we have disposed of all the cases in which different rtx codes
2216
     can match.  */
2217
  if (code != GET_CODE (y))
2218
    return 0;
2219
 
2220
  /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.  */
2221
  if (GET_MODE (x) != GET_MODE (y))
2222
    return 0;
2223
 
2224
  switch (code)
2225
    {
2226
    case CONST_INT:
2227
    case CONST_DOUBLE:
2228
      return 0;
2229
 
2230
    case LABEL_REF:
2231
      return XEXP (x, 0) == XEXP (y, 0);
2232
    case SYMBOL_REF:
2233
      return XSTR (x, 0) == XSTR (y, 0);
2234
 
2235
    default:
2236
      break;
2237
    }
2238
 
2239
  /* Compare the elements.  If any pair of corresponding elements
2240
     fail to match, return 0 for the whole things.  */
2241
 
2242
  success_2 = 0;
2243
  fmt = GET_RTX_FORMAT (code);
2244
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2245
    {
2246
      int val, j;
2247
      switch (fmt[i])
2248
        {
2249
        case 'w':
2250
          if (XWINT (x, i) != XWINT (y, i))
2251
            return 0;
2252
          break;
2253
 
2254
        case 'i':
2255
          if (XINT (x, i) != XINT (y, i))
2256
            return 0;
2257
          break;
2258
 
2259
        case 'e':
2260
          val = operands_match_p (XEXP (x, i), XEXP (y, i));
2261
          if (val == 0)
2262
            return 0;
2263
          /* If any subexpression returns 2,
2264
             we should return 2 if we are successful.  */
2265
          if (val == 2)
2266
            success_2 = 1;
2267
          break;
2268
 
2269
        case '0':
2270
          break;
2271
 
2272
        case 'E':
2273
          if (XVECLEN (x, i) != XVECLEN (y, i))
2274
            return 0;
2275
          for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2276
            {
2277
              val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2278
              if (val == 0)
2279
                return 0;
2280
              if (val == 2)
2281
                success_2 = 1;
2282
            }
2283
          break;
2284
 
2285
          /* It is believed that rtx's at this level will never
2286
             contain anything but integers and other rtx's,
2287
             except for within LABEL_REFs and SYMBOL_REFs.  */
2288
        default:
2289
          gcc_unreachable ();
2290
        }
2291
    }
2292
  return 1 + success_2;
2293
}
2294
 
2295
/* Describe the range of registers or memory referenced by X.
2296
   If X is a register, set REG_FLAG and put the first register
2297
   number into START and the last plus one into END.
2298
   If X is a memory reference, put a base address into BASE
2299
   and a range of integer offsets into START and END.
2300
   If X is pushing on the stack, we can assume it causes no trouble,
2301
   so we set the SAFE field.  */
2302
 
2303
static struct decomposition
2304
decompose (rtx x)
2305
{
2306
  struct decomposition val;
2307
  int all_const = 0;
2308
 
2309
  memset (&val, 0, sizeof (val));
2310
 
2311
  switch (GET_CODE (x))
2312
    {
2313
    case MEM:
2314
      {
2315
        rtx base = NULL_RTX, offset = 0;
2316
        rtx addr = XEXP (x, 0);
2317
 
2318
        if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2319
            || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2320
          {
2321
            val.base = XEXP (addr, 0);
2322
            val.start = -GET_MODE_SIZE (GET_MODE (x));
2323
            val.end = GET_MODE_SIZE (GET_MODE (x));
2324
            val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2325
            return val;
2326
          }
2327
 
2328
        if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2329
          {
2330
            if (GET_CODE (XEXP (addr, 1)) == PLUS
2331
                && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2332
                && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2333
              {
2334
                val.base  = XEXP (addr, 0);
2335
                val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2336
                val.end   = INTVAL (XEXP (XEXP (addr, 1), 1));
2337
                val.safe  = REGNO (val.base) == STACK_POINTER_REGNUM;
2338
                return val;
2339
              }
2340
          }
2341
 
2342
        if (GET_CODE (addr) == CONST)
2343
          {
2344
            addr = XEXP (addr, 0);
2345
            all_const = 1;
2346
          }
2347
        if (GET_CODE (addr) == PLUS)
2348
          {
2349
            if (CONSTANT_P (XEXP (addr, 0)))
2350
              {
2351
                base = XEXP (addr, 1);
2352
                offset = XEXP (addr, 0);
2353
              }
2354
            else if (CONSTANT_P (XEXP (addr, 1)))
2355
              {
2356
                base = XEXP (addr, 0);
2357
                offset = XEXP (addr, 1);
2358
              }
2359
          }
2360
 
2361
        if (offset == 0)
2362
          {
2363
            base = addr;
2364
            offset = const0_rtx;
2365
          }
2366
        if (GET_CODE (offset) == CONST)
2367
          offset = XEXP (offset, 0);
2368
        if (GET_CODE (offset) == PLUS)
2369
          {
2370
            if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2371
              {
2372
                base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2373
                offset = XEXP (offset, 0);
2374
              }
2375
            else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2376
              {
2377
                base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2378
                offset = XEXP (offset, 1);
2379
              }
2380
            else
2381
              {
2382
                base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2383
                offset = const0_rtx;
2384
              }
2385
          }
2386
        else if (GET_CODE (offset) != CONST_INT)
2387
          {
2388
            base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2389
            offset = const0_rtx;
2390
          }
2391
 
2392
        if (all_const && GET_CODE (base) == PLUS)
2393
          base = gen_rtx_CONST (GET_MODE (base), base);
2394
 
2395
        gcc_assert (GET_CODE (offset) == CONST_INT);
2396
 
2397
        val.start = INTVAL (offset);
2398
        val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2399
        val.base = base;
2400
      }
2401
      break;
2402
 
2403
    case REG:
2404
      val.reg_flag = 1;
2405
      val.start = true_regnum (x);
2406
      if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2407
        {
2408
          /* A pseudo with no hard reg.  */
2409
          val.start = REGNO (x);
2410
          val.end = val.start + 1;
2411
        }
2412
      else
2413
        /* A hard reg.  */
2414
        val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2415
      break;
2416
 
2417
    case SUBREG:
2418
      if (!REG_P (SUBREG_REG (x)))
2419
        /* This could be more precise, but it's good enough.  */
2420
        return decompose (SUBREG_REG (x));
2421
      val.reg_flag = 1;
2422
      val.start = true_regnum (x);
2423
      if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2424
        return decompose (SUBREG_REG (x));
2425
      else
2426
        /* A hard reg.  */
2427
        val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2428
      break;
2429
 
2430
    case SCRATCH:
2431
      /* This hasn't been assigned yet, so it can't conflict yet.  */
2432
      val.safe = 1;
2433
      break;
2434
 
2435
    default:
2436
      gcc_assert (CONSTANT_P (x));
2437
      val.safe = 1;
2438
      break;
2439
    }
2440
  return val;
2441
}
2442
 
2443
/* Return 1 if altering Y will not modify the value of X.
2444
   Y is also described by YDATA, which should be decompose (Y).  */
2445
 
2446
static int
2447
immune_p (rtx x, rtx y, struct decomposition ydata)
2448
{
2449
  struct decomposition xdata;
2450
 
2451
  if (ydata.reg_flag)
2452
    return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2453
  if (ydata.safe)
2454
    return 1;
2455
 
2456
  gcc_assert (MEM_P (y));
2457
  /* If Y is memory and X is not, Y can't affect X.  */
2458
  if (!MEM_P (x))
2459
    return 1;
2460
 
2461
  xdata = decompose (x);
2462
 
2463
  if (! rtx_equal_p (xdata.base, ydata.base))
2464
    {
2465
      /* If bases are distinct symbolic constants, there is no overlap.  */
2466
      if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2467
        return 1;
2468
      /* Constants and stack slots never overlap.  */
2469
      if (CONSTANT_P (xdata.base)
2470
          && (ydata.base == frame_pointer_rtx
2471
              || ydata.base == hard_frame_pointer_rtx
2472
              || ydata.base == stack_pointer_rtx))
2473
        return 1;
2474
      if (CONSTANT_P (ydata.base)
2475
          && (xdata.base == frame_pointer_rtx
2476
              || xdata.base == hard_frame_pointer_rtx
2477
              || xdata.base == stack_pointer_rtx))
2478
        return 1;
2479
      /* If either base is variable, we don't know anything.  */
2480
      return 0;
2481
    }
2482
 
2483
  return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2484
}
2485
 
2486
/* Similar, but calls decompose.  */
2487
 
2488
int
2489
safe_from_earlyclobber (rtx op, rtx clobber)
2490
{
2491
  struct decomposition early_data;
2492
 
2493
  early_data = decompose (clobber);
2494
  return immune_p (op, clobber, early_data);
2495
}
2496
 
2497
/* Main entry point of this file: search the body of INSN
2498
   for values that need reloading and record them with push_reload.
2499
   REPLACE nonzero means record also where the values occur
2500
   so that subst_reloads can be used.
2501
 
2502
   IND_LEVELS says how many levels of indirection are supported by this
2503
   machine; a value of zero means that a memory reference is not a valid
2504
   memory address.
2505
 
2506
   LIVE_KNOWN says we have valid information about which hard
2507
   regs are live at each point in the program; this is true when
2508
   we are called from global_alloc but false when stupid register
2509
   allocation has been done.
2510
 
2511
   RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2512
   which is nonnegative if the reg has been commandeered for reloading into.
2513
   It is copied into STATIC_RELOAD_REG_P and referenced from there
2514
   by various subroutines.
2515
 
2516
   Return TRUE if some operands need to be changed, because of swapping
2517
   commutative operands, reg_equiv_address substitution, or whatever.  */
2518
 
2519
int
2520
find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2521
              short *reload_reg_p)
2522
{
2523
  int insn_code_number;
2524
  int i, j;
2525
  int noperands;
2526
  /* These start out as the constraints for the insn
2527
     and they are chewed up as we consider alternatives.  */
2528
  char *constraints[MAX_RECOG_OPERANDS];
2529
  /* These are the preferred classes for an operand, or NO_REGS if it isn't
2530
     a register.  */
2531
  enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2532
  char pref_or_nothing[MAX_RECOG_OPERANDS];
2533
  /* Nonzero for a MEM operand whose entire address needs a reload.
2534
     May be -1 to indicate the entire address may or may not need a reload.  */
2535
  int address_reloaded[MAX_RECOG_OPERANDS];
2536
  /* Nonzero for an address operand that needs to be completely reloaded.
2537
     May be -1 to indicate the entire operand may or may not need a reload.  */
2538
  int address_operand_reloaded[MAX_RECOG_OPERANDS];
2539
  /* Value of enum reload_type to use for operand.  */
2540
  enum reload_type operand_type[MAX_RECOG_OPERANDS];
2541
  /* Value of enum reload_type to use within address of operand.  */
2542
  enum reload_type address_type[MAX_RECOG_OPERANDS];
2543
  /* Save the usage of each operand.  */
2544
  enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2545
  int no_input_reloads = 0, no_output_reloads = 0;
2546
  int n_alternatives;
2547
  int this_alternative[MAX_RECOG_OPERANDS];
2548
  char this_alternative_match_win[MAX_RECOG_OPERANDS];
2549
  char this_alternative_win[MAX_RECOG_OPERANDS];
2550
  char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2551
  char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2552
  int this_alternative_matches[MAX_RECOG_OPERANDS];
2553
  int swapped;
2554
  int goal_alternative[MAX_RECOG_OPERANDS];
2555
  int this_alternative_number;
2556
  int goal_alternative_number = 0;
2557
  int operand_reloadnum[MAX_RECOG_OPERANDS];
2558
  int goal_alternative_matches[MAX_RECOG_OPERANDS];
2559
  int goal_alternative_matched[MAX_RECOG_OPERANDS];
2560
  char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2561
  char goal_alternative_win[MAX_RECOG_OPERANDS];
2562
  char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2563
  char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2564
  int goal_alternative_swapped;
2565
  int best;
2566
  int commutative;
2567
  char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2568
  rtx substed_operand[MAX_RECOG_OPERANDS];
2569
  rtx body = PATTERN (insn);
2570
  rtx set = single_set (insn);
2571
  int goal_earlyclobber = 0, this_earlyclobber;
2572
  enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2573
  int retval = 0;
2574
 
2575
  this_insn = insn;
2576
  n_reloads = 0;
2577
  n_replacements = 0;
2578
  n_earlyclobbers = 0;
2579
  replace_reloads = replace;
2580
  hard_regs_live_known = live_known;
2581
  static_reload_reg_p = reload_reg_p;
2582
 
2583
  /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2584
     neither are insns that SET cc0.  Insns that use CC0 are not allowed
2585
     to have any input reloads.  */
2586
  if (JUMP_P (insn) || CALL_P (insn))
2587
    no_output_reloads = 1;
2588
 
2589
#ifdef HAVE_cc0
2590
  if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2591
    no_input_reloads = 1;
2592
  if (reg_set_p (cc0_rtx, PATTERN (insn)))
2593
    no_output_reloads = 1;
2594
#endif
2595
 
2596
#ifdef SECONDARY_MEMORY_NEEDED
2597
  /* The eliminated forms of any secondary memory locations are per-insn, so
2598
     clear them out here.  */
2599
 
2600
  if (secondary_memlocs_elim_used)
2601
    {
2602
      memset (secondary_memlocs_elim, 0,
2603
              sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2604
      secondary_memlocs_elim_used = 0;
2605
    }
2606
#endif
2607
 
2608
  /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2609
     is cheap to move between them.  If it is not, there may not be an insn
2610
     to do the copy, so we may need a reload.  */
2611
  if (GET_CODE (body) == SET
2612
      && REG_P (SET_DEST (body))
2613
      && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2614
      && REG_P (SET_SRC (body))
2615
      && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2616
      && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2617
                             REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2618
                             REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2619
    return 0;
2620
 
2621
  extract_insn (insn);
2622
 
2623
  noperands = reload_n_operands = recog_data.n_operands;
2624
  n_alternatives = recog_data.n_alternatives;
2625
 
2626
  /* Just return "no reloads" if insn has no operands with constraints.  */
2627
  if (noperands == 0 || n_alternatives == 0)
2628
    return 0;
2629
 
2630
  insn_code_number = INSN_CODE (insn);
2631
  this_insn_is_asm = insn_code_number < 0;
2632
 
2633
  memcpy (operand_mode, recog_data.operand_mode,
2634
          noperands * sizeof (enum machine_mode));
2635
  memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2636
 
2637
  commutative = -1;
2638
 
2639
  /* If we will need to know, later, whether some pair of operands
2640
     are the same, we must compare them now and save the result.
2641
     Reloading the base and index registers will clobber them
2642
     and afterward they will fail to match.  */
2643
 
2644
  for (i = 0; i < noperands; i++)
2645
    {
2646
      char *p;
2647
      int c;
2648
 
2649
      substed_operand[i] = recog_data.operand[i];
2650
      p = constraints[i];
2651
 
2652
      modified[i] = RELOAD_READ;
2653
 
2654
      /* Scan this operand's constraint to see if it is an output operand,
2655
         an in-out operand, is commutative, or should match another.  */
2656
 
2657
      while ((c = *p))
2658
        {
2659
          p += CONSTRAINT_LEN (c, p);
2660
          switch (c)
2661
            {
2662
            case '=':
2663
              modified[i] = RELOAD_WRITE;
2664
              break;
2665
            case '+':
2666
              modified[i] = RELOAD_READ_WRITE;
2667
              break;
2668
            case '%':
2669
              {
2670
                /* The last operand should not be marked commutative.  */
2671
                gcc_assert (i != noperands - 1);
2672
 
2673
                /* We currently only support one commutative pair of
2674
                   operands.  Some existing asm code currently uses more
2675
                   than one pair.  Previously, that would usually work,
2676
                   but sometimes it would crash the compiler.  We
2677
                   continue supporting that case as well as we can by
2678
                   silently ignoring all but the first pair.  In the
2679
                   future we may handle it correctly.  */
2680
                if (commutative < 0)
2681
                  commutative = i;
2682
                else
2683
                  gcc_assert (this_insn_is_asm);
2684
              }
2685
              break;
2686
            /* Use of ISDIGIT is tempting here, but it may get expensive because
2687
               of locale support we don't want.  */
2688
            case '0': case '1': case '2': case '3': case '4':
2689
            case '5': case '6': case '7': case '8': case '9':
2690
              {
2691
                c = strtoul (p - 1, &p, 10);
2692
 
2693
                operands_match[c][i]
2694
                  = operands_match_p (recog_data.operand[c],
2695
                                      recog_data.operand[i]);
2696
 
2697
                /* An operand may not match itself.  */
2698
                gcc_assert (c != i);
2699
 
2700
                /* If C can be commuted with C+1, and C might need to match I,
2701
                   then C+1 might also need to match I.  */
2702
                if (commutative >= 0)
2703
                  {
2704
                    if (c == commutative || c == commutative + 1)
2705
                      {
2706
                        int other = c + (c == commutative ? 1 : -1);
2707
                        operands_match[other][i]
2708
                          = operands_match_p (recog_data.operand[other],
2709
                                              recog_data.operand[i]);
2710
                      }
2711
                    if (i == commutative || i == commutative + 1)
2712
                      {
2713
                        int other = i + (i == commutative ? 1 : -1);
2714
                        operands_match[c][other]
2715
                          = operands_match_p (recog_data.operand[c],
2716
                                              recog_data.operand[other]);
2717
                      }
2718
                    /* Note that C is supposed to be less than I.
2719
                       No need to consider altering both C and I because in
2720
                       that case we would alter one into the other.  */
2721
                  }
2722
              }
2723
            }
2724
        }
2725
    }
2726
 
2727
  /* Examine each operand that is a memory reference or memory address
2728
     and reload parts of the addresses into index registers.
2729
     Also here any references to pseudo regs that didn't get hard regs
2730
     but are equivalent to constants get replaced in the insn itself
2731
     with those constants.  Nobody will ever see them again.
2732
 
2733
     Finally, set up the preferred classes of each operand.  */
2734
 
2735
  for (i = 0; i < noperands; i++)
2736
    {
2737
      RTX_CODE code = GET_CODE (recog_data.operand[i]);
2738
 
2739
      address_reloaded[i] = 0;
2740
      address_operand_reloaded[i] = 0;
2741
      operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2742
                         : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2743
                         : RELOAD_OTHER);
2744
      address_type[i]
2745
        = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2746
           : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2747
           : RELOAD_OTHER);
2748
 
2749
      if (*constraints[i] == 0)
2750
        /* Ignore things like match_operator operands.  */
2751
        ;
2752
      else if (constraints[i][0] == 'p'
2753
               || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2754
        {
2755
          address_operand_reloaded[i]
2756
            = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2757
                                    recog_data.operand[i],
2758
                                    recog_data.operand_loc[i],
2759
                                    i, operand_type[i], ind_levels, insn);
2760
 
2761
          /* If we now have a simple operand where we used to have a
2762
             PLUS or MULT, re-recognize and try again.  */
2763
          if ((OBJECT_P (*recog_data.operand_loc[i])
2764
               || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2765
              && (GET_CODE (recog_data.operand[i]) == MULT
2766
                  || GET_CODE (recog_data.operand[i]) == PLUS))
2767
            {
2768
              INSN_CODE (insn) = -1;
2769
              retval = find_reloads (insn, replace, ind_levels, live_known,
2770
                                     reload_reg_p);
2771
              return retval;
2772
            }
2773
 
2774
          recog_data.operand[i] = *recog_data.operand_loc[i];
2775
          substed_operand[i] = recog_data.operand[i];
2776
 
2777
          /* Address operands are reloaded in their existing mode,
2778
             no matter what is specified in the machine description.  */
2779
          operand_mode[i] = GET_MODE (recog_data.operand[i]);
2780
        }
2781
      else if (code == MEM)
2782
        {
2783
          address_reloaded[i]
2784
            = find_reloads_address (GET_MODE (recog_data.operand[i]),
2785
                                    recog_data.operand_loc[i],
2786
                                    XEXP (recog_data.operand[i], 0),
2787
                                    &XEXP (recog_data.operand[i], 0),
2788
                                    i, address_type[i], ind_levels, insn);
2789
          recog_data.operand[i] = *recog_data.operand_loc[i];
2790
          substed_operand[i] = recog_data.operand[i];
2791
        }
2792
      else if (code == SUBREG)
2793
        {
2794
          rtx reg = SUBREG_REG (recog_data.operand[i]);
2795
          rtx op
2796
            = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2797
                                   ind_levels,
2798
                                   set != 0
2799
                                   && &SET_DEST (set) == recog_data.operand_loc[i],
2800
                                   insn,
2801
                                   &address_reloaded[i]);
2802
 
2803
          /* If we made a MEM to load (a part of) the stackslot of a pseudo
2804
             that didn't get a hard register, emit a USE with a REG_EQUAL
2805
             note in front so that we might inherit a previous, possibly
2806
             wider reload.  */
2807
 
2808
          if (replace
2809
              && MEM_P (op)
2810
              && REG_P (reg)
2811
              && (GET_MODE_SIZE (GET_MODE (reg))
2812
                  >= GET_MODE_SIZE (GET_MODE (op))))
2813
            set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2814
                                                   insn),
2815
                                 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2816
 
2817
          substed_operand[i] = recog_data.operand[i] = op;
2818
        }
2819
      else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2820
        /* We can get a PLUS as an "operand" as a result of register
2821
           elimination.  See eliminate_regs and gen_reload.  We handle
2822
           a unary operator by reloading the operand.  */
2823
        substed_operand[i] = recog_data.operand[i]
2824
          = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2825
                                 ind_levels, 0, insn,
2826
                                 &address_reloaded[i]);
2827
      else if (code == REG)
2828
        {
2829
          /* This is equivalent to calling find_reloads_toplev.
2830
             The code is duplicated for speed.
2831
             When we find a pseudo always equivalent to a constant,
2832
             we replace it by the constant.  We must be sure, however,
2833
             that we don't try to replace it in the insn in which it
2834
             is being set.  */
2835
          int regno = REGNO (recog_data.operand[i]);
2836
          if (reg_equiv_constant[regno] != 0
2837
              && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2838
            {
2839
              /* Record the existing mode so that the check if constants are
2840
                 allowed will work when operand_mode isn't specified.  */
2841
 
2842
              if (operand_mode[i] == VOIDmode)
2843
                operand_mode[i] = GET_MODE (recog_data.operand[i]);
2844
 
2845
              substed_operand[i] = recog_data.operand[i]
2846
                = reg_equiv_constant[regno];
2847
            }
2848
          if (reg_equiv_memory_loc[regno] != 0
2849
              && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2850
            /* We need not give a valid is_set_dest argument since the case
2851
               of a constant equivalence was checked above.  */
2852
            substed_operand[i] = recog_data.operand[i]
2853
              = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2854
                                     ind_levels, 0, insn,
2855
                                     &address_reloaded[i]);
2856
        }
2857
      /* If the operand is still a register (we didn't replace it with an
2858
         equivalent), get the preferred class to reload it into.  */
2859
      code = GET_CODE (recog_data.operand[i]);
2860
      preferred_class[i]
2861
        = ((code == REG && REGNO (recog_data.operand[i])
2862
            >= FIRST_PSEUDO_REGISTER)
2863
           ? reg_preferred_class (REGNO (recog_data.operand[i]))
2864
           : NO_REGS);
2865
      pref_or_nothing[i]
2866
        = (code == REG
2867
           && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2868
           && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2869
    }
2870
 
2871
  /* If this is simply a copy from operand 1 to operand 0, merge the
2872
     preferred classes for the operands.  */
2873
  if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2874
      && recog_data.operand[1] == SET_SRC (set))
2875
    {
2876
      preferred_class[0] = preferred_class[1]
2877
        = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2878
      pref_or_nothing[0] |= pref_or_nothing[1];
2879
      pref_or_nothing[1] |= pref_or_nothing[0];
2880
    }
2881
 
2882
  /* Now see what we need for pseudo-regs that didn't get hard regs
2883
     or got the wrong kind of hard reg.  For this, we must consider
2884
     all the operands together against the register constraints.  */
2885
 
2886
  best = MAX_RECOG_OPERANDS * 2 + 600;
2887
 
2888
  swapped = 0;
2889
  goal_alternative_swapped = 0;
2890
 try_swapped:
2891
 
2892
  /* The constraints are made of several alternatives.
2893
     Each operand's constraint looks like foo,bar,... with commas
2894
     separating the alternatives.  The first alternatives for all
2895
     operands go together, the second alternatives go together, etc.
2896
 
2897
     First loop over alternatives.  */
2898
 
2899
  for (this_alternative_number = 0;
2900
       this_alternative_number < n_alternatives;
2901
       this_alternative_number++)
2902
    {
2903
      /* Loop over operands for one constraint alternative.  */
2904
      /* LOSERS counts those that don't fit this alternative
2905
         and would require loading.  */
2906
      int losers = 0;
2907
      /* BAD is set to 1 if it some operand can't fit this alternative
2908
         even after reloading.  */
2909
      int bad = 0;
2910
      /* REJECT is a count of how undesirable this alternative says it is
2911
         if any reloading is required.  If the alternative matches exactly
2912
         then REJECT is ignored, but otherwise it gets this much
2913
         counted against it in addition to the reloading needed.  Each
2914
         ? counts three times here since we want the disparaging caused by
2915
         a bad register class to only count 1/3 as much.  */
2916
      int reject = 0;
2917
 
2918
      this_earlyclobber = 0;
2919
 
2920
      for (i = 0; i < noperands; i++)
2921
        {
2922
          char *p = constraints[i];
2923
          char *end;
2924
          int len;
2925
          int win = 0;
2926
          int did_match = 0;
2927
          /* 0 => this operand can be reloaded somehow for this alternative.  */
2928
          int badop = 1;
2929
          /* 0 => this operand can be reloaded if the alternative allows regs.  */
2930
          int winreg = 0;
2931
          int c;
2932
          int m;
2933
          rtx operand = recog_data.operand[i];
2934
          int offset = 0;
2935
          /* Nonzero means this is a MEM that must be reloaded into a reg
2936
             regardless of what the constraint says.  */
2937
          int force_reload = 0;
2938
          int offmemok = 0;
2939
          /* Nonzero if a constant forced into memory would be OK for this
2940
             operand.  */
2941
          int constmemok = 0;
2942
          int earlyclobber = 0;
2943
 
2944
#ifndef KEEP_UNARY_OPERATORS_AT_CONSTRAINT_CHECKING
2945
          /* See comment at similar #ifndef in recog.c.  */
2946
 
2947
          /* If the predicate accepts a unary operator, it means that
2948
             we need to reload the operand, but do not do this for
2949
             match_operator and friends.  */
2950
          if (UNARY_P (operand) && *p != 0)
2951
            operand = XEXP (operand, 0);
2952
#endif
2953
 
2954
          /* If the operand is a SUBREG, extract
2955
             the REG or MEM (or maybe even a constant) within.
2956
             (Constants can occur as a result of reg_equiv_constant.)  */
2957
 
2958
          while (GET_CODE (operand) == SUBREG)
2959
            {
2960
              /* Offset only matters when operand is a REG and
2961
                 it is a hard reg.  This is because it is passed
2962
                 to reg_fits_class_p if it is a REG and all pseudos
2963
                 return 0 from that function.  */
2964
              if (REG_P (SUBREG_REG (operand))
2965
                  && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2966
                {
2967
                  if (!subreg_offset_representable_p
2968
                        (REGNO (SUBREG_REG (operand)),
2969
                         GET_MODE (SUBREG_REG (operand)),
2970
                         SUBREG_BYTE (operand),
2971
                         GET_MODE (operand)))
2972
                     force_reload = 1;
2973
                  offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2974
                                                 GET_MODE (SUBREG_REG (operand)),
2975
                                                 SUBREG_BYTE (operand),
2976
                                                 GET_MODE (operand));
2977
                }
2978
              operand = SUBREG_REG (operand);
2979
              /* Force reload if this is a constant or PLUS or if there may
2980
                 be a problem accessing OPERAND in the outer mode.  */
2981
              if (CONSTANT_P (operand)
2982
                  || GET_CODE (operand) == PLUS
2983
                  /* We must force a reload of paradoxical SUBREGs
2984
                     of a MEM because the alignment of the inner value
2985
                     may not be enough to do the outer reference.  On
2986
                     big-endian machines, it may also reference outside
2987
                     the object.
2988
 
2989
                     On machines that extend byte operations and we have a
2990
                     SUBREG where both the inner and outer modes are no wider
2991
                     than a word and the inner mode is narrower, is integral,
2992
                     and gets extended when loaded from memory, combine.c has
2993
                     made assumptions about the behavior of the machine in such
2994
                     register access.  If the data is, in fact, in memory we
2995
                     must always load using the size assumed to be in the
2996
                     register and let the insn do the different-sized
2997
                     accesses.
2998
 
2999
                     This is doubly true if WORD_REGISTER_OPERATIONS.  In
3000
                     this case eliminate_regs has left non-paradoxical
3001
                     subregs for push_reload to see.  Make sure it does
3002
                     by forcing the reload.
3003
 
3004
                     ??? When is it right at this stage to have a subreg
3005
                     of a mem that is _not_ to be handled specially?  IMO
3006
                     those should have been reduced to just a mem.  */
3007
                  || ((MEM_P (operand)
3008
                       || (REG_P (operand)
3009
                           && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3010
#ifndef WORD_REGISTER_OPERATIONS
3011
                      && (((GET_MODE_BITSIZE (GET_MODE (operand))
3012
                            < BIGGEST_ALIGNMENT)
3013
                           && (GET_MODE_SIZE (operand_mode[i])
3014
                               > GET_MODE_SIZE (GET_MODE (operand))))
3015
                          || BYTES_BIG_ENDIAN
3016
#ifdef LOAD_EXTEND_OP
3017
                          || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3018
                              && (GET_MODE_SIZE (GET_MODE (operand))
3019
                                  <= UNITS_PER_WORD)
3020
                              && (GET_MODE_SIZE (operand_mode[i])
3021
                                  > GET_MODE_SIZE (GET_MODE (operand)))
3022
                              && INTEGRAL_MODE_P (GET_MODE (operand))
3023
                              && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3024
#endif
3025
                          )
3026
#endif
3027
                      )
3028
                  )
3029
                force_reload = 1;
3030
            }
3031
 
3032
          this_alternative[i] = (int) NO_REGS;
3033
          this_alternative_win[i] = 0;
3034
          this_alternative_match_win[i] = 0;
3035
          this_alternative_offmemok[i] = 0;
3036
          this_alternative_earlyclobber[i] = 0;
3037
          this_alternative_matches[i] = -1;
3038
 
3039
          /* An empty constraint or empty alternative
3040
             allows anything which matched the pattern.  */
3041
          if (*p == 0 || *p == ',')
3042
            win = 1, badop = 0;
3043
 
3044
          /* Scan this alternative's specs for this operand;
3045
             set WIN if the operand fits any letter in this alternative.
3046
             Otherwise, clear BADOP if this operand could
3047
             fit some letter after reloads,
3048
             or set WINREG if this operand could fit after reloads
3049
             provided the constraint allows some registers.  */
3050
 
3051
          do
3052
            switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3053
              {
3054
              case '\0':
3055
                len = 0;
3056
                break;
3057
              case ',':
3058
                c = '\0';
3059
                break;
3060
 
3061
              case '=':  case '+':  case '*':
3062
                break;
3063
 
3064
              case '%':
3065
                /* We only support one commutative marker, the first
3066
                   one.  We already set commutative above.  */
3067
                break;
3068
 
3069
              case '?':
3070
                reject += 6;
3071
                break;
3072
 
3073
              case '!':
3074
                reject = 600;
3075
                break;
3076
 
3077
              case '#':
3078
                /* Ignore rest of this alternative as far as
3079
                   reloading is concerned.  */
3080
                do
3081
                  p++;
3082
                while (*p && *p != ',');
3083
                len = 0;
3084
                break;
3085
 
3086
              case '0':  case '1':  case '2':  case '3':  case '4':
3087
              case '5':  case '6':  case '7':  case '8':  case '9':
3088
                m = strtoul (p, &end, 10);
3089
                p = end;
3090
                len = 0;
3091
 
3092
                this_alternative_matches[i] = m;
3093
                /* We are supposed to match a previous operand.
3094
                   If we do, we win if that one did.
3095
                   If we do not, count both of the operands as losers.
3096
                   (This is too conservative, since most of the time
3097
                   only a single reload insn will be needed to make
3098
                   the two operands win.  As a result, this alternative
3099
                   may be rejected when it is actually desirable.)  */
3100
                if ((swapped && (m != commutative || i != commutative + 1))
3101
                    /* If we are matching as if two operands were swapped,
3102
                       also pretend that operands_match had been computed
3103
                       with swapped.
3104
                       But if I is the second of those and C is the first,
3105
                       don't exchange them, because operands_match is valid
3106
                       only on one side of its diagonal.  */
3107
                    ? (operands_match
3108
                       [(m == commutative || m == commutative + 1)
3109
                       ? 2 * commutative + 1 - m : m]
3110
                       [(i == commutative || i == commutative + 1)
3111
                       ? 2 * commutative + 1 - i : i])
3112
                    : operands_match[m][i])
3113
                  {
3114
                    /* If we are matching a non-offsettable address where an
3115
                       offsettable address was expected, then we must reject
3116
                       this combination, because we can't reload it.  */
3117
                    if (this_alternative_offmemok[m]
3118
                        && MEM_P (recog_data.operand[m])
3119
                        && this_alternative[m] == (int) NO_REGS
3120
                        && ! this_alternative_win[m])
3121
                      bad = 1;
3122
 
3123
                    did_match = this_alternative_win[m];
3124
                  }
3125
                else
3126
                  {
3127
                    /* Operands don't match.  */
3128
                    rtx value;
3129
                    int loc1, loc2;
3130
                    /* Retroactively mark the operand we had to match
3131
                       as a loser, if it wasn't already.  */
3132
                    if (this_alternative_win[m])
3133
                      losers++;
3134
                    this_alternative_win[m] = 0;
3135
                    if (this_alternative[m] == (int) NO_REGS)
3136
                      bad = 1;
3137
                    /* But count the pair only once in the total badness of
3138
                       this alternative, if the pair can be a dummy reload.
3139
                       The pointers in operand_loc are not swapped; swap
3140
                       them by hand if necessary.  */
3141
                    if (swapped && i == commutative)
3142
                      loc1 = commutative + 1;
3143
                    else if (swapped && i == commutative + 1)
3144
                      loc1 = commutative;
3145
                    else
3146
                      loc1 = i;
3147
                    if (swapped && m == commutative)
3148
                      loc2 = commutative + 1;
3149
                    else if (swapped && m == commutative + 1)
3150
                      loc2 = commutative;
3151
                    else
3152
                      loc2 = m;
3153
                    value
3154
                      = find_dummy_reload (recog_data.operand[i],
3155
                                           recog_data.operand[m],
3156
                                           recog_data.operand_loc[loc1],
3157
                                           recog_data.operand_loc[loc2],
3158
                                           operand_mode[i], operand_mode[m],
3159
                                           this_alternative[m], -1,
3160
                                           this_alternative_earlyclobber[m]);
3161
 
3162
                    if (value != 0)
3163
                      losers--;
3164
                  }
3165
                /* This can be fixed with reloads if the operand
3166
                   we are supposed to match can be fixed with reloads.  */
3167
                badop = 0;
3168
                this_alternative[i] = this_alternative[m];
3169
 
3170
                /* If we have to reload this operand and some previous
3171
                   operand also had to match the same thing as this
3172
                   operand, we don't know how to do that.  So reject this
3173
                   alternative.  */
3174
                if (! did_match || force_reload)
3175
                  for (j = 0; j < i; j++)
3176
                    if (this_alternative_matches[j]
3177
                        == this_alternative_matches[i])
3178
                      badop = 1;
3179
                break;
3180
 
3181
              case 'p':
3182
                /* All necessary reloads for an address_operand
3183
                   were handled in find_reloads_address.  */
3184
                this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3185
                win = 1;
3186
                badop = 0;
3187
                break;
3188
 
3189
              case 'm':
3190
                if (force_reload)
3191
                  break;
3192
                if (MEM_P (operand)
3193
                    || (REG_P (operand)
3194
                        && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3195
                        && reg_renumber[REGNO (operand)] < 0))
3196
                  win = 1;
3197
                if (CONST_POOL_OK_P (operand))
3198
                  badop = 0;
3199
                constmemok = 1;
3200
                break;
3201
 
3202
              case '<':
3203
                if (MEM_P (operand)
3204
                    && ! address_reloaded[i]
3205
                    && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3206
                        || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3207
                  win = 1;
3208
                break;
3209
 
3210
              case '>':
3211
                if (MEM_P (operand)
3212
                    && ! address_reloaded[i]
3213
                    && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3214
                        || GET_CODE (XEXP (operand, 0)) == POST_INC))
3215
                  win = 1;
3216
                break;
3217
 
3218
                /* Memory operand whose address is not offsettable.  */
3219
              case 'V':
3220
                if (force_reload)
3221
                  break;
3222
                if (MEM_P (operand)
3223
                    && ! (ind_levels ? offsettable_memref_p (operand)
3224
                          : offsettable_nonstrict_memref_p (operand))
3225
                    /* Certain mem addresses will become offsettable
3226
                       after they themselves are reloaded.  This is important;
3227
                       we don't want our own handling of unoffsettables
3228
                       to override the handling of reg_equiv_address.  */
3229
                    && !(REG_P (XEXP (operand, 0))
3230
                         && (ind_levels == 0
3231
                             || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3232
                  win = 1;
3233
                break;
3234
 
3235
                /* Memory operand whose address is offsettable.  */
3236
              case 'o':
3237
                if (force_reload)
3238
                  break;
3239
                if ((MEM_P (operand)
3240
                     /* If IND_LEVELS, find_reloads_address won't reload a
3241
                        pseudo that didn't get a hard reg, so we have to
3242
                        reject that case.  */
3243
                     && ((ind_levels ? offsettable_memref_p (operand)
3244
                          : offsettable_nonstrict_memref_p (operand))
3245
                         /* A reloaded address is offsettable because it is now
3246
                            just a simple register indirect.  */
3247
                         || address_reloaded[i] == 1))
3248
                    || (REG_P (operand)
3249
                        && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3250
                        && reg_renumber[REGNO (operand)] < 0
3251
                        /* If reg_equiv_address is nonzero, we will be
3252
                           loading it into a register; hence it will be
3253
                           offsettable, but we cannot say that reg_equiv_mem
3254
                           is offsettable without checking.  */
3255
                        && ((reg_equiv_mem[REGNO (operand)] != 0
3256
                             && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3257
                            || (reg_equiv_address[REGNO (operand)] != 0))))
3258
                  win = 1;
3259
                if (CONST_POOL_OK_P (operand)
3260
                    || MEM_P (operand))
3261
                  badop = 0;
3262
                constmemok = 1;
3263
                offmemok = 1;
3264
                break;
3265
 
3266
              case '&':
3267
                /* Output operand that is stored before the need for the
3268
                   input operands (and their index registers) is over.  */
3269
                earlyclobber = 1, this_earlyclobber = 1;
3270
                break;
3271
 
3272
              case 'E':
3273
              case 'F':
3274
                if (GET_CODE (operand) == CONST_DOUBLE
3275
                    || (GET_CODE (operand) == CONST_VECTOR
3276
                        && (GET_MODE_CLASS (GET_MODE (operand))
3277
                            == MODE_VECTOR_FLOAT)))
3278
                  win = 1;
3279
                break;
3280
 
3281
              case 'G':
3282
              case 'H':
3283
                if (GET_CODE (operand) == CONST_DOUBLE
3284
                    && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3285
                  win = 1;
3286
                break;
3287
 
3288
              case 's':
3289
                if (GET_CODE (operand) == CONST_INT
3290
                    || (GET_CODE (operand) == CONST_DOUBLE
3291
                        && GET_MODE (operand) == VOIDmode))
3292
                  break;
3293
              case 'i':
3294
                if (CONSTANT_P (operand)
3295
                    && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3296
                  win = 1;
3297
                break;
3298
 
3299
              case 'n':
3300
                if (GET_CODE (operand) == CONST_INT
3301
                    || (GET_CODE (operand) == CONST_DOUBLE
3302
                        && GET_MODE (operand) == VOIDmode))
3303
                  win = 1;
3304
                break;
3305
 
3306
              case 'I':
3307
              case 'J':
3308
              case 'K':
3309
              case 'L':
3310
              case 'M':
3311
              case 'N':
3312
              case 'O':
3313
              case 'P':
3314
                if (GET_CODE (operand) == CONST_INT
3315
                    && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3316
                  win = 1;
3317
                break;
3318
 
3319
              case 'X':
3320
                win = 1;
3321
                break;
3322
 
3323
              case 'g':
3324
                if (! force_reload
3325
                    /* A PLUS is never a valid operand, but reload can make
3326
                       it from a register when eliminating registers.  */
3327
                    && GET_CODE (operand) != PLUS
3328
                    /* A SCRATCH is not a valid operand.  */
3329
                    && GET_CODE (operand) != SCRATCH
3330
                    && (! CONSTANT_P (operand)
3331
                        || ! flag_pic
3332
                        || LEGITIMATE_PIC_OPERAND_P (operand))
3333
                    && (GENERAL_REGS == ALL_REGS
3334
                        || !REG_P (operand)
3335
                        || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3336
                            && reg_renumber[REGNO (operand)] < 0)))
3337
                  win = 1;
3338
                /* Drop through into 'r' case.  */
3339
 
3340
              case 'r':
3341
                this_alternative[i]
3342
                  = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3343
                goto reg;
3344
 
3345
              default:
3346
                if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3347
                  {
3348
#ifdef EXTRA_CONSTRAINT_STR
3349
                    if (EXTRA_MEMORY_CONSTRAINT (c, p))
3350
                      {
3351
                        if (force_reload)
3352
                          break;
3353
                        if (EXTRA_CONSTRAINT_STR (operand, c, p))
3354
                          win = 1;
3355
                        /* If the address was already reloaded,
3356
                           we win as well.  */
3357
                        else if (MEM_P (operand)
3358
                                 && address_reloaded[i] == 1)
3359
                          win = 1;
3360
                        /* Likewise if the address will be reloaded because
3361
                           reg_equiv_address is nonzero.  For reg_equiv_mem
3362
                           we have to check.  */
3363
                        else if (REG_P (operand)
3364
                                 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3365
                                 && reg_renumber[REGNO (operand)] < 0
3366
                                 && ((reg_equiv_mem[REGNO (operand)] != 0
3367
                                      && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3368
                                     || (reg_equiv_address[REGNO (operand)] != 0)))
3369
                          win = 1;
3370
 
3371
                        /* If we didn't already win, we can reload
3372
                           constants via force_const_mem, and other
3373
                           MEMs by reloading the address like for 'o'.  */
3374
                        if (CONST_POOL_OK_P (operand)
3375
                            || MEM_P (operand))
3376
                          badop = 0;
3377
                        constmemok = 1;
3378
                        offmemok = 1;
3379
                        break;
3380
                      }
3381
                    if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3382
                      {
3383
                        if (EXTRA_CONSTRAINT_STR (operand, c, p))
3384
                          win = 1;
3385
 
3386
                        /* If we didn't already win, we can reload
3387
                           the address into a base register.  */
3388
                        this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3389
                        badop = 0;
3390
                        break;
3391
                      }
3392
 
3393
                    if (EXTRA_CONSTRAINT_STR (operand, c, p))
3394
                      win = 1;
3395
#endif
3396
                    break;
3397
                  }
3398
 
3399
                this_alternative[i]
3400
                  = (int) (reg_class_subunion
3401
                           [this_alternative[i]]
3402
                           [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3403
              reg:
3404
                if (GET_MODE (operand) == BLKmode)
3405
                  break;
3406
                winreg = 1;
3407
                if (REG_P (operand)
3408
                    && reg_fits_class_p (operand, this_alternative[i],
3409
                                         offset, GET_MODE (recog_data.operand[i])))
3410
                  win = 1;
3411
                break;
3412
              }
3413
          while ((p += len), c);
3414
 
3415
          constraints[i] = p;
3416
 
3417
          /* If this operand could be handled with a reg,
3418
             and some reg is allowed, then this operand can be handled.  */
3419
          if (winreg && this_alternative[i] != (int) NO_REGS)
3420
            badop = 0;
3421
 
3422
          /* Record which operands fit this alternative.  */
3423
          this_alternative_earlyclobber[i] = earlyclobber;
3424
          if (win && ! force_reload)
3425
            this_alternative_win[i] = 1;
3426
          else if (did_match && ! force_reload)
3427
            this_alternative_match_win[i] = 1;
3428
          else
3429
            {
3430
              int const_to_mem = 0;
3431
 
3432
              this_alternative_offmemok[i] = offmemok;
3433
              losers++;
3434
              if (badop)
3435
                bad = 1;
3436
              /* Alternative loses if it has no regs for a reg operand.  */
3437
              if (REG_P (operand)
3438
                  && this_alternative[i] == (int) NO_REGS
3439
                  && this_alternative_matches[i] < 0)
3440
                bad = 1;
3441
 
3442
              /* If this is a constant that is reloaded into the desired
3443
                 class by copying it to memory first, count that as another
3444
                 reload.  This is consistent with other code and is
3445
                 required to avoid choosing another alternative when
3446
                 the constant is moved into memory by this function on
3447
                 an early reload pass.  Note that the test here is
3448
                 precisely the same as in the code below that calls
3449
                 force_const_mem.  */
3450
              if (CONST_POOL_OK_P (operand)
3451
                  && ((PREFERRED_RELOAD_CLASS (operand,
3452
                                               (enum reg_class) this_alternative[i])
3453
                       == NO_REGS)
3454
                      || no_input_reloads)
3455
                  && operand_mode[i] != VOIDmode)
3456
                {
3457
                  const_to_mem = 1;
3458
                  if (this_alternative[i] != (int) NO_REGS)
3459
                    losers++;
3460
                }
3461
 
3462
              /* If we can't reload this value at all, reject this
3463
                 alternative.  Note that we could also lose due to
3464
                 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3465
                 here.  */
3466
 
3467
              if (! CONSTANT_P (operand)
3468
                  && (enum reg_class) this_alternative[i] != NO_REGS
3469
                  && (PREFERRED_RELOAD_CLASS (operand,
3470
                                              (enum reg_class) this_alternative[i])
3471
                      == NO_REGS))
3472
                bad = 1;
3473
 
3474
              /* Alternative loses if it requires a type of reload not
3475
                 permitted for this insn.  We can always reload SCRATCH
3476
                 and objects with a REG_UNUSED note.  */
3477
              else if (GET_CODE (operand) != SCRATCH
3478
                       && modified[i] != RELOAD_READ && no_output_reloads
3479
                       && ! find_reg_note (insn, REG_UNUSED, operand))
3480
                bad = 1;
3481
              else if (modified[i] != RELOAD_WRITE && no_input_reloads
3482
                       && ! const_to_mem)
3483
                bad = 1;
3484
 
3485
              /* We prefer to reload pseudos over reloading other things,
3486
                 since such reloads may be able to be eliminated later.
3487
                 If we are reloading a SCRATCH, we won't be generating any
3488
                 insns, just using a register, so it is also preferred.
3489
                 So bump REJECT in other cases.  Don't do this in the
3490
                 case where we are forcing a constant into memory and
3491
                 it will then win since we don't want to have a different
3492
                 alternative match then.  */
3493
              if (! (REG_P (operand)
3494
                     && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3495
                  && GET_CODE (operand) != SCRATCH
3496
                  && ! (const_to_mem && constmemok))
3497
                reject += 2;
3498
 
3499
              /* Input reloads can be inherited more often than output
3500
                 reloads can be removed, so penalize output reloads.  */
3501
              if (operand_type[i] != RELOAD_FOR_INPUT
3502
                  && GET_CODE (operand) != SCRATCH)
3503
                reject++;
3504
            }
3505
 
3506
          /* If this operand is a pseudo register that didn't get a hard
3507
             reg and this alternative accepts some register, see if the
3508
             class that we want is a subset of the preferred class for this
3509
             register.  If not, but it intersects that class, use the
3510
             preferred class instead.  If it does not intersect the preferred
3511
             class, show that usage of this alternative should be discouraged;
3512
             it will be discouraged more still if the register is `preferred
3513
             or nothing'.  We do this because it increases the chance of
3514
             reusing our spill register in a later insn and avoiding a pair
3515
             of memory stores and loads.
3516
 
3517
             Don't bother with this if this alternative will accept this
3518
             operand.
3519
 
3520
             Don't do this for a multiword operand, since it is only a
3521
             small win and has the risk of requiring more spill registers,
3522
             which could cause a large loss.
3523
 
3524
             Don't do this if the preferred class has only one register
3525
             because we might otherwise exhaust the class.  */
3526
 
3527
          if (! win && ! did_match
3528
              && this_alternative[i] != (int) NO_REGS
3529
              && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3530
              && reg_class_size [(int) preferred_class[i]] > 0
3531
              && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3532
            {
3533
              if (! reg_class_subset_p (this_alternative[i],
3534
                                        preferred_class[i]))
3535
                {
3536
                  /* Since we don't have a way of forming the intersection,
3537
                     we just do something special if the preferred class
3538
                     is a subset of the class we have; that's the most
3539
                     common case anyway.  */
3540
                  if (reg_class_subset_p (preferred_class[i],
3541
                                          this_alternative[i]))
3542
                    this_alternative[i] = (int) preferred_class[i];
3543
                  else
3544
                    reject += (2 + 2 * pref_or_nothing[i]);
3545
                }
3546
            }
3547
        }
3548
 
3549
      /* Now see if any output operands that are marked "earlyclobber"
3550
         in this alternative conflict with any input operands
3551
         or any memory addresses.  */
3552
 
3553
      for (i = 0; i < noperands; i++)
3554
        if (this_alternative_earlyclobber[i]
3555
            && (this_alternative_win[i] || this_alternative_match_win[i]))
3556
          {
3557
            struct decomposition early_data;
3558
 
3559
            early_data = decompose (recog_data.operand[i]);
3560
 
3561
            gcc_assert (modified[i] != RELOAD_READ);
3562
 
3563
            if (this_alternative[i] == NO_REGS)
3564
              {
3565
                this_alternative_earlyclobber[i] = 0;
3566
                gcc_assert (this_insn_is_asm);
3567
                error_for_asm (this_insn,
3568
                               "%<&%> constraint used with no register class");
3569
              }
3570
 
3571
            for (j = 0; j < noperands; j++)
3572
              /* Is this an input operand or a memory ref?  */
3573
              if ((MEM_P (recog_data.operand[j])
3574
                   || modified[j] != RELOAD_WRITE)
3575
                  && j != i
3576
                  /* Ignore things like match_operator operands.  */
3577
                  && *recog_data.constraints[j] != 0
3578
                  /* Don't count an input operand that is constrained to match
3579
                     the early clobber operand.  */
3580
                  && ! (this_alternative_matches[j] == i
3581
                        && rtx_equal_p (recog_data.operand[i],
3582
                                        recog_data.operand[j]))
3583
                  /* Is it altered by storing the earlyclobber operand?  */
3584
                  && !immune_p (recog_data.operand[j], recog_data.operand[i],
3585
                                early_data))
3586
                {
3587
                  /* If the output is in a non-empty few-regs class,
3588
                     it's costly to reload it, so reload the input instead.  */
3589
                  if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3590
                      && (REG_P (recog_data.operand[j])
3591
                          || GET_CODE (recog_data.operand[j]) == SUBREG))
3592
                    {
3593
                      losers++;
3594
                      this_alternative_win[j] = 0;
3595
                      this_alternative_match_win[j] = 0;
3596
                    }
3597
                  else
3598
                    break;
3599
                }
3600
            /* If an earlyclobber operand conflicts with something,
3601
               it must be reloaded, so request this and count the cost.  */
3602
            if (j != noperands)
3603
              {
3604
                losers++;
3605
                this_alternative_win[i] = 0;
3606
                this_alternative_match_win[j] = 0;
3607
                for (j = 0; j < noperands; j++)
3608
                  if (this_alternative_matches[j] == i
3609
                      && this_alternative_match_win[j])
3610
                    {
3611
                      this_alternative_win[j] = 0;
3612
                      this_alternative_match_win[j] = 0;
3613
                      losers++;
3614
                    }
3615
              }
3616
          }
3617
 
3618
      /* If one alternative accepts all the operands, no reload required,
3619
         choose that alternative; don't consider the remaining ones.  */
3620
      if (losers == 0)
3621
        {
3622
          /* Unswap these so that they are never swapped at `finish'.  */
3623
          if (commutative >= 0)
3624
            {
3625
              recog_data.operand[commutative] = substed_operand[commutative];
3626
              recog_data.operand[commutative + 1]
3627
                = substed_operand[commutative + 1];
3628
            }
3629
          for (i = 0; i < noperands; i++)
3630
            {
3631
              goal_alternative_win[i] = this_alternative_win[i];
3632
              goal_alternative_match_win[i] = this_alternative_match_win[i];
3633
              goal_alternative[i] = this_alternative[i];
3634
              goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3635
              goal_alternative_matches[i] = this_alternative_matches[i];
3636
              goal_alternative_earlyclobber[i]
3637
                = this_alternative_earlyclobber[i];
3638
            }
3639
          goal_alternative_number = this_alternative_number;
3640
          goal_alternative_swapped = swapped;
3641
          goal_earlyclobber = this_earlyclobber;
3642
          goto finish;
3643
        }
3644
 
3645
      /* REJECT, set by the ! and ? constraint characters and when a register
3646
         would be reloaded into a non-preferred class, discourages the use of
3647
         this alternative for a reload goal.  REJECT is incremented by six
3648
         for each ? and two for each non-preferred class.  */
3649
      losers = losers * 6 + reject;
3650
 
3651
      /* If this alternative can be made to work by reloading,
3652
         and it needs less reloading than the others checked so far,
3653
         record it as the chosen goal for reloading.  */
3654
      if (! bad && best > losers)
3655
        {
3656
          for (i = 0; i < noperands; i++)
3657
            {
3658
              goal_alternative[i] = this_alternative[i];
3659
              goal_alternative_win[i] = this_alternative_win[i];
3660
              goal_alternative_match_win[i] = this_alternative_match_win[i];
3661
              goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3662
              goal_alternative_matches[i] = this_alternative_matches[i];
3663
              goal_alternative_earlyclobber[i]
3664
                = this_alternative_earlyclobber[i];
3665
            }
3666
          goal_alternative_swapped = swapped;
3667
          best = losers;
3668
          goal_alternative_number = this_alternative_number;
3669
          goal_earlyclobber = this_earlyclobber;
3670
        }
3671
    }
3672
 
3673
  /* If insn is commutative (it's safe to exchange a certain pair of operands)
3674
     then we need to try each alternative twice,
3675
     the second time matching those two operands
3676
     as if we had exchanged them.
3677
     To do this, really exchange them in operands.
3678
 
3679
     If we have just tried the alternatives the second time,
3680
     return operands to normal and drop through.  */
3681
 
3682
  if (commutative >= 0)
3683
    {
3684
      swapped = !swapped;
3685
      if (swapped)
3686
        {
3687
          enum reg_class tclass;
3688
          int t;
3689
 
3690
          recog_data.operand[commutative] = substed_operand[commutative + 1];
3691
          recog_data.operand[commutative + 1] = substed_operand[commutative];
3692
          /* Swap the duplicates too.  */
3693
          for (i = 0; i < recog_data.n_dups; i++)
3694
            if (recog_data.dup_num[i] == commutative
3695
                || recog_data.dup_num[i] == commutative + 1)
3696
              *recog_data.dup_loc[i]
3697
                 = recog_data.operand[(int) recog_data.dup_num[i]];
3698
 
3699
          tclass = preferred_class[commutative];
3700
          preferred_class[commutative] = preferred_class[commutative + 1];
3701
          preferred_class[commutative + 1] = tclass;
3702
 
3703
          t = pref_or_nothing[commutative];
3704
          pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3705
          pref_or_nothing[commutative + 1] = t;
3706
 
3707
          t = address_reloaded[commutative];
3708
          address_reloaded[commutative] = address_reloaded[commutative + 1];
3709
          address_reloaded[commutative + 1] = t;
3710
 
3711
          memcpy (constraints, recog_data.constraints,
3712
                  noperands * sizeof (char *));
3713
          goto try_swapped;
3714
        }
3715
      else
3716
        {
3717
          recog_data.operand[commutative] = substed_operand[commutative];
3718
          recog_data.operand[commutative + 1]
3719
            = substed_operand[commutative + 1];
3720
          /* Unswap the duplicates too.  */
3721
          for (i = 0; i < recog_data.n_dups; i++)
3722
            if (recog_data.dup_num[i] == commutative
3723
                || recog_data.dup_num[i] == commutative + 1)
3724
              *recog_data.dup_loc[i]
3725
                 = recog_data.operand[(int) recog_data.dup_num[i]];
3726
        }
3727
    }
3728
 
3729
  /* The operands don't meet the constraints.
3730
     goal_alternative describes the alternative
3731
     that we could reach by reloading the fewest operands.
3732
     Reload so as to fit it.  */
3733
 
3734
  if (best == MAX_RECOG_OPERANDS * 2 + 600)
3735
    {
3736
      /* No alternative works with reloads??  */
3737
      if (insn_code_number >= 0)
3738
        fatal_insn ("unable to generate reloads for:", insn);
3739
      error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3740
      /* Avoid further trouble with this insn.  */
3741
      PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3742
      n_reloads = 0;
3743
      return 0;
3744
    }
3745
 
3746
  /* Jump to `finish' from above if all operands are valid already.
3747
     In that case, goal_alternative_win is all 1.  */
3748
 finish:
3749
 
3750
  /* Right now, for any pair of operands I and J that are required to match,
3751
     with I < J,
3752
     goal_alternative_matches[J] is I.
3753
     Set up goal_alternative_matched as the inverse function:
3754
     goal_alternative_matched[I] = J.  */
3755
 
3756
  for (i = 0; i < noperands; i++)
3757
    goal_alternative_matched[i] = -1;
3758
 
3759
  for (i = 0; i < noperands; i++)
3760
    if (! goal_alternative_win[i]
3761
        && goal_alternative_matches[i] >= 0)
3762
      goal_alternative_matched[goal_alternative_matches[i]] = i;
3763
 
3764
  for (i = 0; i < noperands; i++)
3765
    goal_alternative_win[i] |= goal_alternative_match_win[i];
3766
 
3767
  /* If the best alternative is with operands 1 and 2 swapped,
3768
     consider them swapped before reporting the reloads.  Update the
3769
     operand numbers of any reloads already pushed.  */
3770
 
3771
  if (goal_alternative_swapped)
3772
    {
3773
      rtx tem;
3774
 
3775
      tem = substed_operand[commutative];
3776
      substed_operand[commutative] = substed_operand[commutative + 1];
3777
      substed_operand[commutative + 1] = tem;
3778
      tem = recog_data.operand[commutative];
3779
      recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3780
      recog_data.operand[commutative + 1] = tem;
3781
      tem = *recog_data.operand_loc[commutative];
3782
      *recog_data.operand_loc[commutative]
3783
        = *recog_data.operand_loc[commutative + 1];
3784
      *recog_data.operand_loc[commutative + 1] = tem;
3785
 
3786
      for (i = 0; i < n_reloads; i++)
3787
        {
3788
          if (rld[i].opnum == commutative)
3789
            rld[i].opnum = commutative + 1;
3790
          else if (rld[i].opnum == commutative + 1)
3791
            rld[i].opnum = commutative;
3792
        }
3793
    }
3794
 
3795
  for (i = 0; i < noperands; i++)
3796
    {
3797
      operand_reloadnum[i] = -1;
3798
 
3799
      /* If this is an earlyclobber operand, we need to widen the scope.
3800
         The reload must remain valid from the start of the insn being
3801
         reloaded until after the operand is stored into its destination.
3802
         We approximate this with RELOAD_OTHER even though we know that we
3803
         do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3804
 
3805
         One special case that is worth checking is when we have an
3806
         output that is earlyclobber but isn't used past the insn (typically
3807
         a SCRATCH).  In this case, we only need have the reload live
3808
         through the insn itself, but not for any of our input or output
3809
         reloads.
3810
         But we must not accidentally narrow the scope of an existing
3811
         RELOAD_OTHER reload - leave these alone.
3812
 
3813
         In any case, anything needed to address this operand can remain
3814
         however they were previously categorized.  */
3815
 
3816
      if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3817
        operand_type[i]
3818
          = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3819
             ? RELOAD_FOR_INSN : RELOAD_OTHER);
3820
    }
3821
 
3822
  /* Any constants that aren't allowed and can't be reloaded
3823
     into registers are here changed into memory references.  */
3824
  for (i = 0; i < noperands; i++)
3825
    if (! goal_alternative_win[i]
3826
        && CONST_POOL_OK_P (recog_data.operand[i])
3827
        && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3828
                                     (enum reg_class) goal_alternative[i])
3829
             == NO_REGS)
3830
            || no_input_reloads)
3831
        && operand_mode[i] != VOIDmode)
3832
      {
3833
        substed_operand[i] = recog_data.operand[i]
3834
          = find_reloads_toplev (force_const_mem (operand_mode[i],
3835
                                                  recog_data.operand[i]),
3836
                                 i, address_type[i], ind_levels, 0, insn,
3837
                                 NULL);
3838
        if (alternative_allows_memconst (recog_data.constraints[i],
3839
                                         goal_alternative_number))
3840
          goal_alternative_win[i] = 1;
3841
      }
3842
 
3843
  /* Likewise any invalid constants appearing as operand of a PLUS
3844
     that is to be reloaded.  */
3845
  for (i = 0; i < noperands; i++)
3846
    if (! goal_alternative_win[i]
3847
        && GET_CODE (recog_data.operand[i]) == PLUS
3848
        && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3849
        && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3850
                                    (enum reg_class) goal_alternative[i])
3851
             == NO_REGS)
3852
        && operand_mode[i] != VOIDmode)
3853
      {
3854
        rtx tem = force_const_mem (operand_mode[i],
3855
                                   XEXP (recog_data.operand[i], 1));
3856
        tem = gen_rtx_PLUS (operand_mode[i],
3857
                            XEXP (recog_data.operand[i], 0), tem);
3858
 
3859
        substed_operand[i] = recog_data.operand[i]
3860
          = find_reloads_toplev (tem, i, address_type[i],
3861
                                 ind_levels, 0, insn, NULL);
3862
      }
3863
 
3864
  /* Record the values of the earlyclobber operands for the caller.  */
3865
  if (goal_earlyclobber)
3866
    for (i = 0; i < noperands; i++)
3867
      if (goal_alternative_earlyclobber[i])
3868
        reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3869
 
3870
  /* Now record reloads for all the operands that need them.  */
3871
  for (i = 0; i < noperands; i++)
3872
    if (! goal_alternative_win[i])
3873
      {
3874
        /* Operands that match previous ones have already been handled.  */
3875
        if (goal_alternative_matches[i] >= 0)
3876
          ;
3877
        /* Handle an operand with a nonoffsettable address
3878
           appearing where an offsettable address will do
3879
           by reloading the address into a base register.
3880
 
3881
           ??? We can also do this when the operand is a register and
3882
           reg_equiv_mem is not offsettable, but this is a bit tricky,
3883
           so we don't bother with it.  It may not be worth doing.  */
3884
        else if (goal_alternative_matched[i] == -1
3885
                 && goal_alternative_offmemok[i]
3886
                 && MEM_P (recog_data.operand[i]))
3887
          {
3888
            operand_reloadnum[i]
3889
              = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3890
                             &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3891
                             MODE_BASE_REG_CLASS (VOIDmode),
3892
                             GET_MODE (XEXP (recog_data.operand[i], 0)),
3893
                             VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3894
            rld[operand_reloadnum[i]].inc
3895
              = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3896
 
3897
            /* If this operand is an output, we will have made any
3898
               reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3899
               now we are treating part of the operand as an input, so
3900
               we must change these to RELOAD_FOR_INPUT_ADDRESS.  */
3901
 
3902
            if (modified[i] == RELOAD_WRITE)
3903
              {
3904
                for (j = 0; j < n_reloads; j++)
3905
                  {
3906
                    if (rld[j].opnum == i)
3907
                      {
3908
                        if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3909
                          rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3910
                        else if (rld[j].when_needed
3911
                                 == RELOAD_FOR_OUTADDR_ADDRESS)
3912
                          rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3913
                      }
3914
                  }
3915
              }
3916
          }
3917
        else if (goal_alternative_matched[i] == -1)
3918
          {
3919
            operand_reloadnum[i]
3920
              = push_reload ((modified[i] != RELOAD_WRITE
3921
                              ? recog_data.operand[i] : 0),
3922
                             (modified[i] != RELOAD_READ
3923
                              ? recog_data.operand[i] : 0),
3924
                             (modified[i] != RELOAD_WRITE
3925
                              ? recog_data.operand_loc[i] : 0),
3926
                             (modified[i] != RELOAD_READ
3927
                              ? recog_data.operand_loc[i] : 0),
3928
                             (enum reg_class) goal_alternative[i],
3929
                             (modified[i] == RELOAD_WRITE
3930
                              ? VOIDmode : operand_mode[i]),
3931
                             (modified[i] == RELOAD_READ
3932
                              ? VOIDmode : operand_mode[i]),
3933
                             (insn_code_number < 0 ? 0
3934
                              : insn_data[insn_code_number].operand[i].strict_low),
3935
                             0, i, operand_type[i]);
3936
          }
3937
        /* In a matching pair of operands, one must be input only
3938
           and the other must be output only.
3939
           Pass the input operand as IN and the other as OUT.  */
3940
        else if (modified[i] == RELOAD_READ
3941
                 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3942
          {
3943
            operand_reloadnum[i]
3944
              = push_reload (recog_data.operand[i],
3945
                             recog_data.operand[goal_alternative_matched[i]],
3946
                             recog_data.operand_loc[i],
3947
                             recog_data.operand_loc[goal_alternative_matched[i]],
3948
                             (enum reg_class) goal_alternative[i],
3949
                             operand_mode[i],
3950
                             operand_mode[goal_alternative_matched[i]],
3951
                             0, 0, i, RELOAD_OTHER);
3952
            operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3953
          }
3954
        else if (modified[i] == RELOAD_WRITE
3955
                 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3956
          {
3957
            operand_reloadnum[goal_alternative_matched[i]]
3958
              = push_reload (recog_data.operand[goal_alternative_matched[i]],
3959
                             recog_data.operand[i],
3960
                             recog_data.operand_loc[goal_alternative_matched[i]],
3961
                             recog_data.operand_loc[i],
3962
                             (enum reg_class) goal_alternative[i],
3963
                             operand_mode[goal_alternative_matched[i]],
3964
                             operand_mode[i],
3965
                             0, 0, i, RELOAD_OTHER);
3966
            operand_reloadnum[i] = output_reloadnum;
3967
          }
3968
        else
3969
          {
3970
            gcc_assert (insn_code_number < 0);
3971
            error_for_asm (insn, "inconsistent operand constraints "
3972
                           "in an %<asm%>");
3973
            /* Avoid further trouble with this insn.  */
3974
            PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3975
            n_reloads = 0;
3976
            return 0;
3977
          }
3978
      }
3979
    else if (goal_alternative_matched[i] < 0
3980
             && goal_alternative_matches[i] < 0
3981
             && address_operand_reloaded[i] != 1
3982
             && optimize)
3983
      {
3984
        /* For each non-matching operand that's a MEM or a pseudo-register
3985
           that didn't get a hard register, make an optional reload.
3986
           This may get done even if the insn needs no reloads otherwise.  */
3987
 
3988
        rtx operand = recog_data.operand[i];
3989
 
3990
        while (GET_CODE (operand) == SUBREG)
3991
          operand = SUBREG_REG (operand);
3992
        if ((MEM_P (operand)
3993
             || (REG_P (operand)
3994
                 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3995
            /* If this is only for an output, the optional reload would not
3996
               actually cause us to use a register now, just note that
3997
               something is stored here.  */
3998
            && ((enum reg_class) goal_alternative[i] != NO_REGS
3999
                || modified[i] == RELOAD_WRITE)
4000
            && ! no_input_reloads
4001
            /* An optional output reload might allow to delete INSN later.
4002
               We mustn't make in-out reloads on insns that are not permitted
4003
               output reloads.
4004
               If this is an asm, we can't delete it; we must not even call
4005
               push_reload for an optional output reload in this case,
4006
               because we can't be sure that the constraint allows a register,
4007
               and push_reload verifies the constraints for asms.  */
4008
            && (modified[i] == RELOAD_READ
4009
                || (! no_output_reloads && ! this_insn_is_asm)))
4010
          operand_reloadnum[i]
4011
            = push_reload ((modified[i] != RELOAD_WRITE
4012
                            ? recog_data.operand[i] : 0),
4013
                           (modified[i] != RELOAD_READ
4014
                            ? recog_data.operand[i] : 0),
4015
                           (modified[i] != RELOAD_WRITE
4016
                            ? recog_data.operand_loc[i] : 0),
4017
                           (modified[i] != RELOAD_READ
4018
                            ? recog_data.operand_loc[i] : 0),
4019
                           (enum reg_class) goal_alternative[i],
4020
                           (modified[i] == RELOAD_WRITE
4021
                            ? VOIDmode : operand_mode[i]),
4022
                           (modified[i] == RELOAD_READ
4023
                            ? VOIDmode : operand_mode[i]),
4024
                           (insn_code_number < 0 ? 0
4025
                            : insn_data[insn_code_number].operand[i].strict_low),
4026
                           1, i, operand_type[i]);
4027
        /* If a memory reference remains (either as a MEM or a pseudo that
4028
           did not get a hard register), yet we can't make an optional
4029
           reload, check if this is actually a pseudo register reference;
4030
           we then need to emit a USE and/or a CLOBBER so that reload
4031
           inheritance will do the right thing.  */
4032
        else if (replace
4033
                 && (MEM_P (operand)
4034
                     || (REG_P (operand)
4035
                         && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4036
                         && reg_renumber [REGNO (operand)] < 0)))
4037
          {
4038
            operand = *recog_data.operand_loc[i];
4039
 
4040
            while (GET_CODE (operand) == SUBREG)
4041
              operand = SUBREG_REG (operand);
4042
            if (REG_P (operand))
4043
              {
4044
                if (modified[i] != RELOAD_WRITE)
4045
                  /* We mark the USE with QImode so that we recognize
4046
                     it as one that can be safely deleted at the end
4047
                     of reload.  */
4048
                  PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4049
                                              insn), QImode);
4050
                if (modified[i] != RELOAD_READ)
4051
                  emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4052
              }
4053
          }
4054
      }
4055
    else if (goal_alternative_matches[i] >= 0
4056
             && goal_alternative_win[goal_alternative_matches[i]]
4057
             && modified[i] == RELOAD_READ
4058
             && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4059
             && ! no_input_reloads && ! no_output_reloads
4060
             && optimize)
4061
      {
4062
        /* Similarly, make an optional reload for a pair of matching
4063
           objects that are in MEM or a pseudo that didn't get a hard reg.  */
4064
 
4065
        rtx operand = recog_data.operand[i];
4066
 
4067
        while (GET_CODE (operand) == SUBREG)
4068
          operand = SUBREG_REG (operand);
4069
        if ((MEM_P (operand)
4070
             || (REG_P (operand)
4071
                 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4072
            && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4073
                != NO_REGS))
4074
          operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4075
            = push_reload (recog_data.operand[goal_alternative_matches[i]],
4076
                           recog_data.operand[i],
4077
                           recog_data.operand_loc[goal_alternative_matches[i]],
4078
                           recog_data.operand_loc[i],
4079
                           (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4080
                           operand_mode[goal_alternative_matches[i]],
4081
                           operand_mode[i],
4082
                           0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4083
      }
4084
 
4085
  /* Perform whatever substitutions on the operands we are supposed
4086
     to make due to commutativity or replacement of registers
4087
     with equivalent constants or memory slots.  */
4088
 
4089
  for (i = 0; i < noperands; i++)
4090
    {
4091
      /* We only do this on the last pass through reload, because it is
4092
         possible for some data (like reg_equiv_address) to be changed during
4093
         later passes.  Moreover, we loose the opportunity to get a useful
4094
         reload_{in,out}_reg when we do these replacements.  */
4095
 
4096
      if (replace)
4097
        {
4098
          rtx substitution = substed_operand[i];
4099
 
4100
          *recog_data.operand_loc[i] = substitution;
4101
 
4102
          /* If we're replacing an operand with a LABEL_REF, we need
4103
             to make sure that there's a REG_LABEL note attached to
4104
             this instruction.  */
4105
          if (!JUMP_P (insn)
4106
              && GET_CODE (substitution) == LABEL_REF
4107
              && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4108
            REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4109
                                                  XEXP (substitution, 0),
4110
                                                  REG_NOTES (insn));
4111
        }
4112
      else
4113
        retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4114
    }
4115
 
4116
  /* If this insn pattern contains any MATCH_DUP's, make sure that
4117
     they will be substituted if the operands they match are substituted.
4118
     Also do now any substitutions we already did on the operands.
4119
 
4120
     Don't do this if we aren't making replacements because we might be
4121
     propagating things allocated by frame pointer elimination into places
4122
     it doesn't expect.  */
4123
 
4124
  if (insn_code_number >= 0 && replace)
4125
    for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4126
      {
4127
        int opno = recog_data.dup_num[i];
4128
        *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4129
        dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4130
      }
4131
 
4132
#if 0
4133
  /* This loses because reloading of prior insns can invalidate the equivalence
4134
     (or at least find_equiv_reg isn't smart enough to find it any more),
4135
     causing this insn to need more reload regs than it needed before.
4136
     It may be too late to make the reload regs available.
4137
     Now this optimization is done safely in choose_reload_regs.  */
4138
 
4139
  /* For each reload of a reg into some other class of reg,
4140
     search for an existing equivalent reg (same value now) in the right class.
4141
     We can use it as long as we don't need to change its contents.  */
4142
  for (i = 0; i < n_reloads; i++)
4143
    if (rld[i].reg_rtx == 0
4144
        && rld[i].in != 0
4145
        && REG_P (rld[i].in)
4146
        && rld[i].out == 0)
4147
      {
4148
        rld[i].reg_rtx
4149
          = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4150
                            static_reload_reg_p, 0, rld[i].inmode);
4151
        /* Prevent generation of insn to load the value
4152
           because the one we found already has the value.  */
4153
        if (rld[i].reg_rtx)
4154
          rld[i].in = rld[i].reg_rtx;
4155
      }
4156
#endif
4157
 
4158
  /* Perhaps an output reload can be combined with another
4159
     to reduce needs by one.  */
4160
  if (!goal_earlyclobber)
4161
    combine_reloads ();
4162
 
4163
  /* If we have a pair of reloads for parts of an address, they are reloading
4164
     the same object, the operands themselves were not reloaded, and they
4165
     are for two operands that are supposed to match, merge the reloads and
4166
     change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS.  */
4167
 
4168
  for (i = 0; i < n_reloads; i++)
4169
    {
4170
      int k;
4171
 
4172
      for (j = i + 1; j < n_reloads; j++)
4173
        if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4174
             || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4175
             || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4176
             || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4177
            && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4178
                || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4179
                || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4180
                || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4181
            && rtx_equal_p (rld[i].in, rld[j].in)
4182
            && (operand_reloadnum[rld[i].opnum] < 0
4183
                || rld[operand_reloadnum[rld[i].opnum]].optional)
4184
            && (operand_reloadnum[rld[j].opnum] < 0
4185
                || rld[operand_reloadnum[rld[j].opnum]].optional)
4186
            && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4187
                || (goal_alternative_matches[rld[j].opnum]
4188
                    == rld[i].opnum)))
4189
          {
4190
            for (k = 0; k < n_replacements; k++)
4191
              if (replacements[k].what == j)
4192
                replacements[k].what = i;
4193
 
4194
            if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4195
                || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4196
              rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4197
            else
4198
              rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4199
            rld[j].in = 0;
4200
          }
4201
    }
4202
 
4203
  /* Scan all the reloads and update their type.
4204
     If a reload is for the address of an operand and we didn't reload
4205
     that operand, change the type.  Similarly, change the operand number
4206
     of a reload when two operands match.  If a reload is optional, treat it
4207
     as though the operand isn't reloaded.
4208
 
4209
     ??? This latter case is somewhat odd because if we do the optional
4210
     reload, it means the object is hanging around.  Thus we need only
4211
     do the address reload if the optional reload was NOT done.
4212
 
4213
     Change secondary reloads to be the address type of their operand, not
4214
     the normal type.
4215
 
4216
     If an operand's reload is now RELOAD_OTHER, change any
4217
     RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4218
     RELOAD_FOR_OTHER_ADDRESS.  */
4219
 
4220
  for (i = 0; i < n_reloads; i++)
4221
    {
4222
      if (rld[i].secondary_p
4223
          && rld[i].when_needed == operand_type[rld[i].opnum])
4224
        rld[i].when_needed = address_type[rld[i].opnum];
4225
 
4226
      if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4227
           || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4228
           || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4229
           || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4230
          && (operand_reloadnum[rld[i].opnum] < 0
4231
              || rld[operand_reloadnum[rld[i].opnum]].optional))
4232
        {
4233
          /* If we have a secondary reload to go along with this reload,
4234
             change its type to RELOAD_FOR_OPADDR_ADDR.  */
4235
 
4236
          if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4237
               || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4238
              && rld[i].secondary_in_reload != -1)
4239
            {
4240
              int secondary_in_reload = rld[i].secondary_in_reload;
4241
 
4242
              rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4243
 
4244
              /* If there's a tertiary reload we have to change it also.  */
4245
              if (secondary_in_reload > 0
4246
                  && rld[secondary_in_reload].secondary_in_reload != -1)
4247
                rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4248
                  = RELOAD_FOR_OPADDR_ADDR;
4249
            }
4250
 
4251
          if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4252
               || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4253
              && rld[i].secondary_out_reload != -1)
4254
            {
4255
              int secondary_out_reload = rld[i].secondary_out_reload;
4256
 
4257
              rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4258
 
4259
              /* If there's a tertiary reload we have to change it also.  */
4260
              if (secondary_out_reload
4261
                  && rld[secondary_out_reload].secondary_out_reload != -1)
4262
                rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4263
                  = RELOAD_FOR_OPADDR_ADDR;
4264
            }
4265
 
4266
          if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4267
              || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4268
            rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4269
          else
4270
            rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4271
        }
4272
 
4273
      if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4274
           || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4275
          && operand_reloadnum[rld[i].opnum] >= 0
4276
          && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4277
              == RELOAD_OTHER))
4278
        rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4279
 
4280
      if (goal_alternative_matches[rld[i].opnum] >= 0)
4281
        rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4282
    }
4283
 
4284
  /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4285
     If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4286
     reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4287
 
4288
     choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4289
     conflict with RELOAD_FOR_OPERAND_ADDRESS reloads.  This is true for a
4290
     single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4291
     However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4292
     then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4293
     RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4294
     This is complicated by the fact that a single operand can have more
4295
     than one RELOAD_FOR_OPERAND_ADDRESS reload.  It is very difficult to fix
4296
     choose_reload_regs without affecting code quality, and cases that
4297
     actually fail are extremely rare, so it turns out to be better to fix
4298
     the problem here by not generating cases that choose_reload_regs will
4299
     fail for.  */
4300
  /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4301
     RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4302
     a single operand.
4303
     We can reduce the register pressure by exploiting that a
4304
     RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4305
     does not conflict with any of them, if it is only used for the first of
4306
     the RELOAD_FOR_X_ADDRESS reloads.  */
4307
  {
4308
    int first_op_addr_num = -2;
4309
    int first_inpaddr_num[MAX_RECOG_OPERANDS];
4310
    int first_outpaddr_num[MAX_RECOG_OPERANDS];
4311
    int need_change = 0;
4312
    /* We use last_op_addr_reload and the contents of the above arrays
4313
       first as flags - -2 means no instance encountered, -1 means exactly
4314
       one instance encountered.
4315
       If more than one instance has been encountered, we store the reload
4316
       number of the first reload of the kind in question; reload numbers
4317
       are known to be non-negative.  */
4318
    for (i = 0; i < noperands; i++)
4319
      first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4320
    for (i = n_reloads - 1; i >= 0; i--)
4321
      {
4322
        switch (rld[i].when_needed)
4323
          {
4324
          case RELOAD_FOR_OPERAND_ADDRESS:
4325
            if (++first_op_addr_num >= 0)
4326
              {
4327
                first_op_addr_num = i;
4328
                need_change = 1;
4329
              }
4330
            break;
4331
          case RELOAD_FOR_INPUT_ADDRESS:
4332
            if (++first_inpaddr_num[rld[i].opnum] >= 0)
4333
              {
4334
                first_inpaddr_num[rld[i].opnum] = i;
4335
                need_change = 1;
4336
              }
4337
            break;
4338
          case RELOAD_FOR_OUTPUT_ADDRESS:
4339
            if (++first_outpaddr_num[rld[i].opnum] >= 0)
4340
              {
4341
                first_outpaddr_num[rld[i].opnum] = i;
4342
                need_change = 1;
4343
              }
4344
            break;
4345
          default:
4346
            break;
4347
          }
4348
      }
4349
 
4350
    if (need_change)
4351
      {
4352
        for (i = 0; i < n_reloads; i++)
4353
          {
4354
            int first_num;
4355
            enum reload_type type;
4356
 
4357
            switch (rld[i].when_needed)
4358
              {
4359
              case RELOAD_FOR_OPADDR_ADDR:
4360
                first_num = first_op_addr_num;
4361
                type = RELOAD_FOR_OPERAND_ADDRESS;
4362
                break;
4363
              case RELOAD_FOR_INPADDR_ADDRESS:
4364
                first_num = first_inpaddr_num[rld[i].opnum];
4365
                type = RELOAD_FOR_INPUT_ADDRESS;
4366
                break;
4367
              case RELOAD_FOR_OUTADDR_ADDRESS:
4368
                first_num = first_outpaddr_num[rld[i].opnum];
4369
                type = RELOAD_FOR_OUTPUT_ADDRESS;
4370
                break;
4371
              default:
4372
                continue;
4373
              }
4374
            if (first_num < 0)
4375
              continue;
4376
            else if (i > first_num)
4377
              rld[i].when_needed = type;
4378
            else
4379
              {
4380
                /* Check if the only TYPE reload that uses reload I is
4381
                   reload FIRST_NUM.  */
4382
                for (j = n_reloads - 1; j > first_num; j--)
4383
                  {
4384
                    if (rld[j].when_needed == type
4385
                        && (rld[i].secondary_p
4386
                            ? rld[j].secondary_in_reload == i
4387
                            : reg_mentioned_p (rld[i].in, rld[j].in)))
4388
                      {
4389
                        rld[i].when_needed = type;
4390
                        break;
4391
                      }
4392
                  }
4393
              }
4394
          }
4395
      }
4396
  }
4397
 
4398
  /* See if we have any reloads that are now allowed to be merged
4399
     because we've changed when the reload is needed to
4400
     RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS.  Only
4401
     check for the most common cases.  */
4402
 
4403
  for (i = 0; i < n_reloads; i++)
4404
    if (rld[i].in != 0 && rld[i].out == 0
4405
        && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4406
            || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4407
            || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4408
      for (j = 0; j < n_reloads; j++)
4409
        if (i != j && rld[j].in != 0 && rld[j].out == 0
4410
            && rld[j].when_needed == rld[i].when_needed
4411
            && MATCHES (rld[i].in, rld[j].in)
4412
            && rld[i].class == rld[j].class
4413
            && !rld[i].nocombine && !rld[j].nocombine
4414
            && rld[i].reg_rtx == rld[j].reg_rtx)
4415
          {
4416
            rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4417
            transfer_replacements (i, j);
4418
            rld[j].in = 0;
4419
          }
4420
 
4421
#ifdef HAVE_cc0
4422
  /* If we made any reloads for addresses, see if they violate a
4423
     "no input reloads" requirement for this insn.  But loads that we
4424
     do after the insn (such as for output addresses) are fine.  */
4425
  if (no_input_reloads)
4426
    for (i = 0; i < n_reloads; i++)
4427
      gcc_assert (rld[i].in == 0
4428
                  || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4429
                  || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4430
#endif
4431
 
4432
  /* Compute reload_mode and reload_nregs.  */
4433
  for (i = 0; i < n_reloads; i++)
4434
    {
4435
      rld[i].mode
4436
        = (rld[i].inmode == VOIDmode
4437
           || (GET_MODE_SIZE (rld[i].outmode)
4438
               > GET_MODE_SIZE (rld[i].inmode)))
4439
          ? rld[i].outmode : rld[i].inmode;
4440
 
4441
      rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4442
    }
4443
 
4444
  /* Special case a simple move with an input reload and a
4445
     destination of a hard reg, if the hard reg is ok, use it.  */
4446
  for (i = 0; i < n_reloads; i++)
4447
    if (rld[i].when_needed == RELOAD_FOR_INPUT
4448
        && GET_CODE (PATTERN (insn)) == SET
4449
        && REG_P (SET_DEST (PATTERN (insn)))
4450
        && SET_SRC (PATTERN (insn)) == rld[i].in)
4451
      {
4452
        rtx dest = SET_DEST (PATTERN (insn));
4453
        unsigned int regno = REGNO (dest);
4454
 
4455
        if (regno < FIRST_PSEUDO_REGISTER
4456
            && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4457
            && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4458
          {
4459
            int nr = hard_regno_nregs[regno][rld[i].mode];
4460
            int ok = 1, nri;
4461
 
4462
            for (nri = 1; nri < nr; nri ++)
4463
              if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4464
                ok = 0;
4465
 
4466
            if (ok)
4467
              rld[i].reg_rtx = dest;
4468
          }
4469
      }
4470
 
4471
  return retval;
4472
}
4473
 
4474
/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4475
   accepts a memory operand with constant address.  */
4476
 
4477
static int
4478
alternative_allows_memconst (const char *constraint, int altnum)
4479
{
4480
  int c;
4481
  /* Skip alternatives before the one requested.  */
4482
  while (altnum > 0)
4483
    {
4484
      while (*constraint++ != ',');
4485
      altnum--;
4486
    }
4487
  /* Scan the requested alternative for 'm' or 'o'.
4488
     If one of them is present, this alternative accepts memory constants.  */
4489
  for (; (c = *constraint) && c != ',' && c != '#';
4490
       constraint += CONSTRAINT_LEN (c, constraint))
4491
    if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4492
      return 1;
4493
  return 0;
4494
}
4495
 
4496
/* Scan X for memory references and scan the addresses for reloading.
4497
   Also checks for references to "constant" regs that we want to eliminate
4498
   and replaces them with the values they stand for.
4499
   We may alter X destructively if it contains a reference to such.
4500
   If X is just a constant reg, we return the equivalent value
4501
   instead of X.
4502
 
4503
   IND_LEVELS says how many levels of indirect addressing this machine
4504
   supports.
4505
 
4506
   OPNUM and TYPE identify the purpose of the reload.
4507
 
4508
   IS_SET_DEST is true if X is the destination of a SET, which is not
4509
   appropriate to be replaced by a constant.
4510
 
4511
   INSN, if nonzero, is the insn in which we do the reload.  It is used
4512
   to determine if we may generate output reloads, and where to put USEs
4513
   for pseudos that we have to replace with stack slots.
4514
 
4515
   ADDRESS_RELOADED.  If nonzero, is a pointer to where we put the
4516
   result of find_reloads_address.  */
4517
 
4518
static rtx
4519
find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4520
                     int ind_levels, int is_set_dest, rtx insn,
4521
                     int *address_reloaded)
4522
{
4523
  RTX_CODE code = GET_CODE (x);
4524
 
4525
  const char *fmt = GET_RTX_FORMAT (code);
4526
  int i;
4527
  int copied;
4528
 
4529
  if (code == REG)
4530
    {
4531
      /* This code is duplicated for speed in find_reloads.  */
4532
      int regno = REGNO (x);
4533
      if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4534
        x = reg_equiv_constant[regno];
4535
#if 0
4536
      /*  This creates (subreg (mem...)) which would cause an unnecessary
4537
          reload of the mem.  */
4538
      else if (reg_equiv_mem[regno] != 0)
4539
        x = reg_equiv_mem[regno];
4540
#endif
4541
      else if (reg_equiv_memory_loc[regno]
4542
               && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4543
        {
4544
          rtx mem = make_memloc (x, regno);
4545
          if (reg_equiv_address[regno]
4546
              || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4547
            {
4548
              /* If this is not a toplevel operand, find_reloads doesn't see
4549
                 this substitution.  We have to emit a USE of the pseudo so
4550
                 that delete_output_reload can see it.  */
4551
              if (replace_reloads && recog_data.operand[opnum] != x)
4552
                /* We mark the USE with QImode so that we recognize it
4553
                   as one that can be safely deleted at the end of
4554
                   reload.  */
4555
                PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4556
                          QImode);
4557
              x = mem;
4558
              i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4559
                                        opnum, type, ind_levels, insn);
4560
              if (address_reloaded)
4561
                *address_reloaded = i;
4562
            }
4563
        }
4564
      return x;
4565
    }
4566
  if (code == MEM)
4567
    {
4568
      rtx tem = x;
4569
 
4570
      i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4571
                                opnum, type, ind_levels, insn);
4572
      if (address_reloaded)
4573
        *address_reloaded = i;
4574
 
4575
      return tem;
4576
    }
4577
 
4578
  if (code == SUBREG && REG_P (SUBREG_REG (x)))
4579
    {
4580
      /* Check for SUBREG containing a REG that's equivalent to a
4581
         constant.  If the constant has a known value, truncate it
4582
         right now.  Similarly if we are extracting a single-word of a
4583
         multi-word constant.  If the constant is symbolic, allow it
4584
         to be substituted normally.  push_reload will strip the
4585
         subreg later.  The constant must not be VOIDmode, because we
4586
         will lose the mode of the register (this should never happen
4587
         because one of the cases above should handle it).  */
4588
 
4589
      int regno = REGNO (SUBREG_REG (x));
4590
      rtx tem;
4591
 
4592
      if (subreg_lowpart_p (x)
4593
          && regno >= FIRST_PSEUDO_REGISTER
4594
          && reg_renumber[regno] < 0
4595
          && reg_equiv_constant[regno] != 0
4596
          && (tem = gen_lowpart_common (GET_MODE (x),
4597
                                        reg_equiv_constant[regno])) != 0
4598
          && LEGITIMATE_CONSTANT_P (tem))
4599
        return tem;
4600
 
4601
      if (regno >= FIRST_PSEUDO_REGISTER
4602
          && reg_renumber[regno] < 0
4603
          && reg_equiv_constant[regno] != 0)
4604
        {
4605
          tem =
4606
            simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4607
                                 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4608
          gcc_assert (tem);
4609
          if (LEGITIMATE_CONSTANT_P (tem))
4610
            return tem;
4611
        }
4612
 
4613
      /* If the subreg contains a reg that will be converted to a mem,
4614
         convert the subreg to a narrower memref now.
4615
         Otherwise, we would get (subreg (mem ...) ...),
4616
         which would force reload of the mem.
4617
 
4618
         We also need to do this if there is an equivalent MEM that is
4619
         not offsettable.  In that case, alter_subreg would produce an
4620
         invalid address on big-endian machines.
4621
 
4622
         For machines that extend byte loads, we must not reload using
4623
         a wider mode if we have a paradoxical SUBREG.  find_reloads will
4624
         force a reload in that case.  So we should not do anything here.  */
4625
 
4626
      if (regno >= FIRST_PSEUDO_REGISTER
4627
#ifdef LOAD_EXTEND_OP
4628
               && (GET_MODE_SIZE (GET_MODE (x))
4629
                   <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4630
#endif
4631
               && (reg_equiv_address[regno] != 0
4632
                   || (reg_equiv_mem[regno] != 0
4633
                       && (! strict_memory_address_p (GET_MODE (x),
4634
                                                      XEXP (reg_equiv_mem[regno], 0))
4635
                           || ! offsettable_memref_p (reg_equiv_mem[regno])
4636
                           || num_not_at_initial_offset))))
4637
        x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4638
                                         insn);
4639
    }
4640
 
4641
  for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4642
    {
4643
      if (fmt[i] == 'e')
4644
        {
4645
          rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4646
                                              ind_levels, is_set_dest, insn,
4647
                                              address_reloaded);
4648
          /* If we have replaced a reg with it's equivalent memory loc -
4649
             that can still be handled here e.g. if it's in a paradoxical
4650
             subreg - we must make the change in a copy, rather than using
4651
             a destructive change.  This way, find_reloads can still elect
4652
             not to do the change.  */
4653
          if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4654
            {
4655
              x = shallow_copy_rtx (x);
4656
              copied = 1;
4657
            }
4658
          XEXP (x, i) = new_part;
4659
        }
4660
    }
4661
  return x;
4662
}
4663
 
4664
/* Return a mem ref for the memory equivalent of reg REGNO.
4665
   This mem ref is not shared with anything.  */
4666
 
4667
static rtx
4668
make_memloc (rtx ad, int regno)
4669
{
4670
  /* We must rerun eliminate_regs, in case the elimination
4671
     offsets have changed.  */
4672
  rtx tem
4673
    = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4674
 
4675
  /* If TEM might contain a pseudo, we must copy it to avoid
4676
     modifying it when we do the substitution for the reload.  */
4677
  if (rtx_varies_p (tem, 0))
4678
    tem = copy_rtx (tem);
4679
 
4680
  tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4681
  tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4682
 
4683
  /* Copy the result if it's still the same as the equivalence, to avoid
4684
     modifying it when we do the substitution for the reload.  */
4685
  if (tem == reg_equiv_memory_loc[regno])
4686
    tem = copy_rtx (tem);
4687
  return tem;
4688
}
4689
 
4690
/* Returns true if AD could be turned into a valid memory reference
4691
   to mode MODE by reloading the part pointed to by PART into a
4692
   register.  */
4693
 
4694
static int
4695
maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4696
{
4697
  int retv;
4698
  rtx tem = *part;
4699
  rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4700
 
4701
  *part = reg;
4702
  retv = memory_address_p (mode, ad);
4703
  *part = tem;
4704
 
4705
  return retv;
4706
}
4707
 
4708
/* Record all reloads needed for handling memory address AD
4709
   which appears in *LOC in a memory reference to mode MODE
4710
   which itself is found in location  *MEMREFLOC.
4711
   Note that we take shortcuts assuming that no multi-reg machine mode
4712
   occurs as part of an address.
4713
 
4714
   OPNUM and TYPE specify the purpose of this reload.
4715
 
4716
   IND_LEVELS says how many levels of indirect addressing this machine
4717
   supports.
4718
 
4719
   INSN, if nonzero, is the insn in which we do the reload.  It is used
4720
   to determine if we may generate output reloads, and where to put USEs
4721
   for pseudos that we have to replace with stack slots.
4722
 
4723
   Value is one if this address is reloaded or replaced as a whole; it is
4724
   zero if the top level of this address was not reloaded or replaced, and
4725
   it is -1 if it may or may not have been reloaded or replaced.
4726
 
4727
   Note that there is no verification that the address will be valid after
4728
   this routine does its work.  Instead, we rely on the fact that the address
4729
   was valid when reload started.  So we need only undo things that reload
4730
   could have broken.  These are wrong register types, pseudos not allocated
4731
   to a hard register, and frame pointer elimination.  */
4732
 
4733
static int
4734
find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4735
                      rtx *loc, int opnum, enum reload_type type,
4736
                      int ind_levels, rtx insn)
4737
{
4738
  int regno;
4739
  int removed_and = 0;
4740
  int op_index;
4741
  rtx tem;
4742
 
4743
  /* If the address is a register, see if it is a legitimate address and
4744
     reload if not.  We first handle the cases where we need not reload
4745
     or where we must reload in a non-standard way.  */
4746
 
4747
  if (REG_P (ad))
4748
    {
4749
      regno = REGNO (ad);
4750
 
4751
      /* If the register is equivalent to an invariant expression, substitute
4752
         the invariant, and eliminate any eliminable register references.  */
4753
      tem = reg_equiv_constant[regno];
4754
      if (tem != 0
4755
          && (tem = eliminate_regs (tem, mode, insn))
4756
          && strict_memory_address_p (mode, tem))
4757
        {
4758
          *loc = ad = tem;
4759
          return 0;
4760
        }
4761
 
4762
      tem = reg_equiv_memory_loc[regno];
4763
      if (tem != 0)
4764
        {
4765
          if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4766
            {
4767
              tem = make_memloc (ad, regno);
4768
              if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4769
                {
4770
                  find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4771
                                        &XEXP (tem, 0), opnum,
4772
                                        ADDR_TYPE (type), ind_levels, insn);
4773
                }
4774
              /* We can avoid a reload if the register's equivalent memory
4775
                 expression is valid as an indirect memory address.
4776
                 But not all addresses are valid in a mem used as an indirect
4777
                 address: only reg or reg+constant.  */
4778
 
4779
              if (ind_levels > 0
4780
                  && strict_memory_address_p (mode, tem)
4781
                  && (REG_P (XEXP (tem, 0))
4782
                      || (GET_CODE (XEXP (tem, 0)) == PLUS
4783
                          && REG_P (XEXP (XEXP (tem, 0), 0))
4784
                          && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4785
                {
4786
                  /* TEM is not the same as what we'll be replacing the
4787
                     pseudo with after reload, put a USE in front of INSN
4788
                     in the final reload pass.  */
4789
                  if (replace_reloads
4790
                      && num_not_at_initial_offset
4791
                      && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4792
                    {
4793
                      *loc = tem;
4794
                      /* We mark the USE with QImode so that we
4795
                         recognize it as one that can be safely
4796
                         deleted at the end of reload.  */
4797
                      PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4798
                                                  insn), QImode);
4799
 
4800
                      /* This doesn't really count as replacing the address
4801
                         as a whole, since it is still a memory access.  */
4802
                    }
4803
                  return 0;
4804
                }
4805
              ad = tem;
4806
            }
4807
        }
4808
 
4809
      /* The only remaining case where we can avoid a reload is if this is a
4810
         hard register that is valid as a base register and which is not the
4811
         subject of a CLOBBER in this insn.  */
4812
 
4813
      else if (regno < FIRST_PSEUDO_REGISTER
4814
               && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4815
               && ! regno_clobbered_p (regno, this_insn, mode, 0))
4816
        return 0;
4817
 
4818
      /* If we do not have one of the cases above, we must do the reload.  */
4819
      push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4820
                   GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4821
      return 1;
4822
    }
4823
 
4824
  if (strict_memory_address_p (mode, ad))
4825
    {
4826
      /* The address appears valid, so reloads are not needed.
4827
         But the address may contain an eliminable register.
4828
         This can happen because a machine with indirect addressing
4829
         may consider a pseudo register by itself a valid address even when
4830
         it has failed to get a hard reg.
4831
         So do a tree-walk to find and eliminate all such regs.  */
4832
 
4833
      /* But first quickly dispose of a common case.  */
4834
      if (GET_CODE (ad) == PLUS
4835
          && GET_CODE (XEXP (ad, 1)) == CONST_INT
4836
          && REG_P (XEXP (ad, 0))
4837
          && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4838
        return 0;
4839
 
4840
      subst_reg_equivs_changed = 0;
4841
      *loc = subst_reg_equivs (ad, insn);
4842
 
4843
      if (! subst_reg_equivs_changed)
4844
        return 0;
4845
 
4846
      /* Check result for validity after substitution.  */
4847
      if (strict_memory_address_p (mode, ad))
4848
        return 0;
4849
    }
4850
 
4851
#ifdef LEGITIMIZE_RELOAD_ADDRESS
4852
  do
4853
    {
4854
      if (memrefloc)
4855
        {
4856
          LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4857
                                     ind_levels, win);
4858
        }
4859
      break;
4860
    win:
4861
      *memrefloc = copy_rtx (*memrefloc);
4862
      XEXP (*memrefloc, 0) = ad;
4863
      move_replacements (&ad, &XEXP (*memrefloc, 0));
4864
      return -1;
4865
    }
4866
  while (0);
4867
#endif
4868
 
4869
  /* The address is not valid.  We have to figure out why.  First see if
4870
     we have an outer AND and remove it if so.  Then analyze what's inside.  */
4871
 
4872
  if (GET_CODE (ad) == AND)
4873
    {
4874
      removed_and = 1;
4875
      loc = &XEXP (ad, 0);
4876
      ad = *loc;
4877
    }
4878
 
4879
  /* One possibility for why the address is invalid is that it is itself
4880
     a MEM.  This can happen when the frame pointer is being eliminated, a
4881
     pseudo is not allocated to a hard register, and the offset between the
4882
     frame and stack pointers is not its initial value.  In that case the
4883
     pseudo will have been replaced by a MEM referring to the
4884
     stack pointer.  */
4885
  if (MEM_P (ad))
4886
    {
4887
      /* First ensure that the address in this MEM is valid.  Then, unless
4888
         indirect addresses are valid, reload the MEM into a register.  */
4889
      tem = ad;
4890
      find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4891
                            opnum, ADDR_TYPE (type),
4892
                            ind_levels == 0 ? 0 : ind_levels - 1, insn);
4893
 
4894
      /* If tem was changed, then we must create a new memory reference to
4895
         hold it and store it back into memrefloc.  */
4896
      if (tem != ad && memrefloc)
4897
        {
4898
          *memrefloc = copy_rtx (*memrefloc);
4899
          copy_replacements (tem, XEXP (*memrefloc, 0));
4900
          loc = &XEXP (*memrefloc, 0);
4901
          if (removed_and)
4902
            loc = &XEXP (*loc, 0);
4903
        }
4904
 
4905
      /* Check similar cases as for indirect addresses as above except
4906
         that we can allow pseudos and a MEM since they should have been
4907
         taken care of above.  */
4908
 
4909
      if (ind_levels == 0
4910
          || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4911
          || MEM_P (XEXP (tem, 0))
4912
          || ! (REG_P (XEXP (tem, 0))
4913
                || (GET_CODE (XEXP (tem, 0)) == PLUS
4914
                    && REG_P (XEXP (XEXP (tem, 0), 0))
4915
                    && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4916
        {
4917
          /* Must use TEM here, not AD, since it is the one that will
4918
             have any subexpressions reloaded, if needed.  */
4919
          push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4920
                       MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4921
                       VOIDmode, 0,
4922
                       0, opnum, type);
4923
          return ! removed_and;
4924
        }
4925
      else
4926
        return 0;
4927
    }
4928
 
4929
  /* If we have address of a stack slot but it's not valid because the
4930
     displacement is too large, compute the sum in a register.
4931
     Handle all base registers here, not just fp/ap/sp, because on some
4932
     targets (namely SH) we can also get too large displacements from
4933
     big-endian corrections.  */
4934
  else if (GET_CODE (ad) == PLUS
4935
           && REG_P (XEXP (ad, 0))
4936
           && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4937
           && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4938
           && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4939
    {
4940
      /* Unshare the MEM rtx so we can safely alter it.  */
4941
      if (memrefloc)
4942
        {
4943
          *memrefloc = copy_rtx (*memrefloc);
4944
          loc = &XEXP (*memrefloc, 0);
4945
          if (removed_and)
4946
            loc = &XEXP (*loc, 0);
4947
        }
4948
 
4949
      if (double_reg_address_ok)
4950
        {
4951
          /* Unshare the sum as well.  */
4952
          *loc = ad = copy_rtx (ad);
4953
 
4954
          /* Reload the displacement into an index reg.
4955
             We assume the frame pointer or arg pointer is a base reg.  */
4956
          find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4957
                                     INDEX_REG_CLASS, GET_MODE (ad), opnum,
4958
                                     type, ind_levels);
4959
          return 0;
4960
        }
4961
      else
4962
        {
4963
          /* If the sum of two regs is not necessarily valid,
4964
             reload the sum into a base reg.
4965
             That will at least work.  */
4966
          find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4967
                                     Pmode, opnum, type, ind_levels);
4968
        }
4969
      return ! removed_and;
4970
    }
4971
 
4972
  /* If we have an indexed stack slot, there are three possible reasons why
4973
     it might be invalid: The index might need to be reloaded, the address
4974
     might have been made by frame pointer elimination and hence have a
4975
     constant out of range, or both reasons might apply.
4976
 
4977
     We can easily check for an index needing reload, but even if that is the
4978
     case, we might also have an invalid constant.  To avoid making the
4979
     conservative assumption and requiring two reloads, we see if this address
4980
     is valid when not interpreted strictly.  If it is, the only problem is
4981
     that the index needs a reload and find_reloads_address_1 will take care
4982
     of it.
4983
 
4984
     Handle all base registers here, not just fp/ap/sp, because on some
4985
     targets (namely SPARC) we can also get invalid addresses from preventive
4986
     subreg big-endian corrections made by find_reloads_toplev.  We
4987
     can also get expressions involving LO_SUM (rather than PLUS) from
4988
     find_reloads_subreg_address.
4989
 
4990
     If we decide to do something, it must be that `double_reg_address_ok'
4991
     is true.  We generate a reload of the base register + constant and
4992
     rework the sum so that the reload register will be added to the index.
4993
     This is safe because we know the address isn't shared.
4994
 
4995
     We check for the base register as both the first and second operand of
4996
     the innermost PLUS and/or LO_SUM.  */
4997
 
4998
  for (op_index = 0; op_index < 2; ++op_index)
4999
    {
5000
      rtx operand;
5001
 
5002
      if (!(GET_CODE (ad) == PLUS
5003
            && GET_CODE (XEXP (ad, 1)) == CONST_INT
5004
            && (GET_CODE (XEXP (ad, 0)) == PLUS
5005
                || GET_CODE (XEXP (ad, 0)) == LO_SUM)))
5006
        continue;
5007
 
5008
      operand = XEXP (XEXP (ad, 0), op_index);
5009
      if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5010
        continue;
5011
 
5012
      if ((REG_MODE_OK_FOR_BASE_P (operand, mode)
5013
           || operand == frame_pointer_rtx
5014
#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5015
           || operand == hard_frame_pointer_rtx
5016
#endif
5017
#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5018
           || operand == arg_pointer_rtx
5019
#endif
5020
           || operand == stack_pointer_rtx)
5021
          && ! maybe_memory_address_p (mode, ad,
5022
                                       &XEXP (XEXP (ad, 0), 1 - op_index)))
5023
        {
5024
          rtx offset_reg;
5025
          rtx addend;
5026
 
5027
          offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5028
          addend = XEXP (XEXP (ad, 0), 1 - op_index);
5029
 
5030
          /* Form the adjusted address.  */
5031
          if (GET_CODE (XEXP (ad, 0)) == PLUS)
5032
            ad = gen_rtx_PLUS (GET_MODE (ad),
5033
                               op_index == 0 ? offset_reg : addend,
5034
                               op_index == 0 ? addend : offset_reg);
5035
          else
5036
            ad = gen_rtx_LO_SUM (GET_MODE (ad),
5037
                                 op_index == 0 ? offset_reg : addend,
5038
                                 op_index == 0 ? addend : offset_reg);
5039
          *loc = ad;
5040
 
5041
          find_reloads_address_part (XEXP (ad, op_index),
5042
                                     &XEXP (ad, op_index),
5043
                                     MODE_BASE_REG_CLASS (mode),
5044
                                     GET_MODE (ad), opnum, type, ind_levels);
5045
          find_reloads_address_1 (mode,
5046
                                  XEXP (ad, 1 - op_index), 1,
5047
                                  &XEXP (ad, 1 - op_index), opnum,
5048
                                  type, 0, insn);
5049
 
5050
          return 0;
5051
        }
5052
    }
5053
 
5054
  /* See if address becomes valid when an eliminable register
5055
     in a sum is replaced.  */
5056
 
5057
  tem = ad;
5058
  if (GET_CODE (ad) == PLUS)
5059
    tem = subst_indexed_address (ad);
5060
  if (tem != ad && strict_memory_address_p (mode, tem))
5061
    {
5062
      /* Ok, we win that way.  Replace any additional eliminable
5063
         registers.  */
5064
 
5065
      subst_reg_equivs_changed = 0;
5066
      tem = subst_reg_equivs (tem, insn);
5067
 
5068
      /* Make sure that didn't make the address invalid again.  */
5069
 
5070
      if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5071
        {
5072
          *loc = tem;
5073
          return 0;
5074
        }
5075
    }
5076
 
5077
  /* If constants aren't valid addresses, reload the constant address
5078
     into a register.  */
5079
  if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5080
    {
5081
      /* If AD is an address in the constant pool, the MEM rtx may be shared.
5082
         Unshare it so we can safely alter it.  */
5083
      if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5084
          && CONSTANT_POOL_ADDRESS_P (ad))
5085
        {
5086
          *memrefloc = copy_rtx (*memrefloc);
5087
          loc = &XEXP (*memrefloc, 0);
5088
          if (removed_and)
5089
            loc = &XEXP (*loc, 0);
5090
        }
5091
 
5092
      find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
5093
                                 Pmode, opnum, type, ind_levels);
5094
      return ! removed_and;
5095
    }
5096
 
5097
  return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5098
                                 insn);
5099
}
5100
 
5101
/* Find all pseudo regs appearing in AD
5102
   that are eliminable in favor of equivalent values
5103
   and do not have hard regs; replace them by their equivalents.
5104
   INSN, if nonzero, is the insn in which we do the reload.  We put USEs in
5105
   front of it for pseudos that we have to replace with stack slots.  */
5106
 
5107
static rtx
5108
subst_reg_equivs (rtx ad, rtx insn)
5109
{
5110
  RTX_CODE code = GET_CODE (ad);
5111
  int i;
5112
  const char *fmt;
5113
 
5114
  switch (code)
5115
    {
5116
    case HIGH:
5117
    case CONST_INT:
5118
    case CONST:
5119
    case CONST_DOUBLE:
5120
    case CONST_VECTOR:
5121
    case SYMBOL_REF:
5122
    case LABEL_REF:
5123
    case PC:
5124
    case CC0:
5125
      return ad;
5126
 
5127
    case REG:
5128
      {
5129
        int regno = REGNO (ad);
5130
 
5131
        if (reg_equiv_constant[regno] != 0)
5132
          {
5133
            subst_reg_equivs_changed = 1;
5134
            return reg_equiv_constant[regno];
5135
          }
5136
        if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5137
          {
5138
            rtx mem = make_memloc (ad, regno);
5139
            if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5140
              {
5141
                subst_reg_equivs_changed = 1;
5142
                /* We mark the USE with QImode so that we recognize it
5143
                   as one that can be safely deleted at the end of
5144
                   reload.  */
5145
                PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5146
                          QImode);
5147
                return mem;
5148
              }
5149
          }
5150
      }
5151
      return ad;
5152
 
5153
    case PLUS:
5154
      /* Quickly dispose of a common case.  */
5155
      if (XEXP (ad, 0) == frame_pointer_rtx
5156
          && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5157
        return ad;
5158
      break;
5159
 
5160
    default:
5161
      break;
5162
    }
5163
 
5164
  fmt = GET_RTX_FORMAT (code);
5165
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5166
    if (fmt[i] == 'e')
5167
      XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5168
  return ad;
5169
}
5170
 
5171
/* Compute the sum of X and Y, making canonicalizations assumed in an
5172
   address, namely: sum constant integers, surround the sum of two
5173
   constants with a CONST, put the constant as the second operand, and
5174
   group the constant on the outermost sum.
5175
 
5176
   This routine assumes both inputs are already in canonical form.  */
5177
 
5178
rtx
5179
form_sum (rtx x, rtx y)
5180
{
5181
  rtx tem;
5182
  enum machine_mode mode = GET_MODE (x);
5183
 
5184
  if (mode == VOIDmode)
5185
    mode = GET_MODE (y);
5186
 
5187
  if (mode == VOIDmode)
5188
    mode = Pmode;
5189
 
5190
  if (GET_CODE (x) == CONST_INT)
5191
    return plus_constant (y, INTVAL (x));
5192
  else if (GET_CODE (y) == CONST_INT)
5193
    return plus_constant (x, INTVAL (y));
5194
  else if (CONSTANT_P (x))
5195
    tem = x, x = y, y = tem;
5196
 
5197
  if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5198
    return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5199
 
5200
  /* Note that if the operands of Y are specified in the opposite
5201
     order in the recursive calls below, infinite recursion will occur.  */
5202
  if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5203
    return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5204
 
5205
  /* If both constant, encapsulate sum.  Otherwise, just form sum.  A
5206
     constant will have been placed second.  */
5207
  if (CONSTANT_P (x) && CONSTANT_P (y))
5208
    {
5209
      if (GET_CODE (x) == CONST)
5210
        x = XEXP (x, 0);
5211
      if (GET_CODE (y) == CONST)
5212
        y = XEXP (y, 0);
5213
 
5214
      return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5215
    }
5216
 
5217
  return gen_rtx_PLUS (mode, x, y);
5218
}
5219
 
5220
/* If ADDR is a sum containing a pseudo register that should be
5221
   replaced with a constant (from reg_equiv_constant),
5222
   return the result of doing so, and also apply the associative
5223
   law so that the result is more likely to be a valid address.
5224
   (But it is not guaranteed to be one.)
5225
 
5226
   Note that at most one register is replaced, even if more are
5227
   replaceable.  Also, we try to put the result into a canonical form
5228
   so it is more likely to be a valid address.
5229
 
5230
   In all other cases, return ADDR.  */
5231
 
5232
static rtx
5233
subst_indexed_address (rtx addr)
5234
{
5235
  rtx op0 = 0, op1 = 0, op2 = 0;
5236
  rtx tem;
5237
  int regno;
5238
 
5239
  if (GET_CODE (addr) == PLUS)
5240
    {
5241
      /* Try to find a register to replace.  */
5242
      op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5243
      if (REG_P (op0)
5244
          && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5245
          && reg_renumber[regno] < 0
5246
          && reg_equiv_constant[regno] != 0)
5247
        op0 = reg_equiv_constant[regno];
5248
      else if (REG_P (op1)
5249
               && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5250
               && reg_renumber[regno] < 0
5251
               && reg_equiv_constant[regno] != 0)
5252
        op1 = reg_equiv_constant[regno];
5253
      else if (GET_CODE (op0) == PLUS
5254
               && (tem = subst_indexed_address (op0)) != op0)
5255
        op0 = tem;
5256
      else if (GET_CODE (op1) == PLUS
5257
               && (tem = subst_indexed_address (op1)) != op1)
5258
        op1 = tem;
5259
      else
5260
        return addr;
5261
 
5262
      /* Pick out up to three things to add.  */
5263
      if (GET_CODE (op1) == PLUS)
5264
        op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5265
      else if (GET_CODE (op0) == PLUS)
5266
        op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5267
 
5268
      /* Compute the sum.  */
5269
      if (op2 != 0)
5270
        op1 = form_sum (op1, op2);
5271
      if (op1 != 0)
5272
        op0 = form_sum (op0, op1);
5273
 
5274
      return op0;
5275
    }
5276
  return addr;
5277
}
5278
 
5279
/* Update the REG_INC notes for an insn.  It updates all REG_INC
5280
   notes for the instruction which refer to REGNO the to refer
5281
   to the reload number.
5282
 
5283
   INSN is the insn for which any REG_INC notes need updating.
5284
 
5285
   REGNO is the register number which has been reloaded.
5286
 
5287
   RELOADNUM is the reload number.  */
5288
 
5289
static void
5290
update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5291
                       int reloadnum ATTRIBUTE_UNUSED)
5292
{
5293
#ifdef AUTO_INC_DEC
5294
  rtx link;
5295
 
5296
  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5297
    if (REG_NOTE_KIND (link) == REG_INC
5298
        && (int) REGNO (XEXP (link, 0)) == regno)
5299
      push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5300
#endif
5301
}
5302
 
5303
/* Record the pseudo registers we must reload into hard registers in a
5304
   subexpression of a would-be memory address, X referring to a value
5305
   in mode MODE.  (This function is not called if the address we find
5306
   is strictly valid.)
5307
 
5308
   CONTEXT = 1 means we are considering regs as index regs,
5309
   = 0 means we are considering them as base regs, = 2 means we
5310
   are considering them as base regs for REG + REG.
5311
 
5312
   OPNUM and TYPE specify the purpose of any reloads made.
5313
 
5314
   IND_LEVELS says how many levels of indirect addressing are
5315
   supported at this point in the address.
5316
 
5317
   INSN, if nonzero, is the insn in which we do the reload.  It is used
5318
   to determine if we may generate output reloads.
5319
 
5320
   We return nonzero if X, as a whole, is reloaded or replaced.  */
5321
 
5322
/* Note that we take shortcuts assuming that no multi-reg machine mode
5323
   occurs as part of an address.
5324
   Also, this is not fully machine-customizable; it works for machines
5325
   such as VAXen and 68000's and 32000's, but other possible machines
5326
   could have addressing modes that this does not handle right.
5327
   If you add push_reload calls here, you need to make sure gen_reload
5328
   handles those cases gracefully.  */
5329
 
5330
static int
5331
find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5332
                        rtx *loc, int opnum, enum reload_type type,
5333
                        int ind_levels, rtx insn)
5334
{
5335
#define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE)                \
5336
  ((CONTEXT) == 2                                       \
5337
   ? REGNO_MODE_OK_FOR_REG_BASE_P (REGNO, MODE)         \
5338
   : (CONTEXT) == 1                                     \
5339
   ? REGNO_OK_FOR_INDEX_P (REGNO)                       \
5340
   : REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE))
5341
 
5342
  enum reg_class context_reg_class;
5343
  RTX_CODE code = GET_CODE (x);
5344
 
5345
  if (context == 2)
5346
    context_reg_class = MODE_BASE_REG_REG_CLASS (mode);
5347
  else if (context == 1)
5348
    context_reg_class = INDEX_REG_CLASS;
5349
  else
5350
    context_reg_class = MODE_BASE_REG_CLASS (mode);
5351
 
5352
  switch (code)
5353
    {
5354
    case PLUS:
5355
      {
5356
        rtx orig_op0 = XEXP (x, 0);
5357
        rtx orig_op1 = XEXP (x, 1);
5358
        RTX_CODE code0 = GET_CODE (orig_op0);
5359
        RTX_CODE code1 = GET_CODE (orig_op1);
5360
        rtx op0 = orig_op0;
5361
        rtx op1 = orig_op1;
5362
 
5363
        if (GET_CODE (op0) == SUBREG)
5364
          {
5365
            op0 = SUBREG_REG (op0);
5366
            code0 = GET_CODE (op0);
5367
            if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5368
              op0 = gen_rtx_REG (word_mode,
5369
                                 (REGNO (op0) +
5370
                                  subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5371
                                                       GET_MODE (SUBREG_REG (orig_op0)),
5372
                                                       SUBREG_BYTE (orig_op0),
5373
                                                       GET_MODE (orig_op0))));
5374
          }
5375
 
5376
        if (GET_CODE (op1) == SUBREG)
5377
          {
5378
            op1 = SUBREG_REG (op1);
5379
            code1 = GET_CODE (op1);
5380
            if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5381
              /* ??? Why is this given op1's mode and above for
5382
                 ??? op0 SUBREGs we use word_mode?  */
5383
              op1 = gen_rtx_REG (GET_MODE (op1),
5384
                                 (REGNO (op1) +
5385
                                  subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5386
                                                       GET_MODE (SUBREG_REG (orig_op1)),
5387
                                                       SUBREG_BYTE (orig_op1),
5388
                                                       GET_MODE (orig_op1))));
5389
          }
5390
        /* Plus in the index register may be created only as a result of
5391
           register remateralization for expression like &localvar*4.  Reload it.
5392
           It may be possible to combine the displacement on the outer level,
5393
           but it is probably not worthwhile to do so.  */
5394
        if (context == 1)
5395
          {
5396
            find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5397
                                  opnum, ADDR_TYPE (type), ind_levels, insn);
5398
            push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5399
                         context_reg_class,
5400
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5401
            return 1;
5402
          }
5403
 
5404
        if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5405
            || code0 == ZERO_EXTEND || code1 == MEM)
5406
          {
5407
            find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5408
                                    type, ind_levels, insn);
5409
            find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5410
                                    type, ind_levels, insn);
5411
          }
5412
 
5413
        else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5414
                 || code1 == ZERO_EXTEND || code0 == MEM)
5415
          {
5416
            find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5417
                                    type, ind_levels, insn);
5418
            find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5419
                                    type, ind_levels, insn);
5420
          }
5421
 
5422
        else if (code0 == CONST_INT || code0 == CONST
5423
                 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5424
          find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5425
                                  type, ind_levels, insn);
5426
 
5427
        else if (code1 == CONST_INT || code1 == CONST
5428
                 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5429
          find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5430
                                  type, ind_levels, insn);
5431
 
5432
        else if (code0 == REG && code1 == REG)
5433
          {
5434
            if (REG_OK_FOR_INDEX_P (op0)
5435
                && REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
5436
              return 0;
5437
            else if (REG_OK_FOR_INDEX_P (op1)
5438
                     && REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
5439
              return 0;
5440
            else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
5441
              find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5442
                                      type, ind_levels, insn);
5443
            else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
5444
              find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5445
                                      type, ind_levels, insn);
5446
            else if (REG_OK_FOR_INDEX_P (op1))
5447
              find_reloads_address_1 (mode, orig_op0, 2, &XEXP (x, 0), opnum,
5448
                                      type, ind_levels, insn);
5449
            else if (REG_OK_FOR_INDEX_P (op0))
5450
              find_reloads_address_1 (mode, orig_op1, 2, &XEXP (x, 1), opnum,
5451
                                      type, ind_levels, insn);
5452
            else
5453
              {
5454
                find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5455
                                        type, ind_levels, insn);
5456
                find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5457
                                        type, ind_levels, insn);
5458
              }
5459
          }
5460
 
5461
        else if (code0 == REG)
5462
          {
5463
            find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5464
                                    type, ind_levels, insn);
5465
            find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5466
                                    type, ind_levels, insn);
5467
          }
5468
 
5469
        else if (code1 == REG)
5470
          {
5471
            find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5472
                                    type, ind_levels, insn);
5473
            find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5474
                                    type, ind_levels, insn);
5475
          }
5476
      }
5477
 
5478
      return 0;
5479
 
5480
    case POST_MODIFY:
5481
    case PRE_MODIFY:
5482
      {
5483
        rtx op0 = XEXP (x, 0);
5484
        rtx op1 = XEXP (x, 1);
5485
        int regno;
5486
        int reloadnum;
5487
 
5488
        if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5489
          return 0;
5490
 
5491
        /* Currently, we only support {PRE,POST}_MODIFY constructs
5492
           where a base register is {inc,dec}remented by the contents
5493
           of another register or by a constant value.  Thus, these
5494
           operands must match.  */
5495
        gcc_assert (op0 == XEXP (op1, 0));
5496
 
5497
        /* Require index register (or constant).  Let's just handle the
5498
           register case in the meantime... If the target allows
5499
           auto-modify by a constant then we could try replacing a pseudo
5500
           register with its equivalent constant where applicable.  */
5501
        if (REG_P (XEXP (op1, 1)))
5502
          if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5503
            find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5504
                                    opnum, type, ind_levels, insn);
5505
 
5506
        gcc_assert (REG_P (XEXP (op1, 0)));
5507
 
5508
        regno = REGNO (XEXP (op1, 0));
5509
 
5510
        /* A register that is incremented cannot be constant!  */
5511
        gcc_assert (regno < FIRST_PSEUDO_REGISTER
5512
                    || reg_equiv_constant[regno] == 0);
5513
 
5514
        /* Handle a register that is equivalent to a memory location
5515
            which cannot be addressed directly.  */
5516
        if (reg_equiv_memory_loc[regno] != 0
5517
            && (reg_equiv_address[regno] != 0
5518
                || num_not_at_initial_offset))
5519
          {
5520
            rtx tem = make_memloc (XEXP (x, 0), regno);
5521
 
5522
            if (reg_equiv_address[regno]
5523
                || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5524
              {
5525
                /* First reload the memory location's address.
5526
                    We can't use ADDR_TYPE (type) here, because we need to
5527
                    write back the value after reading it, hence we actually
5528
                    need two registers.  */
5529
                find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5530
                                      &XEXP (tem, 0), opnum,
5531
                                      RELOAD_OTHER,
5532
                                      ind_levels, insn);
5533
 
5534
                /* Then reload the memory location into a base
5535
                    register.  */
5536
                reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5537
                                          &XEXP (op1, 0),
5538
                                          MODE_BASE_REG_CLASS (mode),
5539
                                          GET_MODE (x), GET_MODE (x), 0,
5540
                                          0, opnum, RELOAD_OTHER);
5541
 
5542
                update_auto_inc_notes (this_insn, regno, reloadnum);
5543
                return 0;
5544
              }
5545
          }
5546
 
5547
        if (reg_renumber[regno] >= 0)
5548
          regno = reg_renumber[regno];
5549
 
5550
        /* We require a base register here...  */
5551
        if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5552
          {
5553
            reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5554
                                      &XEXP (op1, 0), &XEXP (x, 0),
5555
                                      MODE_BASE_REG_CLASS (mode),
5556
                                      GET_MODE (x), GET_MODE (x), 0, 0,
5557
                                      opnum, RELOAD_OTHER);
5558
 
5559
            update_auto_inc_notes (this_insn, regno, reloadnum);
5560
            return 0;
5561
          }
5562
      }
5563
      return 0;
5564
 
5565
    case POST_INC:
5566
    case POST_DEC:
5567
    case PRE_INC:
5568
    case PRE_DEC:
5569
      if (REG_P (XEXP (x, 0)))
5570
        {
5571
          int regno = REGNO (XEXP (x, 0));
5572
          int value = 0;
5573
          rtx x_orig = x;
5574
 
5575
          /* A register that is incremented cannot be constant!  */
5576
          gcc_assert (regno < FIRST_PSEUDO_REGISTER
5577
                      || reg_equiv_constant[regno] == 0);
5578
 
5579
          /* Handle a register that is equivalent to a memory location
5580
             which cannot be addressed directly.  */
5581
          if (reg_equiv_memory_loc[regno] != 0
5582
              && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5583
            {
5584
              rtx tem = make_memloc (XEXP (x, 0), regno);
5585
              if (reg_equiv_address[regno]
5586
                  || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5587
                {
5588
                  /* First reload the memory location's address.
5589
                     We can't use ADDR_TYPE (type) here, because we need to
5590
                     write back the value after reading it, hence we actually
5591
                     need two registers.  */
5592
                  find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5593
                                        &XEXP (tem, 0), opnum, type,
5594
                                        ind_levels, insn);
5595
                  /* Put this inside a new increment-expression.  */
5596
                  x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5597
                  /* Proceed to reload that, as if it contained a register.  */
5598
                }
5599
            }
5600
 
5601
          /* If we have a hard register that is ok as an index,
5602
             don't make a reload.  If an autoincrement of a nice register
5603
             isn't "valid", it must be that no autoincrement is "valid".
5604
             If that is true and something made an autoincrement anyway,
5605
             this must be a special context where one is allowed.
5606
             (For example, a "push" instruction.)
5607
             We can't improve this address, so leave it alone.  */
5608
 
5609
          /* Otherwise, reload the autoincrement into a suitable hard reg
5610
             and record how much to increment by.  */
5611
 
5612
          if (reg_renumber[regno] >= 0)
5613
            regno = reg_renumber[regno];
5614
          if (regno >= FIRST_PSEUDO_REGISTER
5615
              || !REG_OK_FOR_CONTEXT (context, regno, mode))
5616
            {
5617
              int reloadnum;
5618
 
5619
              /* If we can output the register afterwards, do so, this
5620
                 saves the extra update.
5621
                 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5622
                 CALL_INSN - and it does not set CC0.
5623
                 But don't do this if we cannot directly address the
5624
                 memory location, since this will make it harder to
5625
                 reuse address reloads, and increases register pressure.
5626
                 Also don't do this if we can probably update x directly.  */
5627
              rtx equiv = (MEM_P (XEXP (x, 0))
5628
                           ? XEXP (x, 0)
5629
                           : reg_equiv_mem[regno]);
5630
              int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5631
              if (insn && NONJUMP_INSN_P (insn) && equiv
5632
                  && memory_operand (equiv, GET_MODE (equiv))
5633
#ifdef HAVE_cc0
5634
                  && ! sets_cc0_p (PATTERN (insn))
5635
#endif
5636
                  && ! (icode != CODE_FOR_nothing
5637
                        && ((*insn_data[icode].operand[0].predicate)
5638
                            (equiv, Pmode))
5639
                        && ((*insn_data[icode].operand[1].predicate)
5640
                            (equiv, Pmode))))
5641
                {
5642
                  /* We use the original pseudo for loc, so that
5643
                     emit_reload_insns() knows which pseudo this
5644
                     reload refers to and updates the pseudo rtx, not
5645
                     its equivalent memory location, as well as the
5646
                     corresponding entry in reg_last_reload_reg.  */
5647
                  loc = &XEXP (x_orig, 0);
5648
                  x = XEXP (x, 0);
5649
                  reloadnum
5650
                    = push_reload (x, x, loc, loc,
5651
                                   context_reg_class,
5652
                                   GET_MODE (x), GET_MODE (x), 0, 0,
5653
                                   opnum, RELOAD_OTHER);
5654
                }
5655
              else
5656
                {
5657
                  reloadnum
5658
                    = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5659
                                   context_reg_class,
5660
                                   GET_MODE (x), GET_MODE (x), 0, 0,
5661
                                   opnum, type);
5662
                  rld[reloadnum].inc
5663
                    = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5664
 
5665
                  value = 1;
5666
                }
5667
 
5668
              update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5669
                                     reloadnum);
5670
            }
5671
          return value;
5672
        }
5673
 
5674
      else if (MEM_P (XEXP (x, 0)))
5675
        {
5676
          /* This is probably the result of a substitution, by eliminate_regs,
5677
             of an equivalent address for a pseudo that was not allocated to a
5678
             hard register.  Verify that the specified address is valid and
5679
             reload it into a register.  */
5680
          /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE.  */
5681
          rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5682
          rtx link;
5683
          int reloadnum;
5684
 
5685
          /* Since we know we are going to reload this item, don't decrement
5686
             for the indirection level.
5687
 
5688
             Note that this is actually conservative:  it would be slightly
5689
             more efficient to use the value of SPILL_INDIRECT_LEVELS from
5690
             reload1.c here.  */
5691
          /* We can't use ADDR_TYPE (type) here, because we need to
5692
             write back the value after reading it, hence we actually
5693
             need two registers.  */
5694
          find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5695
                                XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5696
                                opnum, type, ind_levels, insn);
5697
 
5698
          reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5699
                                   context_reg_class,
5700
                                   GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5701
          rld[reloadnum].inc
5702
            = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5703
 
5704
          link = FIND_REG_INC_NOTE (this_insn, tem);
5705
          if (link != 0)
5706
            push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5707
 
5708
          return 1;
5709
        }
5710
      return 0;
5711
 
5712
    case TRUNCATE:
5713
    case SIGN_EXTEND:
5714
    case ZERO_EXTEND:
5715
      /* Look for parts to reload in the inner expression and reload them
5716
         too, in addition to this operation.  Reloading all inner parts in
5717
         addition to this one shouldn't be necessary, but at this point,
5718
         we don't know if we can possibly omit any part that *can* be
5719
         reloaded.  Targets that are better off reloading just either part
5720
         (or perhaps even a different part of an outer expression), should
5721
         define LEGITIMIZE_RELOAD_ADDRESS.  */
5722
      find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5723
                              context, &XEXP (x, 0), opnum,
5724
                              type, ind_levels, insn);
5725
      push_reload (x, NULL_RTX, loc, (rtx*) 0,
5726
                   context_reg_class,
5727
                   GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5728
      return 1;
5729
 
5730
    case MEM:
5731
      /* This is probably the result of a substitution, by eliminate_regs, of
5732
         an equivalent address for a pseudo that was not allocated to a hard
5733
         register.  Verify that the specified address is valid and reload it
5734
         into a register.
5735
 
5736
         Since we know we are going to reload this item, don't decrement for
5737
         the indirection level.
5738
 
5739
         Note that this is actually conservative:  it would be slightly more
5740
         efficient to use the value of SPILL_INDIRECT_LEVELS from
5741
         reload1.c here.  */
5742
 
5743
      find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5744
                            opnum, ADDR_TYPE (type), ind_levels, insn);
5745
      push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5746
                   context_reg_class,
5747
                   GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5748
      return 1;
5749
 
5750
    case REG:
5751
      {
5752
        int regno = REGNO (x);
5753
 
5754
        if (reg_equiv_constant[regno] != 0)
5755
          {
5756
            find_reloads_address_part (reg_equiv_constant[regno], loc,
5757
                                       context_reg_class,
5758
                                       GET_MODE (x), opnum, type, ind_levels);
5759
            return 1;
5760
          }
5761
 
5762
#if 0 /* This might screw code in reload1.c to delete prior output-reload
5763
         that feeds this insn.  */
5764
        if (reg_equiv_mem[regno] != 0)
5765
          {
5766
            push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5767
                         context_reg_class,
5768
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5769
            return 1;
5770
          }
5771
#endif
5772
 
5773
        if (reg_equiv_memory_loc[regno]
5774
            && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5775
          {
5776
            rtx tem = make_memloc (x, regno);
5777
            if (reg_equiv_address[regno] != 0
5778
                || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5779
              {
5780
                x = tem;
5781
                find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5782
                                      &XEXP (x, 0), opnum, ADDR_TYPE (type),
5783
                                      ind_levels, insn);
5784
              }
5785
          }
5786
 
5787
        if (reg_renumber[regno] >= 0)
5788
          regno = reg_renumber[regno];
5789
 
5790
        if (regno >= FIRST_PSEUDO_REGISTER
5791
            || !REG_OK_FOR_CONTEXT (context, regno, mode))
5792
          {
5793
            push_reload (x, NULL_RTX, loc, (rtx*) 0,
5794
                         context_reg_class,
5795
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5796
            return 1;
5797
          }
5798
 
5799
        /* If a register appearing in an address is the subject of a CLOBBER
5800
           in this insn, reload it into some other register to be safe.
5801
           The CLOBBER is supposed to make the register unavailable
5802
           from before this insn to after it.  */
5803
        if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5804
          {
5805
            push_reload (x, NULL_RTX, loc, (rtx*) 0,
5806
                         context_reg_class,
5807
                         GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5808
            return 1;
5809
          }
5810
      }
5811
      return 0;
5812
 
5813
    case SUBREG:
5814
      if (REG_P (SUBREG_REG (x)))
5815
        {
5816
          /* If this is a SUBREG of a hard register and the resulting register
5817
             is of the wrong class, reload the whole SUBREG.  This avoids
5818
             needless copies if SUBREG_REG is multi-word.  */
5819
          if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5820
            {
5821
              int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5822
 
5823
              if (! REG_OK_FOR_CONTEXT (context, regno, mode))
5824
                {
5825
                  push_reload (x, NULL_RTX, loc, (rtx*) 0,
5826
                               context_reg_class,
5827
                               GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5828
                  return 1;
5829
                }
5830
            }
5831
          /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5832
             is larger than the class size, then reload the whole SUBREG.  */
5833
          else
5834
            {
5835
              enum reg_class class = context_reg_class;
5836
              if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5837
                  > reg_class_size[class])
5838
                {
5839
                  x = find_reloads_subreg_address (x, 0, opnum,
5840
                                                   ADDR_TYPE (type),
5841
                                                   ind_levels, insn);
5842
                  push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5843
                               GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5844
                  return 1;
5845
                }
5846
            }
5847
        }
5848
      break;
5849
 
5850
    default:
5851
      break;
5852
    }
5853
 
5854
  {
5855
    const char *fmt = GET_RTX_FORMAT (code);
5856
    int i;
5857
 
5858
    for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5859
      {
5860
        if (fmt[i] == 'e')
5861
          find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5862
                                  opnum, type, ind_levels, insn);
5863
      }
5864
  }
5865
 
5866
#undef REG_OK_FOR_CONTEXT
5867
  return 0;
5868
}
5869
 
5870
/* X, which is found at *LOC, is a part of an address that needs to be
5871
   reloaded into a register of class CLASS.  If X is a constant, or if
5872
   X is a PLUS that contains a constant, check that the constant is a
5873
   legitimate operand and that we are supposed to be able to load
5874
   it into the register.
5875
 
5876
   If not, force the constant into memory and reload the MEM instead.
5877
 
5878
   MODE is the mode to use, in case X is an integer constant.
5879
 
5880
   OPNUM and TYPE describe the purpose of any reloads made.
5881
 
5882
   IND_LEVELS says how many levels of indirect addressing this machine
5883
   supports.  */
5884
 
5885
static void
5886
find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5887
                           enum machine_mode mode, int opnum,
5888
                           enum reload_type type, int ind_levels)
5889
{
5890
  if (CONSTANT_P (x)
5891
      && (! LEGITIMATE_CONSTANT_P (x)
5892
          || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5893
    {
5894
      rtx tem;
5895
 
5896
      tem = x = force_const_mem (mode, x);
5897
      find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5898
                            opnum, type, ind_levels, 0);
5899
    }
5900
 
5901
  else if (GET_CODE (x) == PLUS
5902
           && CONSTANT_P (XEXP (x, 1))
5903
           && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5904
               || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5905
    {
5906
      rtx tem;
5907
 
5908
      tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5909
      x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5910
      find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5911
                            opnum, type, ind_levels, 0);
5912
    }
5913
 
5914
  push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5915
               mode, VOIDmode, 0, 0, opnum, type);
5916
}
5917
 
5918
/* X, a subreg of a pseudo, is a part of an address that needs to be
5919
   reloaded.
5920
 
5921
   If the pseudo is equivalent to a memory location that cannot be directly
5922
   addressed, make the necessary address reloads.
5923
 
5924
   If address reloads have been necessary, or if the address is changed
5925
   by register elimination, return the rtx of the memory location;
5926
   otherwise, return X.
5927
 
5928
   If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5929
   memory location.
5930
 
5931
   OPNUM and TYPE identify the purpose of the reload.
5932
 
5933
   IND_LEVELS says how many levels of indirect addressing are
5934
   supported at this point in the address.
5935
 
5936
   INSN, if nonzero, is the insn in which we do the reload.  It is used
5937
   to determine where to put USEs for pseudos that we have to replace with
5938
   stack slots.  */
5939
 
5940
static rtx
5941
find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5942
                             enum reload_type type, int ind_levels, rtx insn)
5943
{
5944
  int regno = REGNO (SUBREG_REG (x));
5945
 
5946
  if (reg_equiv_memory_loc[regno])
5947
    {
5948
      /* If the address is not directly addressable, or if the address is not
5949
         offsettable, then it must be replaced.  */
5950
      if (! force_replace
5951
          && (reg_equiv_address[regno]
5952
              || ! offsettable_memref_p (reg_equiv_mem[regno])))
5953
        force_replace = 1;
5954
 
5955
      if (force_replace || num_not_at_initial_offset)
5956
        {
5957
          rtx tem = make_memloc (SUBREG_REG (x), regno);
5958
 
5959
          /* If the address changes because of register elimination, then
5960
             it must be replaced.  */
5961
          if (force_replace
5962
              || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5963
            {
5964
              unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5965
              unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5966
              int offset;
5967
 
5968
              /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5969
                 hold the correct (negative) byte offset.  */
5970
              if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5971
                offset = inner_size - outer_size;
5972
              else
5973
                offset = SUBREG_BYTE (x);
5974
 
5975
              XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5976
              PUT_MODE (tem, GET_MODE (x));
5977
 
5978
              /* If this was a paradoxical subreg that we replaced, the
5979
                 resulting memory must be sufficiently aligned to allow
5980
                 us to widen the mode of the memory.  */
5981
              if (outer_size > inner_size)
5982
                {
5983
                  rtx base;
5984
 
5985
                  base = XEXP (tem, 0);
5986
                  if (GET_CODE (base) == PLUS)
5987
                    {
5988
                      if (GET_CODE (XEXP (base, 1)) == CONST_INT
5989
                          && INTVAL (XEXP (base, 1)) % outer_size != 0)
5990
                        return x;
5991
                      base = XEXP (base, 0);
5992
                    }
5993
                  if (!REG_P (base)
5994
                      || (REGNO_POINTER_ALIGN (REGNO (base))
5995
                          < outer_size * BITS_PER_UNIT))
5996
                    return x;
5997
                }
5998
 
5999
              find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
6000
                                    &XEXP (tem, 0), opnum, type,
6001
                                    ind_levels, insn);
6002
 
6003
              /* If this is not a toplevel operand, find_reloads doesn't see
6004
                 this substitution.  We have to emit a USE of the pseudo so
6005
                 that delete_output_reload can see it.  */
6006
              if (replace_reloads && recog_data.operand[opnum] != x)
6007
                /* We mark the USE with QImode so that we recognize it
6008
                   as one that can be safely deleted at the end of
6009
                   reload.  */
6010
                PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6011
                                                         SUBREG_REG (x)),
6012
                                            insn), QImode);
6013
              x = tem;
6014
            }
6015
        }
6016
    }
6017
  return x;
6018
}
6019
 
6020
/* Substitute into the current INSN the registers into which we have reloaded
6021
   the things that need reloading.  The array `replacements'
6022
   contains the locations of all pointers that must be changed
6023
   and says what to replace them with.
6024
 
6025
   Return the rtx that X translates into; usually X, but modified.  */
6026
 
6027
void
6028
subst_reloads (rtx insn)
6029
{
6030
  int i;
6031
 
6032
  for (i = 0; i < n_replacements; i++)
6033
    {
6034
      struct replacement *r = &replacements[i];
6035
      rtx reloadreg = rld[r->what].reg_rtx;
6036
      if (reloadreg)
6037
        {
6038
#ifdef ENABLE_CHECKING
6039
          /* Internal consistency test.  Check that we don't modify
6040
             anything in the equivalence arrays.  Whenever something from
6041
             those arrays needs to be reloaded, it must be unshared before
6042
             being substituted into; the equivalence must not be modified.
6043
             Otherwise, if the equivalence is used after that, it will
6044
             have been modified, and the thing substituted (probably a
6045
             register) is likely overwritten and not a usable equivalence.  */
6046
          int check_regno;
6047
 
6048
          for (check_regno = 0; check_regno < max_regno; check_regno++)
6049
            {
6050
#define CHECK_MODF(ARRAY)                                               \
6051
              gcc_assert (!ARRAY[check_regno]                           \
6052
                          || !loc_mentioned_in_p (r->where,             \
6053
                                                  ARRAY[check_regno]))
6054
 
6055
              CHECK_MODF (reg_equiv_constant);
6056
              CHECK_MODF (reg_equiv_memory_loc);
6057
              CHECK_MODF (reg_equiv_address);
6058
              CHECK_MODF (reg_equiv_mem);
6059
#undef CHECK_MODF
6060
            }
6061
#endif /* ENABLE_CHECKING */
6062
 
6063
          /* If we're replacing a LABEL_REF with a register, add a
6064
             REG_LABEL note to indicate to flow which label this
6065
             register refers to.  */
6066
          if (GET_CODE (*r->where) == LABEL_REF
6067
              && JUMP_P (insn))
6068
            {
6069
              REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6070
                                                    XEXP (*r->where, 0),
6071
                                                    REG_NOTES (insn));
6072
              JUMP_LABEL (insn) = XEXP (*r->where, 0);
6073
           }
6074
 
6075
          /* Encapsulate RELOADREG so its machine mode matches what
6076
             used to be there.  Note that gen_lowpart_common will
6077
             do the wrong thing if RELOADREG is multi-word.  RELOADREG
6078
             will always be a REG here.  */
6079
          if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6080
            reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6081
 
6082
          /* If we are putting this into a SUBREG and RELOADREG is a
6083
             SUBREG, we would be making nested SUBREGs, so we have to fix
6084
             this up.  Note that r->where == &SUBREG_REG (*r->subreg_loc).  */
6085
 
6086
          if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6087
            {
6088
              if (GET_MODE (*r->subreg_loc)
6089
                  == GET_MODE (SUBREG_REG (reloadreg)))
6090
                *r->subreg_loc = SUBREG_REG (reloadreg);
6091
              else
6092
                {
6093
                  int final_offset =
6094
                    SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6095
 
6096
                  /* When working with SUBREGs the rule is that the byte
6097
                     offset must be a multiple of the SUBREG's mode.  */
6098
                  final_offset = (final_offset /
6099
                                  GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6100
                  final_offset = (final_offset *
6101
                                  GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6102
 
6103
                  *r->where = SUBREG_REG (reloadreg);
6104
                  SUBREG_BYTE (*r->subreg_loc) = final_offset;
6105
                }
6106
            }
6107
          else
6108
            *r->where = reloadreg;
6109
        }
6110
      /* If reload got no reg and isn't optional, something's wrong.  */
6111
      else
6112
        gcc_assert (rld[r->what].optional);
6113
    }
6114
}
6115
 
6116
/* Make a copy of any replacements being done into X and move those
6117
   copies to locations in Y, a copy of X.  */
6118
 
6119
void
6120
copy_replacements (rtx x, rtx y)
6121
{
6122
  /* We can't support X being a SUBREG because we might then need to know its
6123
     location if something inside it was replaced.  */
6124
  gcc_assert (GET_CODE (x) != SUBREG);
6125
 
6126
  copy_replacements_1 (&x, &y, n_replacements);
6127
}
6128
 
6129
static void
6130
copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6131
{
6132
  int i, j;
6133
  rtx x, y;
6134
  struct replacement *r;
6135
  enum rtx_code code;
6136
  const char *fmt;
6137
 
6138
  for (j = 0; j < orig_replacements; j++)
6139
    {
6140
      if (replacements[j].subreg_loc == px)
6141
        {
6142
          r = &replacements[n_replacements++];
6143
          r->where = replacements[j].where;
6144
          r->subreg_loc = py;
6145
          r->what = replacements[j].what;
6146
          r->mode = replacements[j].mode;
6147
        }
6148
      else if (replacements[j].where == px)
6149
        {
6150
          r = &replacements[n_replacements++];
6151
          r->where = py;
6152
          r->subreg_loc = 0;
6153
          r->what = replacements[j].what;
6154
          r->mode = replacements[j].mode;
6155
        }
6156
    }
6157
 
6158
  x = *px;
6159
  y = *py;
6160
  code = GET_CODE (x);
6161
  fmt = GET_RTX_FORMAT (code);
6162
 
6163
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6164
    {
6165
      if (fmt[i] == 'e')
6166
        copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6167
      else if (fmt[i] == 'E')
6168
        for (j = XVECLEN (x, i); --j >= 0; )
6169
          copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6170
                               orig_replacements);
6171
    }
6172
}
6173
 
6174
/* Change any replacements being done to *X to be done to *Y.  */
6175
 
6176
void
6177
move_replacements (rtx *x, rtx *y)
6178
{
6179
  int i;
6180
 
6181
  for (i = 0; i < n_replacements; i++)
6182
    if (replacements[i].subreg_loc == x)
6183
      replacements[i].subreg_loc = y;
6184
    else if (replacements[i].where == x)
6185
      {
6186
        replacements[i].where = y;
6187
        replacements[i].subreg_loc = 0;
6188
      }
6189
}
6190
 
6191
/* If LOC was scheduled to be replaced by something, return the replacement.
6192
   Otherwise, return *LOC.  */
6193
 
6194
rtx
6195
find_replacement (rtx *loc)
6196
{
6197
  struct replacement *r;
6198
 
6199
  for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6200
    {
6201
      rtx reloadreg = rld[r->what].reg_rtx;
6202
 
6203
      if (reloadreg && r->where == loc)
6204
        {
6205
          if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6206
            reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6207
 
6208
          return reloadreg;
6209
        }
6210
      else if (reloadreg && r->subreg_loc == loc)
6211
        {
6212
          /* RELOADREG must be either a REG or a SUBREG.
6213
 
6214
             ??? Is it actually still ever a SUBREG?  If so, why?  */
6215
 
6216
          if (REG_P (reloadreg))
6217
            return gen_rtx_REG (GET_MODE (*loc),
6218
                                (REGNO (reloadreg) +
6219
                                 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6220
                                                      GET_MODE (SUBREG_REG (*loc)),
6221
                                                      SUBREG_BYTE (*loc),
6222
                                                      GET_MODE (*loc))));
6223
          else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6224
            return reloadreg;
6225
          else
6226
            {
6227
              int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6228
 
6229
              /* When working with SUBREGs the rule is that the byte
6230
                 offset must be a multiple of the SUBREG's mode.  */
6231
              final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6232
              final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6233
              return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6234
                                     final_offset);
6235
            }
6236
        }
6237
    }
6238
 
6239
  /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6240
     what's inside and make a new rtl if so.  */
6241
  if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6242
      || GET_CODE (*loc) == MULT)
6243
    {
6244
      rtx x = find_replacement (&XEXP (*loc, 0));
6245
      rtx y = find_replacement (&XEXP (*loc, 1));
6246
 
6247
      if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6248
        return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6249
    }
6250
 
6251
  return *loc;
6252
}
6253
 
6254
/* Return nonzero if register in range [REGNO, ENDREGNO)
6255
   appears either explicitly or implicitly in X
6256
   other than being stored into (except for earlyclobber operands).
6257
 
6258
   References contained within the substructure at LOC do not count.
6259
   LOC may be zero, meaning don't ignore anything.
6260
 
6261
   This is similar to refers_to_regno_p in rtlanal.c except that we
6262
   look at equivalences for pseudos that didn't get hard registers.  */
6263
 
6264
static int
6265
refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6266
                              rtx x, rtx *loc)
6267
{
6268
  int i;
6269
  unsigned int r;
6270
  RTX_CODE code;
6271
  const char *fmt;
6272
 
6273
  if (x == 0)
6274
    return 0;
6275
 
6276
 repeat:
6277
  code = GET_CODE (x);
6278
 
6279
  switch (code)
6280
    {
6281
    case REG:
6282
      r = REGNO (x);
6283
 
6284
      /* If this is a pseudo, a hard register must not have been allocated.
6285
         X must therefore either be a constant or be in memory.  */
6286
      if (r >= FIRST_PSEUDO_REGISTER)
6287
        {
6288
          if (reg_equiv_memory_loc[r])
6289
            return refers_to_regno_for_reload_p (regno, endregno,
6290
                                                 reg_equiv_memory_loc[r],
6291
                                                 (rtx*) 0);
6292
          gcc_assert (reg_equiv_constant[r]
6293
                      || (reg_equiv_invariant[r] && reg_equiv_init[r]));
6294
          return 0;
6295
        }
6296
 
6297
      return (endregno > r
6298
              && regno < r + (r < FIRST_PSEUDO_REGISTER
6299
                              ? hard_regno_nregs[r][GET_MODE (x)]
6300
                              : 1));
6301
 
6302
    case SUBREG:
6303
      /* If this is a SUBREG of a hard reg, we can see exactly which
6304
         registers are being modified.  Otherwise, handle normally.  */
6305
      if (REG_P (SUBREG_REG (x))
6306
          && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6307
        {
6308
          unsigned int inner_regno = subreg_regno (x);
6309
          unsigned int inner_endregno
6310
            = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6311
                             ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6312
 
6313
          return endregno > inner_regno && regno < inner_endregno;
6314
        }
6315
      break;
6316
 
6317
    case CLOBBER:
6318
    case SET:
6319
      if (&SET_DEST (x) != loc
6320
          /* Note setting a SUBREG counts as referring to the REG it is in for
6321
             a pseudo but not for hard registers since we can
6322
             treat each word individually.  */
6323
          && ((GET_CODE (SET_DEST (x)) == SUBREG
6324
               && loc != &SUBREG_REG (SET_DEST (x))
6325
               && REG_P (SUBREG_REG (SET_DEST (x)))
6326
               && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6327
               && refers_to_regno_for_reload_p (regno, endregno,
6328
                                                SUBREG_REG (SET_DEST (x)),
6329
                                                loc))
6330
              /* If the output is an earlyclobber operand, this is
6331
                 a conflict.  */
6332
              || ((!REG_P (SET_DEST (x))
6333
                   || earlyclobber_operand_p (SET_DEST (x)))
6334
                  && refers_to_regno_for_reload_p (regno, endregno,
6335
                                                   SET_DEST (x), loc))))
6336
        return 1;
6337
 
6338
      if (code == CLOBBER || loc == &SET_SRC (x))
6339
        return 0;
6340
      x = SET_SRC (x);
6341
      goto repeat;
6342
 
6343
    default:
6344
      break;
6345
    }
6346
 
6347
  /* X does not match, so try its subexpressions.  */
6348
 
6349
  fmt = GET_RTX_FORMAT (code);
6350
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6351
    {
6352
      if (fmt[i] == 'e' && loc != &XEXP (x, i))
6353
        {
6354
          if (i == 0)
6355
            {
6356
              x = XEXP (x, 0);
6357
              goto repeat;
6358
            }
6359
          else
6360
            if (refers_to_regno_for_reload_p (regno, endregno,
6361
                                              XEXP (x, i), loc))
6362
              return 1;
6363
        }
6364
      else if (fmt[i] == 'E')
6365
        {
6366
          int j;
6367
          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6368
            if (loc != &XVECEXP (x, i, j)
6369
                && refers_to_regno_for_reload_p (regno, endregno,
6370
                                                 XVECEXP (x, i, j), loc))
6371
              return 1;
6372
        }
6373
    }
6374
  return 0;
6375
}
6376
 
6377
/* Nonzero if modifying X will affect IN.  If X is a register or a SUBREG,
6378
   we check if any register number in X conflicts with the relevant register
6379
   numbers.  If X is a constant, return 0.  If X is a MEM, return 1 iff IN
6380
   contains a MEM (we don't bother checking for memory addresses that can't
6381
   conflict because we expect this to be a rare case.
6382
 
6383
   This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6384
   that we look at equivalences for pseudos that didn't get hard registers.  */
6385
 
6386
int
6387
reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6388
{
6389
  int regno, endregno;
6390
 
6391
  /* Overly conservative.  */
6392
  if (GET_CODE (x) == STRICT_LOW_PART
6393
      || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6394
    x = XEXP (x, 0);
6395
 
6396
  /* If either argument is a constant, then modifying X can not affect IN.  */
6397
  if (CONSTANT_P (x) || CONSTANT_P (in))
6398
    return 0;
6399
  else if (GET_CODE (x) == SUBREG)
6400
    {
6401
      regno = REGNO (SUBREG_REG (x));
6402
      if (regno < FIRST_PSEUDO_REGISTER)
6403
        regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6404
                                      GET_MODE (SUBREG_REG (x)),
6405
                                      SUBREG_BYTE (x),
6406
                                      GET_MODE (x));
6407
    }
6408
  else if (REG_P (x))
6409
    {
6410
      regno = REGNO (x);
6411
 
6412
      /* If this is a pseudo, it must not have been assigned a hard register.
6413
         Therefore, it must either be in memory or be a constant.  */
6414
 
6415
      if (regno >= FIRST_PSEUDO_REGISTER)
6416
        {
6417
          if (reg_equiv_memory_loc[regno])
6418
            return refers_to_mem_for_reload_p (in);
6419
          gcc_assert (reg_equiv_constant[regno]);
6420
          return 0;
6421
        }
6422
    }
6423
  else if (MEM_P (x))
6424
    return refers_to_mem_for_reload_p (in);
6425
  else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6426
           || GET_CODE (x) == CC0)
6427
    return reg_mentioned_p (x, in);
6428
  else
6429
    {
6430
      gcc_assert (GET_CODE (x) == PLUS);
6431
 
6432
      /* We actually want to know if X is mentioned somewhere inside IN.
6433
         We must not say that (plus (sp) (const_int 124)) is in
6434
         (plus (sp) (const_int 64)), since that can lead to incorrect reload
6435
         allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6436
         into a RELOAD_OTHER on behalf of another RELOAD_OTHER.  */
6437
      while (MEM_P (in))
6438
        in = XEXP (in, 0);
6439
      if (REG_P (in))
6440
        return 0;
6441
      else if (GET_CODE (in) == PLUS)
6442
        return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6443
                || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6444
      else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6445
                   || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6446
    }
6447
 
6448
  endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6449
                      ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6450
 
6451
  return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6452
}
6453
 
6454
/* Return nonzero if anything in X contains a MEM.  Look also for pseudo
6455
   registers.  */
6456
 
6457
static int
6458
refers_to_mem_for_reload_p (rtx x)
6459
{
6460
  const char *fmt;
6461
  int i;
6462
 
6463
  if (MEM_P (x))
6464
    return 1;
6465
 
6466
  if (REG_P (x))
6467
    return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6468
            && reg_equiv_memory_loc[REGNO (x)]);
6469
 
6470
  fmt = GET_RTX_FORMAT (GET_CODE (x));
6471
  for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6472
    if (fmt[i] == 'e'
6473
        && (MEM_P (XEXP (x, i))
6474
            || refers_to_mem_for_reload_p (XEXP (x, i))))
6475
      return 1;
6476
 
6477
  return 0;
6478
}
6479
 
6480
/* Check the insns before INSN to see if there is a suitable register
6481
   containing the same value as GOAL.
6482
   If OTHER is -1, look for a register in class CLASS.
6483
   Otherwise, just see if register number OTHER shares GOAL's value.
6484
 
6485
   Return an rtx for the register found, or zero if none is found.
6486
 
6487
   If RELOAD_REG_P is (short *)1,
6488
   we reject any hard reg that appears in reload_reg_rtx
6489
   because such a hard reg is also needed coming into this insn.
6490
 
6491
   If RELOAD_REG_P is any other nonzero value,
6492
   it is a vector indexed by hard reg number
6493
   and we reject any hard reg whose element in the vector is nonnegative
6494
   as well as any that appears in reload_reg_rtx.
6495
 
6496
   If GOAL is zero, then GOALREG is a register number; we look
6497
   for an equivalent for that register.
6498
 
6499
   MODE is the machine mode of the value we want an equivalence for.
6500
   If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6501
 
6502
   This function is used by jump.c as well as in the reload pass.
6503
 
6504
   If GOAL is the sum of the stack pointer and a constant, we treat it
6505
   as if it were a constant except that sp is required to be unchanging.  */
6506
 
6507
rtx
6508
find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6509
                short *reload_reg_p, int goalreg, enum machine_mode mode)
6510
{
6511
  rtx p = insn;
6512
  rtx goaltry, valtry, value, where;
6513
  rtx pat;
6514
  int regno = -1;
6515
  int valueno;
6516
  int goal_mem = 0;
6517
  int goal_const = 0;
6518
  int goal_mem_addr_varies = 0;
6519
  int need_stable_sp = 0;
6520
  int nregs;
6521
  int valuenregs;
6522
  int num = 0;
6523
 
6524
  if (goal == 0)
6525
    regno = goalreg;
6526
  else if (REG_P (goal))
6527
    regno = REGNO (goal);
6528
  else if (MEM_P (goal))
6529
    {
6530
      enum rtx_code code = GET_CODE (XEXP (goal, 0));
6531
      if (MEM_VOLATILE_P (goal))
6532
        return 0;
6533
      if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6534
        return 0;
6535
      /* An address with side effects must be reexecuted.  */
6536
      switch (code)
6537
        {
6538
        case POST_INC:
6539
        case PRE_INC:
6540
        case POST_DEC:
6541
        case PRE_DEC:
6542
        case POST_MODIFY:
6543
        case PRE_MODIFY:
6544
          return 0;
6545
        default:
6546
          break;
6547
        }
6548
      goal_mem = 1;
6549
    }
6550
  else if (CONSTANT_P (goal))
6551
    goal_const = 1;
6552
  else if (GET_CODE (goal) == PLUS
6553
           && XEXP (goal, 0) == stack_pointer_rtx
6554
           && CONSTANT_P (XEXP (goal, 1)))
6555
    goal_const = need_stable_sp = 1;
6556
  else if (GET_CODE (goal) == PLUS
6557
           && XEXP (goal, 0) == frame_pointer_rtx
6558
           && CONSTANT_P (XEXP (goal, 1)))
6559
    goal_const = 1;
6560
  else
6561
    return 0;
6562
 
6563
  num = 0;
6564
  /* Scan insns back from INSN, looking for one that copies
6565
     a value into or out of GOAL.
6566
     Stop and give up if we reach a label.  */
6567
 
6568
  while (1)
6569
    {
6570
      p = PREV_INSN (p);
6571
      num++;
6572
      if (p == 0 || LABEL_P (p)
6573
          || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6574
        return 0;
6575
 
6576
      if (NONJUMP_INSN_P (p)
6577
          /* If we don't want spill regs ...  */
6578
          && (! (reload_reg_p != 0
6579
                 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6580
              /* ... then ignore insns introduced by reload; they aren't
6581
                 useful and can cause results in reload_as_needed to be
6582
                 different from what they were when calculating the need for
6583
                 spills.  If we notice an input-reload insn here, we will
6584
                 reject it below, but it might hide a usable equivalent.
6585
                 That makes bad code.  It may even fail: perhaps no reg was
6586
                 spilled for this insn because it was assumed we would find
6587
                 that equivalent.  */
6588
              || INSN_UID (p) < reload_first_uid))
6589
        {
6590
          rtx tem;
6591
          pat = single_set (p);
6592
 
6593
          /* First check for something that sets some reg equal to GOAL.  */
6594
          if (pat != 0
6595
              && ((regno >= 0
6596
                   && true_regnum (SET_SRC (pat)) == regno
6597
                   && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6598
                  ||
6599
                  (regno >= 0
6600
                   && true_regnum (SET_DEST (pat)) == regno
6601
                   && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6602
                  ||
6603
                  (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6604
                   /* When looking for stack pointer + const,
6605
                      make sure we don't use a stack adjust.  */
6606
                   && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6607
                   && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6608
                  || (goal_mem
6609
                      && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6610
                      && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6611
                  || (goal_mem
6612
                      && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6613
                      && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6614
                  /* If we are looking for a constant,
6615
                     and something equivalent to that constant was copied
6616
                     into a reg, we can use that reg.  */
6617
                  || (goal_const && REG_NOTES (p) != 0
6618
                      && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6619
                      && ((rtx_equal_p (XEXP (tem, 0), goal)
6620
                           && (valueno
6621
                               = true_regnum (valtry = SET_DEST (pat))) >= 0)
6622
                          || (REG_P (SET_DEST (pat))
6623
                              && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6624
                              && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6625
                                  == MODE_FLOAT)
6626
                              && GET_CODE (goal) == CONST_INT
6627
                              && 0 != (goaltry
6628
                                       = operand_subword (XEXP (tem, 0), 0, 0,
6629
                                                          VOIDmode))
6630
                              && rtx_equal_p (goal, goaltry)
6631
                              && (valtry
6632
                                  = operand_subword (SET_DEST (pat), 0, 0,
6633
                                                     VOIDmode))
6634
                              && (valueno = true_regnum (valtry)) >= 0)))
6635
                  || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6636
                                                          NULL_RTX))
6637
                      && REG_P (SET_DEST (pat))
6638
                      && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6639
                      && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6640
                          == MODE_FLOAT)
6641
                      && GET_CODE (goal) == CONST_INT
6642
                      && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6643
                                                          VOIDmode))
6644
                      && rtx_equal_p (goal, goaltry)
6645
                      && (valtry
6646
                          = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6647
                      && (valueno = true_regnum (valtry)) >= 0)))
6648
            {
6649
              if (other >= 0)
6650
                {
6651
                  if (valueno != other)
6652
                    continue;
6653
                }
6654
              else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6655
                continue;
6656
              else
6657
                {
6658
                  int i;
6659
 
6660
                  for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6661
                    if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6662
                                             valueno + i))
6663
                      break;
6664
                  if (i >= 0)
6665
                    continue;
6666
                }
6667
              value = valtry;
6668
              where = p;
6669
              break;
6670
            }
6671
        }
6672
    }
6673
 
6674
  /* We found a previous insn copying GOAL into a suitable other reg VALUE
6675
     (or copying VALUE into GOAL, if GOAL is also a register).
6676
     Now verify that VALUE is really valid.  */
6677
 
6678
  /* VALUENO is the register number of VALUE; a hard register.  */
6679
 
6680
  /* Don't try to re-use something that is killed in this insn.  We want
6681
     to be able to trust REG_UNUSED notes.  */
6682
  if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6683
    return 0;
6684
 
6685
  /* If we propose to get the value from the stack pointer or if GOAL is
6686
     a MEM based on the stack pointer, we need a stable SP.  */
6687
  if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6688
      || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6689
                                                          goal)))
6690
    need_stable_sp = 1;
6691
 
6692
  /* Reject VALUE if the copy-insn moved the wrong sort of datum.  */
6693
  if (GET_MODE (value) != mode)
6694
    return 0;
6695
 
6696
  /* Reject VALUE if it was loaded from GOAL
6697
     and is also a register that appears in the address of GOAL.  */
6698
 
6699
  if (goal_mem && value == SET_DEST (single_set (where))
6700
      && refers_to_regno_for_reload_p (valueno,
6701
                                       (valueno
6702
                                        + hard_regno_nregs[valueno][mode]),
6703
                                       goal, (rtx*) 0))
6704
    return 0;
6705
 
6706
  /* Reject registers that overlap GOAL.  */
6707
 
6708
  if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6709
    nregs = hard_regno_nregs[regno][mode];
6710
  else
6711
    nregs = 1;
6712
  valuenregs = hard_regno_nregs[valueno][mode];
6713
 
6714
  if (!goal_mem && !goal_const
6715
      && regno + nregs > valueno && regno < valueno + valuenregs)
6716
    return 0;
6717
 
6718
  /* Reject VALUE if it is one of the regs reserved for reloads.
6719
     Reload1 knows how to reuse them anyway, and it would get
6720
     confused if we allocated one without its knowledge.
6721
     (Now that insns introduced by reload are ignored above,
6722
     this case shouldn't happen, but I'm not positive.)  */
6723
 
6724
  if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6725
    {
6726
      int i;
6727
      for (i = 0; i < valuenregs; ++i)
6728
        if (reload_reg_p[valueno + i] >= 0)
6729
          return 0;
6730
    }
6731
 
6732
  /* Reject VALUE if it is a register being used for an input reload
6733
     even if it is not one of those reserved.  */
6734
 
6735
  if (reload_reg_p != 0)
6736
    {
6737
      int i;
6738
      for (i = 0; i < n_reloads; i++)
6739
        if (rld[i].reg_rtx != 0 && rld[i].in)
6740
          {
6741
            int regno1 = REGNO (rld[i].reg_rtx);
6742
            int nregs1 = hard_regno_nregs[regno1]
6743
                                         [GET_MODE (rld[i].reg_rtx)];
6744
            if (regno1 < valueno + valuenregs
6745
                && regno1 + nregs1 > valueno)
6746
              return 0;
6747
          }
6748
    }
6749
 
6750
  if (goal_mem)
6751
    /* We must treat frame pointer as varying here,
6752
       since it can vary--in a nonlocal goto as generated by expand_goto.  */
6753
    goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6754
 
6755
  /* Now verify that the values of GOAL and VALUE remain unaltered
6756
     until INSN is reached.  */
6757
 
6758
  p = insn;
6759
  while (1)
6760
    {
6761
      p = PREV_INSN (p);
6762
      if (p == where)
6763
        return value;
6764
 
6765
      /* Don't trust the conversion past a function call
6766
         if either of the two is in a call-clobbered register, or memory.  */
6767
      if (CALL_P (p))
6768
        {
6769
          int i;
6770
 
6771
          if (goal_mem || need_stable_sp)
6772
            return 0;
6773
 
6774
          if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6775
            for (i = 0; i < nregs; ++i)
6776
              if (call_used_regs[regno + i]
6777
                  || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6778
                return 0;
6779
 
6780
          if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6781
            for (i = 0; i < valuenregs; ++i)
6782
              if (call_used_regs[valueno + i]
6783
                  || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6784
                return 0;
6785
        }
6786
 
6787
      if (INSN_P (p))
6788
        {
6789
          pat = PATTERN (p);
6790
 
6791
          /* Watch out for unspec_volatile, and volatile asms.  */
6792
          if (volatile_insn_p (pat))
6793
            return 0;
6794
 
6795
          /* If this insn P stores in either GOAL or VALUE, return 0.
6796
             If GOAL is a memory ref and this insn writes memory, return 0.
6797
             If GOAL is a memory ref and its address is not constant,
6798
             and this insn P changes a register used in GOAL, return 0.  */
6799
 
6800
          if (GET_CODE (pat) == COND_EXEC)
6801
            pat = COND_EXEC_CODE (pat);
6802
          if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6803
            {
6804
              rtx dest = SET_DEST (pat);
6805
              while (GET_CODE (dest) == SUBREG
6806
                     || GET_CODE (dest) == ZERO_EXTRACT
6807
                     || GET_CODE (dest) == STRICT_LOW_PART)
6808
                dest = XEXP (dest, 0);
6809
              if (REG_P (dest))
6810
                {
6811
                  int xregno = REGNO (dest);
6812
                  int xnregs;
6813
                  if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6814
                    xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6815
                  else
6816
                    xnregs = 1;
6817
                  if (xregno < regno + nregs && xregno + xnregs > regno)
6818
                    return 0;
6819
                  if (xregno < valueno + valuenregs
6820
                      && xregno + xnregs > valueno)
6821
                    return 0;
6822
                  if (goal_mem_addr_varies
6823
                      && reg_overlap_mentioned_for_reload_p (dest, goal))
6824
                    return 0;
6825
                  if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6826
                    return 0;
6827
                }
6828
              else if (goal_mem && MEM_P (dest)
6829
                       && ! push_operand (dest, GET_MODE (dest)))
6830
                return 0;
6831
              else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6832
                       && reg_equiv_memory_loc[regno] != 0)
6833
                return 0;
6834
              else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6835
                return 0;
6836
            }
6837
          else if (GET_CODE (pat) == PARALLEL)
6838
            {
6839
              int i;
6840
              for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6841
                {
6842
                  rtx v1 = XVECEXP (pat, 0, i);
6843
                  if (GET_CODE (v1) == COND_EXEC)
6844
                    v1 = COND_EXEC_CODE (v1);
6845
                  if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6846
                    {
6847
                      rtx dest = SET_DEST (v1);
6848
                      while (GET_CODE (dest) == SUBREG
6849
                             || GET_CODE (dest) == ZERO_EXTRACT
6850
                             || GET_CODE (dest) == STRICT_LOW_PART)
6851
                        dest = XEXP (dest, 0);
6852
                      if (REG_P (dest))
6853
                        {
6854
                          int xregno = REGNO (dest);
6855
                          int xnregs;
6856
                          if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6857
                            xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6858
                          else
6859
                            xnregs = 1;
6860
                          if (xregno < regno + nregs
6861
                              && xregno + xnregs > regno)
6862
                            return 0;
6863
                          if (xregno < valueno + valuenregs
6864
                              && xregno + xnregs > valueno)
6865
                            return 0;
6866
                          if (goal_mem_addr_varies
6867
                              && reg_overlap_mentioned_for_reload_p (dest,
6868
                                                                     goal))
6869
                            return 0;
6870
                          if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6871
                            return 0;
6872
                        }
6873
                      else if (goal_mem && MEM_P (dest)
6874
                               && ! push_operand (dest, GET_MODE (dest)))
6875
                        return 0;
6876
                      else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6877
                               && reg_equiv_memory_loc[regno] != 0)
6878
                        return 0;
6879
                      else if (need_stable_sp
6880
                               && push_operand (dest, GET_MODE (dest)))
6881
                        return 0;
6882
                    }
6883
                }
6884
            }
6885
 
6886
          if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6887
            {
6888
              rtx link;
6889
 
6890
              for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6891
                   link = XEXP (link, 1))
6892
                {
6893
                  pat = XEXP (link, 0);
6894
                  if (GET_CODE (pat) == CLOBBER)
6895
                    {
6896
                      rtx dest = SET_DEST (pat);
6897
 
6898
                      if (REG_P (dest))
6899
                        {
6900
                          int xregno = REGNO (dest);
6901
                          int xnregs
6902
                            = hard_regno_nregs[xregno][GET_MODE (dest)];
6903
 
6904
                          if (xregno < regno + nregs
6905
                              && xregno + xnregs > regno)
6906
                            return 0;
6907
                          else if (xregno < valueno + valuenregs
6908
                                   && xregno + xnregs > valueno)
6909
                            return 0;
6910
                          else if (goal_mem_addr_varies
6911
                                   && reg_overlap_mentioned_for_reload_p (dest,
6912
                                                                     goal))
6913
                            return 0;
6914
                        }
6915
 
6916
                      else if (goal_mem && MEM_P (dest)
6917
                               && ! push_operand (dest, GET_MODE (dest)))
6918
                        return 0;
6919
                      else if (need_stable_sp
6920
                               && push_operand (dest, GET_MODE (dest)))
6921
                        return 0;
6922
                    }
6923
                }
6924
            }
6925
 
6926
#ifdef AUTO_INC_DEC
6927
          /* If this insn auto-increments or auto-decrements
6928
             either regno or valueno, return 0 now.
6929
             If GOAL is a memory ref and its address is not constant,
6930
             and this insn P increments a register used in GOAL, return 0.  */
6931
          {
6932
            rtx link;
6933
 
6934
            for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6935
              if (REG_NOTE_KIND (link) == REG_INC
6936
                  && REG_P (XEXP (link, 0)))
6937
                {
6938
                  int incno = REGNO (XEXP (link, 0));
6939
                  if (incno < regno + nregs && incno >= regno)
6940
                    return 0;
6941
                  if (incno < valueno + valuenregs && incno >= valueno)
6942
                    return 0;
6943
                  if (goal_mem_addr_varies
6944
                      && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6945
                                                             goal))
6946
                    return 0;
6947
                }
6948
          }
6949
#endif
6950
        }
6951
    }
6952
}
6953
 
6954
/* Find a place where INCED appears in an increment or decrement operator
6955
   within X, and return the amount INCED is incremented or decremented by.
6956
   The value is always positive.  */
6957
 
6958
static int
6959
find_inc_amount (rtx x, rtx inced)
6960
{
6961
  enum rtx_code code = GET_CODE (x);
6962
  const char *fmt;
6963
  int i;
6964
 
6965
  if (code == MEM)
6966
    {
6967
      rtx addr = XEXP (x, 0);
6968
      if ((GET_CODE (addr) == PRE_DEC
6969
           || GET_CODE (addr) == POST_DEC
6970
           || GET_CODE (addr) == PRE_INC
6971
           || GET_CODE (addr) == POST_INC)
6972
          && XEXP (addr, 0) == inced)
6973
        return GET_MODE_SIZE (GET_MODE (x));
6974
      else if ((GET_CODE (addr) == PRE_MODIFY
6975
                || GET_CODE (addr) == POST_MODIFY)
6976
               && GET_CODE (XEXP (addr, 1)) == PLUS
6977
               && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6978
               && XEXP (addr, 0) == inced
6979
               && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6980
        {
6981
          i = INTVAL (XEXP (XEXP (addr, 1), 1));
6982
          return i < 0 ? -i : i;
6983
        }
6984
    }
6985
 
6986
  fmt = GET_RTX_FORMAT (code);
6987
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6988
    {
6989
      if (fmt[i] == 'e')
6990
        {
6991
          int tem = find_inc_amount (XEXP (x, i), inced);
6992
          if (tem != 0)
6993
            return tem;
6994
        }
6995
      if (fmt[i] == 'E')
6996
        {
6997
          int j;
6998
          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6999
            {
7000
              int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7001
              if (tem != 0)
7002
                return tem;
7003
            }
7004
        }
7005
    }
7006
 
7007
  return 0;
7008
}
7009
 
7010
/* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7011
   REG_INC note in insn INSN.  REGNO must refer to a hard register.  */
7012
 
7013
#ifdef AUTO_INC_DEC
7014
static int
7015
reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7016
                           rtx insn)
7017
{
7018
  rtx link;
7019
 
7020
  gcc_assert (insn);
7021
 
7022
  if (! INSN_P (insn))
7023
    return 0;
7024
 
7025
  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7026
    if (REG_NOTE_KIND (link) == REG_INC)
7027
      {
7028
        unsigned int test = (int) REGNO (XEXP (link, 0));
7029
        if (test >= regno && test < endregno)
7030
          return 1;
7031
      }
7032
  return 0;
7033
}
7034
#else
7035
 
7036
#define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7037
 
7038
#endif 
7039
 
7040
/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7041
   If SETS is 1, also consider SETs.  If SETS is 2, enable checking
7042
   REG_INC.  REGNO must refer to a hard register.  */
7043
 
7044
int
7045
regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7046
                   int sets)
7047
{
7048
  unsigned int nregs, endregno;
7049
 
7050
  /* regno must be a hard register.  */
7051
  gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7052
 
7053
  nregs = hard_regno_nregs[regno][mode];
7054
  endregno = regno + nregs;
7055
 
7056
  if ((GET_CODE (PATTERN (insn)) == CLOBBER
7057
       || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7058
      && REG_P (XEXP (PATTERN (insn), 0)))
7059
    {
7060
      unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7061
 
7062
      return test >= regno && test < endregno;
7063
    }
7064
 
7065
  if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7066
    return 1;
7067
 
7068
  if (GET_CODE (PATTERN (insn)) == PARALLEL)
7069
    {
7070
      int i = XVECLEN (PATTERN (insn), 0) - 1;
7071
 
7072
      for (; i >= 0; i--)
7073
        {
7074
          rtx elt = XVECEXP (PATTERN (insn), 0, i);
7075
          if ((GET_CODE (elt) == CLOBBER
7076
               || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7077
              && REG_P (XEXP (elt, 0)))
7078
            {
7079
              unsigned int test = REGNO (XEXP (elt, 0));
7080
 
7081
              if (test >= regno && test < endregno)
7082
                return 1;
7083
            }
7084
          if (sets == 2
7085
              && reg_inc_found_and_valid_p (regno, endregno, elt))
7086
            return 1;
7087
        }
7088
    }
7089
 
7090
  return 0;
7091
}
7092
 
7093
/* Find the low part, with mode MODE, of a hard regno RELOADREG.  */
7094
rtx
7095
reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7096
{
7097
  int regno;
7098
 
7099
  if (GET_MODE (reloadreg) == mode)
7100
    return reloadreg;
7101
 
7102
  regno = REGNO (reloadreg);
7103
 
7104
  if (WORDS_BIG_ENDIAN)
7105
    regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7106
      - (int) hard_regno_nregs[regno][mode];
7107
 
7108
  return gen_rtx_REG (mode, regno);
7109
}
7110
 
7111
static const char *const reload_when_needed_name[] =
7112
{
7113
  "RELOAD_FOR_INPUT",
7114
  "RELOAD_FOR_OUTPUT",
7115
  "RELOAD_FOR_INSN",
7116
  "RELOAD_FOR_INPUT_ADDRESS",
7117
  "RELOAD_FOR_INPADDR_ADDRESS",
7118
  "RELOAD_FOR_OUTPUT_ADDRESS",
7119
  "RELOAD_FOR_OUTADDR_ADDRESS",
7120
  "RELOAD_FOR_OPERAND_ADDRESS",
7121
  "RELOAD_FOR_OPADDR_ADDR",
7122
  "RELOAD_OTHER",
7123
  "RELOAD_FOR_OTHER_ADDRESS"
7124
};
7125
 
7126
/* These functions are used to print the variables set by 'find_reloads' */
7127
 
7128
void
7129
debug_reload_to_stream (FILE *f)
7130
{
7131
  int r;
7132
  const char *prefix;
7133
 
7134
  if (! f)
7135
    f = stderr;
7136
  for (r = 0; r < n_reloads; r++)
7137
    {
7138
      fprintf (f, "Reload %d: ", r);
7139
 
7140
      if (rld[r].in != 0)
7141
        {
7142
          fprintf (f, "reload_in (%s) = ",
7143
                   GET_MODE_NAME (rld[r].inmode));
7144
          print_inline_rtx (f, rld[r].in, 24);
7145
          fprintf (f, "\n\t");
7146
        }
7147
 
7148
      if (rld[r].out != 0)
7149
        {
7150
          fprintf (f, "reload_out (%s) = ",
7151
                   GET_MODE_NAME (rld[r].outmode));
7152
          print_inline_rtx (f, rld[r].out, 24);
7153
          fprintf (f, "\n\t");
7154
        }
7155
 
7156
      fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7157
 
7158
      fprintf (f, "%s (opnum = %d)",
7159
               reload_when_needed_name[(int) rld[r].when_needed],
7160
               rld[r].opnum);
7161
 
7162
      if (rld[r].optional)
7163
        fprintf (f, ", optional");
7164
 
7165
      if (rld[r].nongroup)
7166
        fprintf (f, ", nongroup");
7167
 
7168
      if (rld[r].inc != 0)
7169
        fprintf (f, ", inc by %d", rld[r].inc);
7170
 
7171
      if (rld[r].nocombine)
7172
        fprintf (f, ", can't combine");
7173
 
7174
      if (rld[r].secondary_p)
7175
        fprintf (f, ", secondary_reload_p");
7176
 
7177
      if (rld[r].in_reg != 0)
7178
        {
7179
          fprintf (f, "\n\treload_in_reg: ");
7180
          print_inline_rtx (f, rld[r].in_reg, 24);
7181
        }
7182
 
7183
      if (rld[r].out_reg != 0)
7184
        {
7185
          fprintf (f, "\n\treload_out_reg: ");
7186
          print_inline_rtx (f, rld[r].out_reg, 24);
7187
        }
7188
 
7189
      if (rld[r].reg_rtx != 0)
7190
        {
7191
          fprintf (f, "\n\treload_reg_rtx: ");
7192
          print_inline_rtx (f, rld[r].reg_rtx, 24);
7193
        }
7194
 
7195
      prefix = "\n\t";
7196
      if (rld[r].secondary_in_reload != -1)
7197
        {
7198
          fprintf (f, "%ssecondary_in_reload = %d",
7199
                   prefix, rld[r].secondary_in_reload);
7200
          prefix = ", ";
7201
        }
7202
 
7203
      if (rld[r].secondary_out_reload != -1)
7204
        fprintf (f, "%ssecondary_out_reload = %d\n",
7205
                 prefix, rld[r].secondary_out_reload);
7206
 
7207
      prefix = "\n\t";
7208
      if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7209
        {
7210
          fprintf (f, "%ssecondary_in_icode = %s", prefix,
7211
                   insn_data[rld[r].secondary_in_icode].name);
7212
          prefix = ", ";
7213
        }
7214
 
7215
      if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7216
        fprintf (f, "%ssecondary_out_icode = %s", prefix,
7217
                 insn_data[rld[r].secondary_out_icode].name);
7218
 
7219
      fprintf (f, "\n");
7220
    }
7221
}
7222
 
7223
void
7224
debug_reload (void)
7225
{
7226
  debug_reload_to_stream (stderr);
7227
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.