OpenCores
URL https://opencores.org/ocsvn/scarts/scarts/trunk

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-gcc/] [gcc-4.1.1/] [gcc/] [testsuite/] [gcc.dg/] [arm-vfp1.c] - Blame information for rev 12

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 jlechner
/* { dg-do compile } */
2
/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
3
/* { dg-require-effective-target arm32 } */
4
/* { dg-skip-if "" { *-*-* } { "-mcpu=iwmmxt" "-march=iwmmxt" } { "" } } */
5
 
6
extern float fabsf (float);
7
extern float sqrtf (float);
8
extern double fabs (double);
9
extern double sqrt (double);
10
 
11
volatile float f1, f2, f3;
12
 
13
void test_sf() {
14
  /* abssf2_vfp */
15
  /* { dg-final { scan-assembler "fabss" } } */
16
  f1 = fabsf (f1);
17
  /* negsf2_vfp */
18
  /* { dg-final { scan-assembler "fnegs" } } */
19
  f1 = -f1;
20
  /* addsf3_vfp */
21
  /* { dg-final { scan-assembler "fadds" } } */
22
  f1 = f2 + f3;
23
  /* subsf3_vfp */
24
  /* { dg-final { scan-assembler "fsubs" } } */
25
  f1 = f2 - f3;
26
  /* divsf3_vfp */
27
  /* { dg-final { scan-assembler "fdivs" } } */
28
  f1 = f2 / f3;
29
  /* mulsf3_vfp */
30
  /* { dg-final { scan-assembler "fmuls" } } */
31
  f1 = f2 * f3;
32
  /* mulsf3negsf_vfp */
33
  /* { dg-final { scan-assembler "fnmuls" } } */
34
  f1 = -f2 * f3;
35
  /* mulsf3addsf_vfp */
36
  /* { dg-final { scan-assembler "fmacs" } } */
37
  f1 = f2 * f3 + f1;
38
  /* mulsf3subsf_vfp */
39
  /* { dg-final { scan-assembler "fmscs" } } */
40
  f1 = f2 * f3 - f1;
41
  /* mulsf3negsfaddsf_vfp */
42
  /* { dg-final { scan-assembler "fnmacs" } } */
43
  f1 = f2 - f3 * f1;
44
  /* mulsf3negsfsubsf_vfp */
45
  /* { dg-final { scan-assembler "fnmscs" } } */
46
  f1 = -f2 * f3 - f1;
47
  /* sqrtsf2_vfp */
48
  /* { dg-final { scan-assembler "fsqrts" } } */
49
  f1 = sqrtf (f1);
50
}
51
 
52
volatile double d1, d2, d3;
53
 
54
void test_df() {
55
  /* absdf2_vfp */
56
  /* { dg-final { scan-assembler "fabsd" } } */
57
  d1 = fabs (d1);
58
  /* negdf2_vfp */
59
  /* { dg-final { scan-assembler "fnegd" } } */
60
  d1 = -d1;
61
  /* adddf3_vfp */
62
  /* { dg-final { scan-assembler "faddd" } } */
63
  d1 = d2 + d3;
64
  /* subdf3_vfp */
65
  /* { dg-final { scan-assembler "fsubd" } } */
66
  d1 = d2 - d3;
67
  /* divdf3_vfp */
68
  /* { dg-final { scan-assembler "fdivd" } } */
69
  d1 = d2 / d3;
70
  /* muldf3_vfp */
71
  /* { dg-final { scan-assembler "fmuld" } } */
72
  d1 = d2 * d3;
73
  /* muldf3negdf_vfp */
74
  /* { dg-final { scan-assembler "fnmuld" } } */
75
  d1 = -d2 * d3;
76
  /* muldf3adddf_vfp */
77
  /* { dg-final { scan-assembler "fmacd" } } */
78
  d1 = d2 * d3 + d1;
79
  /* muldf3subdf_vfp */
80
  /* { dg-final { scan-assembler "fmscd" } } */
81
  d1 = d2 * d3 - d1;
82
  /* muldf3negdfadddf_vfp */
83
  /* { dg-final { scan-assembler "fnmacd" } } */
84
  d1 = d2 - d3 * d1;
85
  /* muldf3negdfsubdf_vfp */
86
  /* { dg-final { scan-assembler "fnmscd" } } */
87
  d1 = -d2 * d3 - d1;
88
  /* sqrtdf2_vfp */
89
  /* { dg-final { scan-assembler "fsqrtd" } } */
90
  d1 = sqrt (d1);
91
}
92
 
93
volatile int i1;
94
volatile unsigned int u1;
95
 
96
void test_convert () {
97
  /* extendsfdf2_vfp */
98
  /* { dg-final { scan-assembler "fcvtds" } } */
99
  d1 = f1;
100
  /* truncdfsf2_vfp */
101
  /* { dg-final { scan-assembler "fcvtsd" } } */
102
  f1 = d1;
103
  /* truncsisf2_vfp */
104
  /* { dg-final { scan-assembler "ftosizs" } } */
105
  i1 = f1;
106
  /* truncsidf2_vfp */
107
  /* { dg-final { scan-assembler "ftosizd" } } */
108
  i1 = d1;
109
  /* fixuns_truncsfsi2 */
110
  /* { dg-final { scan-assembler "ftouizs" } } */
111
  u1 = f1;
112
  /* fixuns_truncdfsi2 */
113
  /* { dg-final { scan-assembler "ftouizd" } } */
114
  u1 = d1;
115
  /* floatsisf2_vfp */
116
  /* { dg-final { scan-assembler "fsitos" } } */
117
  f1 = i1;
118
  /* floatsidf2_vfp */
119
  /* { dg-final { scan-assembler "fsitod" } } */
120
  d1 = i1;
121
  /* floatunssisf2 */
122
  /* { dg-final { scan-assembler "fuitos" } } */
123
  f1 = u1;
124
  /* floatunssidf2 */
125
  /* { dg-final { scan-assembler "fuitod" } } */
126
  d1 = u1;
127
}
128
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.