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jlechner |
/* -----------------------------------------------------------------------
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ffi.c - Copyright (c) 2002 Bo Thorsen <bo@suse.de>
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x86-64 Foreign Function Interface
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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``Software''), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be included
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in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
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OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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OTHER DEALINGS IN THE SOFTWARE.
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----------------------------------------------------------------------- */
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#include <ffi.h>
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#include <ffi_common.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#ifdef __x86_64__
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#define MAX_GPR_REGS 6
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#define MAX_SSE_REGS 8
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struct register_args
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{
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/* Registers for argument passing. */
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UINT64 gpr[MAX_GPR_REGS];
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__int128_t sse[MAX_SSE_REGS];
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};
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extern void ffi_call_unix64 (void *args, unsigned long bytes, unsigned flags,
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void *raddr, void (*fnaddr)(), unsigned ssecount);
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/* All reference to register classes here is identical to the code in
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gcc/config/i386/i386.c. Do *not* change one without the other. */
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/* Register class used for passing given 64bit part of the argument.
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These represent classes as documented by the PS ABI, with the exception
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of SSESF, SSEDF classes, that are basically SSE class, just gcc will
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use SF or DFmode move instead of DImode to avoid reformating penalties.
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Similary we play games with INTEGERSI_CLASS to use cheaper SImode moves
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whenever possible (upper half does contain padding). */
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enum x86_64_reg_class
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{
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X86_64_NO_CLASS,
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X86_64_INTEGER_CLASS,
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X86_64_INTEGERSI_CLASS,
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X86_64_SSE_CLASS,
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X86_64_SSESF_CLASS,
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X86_64_SSEDF_CLASS,
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X86_64_SSEUP_CLASS,
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X86_64_X87_CLASS,
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X86_64_X87UP_CLASS,
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X86_64_COMPLEX_X87_CLASS,
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X86_64_MEMORY_CLASS
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};
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#define MAX_CLASSES 4
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#define SSE_CLASS_P(X) ((X) >= X86_64_SSE_CLASS && X <= X86_64_SSEUP_CLASS)
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/* x86-64 register passing implementation. See x86-64 ABI for details. Goal
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of this code is to classify each 8bytes of incoming argument by the register
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class and assign registers accordingly. */
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/* Return the union class of CLASS1 and CLASS2.
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See the x86-64 PS ABI for details. */
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static enum x86_64_reg_class
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merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
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{
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/* Rule #1: If both classes are equal, this is the resulting class. */
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if (class1 == class2)
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return class1;
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/* Rule #2: If one of the classes is NO_CLASS, the resulting class is
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the other class. */
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if (class1 == X86_64_NO_CLASS)
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return class2;
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if (class2 == X86_64_NO_CLASS)
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return class1;
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/* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
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if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
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return X86_64_MEMORY_CLASS;
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/* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
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if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
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|| (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
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return X86_64_INTEGERSI_CLASS;
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if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
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|| class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
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return X86_64_INTEGER_CLASS;
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/* Rule #5: If one of the classes is X87, X87UP, or COMPLEX_X87 class,
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MEMORY is used. */
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if (class1 == X86_64_X87_CLASS
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|| class1 == X86_64_X87UP_CLASS
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|| class1 == X86_64_COMPLEX_X87_CLASS
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|| class2 == X86_64_X87_CLASS
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|| class2 == X86_64_X87UP_CLASS
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|| class2 == X86_64_COMPLEX_X87_CLASS)
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return X86_64_MEMORY_CLASS;
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/* Rule #6: Otherwise class SSE is used. */
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return X86_64_SSE_CLASS;
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}
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/* Classify the argument of type TYPE and mode MODE.
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CLASSES will be filled by the register class used to pass each word
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of the operand. The number of words is returned. In case the parameter
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should be passed in memory, 0 is returned. As a special case for zero
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sized containers, classes[0] will be NO_CLASS and 1 is returned.
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See the x86-64 PS ABI for details.
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*/
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static int
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classify_argument (ffi_type *type, enum x86_64_reg_class classes[],
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size_t byte_offset)
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{
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switch (type->type)
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{
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case FFI_TYPE_UINT8:
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case FFI_TYPE_SINT8:
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case FFI_TYPE_UINT16:
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case FFI_TYPE_SINT16:
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case FFI_TYPE_UINT32:
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case FFI_TYPE_SINT32:
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case FFI_TYPE_UINT64:
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case FFI_TYPE_SINT64:
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case FFI_TYPE_POINTER:
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if (byte_offset + type->size <= 4)
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classes[0] = X86_64_INTEGERSI_CLASS;
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else
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classes[0] = X86_64_INTEGER_CLASS;
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return 1;
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case FFI_TYPE_FLOAT:
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if (byte_offset == 0)
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classes[0] = X86_64_SSESF_CLASS;
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else
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classes[0] = X86_64_SSE_CLASS;
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return 1;
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case FFI_TYPE_DOUBLE:
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classes[0] = X86_64_SSEDF_CLASS;
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return 1;
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case FFI_TYPE_LONGDOUBLE:
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classes[0] = X86_64_X87_CLASS;
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classes[1] = X86_64_X87UP_CLASS;
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return 2;
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case FFI_TYPE_STRUCT:
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{
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const int UNITS_PER_WORD = 8;
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int words = (type->size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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ffi_type **ptr;
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int i;
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enum x86_64_reg_class subclasses[MAX_CLASSES];
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/* If the struct is larger than 16 bytes, pass it on the stack. */
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if (type->size > 16)
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return 0;
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for (i = 0; i < words; i++)
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classes[i] = X86_64_NO_CLASS;
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/* Merge the fields of structure. */
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for (ptr = type->elements; *ptr != NULL; ptr++)
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{
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int num;
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byte_offset = ALIGN (byte_offset, (*ptr)->alignment);
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num = classify_argument (*ptr, subclasses, byte_offset % 8);
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if (num == 0)
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return 0;
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for (i = 0; i < num; i++)
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{
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int pos = byte_offset / 8;
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classes[i + pos] =
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merge_classes (subclasses[i], classes[i + pos]);
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}
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byte_offset += (*ptr)->size;
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}
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/* Final merger cleanup. */
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for (i = 0; i < words; i++)
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{
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/* If one class is MEMORY, everything should be passed in
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memory. */
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if (classes[i] == X86_64_MEMORY_CLASS)
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return 0;
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/* The X86_64_SSEUP_CLASS should be always preceded by
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X86_64_SSE_CLASS. */
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if (classes[i] == X86_64_SSEUP_CLASS
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&& (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
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classes[i] = X86_64_SSE_CLASS;
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/* X86_64_X87UP_CLASS should be preceded by X86_64_X87_CLASS. */
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if (classes[i] == X86_64_X87UP_CLASS
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&& (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
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classes[i] = X86_64_SSE_CLASS;
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}
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return words;
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}
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default:
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FFI_ASSERT(0);
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}
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return 0; /* Never reached. */
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}
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227 |
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/* Examine the argument and return set number of register required in each
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class. Return zero iff parameter should be passed in memory, otherwise
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the number of registers. */
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230 |
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231 |
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static int
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examine_argument (ffi_type *type, enum x86_64_reg_class classes[MAX_CLASSES],
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_Bool in_return, int *pngpr, int *pnsse)
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{
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235 |
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int i, n, ngpr, nsse;
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236 |
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237 |
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n = classify_argument (type, classes, 0);
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238 |
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if (n == 0)
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return 0;
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240 |
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241 |
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ngpr = nsse = 0;
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242 |
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for (i = 0; i < n; ++i)
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243 |
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switch (classes[i])
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244 |
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{
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245 |
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case X86_64_INTEGER_CLASS:
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246 |
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case X86_64_INTEGERSI_CLASS:
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247 |
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ngpr++;
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248 |
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break;
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249 |
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case X86_64_SSE_CLASS:
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250 |
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case X86_64_SSESF_CLASS:
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case X86_64_SSEDF_CLASS:
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nsse++;
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break;
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254 |
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case X86_64_NO_CLASS:
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case X86_64_SSEUP_CLASS:
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256 |
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break;
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257 |
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case X86_64_X87_CLASS:
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258 |
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case X86_64_X87UP_CLASS:
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259 |
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case X86_64_COMPLEX_X87_CLASS:
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260 |
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return in_return != 0;
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261 |
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default:
|
262 |
|
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abort ();
|
263 |
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}
|
264 |
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|
265 |
|
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*pngpr = ngpr;
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266 |
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*pnsse = nsse;
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267 |
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|
268 |
|
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return n;
|
269 |
|
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}
|
270 |
|
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|
271 |
|
|
/* Perform machine dependent cif processing. */
|
272 |
|
|
|
273 |
|
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ffi_status
|
274 |
|
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ffi_prep_cif_machdep (ffi_cif *cif)
|
275 |
|
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{
|
276 |
|
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int gprcount, ssecount, i, avn, n, ngpr, nsse, flags;
|
277 |
|
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enum x86_64_reg_class classes[MAX_CLASSES];
|
278 |
|
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size_t bytes;
|
279 |
|
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|
280 |
|
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gprcount = ssecount = 0;
|
281 |
|
|
|
282 |
|
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flags = cif->rtype->type;
|
283 |
|
|
if (flags != FFI_TYPE_VOID)
|
284 |
|
|
{
|
285 |
|
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n = examine_argument (cif->rtype, classes, 1, &ngpr, &nsse);
|
286 |
|
|
if (n == 0)
|
287 |
|
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{
|
288 |
|
|
/* The return value is passed in memory. A pointer to that
|
289 |
|
|
memory is the first argument. Allocate a register for it. */
|
290 |
|
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gprcount++;
|
291 |
|
|
/* We don't have to do anything in asm for the return. */
|
292 |
|
|
flags = FFI_TYPE_VOID;
|
293 |
|
|
}
|
294 |
|
|
else if (flags == FFI_TYPE_STRUCT)
|
295 |
|
|
{
|
296 |
|
|
/* Mark which registers the result appears in. */
|
297 |
|
|
_Bool sse0 = SSE_CLASS_P (classes[0]);
|
298 |
|
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_Bool sse1 = n == 2 && SSE_CLASS_P (classes[1]);
|
299 |
|
|
if (sse0 && !sse1)
|
300 |
|
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flags |= 1 << 8;
|
301 |
|
|
else if (!sse0 && sse1)
|
302 |
|
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flags |= 1 << 9;
|
303 |
|
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else if (sse0 && sse1)
|
304 |
|
|
flags |= 1 << 10;
|
305 |
|
|
/* Mark the true size of the structure. */
|
306 |
|
|
flags |= cif->rtype->size << 12;
|
307 |
|
|
}
|
308 |
|
|
}
|
309 |
|
|
|
310 |
|
|
/* Go over all arguments and determine the way they should be passed.
|
311 |
|
|
If it's in a register and there is space for it, let that be so. If
|
312 |
|
|
not, add it's size to the stack byte count. */
|
313 |
|
|
for (bytes = 0, i = 0, avn = cif->nargs; i < avn; i++)
|
314 |
|
|
{
|
315 |
|
|
if (examine_argument (cif->arg_types[i], classes, 0, &ngpr, &nsse) == 0
|
316 |
|
|
|| gprcount + ngpr > MAX_GPR_REGS
|
317 |
|
|
|| ssecount + nsse > MAX_SSE_REGS)
|
318 |
|
|
{
|
319 |
|
|
long align = cif->arg_types[i]->alignment;
|
320 |
|
|
|
321 |
|
|
if (align < 8)
|
322 |
|
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align = 8;
|
323 |
|
|
|
324 |
|
|
bytes = ALIGN(bytes, align);
|
325 |
|
|
bytes += cif->arg_types[i]->size;
|
326 |
|
|
}
|
327 |
|
|
else
|
328 |
|
|
{
|
329 |
|
|
gprcount += ngpr;
|
330 |
|
|
ssecount += nsse;
|
331 |
|
|
}
|
332 |
|
|
}
|
333 |
|
|
if (ssecount)
|
334 |
|
|
flags |= 1 << 11;
|
335 |
|
|
cif->flags = flags;
|
336 |
|
|
cif->bytes = bytes;
|
337 |
|
|
|
338 |
|
|
return FFI_OK;
|
339 |
|
|
}
|
340 |
|
|
|
341 |
|
|
void
|
342 |
|
|
ffi_call (ffi_cif *cif, void (*fn)(), void *rvalue, void **avalue)
|
343 |
|
|
{
|
344 |
|
|
enum x86_64_reg_class classes[MAX_CLASSES];
|
345 |
|
|
char *stack, *argp;
|
346 |
|
|
ffi_type **arg_types;
|
347 |
|
|
int gprcount, ssecount, ngpr, nsse, i, avn;
|
348 |
|
|
_Bool ret_in_memory;
|
349 |
|
|
struct register_args *reg_args;
|
350 |
|
|
|
351 |
|
|
/* Can't call 32-bit mode from 64-bit mode. */
|
352 |
|
|
FFI_ASSERT (cif->abi == FFI_UNIX64);
|
353 |
|
|
|
354 |
|
|
/* If the return value is a struct and we don't have a return value
|
355 |
|
|
address then we need to make one. Note the setting of flags to
|
356 |
|
|
VOID above in ffi_prep_cif_machdep. */
|
357 |
|
|
ret_in_memory = (cif->rtype->type == FFI_TYPE_STRUCT
|
358 |
|
|
&& (cif->flags & 0xff) == FFI_TYPE_VOID);
|
359 |
|
|
if (rvalue == NULL && ret_in_memory)
|
360 |
|
|
rvalue = alloca (cif->rtype->size);
|
361 |
|
|
|
362 |
|
|
/* Allocate the space for the arguments, plus 4 words of temp space. */
|
363 |
|
|
stack = alloca (sizeof (struct register_args) + cif->bytes + 4*8);
|
364 |
|
|
reg_args = (struct register_args *) stack;
|
365 |
|
|
argp = stack + sizeof (struct register_args);
|
366 |
|
|
|
367 |
|
|
gprcount = ssecount = 0;
|
368 |
|
|
|
369 |
|
|
/* If the return value is passed in memory, add the pointer as the
|
370 |
|
|
first integer argument. */
|
371 |
|
|
if (ret_in_memory)
|
372 |
|
|
reg_args->gpr[gprcount++] = (long) rvalue;
|
373 |
|
|
|
374 |
|
|
avn = cif->nargs;
|
375 |
|
|
arg_types = cif->arg_types;
|
376 |
|
|
|
377 |
|
|
for (i = 0; i < avn; ++i)
|
378 |
|
|
{
|
379 |
|
|
size_t size = arg_types[i]->size;
|
380 |
|
|
int n;
|
381 |
|
|
|
382 |
|
|
n = examine_argument (arg_types[i], classes, 0, &ngpr, &nsse);
|
383 |
|
|
if (n == 0
|
384 |
|
|
|| gprcount + ngpr > MAX_GPR_REGS
|
385 |
|
|
|| ssecount + nsse > MAX_SSE_REGS)
|
386 |
|
|
{
|
387 |
|
|
long align = arg_types[i]->alignment;
|
388 |
|
|
|
389 |
|
|
/* Stack arguments are *always* at least 8 byte aligned. */
|
390 |
|
|
if (align < 8)
|
391 |
|
|
align = 8;
|
392 |
|
|
|
393 |
|
|
/* Pass this argument in memory. */
|
394 |
|
|
argp = (void *) ALIGN (argp, align);
|
395 |
|
|
memcpy (argp, avalue[i], size);
|
396 |
|
|
argp += size;
|
397 |
|
|
}
|
398 |
|
|
else
|
399 |
|
|
{
|
400 |
|
|
/* The argument is passed entirely in registers. */
|
401 |
|
|
char *a = (char *) avalue[i];
|
402 |
|
|
int j;
|
403 |
|
|
|
404 |
|
|
for (j = 0; j < n; j++, a += 8, size -= 8)
|
405 |
|
|
{
|
406 |
|
|
switch (classes[j])
|
407 |
|
|
{
|
408 |
|
|
case X86_64_INTEGER_CLASS:
|
409 |
|
|
case X86_64_INTEGERSI_CLASS:
|
410 |
|
|
reg_args->gpr[gprcount] = 0;
|
411 |
|
|
memcpy (®_args->gpr[gprcount], a, size < 8 ? size : 8);
|
412 |
|
|
gprcount++;
|
413 |
|
|
break;
|
414 |
|
|
case X86_64_SSE_CLASS:
|
415 |
|
|
case X86_64_SSEDF_CLASS:
|
416 |
|
|
reg_args->sse[ssecount++] = *(UINT64 *) a;
|
417 |
|
|
break;
|
418 |
|
|
case X86_64_SSESF_CLASS:
|
419 |
|
|
reg_args->sse[ssecount++] = *(UINT32 *) a;
|
420 |
|
|
break;
|
421 |
|
|
default:
|
422 |
|
|
abort();
|
423 |
|
|
}
|
424 |
|
|
}
|
425 |
|
|
}
|
426 |
|
|
}
|
427 |
|
|
|
428 |
|
|
ffi_call_unix64 (stack, cif->bytes + sizeof (struct register_args),
|
429 |
|
|
cif->flags, rvalue, fn, ssecount);
|
430 |
|
|
}
|
431 |
|
|
|
432 |
|
|
|
433 |
|
|
extern void ffi_closure_unix64(void);
|
434 |
|
|
|
435 |
|
|
ffi_status
|
436 |
|
|
ffi_prep_closure (ffi_closure* closure,
|
437 |
|
|
ffi_cif* cif,
|
438 |
|
|
void (*fun)(ffi_cif*, void*, void**, void*),
|
439 |
|
|
void *user_data)
|
440 |
|
|
{
|
441 |
|
|
volatile unsigned short *tramp;
|
442 |
|
|
|
443 |
|
|
tramp = (volatile unsigned short *) &closure->tramp[0];
|
444 |
|
|
|
445 |
|
|
tramp[0] = 0xbb49; /* mov <code>, %r11 */
|
446 |
|
|
*(void * volatile *) &tramp[1] = ffi_closure_unix64;
|
447 |
|
|
tramp[5] = 0xba49; /* mov <data>, %r10 */
|
448 |
|
|
*(void * volatile *) &tramp[6] = closure;
|
449 |
|
|
|
450 |
|
|
/* Set the carry bit iff the function uses any sse registers.
|
451 |
|
|
This is clc or stc, together with the first byte of the jmp. */
|
452 |
|
|
tramp[10] = cif->flags & (1 << 11) ? 0x49f9 : 0x49f8;
|
453 |
|
|
|
454 |
|
|
tramp[11] = 0xe3ff; /* jmp *%r11 */
|
455 |
|
|
|
456 |
|
|
closure->cif = cif;
|
457 |
|
|
closure->fun = fun;
|
458 |
|
|
closure->user_data = user_data;
|
459 |
|
|
|
460 |
|
|
return FFI_OK;
|
461 |
|
|
}
|
462 |
|
|
|
463 |
|
|
int
|
464 |
|
|
ffi_closure_unix64_inner(ffi_closure *closure, void *rvalue,
|
465 |
|
|
struct register_args *reg_args, char *argp)
|
466 |
|
|
{
|
467 |
|
|
ffi_cif *cif;
|
468 |
|
|
void **avalue;
|
469 |
|
|
ffi_type **arg_types;
|
470 |
|
|
long i, avn;
|
471 |
|
|
int gprcount, ssecount, ngpr, nsse;
|
472 |
|
|
int ret;
|
473 |
|
|
|
474 |
|
|
cif = closure->cif;
|
475 |
|
|
avalue = alloca(cif->nargs * sizeof(void *));
|
476 |
|
|
gprcount = ssecount = 0;
|
477 |
|
|
|
478 |
|
|
ret = cif->rtype->type;
|
479 |
|
|
if (ret != FFI_TYPE_VOID)
|
480 |
|
|
{
|
481 |
|
|
enum x86_64_reg_class classes[MAX_CLASSES];
|
482 |
|
|
int n = examine_argument (cif->rtype, classes, 1, &ngpr, &nsse);
|
483 |
|
|
if (n == 0)
|
484 |
|
|
{
|
485 |
|
|
/* The return value goes in memory. Arrange for the closure
|
486 |
|
|
return value to go directly back to the original caller. */
|
487 |
|
|
rvalue = (void *) reg_args->gpr[gprcount++];
|
488 |
|
|
/* We don't have to do anything in asm for the return. */
|
489 |
|
|
ret = FFI_TYPE_VOID;
|
490 |
|
|
}
|
491 |
|
|
else if (ret == FFI_TYPE_STRUCT && n == 2)
|
492 |
|
|
{
|
493 |
|
|
/* Mark which register the second word of the structure goes in. */
|
494 |
|
|
_Bool sse0 = SSE_CLASS_P (classes[0]);
|
495 |
|
|
_Bool sse1 = SSE_CLASS_P (classes[1]);
|
496 |
|
|
if (!sse0 && sse1)
|
497 |
|
|
ret |= 1 << 8;
|
498 |
|
|
else if (sse0 && !sse1)
|
499 |
|
|
ret |= 1 << 9;
|
500 |
|
|
}
|
501 |
|
|
}
|
502 |
|
|
|
503 |
|
|
avn = cif->nargs;
|
504 |
|
|
arg_types = cif->arg_types;
|
505 |
|
|
|
506 |
|
|
for (i = 0; i < avn; ++i)
|
507 |
|
|
{
|
508 |
|
|
enum x86_64_reg_class classes[MAX_CLASSES];
|
509 |
|
|
int n;
|
510 |
|
|
|
511 |
|
|
n = examine_argument (arg_types[i], classes, 0, &ngpr, &nsse);
|
512 |
|
|
if (n == 0
|
513 |
|
|
|| gprcount + ngpr > MAX_GPR_REGS
|
514 |
|
|
|| ssecount + nsse > MAX_SSE_REGS)
|
515 |
|
|
{
|
516 |
|
|
long align = arg_types[i]->alignment;
|
517 |
|
|
|
518 |
|
|
/* Stack arguments are *always* at least 8 byte aligned. */
|
519 |
|
|
if (align < 8)
|
520 |
|
|
align = 8;
|
521 |
|
|
|
522 |
|
|
/* Pass this argument in memory. */
|
523 |
|
|
argp = (void *) ALIGN (argp, align);
|
524 |
|
|
avalue[i] = argp;
|
525 |
|
|
argp += arg_types[i]->size;
|
526 |
|
|
}
|
527 |
|
|
/* If the argument is in a single register, or two consecutive
|
528 |
|
|
registers, then we can use that address directly. */
|
529 |
|
|
else if (n == 1
|
530 |
|
|
|| (n == 2
|
531 |
|
|
&& SSE_CLASS_P (classes[0]) == SSE_CLASS_P (classes[1])))
|
532 |
|
|
{
|
533 |
|
|
/* The argument is in a single register. */
|
534 |
|
|
if (SSE_CLASS_P (classes[0]))
|
535 |
|
|
{
|
536 |
|
|
avalue[i] = ®_args->sse[ssecount];
|
537 |
|
|
ssecount += n;
|
538 |
|
|
}
|
539 |
|
|
else
|
540 |
|
|
{
|
541 |
|
|
avalue[i] = ®_args->gpr[gprcount];
|
542 |
|
|
gprcount += n;
|
543 |
|
|
}
|
544 |
|
|
}
|
545 |
|
|
/* Otherwise, allocate space to make them consecutive. */
|
546 |
|
|
else
|
547 |
|
|
{
|
548 |
|
|
char *a = alloca (16);
|
549 |
|
|
int j;
|
550 |
|
|
|
551 |
|
|
avalue[i] = a;
|
552 |
|
|
for (j = 0; j < n; j++, a += 8)
|
553 |
|
|
{
|
554 |
|
|
if (SSE_CLASS_P (classes[j]))
|
555 |
|
|
memcpy (a, ®_args->sse[ssecount++], 8);
|
556 |
|
|
else
|
557 |
|
|
memcpy (a, ®_args->gpr[gprcount++], 8);
|
558 |
|
|
}
|
559 |
|
|
}
|
560 |
|
|
}
|
561 |
|
|
|
562 |
|
|
/* Invoke the closure. */
|
563 |
|
|
closure->fun (cif, rvalue, avalue, closure->user_data);
|
564 |
|
|
|
565 |
|
|
/* Tell assembly how to perform return type promotions. */
|
566 |
|
|
return ret;
|
567 |
|
|
}
|
568 |
|
|
|
569 |
|
|
#endif /* __x86_64__ */
|