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jlechner |
/* FPU-related code for x86 and x86_64 processors.
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Copyright 2005 Free Software Foundation, Inc.
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Contributed by Francois-Xavier Coudert <coudert@clipper.ens.fr>
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This file is part of the GNU Fortran 95 runtime library (libgfortran).
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Libgfortran is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public
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License as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file into combinations with other programs,
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and to distribute those combinations without any restriction coming
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from the use of this file. (The General Public License restrictions
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do apply in other respects; for example, they cover modification of
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the file, and distribution when not linked into a combine
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executable.)
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Libgfortran is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public
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License along with libgfortran; see the file COPYING. If not,
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write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#define SSE (1 << 25)
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static int
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has_sse (void)
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{
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#ifdef __x86_64__
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return 1;
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#else
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unsigned int eax, ebx, ecx, edx;
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/* See if we can use cpuid. */
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asm volatile ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
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"pushl %0; popfl; pushfl; popl %0; popfl"
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: "=&r" (eax), "=&r" (ebx)
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: "i" (0x00200000));
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if (((eax ^ ebx) & 0x00200000) == 0)
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return 0;
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/* Check the highest input value for eax. */
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (0));
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if (eax == 0)
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return 0;
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
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: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
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: "0" (1));
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if (edx & SSE)
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return 1;
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return 0;
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#endif
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}
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void set_fpu (void)
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{
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unsigned short cw;
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unsigned int cw_sse;
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/* i387 -- see linux <fpu_control.h> header file for details. */
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#define _FPU_MASK_IM 0x01
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#define _FPU_MASK_DM 0x02
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#define _FPU_MASK_ZM 0x04
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#define _FPU_MASK_OM 0x08
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#define _FPU_MASK_UM 0x10
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#define _FPU_MASK_PM 0x20
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asm volatile ("fnstcw %0" : "=m" (cw));
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cw |= _FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_PM;
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if (options.fpe & GFC_FPE_INVALID) cw &= ~_FPU_MASK_IM;
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if (options.fpe & GFC_FPE_DENORMAL) cw &= ~_FPU_MASK_DM;
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if (options.fpe & GFC_FPE_ZERO) cw &= ~_FPU_MASK_ZM;
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if (options.fpe & GFC_FPE_OVERFLOW) cw &= ~_FPU_MASK_OM;
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if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM;
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if (options.fpe & GFC_FPE_PRECISION) cw &= ~_FPU_MASK_PM;
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asm volatile ("fldcw %0" : : "m" (cw));
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if (has_sse())
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{
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/* SSE */
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asm volatile ("stmxcsr %0" : "=m" (cw_sse));
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cw_sse &= 0xFFFF0000;
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if (options.fpe & GFC_FPE_INVALID) cw_sse |= 1 << 7;
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if (options.fpe & GFC_FPE_DENORMAL) cw_sse |= 1 << 8;
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if (options.fpe & GFC_FPE_ZERO) cw_sse |= 1 << 9;
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if (options.fpe & GFC_FPE_OVERFLOW) cw_sse |= 1 << 10;
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if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse |= 1 << 11;
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if (options.fpe & GFC_FPE_PRECISION) cw_sse |= 1 << 12;
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asm volatile ("ldmxcsr %0" : : "m" (cw_sse));
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}
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}
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