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jlechner |
/* Target-dependent code for NetBSD/mips.
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Copyright (C) 2002, 2003, 2004, 2006, 2007, 2008
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Free Software Foundation, Inc.
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Contributed by Wasabi Systems, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "regset.h"
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#include "target.h"
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#include "value.h"
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#include "osabi.h"
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#include "gdb_assert.h"
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#include "gdb_string.h"
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#include "nbsd-tdep.h"
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#include "mipsnbsd-tdep.h"
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#include "mips-tdep.h"
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#include "solib-svr4.h"
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/* Shorthand for some register numbers used below. */
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#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
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#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
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#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
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/* Core file support. */
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/* Number of registers in `struct reg' from <machine/reg.h>. */
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#define MIPSNBSD_NUM_GREGS 38
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/* Number of registers in `struct fpreg' from <machine/reg.h>. */
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#define MIPSNBSD_NUM_FPREGS 33
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/* Supply register REGNUM from the buffer specified by FPREGS and LEN
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in the floating-point register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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mipsnbsd_supply_fpregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *fpregs, size_t len)
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{
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size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
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const char *regs = fpregs;
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int i;
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gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
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for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
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{
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if (regnum == i || regnum == -1)
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regcache_raw_supply (regcache, i,
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regs + (i - MIPS_FP0_REGNUM) * regsize);
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}
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}
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/* Supply register REGNUM from the buffer specified by GREGS and LEN
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in the general-purpose register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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mipsnbsd_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t len)
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{
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size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
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const char *regs = gregs;
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int i;
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gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
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for (i = 0; i <= MIPS_PC_REGNUM; i++)
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{
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if (regnum == i || regnum == -1)
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regcache_raw_supply (regcache, i, regs + i * regsize);
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}
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if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
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{
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regs += MIPSNBSD_NUM_GREGS * regsize;
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len -= MIPSNBSD_NUM_GREGS * regsize;
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mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
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}
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}
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/* NetBSD/mips register sets. */
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static struct regset mipsnbsd_gregset =
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{
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NULL,
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mipsnbsd_supply_gregset
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};
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static struct regset mipsnbsd_fpregset =
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{
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NULL,
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mipsnbsd_supply_fpregset
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};
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/* Return the appropriate register set for the core section identified
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by SECT_NAME and SECT_SIZE. */
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static const struct regset *
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mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
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const char *sect_name, size_t sect_size)
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{
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size_t regsize = mips_isa_regsize (gdbarch);
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if (strcmp (sect_name, ".reg") == 0
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&& sect_size >= MIPSNBSD_NUM_GREGS * regsize)
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return &mipsnbsd_gregset;
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if (strcmp (sect_name, ".reg2") == 0
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&& sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
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return &mipsnbsd_fpregset;
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return NULL;
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}
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/* Conveniently, GDB uses the same register numbering as the
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ptrace register structure used by NetBSD/mips. */
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void
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mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int i;
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for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
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{
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if (regno == i || regno == -1)
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{
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if (gdbarch_cannot_fetch_register (gdbarch, i))
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regcache_raw_supply (regcache, i, NULL);
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else
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regcache_raw_supply (regcache, i,
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regs + (i * mips_isa_regsize (gdbarch)));
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}
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}
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}
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void
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mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int i;
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for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
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if ((regno == i || regno == -1)
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&& ! gdbarch_cannot_store_register (gdbarch, i))
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regcache_raw_collect (regcache, i,
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regs + (i * mips_isa_regsize (gdbarch)));
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}
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void
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mipsnbsd_supply_fpreg (struct regcache *regcache, const char *fpregs, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int i;
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for (i = gdbarch_fp0_regnum (gdbarch);
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i <= mips_regnum (gdbarch)->fp_implementation_revision;
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i++)
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{
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if (regno == i || regno == -1)
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{
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if (gdbarch_cannot_fetch_register (gdbarch, i))
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regcache_raw_supply (regcache, i, NULL);
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else
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regcache_raw_supply (regcache, i,
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fpregs
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+ ((i - gdbarch_fp0_regnum (gdbarch))
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* mips_isa_regsize (gdbarch)));
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}
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}
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}
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void
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mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int i;
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for (i = gdbarch_fp0_regnum (gdbarch);
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i <= mips_regnum (gdbarch)->fp_control_status;
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i++)
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if ((regno == i || regno == -1)
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&& ! gdbarch_cannot_store_register (gdbarch, i))
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regcache_raw_collect (regcache, i,
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fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
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* mips_isa_regsize (gdbarch)));
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}
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/* Under NetBSD/mips, signal handler invocations can be identified by the
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designated code sequence that is used to return from a signal handler.
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In particular, the return address of a signal handler points to the
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following code sequence:
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addu a0, sp, 16
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li v0, 295 # __sigreturn14
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syscall
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Each instruction has a unique encoding, so we simply attempt to match
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the instruction the PC is pointing to with any of the above instructions.
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If there is a hit, we know the offset to the start of the designated
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sequence and can then check whether we really are executing in the
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signal trampoline. If not, -1 is returned, otherwise the offset from the
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start of the return sequence is returned. */
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#define RETCODE_NWORDS 3
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#define RETCODE_SIZE (RETCODE_NWORDS * 4)
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static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
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{
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0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
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0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
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0x0c, 0x00, 0x00, 0x00, /* syscall */
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};
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static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
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{
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0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
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0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
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0x00, 0x00, 0x00, 0x0c, /* syscall */
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};
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static LONGEST
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mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
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{
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CORE_ADDR pc = frame_pc_unwind (next_frame);
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const char *retcode = gdbarch_byte_order (get_frame_arch (next_frame))
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== BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb :
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sigtramp_retcode_mipsel;
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unsigned char ret[RETCODE_SIZE], w[4];
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LONGEST off;
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int i;
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if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
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return -1;
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for (i = 0; i < RETCODE_NWORDS; i++)
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{
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if (memcmp (w, retcode + (i * 4), 4) == 0)
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break;
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}
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if (i == RETCODE_NWORDS)
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return -1;
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off = i * 4;
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pc -= off;
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if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
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return -1;
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if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
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return off;
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return -1;
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}
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/* Figure out where the longjmp will land. We expect that we have
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just entered longjmp and haven't yet setup the stack frame, so the
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args are still in the argument regs. MIPS_A0_REGNUM points at the
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jmp_buf structure from which we extract the PC that we will land
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at. The PC is copied into *pc. This routine returns true on
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success. */
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287 |
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288 |
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#define NBSD_MIPS_JB_PC (2 * 4)
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#define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch)
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290 |
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#define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \
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NBSD_MIPS_JB_ELEMENT_SIZE)
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292 |
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293 |
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static int
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mipsnbsd_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
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{
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296 |
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CORE_ADDR jb_addr;
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297 |
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char *buf;
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298 |
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299 |
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buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
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300 |
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301 |
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jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
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302 |
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303 |
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if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
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NBSD_MIPS_JB_ELEMENT_SIZE))
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return 0;
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307 |
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*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
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308 |
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309 |
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return 1;
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310 |
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}
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311 |
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312 |
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static int
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313 |
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mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
|
314 |
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{
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315 |
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return (regno == MIPS_ZERO_REGNUM
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316 |
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|| regno == mips_regnum (gdbarch)->fp_implementation_revision);
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317 |
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}
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318 |
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319 |
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static int
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mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
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321 |
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{
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return (regno == MIPS_ZERO_REGNUM
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|| regno == mips_regnum (gdbarch)->fp_implementation_revision);
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}
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325 |
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/* Shared library support. */
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327 |
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328 |
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/* NetBSD/mips uses a slightly different `struct link_map' than the
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other NetBSD platforms. */
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330 |
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static struct link_map_offsets *
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mipsnbsd_ilp32_fetch_link_map_offsets (void)
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{
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334 |
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static struct link_map_offsets lmo;
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static struct link_map_offsets *lmp = NULL;
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336 |
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337 |
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if (lmp == NULL)
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{
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339 |
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lmp = &lmo;
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lmo.r_version_offset = 0;
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342 |
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lmo.r_version_size = 4;
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343 |
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lmo.r_map_offset = 4;
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344 |
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lmo.r_brk_offset = 8;
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345 |
|
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lmo.r_ldsomap_offset = -1;
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346 |
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347 |
|
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/* Everything we need is in the first 24 bytes. */
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348 |
|
|
lmo.link_map_size = 24;
|
349 |
|
|
lmo.l_addr_offset = 4;
|
350 |
|
|
lmo.l_name_offset = 8;
|
351 |
|
|
lmo.l_ld_offset = 12;
|
352 |
|
|
lmo.l_next_offset = 16;
|
353 |
|
|
lmo.l_prev_offset = 20;
|
354 |
|
|
}
|
355 |
|
|
|
356 |
|
|
return lmp;
|
357 |
|
|
}
|
358 |
|
|
|
359 |
|
|
static struct link_map_offsets *
|
360 |
|
|
mipsnbsd_lp64_fetch_link_map_offsets (void)
|
361 |
|
|
{
|
362 |
|
|
static struct link_map_offsets lmo;
|
363 |
|
|
static struct link_map_offsets *lmp = NULL;
|
364 |
|
|
|
365 |
|
|
if (lmp == NULL)
|
366 |
|
|
{
|
367 |
|
|
lmp = &lmo;
|
368 |
|
|
|
369 |
|
|
lmo.r_version_offset = 0;
|
370 |
|
|
lmo.r_version_size = 4;
|
371 |
|
|
lmo.r_map_offset = 8;
|
372 |
|
|
lmo.r_brk_offset = 16;
|
373 |
|
|
lmo.r_ldsomap_offset = -1;
|
374 |
|
|
|
375 |
|
|
/* Everything we need is in the first 40 bytes. */
|
376 |
|
|
lmo.link_map_size = 48;
|
377 |
|
|
lmo.l_addr_offset = 0;
|
378 |
|
|
lmo.l_name_offset = 16;
|
379 |
|
|
lmo.l_ld_offset = 24;
|
380 |
|
|
lmo.l_next_offset = 32;
|
381 |
|
|
lmo.l_prev_offset = 40;
|
382 |
|
|
}
|
383 |
|
|
|
384 |
|
|
return lmp;
|
385 |
|
|
}
|
386 |
|
|
|
387 |
|
|
|
388 |
|
|
static void
|
389 |
|
|
mipsnbsd_init_abi (struct gdbarch_info info,
|
390 |
|
|
struct gdbarch *gdbarch)
|
391 |
|
|
{
|
392 |
|
|
set_gdbarch_regset_from_core_section
|
393 |
|
|
(gdbarch, mipsnbsd_regset_from_core_section);
|
394 |
|
|
|
395 |
|
|
set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
|
396 |
|
|
|
397 |
|
|
set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
|
398 |
|
|
set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
|
399 |
|
|
|
400 |
|
|
set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
|
401 |
|
|
|
402 |
|
|
/* NetBSD/mips has SVR4-style shared libraries. */
|
403 |
|
|
set_solib_svr4_fetch_link_map_offsets
|
404 |
|
|
(gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
|
405 |
|
|
mipsnbsd_ilp32_fetch_link_map_offsets :
|
406 |
|
|
mipsnbsd_lp64_fetch_link_map_offsets));
|
407 |
|
|
}
|
408 |
|
|
|
409 |
|
|
|
410 |
|
|
static enum gdb_osabi
|
411 |
|
|
mipsnbsd_core_osabi_sniffer (bfd *abfd)
|
412 |
|
|
{
|
413 |
|
|
if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
|
414 |
|
|
return GDB_OSABI_NETBSD_ELF;
|
415 |
|
|
|
416 |
|
|
return GDB_OSABI_UNKNOWN;
|
417 |
|
|
}
|
418 |
|
|
|
419 |
|
|
void
|
420 |
|
|
_initialize_mipsnbsd_tdep (void)
|
421 |
|
|
{
|
422 |
|
|
gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
|
423 |
|
|
mipsnbsd_init_abi);
|
424 |
|
|
}
|