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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [gdb/] [testsuite/] [gdb.arch/] [i386-cpuid.h] - Blame information for rev 25

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1 25 jlechner
/* Helper file for i386 platform.  Runtime check for MMX/SSE/SSE2 support.
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   Copyright 2004, 2007, 2008 Free Software Foundation, Inc.
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   This file is part of GDB.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
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/* Used by 20020523-2.c and i386-sse-6.c, and possibly others.  */
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/* Plagarized from 20020523-2.c.  */
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/* Plagarized from gcc.  */
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#define bit_CMOV (1 << 15)
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#define bit_MMX (1 << 23)
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#define bit_SSE (1 << 25)
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#define bit_SSE2 (1 << 26)
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#ifndef NOINLINE
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#define NOINLINE __attribute__ ((noinline))
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#endif
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unsigned int i386_cpuid (void) NOINLINE;
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unsigned int NOINLINE
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i386_cpuid (void)
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{
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  int fl1, fl2;
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#ifndef __x86_64__
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  /* See if we can use cpuid.  On AMD64 we always can.  */
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  __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
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           "pushl %0; popfl; pushfl; popl %0; popfl"
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           : "=&r" (fl1), "=&r" (fl2)
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           : "i" (0x00200000));
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  if (((fl1 ^ fl2) & 0x00200000) == 0)
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    return (0);
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#endif
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  /* Host supports cpuid.  See if cpuid gives capabilities, try
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     CPUID(0).  Preserve %ebx and %ecx; cpuid insn clobbers these, we
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     don't need their CPUID values here, and %ebx may be the PIC
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     register.  */
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#ifdef __x86_64__
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  __asm__ ("pushq %%rcx; pushq %%rbx; cpuid; popq %%rbx; popq %%rcx"
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           : "=a" (fl1) : "0" (0) : "rdx", "cc");
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#else
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  __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx"
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           : "=a" (fl1) : "0" (0) : "edx", "cc");
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#endif
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  if (fl1 == 0)
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    return (0);
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  /* Invoke CPUID(1), return %edx; caller can examine bits to
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     determine what's supported.  */
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#ifdef __x86_64__
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  __asm__ ("pushq %%rcx; pushq %%rbx; cpuid; popq %%rbx; popq %%rcx"
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           : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc");
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#else
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  __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx"
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           : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc");
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#endif
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  return fl2;
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}

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