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jlechner |
/* Simulator instruction decoder for iq2000bf.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define WANT_CPU iq2000bf
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#define WANT_CPU_IQ2000BF
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#include "sim-main.h"
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#include "sim-assert.h"
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/* The instruction descriptor array.
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This is computed at runtime. Space for it is not malloc'd to save a
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teensy bit of cpu in the decoder. Moving it to malloc space is trivial
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but won't be done until necessary (we don't currently support the runtime
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addition of instructions nor an SMP machine with different cpus). */
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static IDESC iq2000bf_insn_data[IQ2000BF_INSN_BMB + 1];
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/* Commas between elements are contained in the macros.
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Some of these are conditionally compiled out. */
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static const struct insn_sem iq2000bf_insn_sem[] =
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{
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{ VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY },
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{ VIRTUAL_INSN_X_AFTER, IQ2000BF_INSN_X_AFTER, IQ2000BF_SFMT_EMPTY },
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{ VIRTUAL_INSN_X_BEFORE, IQ2000BF_INSN_X_BEFORE, IQ2000BF_SFMT_EMPTY },
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{ VIRTUAL_INSN_X_CTI_CHAIN, IQ2000BF_INSN_X_CTI_CHAIN, IQ2000BF_SFMT_EMPTY },
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{ VIRTUAL_INSN_X_CHAIN, IQ2000BF_INSN_X_CHAIN, IQ2000BF_SFMT_EMPTY },
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{ VIRTUAL_INSN_X_BEGIN, IQ2000BF_INSN_X_BEGIN, IQ2000BF_SFMT_EMPTY },
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{ IQ2000_INSN_ADD, IQ2000BF_INSN_ADD, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_ADDI, IQ2000BF_INSN_ADDI, IQ2000BF_SFMT_ADDI },
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{ IQ2000_INSN_ADDIU, IQ2000BF_INSN_ADDIU, IQ2000BF_SFMT_ADDI },
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{ IQ2000_INSN_ADDU, IQ2000BF_INSN_ADDU, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_ADO16, IQ2000BF_INSN_ADO16, IQ2000BF_SFMT_ADO16 },
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{ IQ2000_INSN_AND, IQ2000BF_INSN_AND, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_ANDI, IQ2000BF_INSN_ANDI, IQ2000BF_SFMT_ADDI },
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{ IQ2000_INSN_ANDOI, IQ2000BF_INSN_ANDOI, IQ2000BF_SFMT_ADDI },
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{ IQ2000_INSN_NOR, IQ2000BF_INSN_NOR, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_OR, IQ2000BF_INSN_OR, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_ORI, IQ2000BF_INSN_ORI, IQ2000BF_SFMT_ADDI },
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{ IQ2000_INSN_RAM, IQ2000BF_INSN_RAM, IQ2000BF_SFMT_RAM },
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{ IQ2000_INSN_SLL, IQ2000BF_INSN_SLL, IQ2000BF_SFMT_SLL },
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{ IQ2000_INSN_SLLV, IQ2000BF_INSN_SLLV, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_SLMV, IQ2000BF_INSN_SLMV, IQ2000BF_SFMT_SLMV },
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{ IQ2000_INSN_SLT, IQ2000BF_INSN_SLT, IQ2000BF_SFMT_SLT },
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{ IQ2000_INSN_SLTI, IQ2000BF_INSN_SLTI, IQ2000BF_SFMT_SLTI },
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{ IQ2000_INSN_SLTIU, IQ2000BF_INSN_SLTIU, IQ2000BF_SFMT_SLTI },
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{ IQ2000_INSN_SLTU, IQ2000BF_INSN_SLTU, IQ2000BF_SFMT_SLT },
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{ IQ2000_INSN_SRA, IQ2000BF_INSN_SRA, IQ2000BF_SFMT_SLL },
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{ IQ2000_INSN_SRAV, IQ2000BF_INSN_SRAV, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_SRL, IQ2000BF_INSN_SRL, IQ2000BF_SFMT_SLL },
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{ IQ2000_INSN_SRLV, IQ2000BF_INSN_SRLV, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_SRMV, IQ2000BF_INSN_SRMV, IQ2000BF_SFMT_SLMV },
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{ IQ2000_INSN_SUB, IQ2000BF_INSN_SUB, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_SUBU, IQ2000BF_INSN_SUBU, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_XOR, IQ2000BF_INSN_XOR, IQ2000BF_SFMT_ADD },
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{ IQ2000_INSN_XORI, IQ2000BF_INSN_XORI, IQ2000BF_SFMT_ADDI },
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{ IQ2000_INSN_BBI, IQ2000BF_INSN_BBI, IQ2000BF_SFMT_BBI },
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{ IQ2000_INSN_BBIN, IQ2000BF_INSN_BBIN, IQ2000BF_SFMT_BBI },
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{ IQ2000_INSN_BBV, IQ2000BF_INSN_BBV, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BBVN, IQ2000BF_INSN_BBVN, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BEQ, IQ2000BF_INSN_BEQ, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BEQL, IQ2000BF_INSN_BEQL, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BGEZ, IQ2000BF_INSN_BGEZ, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BGEZAL, IQ2000BF_INSN_BGEZAL, IQ2000BF_SFMT_BGEZAL },
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{ IQ2000_INSN_BGEZALL, IQ2000BF_INSN_BGEZALL, IQ2000BF_SFMT_BGEZAL },
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{ IQ2000_INSN_BGEZL, IQ2000BF_INSN_BGEZL, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BLTZ, IQ2000BF_INSN_BLTZ, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BLTZL, IQ2000BF_INSN_BLTZL, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BLTZAL, IQ2000BF_INSN_BLTZAL, IQ2000BF_SFMT_BGEZAL },
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{ IQ2000_INSN_BLTZALL, IQ2000BF_INSN_BLTZALL, IQ2000BF_SFMT_BGEZAL },
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{ IQ2000_INSN_BMB0, IQ2000BF_INSN_BMB0, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BMB1, IQ2000BF_INSN_BMB1, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BMB2, IQ2000BF_INSN_BMB2, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BMB3, IQ2000BF_INSN_BMB3, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BNE, IQ2000BF_INSN_BNE, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_BNEL, IQ2000BF_INSN_BNEL, IQ2000BF_SFMT_BBV },
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{ IQ2000_INSN_JALR, IQ2000BF_INSN_JALR, IQ2000BF_SFMT_JALR },
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{ IQ2000_INSN_JR, IQ2000BF_INSN_JR, IQ2000BF_SFMT_JR },
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{ IQ2000_INSN_LB, IQ2000BF_INSN_LB, IQ2000BF_SFMT_LB },
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{ IQ2000_INSN_LBU, IQ2000BF_INSN_LBU, IQ2000BF_SFMT_LB },
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{ IQ2000_INSN_LH, IQ2000BF_INSN_LH, IQ2000BF_SFMT_LH },
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{ IQ2000_INSN_LHU, IQ2000BF_INSN_LHU, IQ2000BF_SFMT_LH },
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{ IQ2000_INSN_LUI, IQ2000BF_INSN_LUI, IQ2000BF_SFMT_LUI },
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{ IQ2000_INSN_LW, IQ2000BF_INSN_LW, IQ2000BF_SFMT_LW },
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{ IQ2000_INSN_SB, IQ2000BF_INSN_SB, IQ2000BF_SFMT_SB },
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{ IQ2000_INSN_SH, IQ2000BF_INSN_SH, IQ2000BF_SFMT_SH },
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{ IQ2000_INSN_SW, IQ2000BF_INSN_SW, IQ2000BF_SFMT_SW },
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{ IQ2000_INSN_BREAK, IQ2000BF_INSN_BREAK, IQ2000BF_SFMT_BREAK },
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{ IQ2000_INSN_SYSCALL, IQ2000BF_INSN_SYSCALL, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_ANDOUI, IQ2000BF_INSN_ANDOUI, IQ2000BF_SFMT_ANDOUI },
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{ IQ2000_INSN_ORUI, IQ2000BF_INSN_ORUI, IQ2000BF_SFMT_ANDOUI },
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{ IQ2000_INSN_BGTZ, IQ2000BF_INSN_BGTZ, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BGTZL, IQ2000BF_INSN_BGTZL, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BLEZ, IQ2000BF_INSN_BLEZ, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_BLEZL, IQ2000BF_INSN_BLEZL, IQ2000BF_SFMT_BGEZ },
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{ IQ2000_INSN_MRGB, IQ2000BF_INSN_MRGB, IQ2000BF_SFMT_MRGB },
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{ IQ2000_INSN_BCTXT, IQ2000BF_INSN_BCTXT, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC0F, IQ2000BF_INSN_BC0F, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC0FL, IQ2000BF_INSN_BC0FL, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC3F, IQ2000BF_INSN_BC3F, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC3FL, IQ2000BF_INSN_BC3FL, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC0T, IQ2000BF_INSN_BC0T, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC0TL, IQ2000BF_INSN_BC0TL, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC3T, IQ2000BF_INSN_BC3T, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_BC3TL, IQ2000BF_INSN_BC3TL, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_CFC0, IQ2000BF_INSN_CFC0, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CFC1, IQ2000BF_INSN_CFC1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CFC2, IQ2000BF_INSN_CFC2, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CFC3, IQ2000BF_INSN_CFC3, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CHKHDR, IQ2000BF_INSN_CHKHDR, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CTC0, IQ2000BF_INSN_CTC0, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CTC1, IQ2000BF_INSN_CTC1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CTC2, IQ2000BF_INSN_CTC2, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_CTC3, IQ2000BF_INSN_CTC3, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_JCR, IQ2000BF_INSN_JCR, IQ2000BF_SFMT_BCTXT },
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{ IQ2000_INSN_LUC32, IQ2000BF_INSN_LUC32, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUC32L, IQ2000BF_INSN_LUC32L, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUC64, IQ2000BF_INSN_LUC64, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUC64L, IQ2000BF_INSN_LUC64L, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUK, IQ2000BF_INSN_LUK, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LULCK, IQ2000BF_INSN_LULCK, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUM32, IQ2000BF_INSN_LUM32, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUM32L, IQ2000BF_INSN_LUM32L, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUM64, IQ2000BF_INSN_LUM64, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUM64L, IQ2000BF_INSN_LUM64L, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUR, IQ2000BF_INSN_LUR, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LURL, IQ2000BF_INSN_LURL, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LUULCK, IQ2000BF_INSN_LUULCK, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MFC0, IQ2000BF_INSN_MFC0, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MFC1, IQ2000BF_INSN_MFC1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MFC2, IQ2000BF_INSN_MFC2, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MFC3, IQ2000BF_INSN_MFC3, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MTC0, IQ2000BF_INSN_MTC0, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MTC1, IQ2000BF_INSN_MTC1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MTC2, IQ2000BF_INSN_MTC2, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_MTC3, IQ2000BF_INSN_MTC3, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_PKRL, IQ2000BF_INSN_PKRL, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_PKRLR1, IQ2000BF_INSN_PKRLR1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_PKRLR30, IQ2000BF_INSN_PKRLR30, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RB, IQ2000BF_INSN_RB, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RBR1, IQ2000BF_INSN_RBR1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RBR30, IQ2000BF_INSN_RBR30, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RFE, IQ2000BF_INSN_RFE, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RX, IQ2000BF_INSN_RX, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RXR1, IQ2000BF_INSN_RXR1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_RXR30, IQ2000BF_INSN_RXR30, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_SLEEP, IQ2000BF_INSN_SLEEP, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_SRRD, IQ2000BF_INSN_SRRD, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_SRRDL, IQ2000BF_INSN_SRRDL, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_SRULCK, IQ2000BF_INSN_SRULCK, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_SRWR, IQ2000BF_INSN_SRWR, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_SRWRU, IQ2000BF_INSN_SRWRU, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_TRAPQFL, IQ2000BF_INSN_TRAPQFL, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_TRAPQNE, IQ2000BF_INSN_TRAPQNE, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_TRAPREL, IQ2000BF_INSN_TRAPREL, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WB, IQ2000BF_INSN_WB, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WBU, IQ2000BF_INSN_WBU, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WBR1, IQ2000BF_INSN_WBR1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WBR1U, IQ2000BF_INSN_WBR1U, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WBR30, IQ2000BF_INSN_WBR30, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WBR30U, IQ2000BF_INSN_WBR30U, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WX, IQ2000BF_INSN_WX, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WXU, IQ2000BF_INSN_WXU, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WXR1, IQ2000BF_INSN_WXR1, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WXR1U, IQ2000BF_INSN_WXR1U, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WXR30, IQ2000BF_INSN_WXR30, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_WXR30U, IQ2000BF_INSN_WXR30U, IQ2000BF_SFMT_SYSCALL },
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{ IQ2000_INSN_LDW, IQ2000BF_INSN_LDW, IQ2000BF_SFMT_LDW },
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{ IQ2000_INSN_SDW, IQ2000BF_INSN_SDW, IQ2000BF_SFMT_SDW },
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189 |
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{ IQ2000_INSN_J, IQ2000BF_INSN_J, IQ2000BF_SFMT_J },
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190 |
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{ IQ2000_INSN_JAL, IQ2000BF_INSN_JAL, IQ2000BF_SFMT_JAL },
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{ IQ2000_INSN_BMB, IQ2000BF_INSN_BMB, IQ2000BF_SFMT_BBV },
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};
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static const struct insn_sem iq2000bf_insn_sem_invalid = {
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VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY
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};
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/* Initialize an IDESC from the compile-time computable parts. */
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static INLINE void
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|
|
init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
|
202 |
|
|
{
|
203 |
|
|
const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
|
204 |
|
|
|
205 |
|
|
id->num = t->index;
|
206 |
|
|
id->sfmt = t->sfmt;
|
207 |
|
|
if ((int) t->type <= 0)
|
208 |
|
|
id->idata = & cgen_virtual_insn_table[- (int) t->type];
|
209 |
|
|
else
|
210 |
|
|
id->idata = & insn_table[t->type];
|
211 |
|
|
id->attrs = CGEN_INSN_ATTRS (id->idata);
|
212 |
|
|
/* Oh my god, a magic number. */
|
213 |
|
|
id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
|
214 |
|
|
|
215 |
|
|
#if WITH_PROFILE_MODEL_P
|
216 |
|
|
id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
|
217 |
|
|
{
|
218 |
|
|
SIM_DESC sd = CPU_STATE (cpu);
|
219 |
|
|
SIM_ASSERT (t->index == id->timing->num);
|
220 |
|
|
}
|
221 |
|
|
#endif
|
222 |
|
|
|
223 |
|
|
/* Semantic pointers are initialized elsewhere. */
|
224 |
|
|
}
|
225 |
|
|
|
226 |
|
|
/* Initialize the instruction descriptor table. */
|
227 |
|
|
|
228 |
|
|
void
|
229 |
|
|
iq2000bf_init_idesc_table (SIM_CPU *cpu)
|
230 |
|
|
{
|
231 |
|
|
IDESC *id,*tabend;
|
232 |
|
|
const struct insn_sem *t,*tend;
|
233 |
|
|
int tabsize = sizeof (iq2000bf_insn_data) / sizeof (IDESC);
|
234 |
|
|
IDESC *table = iq2000bf_insn_data;
|
235 |
|
|
|
236 |
|
|
memset (table, 0, tabsize * sizeof (IDESC));
|
237 |
|
|
|
238 |
|
|
/* First set all entries to the `invalid insn'. */
|
239 |
|
|
t = & iq2000bf_insn_sem_invalid;
|
240 |
|
|
for (id = table, tabend = table + tabsize; id < tabend; ++id)
|
241 |
|
|
init_idesc (cpu, id, t);
|
242 |
|
|
|
243 |
|
|
/* Now fill in the values for the chosen cpu. */
|
244 |
|
|
for (t = iq2000bf_insn_sem, tend = t + sizeof (iq2000bf_insn_sem) / sizeof (*t);
|
245 |
|
|
t != tend; ++t)
|
246 |
|
|
{
|
247 |
|
|
init_idesc (cpu, & table[t->index], t);
|
248 |
|
|
}
|
249 |
|
|
|
250 |
|
|
/* Link the IDESC table into the cpu. */
|
251 |
|
|
CPU_IDESC (cpu) = table;
|
252 |
|
|
}
|
253 |
|
|
|
254 |
|
|
/* Given an instruction, return a pointer to its IDESC entry. */
|
255 |
|
|
|
256 |
|
|
const IDESC *
|
257 |
|
|
iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
|
258 |
|
|
CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
|
259 |
|
|
ARGBUF *abuf)
|
260 |
|
|
{
|
261 |
|
|
/* Result of decoder. */
|
262 |
|
|
IQ2000BF_INSN_TYPE itype;
|
263 |
|
|
|
264 |
|
|
{
|
265 |
|
|
CGEN_INSN_INT insn = base_insn;
|
266 |
|
|
|
267 |
|
|
{
|
268 |
|
|
unsigned int val = (((insn >> 26) & (63 << 0)));
|
269 |
|
|
switch (val)
|
270 |
|
|
{
|
271 |
|
|
case 0 :
|
272 |
|
|
{
|
273 |
|
|
unsigned int val = (((insn >> 1) & (1 << 4)) | ((insn >> 0) & (15 << 0)));
|
274 |
|
|
switch (val)
|
275 |
|
|
{
|
276 |
|
|
case 0 : itype = IQ2000BF_INSN_SLL;goto extract_sfmt_sll;
|
277 |
|
|
case 1 : itype = IQ2000BF_INSN_SLMV;goto extract_sfmt_slmv;
|
278 |
|
|
case 2 : itype = IQ2000BF_INSN_SRL;goto extract_sfmt_sll;
|
279 |
|
|
case 3 : itype = IQ2000BF_INSN_SRA;goto extract_sfmt_sll;
|
280 |
|
|
case 4 : itype = IQ2000BF_INSN_SLLV;goto extract_sfmt_add;
|
281 |
|
|
case 5 : itype = IQ2000BF_INSN_SRMV;goto extract_sfmt_slmv;
|
282 |
|
|
case 6 : itype = IQ2000BF_INSN_SRLV;goto extract_sfmt_add;
|
283 |
|
|
case 7 : itype = IQ2000BF_INSN_SRAV;goto extract_sfmt_add;
|
284 |
|
|
case 8 : itype = IQ2000BF_INSN_JR;goto extract_sfmt_jr;
|
285 |
|
|
case 9 : itype = IQ2000BF_INSN_JALR;goto extract_sfmt_jalr;
|
286 |
|
|
case 10 : itype = IQ2000BF_INSN_JCR;goto extract_sfmt_bctxt;
|
287 |
|
|
case 12 : itype = IQ2000BF_INSN_SYSCALL;goto extract_sfmt_syscall;
|
288 |
|
|
case 13 : itype = IQ2000BF_INSN_BREAK;goto extract_sfmt_break;
|
289 |
|
|
case 14 : itype = IQ2000BF_INSN_SLEEP;goto extract_sfmt_syscall;
|
290 |
|
|
case 16 : itype = IQ2000BF_INSN_ADD;goto extract_sfmt_add;
|
291 |
|
|
case 17 : itype = IQ2000BF_INSN_ADDU;goto extract_sfmt_add;
|
292 |
|
|
case 18 : itype = IQ2000BF_INSN_SUB;goto extract_sfmt_add;
|
293 |
|
|
case 19 : itype = IQ2000BF_INSN_SUBU;goto extract_sfmt_add;
|
294 |
|
|
case 20 : itype = IQ2000BF_INSN_AND;goto extract_sfmt_add;
|
295 |
|
|
case 21 : itype = IQ2000BF_INSN_OR;goto extract_sfmt_add;
|
296 |
|
|
case 22 : itype = IQ2000BF_INSN_XOR;goto extract_sfmt_add;
|
297 |
|
|
case 23 : itype = IQ2000BF_INSN_NOR;goto extract_sfmt_add;
|
298 |
|
|
case 25 : itype = IQ2000BF_INSN_ADO16;goto extract_sfmt_ado16;
|
299 |
|
|
case 26 : itype = IQ2000BF_INSN_SLT;goto extract_sfmt_slt;
|
300 |
|
|
case 27 : itype = IQ2000BF_INSN_SLTU;goto extract_sfmt_slt;
|
301 |
|
|
case 29 : itype = IQ2000BF_INSN_MRGB;goto extract_sfmt_mrgb;
|
302 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
303 |
|
|
}
|
304 |
|
|
}
|
305 |
|
|
case 1 :
|
306 |
|
|
{
|
307 |
|
|
unsigned int val = (((insn >> 17) & (1 << 3)) | ((insn >> 16) & (7 << 0)));
|
308 |
|
|
switch (val)
|
309 |
|
|
{
|
310 |
|
|
case 0 : itype = IQ2000BF_INSN_BLTZ;goto extract_sfmt_bgez;
|
311 |
|
|
case 1 : itype = IQ2000BF_INSN_BGEZ;goto extract_sfmt_bgez;
|
312 |
|
|
case 2 : itype = IQ2000BF_INSN_BLTZL;goto extract_sfmt_bgez;
|
313 |
|
|
case 3 : itype = IQ2000BF_INSN_BGEZL;goto extract_sfmt_bgez;
|
314 |
|
|
case 6 : itype = IQ2000BF_INSN_BCTXT;goto extract_sfmt_bctxt;
|
315 |
|
|
case 8 : itype = IQ2000BF_INSN_BLTZAL;goto extract_sfmt_bgezal;
|
316 |
|
|
case 9 : itype = IQ2000BF_INSN_BGEZAL;goto extract_sfmt_bgezal;
|
317 |
|
|
case 10 : itype = IQ2000BF_INSN_BLTZALL;goto extract_sfmt_bgezal;
|
318 |
|
|
case 11 : itype = IQ2000BF_INSN_BGEZALL;goto extract_sfmt_bgezal;
|
319 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
320 |
|
|
}
|
321 |
|
|
}
|
322 |
|
|
case 2 : itype = IQ2000BF_INSN_J;goto extract_sfmt_j;
|
323 |
|
|
case 3 : itype = IQ2000BF_INSN_JAL;goto extract_sfmt_jal;
|
324 |
|
|
case 4 : itype = IQ2000BF_INSN_BEQ;goto extract_sfmt_bbv;
|
325 |
|
|
case 5 : itype = IQ2000BF_INSN_BNE;goto extract_sfmt_bbv;
|
326 |
|
|
case 6 : itype = IQ2000BF_INSN_BLEZ;goto extract_sfmt_bgez;
|
327 |
|
|
case 7 : itype = IQ2000BF_INSN_BGTZ;goto extract_sfmt_bgez;
|
328 |
|
|
case 8 : itype = IQ2000BF_INSN_ADDI;goto extract_sfmt_addi;
|
329 |
|
|
case 9 : itype = IQ2000BF_INSN_ADDIU;goto extract_sfmt_addi;
|
330 |
|
|
case 10 : itype = IQ2000BF_INSN_SLTI;goto extract_sfmt_slti;
|
331 |
|
|
case 11 : itype = IQ2000BF_INSN_SLTIU;goto extract_sfmt_slti;
|
332 |
|
|
case 12 : itype = IQ2000BF_INSN_ANDI;goto extract_sfmt_addi;
|
333 |
|
|
case 13 : itype = IQ2000BF_INSN_ORI;goto extract_sfmt_addi;
|
334 |
|
|
case 14 : itype = IQ2000BF_INSN_XORI;goto extract_sfmt_addi;
|
335 |
|
|
case 15 : itype = IQ2000BF_INSN_LUI;goto extract_sfmt_lui;
|
336 |
|
|
case 16 :
|
337 |
|
|
{
|
338 |
|
|
unsigned int val = (((insn >> 19) & (15 << 3)) | ((insn >> 15) & (3 << 1)) | ((insn >> 4) & (1 << 0)));
|
339 |
|
|
switch (val)
|
340 |
|
|
{
|
341 |
|
|
case 0 : /* fall through */
|
342 |
|
|
case 2 : /* fall through */
|
343 |
|
|
case 4 : /* fall through */
|
344 |
|
|
case 6 : itype = IQ2000BF_INSN_MFC0;goto extract_sfmt_syscall;
|
345 |
|
|
case 8 : /* fall through */
|
346 |
|
|
case 10 : /* fall through */
|
347 |
|
|
case 12 : /* fall through */
|
348 |
|
|
case 14 : itype = IQ2000BF_INSN_CFC0;goto extract_sfmt_syscall;
|
349 |
|
|
case 16 : /* fall through */
|
350 |
|
|
case 18 : /* fall through */
|
351 |
|
|
case 20 : /* fall through */
|
352 |
|
|
case 22 : itype = IQ2000BF_INSN_MTC0;goto extract_sfmt_syscall;
|
353 |
|
|
case 24 : /* fall through */
|
354 |
|
|
case 26 : /* fall through */
|
355 |
|
|
case 28 : /* fall through */
|
356 |
|
|
case 30 : itype = IQ2000BF_INSN_CTC0;goto extract_sfmt_syscall;
|
357 |
|
|
case 32 : /* fall through */
|
358 |
|
|
case 33 : itype = IQ2000BF_INSN_BC0F;goto extract_sfmt_bctxt;
|
359 |
|
|
case 34 : /* fall through */
|
360 |
|
|
case 35 : itype = IQ2000BF_INSN_BC0T;goto extract_sfmt_bctxt;
|
361 |
|
|
case 36 : /* fall through */
|
362 |
|
|
case 37 : itype = IQ2000BF_INSN_BC0FL;goto extract_sfmt_bctxt;
|
363 |
|
|
case 38 : /* fall through */
|
364 |
|
|
case 39 : itype = IQ2000BF_INSN_BC0TL;goto extract_sfmt_bctxt;
|
365 |
|
|
case 65 : itype = IQ2000BF_INSN_RFE;goto extract_sfmt_syscall;
|
366 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
367 |
|
|
}
|
368 |
|
|
}
|
369 |
|
|
case 17 :
|
370 |
|
|
{
|
371 |
|
|
unsigned int val = (((insn >> 22) & (3 << 0)));
|
372 |
|
|
switch (val)
|
373 |
|
|
{
|
374 |
|
|
case 0 : itype = IQ2000BF_INSN_MFC1;goto extract_sfmt_syscall;
|
375 |
|
|
case 1 : itype = IQ2000BF_INSN_CFC1;goto extract_sfmt_syscall;
|
376 |
|
|
case 2 : itype = IQ2000BF_INSN_MTC1;goto extract_sfmt_syscall;
|
377 |
|
|
case 3 : itype = IQ2000BF_INSN_CTC1;goto extract_sfmt_syscall;
|
378 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
379 |
|
|
}
|
380 |
|
|
}
|
381 |
|
|
case 18 :
|
382 |
|
|
{
|
383 |
|
|
unsigned int val = (((insn >> 16) & (3 << 5)) | ((insn >> 0) & (31 << 0)));
|
384 |
|
|
switch (val)
|
385 |
|
|
{
|
386 |
|
|
case 0 :
|
387 |
|
|
{
|
388 |
|
|
unsigned int val = (((insn >> 23) & (1 << 0)));
|
389 |
|
|
switch (val)
|
390 |
|
|
{
|
391 |
|
|
case 0 : itype = IQ2000BF_INSN_MFC2;goto extract_sfmt_syscall;
|
392 |
|
|
case 1 : itype = IQ2000BF_INSN_MTC2;goto extract_sfmt_syscall;
|
393 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
394 |
|
|
}
|
395 |
|
|
}
|
396 |
|
|
case 32 : itype = IQ2000BF_INSN_LUULCK;goto extract_sfmt_syscall;
|
397 |
|
|
case 33 : itype = IQ2000BF_INSN_LUR;goto extract_sfmt_syscall;
|
398 |
|
|
case 34 : itype = IQ2000BF_INSN_LUM32;goto extract_sfmt_syscall;
|
399 |
|
|
case 35 : itype = IQ2000BF_INSN_LUC32;goto extract_sfmt_syscall;
|
400 |
|
|
case 36 : itype = IQ2000BF_INSN_LULCK;goto extract_sfmt_syscall;
|
401 |
|
|
case 37 : itype = IQ2000BF_INSN_LURL;goto extract_sfmt_syscall;
|
402 |
|
|
case 38 : itype = IQ2000BF_INSN_LUM32L;goto extract_sfmt_syscall;
|
403 |
|
|
case 39 : itype = IQ2000BF_INSN_LUC32L;goto extract_sfmt_syscall;
|
404 |
|
|
case 40 : itype = IQ2000BF_INSN_LUK;goto extract_sfmt_syscall;
|
405 |
|
|
case 42 : itype = IQ2000BF_INSN_LUM64;goto extract_sfmt_syscall;
|
406 |
|
|
case 43 : itype = IQ2000BF_INSN_LUC64;goto extract_sfmt_syscall;
|
407 |
|
|
case 46 : itype = IQ2000BF_INSN_LUM64L;goto extract_sfmt_syscall;
|
408 |
|
|
case 47 : itype = IQ2000BF_INSN_LUC64L;goto extract_sfmt_syscall;
|
409 |
|
|
case 48 : itype = IQ2000BF_INSN_SRRD;goto extract_sfmt_syscall;
|
410 |
|
|
case 49 : itype = IQ2000BF_INSN_SRWR;goto extract_sfmt_syscall;
|
411 |
|
|
case 52 : itype = IQ2000BF_INSN_SRRDL;goto extract_sfmt_syscall;
|
412 |
|
|
case 53 : itype = IQ2000BF_INSN_SRWRU;goto extract_sfmt_syscall;
|
413 |
|
|
case 54 : itype = IQ2000BF_INSN_SRULCK;goto extract_sfmt_syscall;
|
414 |
|
|
case 64 :
|
415 |
|
|
{
|
416 |
|
|
unsigned int val = (((insn >> 23) & (1 << 0)));
|
417 |
|
|
switch (val)
|
418 |
|
|
{
|
419 |
|
|
case 0 : itype = IQ2000BF_INSN_CFC2;goto extract_sfmt_syscall;
|
420 |
|
|
case 1 : itype = IQ2000BF_INSN_CTC2;goto extract_sfmt_syscall;
|
421 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
422 |
|
|
}
|
423 |
|
|
}
|
424 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
425 |
|
|
}
|
426 |
|
|
}
|
427 |
|
|
case 19 :
|
428 |
|
|
{
|
429 |
|
|
unsigned int val = (((insn >> 19) & (31 << 2)) | ((insn >> 0) & (3 << 0)));
|
430 |
|
|
switch (val)
|
431 |
|
|
{
|
432 |
|
|
case 0 : itype = IQ2000BF_INSN_MFC3;goto extract_sfmt_syscall;
|
433 |
|
|
case 4 :
|
434 |
|
|
{
|
435 |
|
|
unsigned int val = (((insn >> 2) & (3 << 0)));
|
436 |
|
|
switch (val)
|
437 |
|
|
{
|
438 |
|
|
case 0 : itype = IQ2000BF_INSN_WB;goto extract_sfmt_syscall;
|
439 |
|
|
case 1 : itype = IQ2000BF_INSN_RB;goto extract_sfmt_syscall;
|
440 |
|
|
case 2 : itype = IQ2000BF_INSN_TRAPQFL;goto extract_sfmt_syscall;
|
441 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
442 |
|
|
}
|
443 |
|
|
}
|
444 |
|
|
case 5 :
|
445 |
|
|
{
|
446 |
|
|
unsigned int val = (((insn >> 3) & (1 << 0)));
|
447 |
|
|
switch (val)
|
448 |
|
|
{
|
449 |
|
|
case 0 : itype = IQ2000BF_INSN_WBU;goto extract_sfmt_syscall;
|
450 |
|
|
case 1 : itype = IQ2000BF_INSN_TRAPQNE;goto extract_sfmt_syscall;
|
451 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
452 |
|
|
}
|
453 |
|
|
}
|
454 |
|
|
case 6 :
|
455 |
|
|
{
|
456 |
|
|
unsigned int val = (((insn >> 2) & (3 << 0)));
|
457 |
|
|
switch (val)
|
458 |
|
|
{
|
459 |
|
|
case 0 : itype = IQ2000BF_INSN_WX;goto extract_sfmt_syscall;
|
460 |
|
|
case 1 : itype = IQ2000BF_INSN_RX;goto extract_sfmt_syscall;
|
461 |
|
|
case 2 : itype = IQ2000BF_INSN_TRAPREL;goto extract_sfmt_syscall;
|
462 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
463 |
|
|
}
|
464 |
|
|
}
|
465 |
|
|
case 7 :
|
466 |
|
|
{
|
467 |
|
|
unsigned int val = (((insn >> 2) & (1 << 0)));
|
468 |
|
|
switch (val)
|
469 |
|
|
{
|
470 |
|
|
case 0 : itype = IQ2000BF_INSN_WXU;goto extract_sfmt_syscall;
|
471 |
|
|
case 1 : itype = IQ2000BF_INSN_PKRL;goto extract_sfmt_syscall;
|
472 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
473 |
|
|
}
|
474 |
|
|
}
|
475 |
|
|
case 8 : itype = IQ2000BF_INSN_CFC3;goto extract_sfmt_syscall;
|
476 |
|
|
case 16 : itype = IQ2000BF_INSN_MTC3;goto extract_sfmt_syscall;
|
477 |
|
|
case 24 : itype = IQ2000BF_INSN_CTC3;goto extract_sfmt_syscall;
|
478 |
|
|
case 32 : /* fall through */
|
479 |
|
|
case 33 : /* fall through */
|
480 |
|
|
case 34 : /* fall through */
|
481 |
|
|
case 35 :
|
482 |
|
|
{
|
483 |
|
|
unsigned int val = (((insn >> 16) & (3 << 0)));
|
484 |
|
|
switch (val)
|
485 |
|
|
{
|
486 |
|
|
case 0 : itype = IQ2000BF_INSN_BC3F;goto extract_sfmt_bctxt;
|
487 |
|
|
case 1 : itype = IQ2000BF_INSN_BC3T;goto extract_sfmt_bctxt;
|
488 |
|
|
case 2 : itype = IQ2000BF_INSN_BC3FL;goto extract_sfmt_bctxt;
|
489 |
|
|
case 3 : itype = IQ2000BF_INSN_BC3TL;goto extract_sfmt_bctxt;
|
490 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
491 |
|
|
}
|
492 |
|
|
}
|
493 |
|
|
case 36 : itype = IQ2000BF_INSN_CHKHDR;goto extract_sfmt_syscall;
|
494 |
|
|
case 64 : /* fall through */
|
495 |
|
|
case 65 : /* fall through */
|
496 |
|
|
case 66 : /* fall through */
|
497 |
|
|
case 67 : itype = IQ2000BF_INSN_WBR1;goto extract_sfmt_syscall;
|
498 |
|
|
case 68 : /* fall through */
|
499 |
|
|
case 69 : /* fall through */
|
500 |
|
|
case 70 : /* fall through */
|
501 |
|
|
case 71 : itype = IQ2000BF_INSN_WBR1U;goto extract_sfmt_syscall;
|
502 |
|
|
case 72 : /* fall through */
|
503 |
|
|
case 73 : /* fall through */
|
504 |
|
|
case 74 : /* fall through */
|
505 |
|
|
case 75 : itype = IQ2000BF_INSN_WBR30;goto extract_sfmt_syscall;
|
506 |
|
|
case 76 : /* fall through */
|
507 |
|
|
case 77 : /* fall through */
|
508 |
|
|
case 78 : /* fall through */
|
509 |
|
|
case 79 : itype = IQ2000BF_INSN_WBR30U;goto extract_sfmt_syscall;
|
510 |
|
|
case 80 : /* fall through */
|
511 |
|
|
case 81 : /* fall through */
|
512 |
|
|
case 82 : /* fall through */
|
513 |
|
|
case 83 : itype = IQ2000BF_INSN_WXR1;goto extract_sfmt_syscall;
|
514 |
|
|
case 84 : /* fall through */
|
515 |
|
|
case 85 : /* fall through */
|
516 |
|
|
case 86 : /* fall through */
|
517 |
|
|
case 87 : itype = IQ2000BF_INSN_WXR1U;goto extract_sfmt_syscall;
|
518 |
|
|
case 88 : /* fall through */
|
519 |
|
|
case 89 : /* fall through */
|
520 |
|
|
case 90 : /* fall through */
|
521 |
|
|
case 91 : itype = IQ2000BF_INSN_WXR30;goto extract_sfmt_syscall;
|
522 |
|
|
case 92 : /* fall through */
|
523 |
|
|
case 93 : /* fall through */
|
524 |
|
|
case 94 : /* fall through */
|
525 |
|
|
case 95 : itype = IQ2000BF_INSN_WXR30U;goto extract_sfmt_syscall;
|
526 |
|
|
case 96 : /* fall through */
|
527 |
|
|
case 97 : /* fall through */
|
528 |
|
|
case 98 : /* fall through */
|
529 |
|
|
case 99 : itype = IQ2000BF_INSN_RBR1;goto extract_sfmt_syscall;
|
530 |
|
|
case 104 : /* fall through */
|
531 |
|
|
case 105 : /* fall through */
|
532 |
|
|
case 106 : /* fall through */
|
533 |
|
|
case 107 : itype = IQ2000BF_INSN_RBR30;goto extract_sfmt_syscall;
|
534 |
|
|
case 112 : /* fall through */
|
535 |
|
|
case 113 : /* fall through */
|
536 |
|
|
case 114 : /* fall through */
|
537 |
|
|
case 115 : itype = IQ2000BF_INSN_RXR1;goto extract_sfmt_syscall;
|
538 |
|
|
case 116 : /* fall through */
|
539 |
|
|
case 117 : /* fall through */
|
540 |
|
|
case 118 : /* fall through */
|
541 |
|
|
case 119 : itype = IQ2000BF_INSN_PKRLR1;goto extract_sfmt_syscall;
|
542 |
|
|
case 120 : /* fall through */
|
543 |
|
|
case 121 : /* fall through */
|
544 |
|
|
case 122 : /* fall through */
|
545 |
|
|
case 123 : itype = IQ2000BF_INSN_RXR30;goto extract_sfmt_syscall;
|
546 |
|
|
case 124 : /* fall through */
|
547 |
|
|
case 125 : /* fall through */
|
548 |
|
|
case 126 : /* fall through */
|
549 |
|
|
case 127 : itype = IQ2000BF_INSN_PKRLR30;goto extract_sfmt_syscall;
|
550 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
551 |
|
|
}
|
552 |
|
|
}
|
553 |
|
|
case 20 : itype = IQ2000BF_INSN_BEQL;goto extract_sfmt_bbv;
|
554 |
|
|
case 21 : itype = IQ2000BF_INSN_BNEL;goto extract_sfmt_bbv;
|
555 |
|
|
case 22 : itype = IQ2000BF_INSN_BLEZL;goto extract_sfmt_bgez;
|
556 |
|
|
case 23 : itype = IQ2000BF_INSN_BGTZL;goto extract_sfmt_bgez;
|
557 |
|
|
case 24 : itype = IQ2000BF_INSN_BMB0;goto extract_sfmt_bbv;
|
558 |
|
|
case 25 : itype = IQ2000BF_INSN_BMB1;goto extract_sfmt_bbv;
|
559 |
|
|
case 26 : itype = IQ2000BF_INSN_BMB2;goto extract_sfmt_bbv;
|
560 |
|
|
case 27 : itype = IQ2000BF_INSN_BMB3;goto extract_sfmt_bbv;
|
561 |
|
|
case 28 : itype = IQ2000BF_INSN_BBI;goto extract_sfmt_bbi;
|
562 |
|
|
case 29 : itype = IQ2000BF_INSN_BBV;goto extract_sfmt_bbv;
|
563 |
|
|
case 30 : itype = IQ2000BF_INSN_BBIN;goto extract_sfmt_bbi;
|
564 |
|
|
case 31 : itype = IQ2000BF_INSN_BBVN;goto extract_sfmt_bbv;
|
565 |
|
|
case 32 : itype = IQ2000BF_INSN_LB;goto extract_sfmt_lb;
|
566 |
|
|
case 33 : itype = IQ2000BF_INSN_LH;goto extract_sfmt_lh;
|
567 |
|
|
case 35 : itype = IQ2000BF_INSN_LW;goto extract_sfmt_lw;
|
568 |
|
|
case 36 : itype = IQ2000BF_INSN_LBU;goto extract_sfmt_lb;
|
569 |
|
|
case 37 : itype = IQ2000BF_INSN_LHU;goto extract_sfmt_lh;
|
570 |
|
|
case 39 : itype = IQ2000BF_INSN_RAM;goto extract_sfmt_ram;
|
571 |
|
|
case 40 : itype = IQ2000BF_INSN_SB;goto extract_sfmt_sb;
|
572 |
|
|
case 41 : itype = IQ2000BF_INSN_SH;goto extract_sfmt_sh;
|
573 |
|
|
case 43 : itype = IQ2000BF_INSN_SW;goto extract_sfmt_sw;
|
574 |
|
|
case 44 : itype = IQ2000BF_INSN_ANDOI;goto extract_sfmt_addi;
|
575 |
|
|
case 45 : itype = IQ2000BF_INSN_BMB;goto extract_sfmt_bbv;
|
576 |
|
|
case 47 : itype = IQ2000BF_INSN_ORUI;goto extract_sfmt_andoui;
|
577 |
|
|
case 48 : itype = IQ2000BF_INSN_LDW;goto extract_sfmt_ldw;
|
578 |
|
|
case 56 : itype = IQ2000BF_INSN_SDW;goto extract_sfmt_sdw;
|
579 |
|
|
case 63 : itype = IQ2000BF_INSN_ANDOUI;goto extract_sfmt_andoui;
|
580 |
|
|
default : itype = IQ2000BF_INSN_X_INVALID; goto extract_sfmt_empty;
|
581 |
|
|
}
|
582 |
|
|
}
|
583 |
|
|
}
|
584 |
|
|
|
585 |
|
|
/* The instruction has been decoded, now extract the fields. */
|
586 |
|
|
|
587 |
|
|
extract_sfmt_empty:
|
588 |
|
|
{
|
589 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
590 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
591 |
|
|
|
592 |
|
|
|
593 |
|
|
/* Record the fields for the semantic handler. */
|
594 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
|
595 |
|
|
|
596 |
|
|
#undef FLD
|
597 |
|
|
return idesc;
|
598 |
|
|
}
|
599 |
|
|
|
600 |
|
|
extract_sfmt_add:
|
601 |
|
|
{
|
602 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
603 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
604 |
|
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
605 |
|
|
UINT f_rs;
|
606 |
|
|
UINT f_rt;
|
607 |
|
|
UINT f_rd;
|
608 |
|
|
|
609 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
610 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
611 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
612 |
|
|
|
613 |
|
|
/* Record the fields for the semantic handler. */
|
614 |
|
|
FLD (f_rs) = f_rs;
|
615 |
|
|
FLD (f_rt) = f_rt;
|
616 |
|
|
FLD (f_rd) = f_rd;
|
617 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
618 |
|
|
|
619 |
|
|
#undef FLD
|
620 |
|
|
return idesc;
|
621 |
|
|
}
|
622 |
|
|
|
623 |
|
|
extract_sfmt_addi:
|
624 |
|
|
{
|
625 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
626 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
627 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
628 |
|
|
UINT f_rs;
|
629 |
|
|
UINT f_rt;
|
630 |
|
|
UINT f_imm;
|
631 |
|
|
|
632 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
633 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
634 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
635 |
|
|
|
636 |
|
|
/* Record the fields for the semantic handler. */
|
637 |
|
|
FLD (f_imm) = f_imm;
|
638 |
|
|
FLD (f_rs) = f_rs;
|
639 |
|
|
FLD (f_rt) = f_rt;
|
640 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_imm 0x%x", 'x', f_imm, "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
641 |
|
|
|
642 |
|
|
#undef FLD
|
643 |
|
|
return idesc;
|
644 |
|
|
}
|
645 |
|
|
|
646 |
|
|
extract_sfmt_ado16:
|
647 |
|
|
{
|
648 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
649 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
650 |
|
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
651 |
|
|
UINT f_rs;
|
652 |
|
|
UINT f_rt;
|
653 |
|
|
UINT f_rd;
|
654 |
|
|
|
655 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
656 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
657 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
658 |
|
|
|
659 |
|
|
/* Record the fields for the semantic handler. */
|
660 |
|
|
FLD (f_rs) = f_rs;
|
661 |
|
|
FLD (f_rt) = f_rt;
|
662 |
|
|
FLD (f_rd) = f_rd;
|
663 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ado16", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
664 |
|
|
|
665 |
|
|
#undef FLD
|
666 |
|
|
return idesc;
|
667 |
|
|
}
|
668 |
|
|
|
669 |
|
|
extract_sfmt_ram:
|
670 |
|
|
{
|
671 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
672 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
673 |
|
|
#define FLD(f) abuf->fields.sfmt_ram.f
|
674 |
|
|
UINT f_rs;
|
675 |
|
|
UINT f_rt;
|
676 |
|
|
UINT f_rd;
|
677 |
|
|
UINT f_shamt;
|
678 |
|
|
UINT f_maskl;
|
679 |
|
|
|
680 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
681 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
682 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
683 |
|
|
f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5);
|
684 |
|
|
f_maskl = EXTRACT_LSB0_UINT (insn, 32, 4, 5);
|
685 |
|
|
|
686 |
|
|
/* Record the fields for the semantic handler. */
|
687 |
|
|
FLD (f_maskl) = f_maskl;
|
688 |
|
|
FLD (f_rs) = f_rs;
|
689 |
|
|
FLD (f_rd) = f_rd;
|
690 |
|
|
FLD (f_rt) = f_rt;
|
691 |
|
|
FLD (f_shamt) = f_shamt;
|
692 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ram", "f_maskl 0x%x", 'x', f_maskl, "f_rs 0x%x", 'x', f_rs, "f_rd 0x%x", 'x', f_rd, "f_rt 0x%x", 'x', f_rt, "f_shamt 0x%x", 'x', f_shamt, (char *) 0));
|
693 |
|
|
|
694 |
|
|
#undef FLD
|
695 |
|
|
return idesc;
|
696 |
|
|
}
|
697 |
|
|
|
698 |
|
|
extract_sfmt_sll:
|
699 |
|
|
{
|
700 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
701 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
702 |
|
|
#define FLD(f) abuf->fields.sfmt_ram.f
|
703 |
|
|
UINT f_rt;
|
704 |
|
|
UINT f_rd;
|
705 |
|
|
UINT f_shamt;
|
706 |
|
|
|
707 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
708 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
709 |
|
|
f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5);
|
710 |
|
|
|
711 |
|
|
/* Record the fields for the semantic handler. */
|
712 |
|
|
FLD (f_rt) = f_rt;
|
713 |
|
|
FLD (f_shamt) = f_shamt;
|
714 |
|
|
FLD (f_rd) = f_rd;
|
715 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll", "f_rt 0x%x", 'x', f_rt, "f_shamt 0x%x", 'x', f_shamt, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
716 |
|
|
|
717 |
|
|
#undef FLD
|
718 |
|
|
return idesc;
|
719 |
|
|
}
|
720 |
|
|
|
721 |
|
|
extract_sfmt_slmv:
|
722 |
|
|
{
|
723 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
724 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
725 |
|
|
#define FLD(f) abuf->fields.sfmt_ram.f
|
726 |
|
|
UINT f_rs;
|
727 |
|
|
UINT f_rt;
|
728 |
|
|
UINT f_rd;
|
729 |
|
|
UINT f_shamt;
|
730 |
|
|
|
731 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
732 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
733 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
734 |
|
|
f_shamt = EXTRACT_LSB0_UINT (insn, 32, 10, 5);
|
735 |
|
|
|
736 |
|
|
/* Record the fields for the semantic handler. */
|
737 |
|
|
FLD (f_rs) = f_rs;
|
738 |
|
|
FLD (f_rt) = f_rt;
|
739 |
|
|
FLD (f_shamt) = f_shamt;
|
740 |
|
|
FLD (f_rd) = f_rd;
|
741 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slmv", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_shamt 0x%x", 'x', f_shamt, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
742 |
|
|
|
743 |
|
|
#undef FLD
|
744 |
|
|
return idesc;
|
745 |
|
|
}
|
746 |
|
|
|
747 |
|
|
extract_sfmt_slt:
|
748 |
|
|
{
|
749 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
750 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
751 |
|
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
752 |
|
|
UINT f_rs;
|
753 |
|
|
UINT f_rt;
|
754 |
|
|
UINT f_rd;
|
755 |
|
|
|
756 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
757 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
758 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
759 |
|
|
|
760 |
|
|
/* Record the fields for the semantic handler. */
|
761 |
|
|
FLD (f_rs) = f_rs;
|
762 |
|
|
FLD (f_rt) = f_rt;
|
763 |
|
|
FLD (f_rd) = f_rd;
|
764 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slt", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
765 |
|
|
|
766 |
|
|
#undef FLD
|
767 |
|
|
return idesc;
|
768 |
|
|
}
|
769 |
|
|
|
770 |
|
|
extract_sfmt_slti:
|
771 |
|
|
{
|
772 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
773 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
774 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
775 |
|
|
UINT f_rs;
|
776 |
|
|
UINT f_rt;
|
777 |
|
|
UINT f_imm;
|
778 |
|
|
|
779 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
780 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
781 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
782 |
|
|
|
783 |
|
|
/* Record the fields for the semantic handler. */
|
784 |
|
|
FLD (f_imm) = f_imm;
|
785 |
|
|
FLD (f_rs) = f_rs;
|
786 |
|
|
FLD (f_rt) = f_rt;
|
787 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slti", "f_imm 0x%x", 'x', f_imm, "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
788 |
|
|
|
789 |
|
|
#undef FLD
|
790 |
|
|
return idesc;
|
791 |
|
|
}
|
792 |
|
|
|
793 |
|
|
extract_sfmt_bbi:
|
794 |
|
|
{
|
795 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
796 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
797 |
|
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
798 |
|
|
UINT f_rs;
|
799 |
|
|
UINT f_rt;
|
800 |
|
|
SI f_offset;
|
801 |
|
|
|
802 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
803 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
804 |
|
|
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
|
805 |
|
|
|
806 |
|
|
/* Record the fields for the semantic handler. */
|
807 |
|
|
FLD (f_rt) = f_rt;
|
808 |
|
|
FLD (f_rs) = f_rs;
|
809 |
|
|
FLD (i_offset) = f_offset;
|
810 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbi", "f_rt 0x%x", 'x', f_rt, "f_rs 0x%x", 'x', f_rs, "offset 0x%x", 'x', f_offset, (char *) 0));
|
811 |
|
|
|
812 |
|
|
#if WITH_PROFILE_MODEL_P
|
813 |
|
|
/* Record the fields for profiling. */
|
814 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
815 |
|
|
{
|
816 |
|
|
}
|
817 |
|
|
#endif
|
818 |
|
|
#undef FLD
|
819 |
|
|
return idesc;
|
820 |
|
|
}
|
821 |
|
|
|
822 |
|
|
extract_sfmt_bbv:
|
823 |
|
|
{
|
824 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
825 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
826 |
|
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
827 |
|
|
UINT f_rs;
|
828 |
|
|
UINT f_rt;
|
829 |
|
|
SI f_offset;
|
830 |
|
|
|
831 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
832 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
833 |
|
|
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
|
834 |
|
|
|
835 |
|
|
/* Record the fields for the semantic handler. */
|
836 |
|
|
FLD (f_rs) = f_rs;
|
837 |
|
|
FLD (f_rt) = f_rt;
|
838 |
|
|
FLD (i_offset) = f_offset;
|
839 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbv", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "offset 0x%x", 'x', f_offset, (char *) 0));
|
840 |
|
|
|
841 |
|
|
#if WITH_PROFILE_MODEL_P
|
842 |
|
|
/* Record the fields for profiling. */
|
843 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
844 |
|
|
{
|
845 |
|
|
}
|
846 |
|
|
#endif
|
847 |
|
|
#undef FLD
|
848 |
|
|
return idesc;
|
849 |
|
|
}
|
850 |
|
|
|
851 |
|
|
extract_sfmt_bgez:
|
852 |
|
|
{
|
853 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
854 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
855 |
|
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
856 |
|
|
UINT f_rs;
|
857 |
|
|
SI f_offset;
|
858 |
|
|
|
859 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
860 |
|
|
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
|
861 |
|
|
|
862 |
|
|
/* Record the fields for the semantic handler. */
|
863 |
|
|
FLD (f_rs) = f_rs;
|
864 |
|
|
FLD (i_offset) = f_offset;
|
865 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bgez", "f_rs 0x%x", 'x', f_rs, "offset 0x%x", 'x', f_offset, (char *) 0));
|
866 |
|
|
|
867 |
|
|
#if WITH_PROFILE_MODEL_P
|
868 |
|
|
/* Record the fields for profiling. */
|
869 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
870 |
|
|
{
|
871 |
|
|
}
|
872 |
|
|
#endif
|
873 |
|
|
#undef FLD
|
874 |
|
|
return idesc;
|
875 |
|
|
}
|
876 |
|
|
|
877 |
|
|
extract_sfmt_bgezal:
|
878 |
|
|
{
|
879 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
880 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
881 |
|
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
882 |
|
|
UINT f_rs;
|
883 |
|
|
SI f_offset;
|
884 |
|
|
|
885 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
886 |
|
|
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
|
887 |
|
|
|
888 |
|
|
/* Record the fields for the semantic handler. */
|
889 |
|
|
FLD (f_rs) = f_rs;
|
890 |
|
|
FLD (i_offset) = f_offset;
|
891 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bgezal", "f_rs 0x%x", 'x', f_rs, "offset 0x%x", 'x', f_offset, (char *) 0));
|
892 |
|
|
|
893 |
|
|
#if WITH_PROFILE_MODEL_P
|
894 |
|
|
/* Record the fields for profiling. */
|
895 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
896 |
|
|
{
|
897 |
|
|
}
|
898 |
|
|
#endif
|
899 |
|
|
#undef FLD
|
900 |
|
|
return idesc;
|
901 |
|
|
}
|
902 |
|
|
|
903 |
|
|
extract_sfmt_jalr:
|
904 |
|
|
{
|
905 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
906 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
907 |
|
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
908 |
|
|
UINT f_rs;
|
909 |
|
|
UINT f_rd;
|
910 |
|
|
|
911 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
912 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
913 |
|
|
|
914 |
|
|
/* Record the fields for the semantic handler. */
|
915 |
|
|
FLD (f_rs) = f_rs;
|
916 |
|
|
FLD (f_rd) = f_rd;
|
917 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jalr", "f_rs 0x%x", 'x', f_rs, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
918 |
|
|
|
919 |
|
|
#if WITH_PROFILE_MODEL_P
|
920 |
|
|
/* Record the fields for profiling. */
|
921 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
922 |
|
|
{
|
923 |
|
|
}
|
924 |
|
|
#endif
|
925 |
|
|
#undef FLD
|
926 |
|
|
return idesc;
|
927 |
|
|
}
|
928 |
|
|
|
929 |
|
|
extract_sfmt_jr:
|
930 |
|
|
{
|
931 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
932 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
933 |
|
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
934 |
|
|
UINT f_rs;
|
935 |
|
|
|
936 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
937 |
|
|
|
938 |
|
|
/* Record the fields for the semantic handler. */
|
939 |
|
|
FLD (f_rs) = f_rs;
|
940 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jr", "f_rs 0x%x", 'x', f_rs, (char *) 0));
|
941 |
|
|
|
942 |
|
|
#if WITH_PROFILE_MODEL_P
|
943 |
|
|
/* Record the fields for profiling. */
|
944 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
945 |
|
|
{
|
946 |
|
|
}
|
947 |
|
|
#endif
|
948 |
|
|
#undef FLD
|
949 |
|
|
return idesc;
|
950 |
|
|
}
|
951 |
|
|
|
952 |
|
|
extract_sfmt_lb:
|
953 |
|
|
{
|
954 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
955 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
956 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
957 |
|
|
UINT f_rs;
|
958 |
|
|
UINT f_rt;
|
959 |
|
|
UINT f_imm;
|
960 |
|
|
|
961 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
962 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
963 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
964 |
|
|
|
965 |
|
|
/* Record the fields for the semantic handler. */
|
966 |
|
|
FLD (f_rs) = f_rs;
|
967 |
|
|
FLD (f_imm) = f_imm;
|
968 |
|
|
FLD (f_rt) = f_rt;
|
969 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lb", "f_rs 0x%x", 'x', f_rs, "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
970 |
|
|
|
971 |
|
|
#undef FLD
|
972 |
|
|
return idesc;
|
973 |
|
|
}
|
974 |
|
|
|
975 |
|
|
extract_sfmt_lh:
|
976 |
|
|
{
|
977 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
978 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
979 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
980 |
|
|
UINT f_rs;
|
981 |
|
|
UINT f_rt;
|
982 |
|
|
UINT f_imm;
|
983 |
|
|
|
984 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
985 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
986 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
987 |
|
|
|
988 |
|
|
/* Record the fields for the semantic handler. */
|
989 |
|
|
FLD (f_rs) = f_rs;
|
990 |
|
|
FLD (f_imm) = f_imm;
|
991 |
|
|
FLD (f_rt) = f_rt;
|
992 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lh", "f_rs 0x%x", 'x', f_rs, "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
993 |
|
|
|
994 |
|
|
#undef FLD
|
995 |
|
|
return idesc;
|
996 |
|
|
}
|
997 |
|
|
|
998 |
|
|
extract_sfmt_lui:
|
999 |
|
|
{
|
1000 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1001 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1002 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1003 |
|
|
UINT f_rt;
|
1004 |
|
|
UINT f_imm;
|
1005 |
|
|
|
1006 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1007 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1008 |
|
|
|
1009 |
|
|
/* Record the fields for the semantic handler. */
|
1010 |
|
|
FLD (f_imm) = f_imm;
|
1011 |
|
|
FLD (f_rt) = f_rt;
|
1012 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lui", "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
1013 |
|
|
|
1014 |
|
|
#undef FLD
|
1015 |
|
|
return idesc;
|
1016 |
|
|
}
|
1017 |
|
|
|
1018 |
|
|
extract_sfmt_lw:
|
1019 |
|
|
{
|
1020 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1021 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1022 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1023 |
|
|
UINT f_rs;
|
1024 |
|
|
UINT f_rt;
|
1025 |
|
|
UINT f_imm;
|
1026 |
|
|
|
1027 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1028 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1029 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1030 |
|
|
|
1031 |
|
|
/* Record the fields for the semantic handler. */
|
1032 |
|
|
FLD (f_rs) = f_rs;
|
1033 |
|
|
FLD (f_imm) = f_imm;
|
1034 |
|
|
FLD (f_rt) = f_rt;
|
1035 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lw", "f_rs 0x%x", 'x', f_rs, "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
1036 |
|
|
|
1037 |
|
|
#undef FLD
|
1038 |
|
|
return idesc;
|
1039 |
|
|
}
|
1040 |
|
|
|
1041 |
|
|
extract_sfmt_sb:
|
1042 |
|
|
{
|
1043 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1044 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1045 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1046 |
|
|
UINT f_rs;
|
1047 |
|
|
UINT f_rt;
|
1048 |
|
|
UINT f_imm;
|
1049 |
|
|
|
1050 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1051 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1052 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1053 |
|
|
|
1054 |
|
|
/* Record the fields for the semantic handler. */
|
1055 |
|
|
FLD (f_rs) = f_rs;
|
1056 |
|
|
FLD (f_imm) = f_imm;
|
1057 |
|
|
FLD (f_rt) = f_rt;
|
1058 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sb", "f_rs 0x%x", 'x', f_rs, "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
1059 |
|
|
|
1060 |
|
|
#undef FLD
|
1061 |
|
|
return idesc;
|
1062 |
|
|
}
|
1063 |
|
|
|
1064 |
|
|
extract_sfmt_sh:
|
1065 |
|
|
{
|
1066 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1067 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1068 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1069 |
|
|
UINT f_rs;
|
1070 |
|
|
UINT f_rt;
|
1071 |
|
|
UINT f_imm;
|
1072 |
|
|
|
1073 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1074 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1075 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1076 |
|
|
|
1077 |
|
|
/* Record the fields for the semantic handler. */
|
1078 |
|
|
FLD (f_rs) = f_rs;
|
1079 |
|
|
FLD (f_imm) = f_imm;
|
1080 |
|
|
FLD (f_rt) = f_rt;
|
1081 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sh", "f_rs 0x%x", 'x', f_rs, "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
1082 |
|
|
|
1083 |
|
|
#undef FLD
|
1084 |
|
|
return idesc;
|
1085 |
|
|
}
|
1086 |
|
|
|
1087 |
|
|
extract_sfmt_sw:
|
1088 |
|
|
{
|
1089 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1090 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1091 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1092 |
|
|
UINT f_rs;
|
1093 |
|
|
UINT f_rt;
|
1094 |
|
|
UINT f_imm;
|
1095 |
|
|
|
1096 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1097 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1098 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1099 |
|
|
|
1100 |
|
|
/* Record the fields for the semantic handler. */
|
1101 |
|
|
FLD (f_rs) = f_rs;
|
1102 |
|
|
FLD (f_imm) = f_imm;
|
1103 |
|
|
FLD (f_rt) = f_rt;
|
1104 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sw", "f_rs 0x%x", 'x', f_rs, "f_imm 0x%x", 'x', f_imm, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
1105 |
|
|
|
1106 |
|
|
#undef FLD
|
1107 |
|
|
return idesc;
|
1108 |
|
|
}
|
1109 |
|
|
|
1110 |
|
|
extract_sfmt_break:
|
1111 |
|
|
{
|
1112 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1113 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
1114 |
|
|
|
1115 |
|
|
|
1116 |
|
|
/* Record the fields for the semantic handler. */
|
1117 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_break", (char *) 0));
|
1118 |
|
|
|
1119 |
|
|
#if WITH_PROFILE_MODEL_P
|
1120 |
|
|
/* Record the fields for profiling. */
|
1121 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
1122 |
|
|
{
|
1123 |
|
|
}
|
1124 |
|
|
#endif
|
1125 |
|
|
#undef FLD
|
1126 |
|
|
return idesc;
|
1127 |
|
|
}
|
1128 |
|
|
|
1129 |
|
|
extract_sfmt_syscall:
|
1130 |
|
|
{
|
1131 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1132 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
1133 |
|
|
|
1134 |
|
|
|
1135 |
|
|
/* Record the fields for the semantic handler. */
|
1136 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_syscall", (char *) 0));
|
1137 |
|
|
|
1138 |
|
|
#undef FLD
|
1139 |
|
|
return idesc;
|
1140 |
|
|
}
|
1141 |
|
|
|
1142 |
|
|
extract_sfmt_andoui:
|
1143 |
|
|
{
|
1144 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1145 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1146 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1147 |
|
|
UINT f_rs;
|
1148 |
|
|
UINT f_rt;
|
1149 |
|
|
UINT f_imm;
|
1150 |
|
|
|
1151 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1152 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1153 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1154 |
|
|
|
1155 |
|
|
/* Record the fields for the semantic handler. */
|
1156 |
|
|
FLD (f_imm) = f_imm;
|
1157 |
|
|
FLD (f_rs) = f_rs;
|
1158 |
|
|
FLD (f_rt) = f_rt;
|
1159 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andoui", "f_imm 0x%x", 'x', f_imm, "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, (char *) 0));
|
1160 |
|
|
|
1161 |
|
|
#undef FLD
|
1162 |
|
|
return idesc;
|
1163 |
|
|
}
|
1164 |
|
|
|
1165 |
|
|
extract_sfmt_mrgb:
|
1166 |
|
|
{
|
1167 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1168 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1169 |
|
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
1170 |
|
|
UINT f_rs;
|
1171 |
|
|
UINT f_rt;
|
1172 |
|
|
UINT f_rd;
|
1173 |
|
|
UINT f_mask;
|
1174 |
|
|
|
1175 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1176 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1177 |
|
|
f_rd = EXTRACT_LSB0_UINT (insn, 32, 15, 5);
|
1178 |
|
|
f_mask = EXTRACT_LSB0_UINT (insn, 32, 9, 4);
|
1179 |
|
|
|
1180 |
|
|
/* Record the fields for the semantic handler. */
|
1181 |
|
|
FLD (f_mask) = f_mask;
|
1182 |
|
|
FLD (f_rs) = f_rs;
|
1183 |
|
|
FLD (f_rt) = f_rt;
|
1184 |
|
|
FLD (f_rd) = f_rd;
|
1185 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mrgb", "f_mask 0x%x", 'x', f_mask, "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_rd 0x%x", 'x', f_rd, (char *) 0));
|
1186 |
|
|
|
1187 |
|
|
#undef FLD
|
1188 |
|
|
return idesc;
|
1189 |
|
|
}
|
1190 |
|
|
|
1191 |
|
|
extract_sfmt_bctxt:
|
1192 |
|
|
{
|
1193 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1194 |
|
|
#define FLD(f) abuf->fields.fmt_empty.f
|
1195 |
|
|
|
1196 |
|
|
|
1197 |
|
|
/* Record the fields for the semantic handler. */
|
1198 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bctxt", (char *) 0));
|
1199 |
|
|
|
1200 |
|
|
#undef FLD
|
1201 |
|
|
return idesc;
|
1202 |
|
|
}
|
1203 |
|
|
|
1204 |
|
|
extract_sfmt_ldw:
|
1205 |
|
|
{
|
1206 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1207 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1208 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1209 |
|
|
UINT f_rs;
|
1210 |
|
|
UINT f_rt;
|
1211 |
|
|
UINT f_imm;
|
1212 |
|
|
|
1213 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1214 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1215 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1216 |
|
|
|
1217 |
|
|
/* Record the fields for the semantic handler. */
|
1218 |
|
|
FLD (f_rs) = f_rs;
|
1219 |
|
|
FLD (f_rt) = f_rt;
|
1220 |
|
|
FLD (f_imm) = f_imm;
|
1221 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldw", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_imm 0x%x", 'x', f_imm, (char *) 0));
|
1222 |
|
|
|
1223 |
|
|
#undef FLD
|
1224 |
|
|
return idesc;
|
1225 |
|
|
}
|
1226 |
|
|
|
1227 |
|
|
extract_sfmt_sdw:
|
1228 |
|
|
{
|
1229 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1230 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1231 |
|
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
1232 |
|
|
UINT f_rs;
|
1233 |
|
|
UINT f_rt;
|
1234 |
|
|
UINT f_imm;
|
1235 |
|
|
|
1236 |
|
|
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
|
1237 |
|
|
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
|
1238 |
|
|
f_imm = EXTRACT_LSB0_UINT (insn, 32, 15, 16);
|
1239 |
|
|
|
1240 |
|
|
/* Record the fields for the semantic handler. */
|
1241 |
|
|
FLD (f_rs) = f_rs;
|
1242 |
|
|
FLD (f_rt) = f_rt;
|
1243 |
|
|
FLD (f_imm) = f_imm;
|
1244 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sdw", "f_rs 0x%x", 'x', f_rs, "f_rt 0x%x", 'x', f_rt, "f_imm 0x%x", 'x', f_imm, (char *) 0));
|
1245 |
|
|
|
1246 |
|
|
#undef FLD
|
1247 |
|
|
return idesc;
|
1248 |
|
|
}
|
1249 |
|
|
|
1250 |
|
|
extract_sfmt_j:
|
1251 |
|
|
{
|
1252 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1253 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1254 |
|
|
#define FLD(f) abuf->fields.sfmt_j.f
|
1255 |
|
|
USI f_jtarg;
|
1256 |
|
|
|
1257 |
|
|
f_jtarg = ((((pc) & (0xf0000000))) | (((EXTRACT_LSB0_UINT (insn, 32, 15, 16)) << (2))));
|
1258 |
|
|
|
1259 |
|
|
/* Record the fields for the semantic handler. */
|
1260 |
|
|
FLD (i_jmptarg) = f_jtarg;
|
1261 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_j", "jmptarg 0x%x", 'x', f_jtarg, (char *) 0));
|
1262 |
|
|
|
1263 |
|
|
#if WITH_PROFILE_MODEL_P
|
1264 |
|
|
/* Record the fields for profiling. */
|
1265 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
1266 |
|
|
{
|
1267 |
|
|
}
|
1268 |
|
|
#endif
|
1269 |
|
|
#undef FLD
|
1270 |
|
|
return idesc;
|
1271 |
|
|
}
|
1272 |
|
|
|
1273 |
|
|
extract_sfmt_jal:
|
1274 |
|
|
{
|
1275 |
|
|
const IDESC *idesc = &iq2000bf_insn_data[itype];
|
1276 |
|
|
CGEN_INSN_INT insn = entire_insn;
|
1277 |
|
|
#define FLD(f) abuf->fields.sfmt_j.f
|
1278 |
|
|
USI f_jtarg;
|
1279 |
|
|
|
1280 |
|
|
f_jtarg = ((((pc) & (0xf0000000))) | (((EXTRACT_LSB0_UINT (insn, 32, 15, 16)) << (2))));
|
1281 |
|
|
|
1282 |
|
|
/* Record the fields for the semantic handler. */
|
1283 |
|
|
FLD (i_jmptarg) = f_jtarg;
|
1284 |
|
|
TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jal", "jmptarg 0x%x", 'x', f_jtarg, (char *) 0));
|
1285 |
|
|
|
1286 |
|
|
#if WITH_PROFILE_MODEL_P
|
1287 |
|
|
/* Record the fields for profiling. */
|
1288 |
|
|
if (PROFILE_MODEL_P (current_cpu))
|
1289 |
|
|
{
|
1290 |
|
|
}
|
1291 |
|
|
#endif
|
1292 |
|
|
#undef FLD
|
1293 |
|
|
return idesc;
|
1294 |
|
|
}
|
1295 |
|
|
|
1296 |
|
|
}
|