1 |
26 |
jlechner |
dnl Process this file with autoconf to produce a configure script.
|
2 |
|
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AC_PREREQ(2.59)dnl
|
3 |
|
|
AC_INIT(Makefile.in)
|
4 |
|
|
AC_CONFIG_HEADER(config.h:config.in)
|
5 |
|
|
|
6 |
|
|
sinclude(../common/aclocal.m4)
|
7 |
|
|
|
8 |
|
|
# Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
|
9 |
|
|
# it by inlining the macro's contents.
|
10 |
|
|
sinclude(../common/common.m4)
|
11 |
|
|
|
12 |
|
|
dnl Options available in this module
|
13 |
|
|
SIM_AC_OPTION_INLINE()
|
14 |
|
|
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
|
15 |
|
|
SIM_AC_OPTION_HOSTENDIAN
|
16 |
|
|
SIM_AC_OPTION_WARNINGS
|
17 |
|
|
SIM_AC_OPTION_RESERVED_BITS(1)
|
18 |
|
|
|
19 |
|
|
# DEPRECATED
|
20 |
|
|
#
|
21 |
|
|
# Instead of defining a `subtarget' macro, code should be checking
|
22 |
|
|
# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
|
23 |
|
|
# in question.
|
24 |
|
|
#
|
25 |
|
|
case "${target}" in
|
26 |
|
|
mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
|
27 |
|
|
mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
|
28 |
|
|
mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
|
29 |
|
|
mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
|
30 |
|
|
mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
|
31 |
|
|
*) SIM_SUBTARGET="";;
|
32 |
|
|
esac
|
33 |
|
|
AC_SUBST(SIM_SUBTARGET)
|
34 |
|
|
|
35 |
|
|
|
36 |
|
|
|
37 |
|
|
#
|
38 |
|
|
# Select the byte order of the target
|
39 |
|
|
#
|
40 |
|
|
mips_endian=
|
41 |
|
|
default_endian=
|
42 |
|
|
case "${target}" in
|
43 |
|
|
mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
|
44 |
|
|
mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
|
45 |
|
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mips64*-*-*) default_endian=BIG_ENDIAN ;;
|
46 |
|
|
mips16*-*-*) default_endian=BIG_ENDIAN ;;
|
47 |
|
|
mipsisa32*-*-*) default_endian=BIG_ENDIAN ;;
|
48 |
|
|
mipsisa64*-*-*) default_endian=BIG_ENDIAN ;;
|
49 |
|
|
mips*-*-*) default_endian=BIG_ENDIAN ;;
|
50 |
|
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*) default_endian=BIG_ENDIAN ;;
|
51 |
|
|
esac
|
52 |
|
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SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
|
53 |
|
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|
54 |
|
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|
55 |
|
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|
56 |
|
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#
|
57 |
|
|
# Select the bitsize of the target
|
58 |
|
|
#
|
59 |
|
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mips_addr_bitsize=
|
60 |
|
|
case "${target}" in
|
61 |
|
|
mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;;
|
62 |
|
|
mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
63 |
|
|
mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
64 |
|
|
mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
|
65 |
|
|
mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
|
66 |
|
|
mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
|
67 |
|
|
*) mips_bitsize=64 ; mips_msb=63 ;;
|
68 |
|
|
esac
|
69 |
|
|
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
|
70 |
|
|
|
71 |
|
|
|
72 |
|
|
|
73 |
|
|
#
|
74 |
|
|
# Select the floating hardware support of the target
|
75 |
|
|
#
|
76 |
|
|
mips_fpu=HARDWARE_FLOATING_POINT
|
77 |
|
|
mips_fpu_bitsize=
|
78 |
|
|
case "${target}" in
|
79 |
|
|
mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
|
80 |
|
|
mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
|
81 |
|
|
mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
82 |
|
|
mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
|
83 |
|
|
mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
|
84 |
|
|
mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
|
85 |
|
|
mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
|
86 |
|
|
*) mips_fpu=HARD_FLOATING_POINT ;;
|
87 |
|
|
esac
|
88 |
|
|
SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
|
89 |
|
|
|
90 |
|
|
|
91 |
|
|
|
92 |
|
|
#
|
93 |
|
|
# Select the level of SMP support
|
94 |
|
|
#
|
95 |
|
|
case "${target}" in
|
96 |
|
|
*) mips_smp=0 ;;
|
97 |
|
|
esac
|
98 |
|
|
SIM_AC_OPTION_SMP($mips_smp)
|
99 |
|
|
|
100 |
|
|
|
101 |
|
|
|
102 |
|
|
#
|
103 |
|
|
# Select the IGEN architecture
|
104 |
|
|
#
|
105 |
|
|
sim_gen=IGEN
|
106 |
|
|
sim_igen_machine="-M mipsIV"
|
107 |
|
|
sim_m16_machine="-M mips16,mipsIII"
|
108 |
|
|
sim_igen_filter="32,64,f"
|
109 |
|
|
sim_m16_filter="16"
|
110 |
|
|
sim_mach_default="mips8000"
|
111 |
|
|
|
112 |
|
|
case "${target}" in
|
113 |
|
|
mips*tx39*) sim_gen=IGEN
|
114 |
|
|
sim_igen_filter="32,f"
|
115 |
|
|
sim_igen_machine="-M r3900"
|
116 |
|
|
;;
|
117 |
|
|
mips64vr43*-*-*) sim_gen=IGEN
|
118 |
|
|
sim_igen_machine="-M mipsIV"
|
119 |
|
|
sim_mach_default="mips8000"
|
120 |
|
|
;;
|
121 |
|
|
mips64vr5*-*-*) sim_gen=IGEN
|
122 |
|
|
sim_igen_machine="-M vr5000"
|
123 |
|
|
sim_mach_default="mips5000"
|
124 |
|
|
;;
|
125 |
|
|
mips64vr41*) sim_gen=M16
|
126 |
|
|
sim_igen_machine="-M vr4100"
|
127 |
|
|
sim_m16_machine="-M vr4100"
|
128 |
|
|
sim_igen_filter="32,64,f"
|
129 |
|
|
sim_m16_filter="16"
|
130 |
|
|
sim_mach_default="mips4100"
|
131 |
|
|
;;
|
132 |
|
|
mips64vr-*-* | mips64vrel-*-*)
|
133 |
|
|
sim_gen=MULTI
|
134 |
|
|
sim_multi_configs="\
|
135 |
|
|
vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
|
136 |
|
|
vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
|
137 |
|
|
vr5000:mipsIV:32,64,f:mips4300,mips5000\
|
138 |
|
|
vr5400:mipsIV,vr5400:32,64,f:mips5400\
|
139 |
|
|
vr5500:mipsIV,vr5500:32,64,f:mips5500"
|
140 |
|
|
sim_multi_default=mips5000
|
141 |
|
|
;;
|
142 |
|
|
mips*-sde-elf*) sim_gen=M16
|
143 |
|
|
sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips"
|
144 |
|
|
sim_m16_machine="-M mips16,mips16e,mips64r2"
|
145 |
|
|
sim_igen_filter="32,64,f"
|
146 |
|
|
sim_mach_default="mipsisa64r2"
|
147 |
|
|
;;
|
148 |
|
|
mips64*-*-*) sim_igen_filter="32,64,f"
|
149 |
|
|
sim_gen=IGEN
|
150 |
|
|
;;
|
151 |
|
|
mips16*-*-*) sim_gen=M16
|
152 |
|
|
sim_igen_filter="32,64,f"
|
153 |
|
|
sim_m16_filter="16"
|
154 |
|
|
;;
|
155 |
|
|
mipsisa32r2*-*-*) sim_gen=M16
|
156 |
|
|
sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,dsp2,smartmips"
|
157 |
|
|
sim_m16_machine="-M mips16,mips16e,mips32r2"
|
158 |
|
|
sim_igen_filter="32,f"
|
159 |
|
|
sim_mach_default="mipsisa32r2"
|
160 |
|
|
;;
|
161 |
|
|
mipsisa32*-*-*) sim_gen=M16
|
162 |
|
|
sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
|
163 |
|
|
sim_m16_machine="-M mips16,mips16e,mips32"
|
164 |
|
|
sim_igen_filter="32,f"
|
165 |
|
|
sim_mach_default="mipsisa32"
|
166 |
|
|
;;
|
167 |
|
|
mipsisa64r2*-*-*) sim_gen=M16
|
168 |
|
|
sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
|
169 |
|
|
sim_m16_machine="-M mips16,mips16e,mips64r2"
|
170 |
|
|
sim_igen_filter="32,64,f"
|
171 |
|
|
sim_mach_default="mipsisa64r2"
|
172 |
|
|
;;
|
173 |
|
|
mipsisa64sb1*-*-*) sim_gen=IGEN
|
174 |
|
|
sim_igen_machine="-M mips64,mips3d,sb1"
|
175 |
|
|
sim_igen_filter="32,64,f"
|
176 |
|
|
sim_mach_default="mips_sb1"
|
177 |
|
|
;;
|
178 |
|
|
mipsisa64*-*-*) sim_gen=M16
|
179 |
|
|
sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
|
180 |
|
|
sim_m16_machine="-M mips16,mips16e,mips64"
|
181 |
|
|
sim_igen_filter="32,64,f"
|
182 |
|
|
sim_mach_default="mipsisa64"
|
183 |
|
|
;;
|
184 |
|
|
mips*lsi*) sim_gen=M16
|
185 |
|
|
sim_igen_machine="-M mipsIII,mips16"
|
186 |
|
|
sim_m16_machine="-M mips16,mipsIII"
|
187 |
|
|
sim_igen_filter="32,f"
|
188 |
|
|
sim_m16_filter="16"
|
189 |
|
|
sim_mach_default="mips4000"
|
190 |
|
|
;;
|
191 |
|
|
mips*-*-*) sim_gen=IGEN
|
192 |
|
|
sim_igen_filter="32,f"
|
193 |
|
|
;;
|
194 |
|
|
esac
|
195 |
|
|
|
196 |
|
|
# The MULTI generator can combine several simulation engines into one.
|
197 |
|
|
# executable. A configuration which uses the MULTI should set two
|
198 |
|
|
# variables: ${sim_multi_configs} and ${sim_multi_default}.
|
199 |
|
|
#
|
200 |
|
|
# ${sim_multi_configs} is the list of engines to build. Each
|
201 |
|
|
# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
|
202 |
|
|
# where:
|
203 |
|
|
#
|
204 |
|
|
# - NAME is a C-compatible prefix for the engine,
|
205 |
|
|
# - MACHINE is a -M argument,
|
206 |
|
|
# - FILTER is a -F argument, and
|
207 |
|
|
# - BFDMACHS is a comma-separated list of bfd machines that the
|
208 |
|
|
# simulator can run.
|
209 |
|
|
#
|
210 |
|
|
# Each entry will have a separate simulation engine whose prefix is
|
211 |
|
|
# m32. If the machine list includes "mips16", there will also
|
212 |
|
|
# be a mips16 engine, prefix m16. The mips16 engine will be
|
213 |
|
|
# generated using the same machine list as the 32-bit version,
|
214 |
|
|
# but the filter will be "16" instead of FILTER.
|
215 |
|
|
#
|
216 |
|
|
# The simulator compares the bfd mach against BFDMACHS to decide
|
217 |
|
|
# which engine to use. Entries in BFDMACHS should be bfd_mach
|
218 |
|
|
# values with "bfd_mach_" removed. ${sim_multi_default} says
|
219 |
|
|
# which entry should be the default.
|
220 |
|
|
if test ${sim_gen} = MULTI; then
|
221 |
|
|
|
222 |
|
|
# Simple sanity check.
|
223 |
|
|
if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
|
224 |
|
|
AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
|
225 |
|
|
fi
|
226 |
|
|
|
227 |
|
|
# Start in a known state.
|
228 |
|
|
rm -f multi-include.h multi-run.c
|
229 |
|
|
sim_multi_flags=
|
230 |
|
|
sim_multi_src=
|
231 |
|
|
sim_multi_obj=multi-run.o
|
232 |
|
|
sim_multi_igen_configs=
|
233 |
|
|
sim_seen_default=no
|
234 |
|
|
|
235 |
|
|
cat << __EOF__ > multi-run.c
|
236 |
|
|
/* Main entry point for MULTI simulators.
|
237 |
|
|
Copyright (C) 2003, 2007 Free Software Foundation, Inc.
|
238 |
|
|
|
239 |
|
|
This program is free software; you can redistribute it and/or modify
|
240 |
|
|
it under the terms of the GNU General Public License as published by
|
241 |
|
|
the Free Software Foundation; either version 3 of the License, or
|
242 |
|
|
(at your option) any later version.
|
243 |
|
|
|
244 |
|
|
This program is distributed in the hope that it will be useful,
|
245 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
246 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
247 |
|
|
GNU General Public License for more details.
|
248 |
|
|
|
249 |
|
|
You should have received a copy of the GNU General Public License
|
250 |
|
|
along with this program. If not, see .
|
251 |
|
|
|
252 |
|
|
--
|
253 |
|
|
|
254 |
|
|
This file was generated by sim/mips/configure. */
|
255 |
|
|
|
256 |
|
|
#include "sim-main.h"
|
257 |
|
|
#include "multi-include.h"
|
258 |
|
|
|
259 |
|
|
#define SD sd
|
260 |
|
|
#define CPU cpu
|
261 |
|
|
|
262 |
|
|
void
|
263 |
|
|
sim_engine_run (SIM_DESC sd,
|
264 |
|
|
int next_cpu_nr,
|
265 |
|
|
int nr_cpus,
|
266 |
|
|
int signal) /* ignore */
|
267 |
|
|
{
|
268 |
|
|
int mach;
|
269 |
|
|
|
270 |
|
|
if (STATE_ARCHITECTURE (sd) == NULL)
|
271 |
|
|
mach = bfd_mach_${sim_multi_default};
|
272 |
|
|
else
|
273 |
|
|
mach = STATE_ARCHITECTURE (SD)->mach;
|
274 |
|
|
|
275 |
|
|
switch (mach)
|
276 |
|
|
{
|
277 |
|
|
__EOF__
|
278 |
|
|
|
279 |
|
|
for fc in ${sim_multi_configs}; do
|
280 |
|
|
|
281 |
|
|
# Split up the entry. ${c} contains the first three elements.
|
282 |
|
|
# Note: outer sqaure brackets are m4 quotes.
|
283 |
|
|
c=`echo ${fc} | sed ['s/:[^:]*$//']`
|
284 |
|
|
bfdmachs=`echo ${fc} | sed 's/.*://'`
|
285 |
|
|
name=`echo ${c} | sed 's/:.*//'`
|
286 |
|
|
machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
|
287 |
|
|
filter=`echo ${c} | sed 's/.*://'`
|
288 |
|
|
|
289 |
|
|
# Build the following lists:
|
290 |
|
|
#
|
291 |
|
|
# sim_multi_flags: all -M and -F flags used by the simulator
|
292 |
|
|
# sim_multi_src: all makefile-generated source files
|
293 |
|
|
# sim_multi_obj: the objects for ${sim_multi_src}
|
294 |
|
|
# sim_multi_igen_configs: igen configuration strings.
|
295 |
|
|
#
|
296 |
|
|
# Each entry in ${sim_multi_igen_configs} is a prefix (m32
|
297 |
|
|
# or m16) followed by the NAME, MACHINE and FILTER part of
|
298 |
|
|
# the ${sim_multi_configs} entry.
|
299 |
|
|
sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
|
300 |
|
|
|
301 |
|
|
# Check whether mips16 handling is needed.
|
302 |
|
|
case ${c} in
|
303 |
|
|
*:*mips16*:*)
|
304 |
|
|
# Run igen twice, once for normal mode and once for mips16.
|
305 |
|
|
ws="m32 m16"
|
306 |
|
|
|
307 |
|
|
# The top-level function for the mips16 simulator is
|
308 |
|
|
# in a file m16${name}_run.c, generated by the
|
309 |
|
|
# tmp-run-multi Makefile rule.
|
310 |
|
|
sim_multi_src="${sim_multi_src} m16${name}_run.c"
|
311 |
|
|
sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
|
312 |
|
|
sim_multi_flags="${sim_multi_flags} -F 16"
|
313 |
|
|
;;
|
314 |
|
|
*)
|
315 |
|
|
ws=m32
|
316 |
|
|
;;
|
317 |
|
|
esac
|
318 |
|
|
|
319 |
|
|
# Now add the list of igen-generated files to ${sim_multi_src}
|
320 |
|
|
# and ${sim_multi_obj}.
|
321 |
|
|
for w in ${ws}; do
|
322 |
|
|
for base in engine icache idecode model semantics support; do
|
323 |
|
|
sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
|
324 |
|
|
sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
|
325 |
|
|
sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
|
326 |
|
|
done
|
327 |
|
|
sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
|
328 |
|
|
done
|
329 |
|
|
|
330 |
|
|
# Add an include for the engine.h file. This file declares the
|
331 |
|
|
# top-level foo_engine_run() function.
|
332 |
|
|
echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
|
333 |
|
|
|
334 |
|
|
# Add case statements for this engine to sim_engine_run().
|
335 |
|
|
for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
|
336 |
|
|
echo " case bfd_mach_${mach}:" >> multi-run.c
|
337 |
|
|
if test ${mach} = ${sim_multi_default}; then
|
338 |
|
|
echo " default:" >> multi-run.c
|
339 |
|
|
sim_seen_default=yes
|
340 |
|
|
fi
|
341 |
|
|
done
|
342 |
|
|
echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
|
343 |
|
|
>> multi-run.c
|
344 |
|
|
echo " break;" >> multi-run.c
|
345 |
|
|
done
|
346 |
|
|
|
347 |
|
|
# Check whether we added a 'default:' label.
|
348 |
|
|
if test ${sim_seen_default} = no; then
|
349 |
|
|
AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
|
350 |
|
|
fi
|
351 |
|
|
|
352 |
|
|
cat << __EOF__ >> multi-run.c
|
353 |
|
|
}
|
354 |
|
|
}
|
355 |
|
|
|
356 |
|
|
int
|
357 |
|
|
mips_mach_multi (SIM_DESC sd)
|
358 |
|
|
{
|
359 |
|
|
if (STATE_ARCHITECTURE (sd) == NULL)
|
360 |
|
|
return bfd_mach_${sim_multi_default};
|
361 |
|
|
|
362 |
|
|
switch (STATE_ARCHITECTURE (SD)->mach)
|
363 |
|
|
{
|
364 |
|
|
__EOF__
|
365 |
|
|
|
366 |
|
|
# Add case statements for this engine to mips_mach_multi().
|
367 |
|
|
for fc in ${sim_multi_configs}; do
|
368 |
|
|
|
369 |
|
|
# Split up the entry. ${c} contains the first three elements.
|
370 |
|
|
# Note: outer sqaure brackets are m4 quotes.
|
371 |
|
|
c=`echo ${fc} | sed ['s/:[^:]*$//']`
|
372 |
|
|
bfdmachs=`echo ${fc} | sed 's/.*://'`
|
373 |
|
|
|
374 |
|
|
for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
|
375 |
|
|
echo " case bfd_mach_${mach}:" >> multi-run.c
|
376 |
|
|
done
|
377 |
|
|
done
|
378 |
|
|
|
379 |
|
|
cat << __EOF__ >> multi-run.c
|
380 |
|
|
return (STATE_ARCHITECTURE (SD)->mach);
|
381 |
|
|
default:
|
382 |
|
|
return bfd_mach_${sim_multi_default};
|
383 |
|
|
}
|
384 |
|
|
}
|
385 |
|
|
__EOF__
|
386 |
|
|
|
387 |
|
|
SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
|
388 |
|
|
else
|
389 |
|
|
# For clean-extra
|
390 |
|
|
sim_multi_src=doesnt-exist.c
|
391 |
|
|
|
392 |
|
|
if test x"${sim_mach_default}" = x""; then
|
393 |
|
|
AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
|
394 |
|
|
fi
|
395 |
|
|
SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
|
396 |
|
|
fi
|
397 |
|
|
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
|
398 |
|
|
sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
|
399 |
|
|
AC_SUBST(sim_igen_flags)
|
400 |
|
|
AC_SUBST(sim_m16_flags)
|
401 |
|
|
AC_SUBST(sim_gen)
|
402 |
|
|
AC_SUBST(sim_multi_flags)
|
403 |
|
|
AC_SUBST(sim_multi_igen_configs)
|
404 |
|
|
AC_SUBST(sim_multi_src)
|
405 |
|
|
AC_SUBST(sim_multi_obj)
|
406 |
|
|
|
407 |
|
|
|
408 |
|
|
#
|
409 |
|
|
# Add simulated hardware devices
|
410 |
|
|
#
|
411 |
|
|
hw_enabled=no
|
412 |
|
|
case "${target}" in
|
413 |
|
|
mips*tx39*)
|
414 |
|
|
hw_enabled=yes
|
415 |
|
|
hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
|
416 |
|
|
mips_extra_objs="dv-sockser.o"
|
417 |
|
|
SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
|
418 |
|
|
;;
|
419 |
|
|
*)
|
420 |
|
|
mips_extra_objs=""
|
421 |
|
|
;;
|
422 |
|
|
esac
|
423 |
|
|
SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
|
424 |
|
|
AC_SUBST(mips_extra_objs)
|
425 |
|
|
|
426 |
|
|
|
427 |
|
|
# Choose simulator engine
|
428 |
|
|
case "${target}" in
|
429 |
|
|
*) mips_igen_engine="engine.o"
|
430 |
|
|
;;
|
431 |
|
|
esac
|
432 |
|
|
AC_SUBST(mips_igen_engine)
|
433 |
|
|
|
434 |
|
|
|
435 |
|
|
AC_PATH_X
|
436 |
|
|
mips_extra_libs=""
|
437 |
|
|
AC_SUBST(mips_extra_libs)
|
438 |
|
|
|
439 |
|
|
AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
|
440 |
|
|
AC_CHECK_LIB(m, fabs)
|
441 |
|
|
AC_CHECK_FUNCS(aint anint sqrt)
|
442 |
|
|
|
443 |
|
|
SIM_AC_OUTPUT
|