URL https://opencores.org/ocsvn/scarts/scarts/trunk

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [bcgelr.cgs] - Blame information for rev 26

Details | Compare with Previous | View Log


# frv testcase for bcgelr $ICCi,$ccond,$hint
# mach: all
 
        .include "testutils.inc"
 
        start
 
        .global bcgelr
bcgelr:
        ; ccond is true
        set_spr_immed   128,lcr
        set_spr_addr    ok1,lr
        set_icc         0x0 0
        bcgelr          icc0,0,0
        fail
ok1:
        set_spr_addr    ok2,lr
        set_icc         0x1 1
        bcgelr          icc1,0,1
        fail
ok2:
        set_spr_addr    bad,lr
        set_icc         0x2 2
        bcgelr          icc2,0,2
 
        set_spr_addr    bad,lr
        set_icc         0x3 3
        bcgelr          icc3,0,3
 
        set_spr_addr    ok5,lr
        set_icc         0x4 0
        bcgelr          icc0,0,0
        fail
ok5:
        set_spr_addr    ok6,lr
        set_icc         0x5 1
        bcgelr          icc1,0,1
        fail
ok6:
        set_spr_addr    bad,lr
        set_icc         0x6 2
        bcgelr          icc2,0,2
 
        set_spr_addr    bad,lr
        set_icc         0x7 3
        bcgelr          icc3,0,3
 
        set_spr_addr    bad,lr
        set_icc         0x8 0
        bcgelr          icc0,0,0
 
        set_spr_addr    bad,lr
        set_icc         0x9 1
        bcgelr          icc1,0,1
 
        set_spr_addr    okb,lr
        set_icc         0xa 2
        bcgelr          icc2,0,2
        fail
okb:
        set_spr_addr    okc,lr
        set_icc         0xb 3
        bcgelr          icc3,0,3
        fail
okc:
        set_spr_addr    bad,lr
        set_icc         0xc 0
        bcgelr          icc0,0,0
 
        set_spr_addr    bad,lr
        set_icc         0xd 1
        bcgelr          icc1,0,1
 
        set_spr_addr    okf,lr
        set_icc         0xe 2
        bcgelr          icc2,0,2
        fail
okf:
        set_spr_addr    okg,lr
        set_icc         0xf 3
        bcgelr          icc3,0,3
        fail
okg:
 
        ; ccond is true
        set_spr_immed   1,lcr
        set_spr_addr    okh,lr
        set_icc         0x0 0
        bcgelr          icc0,1,0
        fail
okh:
        set_spr_immed   1,lcr
        set_spr_addr    oki,lr
        set_icc         0x1 1
        bcgelr          icc1,1,1
        fail
oki:
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x2 2
        bcgelr          icc2,1,2
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x3 3
        bcgelr          icc3,1,3
 
        set_spr_immed   1,lcr
        set_spr_addr    okl,lr
        set_icc         0x4 0
        bcgelr          icc0,1,0
        fail
okl:
        set_spr_immed   1,lcr
        set_spr_addr    okm,lr
        set_icc         0x5 1
        bcgelr          icc1,1,1
        fail
okm:
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x6 2
        bcgelr          icc2,1,2
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x7 3
        bcgelr          icc3,1,3
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x8 0
        bcgelr          icc0,1,0
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x9 1
        bcgelr          icc1,1,1
 
        set_spr_immed   1,lcr
        set_spr_addr    okr,lr
        set_icc         0xa 2
        bcgelr          icc2,1,2
        fail
okr:
        set_spr_immed   1,lcr
        set_spr_addr    oks,lr
        set_icc         0xb 3
        bcgelr          icc3,1,3
        fail
oks:
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0xc 0
        bcgelr          icc0,1,0
 
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0xd 1
        bcgelr          icc1,1,1
 
        set_spr_immed   1,lcr
        set_spr_addr    okv,lr
        set_icc         0xe 2
        bcgelr          icc2,1,2
        fail
okv:
        set_spr_immed   1,lcr
        set_spr_addr    okw,lr
        set_icc         0xf 3
        bcgelr          icc3,1,3
        fail
okw:
        ; ccond is false
        set_spr_immed   128,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcgelr          icc0,1,0
 
        set_icc         0x1 1
        bcgelr          icc1,1,1
 
        set_icc         0x2 2
        bcgelr          icc2,1,2
 
        set_icc         0x3 3
        bcgelr          icc3,1,3
 
        set_icc         0x4 0
        bcgelr          icc0,1,0
 
        set_icc         0x5 1
        bcgelr          icc1,1,1
 
        set_icc         0x6 2
        bcgelr          icc2,1,2
 
        set_icc         0x7 3
        bcgelr          icc3,1,3
 
        set_icc         0x8 0
        bcgelr          icc0,1,0
 
        set_icc         0x9 1
        bcgelr          icc1,1,1
 
        set_icc         0xa 2
        bcgelr          icc2,1,2
 
        set_icc         0xb 3
        bcgelr          icc3,1,3
 
        set_icc         0xc 0
        bcgelr          icc0,1,0
 
        set_icc         0xd 1
        bcgelr          icc1,1,1
 
        set_icc         0xe 2
        bcgelr          icc2,1,2
 
        set_icc         0xf 3
        bcgelr          icc3,1,3
 
        ; ccond is false
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcgelr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0x1 1
        bcgelr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0x2 2
        bcgelr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0x3 3
        bcgelr          icc3,0,3
 
        set_spr_immed   1,lcr
        set_icc         0x4 0
        bcgelr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0x5 1
        bcgelr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0x6 2
        bcgelr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0x7 3
        bcgelr          icc3,0,3
 
        set_spr_immed   1,lcr
        set_icc         0x8 0
        bcgelr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0x9 1
        bcgelr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0xa 2
        bcgelr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0xb 3
        bcgelr          icc3,0,3
 
        set_spr_immed   1,lcr
        set_icc         0xc 0
        bcgelr          icc0,0,0
 
        set_spr_immed   1,lcr
        set_icc         0xd 1
        bcgelr          icc1,0,1
 
        set_spr_immed   1,lcr
        set_icc         0xe 2
        bcgelr          icc2,0,2
 
        set_spr_immed   1,lcr
        set_icc         0xf 3
        bcgelr          icc3,0,3
 
        pass
bad:
        fail

Browse

Tools

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [bcgelr.cgs] - Blame information for rev 26

Line No.	Rev	Author	Line
1	26	jlechner	`# frv testcase for bcgelr $ICCi,$ccond,$hint`
2			`# mach: all`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global bcgelr`
9			`bcgelr:`
10			`; ccond is true`
11			`set_spr_immed 128,lcr`
12			`set_spr_addr ok1,lr`
13			`set_icc 0x0 0`
14			`bcgelr icc0,0,0`
15			`fail`
16			`ok1:`
17			`set_spr_addr ok2,lr`
18			`set_icc 0x1 1`
19			`bcgelr icc1,0,1`
20			`fail`
21			`ok2:`
22			`set_spr_addr bad,lr`
23			`set_icc 0x2 2`
24			`bcgelr icc2,0,2`
25
26			`set_spr_addr bad,lr`
27			`set_icc 0x3 3`
28			`bcgelr icc3,0,3`
29
30			`set_spr_addr ok5,lr`
31			`set_icc 0x4 0`
32			`bcgelr icc0,0,0`
33			`fail`
34			`ok5:`
35			`set_spr_addr ok6,lr`
36			`set_icc 0x5 1`
37			`bcgelr icc1,0,1`
38			`fail`
39			`ok6:`
40			`set_spr_addr bad,lr`
41			`set_icc 0x6 2`
42			`bcgelr icc2,0,2`
43
44			`set_spr_addr bad,lr`
45			`set_icc 0x7 3`
46			`bcgelr icc3,0,3`
47
48			`set_spr_addr bad,lr`
49			`set_icc 0x8 0`
50			`bcgelr icc0,0,0`
51
52			`set_spr_addr bad,lr`
53			`set_icc 0x9 1`
54			`bcgelr icc1,0,1`
55
56			`set_spr_addr okb,lr`
57			`set_icc 0xa 2`
58			`bcgelr icc2,0,2`
59			`fail`
60			`okb:`
61			`set_spr_addr okc,lr`
62			`set_icc 0xb 3`
63			`bcgelr icc3,0,3`
64			`fail`
65			`okc:`
66			`set_spr_addr bad,lr`
67			`set_icc 0xc 0`
68			`bcgelr icc0,0,0`
69
70			`set_spr_addr bad,lr`
71			`set_icc 0xd 1`
72			`bcgelr icc1,0,1`
73
74			`set_spr_addr okf,lr`
75			`set_icc 0xe 2`
76			`bcgelr icc2,0,2`
77			`fail`
78			`okf:`
79			`set_spr_addr okg,lr`
80			`set_icc 0xf 3`
81			`bcgelr icc3,0,3`
82			`fail`
83			`okg:`
84
85			`; ccond is true`
86			`set_spr_immed 1,lcr`
87			`set_spr_addr okh,lr`
88			`set_icc 0x0 0`
89			`bcgelr icc0,1,0`
90			`fail`
91			`okh:`
92			`set_spr_immed 1,lcr`
93			`set_spr_addr oki,lr`
94			`set_icc 0x1 1`
95			`bcgelr icc1,1,1`
96			`fail`
97			`oki:`
98			`set_spr_immed 1,lcr`
99			`set_spr_addr bad,lr`
100			`set_icc 0x2 2`
101			`bcgelr icc2,1,2`
102
103			`set_spr_immed 1,lcr`
104			`set_spr_addr bad,lr`
105			`set_icc 0x3 3`
106			`bcgelr icc3,1,3`
107
108			`set_spr_immed 1,lcr`
109			`set_spr_addr okl,lr`
110			`set_icc 0x4 0`
111			`bcgelr icc0,1,0`
112			`fail`
113			`okl:`
114			`set_spr_immed 1,lcr`
115			`set_spr_addr okm,lr`
116			`set_icc 0x5 1`
117			`bcgelr icc1,1,1`
118			`fail`
119			`okm:`
120			`set_spr_immed 1,lcr`
121			`set_spr_addr bad,lr`
122			`set_icc 0x6 2`
123			`bcgelr icc2,1,2`
124
125			`set_spr_immed 1,lcr`
126			`set_spr_addr bad,lr`
127			`set_icc 0x7 3`
128			`bcgelr icc3,1,3`
129
130			`set_spr_immed 1,lcr`
131			`set_spr_addr bad,lr`
132			`set_icc 0x8 0`
133			`bcgelr icc0,1,0`
134
135			`set_spr_immed 1,lcr`
136			`set_spr_addr bad,lr`
137			`set_icc 0x9 1`
138			`bcgelr icc1,1,1`
139
140			`set_spr_immed 1,lcr`
141			`set_spr_addr okr,lr`
142			`set_icc 0xa 2`
143			`bcgelr icc2,1,2`
144			`fail`
145			`okr:`
146			`set_spr_immed 1,lcr`
147			`set_spr_addr oks,lr`
148			`set_icc 0xb 3`
149			`bcgelr icc3,1,3`
150			`fail`
151			`oks:`
152			`set_spr_immed 1,lcr`
153			`set_spr_addr bad,lr`
154			`set_icc 0xc 0`
155			`bcgelr icc0,1,0`
156
157			`set_spr_immed 1,lcr`
158			`set_spr_addr bad,lr`
159			`set_icc 0xd 1`
160			`bcgelr icc1,1,1`
161
162			`set_spr_immed 1,lcr`
163			`set_spr_addr okv,lr`
164			`set_icc 0xe 2`
165			`bcgelr icc2,1,2`
166			`fail`
167			`okv:`
168			`set_spr_immed 1,lcr`
169			`set_spr_addr okw,lr`
170			`set_icc 0xf 3`
171			`bcgelr icc3,1,3`
172			`fail`
173			`okw:`
174			`; ccond is false`
175			`set_spr_immed 128,lcr`
176			`set_spr_addr bad,lr`
177			`set_icc 0x0 0`
178			`bcgelr icc0,1,0`
179
180			`set_icc 0x1 1`
181			`bcgelr icc1,1,1`
182
183			`set_icc 0x2 2`
184			`bcgelr icc2,1,2`
185
186			`set_icc 0x3 3`
187			`bcgelr icc3,1,3`
188
189			`set_icc 0x4 0`
190			`bcgelr icc0,1,0`
191
192			`set_icc 0x5 1`
193			`bcgelr icc1,1,1`
194
195			`set_icc 0x6 2`
196			`bcgelr icc2,1,2`
197
198			`set_icc 0x7 3`
199			`bcgelr icc3,1,3`
200
201			`set_icc 0x8 0`
202			`bcgelr icc0,1,0`
203
204			`set_icc 0x9 1`
205			`bcgelr icc1,1,1`
206
207			`set_icc 0xa 2`
208			`bcgelr icc2,1,2`
209
210			`set_icc 0xb 3`
211			`bcgelr icc3,1,3`
212
213			`set_icc 0xc 0`
214			`bcgelr icc0,1,0`
215
216			`set_icc 0xd 1`
217			`bcgelr icc1,1,1`
218
219			`set_icc 0xe 2`
220			`bcgelr icc2,1,2`
221
222			`set_icc 0xf 3`
223			`bcgelr icc3,1,3`
224
225			`; ccond is false`
226			`set_spr_immed 1,lcr`
227			`set_spr_addr bad,lr`
228			`set_icc 0x0 0`
229			`bcgelr icc0,0,0`
230
231			`set_spr_immed 1,lcr`
232			`set_icc 0x1 1`
233			`bcgelr icc1,0,1`
234
235			`set_spr_immed 1,lcr`
236			`set_icc 0x2 2`
237			`bcgelr icc2,0,2`
238
239			`set_spr_immed 1,lcr`
240			`set_icc 0x3 3`
241			`bcgelr icc3,0,3`
242
243			`set_spr_immed 1,lcr`
244			`set_icc 0x4 0`
245			`bcgelr icc0,0,0`
246
247			`set_spr_immed 1,lcr`
248			`set_icc 0x5 1`
249			`bcgelr icc1,0,1`
250
251			`set_spr_immed 1,lcr`
252			`set_icc 0x6 2`
253			`bcgelr icc2,0,2`
254
255			`set_spr_immed 1,lcr`
256			`set_icc 0x7 3`
257			`bcgelr icc3,0,3`
258
259			`set_spr_immed 1,lcr`
260			`set_icc 0x8 0`
261			`bcgelr icc0,0,0`
262
263			`set_spr_immed 1,lcr`
264			`set_icc 0x9 1`
265			`bcgelr icc1,0,1`
266
267			`set_spr_immed 1,lcr`
268			`set_icc 0xa 2`
269			`bcgelr icc2,0,2`
270
271			`set_spr_immed 1,lcr`
272			`set_icc 0xb 3`
273			`bcgelr icc3,0,3`
274
275			`set_spr_immed 1,lcr`
276			`set_icc 0xc 0`
277			`bcgelr icc0,0,0`
278
279			`set_spr_immed 1,lcr`
280			`set_icc 0xd 1`
281			`bcgelr icc1,0,1`
282
283			`set_spr_immed 1,lcr`
284			`set_icc 0xe 2`
285			`bcgelr icc2,0,2`
286
287			`set_spr_immed 1,lcr`
288			`set_icc 0xf 3`
289			`bcgelr icc3,0,3`
290
291			`pass`
292			`bad:`
293			`fail`