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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [h8300/] [movsd.s] - Blame information for rev 26

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1 26 jlechner
# Hitachi H8 testcase 'movsd'
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# mach(): all
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# as(h8300):    --defsym sim_cpu=0
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# as(h8300h):   --defsym sim_cpu=1
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# as(h8300s):   --defsym sim_cpu=2
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# as(h8sx):     --defsym sim_cpu=3
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# ld(h8300h):   -m h8300helf
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# ld(h8300s):   -m h8300self
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# ld(h8sx):     -m h8300sxelf
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        .include "testutils.inc"
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        .data
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src:    .byte   'h', 'e', 'l', 'l', 'o', 0
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dst1:   .byte   0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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dst2:   .byte   0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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        start
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.if (sim_cpu == h8sx)
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movsd_n:#
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        # In this test, the transfer will stop after n bytes.
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        #
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        set_grs_a5a5
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        mov     #src,  er5
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        mov     #dst1, er6
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        mov     #4, r4
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        set_ccr_zero
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        ;; movsd.b disp:16
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        movsd.b fail1:16
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;;;     .word   0x7b84
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;;;     .word   0x02
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        bra     pass1
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fail1:  fail
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pass1:  test_cc_clear
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        test_gr_a5a5 0
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        test_gr_a5a5 1
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        test_gr_a5a5 2
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        test_gr_a5a5 3
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        test_h_gr32  0xa5a50000 er4
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        test_h_gr32  src+4  er5
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        test_h_gr32  dst1+4 er6
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        test_gr_a5a5 7
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        #
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        # Now make sure exactly 4 bytes were transferred.
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        cmp.b   @src, @dst1
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        bne     fail1:16
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        cmp.b   @src+1, @dst1+1
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        bne     fail1:16
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        cmp.b   @src+2, @dst1+2
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        bne     fail1:16
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        cmp.b   @src+3, @dst1+3
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        bne     fail1:16
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        cmp.b   @src+4, @dst1+4
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        beq     fail1:16
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movsd_s:#
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        # In this test, the entire null-terminated string is transferred.
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        #
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        set_grs_a5a5
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        mov     #src,  er5
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        mov     #dst2, er6
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        mov     #8, r4
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        set_ccr_zero
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        ;; movsd.b disp:16
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        movsd.b pass2:16
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;;;     .word   0x7b84
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;;;     .word   0x10
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fail2:  fail
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pass2:  test_cc_clear
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        test_gr_a5a5 0
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        test_gr_a5a5 1
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        test_gr_a5a5 2
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        test_gr_a5a5 3
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        test_h_gr32  0xa5a50002 er4
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        test_h_gr32  src+6  er5
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        test_h_gr32  dst2+6 er6
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        test_gr_a5a5 7
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        #
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        # Now make sure 5 bytes were transferred, and the 6th is zero.
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        cmp.b   @src, @dst2
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        bne     fail2:16
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        cmp.b   @src+1, @dst2+1
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        bne     fail2:16
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        cmp.b   @src+2, @dst2+2
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        bne     fail2:16
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        cmp.b   @src+3, @dst2+3
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        bne     fail2:16
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        cmp.b   @src+4, @dst2+4
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        bne     fail2:16
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        cmp.b   #0,     @dst2+5
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        bne     fail2:16
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.endif
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        pass
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        exit 0

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