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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [mips/] [testutils.inc] - Blame information for rev 26

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1 26 jlechner
# MIPS simulator testsuite utility functions.
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# Copyright (C) 2004, 2007, 2008 Free Software Foundation, Inc.
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# Contributed by Chris Demetriou of Broadcom Corporation.
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#
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# This file is part of the GNU simulators.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program.  If not, see .  */
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# $1, $4, $5, %6, are used as temps by the macros defined here.
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        .macro writemsg msg
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        .data
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901:    .ascii  "\msg\n"
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902:
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        .previous
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        la      $5, 901b
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        li      $6, 902b - 901b
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        .set push
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        .set noreorder
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        jal     _dowrite
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        li      $4, 0
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        .set pop
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        .endm
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        # The MIPS simulator uses "break 0x3ff" as the code to exit,
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        # with the return value in $4 (a0).
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        .macro exit rc
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        li      $4, \rc
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        break   0x3ff
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        .endm
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        .macro setup
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        .global _start
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        .global __start
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        .ent _start
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_start:
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__start:
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        .set push
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        .set noreorder
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        j       DIAG
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        nop
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        .set pop
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        .end _start
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        .global _fail
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        .ent _fail
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_fail:
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        writemsg "fail"
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        exit 1
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        .end _fail
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        .global _pass
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        .ent _pass
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_pass:
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        writemsg "pass"
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        exit 0
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        .end _pass
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        # The MIPS simulator can use multiple different monitor types,
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        # so we hard-code the simulator "write" reserved instruction opcode,
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        # rather than jumping to a vector that invokes it.  The operation
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        # expects RA to point to the location at which to continue
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        # after writing.
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        .global _dowrite
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        .ent _dowrite
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_dowrite:
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        # Write opcode (reserved instruction).  See sim_monitor and its
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        # callers in sim/mips/interp.c.
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        .word   0x00000005 | ((8 << 1) << 6)
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        .end _dowrite
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        .endm   # setup
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        .macro pass
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        .set push
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        .set noreorder
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        j       _pass
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        nop
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        .set pop
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        .endm
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        .macro fail
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        .set push
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        .set noreorder
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        j       _fail
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        nop
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        .set pop
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        .endm
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        .macro load32 reg, val
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        li      \reg, \val
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        .endm
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        .macro load64 reg, val
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        dli     \reg, \val
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        .endm
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        .macro loadaddr reg, addr
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        la      \reg, \addr
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        .endm
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        .macro checkreg reg, expreg
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        .set push
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        .set noat
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        .set noreorder
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        beq     \expreg, \reg, 901f
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        nop
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        fail
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901:
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        .set pop
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        .endm
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        .macro check32 reg, val
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        .set push
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        .set noat
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        load32  $1, \val
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        checkreg \reg, $1
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        .set pop
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        .endm
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        .macro check64 reg, val
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        .set push
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        .set noat
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        load64  $1, \val
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        checkreg \reg, $1
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        .set pop
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        .endm

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