| 1 |
15 |
tac2 |
SmartTime Version 3.0
|
| 2 |
|
|
Actel Corporation - Actel Designer Software Release v8.5 (Version 8.5.0.34)
|
| 3 |
|
|
|
| 4 |
|
|
Design versatile_fifo_dptam_dw
|
| 5 |
|
|
Family ProASIC3
|
| 6 |
|
|
Die A3P1000
|
| 7 |
|
|
Package 208 PQFP
|
| 8 |
|
|
Temperature COM
|
| 9 |
|
|
Voltage COM
|
| 10 |
|
|
Speed Grade STD
|
| 11 |
|
|
Design State Post-Layout
|
| 12 |
|
|
Data source Silicon verified
|
| 13 |
|
|
Analysis Min Case BEST
|
| 14 |
|
|
Analysis Max Case WORST
|
| 15 |
|
|
Scenario for Timing Analysis Primary
|
| 16 |
|
|
|
| 17 |
|
|
Using Enhanced Min Delay Analysis
|
| 18 |
|
|
Pin Description
|
| 19 |
|
|
+-----------+----------+--------+----------------+
|
| 20 |
|
|
| Name | Location | Type | I/O Technology |
|
| 21 |
|
|
+-----------+----------+--------+----------------+
|
| 22 |
|
|
| d_a[7] | | Input | |
|
| 23 |
|
|
| d_a[6] | | Input | |
|
| 24 |
|
|
| d_a[5] | | Input | |
|
| 25 |
|
|
| d_a[4] | | Input | |
|
| 26 |
|
|
| d_a[3] | | Input | |
|
| 27 |
|
|
| d_a[2] | | Input | |
|
| 28 |
|
|
| d_a[1] | | Input | |
|
| 29 |
|
|
| d_a[0] | | Input | |
|
| 30 |
|
|
| q_a[7] | | Output | |
|
| 31 |
|
|
| q_a[6] | | Output | |
|
| 32 |
|
|
| q_a[5] | | Output | |
|
| 33 |
|
|
| q_a[4] | | Output | |
|
| 34 |
|
|
| q_a[3] | | Output | |
|
| 35 |
|
|
| q_a[2] | | Output | |
|
| 36 |
|
|
| q_a[1] | | Output | |
|
| 37 |
|
|
| q_a[0] | | Output | |
|
| 38 |
|
|
| adr_a[10] | | Input | |
|
| 39 |
|
|
| adr_a[9] | | Input | |
|
| 40 |
|
|
| adr_a[8] | | Input | |
|
| 41 |
|
|
| adr_a[7] | | Input | |
|
| 42 |
|
|
| adr_a[6] | | Input | |
|
| 43 |
|
|
| adr_a[5] | | Input | |
|
| 44 |
|
|
| adr_a[4] | | Input | |
|
| 45 |
|
|
| adr_a[3] | | Input | |
|
| 46 |
|
|
| adr_a[2] | | Input | |
|
| 47 |
|
|
| adr_a[1] | | Input | |
|
| 48 |
|
|
| adr_a[0] | | Input | |
|
| 49 |
|
|
| we_a | | Input | |
|
| 50 |
|
|
| clk_a | | Clock | |
|
| 51 |
|
|
| q_b[7] | | Output | |
|
| 52 |
|
|
| q_b[6] | | Output | |
|
| 53 |
|
|
| q_b[5] | | Output | |
|
| 54 |
|
|
| q_b[4] | | Output | |
|
| 55 |
|
|
| q_b[3] | | Output | |
|
| 56 |
|
|
| q_b[2] | | Output | |
|
| 57 |
|
|
| q_b[1] | | Output | |
|
| 58 |
|
|
| q_b[0] | | Output | |
|
| 59 |
|
|
| adr_b[10] | | Input | |
|
| 60 |
|
|
| adr_b[9] | | Input | |
|
| 61 |
|
|
| adr_b[8] | | Input | |
|
| 62 |
|
|
| adr_b[7] | | Input | |
|
| 63 |
|
|
| adr_b[6] | | Input | |
|
| 64 |
|
|
| adr_b[5] | | Input | |
|
| 65 |
|
|
| adr_b[4] | | Input | |
|
| 66 |
|
|
| adr_b[3] | | Input | |
|
| 67 |
|
|
| adr_b[2] | | Input | |
|
| 68 |
|
|
| adr_b[1] | | Input | |
|
| 69 |
|
|
| adr_b[0] | | Input | |
|
| 70 |
|
|
| d_b[7] | | Input | |
|
| 71 |
|
|
| d_b[6] | | Input | |
|
| 72 |
|
|
| d_b[5] | | Input | |
|
| 73 |
|
|
| d_b[4] | | Input | |
|
| 74 |
|
|
| d_b[3] | | Input | |
|
| 75 |
|
|
| d_b[2] | | Input | |
|
| 76 |
|
|
| d_b[1] | | Input | |
|
| 77 |
|
|
| d_b[0] | | Input | |
|
| 78 |
|
|
| we_b | | Input | |
|
| 79 |
|
|
| clk_b | | Clock | |
|
| 80 |
|
|
+-----------+----------+--------+----------------+
|
| 81 |
|
|
|
| 82 |
|
|
|
| 83 |
|
|
DC Electrical Characteristics
|
| 84 |
|
|
Not Applicable
|
| 85 |
|
|
|
| 86 |
|
|
|
| 87 |
|
|
AC Electrical Characteristics
|
| 88 |
|
|
+-------------------+--------------+--------+--------------+--------+---------+------+
|
| 89 |
|
|
| Description | | | | Min | Max | Unit |
|
| 90 |
|
|
+-------------------+--------------+--------+--------------+--------+---------+------+
|
| 91 |
|
|
| Clock frequency | clk_a | | | | 231.267 | MHz |
|
| 92 |
|
|
| Clock period | clk_a | | | 4.324 | | ns |
|
| 93 |
|
|
| Clock frequency | clk_b | | | | 231.267 | MHz |
|
| 94 |
|
|
| Clock period | clk_b | | | 4.324 | | ns |
|
| 95 |
|
|
| Setup time | adr_a[0] | before | clk_a (rise) | 0.280 | | ns |
|
| 96 |
|
|
| Setup time | adr_a[10] | before | clk_a (rise) | 0.280 | | ns |
|
| 97 |
|
|
| Setup time | adr_a[1] | before | clk_a (rise) | 0.280 | | ns |
|
| 98 |
|
|
| Setup time | adr_a[2] | before | clk_a (rise) | 0.280 | | ns |
|
| 99 |
|
|
| Setup time | adr_a[3] | before | clk_a (rise) | 0.280 | | ns |
|
| 100 |
|
|
| Setup time | adr_a[4] | before | clk_a (rise) | 0.280 | | ns |
|
| 101 |
|
|
| Setup time | adr_a[5] | before | clk_a (rise) | 0.280 | | ns |
|
| 102 |
|
|
| Setup time | adr_a[6] | before | clk_a (rise) | 0.280 | | ns |
|
| 103 |
|
|
| Setup time | adr_a[7] | before | clk_a (rise) | 0.280 | | ns |
|
| 104 |
|
|
| Setup time | adr_a[8] | before | clk_a (rise) | 0.280 | | ns |
|
| 105 |
|
|
| Setup time | adr_a[9] | before | clk_a (rise) | 0.280 | | ns |
|
| 106 |
|
|
| Setup time | adr_b[0] | before | clk_b (rise) | 0.282 | | ns |
|
| 107 |
|
|
| Setup time | adr_b[10] | before | clk_b (rise) | 0.282 | | ns |
|
| 108 |
|
|
| Setup time | adr_b[1] | before | clk_b (rise) | 0.282 | | ns |
|
| 109 |
|
|
| Setup time | adr_b[2] | before | clk_b (rise) | 0.282 | | ns |
|
| 110 |
|
|
| Setup time | adr_b[3] | before | clk_b (rise) | 0.282 | | ns |
|
| 111 |
|
|
| Setup time | adr_b[4] | before | clk_b (rise) | 0.282 | | ns |
|
| 112 |
|
|
| Setup time | adr_b[5] | before | clk_b (rise) | 0.282 | | ns |
|
| 113 |
|
|
| Setup time | adr_b[6] | before | clk_b (rise) | 0.282 | | ns |
|
| 114 |
|
|
| Setup time | adr_b[7] | before | clk_b (rise) | 0.282 | | ns |
|
| 115 |
|
|
| Setup time | adr_b[8] | before | clk_b (rise) | 0.282 | | ns |
|
| 116 |
|
|
| Setup time | adr_b[9] | before | clk_b (rise) | 0.282 | | ns |
|
| 117 |
|
|
| Setup time | d_a[0] | before | clk_a (rise) | 0.193 | | ns |
|
| 118 |
|
|
| Setup time | d_a[1] | before | clk_a (rise) | 0.193 | | ns |
|
| 119 |
|
|
| Setup time | d_a[2] | before | clk_a (rise) | 0.193 | | ns |
|
| 120 |
|
|
| Setup time | d_a[3] | before | clk_a (rise) | 0.193 | | ns |
|
| 121 |
|
|
| Setup time | d_a[4] | before | clk_a (rise) | 0.193 | | ns |
|
| 122 |
|
|
| Setup time | d_a[5] | before | clk_a (rise) | 0.193 | | ns |
|
| 123 |
|
|
| Setup time | d_a[6] | before | clk_a (rise) | 0.193 | | ns |
|
| 124 |
|
|
| Setup time | d_a[7] | before | clk_a (rise) | 0.193 | | ns |
|
| 125 |
|
|
| Setup time | d_b[0] | before | clk_b (rise) | 0.176 | | ns |
|
| 126 |
|
|
| Setup time | d_b[1] | before | clk_b (rise) | 0.176 | | ns |
|
| 127 |
|
|
| Setup time | d_b[2] | before | clk_b (rise) | 0.176 | | ns |
|
| 128 |
|
|
| Setup time | d_b[3] | before | clk_b (rise) | 0.176 | | ns |
|
| 129 |
|
|
| Setup time | d_b[4] | before | clk_b (rise) | 0.176 | | ns |
|
| 130 |
|
|
| Setup time | d_b[5] | before | clk_b (rise) | 0.176 | | ns |
|
| 131 |
|
|
| Setup time | d_b[6] | before | clk_b (rise) | 0.176 | | ns |
|
| 132 |
|
|
| Setup time | d_b[7] | before | clk_b (rise) | 0.176 | | ns |
|
| 133 |
|
|
| Setup time | we_a | before | clk_a (rise) | 2.731 | | ns |
|
| 134 |
|
|
| Setup time | we_b | before | clk_b (rise) | 3.346 | | ns |
|
| 135 |
|
|
| Hold time | adr_a[0] | after | clk_a (rise) | 0.000 | | ns |
|
| 136 |
|
|
| Hold time | adr_a[10] | after | clk_a (rise) | 0.000 | | ns |
|
| 137 |
|
|
| Hold time | adr_a[1] | after | clk_a (rise) | 0.000 | | ns |
|
| 138 |
|
|
| Hold time | adr_a[2] | after | clk_a (rise) | 0.000 | | ns |
|
| 139 |
|
|
| Hold time | adr_a[3] | after | clk_a (rise) | 0.000 | | ns |
|
| 140 |
|
|
| Hold time | adr_a[4] | after | clk_a (rise) | 0.000 | | ns |
|
| 141 |
|
|
| Hold time | adr_a[5] | after | clk_a (rise) | 0.000 | | ns |
|
| 142 |
|
|
| Hold time | adr_a[6] | after | clk_a (rise) | 0.000 | | ns |
|
| 143 |
|
|
| Hold time | adr_a[7] | after | clk_a (rise) | 0.000 | | ns |
|
| 144 |
|
|
| Hold time | adr_a[8] | after | clk_a (rise) | 0.000 | | ns |
|
| 145 |
|
|
| Hold time | adr_a[9] | after | clk_a (rise) | 0.000 | | ns |
|
| 146 |
|
|
| Hold time | adr_b[0] | after | clk_b (rise) | 0.000 | | ns |
|
| 147 |
|
|
| Hold time | adr_b[10] | after | clk_b (rise) | 0.000 | | ns |
|
| 148 |
|
|
| Hold time | adr_b[1] | after | clk_b (rise) | 0.000 | | ns |
|
| 149 |
|
|
| Hold time | adr_b[2] | after | clk_b (rise) | 0.000 | | ns |
|
| 150 |
|
|
| Hold time | adr_b[3] | after | clk_b (rise) | 0.000 | | ns |
|
| 151 |
|
|
| Hold time | adr_b[4] | after | clk_b (rise) | 0.000 | | ns |
|
| 152 |
|
|
| Hold time | adr_b[5] | after | clk_b (rise) | 0.000 | | ns |
|
| 153 |
|
|
| Hold time | adr_b[6] | after | clk_b (rise) | 0.000 | | ns |
|
| 154 |
|
|
| Hold time | adr_b[7] | after | clk_b (rise) | 0.000 | | ns |
|
| 155 |
|
|
| Hold time | adr_b[8] | after | clk_b (rise) | 0.000 | | ns |
|
| 156 |
|
|
| Hold time | adr_b[9] | after | clk_b (rise) | 0.000 | | ns |
|
| 157 |
|
|
| Hold time | d_a[0] | after | clk_a (rise) | 0.000 | | ns |
|
| 158 |
|
|
| Hold time | d_a[1] | after | clk_a (rise) | 0.000 | | ns |
|
| 159 |
|
|
| Hold time | d_a[2] | after | clk_a (rise) | 0.000 | | ns |
|
| 160 |
|
|
| Hold time | d_a[3] | after | clk_a (rise) | 0.000 | | ns |
|
| 161 |
|
|
| Hold time | d_a[4] | after | clk_a (rise) | 0.000 | | ns |
|
| 162 |
|
|
| Hold time | d_a[5] | after | clk_a (rise) | 0.000 | | ns |
|
| 163 |
|
|
| Hold time | d_a[6] | after | clk_a (rise) | 0.000 | | ns |
|
| 164 |
|
|
| Hold time | d_a[7] | after | clk_a (rise) | 0.000 | | ns |
|
| 165 |
|
|
| Hold time | d_b[0] | after | clk_b (rise) | 0.000 | | ns |
|
| 166 |
|
|
| Hold time | d_b[1] | after | clk_b (rise) | 0.000 | | ns |
|
| 167 |
|
|
| Hold time | d_b[2] | after | clk_b (rise) | 0.000 | | ns |
|
| 168 |
|
|
| Hold time | d_b[3] | after | clk_b (rise) | 0.000 | | ns |
|
| 169 |
|
|
| Hold time | d_b[4] | after | clk_b (rise) | 0.000 | | ns |
|
| 170 |
|
|
| Hold time | d_b[5] | after | clk_b (rise) | 0.000 | | ns |
|
| 171 |
|
|
| Hold time | d_b[6] | after | clk_b (rise) | 0.000 | | ns |
|
| 172 |
|
|
| Hold time | d_b[7] | after | clk_b (rise) | 0.000 | | ns |
|
| 173 |
|
|
| Hold time | we_a | after | clk_a (rise) | -0.353 | | ns |
|
| 174 |
|
|
| Hold time | we_b | after | clk_b (rise) | -0.317 | | ns |
|
| 175 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[0] | 1.063 | 3.154 | ns |
|
| 176 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[1] | 1.063 | 3.154 | ns |
|
| 177 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[2] | 1.063 | 3.154 | ns |
|
| 178 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[3] | 1.063 | 3.154 | ns |
|
| 179 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[4] | 1.063 | 3.154 | ns |
|
| 180 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[5] | 1.063 | 3.154 | ns |
|
| 181 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[6] | 1.063 | 3.154 | ns |
|
| 182 |
|
|
| Propagation delay | clk_a (rise) | to | q_a[7] | 1.063 | 3.154 | ns |
|
| 183 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[0] | 1.057 | 3.139 | ns |
|
| 184 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[1] | 1.057 | 3.139 | ns |
|
| 185 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[2] | 1.057 | 3.139 | ns |
|
| 186 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[3] | 1.057 | 3.139 | ns |
|
| 187 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[4] | 1.057 | 3.139 | ns |
|
| 188 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[5] | 1.057 | 3.139 | ns |
|
| 189 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[6] | 1.057 | 3.139 | ns |
|
| 190 |
|
|
| Propagation delay | clk_b (rise) | to | q_b[7] | 1.057 | 3.139 | ns |
|
| 191 |
|
|
+-------------------+--------------+--------+--------------+--------+---------+------+
|
| 192 |
|
|
|
| 193 |
|
|
|
