URL https://opencores.org/ocsvn/sdcard_mass_storage_controller/sdcard_mass_storage_controller/trunk

Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [rtl/] [sdc_fifo/] [verilog/] [sd_counter.v] - Blame information for rev 10

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// module name
//`define CNT_MODULE_NAME sd_counter
 
// counter type = [BINARY, GRAY, LFSR]
//`define CNT_TYPE_BINARY
`define CNT_TYPE_GRAY
//`define CNT_TYPE_LFSR
 
// q as output
`define CNT_Q
// for gray type counter optional binary output
`define CNT_Q_BIN
 
// number of CNT bins
`define CNT_LENGTH 9
 
// clear
//`define CNT_CLEAR
 
// set
//`define CNT_SET
`define CNT_SET_VALUE `CNT_LENGTH'h9
 
// wrap around creates shorter cycle than maximum length
//`define CNT_WRAP
`define CNT_WRAP_VALUE `CNT_LENGTH'h9
 
// clock enable
`define CNT_CE
 
// q_next as an output
//`define CNT_QNEXT
 
// q=0 as an output
//`define CNT_Z
 
// q_next=0 as a registered output
//`define CNT_ZQ
 
 
`define LFSR_LENGTH `CNT_LENGTH
 
module sd_counter
  (
`ifdef CNT_TYPE_GRAY
    output reg [`CNT_LENGTH:1] q,
`ifdef CNT_Q_BIN
    output [`CNT_LENGTH:1]    q_bin,
`endif
`else
`ifdef CNT_Q
    output [`CNT_LENGTH:1]    q,
`endif
`endif
`ifdef CNT_CLEAR
    input clear,
`endif
`ifdef CNT_SET
    input set,
`endif
`ifdef CNT_REW
    input rew,
`endif
`ifdef CNT_CE
    input cke,
`endif
`ifdef CNT_QNEXT
    output [`CNT_LENGTH:1] q_next,
`endif
`ifdef CNT_Z
    output z,
`endif
`ifdef CNT_ZQ
    output reg zq,
`endif
    input clk,
    input rst
   );
 
`ifdef CNT_SET
   parameter set_value = `CNT_SET_VALUE;
`endif
`ifdef CNT_WRAP
   parameter wrap_value = `CNT_WRAP_VALUE;
`endif
 
   // internal q reg
   reg [`CNT_LENGTH:1] qi;
 
`ifdef CNT_QNEXT
`else
   wire [`CNT_LENGTH:1] q_next;
`endif
`ifdef CNT_REW
   wire [`CNT_LENGTH:1] q_next_fw;
   wire [`CNT_LENGTH:1] q_next_rew;
`endif
 
`ifdef CNT_REW
`else
   assign q_next =
`endif
`ifdef CNT_REW
     assign q_next_fw =
`endif
`ifdef CNT_CLEAR
       clear ? `CNT_LENGTH'd0 :
`endif
`ifdef CNT_SET
         set ? set_value :
`endif
`ifdef CNT_WRAP
           (qi == wrap_value) ? `CNT_LENGTH'd0 :
`endif
`ifdef CNT_TYPE_LFSR
             {qi[8:1],~(q[`LFSR_LENGTH]^q[1])};
`else
   qi + `CNT_LENGTH'd1;
`endif
 
`ifdef CNT_REW
   assign q_next_rew =
`ifdef CNT_CLEAR
     clear ? `CNT_LENGTH'd0 :
`endif
`ifdef CNT_SET
       set ? set_value :
`endif
`ifdef CNT_WRAP
         (qi == `CNT_LENGTH'd0) ? wrap_value :
`endif
`ifdef CNT_TYPE_LFSR
           {~(q[1]^q[2]),qi[`CNT_LENGTH:2]};
`else
   qi - `CNT_LENGTH'd1;
`endif
`endif
 
`ifdef CNT_REW
   assign q_next = rew ? q_next_rew : q_next_fw;
`endif
 
   always @ (posedge clk or posedge rst)
     if (rst)
       qi <= `CNT_LENGTH'd0;
     else
`ifdef CNT_CE
   if (cke)
`endif
     qi <= q_next;
 
`ifdef CNT_Q
`ifdef CNT_TYPE_GRAY
   always @ (posedge clk or posedge rst)
     if (rst)
       q <= `CNT_LENGTH'd0;
     else
`ifdef CNT_CE
       if (cke)
`endif
         q <= (q_next>>1) ^ q_next;
`ifdef CNT_Q_BIN
   assign q_bin = qi;
`endif
`else
   assign q = q_next;
`endif
`endif
 
`ifdef CNT_Z
   assign z = (q == `CNT_LENGTH'd0);
`endif
 
`ifdef CNT_ZQ
   always @ (posedge clk or posedge rst)
     if (rst)
       zq <= 1'b1;
     else
`ifdef CNT_CE
       if (cke)
`endif
         zq <= q_next == `CNT_LENGTH'd0;
`endif
endmodule

Line No.	Rev	Author	Line
1	6	tac2	`// module name`
2			//`define CNT_MODULE_NAME sd_counter
3
4			`// counter type = [BINARY, GRAY, LFSR]`
5			//`define CNT_TYPE_BINARY
6			`define CNT_TYPE_GRAY
7			//`define CNT_TYPE_LFSR
8
9			`// q as output`
10			`define CNT_Q
11			`// for gray type counter optional binary output`
12			`define CNT_Q_BIN
13
14			`// number of CNT bins`
15			`define CNT_LENGTH 9
16
17			`// clear`
18			//`define CNT_CLEAR
19
20			`// set`
21			//`define CNT_SET
22			`define CNT_SET_VALUE `CNT_LENGTH'h9
23
24			`// wrap around creates shorter cycle than maximum length`
25			//`define CNT_WRAP
26			`define CNT_WRAP_VALUE `CNT_LENGTH'h9
27
28			`// clock enable`
29			`define CNT_CE
30
31			`// q_next as an output`
32			//`define CNT_QNEXT
33
34			`// q=0 as an output`
35			//`define CNT_Z
36
37			`// q_next=0 as a registered output`
38			//`define CNT_ZQ
39
40
41			`define LFSR_LENGTH `CNT_LENGTH
42
43			`module sd_counter`
44			`(`
45			`ifdef CNT_TYPE_GRAY
46			output reg [`CNT_LENGTH:1] q,
47			`ifdef CNT_Q_BIN
48			output [`CNT_LENGTH:1] q_bin,
49			`endif
50			`else
51			`ifdef CNT_Q
52			output [`CNT_LENGTH:1] q,
53			`endif
54			`endif
55			`ifdef CNT_CLEAR
56			`input clear,`
57			`endif
58			`ifdef CNT_SET
59			`input set,`
60			`endif
61			`ifdef CNT_REW
62			`input rew,`
63			`endif
64			`ifdef CNT_CE
65			`input cke,`
66			`endif
67			`ifdef CNT_QNEXT
68			output [`CNT_LENGTH:1] q_next,
69			`endif
70			`ifdef CNT_Z
71			`output z,`
72			`endif
73			`ifdef CNT_ZQ
74			`output reg zq,`
75			`endif
76			`input clk,`
77			`input rst`
78			`);`
79
80			`ifdef CNT_SET
81			parameter set_value = `CNT_SET_VALUE;
82			`endif
83			`ifdef CNT_WRAP
84			parameter wrap_value = `CNT_WRAP_VALUE;
85			`endif
86
87			`// internal q reg`
88			reg [`CNT_LENGTH:1] qi;
89
90			`ifdef CNT_QNEXT
91			`else
92			wire [`CNT_LENGTH:1] q_next;
93			`endif
94			`ifdef CNT_REW
95			wire [`CNT_LENGTH:1] q_next_fw;
96			wire [`CNT_LENGTH:1] q_next_rew;
97			`endif
98
99			`ifdef CNT_REW
100			`else
101			`assign q_next =`
102			`endif
103			`ifdef CNT_REW
104			`assign q_next_fw =`
105			`endif
106			`ifdef CNT_CLEAR
107			clear ? `CNT_LENGTH'd0 :
108			`endif
109			`ifdef CNT_SET
110			`set ? set_value :`
111			`endif
112			`ifdef CNT_WRAP
113			(qi == wrap_value) ? `CNT_LENGTH'd0 :
114			`endif
115			`ifdef CNT_TYPE_LFSR
116			{qi[8:1],~(q[`LFSR_LENGTH]^q[1])};
117			`else
118			qi + `CNT_LENGTH'd1;
119			`endif
120
121			`ifdef CNT_REW
122			`assign q_next_rew =`
123			`ifdef CNT_CLEAR
124			clear ? `CNT_LENGTH'd0 :
125			`endif
126			`ifdef CNT_SET
127			`set ? set_value :`
128			`endif
129			`ifdef CNT_WRAP
130			(qi == `CNT_LENGTH'd0) ? wrap_value :
131			`endif
132			`ifdef CNT_TYPE_LFSR
133			{~(q[1]^q[2]),qi[`CNT_LENGTH:2]};
134			`else
135			qi - `CNT_LENGTH'd1;
136			`endif
137			`endif
138
139			`ifdef CNT_REW
140			`assign q_next = rew ? q_next_rew : q_next_fw;`
141			`endif
142
143			`always @ (posedge clk or posedge rst)`
144			`if (rst)`
145			qi <= `CNT_LENGTH'd0;
146			`else`
147			`ifdef CNT_CE
148			`if (cke)`
149			`endif
150			`qi <= q_next;`
151
152			`ifdef CNT_Q
153			`ifdef CNT_TYPE_GRAY
154			`always @ (posedge clk or posedge rst)`
155			`if (rst)`
156			q <= `CNT_LENGTH'd0;
157			`else`
158			`ifdef CNT_CE
159			`if (cke)`
160			`endif
161			`q <= (q_next>>1) ^ q_next;`
162			`ifdef CNT_Q_BIN
163			`assign q_bin = qi;`
164			`endif
165			`else
166			`assign q = q_next;`
167			`endif
168			`endif
169
170			`ifdef CNT_Z
171			assign z = (q == `CNT_LENGTH'd0);
172			`endif
173
174			`ifdef CNT_ZQ
175			`always @ (posedge clk or posedge rst)`
176			`if (rst)`
177			`zq <= 1'b1;`
178			`else`
179			`ifdef CNT_CE
180			`if (cke)`
181			`endif
182			zq <= q_next == `CNT_LENGTH'd0;
183			`endif
184			`endmodule`

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Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [rtl/] [sdc_fifo/] [verilog/] [sd_counter.v] - Blame information for rev 10