URL https://opencores.org/ocsvn/sdcard_mass_storage_controller/sdcard_mass_storage_controller/trunk

Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [rtl/] [sdc_fifo/] [verilog/] [sd_defines.v] - Blame information for rev 91

Go to most recent revision | Details | Compare with Previous | View Log


`define BIG_ENDIAN
`define TIME_OUT_TIME 255
 
//OBS komih�g Master SEL to 1111 vid port dek
 
//`define SIM
`define SYN
 
`define ACTEL
 
`ifdef SYN
`define RESET_CLK_DIV 2
`define MEM_OFFSET 4
`endif
 
`ifdef SIM
`define RESET_CLK_DIV 0
`define MEM_OFFSET 1
`endif
 
 
//SD-Clock Defines ---------
//Use bus clock or a seperate external clock?
`define SD_CLK_BUS_CLK
//`define SD_CLK_EXT
 
// Use internal clock divider?
`define SD_CLK_STATIC
//`define SD_CLK_DYNAMIC
 
 
//SD DATA-transfer defines---
`define BLOCK_SIZE 512
`define SD_BUS_WIDTH_4
`define SD_BUS_W 4
 
//at 512 bytes per block, equal 1024 4 bytes writings with a bus width of 4, add 2 for startbit and Z bit.
//Add 18 for crc, endbit and z.
`define BIT_BLOCK 1044
`define CRC_OFF 19
`define BIT_BLOCK_REC 1024
 
`define BIT_CRC_CYCLE 16
 
//FIFO defines---------------
 
 
 
 
 
 
 
 

Line No.	Rev	Author	Line
1	6	tac2	`define BIG_ENDIAN
2			`define TIME_OUT_TIME 255
3
4			`//OBS komih�g Master SEL to 1111 vid port dek`
5
6			//`define SIM
7			`define SYN
8
9			`define ACTEL
10
11			`ifdef SYN
12			`define RESET_CLK_DIV 2
13			`define MEM_OFFSET 4
14			`endif
15
16			`ifdef SIM
17			`define RESET_CLK_DIV 0
18			`define MEM_OFFSET 1
19			`endif
20
21
22			`//SD-Clock Defines ---------`
23	25	tac2	`//Use bus clock or a seperate external clock?`
24	6	tac2	`define SD_CLK_BUS_CLK
25	25	tac2	//`define SD_CLK_EXT
26	6	tac2
27			`// Use internal clock divider?`
28			`define SD_CLK_STATIC
29			//`define SD_CLK_DYNAMIC
30
31
32			`//SD DATA-transfer defines---`
33			`define BLOCK_SIZE 512
34			`define SD_BUS_WIDTH_4
35			`define SD_BUS_W 4
36
37			`//at 512 bytes per block, equal 1024 4 bytes writings with a bus width of 4, add 2 for startbit and Z bit.`
38			`//Add 18 for crc, endbit and z.`
39			`define BIT_BLOCK 1044
40			`define CRC_OFF 19
41			`define BIT_BLOCK_REC 1024
42
43			`define BIT_CRC_CYCLE 16
44
45			`//FIFO defines---------------`
46
47
48
49
50
51
52
53

Browse

Tools

Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [rtl/] [sdc_fifo/] [verilog/] [sd_defines.v] - Blame information for rev 91