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Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [sw/] [sdc_dma/] [main.c] - Blame information for rev 126

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/*$$HEADER*/
/******************************************************************************/
/*                                                                            */
/*                    H E A D E R   I N F O R M A T I O N                     */
/*                                                                            */
/******************************************************************************/
 
// Project Name                   : Development Board Debugger Example 
// File Name                      : main.c
// Prepared By                    : jb
// Project Start                  : 2009-01-01
 
 
/*$$COPYRIGHT NOTICE*/
/******************************************************************************/
/*                                                                            */
/*                      C O P Y R I G H T   N O T I C E                       */
/*                                                                            */
/******************************************************************************/
 
// Copyright (c) ORSoC 2009 All rights reserved.
 
// The information in this document is the property of ORSoC.
// Except as specifically authorized in writing by ORSoC, the receiver of
// this document shall keep the information contained herein confidential and
// shall protect the same in whole or in part thereof from disclosure and
// dissemination to third parties. Disclosure and disseminations to the receiver's
// employees shall only be made on a strict need to know basis.
 
 
/*$$DESCRIPTION*/
/******************************************************************************/
/*                                                                            */
/*                           D E S C R I P T I O N                            */
/*                                                                            */
/******************************************************************************/
 
// Perform some simple functions, used as an example when first using the 
// debug cable and proxy with GDB.
 
/*$$CHANGE HISTORY*/
/******************************************************************************/
/*                                                                            */
/*                         C H A N G E  H I S T O R Y                         */
/*                                                                            */
/******************************************************************************/
 
// Date         Version Description
//------------------------------------------------------------------------
// 090101       1.0     First version                           jb
 
/*$$INCLUDE FILES*/
/******************************************************************************/
/*                                                                            */
/*                      I N C L U D E   F I L E S                             */
/*                                                                            */
/******************************************************************************/
 
#define INCLUDED_FROM_C_FILE
 
#include "orsocdef.h"
#include "board.h"
#include "uart.h"
#include "sd_controller.h"
/*$$PRIVATE MACROS*/
/******************************************************************************/
/*                                                                            */
/*                      P R I V A T E   M A C R O S                           */
/*                                                                            */
/******************************************************************************/
 
/*$$GLOBAL VARIABLES*/
/******************************************************************************/
/*                                                                            */
/*                   G L O B A L   V A R I A B L E S                          */
/*                                                                            */
/******************************************************************************/
 
/*$$PRIVATE VARIABLES*/
/******************************************************************************/
/*                                                                            */
/*                  P R I V A T E   V A R I A B L E S                         */
/*                                                                            */
/******************************************************************************/
 
 
/*$$FUNCTIONS*/
/******************************************************************************/
/*                                                                            */
/*                          F U N C T I O N S                                 */
/*                                                                            */
/******************************************************************************/
 
 
/******************************************************************************/
/*                        W R I T E  T O EXTERNAL SDRAM 1                     */
/******************************************************************************/
 
// Write to External SDRAM  
void Write_External_SDRAM_1(void)
{
   uint32      i;
   uint32      read;
   uint32      range;
   uint32      adr_offset;
 
   range      = 0x7ff;        // Max range: 0x7fffff
   adr_offset = 0x00000000;  // External memory offset
 
   for (i=0x0; i < range; i=i+4) {
      REG32(adr_offset + i)   = (adr_offset + i);
   }
 
   for (i=0x0; i < range; i=i+4) {
     read = REG32(adr_offset + i);
     if (read != (adr_offset + i)) {
       while(TRUE){            //ERROR=HALT PROCESSOR 
       }
     }
   }
}
 
 
/*$$EXTERNAL EXEPTIONS*/
/******************************************************************************/
/*                  E X T E R N A L   E X E P T I O N S                       */
/******************************************************************************/
 
 
void external_exeption()
{
  REG uint8 i;
  REG uint32 PicSr,sr;
 
}
 
/*$$MAIN*/
/******************************************************************************/
/*                                                                            */
/*                       M A I N   P R O G R A M                              */
/*                                                                            */
/******************************************************************************/
 
struct sd_card_csr {
unsigned int PAD:18;
unsigned  int CMDI:6;
unsigned  int CMDT:2;
unsigned  int DPS:1;
unsigned  int CICE_s:1;
unsigned  int CRCE_s:1;
unsigned  int  RSVD:1;
unsigned  int RTS:2;
} ;
 
 
 
 
 
void Start()
{
  struct sd_card_csr *sd_set_reg = (struct sd_card_csr *)  (SD_CONTROLLER_BASE+SD_COMMAND);
 
  volatile unsigned long rtn_reg=0;
  volatile  unsigned long rtn_reg1=0;
 
  int i;
  unsigned char block[512];
  unsigned char blocka[512];
  unsigned char blockb[512];
 
  unsigned char rec_block[512];
  unsigned char rec_blocka[512];
  unsigned char rec_blockb[512];
 
  //Generate som data to be writen
 
  for  (i =0; i<512;i++)
   block[i]=i;
 
  for  (i =0; i<512;i++)
   blocka[i]=i+8;
 
  for  (i =0; i<512;i++)
   blockb[i]=0xb6;
 
  unsigned long b=0x0001;
   sd_card sd_card_0;
 
 
   uart_init();
 
        sd_card_0 = sd_controller_init();
    if (sd_card_0.Active==1)
        {
                uart_print_str("Init 2 succes!\n");
                uart_print_str("\nvoltage_windows:\n");
                uart_print_long(sd_card_0.Voltage_window);
                uart_print_str("\nRCA_Nr:\n");
                uart_print_long(sd_card_0.rca);
                uart_print_str("\nphys_spec_2_0 Y/N 1/0? :\n");
                uart_print_long(sd_card_0.phys_spec_2_0);
                uart_print_str("\nHCS? :\n");
                uart_print_long(sd_card_0.phys_spec_2_0);
                        uart_print_str(":\n");
        }
        else
                uart_print_str("Init2  failed :/!\n");
 
 
        SD_REG(SD_COMMAND) = CMD9  |WORD_0| CICE | CRCE | RSP_146;
                SD_REG(SD_ARG)=sd_card_0.rca | 0xf0f0;
           if (!sd_wait_rsp())
                                uart_print_str(" send failed :/!\n");
                 else{
                          uart_print_str("CSD 0 \n");
                  uart_print_long( SD_REG(SD_RESP1)  ) ;
                          uart_print_str("  \n");
                }
 
              uart_print_str("error?  \n");
                  uart_print_long( SD_REG( SD_ERROR_INT_STATUS)  ) ;
 
 
     //Put in transfer state
 
 
            SD_REG(SD_COMMAND) = CMD7 | CICE | CRCE | RSP_48;
                SD_REG(SD_ARG)=sd_card_0.rca | 0xf0f0;
                if (!sd_wait_rsp())
                                uart_print_str("Go send failed :/!\n");
 
                else if (   SD_REG(SD_RESP1) == (CARD_STATUS_STB  |  READY_FOR_DATA ) )
                        uart_print_str("Ready to transfer data!\n");
 
     //Set block size
 
                SD_REG(SD_COMMAND) = CMD16 | CICE | CRCE | RSP_48;
                SD_REG(SD_ARG)=512;
                if (!sd_wait_rsp())
                                uart_print_str("Go send failed :/!\n");
                uart_print_str("Card Status reg CMD16: \n");
          uart_print_long( SD_REG(SD_RESP1)  ) ;
 
        //Set Bus width to 4, CMD55 followed by ACMD 6
                 REG32(SD_CONTROLLER_BASE+SD_COMMAND) = CMD55|RSP_48;
                 REG32(SD_CONTROLLER_BASE+SD_ARG) =sd_card_0.rca | 0xf0f0;
                        if (!sd_wait_rsp())
                                        uart_print_str("CMD55 send failed :/!\n");
 
                 SD_REG(SD_COMMAND) = ACMD6 | CICE | CRCE | RSP_48;
                 SD_REG(SD_ARG)=0x2;
                        if (!sd_wait_rsp())
                                        uart_print_str("ACMD6 send failed :/!\n");
 
                 uart_print_str("Card Status reg ACMD6: \n");
                 uart_print_long( SD_REG(SD_RESP1)  ) ;
                 uart_print_str("\n");
 
                                int cnt=0;
 
              uart_print_str("FREE BD beg: \n");
                  uart_print_long( SD_REG(BD_STATUS)  ) ;
                  uart_print_str("\n");
 
                SD_REG(BD_TX)  = &block;
                  SD_REG(BD_TX)  = 512;
                  SD_REG(BD_TX)  = &blocka;
                  SD_REG(BD_TX)  = 1024;
                  SD_REG(BD_TX)  = &blockb;
                  SD_REG(BD_TX)  = 2048;
 
                  SD_REG(BD_RX)  = &rec_block;
                  SD_REG(BD_RX)  = 512;
                  SD_REG(BD_RX)  = &rec_blocka;
                  SD_REG(BD_RX)  = 1024;
                  SD_REG(BD_RX)  = &rec_blockb;
                  SD_REG(BD_RX)  = 2048;
 
                //Check data transfer complete statusbit
                //(An easier way is to check the BD_STATUS and wait for it to get Empty and then check for transfer errors)    
                while (  (( SD_REG(BD_ISR)  &1)  !=1  ) ){
                rtn_reg= SD_REG(BD_ISR) ;
                }
                 SD_REG(BD_ISR) =0;
                while (  (( SD_REG(BD_ISR)  &1)  !=1  ) ){
                rtn_reg= SD_REG(BD_ISR) ;
                }
                SD_REG(BD_ISR) =0;
                while (  (( SD_REG(BD_ISR)  &1)  !=1  ) ){
                rtn_reg= SD_REG(BD_ISR) ;
                }
                 SD_REG(BD_ISR) =0;
                while (  (( SD_REG(BD_ISR)  &1)  !=1  ) ){
                rtn_reg= SD_REG(BD_ISR) ;
                }
                SD_REG(BD_ISR) =0;
                while (  (( SD_REG(BD_ISR)  &1)  !=1  ) ){
                rtn_reg= SD_REG(BD_ISR) ;
                }
                 SD_REG(BD_ISR) =0;
                while (  (( SD_REG(BD_ISR)  &1)  !=1  ) ){
                rtn_reg= SD_REG(BD_ISR) ;
                }
                SD_REG(BD_ISR) =0;
 
 
 
                 uart_print_str("FREE BD: \n");
                 uart_print_long( SD_REG(BD_STATUS)  ) ;
                 uart_print_str("\n");
                 SD_REG(BD_ISR) =0;
                 uart_print_str("\n");
                   for  (i =0; i<512;i++) {
                        uart_print_short (rec_block[i]);
                        uart_print_str(".");
                        }
                                uart_print_str("\n");
                                   for  (i =0; i<512;i++) {
                        uart_print_short (rec_blocka[i]);
                        uart_print_str(".");
                        }
                                uart_print_str("\n");
                   for  (i =0; i<512;i++) {
                        uart_print_short (rec_blockb[i]);
                        uart_print_str(".");
                        }
 
 
                uart_print_str("done");
 
 
 
 
    #endif
 
 
 
 
 
 
}
 

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Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [sw/] [sdc_dma/] [main.c] - Blame information for rev 126

Line No.	Rev	Author	Line
1	69	tac2
2
3			`/$$HEADER/`
4			`/******************************************************************************/`
5			`/* */`
6			`/* H E A D E R I N F O R M A T I O N */`
7			`/* */`
8			`/******************************************************************************/`
9
10			`// Project Name : Development Board Debugger Example`
11			`// File Name : main.c`
12			`// Prepared By : jb`
13			`// Project Start : 2009-01-01`
14
15
16			`/$$COPYRIGHT NOTICE/`
17			`/******************************************************************************/`
18			`/* */`
19			`/* C O P Y R I G H T N O T I C E */`
20			`/* */`
21			`/******************************************************************************/`
22
23			`// Copyright (c) ORSoC 2009 All rights reserved.`
24
25			`// The information in this document is the property of ORSoC.`
26			`// Except as specifically authorized in writing by ORSoC, the receiver of`
27			`// this document shall keep the information contained herein confidential and`
28			`// shall protect the same in whole or in part thereof from disclosure and`
29			`// dissemination to third parties. Disclosure and disseminations to the receiver's`
30			`// employees shall only be made on a strict need to know basis.`
31
32
33			`/$$DESCRIPTION/`
34			`/******************************************************************************/`
35			`/* */`
36			`/* D E S C R I P T I O N */`
37			`/* */`
38			`/******************************************************************************/`
39
40			`// Perform some simple functions, used as an example when first using the`
41			`// debug cable and proxy with GDB.`
42
43			`/$$CHANGE HISTORY/`
44			`/******************************************************************************/`
45			`/* */`
46			`/* C H A N G E H I S T O R Y */`
47			`/* */`
48			`/******************************************************************************/`
49
50			`// Date Version Description`
51			`//------------------------------------------------------------------------`
52			`// 090101 1.0 First version jb`
53
54			`/$$INCLUDE FILES/`
55			`/******************************************************************************/`
56			`/* */`
57			`/* I N C L U D E F I L E S */`
58			`/* */`
59			`/******************************************************************************/`
60
61			`#define INCLUDED_FROM_C_FILE`
62
63			`#include "orsocdef.h"`
64			`#include "board.h"`
65			`#include "uart.h"`
66			`#include "sd_controller.h"`
67			`/$$PRIVATE MACROS/`
68			`/******************************************************************************/`
69			`/* */`
70			`/* P R I V A T E M A C R O S */`
71			`/* */`
72			`/******************************************************************************/`
73
74			`/$$GLOBAL VARIABLES/`
75			`/******************************************************************************/`
76			`/* */`
77			`/* G L O B A L V A R I A B L E S */`
78			`/* */`
79			`/******************************************************************************/`
80
81			`/$$PRIVATE VARIABLES/`
82			`/******************************************************************************/`
83			`/* */`
84			`/* P R I V A T E V A R I A B L E S */`
85			`/* */`
86			`/******************************************************************************/`
87
88
89			`/$$FUNCTIONS/`
90			`/******************************************************************************/`
91			`/* */`
92			`/* F U N C T I O N S */`
93			`/* */`
94			`/******************************************************************************/`
95
96
97			`/******************************************************************************/`
98			`/* W R I T E T O EXTERNAL SDRAM 1 */`
99			`/******************************************************************************/`
100
101			`// Write to External SDRAM`
102			`void Write_External_SDRAM_1(void)`
103			`{`
104			`uint32 i;`
105			`uint32 read;`
106			`uint32 range;`
107			`uint32 adr_offset;`
108
109			`range = 0x7ff; // Max range: 0x7fffff`
110			`adr_offset = 0x00000000; // External memory offset`
111
112			`for (i=0x0; i < range; i=i+4) {`
113			`REG32(adr_offset + i) = (adr_offset + i);`
114			`}`
115
116			`for (i=0x0; i < range; i=i+4) {`
117			`read = REG32(adr_offset + i);`
118			`if (read != (adr_offset + i)) {`
119			`while(TRUE){ //ERROR=HALT PROCESSOR`
120			`}`
121			`}`
122			`}`
123			`}`
124
125
126			`/$$EXTERNAL EXEPTIONS/`
127			`/******************************************************************************/`
128			`/* E X T E R N A L E X E P T I O N S */`
129			`/******************************************************************************/`
130
131
132			`void external_exeption()`
133			`{`
134			`REG uint8 i;`
135			`REG uint32 PicSr,sr;`
136
137			`}`
138
139			`/$$MAIN/`
140			`/******************************************************************************/`
141			`/* */`
142			`/* M A I N P R O G R A M */`
143			`/* */`
144			`/******************************************************************************/`
145
146			`struct sd_card_csr {`
147			`unsigned int PAD:18;`
148			`unsigned int CMDI:6;`
149			`unsigned int CMDT:2;`
150			`unsigned int DPS:1;`
151			`unsigned int CICE_s:1;`
152			`unsigned int CRCE_s:1;`
153			`unsigned int RSVD:1;`
154			`unsigned int RTS:2;`
155			`} ;`
156
157
158
159
160
161			`void Start()`
162			`{`
163			`struct sd_card_csr sd_set_reg = (struct sd_card_csr ) (SD_CONTROLLER_BASE+SD_COMMAND);`
164
165			`volatile unsigned long rtn_reg=0;`
166			`volatile unsigned long rtn_reg1=0;`
167
168			`int i;`
169			`unsigned char block[512];`
170			`unsigned char blocka[512];`
171			`unsigned char blockb[512];`
172
173			`unsigned char rec_block[512];`
174			`unsigned char rec_blocka[512];`
175			`unsigned char rec_blockb[512];`
176
177			`//Generate som data to be writen`
178
179			`for (i =0; i<512;i++)`
180			`block[i]=i;`
181
182			`for (i =0; i<512;i++)`
183			`blocka[i]=i+8;`
184
185			`for (i =0; i<512;i++)`
186			`blockb[i]=0xb6;`
187
188			`unsigned long b=0x0001;`
189			`sd_card sd_card_0;`
190
191
192			`uart_init();`
193
194			`sd_card_0 = sd_controller_init();`
195			`if (sd_card_0.Active==1)`
196			`{`
197			`uart_print_str("Init 2 succes!\n");`
198			`uart_print_str("\nvoltage_windows:\n");`
199			`uart_print_long(sd_card_0.Voltage_window);`
200			`uart_print_str("\nRCA_Nr:\n");`
201			`uart_print_long(sd_card_0.rca);`
202			`uart_print_str("\nphys_spec_2_0 Y/N 1/0? :\n");`
203			`uart_print_long(sd_card_0.phys_spec_2_0);`
204			`uart_print_str("\nHCS? :\n");`
205			`uart_print_long(sd_card_0.phys_spec_2_0);`
206			`uart_print_str(":\n");`
207			`}`
208			`else`
209			`uart_print_str("Init2 failed :/!\n");`
210
211
212			`SD_REG(SD_COMMAND) = CMD9 \|WORD_0\| CICE \| CRCE \| RSP_146;`
213			`SD_REG(SD_ARG)=sd_card_0.rca \| 0xf0f0;`
214			`if (!sd_wait_rsp())`
215			`uart_print_str(" send failed :/!\n");`
216			`else{`
217			`uart_print_str("CSD 0 \n");`
218			`uart_print_long( SD_REG(SD_RESP1) ) ;`
219			`uart_print_str(" \n");`
220			`}`
221
222			`uart_print_str("error? \n");`
223			`uart_print_long( SD_REG( SD_ERROR_INT_STATUS) ) ;`
224
225
226			`//Put in transfer state`
227
228
229			`SD_REG(SD_COMMAND) = CMD7 \| CICE \| CRCE \| RSP_48;`
230			`SD_REG(SD_ARG)=sd_card_0.rca \| 0xf0f0;`
231			`if (!sd_wait_rsp())`
232			`uart_print_str("Go send failed :/!\n");`
233
234			`else if ( SD_REG(SD_RESP1) == (CARD_STATUS_STB \| READY_FOR_DATA ) )`
235			`uart_print_str("Ready to transfer data!\n");`
236
237			`//Set block size`
238
239			`SD_REG(SD_COMMAND) = CMD16 \| CICE \| CRCE \| RSP_48;`
240			`SD_REG(SD_ARG)=512;`
241			`if (!sd_wait_rsp())`
242			`uart_print_str("Go send failed :/!\n");`
243			`uart_print_str("Card Status reg CMD16: \n");`
244			`uart_print_long( SD_REG(SD_RESP1) ) ;`
245
246			`//Set Bus width to 4, CMD55 followed by ACMD 6`
247			`REG32(SD_CONTROLLER_BASE+SD_COMMAND) = CMD55\|RSP_48;`
248			`REG32(SD_CONTROLLER_BASE+SD_ARG) =sd_card_0.rca \| 0xf0f0;`
249			`if (!sd_wait_rsp())`
250			`uart_print_str("CMD55 send failed :/!\n");`
251
252			`SD_REG(SD_COMMAND) = ACMD6 \| CICE \| CRCE \| RSP_48;`
253			`SD_REG(SD_ARG)=0x2;`
254			`if (!sd_wait_rsp())`
255			`uart_print_str("ACMD6 send failed :/!\n");`
256
257			`uart_print_str("Card Status reg ACMD6: \n");`
258			`uart_print_long( SD_REG(SD_RESP1) ) ;`
259			`uart_print_str("\n");`
260
261			`int cnt=0;`
262
263			`uart_print_str("FREE BD beg: \n");`
264			`uart_print_long( SD_REG(BD_STATUS) ) ;`
265			`uart_print_str("\n");`
266
267			`SD_REG(BD_TX) = &block;`
268			`SD_REG(BD_TX) = 512;`
269			`SD_REG(BD_TX) = &blocka;`
270			`SD_REG(BD_TX) = 1024;`
271			`SD_REG(BD_TX) = &blockb;`
272			`SD_REG(BD_TX) = 2048;`
273
274			`SD_REG(BD_RX) = &rec_block;`
275			`SD_REG(BD_RX) = 512;`
276			`SD_REG(BD_RX) = &rec_blocka;`
277			`SD_REG(BD_RX) = 1024;`
278			`SD_REG(BD_RX) = &rec_blockb;`
279			`SD_REG(BD_RX) = 2048;`
280
281			`//Check data transfer complete statusbit`
282			`//(An easier way is to check the BD_STATUS and wait for it to get Empty and then check for transfer errors)`
283			`while ( (( SD_REG(BD_ISR) &1) !=1 ) ){`
284			`rtn_reg= SD_REG(BD_ISR) ;`
285			`}`
286			`SD_REG(BD_ISR) =0;`
287			`while ( (( SD_REG(BD_ISR) &1) !=1 ) ){`
288			`rtn_reg= SD_REG(BD_ISR) ;`
289			`}`
290			`SD_REG(BD_ISR) =0;`
291			`while ( (( SD_REG(BD_ISR) &1) !=1 ) ){`
292			`rtn_reg= SD_REG(BD_ISR) ;`
293			`}`
294			`SD_REG(BD_ISR) =0;`
295			`while ( (( SD_REG(BD_ISR) &1) !=1 ) ){`
296			`rtn_reg= SD_REG(BD_ISR) ;`
297			`}`
298			`SD_REG(BD_ISR) =0;`
299			`while ( (( SD_REG(BD_ISR) &1) !=1 ) ){`
300			`rtn_reg= SD_REG(BD_ISR) ;`
301			`}`
302			`SD_REG(BD_ISR) =0;`
303			`while ( (( SD_REG(BD_ISR) &1) !=1 ) ){`
304			`rtn_reg= SD_REG(BD_ISR) ;`
305			`}`
306			`SD_REG(BD_ISR) =0;`
307
308
309
310			`uart_print_str("FREE BD: \n");`
311			`uart_print_long( SD_REG(BD_STATUS) ) ;`
312			`uart_print_str("\n");`
313			`SD_REG(BD_ISR) =0;`
314			`uart_print_str("\n");`
315			`for (i =0; i<512;i++) {`
316			`uart_print_short (rec_block[i]);`
317			`uart_print_str(".");`
318			`}`
319			`uart_print_str("\n");`
320			`for (i =0; i<512;i++) {`
321			`uart_print_short (rec_blocka[i]);`
322			`uart_print_str(".");`
323			`}`
324			`uart_print_str("\n");`
325			`for (i =0; i<512;i++) {`
326			`uart_print_short (rec_blockb[i]);`
327			`uart_print_str(".");`
328			`}`
329
330
331			`uart_print_str("done");`
332
333
334
335
336			`#endif`
337
338
339
340
341
342
343			`}`
344