URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [grpCrc/] [unitCrc/] [sim/] [Makefile] - Blame information for rev 187


# Makefile for simulating crcs
 
include ../../../Makefile.rules
 
all: tbcrc-unattended.sim
 
clean:
        rm -rf vsim.wlf work
 

Line No.	Rev	Author	Line
1	13	rkastl	`# Makefile for simulating crcs`
2	8	rkastl
3	187	rkastl	`include ../../../Makefile.rules`
4	13	rkastl
5			`all: tbcrc-unattended.sim`
6
7	8	rkastl	`clean:`
8			`rm -rf vsim.wlf work`
9	13	rkastl