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[/] [sdr_ctrl/] [trunk/] [verif/] [run/] [run_all] - Blame information for rev 52

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1 5 dinesha
#!/bin/csh -f
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3 29 dinesha
#format
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# run_modesim  
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#    Example ./run_modelsim core SDR_16BIT
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#
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# Option-1:
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#        core - Run the SDRAM core level test case
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#        top  - Run the SDRAM Top level test case
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# Option-2:
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#        SDR-16BIT  - Run 16 Bit SDRAM Test case
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#        SDR-32BIT  - Run 32 Bit SDRAM Test case
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#        SDR-8BIT   - Run 8  Bit SDRAM Test case
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#
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#
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echo "######### SDRAM CORE STAND ALONG TEST CASE ########"
17 5 dinesha
echo "#############################"
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echo " INITIATING SDR 16 BIT Tests"
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echo ##############################
20 29 dinesha
./run_modelsim core SDR_16BIT | tee ../log/core_sdr16_sim.log
21 5 dinesha
 
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echo "#############################"
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echo " INITIATING SDR 32 BIT Tests"
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echo ##############################
25 29 dinesha
./run_modelsim core SDR_32BIT | tee ../log/core_sdr32_sim.log
26 5 dinesha
 
27 19 dinesha
echo "#############################"
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echo " INITIATING SDR 8 BIT Tests"
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echo ##############################
30 29 dinesha
./run_modelsim core SDR_8BIT | tee ../log/core_sdr8_sim.log
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echo "######### SDRAM TOP TEST CASE ########"
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echo "#############################"
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echo " INITIATING SDR 16 BIT Tests"
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echo ##############################
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./run_modelsim top SDR_16BIT | tee ../log/top_sdr16_sim.log
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echo "#############################"
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echo " INITIATING SDR 32 BIT Tests"
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echo ##############################
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./run_modelsim top SDR_32BIT | tee ../log/top_sdr32_sim.log
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echo "#############################"
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echo " INITIATING SDR 8 BIT Tests"
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echo ##############################
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./run_modelsim top SDR_8BIT | tee ../log/top_sdr8_sim.log
49 33 dinesha
 
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./regression_analysis

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