1 |
26 |
jefflieu |
// megafunction wizard: %ALTCLKLOCK%
|
2 |
|
|
// GENERATION: STANDARD
|
3 |
|
|
// VERSION: WM1.0
|
4 |
|
|
// MODULE: altpll
|
5 |
|
|
|
6 |
|
|
// ============================================================
|
7 |
|
|
// File Name: clkgen.v
|
8 |
|
|
// Megafunction Name(s):
|
9 |
|
|
// altpll
|
10 |
|
|
//
|
11 |
|
|
// Simulation Library Files(s):
|
12 |
|
|
// altera_mf
|
13 |
|
|
// ============================================================
|
14 |
|
|
// ************************************************************
|
15 |
|
|
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
16 |
|
|
//
|
17 |
|
|
// 9.0 Build 235 06/17/2009 SP 2 SJ Full Version
|
18 |
|
|
// ************************************************************
|
19 |
|
|
|
20 |
|
|
|
21 |
|
|
//Copyright (C) 1991-2009 Altera Corporation
|
22 |
|
|
//Your use of Altera Corporation's design tools, logic functions
|
23 |
|
|
//and other software and tools, and its AMPP partner logic
|
24 |
|
|
//functions, and any output files from any of the foregoing
|
25 |
|
|
//(including device programming or simulation files), and any
|
26 |
|
|
//associated documentation or information are expressly subject
|
27 |
|
|
//to the terms and conditions of the Altera Program License
|
28 |
|
|
//Subscription Agreement, Altera MegaCore Function License
|
29 |
|
|
//Agreement, or other applicable license agreement, including,
|
30 |
|
|
//without limitation, that your use is for the sole purpose of
|
31 |
|
|
//programming logic devices manufactured by Altera and sold by
|
32 |
|
|
//Altera or its authorized distributors. Please refer to the
|
33 |
|
|
//applicable agreement for further details.
|
34 |
|
|
|
35 |
|
|
|
36 |
|
|
// synopsys translate_off
|
37 |
|
|
`timescale 1 ps / 1 ps
|
38 |
|
|
// synopsys translate_on
|
39 |
|
|
module clkgen (
|
40 |
|
|
inclk0,
|
41 |
|
|
c0,
|
42 |
|
|
c1,
|
43 |
|
|
c2,
|
44 |
|
|
c3);
|
45 |
|
|
|
46 |
|
|
input inclk0;
|
47 |
|
|
output c0;
|
48 |
|
|
output c1;
|
49 |
|
|
output c2;
|
50 |
|
|
output c3;
|
51 |
|
|
|
52 |
|
|
wire [6:0] sub_wire0;
|
53 |
|
|
wire [0:0] sub_wire7 = 1'h0;
|
54 |
|
|
wire [3:3] sub_wire4 = sub_wire0[3:3];
|
55 |
|
|
wire [2:2] sub_wire3 = sub_wire0[2:2];
|
56 |
|
|
wire [1:1] sub_wire2 = sub_wire0[1:1];
|
57 |
|
|
wire [0:0] sub_wire1 = sub_wire0[0:0];
|
58 |
|
|
wire c0 = sub_wire1;
|
59 |
|
|
wire c1 = sub_wire2;
|
60 |
|
|
wire c2 = sub_wire3;
|
61 |
|
|
wire c3 = sub_wire4;
|
62 |
|
|
wire sub_wire5 = inclk0;
|
63 |
|
|
wire [1:0] sub_wire6 = {sub_wire7, sub_wire5};
|
64 |
|
|
|
65 |
|
|
altpll altpll_component (
|
66 |
|
|
.inclk (sub_wire6),
|
67 |
|
|
.clk (sub_wire0),
|
68 |
|
|
.activeclock (),
|
69 |
|
|
.areset (1'b0),
|
70 |
|
|
.clkbad (),
|
71 |
|
|
.clkena ({6{1'b1}}),
|
72 |
|
|
.clkloss (),
|
73 |
|
|
.clkswitch (1'b0),
|
74 |
|
|
.configupdate (1'b0),
|
75 |
|
|
.enable0 (),
|
76 |
|
|
.enable1 (),
|
77 |
|
|
.extclk (),
|
78 |
|
|
.extclkena ({4{1'b1}}),
|
79 |
|
|
.fbin (1'b1),
|
80 |
|
|
.fbmimicbidir (),
|
81 |
|
|
.fbout (),
|
82 |
|
|
.locked (),
|
83 |
|
|
.pfdena (1'b1),
|
84 |
|
|
.phasecounterselect ({4{1'b1}}),
|
85 |
|
|
.phasedone (),
|
86 |
|
|
.phasestep (1'b1),
|
87 |
|
|
.phaseupdown (1'b1),
|
88 |
|
|
.pllena (1'b1),
|
89 |
|
|
.scanaclr (1'b0),
|
90 |
|
|
.scanclk (1'b0),
|
91 |
|
|
.scanclkena (1'b1),
|
92 |
|
|
.scandata (1'b0),
|
93 |
|
|
.scandataout (),
|
94 |
|
|
.scandone (),
|
95 |
|
|
.scanread (1'b0),
|
96 |
|
|
.scanwrite (1'b0),
|
97 |
|
|
.sclkout0 (),
|
98 |
|
|
.sclkout1 (),
|
99 |
|
|
.vcooverrange (),
|
100 |
|
|
.vcounderrange ());
|
101 |
|
|
defparam
|
102 |
|
|
altpll_component.bandwidth_type = "AUTO",
|
103 |
|
|
altpll_component.clk0_divide_by = 1,
|
104 |
|
|
altpll_component.clk0_duty_cycle = 50,
|
105 |
|
|
altpll_component.clk0_multiply_by = 1,
|
106 |
|
|
altpll_component.clk0_phase_shift = "0",
|
107 |
|
|
altpll_component.clk1_divide_by = 1,
|
108 |
|
|
altpll_component.clk1_duty_cycle = 50,
|
109 |
|
|
altpll_component.clk1_multiply_by = 1,
|
110 |
|
|
altpll_component.clk1_phase_shift = "2000",
|
111 |
|
|
altpll_component.clk2_divide_by = 5,
|
112 |
|
|
altpll_component.clk2_duty_cycle = 50,
|
113 |
|
|
altpll_component.clk2_multiply_by = 1,
|
114 |
|
|
altpll_component.clk2_phase_shift = "0",
|
115 |
|
|
altpll_component.clk3_divide_by = 5,
|
116 |
|
|
altpll_component.clk3_duty_cycle = 50,
|
117 |
|
|
altpll_component.clk3_multiply_by = 1,
|
118 |
|
|
altpll_component.clk3_phase_shift = "10000",
|
119 |
|
|
altpll_component.inclk0_input_frequency = 8000,
|
120 |
|
|
altpll_component.intended_device_family = "Arria II GX",
|
121 |
|
|
altpll_component.lpm_type = "altpll",
|
122 |
|
|
altpll_component.operation_mode = "NO_COMPENSATION",
|
123 |
|
|
altpll_component.pll_type = "Left_Right",
|
124 |
|
|
altpll_component.port_activeclock = "PORT_UNUSED",
|
125 |
|
|
altpll_component.port_areset = "PORT_UNUSED",
|
126 |
|
|
altpll_component.port_clkbad0 = "PORT_UNUSED",
|
127 |
|
|
altpll_component.port_clkbad1 = "PORT_UNUSED",
|
128 |
|
|
altpll_component.port_clkloss = "PORT_UNUSED",
|
129 |
|
|
altpll_component.port_clkswitch = "PORT_UNUSED",
|
130 |
|
|
altpll_component.port_configupdate = "PORT_UNUSED",
|
131 |
|
|
altpll_component.port_fbin = "PORT_UNUSED",
|
132 |
|
|
altpll_component.port_fbout = "PORT_UNUSED",
|
133 |
|
|
altpll_component.port_inclk0 = "PORT_USED",
|
134 |
|
|
altpll_component.port_inclk1 = "PORT_UNUSED",
|
135 |
|
|
altpll_component.port_locked = "PORT_UNUSED",
|
136 |
|
|
altpll_component.port_pfdena = "PORT_UNUSED",
|
137 |
|
|
altpll_component.port_phasecounterselect = "PORT_UNUSED",
|
138 |
|
|
altpll_component.port_phasedone = "PORT_UNUSED",
|
139 |
|
|
altpll_component.port_phasestep = "PORT_UNUSED",
|
140 |
|
|
altpll_component.port_phaseupdown = "PORT_UNUSED",
|
141 |
|
|
altpll_component.port_pllena = "PORT_UNUSED",
|
142 |
|
|
altpll_component.port_scanaclr = "PORT_UNUSED",
|
143 |
|
|
altpll_component.port_scanclk = "PORT_UNUSED",
|
144 |
|
|
altpll_component.port_scanclkena = "PORT_UNUSED",
|
145 |
|
|
altpll_component.port_scandata = "PORT_UNUSED",
|
146 |
|
|
altpll_component.port_scandataout = "PORT_UNUSED",
|
147 |
|
|
altpll_component.port_scandone = "PORT_UNUSED",
|
148 |
|
|
altpll_component.port_scanread = "PORT_UNUSED",
|
149 |
|
|
altpll_component.port_scanwrite = "PORT_UNUSED",
|
150 |
|
|
altpll_component.port_clk0 = "PORT_USED",
|
151 |
|
|
altpll_component.port_clk1 = "PORT_USED",
|
152 |
|
|
altpll_component.port_clk2 = "PORT_USED",
|
153 |
|
|
altpll_component.port_clk3 = "PORT_USED",
|
154 |
|
|
altpll_component.port_clk4 = "PORT_UNUSED",
|
155 |
|
|
altpll_component.port_clk5 = "PORT_UNUSED",
|
156 |
|
|
altpll_component.port_clk6 = "PORT_UNUSED",
|
157 |
|
|
altpll_component.port_clk7 = "PORT_UNUSED",
|
158 |
|
|
altpll_component.port_clk8 = "PORT_UNUSED",
|
159 |
|
|
altpll_component.port_clk9 = "PORT_UNUSED",
|
160 |
|
|
altpll_component.port_clkena0 = "PORT_UNUSED",
|
161 |
|
|
altpll_component.port_clkena1 = "PORT_UNUSED",
|
162 |
|
|
altpll_component.port_clkena2 = "PORT_UNUSED",
|
163 |
|
|
altpll_component.port_clkena3 = "PORT_UNUSED",
|
164 |
|
|
altpll_component.port_clkena4 = "PORT_UNUSED",
|
165 |
|
|
altpll_component.port_clkena5 = "PORT_UNUSED",
|
166 |
|
|
altpll_component.using_fbmimicbidir_port = "OFF",
|
167 |
|
|
altpll_component.width_clock = 7;
|
168 |
|
|
|
169 |
|
|
|
170 |
|
|
endmodule
|
171 |
|
|
|
172 |
|
|
// ============================================================
|
173 |
|
|
// CNX file retrieval info
|
174 |
|
|
// ============================================================
|
175 |
|
|
// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
|
176 |
|
|
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
|
177 |
|
|
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
|
178 |
|
|
// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
|
179 |
|
|
// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
|
180 |
|
|
// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
|
181 |
|
|
// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
|
182 |
|
|
// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
|
183 |
|
|
// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
|
184 |
|
|
// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
|
185 |
|
|
// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "1"
|
186 |
|
|
// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
|
187 |
|
|
// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
|
188 |
|
|
// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
|
189 |
|
|
// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
|
190 |
|
|
// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
|
191 |
|
|
// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
|
192 |
|
|
// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1"
|
193 |
|
|
// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "5"
|
194 |
|
|
// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC "5"
|
195 |
|
|
// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
|
196 |
|
|
// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
|
197 |
|
|
// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
|
198 |
|
|
// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING "50.00000000"
|
199 |
|
|
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "125.000000"
|
200 |
|
|
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "125.000000"
|
201 |
|
|
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "25.000000"
|
202 |
|
|
// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING "25.000000"
|
203 |
|
|
// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
|
204 |
|
|
// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
|
205 |
|
|
// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
|
206 |
|
|
// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
|
207 |
|
|
// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
|
208 |
|
|
// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
|
209 |
|
|
// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
|
210 |
|
|
// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "125.000"
|
211 |
|
|
// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
|
212 |
|
|
// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
|
213 |
|
|
// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
|
214 |
|
|
// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
|
215 |
|
|
// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
|
216 |
|
|
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Arria II GX"
|
217 |
|
|
// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
|
218 |
|
|
// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
|
219 |
|
|
// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
|
220 |
|
|
// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "301.136"
|
221 |
|
|
// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
|
222 |
|
|
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
|
223 |
|
|
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
|
224 |
|
|
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "deg"
|
225 |
|
|
// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING "deg"
|
226 |
|
|
// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
|
227 |
|
|
// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
|
228 |
|
|
// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
|
229 |
|
|
// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "1"
|
230 |
|
|
// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC "1"
|
231 |
|
|
// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "0"
|
232 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
|
233 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
|
234 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "100.00000000"
|
235 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING "100.00000000"
|
236 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
|
237 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
|
238 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
|
239 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING "0"
|
240 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
|
241 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
|
242 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
|
243 |
|
|
// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING "MHz"
|
244 |
|
|
// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
|
245 |
|
|
// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
|
246 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
|
247 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "2.00000000"
|
248 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
|
249 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT3 STRING "90.00000000"
|
250 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
|
251 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
|
252 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ns"
|
253 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
|
254 |
|
|
// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING "deg"
|
255 |
|
|
// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
|
256 |
|
|
// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
|
257 |
|
|
// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
|
258 |
|
|
// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
|
259 |
|
|
// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
|
260 |
|
|
// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
|
261 |
|
|
// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
|
262 |
|
|
// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
|
263 |
|
|
// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
|
264 |
|
|
// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
|
265 |
|
|
// Retrieval info: PRIVATE: RECONFIG_FILE STRING "clkgen.mif"
|
266 |
|
|
// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
|
267 |
|
|
// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
|
268 |
|
|
// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "1"
|
269 |
|
|
// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
|
270 |
|
|
// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
|
271 |
|
|
// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
|
272 |
|
|
// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
|
273 |
|
|
// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
|
274 |
|
|
// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
|
275 |
|
|
// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
|
276 |
|
|
// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
|
277 |
|
|
// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
|
278 |
|
|
// Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
|
279 |
|
|
// Retrieval info: PRIVATE: STICKY_CLK3 STRING "1"
|
280 |
|
|
// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
|
281 |
|
|
// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
|
282 |
|
|
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
283 |
|
|
// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
|
284 |
|
|
// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
|
285 |
|
|
// Retrieval info: PRIVATE: USE_CLK2 STRING "1"
|
286 |
|
|
// Retrieval info: PRIVATE: USE_CLK3 STRING "1"
|
287 |
|
|
// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
|
288 |
|
|
// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
|
289 |
|
|
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
|
290 |
|
|
// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
|
291 |
|
|
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
|
292 |
|
|
// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
|
293 |
|
|
// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
|
294 |
|
|
// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
|
295 |
|
|
// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "1"
|
296 |
|
|
// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
|
297 |
|
|
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "1"
|
298 |
|
|
// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "2000"
|
299 |
|
|
// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "5"
|
300 |
|
|
// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
|
301 |
|
|
// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "1"
|
302 |
|
|
// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
|
303 |
|
|
// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC "5"
|
304 |
|
|
// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC "50"
|
305 |
|
|
// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC "1"
|
306 |
|
|
// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING "10000"
|
307 |
|
|
// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "8000"
|
308 |
|
|
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Arria II GX"
|
309 |
|
|
// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
|
310 |
|
|
// Retrieval info: CONSTANT: OPERATION_MODE STRING "NO_COMPENSATION"
|
311 |
|
|
// Retrieval info: CONSTANT: PLL_TYPE STRING "Left_Right"
|
312 |
|
|
// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
|
313 |
|
|
// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
|
314 |
|
|
// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
|
315 |
|
|
// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
|
316 |
|
|
// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
|
317 |
|
|
// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
|
318 |
|
|
// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
|
319 |
|
|
// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
|
320 |
|
|
// Retrieval info: CONSTANT: PORT_FBOUT STRING "PORT_UNUSED"
|
321 |
|
|
// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
|
322 |
|
|
// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
|
323 |
|
|
// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
|
324 |
|
|
// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
|
325 |
|
|
// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
|
326 |
|
|
// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
|
327 |
|
|
// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
|
328 |
|
|
// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
|
329 |
|
|
// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
|
330 |
|
|
// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
|
331 |
|
|
// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
|
332 |
|
|
// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
|
333 |
|
|
// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
|
334 |
|
|
// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
|
335 |
|
|
// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
|
336 |
|
|
// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
|
337 |
|
|
// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
|
338 |
|
|
// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
|
339 |
|
|
// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
|
340 |
|
|
// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
|
341 |
|
|
// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_USED"
|
342 |
|
|
// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
|
343 |
|
|
// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
|
344 |
|
|
// Retrieval info: CONSTANT: PORT_clk6 STRING "PORT_UNUSED"
|
345 |
|
|
// Retrieval info: CONSTANT: PORT_clk7 STRING "PORT_UNUSED"
|
346 |
|
|
// Retrieval info: CONSTANT: PORT_clk8 STRING "PORT_UNUSED"
|
347 |
|
|
// Retrieval info: CONSTANT: PORT_clk9 STRING "PORT_UNUSED"
|
348 |
|
|
// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
|
349 |
|
|
// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
|
350 |
|
|
// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
|
351 |
|
|
// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
|
352 |
|
|
// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
|
353 |
|
|
// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
|
354 |
|
|
// Retrieval info: CONSTANT: USING_FBMIMICBIDIR_PORT STRING "OFF"
|
355 |
|
|
// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "7"
|
356 |
|
|
// Retrieval info: USED_PORT: @clk 0 0 7 0 OUTPUT_CLK_EXT VCC "@clk[6..0]"
|
357 |
|
|
// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
|
358 |
|
|
// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
|
359 |
|
|
// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
|
360 |
|
|
// Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC "c3"
|
361 |
|
|
// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
|
362 |
|
|
// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
|
363 |
|
|
// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
|
364 |
|
|
// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
|
365 |
|
|
// Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3
|
366 |
|
|
// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
|
367 |
|
|
// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
|
368 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen.v TRUE
|
369 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen.ppf TRUE
|
370 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen.inc FALSE
|
371 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen.cmp FALSE
|
372 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen.bsf FALSE
|
373 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen_inst.v FALSE
|
374 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen_bb.v TRUE
|
375 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen_waveforms.html FALSE
|
376 |
|
|
// Retrieval info: GEN_FILE: TYPE_NORMAL clkgen_wave*.jpg FALSE
|
377 |
|
|
// Retrieval info: LIB_FILE: altera_mf
|