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[/] [sgmii/] [trunk/] [build/] [OpenCore_MAC.qip] - Blame information for rev 27

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Line No. Rev Author Line
1 27 jefflieu
#this file is to add Open mac controller files
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set OpenCore_MAC_directory OpenCore_MAC
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/RGMII2GMII.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/GMII2RGMII.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/CLK_DIV2.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/CLK_SWITCH.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/TECH/altera/duram.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/afifo.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Broadcast_filter.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Clk_ctrl.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/CRC_chk.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/CRC_gen.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_clockgen.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_miim.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_outputcontrol.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/eth_shiftreg.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/flow_ctrl.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/GbMAC.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/header.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx_add_chk.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx_ctrl.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_rx_FF.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_top.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx_addr_add.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx_Ctrl.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/MAC_tx_FF.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Phy_int.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/Ramdon_gen.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/reg_int.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON_addr_gen.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON_ctrl.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/RMON_dpram.v
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set_global_assignment -name VERILOG_FILE $OpenCore_MAC_directory/timescale.v
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set_global_assignment -name QIP_FILE $OpenCore_MAC_directory/TECH/altera/DDR_O.qip
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set_global_assignment -name QIP_FILE $OpenCore_MAC_directory/TECH/altera/DDR_I.qip
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set_global_assignment -name QIP_FILE $OpenCore_MAC_directory/LoopbackFF/lpbff.qip

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