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jefflieu |
#####################################################################################
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# Copyright (C) 1991-2009 Altera Corporation
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# Any megafunction design, and related netlist (encrypted or decrypted),
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# support information, device programming or simulation file, and any other
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# associated documentation or information provided by Altera or a partner
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# under Altera's Megafunction Partnership Program may be used only
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# to program PLD devices (but not masked PLD devices) from Altera. Any
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# other use of such megafunction design, netlist, support information,
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# device programming or simulation file, or any other related documentation
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# or information is prohibited for any other purpose, including, but not
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# limited to modification, reverse engineering, de-compiling, or use with
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# any other silicon devices, unless such use is explicitly licensed under
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# a separate agreement with Altera or a megafunction partner. Title to the
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# intellectual property, including patents, copyrights, trademarks, trade
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# secrets, or maskworks, embodied in any such megafunction design, netlist,
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# support information, device programming or simulation file, or any other
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# related documentation or information provided by Altera or a megafunction
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# partner, remains with Altera, the megafunction partner, or their respective
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# licensors. No other licenses, including any licenses needed under any third
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# party's intellectual property, are provided herein.
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#####################################################################################
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#####################################################################################
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# Altera Triple-Speed Ethernet Megacore TCL constraint file
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#
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# Generated on Sat Feb 25 11:16:45 SGT 2012
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#
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#####################################################################################
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# Generated TSE variation - Do not modify
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# General Option
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set IS_SOPC 0
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set VARIATION_NAME "sgmii"
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set DEVICE_FAMILY "CYCLONEIVGX"
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set FROM_THE_VARIATION_NAME ""
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set TO_THE_VARIATION_NAME ""
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# MAC Option
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set IS_MAC 0
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set NUMBER_OF_CHANNEL 1
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set IS_SMALLMAC 0
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set IS_SMALLMAC_GIGE 0
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set IS_FIFOLESS 0
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set IS_HALFDUPLEX 0
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set MII_INTERFACE "MII_GMII"
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# PCS Option
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set IS_PCS 1
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set IS_SGMII 1
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# PMA Option
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set IS_PMA 1
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set TRANSCEIVER_TYPE 0
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# GXB Option
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set IS_POWERDOWN 1
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if { [ expr ( $IS_SOPC == 1 )] } {
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set FROM_THE_VARIATION_NAME "_from_the_$VARIATION_NAME"
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set TO_THE_VARIATION_NAME "_to_the_$VARIATION_NAME"
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} else {
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set FROM_THE_VARIATION_NAME ""
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set TO_THE_VARIATION_NAME ""
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}
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if { [ expr ( $IS_FIFOLESS == 0 )] } {
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# macPcs=
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if { [ expr ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 0)] } {
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#Optimize I/O timing for TBI interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d${TO_THE_VARIATION_NAME}
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d${FROM_THE_VARIATION_NAME}
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}
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# pcs=
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if { [ expr ($IS_MAC == 0) && ($IS_PCS == 1) && ($IS_PMA == 0)] } {
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#Optimize I/O timing for MII interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_en
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_err
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_col
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_crs
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_en
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_err
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#Optimize I/O timing for GMII interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_en
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_err
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_dv
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_err
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#Optimize I/O timing for TBI interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d
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}
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# pcsPma=
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if { [ expr ($IS_MAC == 0) && ($IS_PCS == 1) && ($IS_PMA == 1)] } {
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#Optimize I/O timing for MII interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_en
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_tx_err
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_col
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_crs
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_en
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_rx_err
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#Optimize I/O timing for GMII interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_en
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_tx_err
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_dv
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_rx_err
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}
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# pmaTransceiver=
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if { [ expr ($IS_PCS == 1) && ($IS_PMA == 1)] } {
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if { [ expr ($TRANSCEIVER_TYPE == 0)] } {
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if { [string match $DEVICE_FAMILY "STRATIXIV"]} {
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#Optimize I/O timing for serdes interface
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set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to txp
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set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to rxp
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} else {
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# pmaTransceiverStratixIV=
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#Optimize I/O timing for serdes interface
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to txp
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rxp
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}
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}
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if { [ expr ($TRANSCEIVER_TYPE == 1)] } {
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# pmaLvds=
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#Constrain MAC PCS reference clock
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set_instance_assignment -name GLOBAL_SIGNAL ON -to ref_clk
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#Optimize I/O timing for serdes interface
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set_instance_assignment -name IO_STANDARD LVDS -to ref_clk
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set_instance_assignment -name IO_STANDARD LVDS -to txp
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set_instance_assignment -name IO_STANDARD LVDS -to rxp
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}
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}
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# gmii=
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if { [ expr ($IS_MAC == 1) && ($IS_PCS == 0) && ($IS_PMA == 0) && ([string match $MII_INTERFACE "MII_GMII"]) ] } {
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#Optimize I/O timing for GMII network-side interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_dv
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_err
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_en
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_err
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#Optimize I/O timing for MII network-side interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_col
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_crs
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_d
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_en
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_err
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_d
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_en
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_err
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}
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# rgmii=
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if { [ expr ($IS_MAC == 1) && ($IS_PCS == 0) && ($IS_PMA == 0) && ([string match $MII_INTERFACE "RGMII"])] } {
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#Optimize I/O timing for RGMII network-side interface
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to rx_control
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to rgmii_in
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tx_control
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to rgmii_out
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}
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} else {
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if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 0) && ($IS_PMA == 0) ] } {
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set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk${TO_THE_VARIATION_NAME}
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set_instance_assignment -name GLOBAL_SIGNAL ON -to reset${TO_THE_VARIATION_NAME}
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for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
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| 206 |
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if { [ expr [string match $MII_INTERFACE "MII_GMII"] ] } {
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#Optimize I/O timing for MII network-side interface
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if { [ expr $IS_HALFDUPLEX != 0 ] } {
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_col_${x}${TO_THE_VARIATION_NAME}
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_crs_${x}${TO_THE_VARIATION_NAME}
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}
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_d_${x}${TO_THE_VARIATION_NAME}
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| 214 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_en_${x}${TO_THE_VARIATION_NAME}
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| 215 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to m_rx_err_${x}${TO_THE_VARIATION_NAME}
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| 216 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_d_${x}${FROM_THE_VARIATION_NAME}
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| 217 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_en_${x}${FROM_THE_VARIATION_NAME}
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| 218 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to m_tx_err_${x}${FROM_THE_VARIATION_NAME}
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| 219 |
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#Optimize I/O timing for GMII network-side interface
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| 221 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_d_${x}${TO_THE_VARIATION_NAME}
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| 222 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_dv_${x}${TO_THE_VARIATION_NAME}
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| 223 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to gm_rx_err_${x}${TO_THE_VARIATION_NAME}
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| 224 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_d_${x}${FROM_THE_VARIATION_NAME}
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| 225 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_en_${x}${FROM_THE_VARIATION_NAME}
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| 226 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to gm_tx_err_${x}${FROM_THE_VARIATION_NAME}
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| 227 |
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| 228 |
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set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to rx_clk_${x}${TO_THE_VARIATION_NAME}
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| 229 |
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set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to tx_clk_${x}${TO_THE_VARIATION_NAME}
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| 230 |
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| 231 |
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}
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| 232 |
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| 233 |
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if { [ expr [string match $MII_INTERFACE "RGMII"] ] } {
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| 234 |
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| 235 |
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#Optimize I/O timing for RGMII network-side interface
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| 236 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to rx_control_${x}${TO_THE_VARIATION_NAME}
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| 237 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to rgmii_in_${x}${TO_THE_VARIATION_NAME}
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| 238 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tx_control_${x}${FROM_THE_VARIATION_NAME}
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| 239 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to rgmii_out_${x}${FROM_THE_VARIATION_NAME}
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| 240 |
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set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to rx_clk_${x}${TO_THE_VARIATION_NAME}
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| 241 |
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#set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to tx_clk_${x}${TO_THE_VARIATION_NAME}
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| 242 |
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| 243 |
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| 244 |
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}
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| 245 |
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| 246 |
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}
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| 247 |
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}
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| 248 |
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| 249 |
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if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 0) ] } {
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| 250 |
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set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk${TO_THE_VARIATION_NAME}
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| 251 |
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set_instance_assignment -name GLOBAL_SIGNAL ON -to reset${TO_THE_VARIATION_NAME}
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| 252 |
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set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to ref_clk${TO_THE_VARIATION_NAME}
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| 253 |
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| 254 |
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for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
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| 255 |
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#Optimize I/O timing for TBI interface
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| 256 |
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to tbi_rx_d_${x}${TO_THE_VARIATION_NAME}
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| 257 |
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to tbi_tx_d_${x}${FROM_THE_VARIATION_NAME}
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| 258 |
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set_instance_assignment -name GLOBAL_SIGNAL "REGIONAL CLOCK" -to tbi_rx_clk_${x}${FROM_THE_VARIATION_NAME}
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| 259 |
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}
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| 260 |
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}
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| 261 |
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| 262 |
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| 263 |
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if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 1) ] } {
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| 264 |
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set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk${TO_THE_VARIATION_NAME}
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| 265 |
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set_instance_assignment -name GLOBAL_SIGNAL ON -to reset${TO_THE_VARIATION_NAME}
|
| 266 |
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set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to ref_clk${TO_THE_VARIATION_NAME}
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| 267 |
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}
|
| 268 |
|
|
|
| 269 |
|
|
|
| 270 |
|
|
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 1) && ($TRANSCEIVER_TYPE == 0) ] } {
|
| 271 |
|
|
for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
|
| 272 |
|
|
if { [string match $DEVICE_FAMILY "STRATIXIV"]} {
|
| 273 |
|
|
#Optimize I/O timing for serdes interface
|
| 274 |
|
|
set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to txp_${x}${FROM_THE_VARIATION_NAME}
|
| 275 |
|
|
set_instance_assignment -name IO_STANDARD "1.4-V PCML" -to rxp_${x}${TO_THE_VARIATION_NAME}
|
| 276 |
|
|
} else {
|
| 277 |
|
|
#Optimize I/O timing for serdes interface
|
| 278 |
|
|
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to txp_${x}${FROM_THE_VARIATION_NAME}
|
| 279 |
|
|
set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rxp_${x}${TO_THE_VARIATION_NAME}
|
| 280 |
|
|
}
|
| 281 |
|
|
|
| 282 |
|
|
}
|
| 283 |
|
|
}
|
| 284 |
|
|
|
| 285 |
|
|
|
| 286 |
|
|
if { [ expr ($IS_FIFOLESS == 1) && ($IS_MAC == 1) && ($IS_PCS == 1) && ($IS_PMA == 1) && ($TRANSCEIVER_TYPE == 1) ] } {
|
| 287 |
|
|
|
| 288 |
|
|
set_instance_assignment -name IO_STANDARD LVDS -to ref_clk${TO_THE_VARIATION_NAME}
|
| 289 |
|
|
|
| 290 |
|
|
for {set x 0} {$x < $NUMBER_OF_CHANNEL} {incr x} {
|
| 291 |
|
|
set_instance_assignment -name IO_STANDARD LVDS -to txp_${x}${FROM_THE_VARIATION_NAME}
|
| 292 |
|
|
set_instance_assignment -name IO_STANDARD LVDS -to rxp_${x}${TO_THE_VARIATION_NAME}
|
| 293 |
|
|
}
|
| 294 |
|
|
}
|
| 295 |
|
|
|
| 296 |
|
|
}
|
| 297 |
|
|
|
| 298 |
|
|
if { [ expr [string match $DEVICE_FAMILY "ARRIAV"] ] } {
|
| 299 |
|
|
set_instance_assignment -name GLOBAL_SIGNAL OFF -to *reset_ff_wr
|
| 300 |
|
|
set_instance_assignment -name GLOBAL_SIGNAL OFF -to *reset_ff_rd
|
| 301 |
|
|
|
| 302 |
|
|
if { [ expr !(($IS_PCS == 1) && ($IS_PMA == 1) && ($TRANSCEIVER_TYPE == 1))] } {
|
| 303 |
|
|
set_instance_assignment -name GLOBAL_SIGNAL OFF -to *reset_sync_*|altera_tse_reset_synchronizer_chain[0]
|
| 304 |
|
|
}
|
| 305 |
|
|
}
|
| 306 |
|
|
|
| 307 |
|
|
export_assignments
|
| 308 |
|
|
|
