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[/] [sgmii/] [trunk/] [sim/] [Veritil.v] - Blame information for rev 21
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jefflieu |
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/*
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Include this file after module
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*/
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integer ErrorCnt=0;
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integer ErrorCode=0;
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initial begin
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ErrorCnt=0;
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ErrorCode=0;
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end
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jefflieu |
`define Info(Message) $display("I@(%d):%s",$time,Message);
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jefflieu |
`define CheckE(Signal,Value,SignalName) if(Signal!==Value) begin \
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$display("E@(%d): expect %x, actual %x (%s,%s,%d)",$time,Value,Signal,SignalName,`__FILE__,`__LINE__); \
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ErrorCnt=ErrorCnt+1;\
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end
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`define CheckF(Signal,Value,SignalName) if(Signal!==Value) begin \
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$display("F@(%d): expect %x, actual %x (%s,%s,%d)",$time,Value,Signal,SignalName,`__FILE__,`__LINE__); \
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$stop(1);\
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end
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`define CheckW(Signal,Value,SignalName) if(Signal!==Value) begin \
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$display("W@(%d): expect %x, actual %x (%s,%s,%d)",$time,Value,Signal,SignalName,`__FILE__,`__LINE__); \
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end
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`define WaitTil(Signal,Value,Clk,Message) while(Signal!==Value) begin @(posedge Clk);#0.001;end \
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$display(Message);
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`define WaitTilRise(Signal) @(posedge Signal);#0.001;
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`define WaitTilRall(Signal) @(negedge Signal);#0.001;
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