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[/] [sgmii/] [trunk/] [src/] [mTransmit.v] - Blame information for rev 2

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/*
Developed By Subtleware Corporation Pte Ltd 2011
File            :
Description     :
Remarks         :
Revision        :
        Date    Author          Description
02/09/12        Jefflieu
*/
 
 
`include "SGMIIDefs.v"
 
module mTransmit(
        input   [02:00] i3_Xmit,
        input   [15:00] i16_ConfigReg,
 
        input   i_TxEN,
        input   i_TxER,
        input   [07:00] i8_TxD,
 
 
        output  reg o_Xmitting,
        output  reg o_TxEven,
        output  reg [07:00]     o8_TxCodeGroupOut,
        output  o_TxCodeValid,
        output  reg o_TxCodeCtrl,
        input   i_CurrentParity,
 
        input   i_Clk,
        input   i_ARst_L);
 
/*
        - Transmit order set Statemachine       : OSState
*/
 
        localparam      stTX_TEST       = 24'h000001;   //Initial State
        localparam      stCONFIG_C1A= 24'h000002;       //Configuration phase
        localparam      stCONFIG_C1B= 24'h000004;       //Configuration phase
        localparam      stCONFIG_C1C= 24'h000008;       //Configuration phase
        localparam      stCONFIG_C1D= 24'h000010;       //Configuration phase
        localparam      stCONFIG_C2A= 24'h000020;       //Configuration phase
        localparam      stCONFIG_C2B= 24'h000040;       //Configuration phase
        localparam      stCONFIG_C2C= 24'h000080;       //Configuration phase
        localparam      stCONFIG_C2D= 24'h000100;       //Configuration phase
        localparam      stTX_IDLE       = 24'h000200;   //IDLE Phase, Trasmitting Comma Character, this is to wait to sync with the MAC's packet
        localparam  stXMIT_DATA = 24'h000400;   //Data Phase, Trasmitting Comma Character
        localparam  stIDLE_DATA = 24'h000800;   //Trasmitting Data Character of /I/ Ordered Set
        localparam      stTX_SOP        = 24'h001000;   //Transmitting SOP
        localparam      stTX_PKT        = 24'h002000;   //False state
        localparam      stTX_DATA       = 24'h004000;   //Transmitting Data
        localparam      stTX_EOP        = 24'h008000;   //End of packet without any extension, tramitting T
        localparam  stTX_EOP_EXT= 24'h010000;   //End of packet with extension
        localparam      stTX_EXT_1      = 24'h020000;   //Extend 1 cycle to align the COMMA to Even Code group
        localparam      stEPD2_NOEXT= 24'h040000;       //Second Cycle of EPD, transmitting /R/
        localparam      stEPD3          = 24'h080000;   //Third Cycle of EPD, transmitting /R/
        localparam      stCARR_EXT      = 24'h100000;   //Carrier extension
        localparam      stALIGN_ERR     = 24'h200000;   //Repeater's state, we don't use this, go straight to START ERR
        localparam      stSTART_ERR     = 24'h400000;   //Repeater's state
        localparam      stTX_ERR        = 24'h800000;   //Repeater's state
 
 
        reg     [23:00] r24_State;
        reg     [23:00] w24_NxtState;
 
 
        wire    w_XmitChange;
        reg     [02:00] r3_LstXmit;
        reg             r_TxEven;
        wire    w_TxOSIndicate;
 
 
        wire    w_FifoTxEn;
        wire    w_FifoTxEr;
        wire [07:00]    w8_FifoData;
        wire    w_UpdateXmitChange;
        wire    w_ResetState;
        wire    r_ToTxData;                             //This signal used in txIDLE_DATA state to comeback to TXIDLE or TXDATA
        wire    w_Disparity;
        wire [09:00] w10_FifoDin;
        wire [09:00] w10_FifoQ;
        wire w_FifoRd,w_FifoEmpty;
        reg      [07:00] r8_TxData;
 
        assign w_XmitChange = (r3_LstXmit!=i3_Xmit)?1'b1:1'b0;
        assign w_TxOSIndicate = (r24_State==stCONFIG_C1A||r24_State==stCONFIG_C1B||r24_State==stCONFIG_C1C||
                                                                r24_State==stCONFIG_C2A||r24_State==stCONFIG_C2B||r24_State==stCONFIG_C2C||
                                                                        r24_State==stTX_IDLE||r24_State==stTX_DATA)?1'b0:1'b1;
        //assign w_UpdateXmitChange = 
        //FIFO
        assign w10_FifoDin = {i_TxEN,i_TxER,i8_TxD};
        assign w_FifoTxEn = w10_FifoQ[9] & (~w_FifoEmpty);
        assign w_FifoTxEr = w10_FifoQ[8] & (~w_FifoEmpty);
        assign w8_FifoData = w10_FifoQ[7:0];
        mSyncFifo #(.pDataWidth(10),.pPtrWidth(2)) u0SyncFifo (
                .iv_Din(w10_FifoDin),
                .i_Wr((i_TxEN|i_TxER)),
                .i_Rd(w_FifoRd),
                .o_Empty(w_FifoEmpty),
                .o_Full(),
                .ov_Q(w10_FifoQ),
                .i_Clk(i_Clk),
                .i_ARst_L(i_ARst_L));
        //END FIFO
        assign w_FifoRd = ((w_FifoTxEn && (r24_State==stXMIT_DATA||r24_State==stTX_IDLE)))?1'b0:1'b1;
 
        always@(posedge i_Clk or negedge i_ARst_L)
        if(i_ARst_L==1'b0) begin
                r24_State       <= stTX_TEST;
                r3_LstXmit  <= 3'b000;
                r_TxEven        <= 1'b0;
                end
        else
                begin
                if(w_UpdateXmitChange) r3_LstXmit <= i3_Xmit;
                r24_State <= w24_NxtState;
                r_TxEven <= ~r_TxEven;
                o_TxEven <= r_TxEven;
                end
 
        assign w_UpdateXmitChange = w_ResetState;
        assign w_ResetState = (i_ARst_L==1'b0)||(w_XmitChange && (r_TxEven==1'b0) && w_TxOSIndicate);
        assign w_Disparity = i_CurrentParity;
        always@(*)
        begin
                if(w_ResetState)
                r24_State <= stTX_TEST;
                case(r24_State)
                stTX_TEST               :       if(i3_Xmit==`cXmitCONFIG && r_TxEven==1'b0) w24_NxtState <= stCONFIG_C1A; else
                                                        if(i3_Xmit==`cXmitIDLE || (i3_Xmit==`cXmitDATA && (w_FifoTxEn || w_FifoTxEr))) w24_NxtState <= stTX_IDLE; else
                                                        if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA;
                                                        else w24_NxtState <= stTX_TEST;
                stCONFIG_C1A    :       w24_NxtState <= stCONFIG_C1B;
                stCONFIG_C1B    :       w24_NxtState <= stCONFIG_C1C;
                stCONFIG_C1C    :       w24_NxtState <= stCONFIG_C1D;
                stCONFIG_C1D    :       if(i3_Xmit==`cXmitCONFIG) w24_NxtState <= stCONFIG_C2A; else
                                                        if(i3_Xmit==`cXmitIDLE || (i3_Xmit==`cXmitDATA && (w_FifoTxEn || w_FifoTxEr))) w24_NxtState <= stTX_IDLE; else
                                                        if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA; else
                                                        w24_NxtState <= stTX_ERR;
                stCONFIG_C2A    :       w24_NxtState <= stCONFIG_C2B;
                stCONFIG_C2B    :       w24_NxtState <= stCONFIG_C2C;
                stCONFIG_C2C    :       w24_NxtState <= stCONFIG_C2D;
                stCONFIG_C2D    :       if(i3_Xmit==`cXmitCONFIG) w24_NxtState <= stCONFIG_C1A; else
                                                        if(i3_Xmit==`cXmitIDLE || (i3_Xmit==`cXmitDATA && (w_FifoTxEn || w_FifoTxEr))) w24_NxtState <= stTX_IDLE; else
                                                        if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA; else
                                                        w24_NxtState <= stTX_ERR;
 
                stTX_IDLE               :       w24_NxtState <= stIDLE_DATA;
                stIDLE_DATA             :       if(r_ToTxData==1'b0) begin //Data phase of TX_IDLE
                                                                if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA; else
                                                                w24_NxtState <= stTX_IDLE;
                                                                end
                                                        else
                                                                begin
                                                                        if(w_FifoTxEn & (~w_FifoTxEr)) w24_NxtState <= stTX_SOP; else
                                                                        if(w_FifoTxEn & w_FifoTxEr) w24_NxtState <= stSTART_ERR; else
                                                                        w24_NxtState <= stXMIT_DATA;
                                                                end
                stXMIT_DATA             :       w24_NxtState <= stIDLE_DATA;
                stTX_DATA               :       if(w_FifoTxEn) w24_NxtState <= stTX_DATA; else
                                                        if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EOP; else
                                                        w24_NxtState <= stTX_EOP_EXT;
                stTX_SOP                :       if(w_FifoTxEn) w24_NxtState <= stTX_DATA; else
                                                        if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EOP; else
                                                        w24_NxtState <= stTX_EOP_EXT;
                stTX_EOP                :       w24_NxtState <= stEPD2_NOEXT;
                stEPD2_NOEXT    :       if(r_TxEven) w24_NxtState <= stEPD3; else
                                                        w24_NxtState <= stXMIT_DATA;
                stEPD3                  :       w24_NxtState <= stXMIT_DATA;
                stTX_EOP_EXT    :       if(~w_FifoTxEr) w24_NxtState <= stTX_EXT_1; else w24_NxtState <= stCARR_EXT;
                stTX_EXT_1              :       w24_NxtState <= stEPD2_NOEXT;
                stCARR_EXT              :       if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EXT_1; else
                                                        if(w_FifoTxEn & (~w_FifoTxEr)) w24_NxtState <= stTX_SOP; else
                                                        if(w_FifoTxEn & w_FifoTxEr) w24_NxtState <= stSTART_ERR; else
                                                        w24_NxtState <= stCARR_EXT;
 
                //stALIGN_ERR           :       
                stSTART_ERR             :       w24_NxtState <= stTX_ERR;
                stTX_ERR                :       if(w_FifoTxEn) w24_NxtState <= stTX_DATA; else
                                                        if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EOP; else
                                                        w24_NxtState <= stTX_EOP_EXT;
                endcase
        end
 
 
        assign o_TxCodeValid = 1'b1;
 
        always@(posedge i_Clk or negedge i_ARst_L)
        if(i_ARst_L==1'b0) begin
                o_Xmitting <= 1'b0;
                o_TxCodeCtrl <= 1'b0;
                o8_TxCodeGroupOut <= 8'h00;
        end else begin
                case(w24_NxtState)
                stTX_TEST               :       begin
                                                        o_Xmitting <= 1'b0;
                                                        end
                stCONFIG_C1A    :       begin
                                                        o8_TxCodeGroupOut <= `K28_5;
                                                        o_TxCodeCtrl <= 1'b1;
                                                        end
                stCONFIG_C1B    :       begin
                                                        o8_TxCodeGroupOut <= `D21_5;
                                                        o_TxCodeCtrl <= 1'b0;
                                                        end
                stCONFIG_C1C    :       o8_TxCodeGroupOut <= i16_ConfigReg[07:00];
                stCONFIG_C1D    :       o8_TxCodeGroupOut <= i16_ConfigReg[15:08];
 
                stCONFIG_C2A    :       begin
                                                        o8_TxCodeGroupOut <= `K28_5;
                                                        o_TxCodeCtrl <= 1'b1;
                                                        end
                stCONFIG_C2B    :       begin
                                                        o8_TxCodeGroupOut <= `D2_2;
                                                        o_TxCodeCtrl <= 1'b0;
                                                        end
                stCONFIG_C2C    :       o8_TxCodeGroupOut <= i16_ConfigReg[07:00];
                stCONFIG_C2D    :       o8_TxCodeGroupOut <= i16_ConfigReg[15:08];
                stTX_IDLE               :       begin
                                                        o8_TxCodeGroupOut <= `K28_5;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        end
                stIDLE_DATA             :       begin
                                                        o8_TxCodeGroupOut <= (w_Disparity==1'b0)?`D5_6:`D16_2;//Disparity = 0 means positive
                                                        o_TxCodeCtrl    <= 1'b0;
                                                        end
                stXMIT_DATA             :       begin
                                                        o8_TxCodeGroupOut <= `K28_5;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        end
                stTX_DATA               :       if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)||(w_FifoTxEn & w_FifoTxEr))
                                                        begin
                                                                o8_TxCodeGroupOut <= `K30_7;
                                                                o_TxCodeCtrl    <= 1'b1;
                                                        end else
                                                        begin
                                                                o8_TxCodeGroupOut <= w8_FifoData;
                                                                o_TxCodeCtrl <= 1'b0;
                                                        end
                stTX_SOP                :       begin
                                                        o_Xmitting      <= 1'b1;
                                                        o8_TxCodeGroupOut <= `K27_7;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        end
                stTX_EOP                :       begin
                                                        o8_TxCodeGroupOut <= `K29_7;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        o_Xmitting <= (~r_TxEven);
                                                        end
                stEPD2_NOEXT    :       begin
                                                        o8_TxCodeGroupOut <= `K23_7;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        o_Xmitting <= 1'b0;
                                                        end
                stEPD3                  :       begin
                                                        o8_TxCodeGroupOut <= `K23_7;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        end
                stTX_EOP_EXT    :       if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)||(w_FifoTxEn & w_FifoTxEr))
                                                        begin
                                                                o8_TxCodeGroupOut <= `K30_7;
                                                                o_TxCodeCtrl    <= 1'b1;
                                                        end else
                                                        begin
                                                                o8_TxCodeGroupOut <= `K29_7;
                                                                o_TxCodeCtrl    <= 1'b1;
                                                        end
                stTX_EXT_1              :       begin
                                                        o_Xmitting <= (~r_TxEven);
                                                                if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)||(w_FifoTxEn & w_FifoTxEr))
                                                                begin
                                                                        o8_TxCodeGroupOut <= `K30_7;
                                                                        o_TxCodeCtrl    <= 1'b1;
 
                                                                end else
                                                                begin
                                                                        o8_TxCodeGroupOut <= `K23_7;
                                                                        o_TxCodeCtrl    <= 1'b1;
                                                                end
                                                        end
                stCARR_EXT              :       if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)||(w_FifoTxEn & w_FifoTxEr))
                                                        begin
                                                                o8_TxCodeGroupOut <= `K30_7;
                                                                o_TxCodeCtrl    <= 1'b1;
                                                        end else
                                                        begin
                                                                o8_TxCodeGroupOut <= `K23_7;
                                                                o_TxCodeCtrl    <= 1'b1;
                                                        end
 
                //stALIGN_ERR           :       
                stSTART_ERR             :       begin
                                                        o8_TxCodeGroupOut       <= `K27_7;
                                                        o_TxCodeCtrl            <= 1'b1;
                                                        o_Xmitting                      <= 1'b1;
                                                        end
                stTX_ERR                :       begin
                                                        o8_TxCodeGroupOut <= `K30_7;
                                                        o_TxCodeCtrl    <= 1'b1;
                                                        end
                endcase
        end
 
//synthesis translate_off       
        reg [239:0] r240_TxStateName;
        always@(*)
        case(r24_State)
        stTX_TEST               : r240_TxStateName<="stTX_TEST  ";
        stCONFIG_C1A    : r240_TxStateName<="stCONFIG_C1A";
        stCONFIG_C1B    : r240_TxStateName<="stCONFIG_C1B";
        stCONFIG_C1C    : r240_TxStateName<="stCONFIG_C1C";
        stCONFIG_C1D    : r240_TxStateName<="stCONFIG_C1D";
        stCONFIG_C2A    : r240_TxStateName<="stCONFIG_C2A";
        stCONFIG_C2B    : r240_TxStateName<="stCONFIG_C2B";
        stCONFIG_C2C    : r240_TxStateName<="stCONFIG_C2C";
        stCONFIG_C2D    : r240_TxStateName<="stCONFIG_C2D";
        stTX_IDLE           : r240_TxStateName<="stTX_IDLE       ";
        stXMIT_DATA         : r240_TxStateName<="stXMIT_DATA";
        stIDLE_DATA         : r240_TxStateName<="stIDLE_DATA";
        stTX_SOP            : r240_TxStateName<="stTX_SOP        ";
        stTX_PKT            : r240_TxStateName<="stTX_PKT        ";
        stTX_DATA       : r240_TxStateName<="stTX_DATA   ";
        stTX_EOP            : r240_TxStateName<="stTX_EOP        ";
        stTX_EOP_EXT    : r240_TxStateName<="stTX_EOP_EXT";
        stTX_EXT_1          : r240_TxStateName<="stTX_EXT_1      ";
        stEPD2_NOEXT    : r240_TxStateName<="stEPD2_NOEXT";
        stEPD3              : r240_TxStateName<="stEPD3          ";
        stCARR_EXT          : r240_TxStateName<="stCARR_EXT      ";
        stALIGN_ERR         : r240_TxStateName<="stALIGN_ERR";
        stSTART_ERR         : r240_TxStateName<="stSTART_ERR";
        stTX_ERR            : r240_TxStateName<="stTX_ERR        ";
        endcase
//synthesis translate_on
endmodule

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[/] [sgmii/] [trunk/] [src/] [mTransmit.v] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	jefflieu	`/*`
2			`Developed By Subtleware Corporation Pte Ltd 2011`
3			`File :`
4			`Description :`
5			`Remarks :`
6			`Revision :`
7			`Date Author Description`
8			`02/09/12 Jefflieu`
9			`*/`
10
11
12			`include "SGMIIDefs.v"
13
14			`module mTransmit(`
15			`input [02:00] i3_Xmit,`
16			`input [15:00] i16_ConfigReg,`
17
18			`input i_TxEN,`
19			`input i_TxER,`
20			`input [07:00] i8_TxD,`
21
22
23			`output reg o_Xmitting,`
24			`output reg o_TxEven,`
25			`output reg [07:00] o8_TxCodeGroupOut,`
26			`output o_TxCodeValid,`
27			`output reg o_TxCodeCtrl,`
28			`input i_CurrentParity,`
29
30			`input i_Clk,`
31			`input i_ARst_L);`
32
33			`/*`
34			`- Transmit order set Statemachine : OSState`
35			`*/`
36
37			`localparam stTX_TEST = 24'h000001; //Initial State`
38			`localparam stCONFIG_C1A= 24'h000002; //Configuration phase`
39			`localparam stCONFIG_C1B= 24'h000004; //Configuration phase`
40			`localparam stCONFIG_C1C= 24'h000008; //Configuration phase`
41			`localparam stCONFIG_C1D= 24'h000010; //Configuration phase`
42			`localparam stCONFIG_C2A= 24'h000020; //Configuration phase`
43			`localparam stCONFIG_C2B= 24'h000040; //Configuration phase`
44			`localparam stCONFIG_C2C= 24'h000080; //Configuration phase`
45			`localparam stCONFIG_C2D= 24'h000100; //Configuration phase`
46			`localparam stTX_IDLE = 24'h000200; //IDLE Phase, Trasmitting Comma Character, this is to wait to sync with the MAC's packet`
47			`localparam stXMIT_DATA = 24'h000400; //Data Phase, Trasmitting Comma Character`
48			`localparam stIDLE_DATA = 24'h000800; //Trasmitting Data Character of /I/ Ordered Set`
49			`localparam stTX_SOP = 24'h001000; //Transmitting SOP`
50			`localparam stTX_PKT = 24'h002000; //False state`
51			`localparam stTX_DATA = 24'h004000; //Transmitting Data`
52			`localparam stTX_EOP = 24'h008000; //End of packet without any extension, tramitting T`
53			`localparam stTX_EOP_EXT= 24'h010000; //End of packet with extension`
54			`localparam stTX_EXT_1 = 24'h020000; //Extend 1 cycle to align the COMMA to Even Code group`
55			`localparam stEPD2_NOEXT= 24'h040000; //Second Cycle of EPD, transmitting /R/`
56			`localparam stEPD3 = 24'h080000; //Third Cycle of EPD, transmitting /R/`
57			`localparam stCARR_EXT = 24'h100000; //Carrier extension`
58			`localparam stALIGN_ERR = 24'h200000; //Repeater's state, we don't use this, go straight to START ERR`
59			`localparam stSTART_ERR = 24'h400000; //Repeater's state`
60			`localparam stTX_ERR = 24'h800000; //Repeater's state`
61
62
63			`reg [23:00] r24_State;`
64			`reg [23:00] w24_NxtState;`
65
66
67			`wire w_XmitChange;`
68			`reg [02:00] r3_LstXmit;`
69			`reg r_TxEven;`
70			`wire w_TxOSIndicate;`
71
72
73			`wire w_FifoTxEn;`
74			`wire w_FifoTxEr;`
75			`wire [07:00] w8_FifoData;`
76			`wire w_UpdateXmitChange;`
77			`wire w_ResetState;`
78			`wire r_ToTxData; //This signal used in txIDLE_DATA state to comeback to TXIDLE or TXDATA`
79			`wire w_Disparity;`
80			`wire [09:00] w10_FifoDin;`
81			`wire [09:00] w10_FifoQ;`
82			`wire w_FifoRd,w_FifoEmpty;`
83			`reg [07:00] r8_TxData;`
84
85			`assign w_XmitChange = (r3_LstXmit!=i3_Xmit)?1'b1:1'b0;`
86			`assign w_TxOSIndicate = (r24_State==stCONFIG_C1A\|\|r24_State==stCONFIG_C1B\|\|r24_State==stCONFIG_C1C\|\|`
87			`r24_State==stCONFIG_C2A\|\|r24_State==stCONFIG_C2B\|\|r24_State==stCONFIG_C2C\|\|`
88			`r24_State==stTX_IDLE\|\|r24_State==stTX_DATA)?1'b0:1'b1;`
89			`//assign w_UpdateXmitChange =`
90			`//FIFO`
91			`assign w10_FifoDin = {i_TxEN,i_TxER,i8_TxD};`
92			`assign w_FifoTxEn = w10_FifoQ[9] & (~w_FifoEmpty);`
93			`assign w_FifoTxEr = w10_FifoQ[8] & (~w_FifoEmpty);`
94			`assign w8_FifoData = w10_FifoQ[7:0];`
95			`mSyncFifo #(.pDataWidth(10),.pPtrWidth(2)) u0SyncFifo (`
96			`.iv_Din(w10_FifoDin),`
97			`.i_Wr((i_TxEN\|i_TxER)),`
98			`.i_Rd(w_FifoRd),`
99			`.o_Empty(w_FifoEmpty),`
100			`.o_Full(),`
101			`.ov_Q(w10_FifoQ),`
102			`.i_Clk(i_Clk),`
103			`.i_ARst_L(i_ARst_L));`
104			`//END FIFO`
105			`assign w_FifoRd = ((w_FifoTxEn && (r24_State==stXMIT_DATA\|\|r24_State==stTX_IDLE)))?1'b0:1'b1;`
106
107			`always@(posedge i_Clk or negedge i_ARst_L)`
108			`if(i_ARst_L==1'b0) begin`
109			`r24_State <= stTX_TEST;`
110			`r3_LstXmit <= 3'b000;`
111			`r_TxEven <= 1'b0;`
112			`end`
113			`else`
114			`begin`
115			`if(w_UpdateXmitChange) r3_LstXmit <= i3_Xmit;`
116			`r24_State <= w24_NxtState;`
117			`r_TxEven <= ~r_TxEven;`
118			`o_TxEven <= r_TxEven;`
119			`end`
120
121			`assign w_UpdateXmitChange = w_ResetState;`
122			`assign w_ResetState = (i_ARst_L==1'b0)\|\|(w_XmitChange && (r_TxEven==1'b0) && w_TxOSIndicate);`
123			`assign w_Disparity = i_CurrentParity;`
124			`always@(*)`
125			`begin`
126			`if(w_ResetState)`
127			`r24_State <= stTX_TEST;`
128			`case(r24_State)`
129			stTX_TEST : if(i3_Xmit==`cXmitCONFIG && r_TxEven==1'b0) w24_NxtState <= stCONFIG_C1A; else
130			if(i3_Xmit==`cXmitIDLE \|\| (i3_Xmit==`cXmitDATA && (w_FifoTxEn \|\| w_FifoTxEr))) w24_NxtState <= stTX_IDLE; else
131			if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA;
132			`else w24_NxtState <= stTX_TEST;`
133			`stCONFIG_C1A : w24_NxtState <= stCONFIG_C1B;`
134			`stCONFIG_C1B : w24_NxtState <= stCONFIG_C1C;`
135			`stCONFIG_C1C : w24_NxtState <= stCONFIG_C1D;`
136			stCONFIG_C1D : if(i3_Xmit==`cXmitCONFIG) w24_NxtState <= stCONFIG_C2A; else
137			if(i3_Xmit==`cXmitIDLE \|\| (i3_Xmit==`cXmitDATA && (w_FifoTxEn \|\| w_FifoTxEr))) w24_NxtState <= stTX_IDLE; else
138			if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA; else
139			`w24_NxtState <= stTX_ERR;`
140			`stCONFIG_C2A : w24_NxtState <= stCONFIG_C2B;`
141			`stCONFIG_C2B : w24_NxtState <= stCONFIG_C2C;`
142			`stCONFIG_C2C : w24_NxtState <= stCONFIG_C2D;`
143			stCONFIG_C2D : if(i3_Xmit==`cXmitCONFIG) w24_NxtState <= stCONFIG_C1A; else
144			if(i3_Xmit==`cXmitIDLE \|\| (i3_Xmit==`cXmitDATA && (w_FifoTxEn \|\| w_FifoTxEr))) w24_NxtState <= stTX_IDLE; else
145			if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA; else
146			`w24_NxtState <= stTX_ERR;`
147
148			`stTX_IDLE : w24_NxtState <= stIDLE_DATA;`
149			`stIDLE_DATA : if(r_ToTxData==1'b0) begin //Data phase of TX_IDLE`
150			if(i3_Xmit==`cXmitDATA && (~w_FifoTxEn) && (~w_FifoTxEr)) w24_NxtState <= stXMIT_DATA; else
151			`w24_NxtState <= stTX_IDLE;`
152			`end`
153			`else`
154			`begin`
155			`if(w_FifoTxEn & (~w_FifoTxEr)) w24_NxtState <= stTX_SOP; else`
156			`if(w_FifoTxEn & w_FifoTxEr) w24_NxtState <= stSTART_ERR; else`
157			`w24_NxtState <= stXMIT_DATA;`
158			`end`
159			`stXMIT_DATA : w24_NxtState <= stIDLE_DATA;`
160			`stTX_DATA : if(w_FifoTxEn) w24_NxtState <= stTX_DATA; else`
161			`if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EOP; else`
162			`w24_NxtState <= stTX_EOP_EXT;`
163			`stTX_SOP : if(w_FifoTxEn) w24_NxtState <= stTX_DATA; else`
164			`if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EOP; else`
165			`w24_NxtState <= stTX_EOP_EXT;`
166			`stTX_EOP : w24_NxtState <= stEPD2_NOEXT;`
167			`stEPD2_NOEXT : if(r_TxEven) w24_NxtState <= stEPD3; else`
168			`w24_NxtState <= stXMIT_DATA;`
169			`stEPD3 : w24_NxtState <= stXMIT_DATA;`
170			`stTX_EOP_EXT : if(~w_FifoTxEr) w24_NxtState <= stTX_EXT_1; else w24_NxtState <= stCARR_EXT;`
171			`stTX_EXT_1 : w24_NxtState <= stEPD2_NOEXT;`
172			`stCARR_EXT : if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EXT_1; else`
173			`if(w_FifoTxEn & (~w_FifoTxEr)) w24_NxtState <= stTX_SOP; else`
174			`if(w_FifoTxEn & w_FifoTxEr) w24_NxtState <= stSTART_ERR; else`
175			`w24_NxtState <= stCARR_EXT;`
176
177			`//stALIGN_ERR :`
178			`stSTART_ERR : w24_NxtState <= stTX_ERR;`
179			`stTX_ERR : if(w_FifoTxEn) w24_NxtState <= stTX_DATA; else`
180			`if((~w_FifoTxEn) & (~w_FifoTxEr)) w24_NxtState <= stTX_EOP; else`
181			`w24_NxtState <= stTX_EOP_EXT;`
182			`endcase`
183			`end`
184
185
186			`assign o_TxCodeValid = 1'b1;`
187
188			`always@(posedge i_Clk or negedge i_ARst_L)`
189			`if(i_ARst_L==1'b0) begin`
190			`o_Xmitting <= 1'b0;`
191			`o_TxCodeCtrl <= 1'b0;`
192			`o8_TxCodeGroupOut <= 8'h00;`
193			`end else begin`
194			`case(w24_NxtState)`
195			`stTX_TEST : begin`
196			`o_Xmitting <= 1'b0;`
197			`end`
198			`stCONFIG_C1A : begin`
199			o8_TxCodeGroupOut <= `K28_5;
200			`o_TxCodeCtrl <= 1'b1;`
201			`end`
202			`stCONFIG_C1B : begin`
203			o8_TxCodeGroupOut <= `D21_5;
204			`o_TxCodeCtrl <= 1'b0;`
205			`end`
206			`stCONFIG_C1C : o8_TxCodeGroupOut <= i16_ConfigReg[07:00];`
207			`stCONFIG_C1D : o8_TxCodeGroupOut <= i16_ConfigReg[15:08];`
208
209			`stCONFIG_C2A : begin`
210			o8_TxCodeGroupOut <= `K28_5;
211			`o_TxCodeCtrl <= 1'b1;`
212			`end`
213			`stCONFIG_C2B : begin`
214			o8_TxCodeGroupOut <= `D2_2;
215			`o_TxCodeCtrl <= 1'b0;`
216			`end`
217			`stCONFIG_C2C : o8_TxCodeGroupOut <= i16_ConfigReg[07:00];`
218			`stCONFIG_C2D : o8_TxCodeGroupOut <= i16_ConfigReg[15:08];`
219			`stTX_IDLE : begin`
220			o8_TxCodeGroupOut <= `K28_5;
221			`o_TxCodeCtrl <= 1'b1;`
222			`end`
223			`stIDLE_DATA : begin`
224			o8_TxCodeGroupOut <= (w_Disparity==1'b0)?`D5_6:`D16_2;//Disparity = 0 means positive
225			`o_TxCodeCtrl <= 1'b0;`
226			`end`
227			`stXMIT_DATA : begin`
228			o8_TxCodeGroupOut <= `K28_5;
229			`o_TxCodeCtrl <= 1'b1;`
230			`end`
231			`stTX_DATA : if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)\|\|(w_FifoTxEn & w_FifoTxEr))`
232			`begin`
233			o8_TxCodeGroupOut <= `K30_7;
234			`o_TxCodeCtrl <= 1'b1;`
235			`end else`
236			`begin`
237			`o8_TxCodeGroupOut <= w8_FifoData;`
238			`o_TxCodeCtrl <= 1'b0;`
239			`end`
240			`stTX_SOP : begin`
241			`o_Xmitting <= 1'b1;`
242			o8_TxCodeGroupOut <= `K27_7;
243			`o_TxCodeCtrl <= 1'b1;`
244			`end`
245			`stTX_EOP : begin`
246			o8_TxCodeGroupOut <= `K29_7;
247			`o_TxCodeCtrl <= 1'b1;`
248			`o_Xmitting <= (~r_TxEven);`
249			`end`
250			`stEPD2_NOEXT : begin`
251			o8_TxCodeGroupOut <= `K23_7;
252			`o_TxCodeCtrl <= 1'b1;`
253			`o_Xmitting <= 1'b0;`
254			`end`
255			`stEPD3 : begin`
256			o8_TxCodeGroupOut <= `K23_7;
257			`o_TxCodeCtrl <= 1'b1;`
258			`end`
259			`stTX_EOP_EXT : if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)\|\|(w_FifoTxEn & w_FifoTxEr))`
260			`begin`
261			o8_TxCodeGroupOut <= `K30_7;
262			`o_TxCodeCtrl <= 1'b1;`
263			`end else`
264			`begin`
265			o8_TxCodeGroupOut <= `K29_7;
266			`o_TxCodeCtrl <= 1'b1;`
267			`end`
268			`stTX_EXT_1 : begin`
269			`o_Xmitting <= (~r_TxEven);`
270			`if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)\|\|(w_FifoTxEn & w_FifoTxEr))`
271			`begin`
272			o8_TxCodeGroupOut <= `K30_7;
273			`o_TxCodeCtrl <= 1'b1;`
274
275			`end else`
276			`begin`
277			o8_TxCodeGroupOut <= `K23_7;
278			`o_TxCodeCtrl <= 1'b1;`
279			`end`
280			`end`
281			`stCARR_EXT : if(((~w_FifoTxEn) & w_FifoTxEr & w8_FifoData != 8'h0F)\|\|(w_FifoTxEn & w_FifoTxEr))`
282			`begin`
283			o8_TxCodeGroupOut <= `K30_7;
284			`o_TxCodeCtrl <= 1'b1;`
285			`end else`
286			`begin`
287			o8_TxCodeGroupOut <= `K23_7;
288			`o_TxCodeCtrl <= 1'b1;`
289			`end`
290
291			`//stALIGN_ERR :`
292			`stSTART_ERR : begin`
293			o8_TxCodeGroupOut <= `K27_7;
294			`o_TxCodeCtrl <= 1'b1;`
295			`o_Xmitting <= 1'b1;`
296			`end`
297			`stTX_ERR : begin`
298			o8_TxCodeGroupOut <= `K30_7;
299			`o_TxCodeCtrl <= 1'b1;`
300			`end`
301			`endcase`
302			`end`
303
304			`//synthesis translate_off`
305			`reg [239:0] r240_TxStateName;`
306			`always@(*)`
307			`case(r24_State)`
308			`stTX_TEST : r240_TxStateName<="stTX_TEST ";`
309			`stCONFIG_C1A : r240_TxStateName<="stCONFIG_C1A";`
310			`stCONFIG_C1B : r240_TxStateName<="stCONFIG_C1B";`
311			`stCONFIG_C1C : r240_TxStateName<="stCONFIG_C1C";`
312			`stCONFIG_C1D : r240_TxStateName<="stCONFIG_C1D";`
313			`stCONFIG_C2A : r240_TxStateName<="stCONFIG_C2A";`
314			`stCONFIG_C2B : r240_TxStateName<="stCONFIG_C2B";`
315			`stCONFIG_C2C : r240_TxStateName<="stCONFIG_C2C";`
316			`stCONFIG_C2D : r240_TxStateName<="stCONFIG_C2D";`
317			`stTX_IDLE : r240_TxStateName<="stTX_IDLE ";`
318			`stXMIT_DATA : r240_TxStateName<="stXMIT_DATA";`
319			`stIDLE_DATA : r240_TxStateName<="stIDLE_DATA";`
320			`stTX_SOP : r240_TxStateName<="stTX_SOP ";`
321			`stTX_PKT : r240_TxStateName<="stTX_PKT ";`
322			`stTX_DATA : r240_TxStateName<="stTX_DATA ";`
323			`stTX_EOP : r240_TxStateName<="stTX_EOP ";`
324			`stTX_EOP_EXT : r240_TxStateName<="stTX_EOP_EXT";`
325			`stTX_EXT_1 : r240_TxStateName<="stTX_EXT_1 ";`
326			`stEPD2_NOEXT : r240_TxStateName<="stEPD2_NOEXT";`
327			`stEPD3 : r240_TxStateName<="stEPD3 ";`
328			`stCARR_EXT : r240_TxStateName<="stCARR_EXT ";`
329			`stALIGN_ERR : r240_TxStateName<="stALIGN_ERR";`
330			`stSTART_ERR : r240_TxStateName<="stSTART_ERR";`
331			`stTX_ERR : r240_TxStateName<="stTX_ERR ";`
332			`endcase`
333			`//synthesis translate_on`
334			`endmodule`