OpenCores
URL https://opencores.org/ocsvn/sha256_hash_core/sha256_hash_core/trunk

Subversion Repositories sha256_hash_core

[/] [sha256_hash_core/] [trunk/] [syn/] [.Xil/] [PlanAhead-2528-WIN-AQV6D9G23CA/] [ngc2edif/] [_xmsgs/] [ngc2edif.xmsgs] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 jdoin
2
7
8
No output is written to spi_master_atlys_top.xncf, ignored.
9
10
 
11
Signal bus m_rx_data_3_reg<7 : 1> on block spi_master_atlys_top is not reconstructed, because there are some missing bus signals.
12
13
 
14
Signal bus s_rx_data_3_reg<7 : 1> on block spi_master_atlys_top is not reconstructed, because there are some missing bus signals.
15
16
 
17
18
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.