Subversion Repositories simple_fm_receiver

-- ------------------------------------------------------------------------

-- Copyright (C) 2004 Arif Endro Nugroho

-- All rights reserved.

-- 

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-- 1. Redistributions of source code must retain the above copyright

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-- 2. Redistributions in binary form must reproduce the above copyright

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-- THIS SOFTWARE IS PROVIDED BY ARIF ENDRO NUGROHO "AS IS" AND ANY EXPRESS

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-- ------------------------------------------------------------------------

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity bench is

port (

    clock               : in  std_logic;

    reset               : in  std_logic

    );

end bench;

architecture structural of bench is

  component fm

  port (

    CLK              : in  std_logic;

    RESET            : in  std_logic;

    FMIN             : in  std_logic_vector (07 downto 0);

    DMOUT            : out std_logic_vector (11 downto 0)

    );

  end component;

  component input_fm

  port (

    clock            : in  std_logic;

    clear            : in  std_logic;

    test_signal_fm   : out bit_vector (07 downto 0);

    test_signal_fmTri: out bit_vector (07 downto 0)

    );

  end component;

  signal test_signal_fm        : bit_vector (07 downto 0);

  signal test_signal_fm_std    : std_logic_vector (07 downto 0);

  signal test_signal_fmTri     : bit_vector (07 downto 0);

  signal test_signal_fmTri_std : std_logic_vector (07 downto 0);

  signal output_fm_std         : std_logic_vector (11 downto 0);

  begin

 test_signal_fm_std    <= to_stdlogicvector (test_signal_fm);

 test_signal_fmTri_std <= to_stdlogicvector (test_signal_fmTri);

 myinput : input_fm

   port map (

    clock            => clock,

    clear            => reset,

    test_signal_fm   => test_signal_fm,

    test_signal_fmTri=> test_signal_fmTri

    );

  myfm : fm

   port map (

    CLK                  => clock,

    RESET                => reset,

    FMIN                 => test_signal_fm_std,

    DMOUT (11 downto 0)  => output_fm_std

    );

end structural;